131d157ae1ac2cd9c787dc3c1d28e64c682803844Jia Liu//===-- SparcInstrInfo.h - Sparc Instruction Information --------*- C++ -*-===// 2b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 3e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke// The LLVM Compiler Infrastructure 4e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 8e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke//===----------------------------------------------------------------------===// 9e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke// 107c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner// This file contains the Sparc implementation of the TargetInstrInfo class. 11e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke// 12e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke//===----------------------------------------------------------------------===// 13e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke 147c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner#ifndef SPARCINSTRUCTIONINFO_H 157c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner#define SPARCINSTRUCTIONINFO_H 16e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke 177c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner#include "SparcRegisterInfo.h" 1879aa3417eb6f58d668aadfedf075240a41d35a26Craig Topper#include "llvm/Target/TargetInstrInfo.h" 19e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke 204db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng#define GET_INSTRINFO_HEADER 214db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng#include "SparcGenInstrInfo.inc" 224db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng 23e785e531f4495068ee46cabd926939eec15a565aBrian Gaekenamespace llvm { 24e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke 257c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner/// SPII - This namespace holds all of the target specific flags that 267d7ac63366956473c8b3ef790447f576315e4c21Brian Gaeke/// instruction info tracks. 277d7ac63366956473c8b3ef790447f576315e4c21Brian Gaeke/// 287c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattnernamespace SPII { 297d7ac63366956473c8b3ef790447f576315e4c21Brian Gaeke enum { 307d7ac63366956473c8b3ef790447f576315e4c21Brian Gaeke Pseudo = (1<<0), 317d7ac63366956473c8b3ef790447f576315e4c21Brian Gaeke Load = (1<<1), 327d7ac63366956473c8b3ef790447f576315e4c21Brian Gaeke Store = (1<<2), 337d7ac63366956473c8b3ef790447f576315e4c21Brian Gaeke DelaySlot = (1<<3) 347d7ac63366956473c8b3ef790447f576315e4c21Brian Gaeke }; 35d74ea2bbd8bb630331f35ead42d385249bd42af8Chris Lattner} 367d7ac63366956473c8b3ef790447f576315e4c21Brian Gaeke 374db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Chengclass SparcInstrInfo : public SparcGenInstrInfo { 387c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner const SparcRegisterInfo RI; 39d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson const SparcSubtarget& Subtarget; 40e785e531f4495068ee46cabd926939eec15a565aBrian Gaekepublic: 41950a4c40b823cd4f09dc71be635229246dfd6cacDan Gohman explicit SparcInstrInfo(SparcSubtarget &ST); 42e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke 43e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 44e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke /// such, whenever a client has an instance of instruction info, it should 45e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke /// always be able to get register info as well (through this method). 46e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke /// 47c9f5f3f64f896d0a8c8fa35a1dd98bc57b8960f6Dan Gohman virtual const SparcRegisterInfo &getRegisterInfo() const { return RI; } 481d6dc974631a8920a4e5a801a6c7cd4753ae8a8eChris Lattner 495ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner /// isLoadFromStackSlot - If the specified machine instruction is a direct 505ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner /// load from a stack slot, return the virtual or physical register number of 515ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner /// the destination along with the FrameIndex of the loaded stack slot. If 525ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner /// not, return 0. This predicate must return 0 if the instruction has 535ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner /// any side effects other than loading from the stack slot. 54cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2Dan Gohman virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, 55cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2Dan Gohman int &FrameIndex) const; 561e06bcbd633175d75d13aaa5695ca0633ba86068Venkatraman Govindaraju 575ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner /// isStoreToStackSlot - If the specified machine instruction is a direct 585ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner /// store to a stack slot, return the virtual or physical register number of 595ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner /// the source reg along with the FrameIndex of the loaded stack slot. If 605ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner /// not, return 0. This predicate must return 0 if the instruction has 615ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner /// any side effects other than storing to the stack slot. 62cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2Dan Gohman virtual unsigned isStoreToStackSlot(const MachineInstr *MI, 63cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2Dan Gohman int &FrameIndex) const; 64c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 65c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 66c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju MachineBasicBlock *&FBB, 67c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju SmallVectorImpl<MachineOperand> &Cond, 68c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju bool AllowModify = false) const ; 69c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 70c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; 71c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 726ae3626a4fda14e6250ac8d8ff487efb8952cdf7Evan Cheng virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 736ae3626a4fda14e6250ac8d8ff487efb8952cdf7Evan Cheng MachineBasicBlock *FBB, 743bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings const SmallVectorImpl<MachineOperand> &Cond, 753bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings DebugLoc DL) const; 76d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 778e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen virtual void copyPhysReg(MachineBasicBlock &MBB, 788e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen MachineBasicBlock::iterator I, DebugLoc DL, 798e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen unsigned DestReg, unsigned SrcReg, 808e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen bool KillSrc) const; 811e06bcbd633175d75d13aaa5695ca0633ba86068Venkatraman Govindaraju 82f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson virtual void storeRegToStackSlot(MachineBasicBlock &MBB, 83f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MachineBasicBlock::iterator MBBI, 84f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned SrcReg, bool isKill, int FrameIndex, 85746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterClass *RC, 86746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterInfo *TRI) const; 87f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 88f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, 89f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MachineBasicBlock::iterator MBBI, 90f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned DestReg, int FrameIndex, 91746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterClass *RC, 92746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterInfo *TRI) const; 931e06bcbd633175d75d13aaa5695ca0633ba86068Venkatraman Govindaraju 94db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner unsigned getGlobalBaseReg(MachineFunction *MF) const; 95e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke}; 96e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke 97e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke} 98e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke 99e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke#endif 100