r600_pipe.c revision d8d5c2660f581821f017fdcb7954c6f7bd099114
1/* 2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23#include <stdio.h> 24#include <errno.h> 25#include <pipe/p_defines.h> 26#include <pipe/p_state.h> 27#include <pipe/p_context.h> 28#include <tgsi/tgsi_scan.h> 29#include <tgsi/tgsi_parse.h> 30#include <tgsi/tgsi_util.h> 31#include <util/u_blitter.h> 32#include <util/u_double_list.h> 33#include <util/u_transfer.h> 34#include <util/u_surface.h> 35#include <util/u_pack_color.h> 36#include <util/u_memory.h> 37#include <util/u_inlines.h> 38#include "util/u_upload_mgr.h" 39#include <pipebuffer/pb_buffer.h> 40#include "r600.h" 41#include "r600d.h" 42#include "r600_resource.h" 43#include "r600_shader.h" 44#include "r600_pipe.h" 45#include "r600_state_inlines.h" 46 47/* 48 * pipe_context 49 */ 50static void r600_flush(struct pipe_context *ctx, unsigned flags, 51 struct pipe_fence_handle **fence) 52{ 53 struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; 54#if 0 55 static int dc = 0; 56 char dname[256]; 57#endif 58 59 if (!rctx->ctx.pm4_cdwords) 60 return; 61 62#if 0 63 sprintf(dname, "gallium-%08d.bof", dc); 64 if (dc < 20) { 65 r600_context_dump_bof(&rctx->ctx, dname); 66 R600_ERR("dumped %s\n", dname); 67 } 68 dc++; 69#endif 70 r600_context_flush(&rctx->ctx); 71 72 /* XXX These shouldn't be really necessary, but removing them breaks some tests. 73 * Needless buffer reallocations may significantly increase memory consumption, 74 * so getting rid of these 3 calls is important. */ 75 u_vbuf_mgr_flush_uploader(rctx->vbuf_mgr); 76 u_upload_flush(rctx->upload_ib); 77 u_upload_flush(rctx->upload_const); 78} 79 80static void r600_destroy_context(struct pipe_context *context) 81{ 82 struct r600_pipe_context *rctx = (struct r600_pipe_context *)context; 83 84 rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush); 85 86 r600_context_fini(&rctx->ctx); 87 88 util_blitter_destroy(rctx->blitter); 89 90 for (int i = 0; i < R600_PIPE_NSTATES; i++) { 91 free(rctx->states[i]); 92 } 93 94 u_upload_destroy(rctx->upload_ib); 95 u_upload_destroy(rctx->upload_const); 96 u_vbuf_mgr_destroy(rctx->vbuf_mgr); 97 98 FREE(rctx); 99} 100 101static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv) 102{ 103 struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context); 104 struct r600_screen* rscreen = (struct r600_screen *)screen; 105 enum chip_class class; 106 107 if (rctx == NULL) 108 return NULL; 109 rctx->context.winsys = rscreen->screen.winsys; 110 rctx->context.screen = screen; 111 rctx->context.priv = priv; 112 rctx->context.destroy = r600_destroy_context; 113 rctx->context.flush = r600_flush; 114 115 /* Easy accessing of screen/winsys. */ 116 rctx->screen = rscreen; 117 rctx->radeon = rscreen->radeon; 118 rctx->family = r600_get_family(rctx->radeon); 119 120 r600_init_blit_functions(rctx); 121 r600_init_query_functions(rctx); 122 r600_init_context_resource_functions(rctx); 123 r600_init_surface_functions(rctx); 124 rctx->context.draw_vbo = r600_draw_vbo; 125 126 switch (r600_get_family(rctx->radeon)) { 127 case CHIP_R600: 128 case CHIP_RV610: 129 case CHIP_RV630: 130 case CHIP_RV670: 131 case CHIP_RV620: 132 case CHIP_RV635: 133 case CHIP_RS780: 134 case CHIP_RS880: 135 case CHIP_RV770: 136 case CHIP_RV730: 137 case CHIP_RV710: 138 case CHIP_RV740: 139 r600_init_state_functions(rctx); 140 if (r600_context_init(&rctx->ctx, rctx->radeon)) { 141 r600_destroy_context(&rctx->context); 142 return NULL; 143 } 144 r600_init_config(rctx); 145 break; 146 case CHIP_CEDAR: 147 case CHIP_REDWOOD: 148 case CHIP_JUNIPER: 149 case CHIP_CYPRESS: 150 case CHIP_HEMLOCK: 151 case CHIP_PALM: 152 case CHIP_BARTS: 153 case CHIP_TURKS: 154 case CHIP_CAICOS: 155 evergreen_init_state_functions(rctx); 156 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) { 157 r600_destroy_context(&rctx->context); 158 return NULL; 159 } 160 evergreen_init_config(rctx); 161 break; 162 default: 163 R600_ERR("unsupported family %d\n", r600_get_family(rctx->radeon)); 164 r600_destroy_context(&rctx->context); 165 return NULL; 166 } 167 168 rctx->vbuf_mgr = u_vbuf_mgr_create(&rctx->context, 1024 * 1024, 16, 169 U_VERTEX_FETCH_BYTE_ALIGNED); 170 if (!rctx->vbuf_mgr) { 171 r600_destroy_context(&rctx->context); 172 return NULL; 173 } 174 175 rctx->upload_ib = u_upload_create(&rctx->context, 128 * 1024, 16, 176 PIPE_BIND_INDEX_BUFFER); 177 if (rctx->upload_ib == NULL) { 178 r600_destroy_context(&rctx->context); 179 return NULL; 180 } 181 182 rctx->upload_const = u_upload_create(&rctx->context, 1024 * 1024, 256, 183 PIPE_BIND_CONSTANT_BUFFER); 184 if (rctx->upload_const == NULL) { 185 r600_destroy_context(&rctx->context); 186 return NULL; 187 } 188 189 rctx->blitter = util_blitter_create(&rctx->context); 190 if (rctx->blitter == NULL) { 191 FREE(rctx); 192 return NULL; 193 } 194 195 class = r600_get_family_class(rctx->radeon); 196 if (class == R600 || class == R700) 197 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx); 198 else 199 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx); 200 201 return &rctx->context; 202} 203 204/* 205 * pipe_screen 206 */ 207static const char* r600_get_vendor(struct pipe_screen* pscreen) 208{ 209 return "X.Org"; 210} 211 212static const char *r600_get_family_name(enum radeon_family family) 213{ 214 switch(family) { 215 case CHIP_R600: return "AMD R600"; 216 case CHIP_RV610: return "AMD RV610"; 217 case CHIP_RV630: return "AMD RV630"; 218 case CHIP_RV670: return "AMD RV670"; 219 case CHIP_RV620: return "AMD RV620"; 220 case CHIP_RV635: return "AMD RV635"; 221 case CHIP_RS780: return "AMD RS780"; 222 case CHIP_RS880: return "AMD RS880"; 223 case CHIP_RV770: return "AMD RV770"; 224 case CHIP_RV730: return "AMD RV730"; 225 case CHIP_RV710: return "AMD RV710"; 226 case CHIP_RV740: return "AMD RV740"; 227 case CHIP_CEDAR: return "AMD CEDAR"; 228 case CHIP_REDWOOD: return "AMD REDWOOD"; 229 case CHIP_JUNIPER: return "AMD JUNIPER"; 230 case CHIP_CYPRESS: return "AMD CYPRESS"; 231 case CHIP_HEMLOCK: return "AMD HEMLOCK"; 232 case CHIP_PALM: return "AMD PALM"; 233 case CHIP_BARTS: return "AMD BARTS"; 234 case CHIP_TURKS: return "AMD TURKS"; 235 case CHIP_CAICOS: return "AMD CAICOS"; 236 default: return "AMD unknown"; 237 } 238} 239 240static const char* r600_get_name(struct pipe_screen* pscreen) 241{ 242 struct r600_screen *rscreen = (struct r600_screen *)pscreen; 243 enum radeon_family family = r600_get_family(rscreen->radeon); 244 245 return r600_get_family_name(family); 246} 247 248static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param) 249{ 250 struct r600_screen *rscreen = (struct r600_screen *)pscreen; 251 enum radeon_family family = r600_get_family(rscreen->radeon); 252 253 switch (param) { 254 /* Supported features (boolean caps). */ 255 case PIPE_CAP_NPOT_TEXTURES: 256 case PIPE_CAP_TWO_SIDED_STENCIL: 257 case PIPE_CAP_GLSL: 258 case PIPE_CAP_DUAL_SOURCE_BLEND: 259 case PIPE_CAP_ANISOTROPIC_FILTER: 260 case PIPE_CAP_POINT_SPRITE: 261 case PIPE_CAP_OCCLUSION_QUERY: 262 case PIPE_CAP_TEXTURE_SHADOW_MAP: 263 case PIPE_CAP_TEXTURE_MIRROR_CLAMP: 264 case PIPE_CAP_TEXTURE_MIRROR_REPEAT: 265 case PIPE_CAP_BLEND_EQUATION_SEPARATE: 266 case PIPE_CAP_SM3: 267 case PIPE_CAP_TEXTURE_SWIZZLE: 268 case PIPE_CAP_INDEP_BLEND_ENABLE: 269 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE: 270 case PIPE_CAP_DEPTH_CLAMP: 271 case PIPE_CAP_SHADER_STENCIL_EXPORT: 272 return 1; 273 274 /* Unsupported features (boolean caps). */ 275 case PIPE_CAP_STREAM_OUTPUT: 276 case PIPE_CAP_PRIMITIVE_RESTART: 277 case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */ 278 case PIPE_CAP_INSTANCED_DRAWING: 279 case PIPE_CAP_ARRAY_TEXTURES: 280 return 0; 281 282 /* Texturing. */ 283 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: 284 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: 285 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: 286 if (family >= CHIP_CEDAR) 287 return 15; 288 else 289 return 14; 290 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: 291 /* FIXME allow this once infrastructure is there */ 292 return 16; 293 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: 294 case PIPE_CAP_MAX_COMBINED_SAMPLERS: 295 return 16; 296 297 /* Render targets. */ 298 case PIPE_CAP_MAX_RENDER_TARGETS: 299 /* FIXME some r6xx are buggy and can only do 4 */ 300 return 8; 301 302 /* Fragment coordinate conventions. */ 303 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: 304 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: 305 return 1; 306 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: 307 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: 308 return 0; 309 310 /* Timer queries, present when the clock frequency is non zero. */ 311 case PIPE_CAP_TIMER_QUERY: 312 return r600_get_clock_crystal_freq(rscreen->radeon) != 0; 313 314 default: 315 R600_ERR("r600: unknown param %d\n", param); 316 return 0; 317 } 318} 319 320static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param) 321{ 322 struct r600_screen *rscreen = (struct r600_screen *)pscreen; 323 enum radeon_family family = r600_get_family(rscreen->radeon); 324 325 switch (param) { 326 case PIPE_CAP_MAX_LINE_WIDTH: 327 case PIPE_CAP_MAX_LINE_WIDTH_AA: 328 case PIPE_CAP_MAX_POINT_WIDTH: 329 case PIPE_CAP_MAX_POINT_WIDTH_AA: 330 if (family >= CHIP_CEDAR) 331 return 16384.0f; 332 else 333 return 8192.0f; 334 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: 335 return 16.0f; 336 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: 337 return 16.0f; 338 default: 339 R600_ERR("r600: unsupported paramf %d\n", param); 340 return 0.0f; 341 } 342} 343 344static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param) 345{ 346 switch(shader) 347 { 348 case PIPE_SHADER_FRAGMENT: 349 case PIPE_SHADER_VERTEX: 350 break; 351 case PIPE_SHADER_GEOMETRY: 352 /* TODO: support and enable geometry programs */ 353 return 0; 354 default: 355 /* TODO: support tessellation on Evergreen */ 356 return 0; 357 } 358 359 /* TODO: all these should be fixed, since r600 surely supports much more! */ 360 switch (param) { 361 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 362 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 363 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 364 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 365 return 16384; 366 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 367 return 8; /* FIXME */ 368 case PIPE_SHADER_CAP_MAX_INPUTS: 369 if(shader == PIPE_SHADER_FRAGMENT) 370 return 10; 371 else 372 return 16; 373 case PIPE_SHADER_CAP_MAX_TEMPS: 374 return 256; //max native temporaries 375 case PIPE_SHADER_CAP_MAX_ADDRS: 376 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */ 377 case PIPE_SHADER_CAP_MAX_CONSTS: 378 return 256; //max native parameters 379 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 380 return R600_MAX_CONST_BUFFERS; 381 case PIPE_SHADER_CAP_MAX_PREDS: 382 return 0; /* FIXME */ 383 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: 384 return 1; 385 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: 386 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 387 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 388 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 389 return 1; 390 case PIPE_SHADER_CAP_SUBROUTINES: 391 return 0; 392 default: 393 return 0; 394 } 395} 396 397static boolean r600_is_format_supported(struct pipe_screen* screen, 398 enum pipe_format format, 399 enum pipe_texture_target target, 400 unsigned sample_count, 401 unsigned usage, 402 unsigned geom_flags) 403{ 404 unsigned retval = 0; 405 if (target >= PIPE_MAX_TEXTURE_TYPES) { 406 R600_ERR("r600: unsupported texture type %d\n", target); 407 return FALSE; 408 } 409 410 /* Multisample */ 411 if (sample_count > 1) 412 return FALSE; 413 414 if ((usage & PIPE_BIND_SAMPLER_VIEW) && 415 r600_is_sampler_format_supported(format)) { 416 retval |= PIPE_BIND_SAMPLER_VIEW; 417 } 418 419 if ((usage & (PIPE_BIND_RENDER_TARGET | 420 PIPE_BIND_DISPLAY_TARGET | 421 PIPE_BIND_SCANOUT | 422 PIPE_BIND_SHARED)) && 423 r600_is_colorbuffer_format_supported(format)) { 424 retval |= usage & 425 (PIPE_BIND_RENDER_TARGET | 426 PIPE_BIND_DISPLAY_TARGET | 427 PIPE_BIND_SCANOUT | 428 PIPE_BIND_SHARED); 429 } 430 431 if ((usage & PIPE_BIND_DEPTH_STENCIL) && 432 r600_is_zs_format_supported(format)) { 433 retval |= PIPE_BIND_DEPTH_STENCIL; 434 } 435 436 if (usage & PIPE_BIND_VERTEX_BUFFER) { 437 struct r600_screen *rscreen = (struct r600_screen *)screen; 438 enum radeon_family family = r600_get_family(rscreen->radeon); 439 440 if (r600_is_vertex_format_supported(format, family)) { 441 retval |= PIPE_BIND_VERTEX_BUFFER; 442 } 443 } 444 445 if (usage & PIPE_BIND_TRANSFER_READ) 446 retval |= PIPE_BIND_TRANSFER_READ; 447 if (usage & PIPE_BIND_TRANSFER_WRITE) 448 retval |= PIPE_BIND_TRANSFER_WRITE; 449 450 return retval == usage; 451} 452 453static void r600_destroy_screen(struct pipe_screen* pscreen) 454{ 455 struct r600_screen *rscreen = (struct r600_screen *)pscreen; 456 457 if (rscreen == NULL) 458 return; 459 460 radeon_decref(rscreen->radeon); 461 462 FREE(rscreen); 463} 464 465 466struct pipe_screen *r600_screen_create(struct radeon *radeon) 467{ 468 struct r600_screen *rscreen; 469 470 rscreen = CALLOC_STRUCT(r600_screen); 471 if (rscreen == NULL) { 472 return NULL; 473 } 474 475 rscreen->radeon = radeon; 476 rscreen->screen.winsys = (struct pipe_winsys*)radeon; 477 rscreen->screen.destroy = r600_destroy_screen; 478 rscreen->screen.get_name = r600_get_name; 479 rscreen->screen.get_vendor = r600_get_vendor; 480 rscreen->screen.get_param = r600_get_param; 481 rscreen->screen.get_shader_param = r600_get_shader_param; 482 rscreen->screen.get_paramf = r600_get_paramf; 483 rscreen->screen.is_format_supported = r600_is_format_supported; 484 rscreen->screen.context_create = r600_create_context; 485 r600_init_screen_resource_functions(&rscreen->screen); 486 487 rscreen->tiling_info = r600_get_tiling_info(radeon); 488 489 return &rscreen->screen; 490} 491