brw_vs.c revision d45814c925dd6c479cfd383b9b59458fc4359cf7 
1/*
2 Copyright (C) Intel Corp.  2006.  All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28  * Authors:
29  *   Keith Whitwell <keith@tungstengraphics.com>
30  */
31
32
33#include "main/compiler.h"
34#include "brw_context.h"
35#include "brw_vs.h"
36#include "brw_util.h"
37#include "brw_state.h"
38#include "program/prog_print.h"
39#include "program/prog_parameter.h"
40
41#include "glsl/ralloc.h"
42
43static inline void assign_vue_slot(struct brw_vue_map *vue_map,
44                                   int vert_result)
45{
46   /* Make sure this vert_result hasn't been assigned a slot already */
47   assert (vue_map->vert_result_to_slot[vert_result] == -1);
48
49   vue_map->vert_result_to_slot[vert_result] = vue_map->num_slots;
50   vue_map->slot_to_vert_result[vue_map->num_slots++] = vert_result;
51}
52
53/**
54 * Compute the VUE map for vertex shader program.
55 */
56void
57brw_compute_vue_map(struct brw_vue_map *vue_map,
58                    const struct intel_context *intel,
59                    bool userclip_active,
60                    GLbitfield64 outputs_written)
61{
62   int i;
63
64   vue_map->num_slots = 0;
65   for (i = 0; i < BRW_VERT_RESULT_MAX; ++i) {
66      vue_map->vert_result_to_slot[i] = -1;
67      vue_map->slot_to_vert_result[i] = BRW_VERT_RESULT_MAX;
68   }
69
70   /* VUE header: format depends on chip generation and whether clipping is
71    * enabled.
72    */
73   switch (intel->gen) {
74   case 4:
75      /* There are 8 dwords in VUE header pre-Ironlake:
76       * dword 0-3 is indices, point width, clip flags.
77       * dword 4-7 is ndc position
78       * dword 8-11 is the first vertex data.
79       */
80      assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
81      assign_vue_slot(vue_map, BRW_VERT_RESULT_NDC);
82      assign_vue_slot(vue_map, VERT_RESULT_HPOS);
83      break;
84   case 5:
85      /* There are 20 DWs (D0-D19) in VUE header on Ironlake:
86       * dword 0-3 of the header is indices, point width, clip flags.
87       * dword 4-7 is the ndc position
88       * dword 8-11 of the vertex header is the 4D space position
89       * dword 12-19 of the vertex header is the user clip distance.
90       * dword 20-23 is a pad so that the vertex element data is aligned
91       * dword 24-27 is the first vertex data we fill.
92       *
93       * Note: future pipeline stages expect 4D space position to be
94       * contiguous with the other vert_results, so we make dword 24-27 a
95       * duplicate copy of the 4D space position.
96       */
97      assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
98      assign_vue_slot(vue_map, BRW_VERT_RESULT_NDC);
99      assign_vue_slot(vue_map, BRW_VERT_RESULT_HPOS_DUPLICATE);
100      assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST0);
101      assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST1);
102      assign_vue_slot(vue_map, BRW_VERT_RESULT_PAD);
103      assign_vue_slot(vue_map, VERT_RESULT_HPOS);
104      break;
105   case 6:
106   case 7:
107      /* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
108       * dword 0-3 of the header is indices, point width, clip flags.
109       * dword 4-7 is the 4D space position
110       * dword 8-15 of the vertex header is the user clip distance if
111       * enabled.
112       * dword 8-11 or 16-19 is the first vertex element data we fill.
113       */
114      assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
115      assign_vue_slot(vue_map, VERT_RESULT_HPOS);
116      if (userclip_active) {
117         assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST0);
118         assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST1);
119      }
120      /* front and back colors need to be consecutive so that we can use
121       * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
122       * two-sided color.
123       */
124      if (outputs_written & BITFIELD64_BIT(VERT_RESULT_COL0))
125         assign_vue_slot(vue_map, VERT_RESULT_COL0);
126      if (outputs_written & BITFIELD64_BIT(VERT_RESULT_BFC0))
127         assign_vue_slot(vue_map, VERT_RESULT_BFC0);
128      if (outputs_written & BITFIELD64_BIT(VERT_RESULT_COL1))
129         assign_vue_slot(vue_map, VERT_RESULT_COL1);
130      if (outputs_written & BITFIELD64_BIT(VERT_RESULT_BFC1))
131         assign_vue_slot(vue_map, VERT_RESULT_BFC1);
132      break;
133   default:
134      assert (!"VUE map not known for this chip generation");
135      break;
136   }
137
138   /* The hardware doesn't care about the rest of the vertex outputs, so just
139    * assign them contiguously.  Don't reassign outputs that already have a
140    * slot.
141    *
142    * Also, don't assign a slot for VERT_RESULT_CLIP_VERTEX, since it is
143    * unsupported in pre-GEN6, and in GEN6+ the vertex shader converts it into
144    * clip distances.
145    */
146   for (int i = 0; i < VERT_RESULT_MAX; ++i) {
147      if ((outputs_written & BITFIELD64_BIT(i)) &&
148          vue_map->vert_result_to_slot[i] == -1 &&
149          i != VERT_RESULT_CLIP_VERTEX) {
150         assign_vue_slot(vue_map, i);
151      }
152   }
153}
154
155
156/**
157 * Decide which set of clip planes should be used when clipping via
158 * gl_Position or gl_ClipVertex.
159 */
160gl_clip_plane *brw_select_clip_planes(struct gl_context *ctx)
161{
162   if (ctx->Shader.CurrentVertexProgram) {
163      /* There is currently a GLSL vertex shader, so clip according to GLSL
164       * rules, which means compare gl_ClipVertex (or gl_Position, if
165       * gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes
166       * that were stored in EyeUserPlane at the time the clip planes were
167       * specified.
168       */
169      return ctx->Transform.EyeUserPlane;
170   } else {
171      /* Either we are using fixed function or an ARB vertex program.  In
172       * either case the clip planes are going to be compared against
173       * gl_Position (which is in clip coordinates) so we have to clip using
174       * _ClipUserPlane, which was transformed into clip coordinates by Mesa
175       * core.
176       */
177      return ctx->Transform._ClipUserPlane;
178   }
179}
180
181
182static bool
183do_vs_prog(struct brw_context *brw,
184	   struct gl_shader_program *prog,
185	   struct brw_vertex_program *vp,
186	   struct brw_vs_prog_key *key)
187{
188   struct gl_context *ctx = &brw->intel.ctx;
189   struct intel_context *intel = &brw->intel;
190   GLuint program_size;
191   const GLuint *program;
192   struct brw_vs_compile c;
193   void *mem_ctx;
194   int aux_size;
195   int i;
196
197   memset(&c, 0, sizeof(c));
198   memcpy(&c.key, key, sizeof(*key));
199
200   mem_ctx = ralloc_context(NULL);
201
202   brw_init_compile(brw, &c.func, mem_ctx);
203   c.vp = vp;
204
205   c.prog_data.outputs_written = vp->program.Base.OutputsWritten;
206   c.prog_data.inputs_read = vp->program.Base.InputsRead;
207
208   if (c.key.copy_edgeflag) {
209      c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_EDGE);
210      c.prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
211   }
212
213   /* Put dummy slots into the VUE for the SF to put the replaced
214    * point sprite coords in.  We shouldn't need these dummy slots,
215    * which take up precious URB space, but it would mean that the SF
216    * doesn't get nice aligned pairs of input coords into output
217    * coords, which would be a pain to handle.
218    */
219   for (i = 0; i < 8; i++) {
220      if (c.key.point_coord_replace & (1 << i))
221	 c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_TEX0 + i);
222   }
223
224   if (0) {
225      _mesa_fprint_program_opt(stdout, &c.vp->program.Base, PROG_PRINT_DEBUG,
226			       true);
227   }
228
229   /* Emit GEN4 code.
230    */
231   if (brw->new_vs_backend && prog) {
232      if (!brw_vs_emit(prog, &c)) {
233	 ralloc_free(mem_ctx);
234	 return false;
235      }
236   } else {
237      brw_old_vs_emit(&c);
238   }
239
240   /* Scratch space is used for register spilling */
241   if (c.last_scratch) {
242      c.prog_data.total_scratch = brw_get_scratch_size(c.last_scratch);
243
244      brw_get_scratch_bo(intel, &brw->vs.scratch_bo,
245			 c.prog_data.total_scratch * brw->max_vs_threads);
246   }
247
248   /* get the program
249    */
250   program = brw_get_program(&c.func, &program_size);
251
252   /* We upload from &c.prog_data including the constant_map assuming
253    * they're packed together.  It would be nice to have a
254    * compile-time assert macro here.
255    */
256   assert(c.constant_map == (int8_t *)&c.prog_data +
257	  sizeof(c.prog_data));
258   assert(ctx->Const.VertexProgram.MaxNativeParameters ==
259	  ARRAY_SIZE(c.constant_map));
260   (void) ctx;
261
262   aux_size = sizeof(c.prog_data);
263   /* constant_map */
264   aux_size += c.vp->program.Base.Parameters->NumParameters;
265
266   brw_upload_cache(&brw->cache, BRW_VS_PROG,
267		    &c.key, sizeof(c.key),
268		    program, program_size,
269		    &c.prog_data, aux_size,
270		    &brw->vs.prog_offset, &brw->vs.prog_data);
271   ralloc_free(mem_ctx);
272
273   return true;
274}
275
276
277static void brw_upload_vs_prog(struct brw_context *brw)
278{
279   struct intel_context *intel = &brw->intel;
280   struct gl_context *ctx = &intel->ctx;
281   struct brw_vs_prog_key key;
282   /* BRW_NEW_VERTEX_PROGRAM */
283   struct brw_vertex_program *vp =
284      (struct brw_vertex_program *)brw->vertex_program;
285   struct gl_program *prog = (struct gl_program *) brw->vertex_program;
286   int i;
287
288   memset(&key, 0, sizeof(key));
289
290   /* Just upload the program verbatim for now.  Always send it all
291    * the inputs it asks for, whether they are varying or not.
292    */
293   key.program_string_id = vp->id;
294   key.userclip_active = (ctx->Transform.ClipPlanesEnabled != 0);
295   key.uses_clip_distance = vp->program.UsesClipDistance;
296   if (key.userclip_active && !key.uses_clip_distance) {
297      if (intel->gen < 6) {
298         key.nr_userclip_plane_consts
299            = _mesa_bitcount_64(ctx->Transform.ClipPlanesEnabled);
300         key.userclip_planes_enabled_gen_4_5
301            = ctx->Transform.ClipPlanesEnabled;
302      } else {
303         key.nr_userclip_plane_consts
304            = _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1;
305      }
306   }
307   key.copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
308			ctx->Polygon.BackMode != GL_FILL);
309
310   /* _NEW_LIGHT | _NEW_BUFFERS */
311   key.clamp_vertex_color = ctx->Light._ClampVertexColor;
312
313   /* _NEW_POINT */
314   if (ctx->Point.PointSprite) {
315      for (i = 0; i < 8; i++) {
316	 if (ctx->Point.CoordReplace[i])
317	    key.point_coord_replace |= (1 << i);
318      }
319   }
320
321   /* _NEW_TEXTURE */
322   for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
323      if (prog->TexturesUsed[i])
324	 brw_populate_sampler_prog_key_data(ctx, &key.tex, i);
325   }
326
327   /* BRW_NEW_VERTICES */
328   for (i = 0; i < VERT_ATTRIB_MAX; i++) {
329      if (vp->program.Base.InputsRead & BITFIELD64_BIT(i) &&
330	  brw->vb.inputs[i].glarray->Type == GL_FIXED) {
331	 key.gl_fixed_input_size[i] = brw->vb.inputs[i].glarray->Size;
332      }
333   }
334
335   if (!brw_search_cache(&brw->cache, BRW_VS_PROG,
336			 &key, sizeof(key),
337			 &brw->vs.prog_offset, &brw->vs.prog_data)) {
338      bool success = do_vs_prog(brw, ctx->Shader.CurrentVertexProgram,
339				vp, &key);
340
341      assert(success);
342   }
343   brw->vs.constant_map = ((int8_t *)brw->vs.prog_data +
344			   sizeof(*brw->vs.prog_data));
345}
346
347/* See brw_vs.c:
348 */
349const struct brw_tracked_state brw_vs_prog = {
350   .dirty = {
351      .mesa  = (_NEW_TRANSFORM | _NEW_POLYGON | _NEW_POINT | _NEW_LIGHT |
352		_NEW_BUFFERS),
353      .brw   = (BRW_NEW_VERTEX_PROGRAM |
354		BRW_NEW_VERTICES),
355      .cache = 0
356   },
357   .emit = brw_upload_vs_prog
358};
359
360bool
361brw_vs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
362{
363   struct brw_context *brw = brw_context(ctx);
364   struct brw_vs_prog_key key;
365   uint32_t old_prog_offset = brw->vs.prog_offset;
366   struct brw_vs_prog_data *old_prog_data = brw->vs.prog_data;
367   bool success;
368
369   if (!prog->_LinkedShaders[MESA_SHADER_VERTEX])
370      return true;
371
372   struct gl_vertex_program *vp = (struct gl_vertex_program *)
373      prog->_LinkedShaders[MESA_SHADER_VERTEX]->Program;
374   struct brw_vertex_program *bvp = brw_vertex_program(vp);
375
376   memset(&key, 0, sizeof(key));
377
378   key.program_string_id = bvp->id;
379   key.clamp_vertex_color = true;
380
381   success = do_vs_prog(brw, prog, bvp, &key);
382
383   brw->vs.prog_offset = old_prog_offset;
384   brw->vs.prog_data = old_prog_data;
385
386   return success;
387}
388