1#ifndef _RADEON_CHIPSET_H 2#define _RADEON_CHIPSET_H 3 4/* General chip classes: 5 * r100 includes R100, RV100, RV200, RS100, RS200, RS250. 6 * r200 includes R200, RV250, RV280, RS300. 7 * (RS* denotes IGP) 8 */ 9 10enum { 11#define CHIPSET(id, name, family) PCI_CHIP_##name = id, 12#if defined(RADEON_R100) 13#include "pci_ids/radeon_pci_ids.h" 14#elif defined(RADEON_R200) 15#include "pci_ids/r200_pci_ids.h" 16#endif 17#undef CHIPSET 18}; 19 20enum { 21#if defined(RADEON_R100) 22 CHIP_FAMILY_R100, 23 CHIP_FAMILY_RV100, 24 CHIP_FAMILY_RS100, 25 CHIP_FAMILY_RV200, 26 CHIP_FAMILY_RS200, 27#elif defined(RADEON_R200) 28 CHIP_FAMILY_R200, 29 CHIP_FAMILY_RV250, 30 CHIP_FAMILY_RS300, 31 CHIP_FAMILY_RV280, 32#endif 33 CHIP_FAMILY_LAST 34}; 35 36#define RADEON_CHIPSET_TCL (1 << 0) /* tcl support - any radeon */ 37#define RADEON_CHIPSET_BROKEN_STENCIL (1 << 1) /* r100 stencil bug */ 38#define R200_CHIPSET_YCBCR_BROKEN (1 << 2) /* r200 ycbcr bug */ 39#define RADEON_CHIPSET_DEPTH_ALWAYS_TILED (1 << 3) /* M7 and R200s */ 40 41#endif /* _RADEON_CHIPSET_H */ 42