1663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 2663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*---------------------------------------------------------------*/ 3663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*--- begin guest_mips_defs.h ---*/ 4663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*---------------------------------------------------------------*/ 5663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 6663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/* 7663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng This file is part of Valgrind, a dynamic binary instrumentation 8663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng framework. 9663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 10663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Copyright (C) 2010-2012 RT-RK 11663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng mips-valgrind@rt-rk.com 12663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 13663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng This program is free software; you can redistribute it and/or 14663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng modify it under the terms of the GNU General Public License as 15663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng published by the Free Software Foundation; either version 2 of the 16663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng License, or (at your option) any later version. 17663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 18663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng This program is distributed in the hope that it will be useful, but 19663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng WITHOUT ANY WARRANTY; without even the implied warranty of 20663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 21663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng General Public License for more details. 22663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 23663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng You should have received a copy of the GNU General Public License 24663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng along with this program; if not, write to the Free Software 25663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 26663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 02111-1307, USA. 27663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 28663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng The GNU General Public License is contained in the file COPYING. 29663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng*/ 30663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 31663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/* Only to be used within the guest-mips directory. */ 32663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 33663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng#ifndef __VEX_GUEST_MIPS_DEFS_H 34663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng#define __VEX_GUEST_MIPS_DEFS_H 35663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 36663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*---------------------------------------------------------*/ 37663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*--- mips to IR conversion ---*/ 38663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*---------------------------------------------------------*/ 39663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 40663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/* Convert one MIPS insn to IR. See the type DisOneInstrFn in 41663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng bb_to_IR.h. */ 42663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern DisResult disInstr_MIPS ( IRSB* irbb, 43663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Bool (*resteerOkFn) (void *, Addr64), 44663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Bool resteerCisOk, 45663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng void* callback_opaque, 46663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng UChar* guest_code, 47663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Long delta, 48663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Addr64 guest_IP, 49663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng VexArch guest_arch, 50663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng VexArchInfo* archinfo, 51663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng VexAbiInfo* abiinfo, 52663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Bool host_bigendian ); 53663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 54663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/* Used by the optimiser to specialise calls to helpers. */ 55663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern IRExpr *guest_mips32_spechelper(HChar * function_name, IRExpr ** args, 56663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng IRStmt ** precedingStmts, 57663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Int n_precedingStmts); 58663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 59663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/* Describes to the optimser which part of the guest state require 60663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng precise memory exceptions. This is logically part of the guest 61663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng state description. */ 62663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern Bool guest_mips32_state_requires_precise_mem_exns(Int, Int); 63663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 64663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern VexGuestLayout mips32Guest_layout; 65663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 66663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*---------------------------------------------------------*/ 67663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*--- mips guest helpers ---*/ 68663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*---------------------------------------------------------*/ 69663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 70663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern UInt mips32_dirtyhelper_mfc0(UInt rd, UInt sel); 71663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 72663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern void mips32_dirtyhelper_sync(UInt sync); 73663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 74663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*---------------------------------------------------------*/ 75663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*--- Condition code stuff ---*/ 76663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*---------------------------------------------------------*/ 77663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 78663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/* Defines conditions which we can ask for (MIPS MIPS 2e page A3-6) */ 79663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 80663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengtypedef enum { 81663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondEQ = 0, /* equal : Z=1 */ 82663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondNE = 1, /* not equal : Z=0 */ 83663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 84663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondHS = 2, /* >=u (higher or same) : C=1 */ 85663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondLO = 3, /* <u (lower) : C=0 */ 86663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 87663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondMI = 4, /* minus (negative) : N=1 */ 88663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondPL = 5, /* plus (zero or +ve) : N=0 */ 89663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 90663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondVS = 6, /* overflow : V=1 */ 91663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondVC = 7, /* no overflow : V=0 */ 92663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 93663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondHI = 8, /* >u (higher) : C=1 && Z=0 */ 94663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondLS = 9, /* <=u (lower or same) : C=0 || Z=1 */ 95663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 96663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondGE = 10, /* >=s (signed greater or equal) : N=V */ 97663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondLT = 11, /* <s (signed less than) : N!=V */ 98663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 99663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondGT = 12, /* >s (signed greater) : Z=0 && N=V */ 100663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondLE = 13, /* <=s (signed less or equal) : Z=1 || N!=V */ 101663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 102663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondAL = 14, /* always (unconditional) : 1 */ 103663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MIPSCondNV = 15 /* never (unconditional): : 0 */ 104663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng /* NB: MIPS have deprecated the use of the NV condition code. 105663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng You are now supposed to use MOV R0,R0 as a noop rather than 106663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng MOVNV R0,R0 as was previously recommended. Future processors 107663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng may have the NV condition code reused to do other things. */ 108663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng} MIPSCondcode; 109663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 110663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng#endif /* __VEX_GUEST_MIPS_DEFS_H */ 111663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 112663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*---------------------------------------------------------------*/ 113663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*--- end guest_mips_defs.h ---*/ 114663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/*---------------------------------------------------------------*/ 115