Lines Matching defs:disp
123 void set_mem_opnd(LowOpndMem* mem, int disp, int base, bool isPhysical) {
124 mem->m_disp.value = disp;
138 void set_mem_opnd_scale(LowOpndMem* mem, int base, bool isPhysical, int disp, int index, bool indexPhysical, int scale) {
153 mem->m_disp.value = disp;
274 int disp, int base_reg) {
275 stream = encoder_mem(m, size, disp, base_reg, true, stream);
280 int disp, int base_reg, bool isBasePhysical) {
285 return lower_mem(m, m2, size, disp, regAll);
287 stream = encoder_mem(m, size, disp, base_reg, isBasePhysical, stream);
421 int disp, int base_reg,
425 stream = encoder_moves_mem_to_reg(size, disp, base_reg, true,
429 stream = encoder_movez_mem_to_reg(size, disp, base_reg, true,
433 stream = encoder_mem_reg(m, size, disp, base_reg, true,
443 int disp, int base_reg, bool isBasePhysical,
446 return lower_mem_reg(m, ATOM_NORMAL, size, disp, base_reg, mType, mIndex, reg, type, false);
452 int disp, int base_reg, bool isBasePhysical,
457 return lower_mem_reg(m, m2, size, disp, base_reg, mType, mIndex, regAll, type, false);
459 stream = encoder_mem_reg(m, size, disp, base_reg, isBasePhysical,
468 int disp, int base_reg, bool isBasePhysical,
483 return lower_mem_reg(m, m2, size, disp, baseAll, mType, mIndex, regAll, type, false);
485 stream = encoder_mem_reg(m, size, disp, base_reg, isBasePhysical,
494 int disp, int base_reg, bool isBasePhysical,
503 return lower_mem_reg(m, ATOM_NORMAL, size, disp, baseAll, MemoryAccess_Unknown, -1,
506 stream = encoder_moves_mem_to_reg(size, disp, base_reg, isBasePhysical, reg, isPhysical, stream);
514 int disp, int base_reg, bool isBasePhysical,
523 return lower_mem_reg(m, ATOM_NORMAL, size, disp, baseAll, MemoryAccess_Unknown, -1,
526 stream = encoder_movez_mem_to_reg(size, disp, base_reg, isBasePhysical, reg, isPhysical, stream);
566 LowOpRegMem* lower_mem_scale_reg(Mnemonic m, OpndSize size, int base_reg, int disp, int index_reg,
570 stream = encoder_movzs_mem_disp_scale_reg(m, size, base_reg, true, disp, index_reg, true,
573 if(disp == 0)
577 stream = encoder_mem_disp_scale_reg(m, size, base_reg, true, disp, index_reg, true,
584 int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale,
601 return lower_mem_scale_reg(m, size, baseAll, disp, indexAll, scale, regAll, type);
612 int base_reg, int disp, int index_reg, int scale, LowOpndRegType type) {
613 if(disp == 0)
618 disp, index_reg, true, scale, type, stream);
624 int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale,
635 return lower_reg_mem_scale(m, size, regAll, baseAll, disp, indexAll, scale, type);
646 int disp, int base_reg, MemoryAccessType mType, int mIndex,
648 stream = encoder_reg_mem(m, size, reg, true, disp, base_reg, true, type, stream);
654 int disp, int base_reg, bool isBasePhysical,
656 return lower_reg_mem(m, ATOM_NORMAL, size, reg, disp, base_reg, mType, mIndex, type);
663 int disp, int base_reg, bool isBasePhysical,
672 return lower_reg_mem(m, m2, size, regAll, disp, baseAll, mType, mIndex, type);
674 stream = encoder_reg_mem(m, size, reg, isPhysical, disp, base_reg, isBasePhysical, type, stream);
709 int disp, int base_reg, MemoryAccessType mType, int mIndex,
711 stream = encoder_imm_mem(m, size, imm, disp, base_reg, true, stream);
717 int disp, int base_reg, bool isBasePhysical,
719 return lower_imm_mem(m, ATOM_NORMAL, size, imm, disp, base_reg, mType, mIndex, false);
726 int disp, int base_reg, bool isBasePhysical,
737 return lower_imm_mem(m, m2, size, imm, disp, baseAll, mType, mIndex, chaining);
739 stream = encoder_imm_mem(m, size, imm, disp, base_reg, isBasePhysical, stream);
747 int disp, int base_reg, MemoryAccessType mType, int mIndex) {
748 stream = encoder_fp_mem(m, size, reg, disp, base_reg, true, stream);
753 int disp, int base_reg, bool isBasePhysical,
758 return lower_fp_mem(m, size, reg, disp, baseAll, mType, mIndex);
760 stream = encoder_fp_mem(m, size, reg, disp, base_reg, isBasePhysical, stream);
767 LowOpRegMem* lower_mem_fp(Mnemonic m, OpndSize size, int disp, int base_reg,
769 stream = encoder_mem_fp(m, size, disp, base_reg, true, reg, stream);
774 int disp, int base_reg, bool isBasePhysical,
780 return lower_mem_fp(m, size, disp, baseAll, mType, mIndex, reg);
782 stream = encoder_mem_fp(m, size, disp, base_reg, isBasePhysical, reg, stream);
796 void load_effective_addr(int disp, int base_reg, bool isBasePhysical,
799 dump_mem_reg(m, ATOM_NORMAL, OpndSize_32, disp, base_reg, isBasePhysical,
810 base_reg, isBasePhysical, 0/*disp*/, index_reg, isIndexPhysical, scale,
816 void load_fpu_cw(int disp, int base_reg, bool isBasePhysical) {
818 dump_mem(m, ATOM_NORMAL, OpndSize_16, disp, base_reg, isBasePhysical);
823 void store_fpu_cw(bool checkException, int disp, int base_reg, bool isBasePhysical) {
826 dump_mem(m, ATOM_NORMAL, OpndSize_16, disp, base_reg, isBasePhysical);
839 void load_fp_stack(LowOp* op, OpndSize size, int disp, int base_reg, bool isBasePhysical) {//fld(s|l)
841 dump_mem_fp(m, size, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, 0); //ST0
846 void load_int_fp_stack(OpndSize size, int disp, int base_reg, bool isBasePhysical) {//fild(ll|l)
848 dump_mem_fp(m, size, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, 0); //ST0
859 void store_fp_stack(LowOp* op, bool pop, OpndSize size, int disp, int base_reg, bool isBasePhysical) {//fst(p)(s|l)
861 dump_fp_mem(m, size, 0, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1);
866 void store_int_fp_stack(LowOp* op, bool pop, OpndSize size, int disp, int base_reg, bool isBasePhysical) {//fist(p)(l)
868 dump_fp_mem(m, size, 0, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1);
874 int disp, int base_reg, bool isBasePhysical) {
876 dump_reg_mem(m, ATOM_NORMAL, size, reg, isPhysical, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, getTypeFromIntSize(size));
882 int disp, int base_reg, bool isBasePhysical,
885 dump_mem_reg(m, ATOM_NORMAL, size, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, reg, isPhysical, getTypeFromIntSize(size));
1099 int disp, int base_reg, bool isBasePhysical) {
1101 dump_imm_mem(m, ATOM_NORMAL, size, imm, disp,
1145 void compare_ss_mem_reg(LowOp* op, int disp, int base_reg, bool isBasePhysical,
1148 dump_mem_reg(m, ATOM_NORMAL, OpndSize_32, disp, base_reg, isBasePhysical,
1162 void compare_sd_mem_with_reg(LowOp* op, int disp, int base_reg, bool isBasePhysical,
1165 dump_mem_reg(m, ATOM_NORMAL, OpndSize_64, disp, base_reg, isBasePhysical,
1206 void test_imm_mem(OpndSize size, int imm, int disp, int reg, bool isPhysical) {
1207 dump_imm_mem(Mnemonic_TEST, ATOM_NORMAL, size, imm, disp, reg, isPhysical, MemoryAccess_Unknown, -1, false);
1223 void alu_unary_mem(LowOp* op, OpndSize size, ALU_Opcode opc, int disp, int base_reg, bool isBasePhysical) {
1229 dump_mem(m, ATOM_NORMAL_ALU, size, disp, base_reg, isBasePhysical);
1234 void alu_binary_imm_mem(OpndSize size, ALU_Opcode opc, int imm, int disp, int base_reg, bool isBasePhysical) {
1240 dump_imm_mem(m, ATOM_NORMAL_ALU, size, imm, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, false);
1257 int disp, int base_reg, bool isBasePhysical,
1264 dump_mem_reg(m, ATOM_NORMAL_ALU, size, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, reg, isPhysical, getTypeFromIntSize(size));
1384 int disp, int base_reg, bool isBasePhysical) { //destination is mem!!
1390 dump_reg_mem(m, ATOM_NORMAL_ALU, size, reg, isPhysical, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, getTypeFromIntSize(size));
1395 void fpu_mem(LowOp* op, ALU_Opcode opc, OpndSize size, int disp, int base_reg, bool isBasePhysical) {
1397 dump_mem_fp(m, size, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, 0);
1424 void push_mem_to_stack(OpndSize size, int disp, int base_reg, bool isBasePhysical) {
1425 dump_mem(Mnemonic_PUSH, ATOM_NORMAL, size, disp, base_reg, isBasePhysical);
1432 int disp, int base_reg, bool isBasePhysical) {
1434 dump_reg_mem(m, ATOM_NORMAL, size, reg, isPhysical, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, getTypeFromIntSize(size));
1441 int disp, int base_reg, bool isBasePhysical,
1444 dump_reg_mem_noalloc(m, size, reg, isPhysical, disp, base_reg, isBasePhysical, mType, mIndex, getTypeFromIntSize(size));
1450 int disp, int base_reg, bool isBasePhysical,
1453 return dump_mem_reg(m, ATOM_NORMAL, size, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, reg, isPhysical, getTypeFromIntSize(size));
1459 int disp, int base_reg, bool isBasePhysical,
1463 return dump_mem_reg_noalloc(m, size, disp, base_reg, isBasePhysical, mType, mIndex, reg, isPhysical, getTypeFromIntSize(size));
1468 LowOpRegMem* move_ss_mem_to_reg_noalloc(int disp, int base_reg, bool isBasePhysical,
1471 return dump_mem_reg_noalloc(Mnemonic_MOVSS, OpndSize_32, disp, base_reg, isBasePhysical, mType, mIndex, reg, isPhysical, LowOpndRegType_xmm);
1477 int disp, int base_reg, bool isBasePhysical,
1479 return dump_reg_mem_noalloc(Mnemonic_MOVSS, OpndSize_32, reg, isPhysical, disp, base_reg, isBasePhysical, mType, mIndex, LowOpndRegType_xmm);
1485 int disp, int base_reg, bool isBasePhysical,
1488 dump_movez_mem_reg(m, size, disp, base_reg, isBasePhysical, reg, isPhysical);
1503 int disp, int index_reg, bool isIndexPhysical, int scale,
1506 disp, index_reg, isIndexPhysical, scale,
1511 int disp, int index_reg, bool isIndexPhysical, int scale,
1514 disp, index_reg, isIndexPhysical, scale,
1522 int disp, int base_reg, bool isBasePhysical,
1525 dump_moves_mem_reg(m, size, disp, base_reg, isBasePhysical, reg, isPhysical);
1552 dump_mem_scale_reg(m, size, base_reg, isBasePhysical, 0/*disp*/, index_reg, isIndexPhysical, scale,
1556 int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale,
1559 dump_mem_scale_reg(m, size, base_reg, isBasePhysical, disp, index_reg, isIndexPhysical, scale,
1570 base_reg, isBasePhysical, 0/*disp*/, index_reg, isIndexPhysical, scale,
1575 int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale) {
1578 base_reg, isBasePhysical, disp, index_reg, isIndexPhysical, scale,
1583 int disp, int base_reg, bool isBasePhysical) {
1584 dump_imm_mem(Mnemonic_MOV, ATOM_NORMAL, size, imm, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, true);
1591 int disp, int base_reg, bool isBasePhysical) {
1594 dump_imm_mem(Mnemonic_MOV, ATOM_NORMAL, size, imm, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, false);
1670 void move_ss_mem_to_reg(LowOp* op, int disp, int base_reg, bool isBasePhysical,
1672 dump_mem_reg(Mnemonic_MOVSS, ATOM_NORMAL, OpndSize_32, disp, base_reg, isBasePhysical,
1679 int disp, int base_reg, bool isBasePhysical) {
1680 dump_reg_mem(Mnemonic_MOVSS, ATOM_NORMAL, OpndSize_32, reg, isPhysical, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, LowOpndRegType_xmm);
1685 void move_sd_mem_to_reg(int disp, int base_reg, bool isBasePhysical,
1687 dump_mem_reg(Mnemonic_MOVSD, ATOM_NORMAL, OpndSize_64, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, reg, isPhysical, LowOpndRegType_xmm);
1693 int disp, int base_reg, bool isBasePhysical) {
1695 disp, base_reg, isBasePhysical,