Cross Reference: /dalvik/vm/compiler/codegen/x86/LowerHelper.cpp

Lines Matching defs:imm
226 LowOpImm* dump_special(AtomOpCode cc, int imm) {
232     op->immOpnd.value = imm;
233     //stream = encoder_imm(m, size, imm, stream);
237 LowOpLabel* lower_label(Mnemonic m, OpndSize size, int imm, const char* label, bool isLocal) {
238     stream = encoder_imm(m, size, imm, stream);
242 LowOpLabel* dump_label(Mnemonic m, OpndSize size, int imm,
244     return lower_label(m, size, imm, label, isLocal);
247 LowOpNCG* dump_ncg(Mnemonic m, OpndSize size, int imm) {
248     stream = encoder_imm(m, size, imm, stream);
255 LowOpImm* lower_imm(Mnemonic m, OpndSize size, int imm, bool updateTable) {
256     stream = encoder_imm(m, size, imm, stream);
260 LowOpImm* dump_imm(Mnemonic m, OpndSize size, int imm) {
261     return lower_imm(m, size, imm, true);
265                int imm, char* codePtr) {
266     encoder_imm(m, size, imm, codePtr);
682                  int imm, int reg, LowOpndRegType type, bool chaining) {
683     stream = encoder_imm_reg(m, size, imm, reg, true, type, stream);
688                            int imm, int reg, bool isPhysical, LowOpndRegType type) {
689     return lower_imm_reg(m, ATOM_NORMAL, size, imm, reg, type, false);
695                    int imm, int reg, bool isPhysical, LowOpndRegType type, bool chaining) {
699         return lower_imm_reg(m, m2, size, imm, regAll, type, chaining);
701         stream = encoder_imm_reg(m, size, imm, reg, isPhysical, type, stream);
708 LowOpMemImm* lower_imm_mem(Mnemonic m, AtomOpCode m2, OpndSize size, int imm,
711     stream = encoder_imm_mem(m, size, imm, disp, base_reg, true, stream);
716                            int imm,
719     return lower_imm_mem(m, ATOM_NORMAL, size, imm, disp, base_reg, mType, mIndex, false);
725                    int imm,
737         return lower_imm_mem(m, m2, size, imm, disp, baseAll, mType, mIndex, chaining);
739         stream = encoder_imm_mem(m, size, imm, disp, base_reg, isBasePhysical, stream);
853 void load_int_fp_stack_imm(OpndSize size, int imm) {//fild(ll|l)
854     return load_int_fp_stack(size, imm, PhysicalReg_Null, true);
1075 //! cmp imm reg
1078 void compare_imm_reg(OpndSize size, int imm,
1080     if(imm == 0) {
1093     dump_imm_reg(m, ATOM_NORMAL, size, imm, reg, isPhysical, getTypeFromIntSize(size), false);
1095 //! cmp imm mem
1098 void compare_imm_mem(OpndSize size, int imm,
1101     dump_imm_mem(m, ATOM_NORMAL, size, imm, disp,
1104 //! cmp imm VR
1107 void compare_imm_VR(OpndSize size, int imm,
1119             dump_imm_reg_noalloc(m, size, imm, regAll, true, LowOpndRegType_gp);
1121             dump_imm_mem_noalloc(m, size, imm, 4*vA, PhysicalReg_FP, true,
1125         dump_imm_mem(m, ATOM_NORMAL, size, imm, 4*vA, PhysicalReg_FP, true, MemoryAccess_VR, vA, false);
1197 //!test imm reg
1200 void test_imm_reg(OpndSize size, int imm, int reg, bool isPhysical) {
1201     dump_imm_reg(Mnemonic_TEST, ATOM_NORMAL, size, imm, reg, isPhysical, getTypeFromIntSize(size), false);
1203 //!test imm mem
1206 void test_imm_mem(OpndSize size, int imm, int disp, int reg, bool isPhysical) {
1207     dump_imm_mem(Mnemonic_TEST, ATOM_NORMAL, size, imm, disp, reg, isPhysical, MemoryAccess_Unknown, -1, false);
1234 void alu_binary_imm_mem(OpndSize size, ALU_Opcode opc, int imm, int disp, int base_reg, bool isBasePhysical) {
1240     dump_imm_mem(m, ATOM_NORMAL_ALU, size, imm, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, false);
1245 void alu_binary_imm_reg(OpndSize size, ALU_Opcode opc, int imm, int reg, bool isPhysical) {
1251     dump_imm_reg(m, ATOM_NORMAL_ALU, size, imm, reg, isPhysical, getTypeFromIntSize(size), false);
1582 void move_chain_to_mem(OpndSize size, int imm,
1584     dump_imm_mem(Mnemonic_MOV, ATOM_NORMAL, size, imm, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, true);
1590 void move_imm_to_mem(OpndSize size, int imm,
1594     dump_imm_mem(Mnemonic_MOV, ATOM_NORMAL, size, imm, disp, base_reg, isBasePhysical, MemoryAccess_Unknown, -1, false);
1599 void set_VR_to_imm(u2 vA, OpndSize size, int imm) {
1606             dump_imm_reg_noalloc(m, size, imm, regAll, true, LowOpndRegType_gp);
1615             dump_imm_mem_noalloc(m, size, imm, 4*vA, PhysicalReg_FP, true, MemoryAccess_VR, vA);
1618         dump_imm_reg_noalloc(m, size, imm, regAll, true, LowOpndRegType_gp);
1622         dump_imm_mem(m, ATOM_NORMAL, size, imm, 4*vA, PhysicalReg_FP, true, MemoryAccess_VR, vA, false);
1625 void set_VR_to_imm_noupdateref(LowOp* op, u2 vA, OpndSize size, int imm) {
1631 void set_VR_to_imm_noalloc(u2 vA, OpndSize size, int imm) {
1635     dump_imm_mem_noalloc(m, size, imm, 4*vA, PhysicalReg_FP, true, MemoryAccess_VR, vA);
1638 void move_chain_to_reg(OpndSize size, int imm, int reg, bool isPhysical) {
1639     dump_imm_reg(Mnemonic_MOV, ATOM_NORMAL, size, imm, reg, isPhysical, LowOpndRegType_gp, true);
1645 void move_imm_to_reg(OpndSize size, int imm, int reg, bool isPhysical) {
1649     dump_imm_reg(m, ATOM_NORMAL, size, imm, reg, isPhysical, LowOpndRegType_gp, false);
1654 void move_imm_to_reg_noalloc(OpndSize size, int imm, int reg, bool isPhysical) {
1658     dump_imm_reg_noalloc(m, size, imm, reg, isPhysical, LowOpndRegType_gp);