Cross Reference: /external/llvm/lib/CodeGen/RegAllocFast.cpp

Lines Matching refs:MO
216 /// isLastUseOfLocalReg - Return true if MO is the only remaining reference to
219 bool RAFast::isLastUseOfLocalReg(MachineOperand &MO) {
222   if (StackSlotForVirtReg[MO.getReg()] != -1)
225   // Check that the use/def chain has exactly one operand - MO.
226   MachineRegisterInfo::reg_nodbg_iterator I = MRI->reg_nodbg_begin(MO.getReg());
227   if (&I.getOperand() != &MO)
235   MachineOperand &MO = LR.LastUse->getOperand(LR.LastOpNum);
236   if (MO.isUse() && !LR.LastUse->isRegTiedToDefOperand(LR.LastOpNum)) {
237     if (MO.getReg() == LR.PhysReg)
238       MO.setIsKill();
343 /// This may add implicit kills to MO->getParent() and invalidate MO.
344 void RAFast::usePhysReg(MachineOperand &MO) {
345   unsigned PhysReg = MO.getReg();
356     MO.setIsKill();
375       MO.getParent()->addRegisterKilled(Alias, TRI, true);
380         MO.getParent()->addRegisterKilled(Alias, TRI, true);
393   MO.setIsKill();
619   MachineOperand &MO = MI->getOperand(OpNum);
629     if (isLastUseOfLocalReg(MO)) {
630       DEBUG(dbgs() << "Killing last use: " << MO << "\n");
631       if (MO.isUse())
632         MO.setIsKill();
634         MO.setIsDead();
635     } else if (MO.isKill()) {
636       DEBUG(dbgs() << "Clearing dubious kill: " << MO << "\n");
637       MO.setIsKill(false);
638     } else if (MO.isDead()) {
639       DEBUG(dbgs() << "Clearing dubious dead: " << MO << "\n");
640       MO.setIsDead(false);
642   } else if (MO.isKill()) {
647     DEBUG(dbgs() << "Clearing clean kill: " << MO << "\n");
648     MO.setIsKill(false);
649   } else if (MO.isDead()) {
650     DEBUG(dbgs() << "Clearing clean dead: " << MO << "\n");
651     MO.setIsDead(false);
664   MachineOperand &MO = MI->getOperand(OpNum);
665   bool Dead = MO.isDead();
666   if (!MO.getSubReg()) {
667     MO.setReg(PhysReg);
668     return MO.isKill() || Dead;
672   MO.setReg(PhysReg ? TRI->getSubReg(PhysReg, MO.getSubReg()) : 0);
673   MO.setSubReg(0);
677   if (MO.isKill()) {
684   if (MO.isDef() && MO.isUndef())
697     MachineOperand &MO = MI->getOperand(i);
698     if (!MO.isReg()) continue;
699     unsigned Reg = MO.getReg();
702     if (MO.isEarlyClobber() || MI->isRegTiedToDefOperand(i) ||
703         (MO.getSubReg() && MI->readsVirtualRegister(Reg))) {
713     MachineOperand &MO = MI->getOperand(i);
714     if (!MO.isReg() || !MO.isDef()) continue;
715     unsigned Reg = MO.getReg();
727     MachineOperand &MO = MI->getOperand(i);
728     if (!MO.isReg()) continue;
729     unsigned Reg = MO.getReg();
731     if (MO.isUse()) {
734       DEBUG(dbgs() << "Operand " << i << "("<< MO << ") is tied to operand "
741     } else if (MO.getSubReg() && MI->readsVirtualRegister(Reg)) {
742       DEBUG(dbgs() << "Partial redefine: " << MO << "\n");
752     MachineOperand &MO = MI->getOperand(i);
753     if (!MO.isReg()) continue;
754     unsigned Reg = MO.getReg();
756     if (!MO.isEarlyClobber())
758     // Note: defineVirtReg may invalidate MO.
768     MachineOperand &MO = MI->getOperand(i);
769     if (!MO.isReg() || (MO.isDef() && !MO.isEarlyClobber())) continue;
770     unsigned Reg = MO.getReg();
843           MachineOperand &MO = MI->getOperand(i);
844           if (!MO.isReg()) continue;
845           unsigned Reg = MO.getReg();
855               MO.setReg(0);
904       MachineOperand &MO = MI->getOperand(i);
906       if (MO.isRegMask()) {
907         MRI->addPhysRegsUsedFromRegMask(MO.getRegMask());
910       if (!MO.isReg()) continue;
911       unsigned Reg = MO.getReg();
915         if (MO.isUse()) {
919           if (MO.isEarlyClobber())
921           if (MO.getSubReg() && MI->readsVirtualRegister(Reg))
927       if (MO.isUse()) {
928         usePhysReg(MO);
929       } else if (MO.isEarlyClobber()) {
930         definePhysReg(MI, Reg, (MO.isImplicit() || MO.isDead()) ?
959       MachineOperand &MO = MI->getOperand(i);
960       if (!MO.isReg()) continue;
961       unsigned Reg = MO.getReg();
963       if (MO.isUse()) {
981         MachineOperand &MO = MI->getOperand(i);
982         if (!MO.isReg()) continue;
983         unsigned Reg = MO.getReg();
986         if (!MO.isDef() && !MI->isRegTiedToDefOperand(i)) continue;
1009       MachineOperand &MO = MI->getOperand(i);
1010       if (!MO.isReg() || !MO.isDef() || !MO.getReg() || MO.isEarlyClobber())
1012       unsigned Reg = MO.getReg();
1016         definePhysReg(MI, Reg, (MO.isImplicit() || MO.isDead()) ?