Lines Matching refs:Op
54 SDValue LegalizeOp(SDValue Op);
56 SDValue TranslateLegalizeResults(SDValue Op, SDValue Result);
58 SDValue UnrollVSETCC(SDValue Op);
63 SDValue ExpandUINT_TO_FLOAT(SDValue Op);
65 SDValue ExpandSEXTINREG(SDValue Op);
68 SDValue ExpandVSELECT(SDValue Op);
69 SDValue ExpandSELECT(SDValue Op);
70 SDValue ExpandLoad(SDValue Op);
71 SDValue ExpandStore(SDValue Op);
72 SDValue ExpandFNEG(SDValue Op);
76 SDValue PromoteVectorOp(SDValue Op);
79 SDValue PromoteVectorOpINT_TO_FP(SDValue Op);
131 SDValue VectorLegalizer::TranslateLegalizeResults(SDValue Op, SDValue Result) {
133 for (unsigned i = 0, e = Op.getNode()->getNumValues(); i != e; ++i)
134 AddLegalizedOperand(Op.getValue(i), Result.getValue(i));
135 return Result.getValue(Op.getResNo());
138 SDValue VectorLegalizer::LegalizeOp(SDValue Op) {
141 DenseMap<SDValue, SDValue>::iterator I = LegalizedNodes.find(Op);
144 SDNode* Node = Op.getNode();
152 SDValue(DAG.UpdateNodeOperands(Op.getNode(), Ops.data(), Ops.size()), 0);
154 if (Op.getOpcode() == ISD::LOAD) {
155 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode());
159 return TranslateLegalizeResults(Op, Result);
161 return LegalizeOp(ExpandLoad(Op));
163 } else if (Op.getOpcode() == ISD::STORE) {
164 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode());
171 return TranslateLegalizeResults(Op, Result);
177 return LegalizeOp(ExpandStore(Op));
187 return TranslateLegalizeResults(Op, Result);
190 switch (Op.getOpcode()) {
192 return TranslateLegalizeResults(Op, Result);
262 switch (Op.getOpcode()) {
265 Result = PromoteVectorOp(Op);
271 Result = PromoteVectorOpINT_TO_FP(Op);
278 SDValue Tmp1 = TLI.LowerOperation(Op, DAG);
287 Result = ExpandSEXTINREG(Op);
289 Result = ExpandVSELECT(Op);
291 Result = ExpandSELECT(Op);
293 Result = ExpandUINT_TO_FLOAT(Op);
295 Result = ExpandFNEG(Op);
297 Result = UnrollVSETCC(Op);
299 Result = DAG.UnrollVectorOp(Op.getNode());
304 if (Result != Op) {
311 AddLegalizedOperand(Op, Result);
315 SDValue VectorLegalizer::PromoteVectorOp(SDValue Op) {
319 MVT VT = Op.getSimpleValueType();
320 assert(Op.getNode()->getNumValues() == 1 &&
322 MVT NVT = TLI.getTypeToPromoteTo(Op.getOpcode(), VT);
323 SDLoc dl(Op);
324 SmallVector<SDValue, 4> Operands(Op.getNumOperands());
326 for (unsigned j = 0; j != Op.getNumOperands(); ++j) {
327 if (Op.getOperand(j).getValueType().isVector())
328 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j));
330 Operands[j] = Op.getOperand(j);
333 Op = DAG.getNode(Op.getOpcode(), dl, NVT, &Operands[0], Operands.size());
335 return DAG.getNode(ISD::BITCAST, dl, VT, Op);
338 SDValue VectorLegalizer::PromoteVectorOpINT_TO_FP(SDValue Op) {
341 EVT VT = Op.getOperand(0).getValueType();
342 assert(Op.getNode()->getNumValues() == 1 &&
360 SDLoc dl(Op);
361 SmallVector<SDValue, 4> Operands(Op.getNumOperands());
363 unsigned Opc = Op.getOpcode() == ISD::UINT_TO_FP ? ISD::ZERO_EXTEND :
365 for (unsigned j = 0; j != Op.getNumOperands(); ++j) {
366 if (Op.getOperand(j).getValueType().isVector())
367 Operands[j] = DAG.getNode(Opc, dl, NVT, Op.getOperand(j));
369 Operands[j] = Op.getOperand(j);
372 return DAG.getNode(Op.getOpcode(), dl, Op.getValueType(), &Operands[0],
377 SDValue VectorLegalizer::ExpandLoad(SDValue Op) {
378 SDLoc dl(Op);
379 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode());
390 EVT DstEltVT = Op.getNode()->getValueType(0).getScalarType();
496 Op.getNode()->getValueType(0).getScalarType(),
513 Op.getNode()->getValueType(0), &Vals[0], Vals.size());
515 AddLegalizedOperand(Op.getValue(0), Value);
516 AddLegalizedOperand(Op.getValue(1), NewChain);
518 return (Op.getResNo() ? NewChain : Value);
521 SDValue VectorLegalizer::ExpandStore(SDValue Op) {
522 SDLoc dl(Op);
523 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode());
568 AddLegalizedOperand(Op, TF);
572 SDValue VectorLegalizer::ExpandSELECT(SDValue Op) {
576 EVT VT = Op.getValueType();
577 SDLoc DL(Op);
579 SDValue Mask = Op.getOperand(0);
580 SDValue Op1 = Op.getOperand(1);
581 SDValue Op2 = Op.getOperand(2);
597 return DAG.UnrollVectorOp(Op.getNode());
629 return DAG.getNode(ISD::BITCAST, DL, Op.getValueType(), Val);
632 SDValue VectorLegalizer::ExpandSEXTINREG(SDValue Op) {
633 EVT VT = Op.getValueType();
638 return DAG.UnrollVectorOp(Op.getNode());
640 SDLoc DL(Op);
641 EVT OrigTy = cast<VTSDNode>(Op->getOperand(1))->getVT();
647 Op = Op.getOperand(0);
648 Op = DAG.getNode(ISD::SHL, DL, VT, Op, ShiftSz);
649 return DAG.getNode(ISD::SRA, DL, VT, Op, ShiftSz);
652 SDValue VectorLegalizer::ExpandVSELECT(SDValue Op) {
655 SDLoc DL(Op);
657 SDValue Mask = Op.getOperand(0);
658 SDValue Op1 = Op.getOperand(1);
659 SDValue Op2 = Op.getOperand(2);
675 return DAG.UnrollVectorOp(Op.getNode());
681 return DAG.UnrollVectorOp(Op.getNode());
696 return DAG.getNode(ISD::BITCAST, DL, Op.getValueType(), Val);
699 SDValue VectorLegalizer::ExpandUINT_TO_FLOAT(SDValue Op) {
700 EVT VT = Op.getOperand(0).getValueType();
701 SDLoc DL(Op);
706 return DAG.UnrollVectorOp(Op.getNode());
722 SDValue TWOHW = DAG.getConstantFP((1<<(BW/2)), Op.getValueType());
725 SDValue HI = DAG.getNode(ISD::SRL, DL, VT, Op.getOperand(0), HalfWord);
726 SDValue LO = DAG.getNode(ISD::AND, DL, VT, Op.getOperand(0), HalfWordMask);
730 SDValue fHI = DAG.getNode(ISD::SINT_TO_FP, DL, Op.getValueType(), HI);
731 fHI = DAG.getNode(ISD::FMUL, DL, Op.getValueType(), fHI, TWOHW);
732 SDValue fLO = DAG.getNode(ISD::SINT_TO_FP, DL, Op.getValueType(), LO);
735 return DAG.getNode(ISD::FADD, DL, Op.getValueType(), fHI, fLO);
739 SDValue VectorLegalizer::ExpandFNEG(SDValue Op) {
740 if (TLI.isOperationLegalOrCustom(ISD::FSUB, Op.getValueType())) {
741 SDValue Zero = DAG.getConstantFP(-0.0, Op.getValueType());
742 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType(),
743 Zero, Op.getOperand(0));
745 return DAG.UnrollVectorOp(Op.getNode());
748 SDValue VectorLegalizer::UnrollVSETCC(SDValue Op) {
749 EVT VT = Op.getValueType();
752 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1), CC = Op.getOperand(2);
754 SDLoc dl(Op);