Cross Reference: /external/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines Matching defs:Outs

1063                                    const SmallVectorImpl<ISD::OutputArg> &Outs,
1074   CCInfo.AnalyzeReturn(Outs, CCAssignFnForNode(CallConv));
1139   SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs;
1152   bool IsStructRet = !Outs.empty() && Outs[0].Flags.isSRet();
1158                                                    Outs, OutVals, Ins, DAG);
1169   CCInfo.AnalyzeCallOperands(Outs, CCAssignFnForNode(CallConv));
1215     ISD::ArgFlagsTy Flags = Outs[i].Flags;
1449                                     const SmallVectorImpl<ISD::OutputArg> &Outs,
1488   if (IsVarArg && !Outs.empty()) {
1499     CCInfo.AnalyzeCallOperands(Outs, CCAssignFnForNode(CalleeCC));
1536   if (Outs.empty())
1543   CCInfo.AnalyzeCallOperands(Outs, CCAssignFnForNode(CalleeCC));