Searched defs:RegUnit (Results 1 - 4 of 4) sorted by relevance

/external/llvm/lib/CodeGen/
H A DLiveRegMatrix.cpp129 unsigned RegUnit) {
130 LiveIntervalUnion::Query &Q = Queries[RegUnit];
131 Q.init(UserTag, &VirtReg, &Matrix[RegUnit]);
128 query(LiveInterval &VirtReg, unsigned RegUnit) argument
/external/llvm/include/llvm/CodeGen/
H A DMachineRegisterInfo.h394 void setRegUnitUsed(unsigned RegUnit) { argument
395 UsedRegUnits.set(RegUnit);
/external/llvm/include/llvm/MC/
H A DMCRegisterInfo.h528 MCRegUnitRootIterator(unsigned RegUnit, const MCRegisterInfo *MCRI) { argument
529 assert(RegUnit < MCRI->getNumRegUnits() && "Invalid register unit");
530 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
531 Reg1 = MCRI->RegUnitRoots[RegUnit][1];
/external/llvm/utils/TableGen/
H A DCodeGenRegisters.h407 struct RegUnit { struct in namespace:llvm
408 // Weight assigned to this RegUnit for estimating register pressure.
413 // Each native RegUnit corresponds to one or two root registers. The full
422 RegUnit() : Weight(0), RegClassUnitSetsIdx(0) { Roots[0] = Roots[1] = 0; } function in struct:llvm::RegUnit
470 SmallVector<RegUnit, 8> RegUnits;
484 // class's units and any inferred RegUnit supersets.
606 RegUnit &getRegUnit(unsigned RUID) { return RegUnits[RUID]; }
607 const RegUnit &getRegUnit(unsigned RUID) const { return RegUnits[RUID]; }

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