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Searched defs:Rt (Results 1 - 5 of 5) sorted by relevance

/external/eigen/Eigen/src/Geometry/
H A D	Umeyama.h	135 TransformationMatrixType Rt = TransformationMatrixType::Identity(m+1,m+1); local 146 Rt.block(0,0,m,m).noalias() = svd.matrixU()svd.matrixV().transpose(); 149 Rt.block(0,0,m,m).noalias() = svd.matrixU() S.asDiagonal() * svd.matrixV().transpose(); 153 Rt.block(0,0,m,m).noalias() = svd.matrixU() * S.asDiagonal() * svd.matrixV().transpose(); 162 Rt.col(m).head(m) = dst_mean; 163 Rt.col(m).head(m).noalias() -= cRt.topLeftCorner(m,m)src_mean; 165 if (with_scaling) Rt.block(0,0,m,m) *= c; 167 return Rt;
/external/llvm/lib/Target/AArch64/Disassembler/
H A D	AArch64Disassembler.cpp	592 unsigned Rt = fieldFromInstruction(Insn, 0, 5); local 606 // Rn_wb, Rt, Rt2, Rn, Imm 611 if (L && Rt == Rt2) 616 if (Indexed && V == 0 && Rn != 31 && (Rt == Rn \|\| Rt2 == Rn)) 627 DecodeFPR32RegisterClass(Inst, Rt, Address, Decoder); 631 DecodeFPR64RegisterClass(Inst, Rt, Address, Decoder); 635 DecodeFPR128RegisterClass(Inst, Rt, Address, Decoder); 643 DecodeGPR32RegisterClass(Inst, Rt, Address, Decoder); 648 DecodeGPR64RegisterClass(Inst, Rt, Address, Decoder); 652 DecodeGPR64RegisterClass(Inst, Rt, Addres 675 unsigned Rt = fieldFromInstruction(Val, 0, 5); local 755 unsigned Rt = fieldFromInstruction(Insn, 0, 5); local [all...]
/external/llvm/lib/Target/ARM/
H A D	ARMBaseInstrInfo.cpp	2436 unsigned Rt = MI->getOperand(0).getReg(); local 2438 return (Rt == Rm) ? 4 : 3; 2443 unsigned Rt = MI->getOperand(0).getReg(); local 2445 if (Rt == Rm) 2473 unsigned Rt = MI->getOperand(0).getReg(); local 2477 if (Rt == Rm) 2486 unsigned Rt = MI->getOperand(0).getReg(); local 2488 return (Rt == Rm) ? 3 : 2; 2509 unsigned Rt = MI->getOperand(0).getReg(); local 2510 if (Rt 2524 unsigned Rt = MI->getOperand(0).getReg(); local 2548 unsigned Rt = MI->getOperand(0).getReg(); local 2557 unsigned Rt = MI->getOperand(0).getReg(); local 2593 unsigned Rt = MI->getOperand(0).getReg(); local [all...]
/external/llvm/lib/Target/ARM/Disassembler/
H A D	ARMDisassembler.cpp	1445 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 1453 // On stores, the writeback operand precedes Rt. 1470 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) 1473 // On loads, the writeback operand comes after Rt. 1504 if (writeback && (Rn == 15 \|\| Rn == Rt)) 1593 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 1602 unsigned Rt2 = Rt + 1; 1606 // For {LD,ST}RD, Rt must be even, else undefined. 1614 if (Rt & 0x1) S = MCDisassembler::SoftFail; 1626 if (writeback && (Rn == 15 \|\| Rn == Rt \|\| R 3238 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 3310 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 3374 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 3439 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 3477 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 3625 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 3952 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 3974 unsigned Rt = fieldFromInstruction(Insn, 0, 4); local 3999 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4024 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4052 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4077 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4651 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4677 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4724 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4761 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4819 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4918 unsigned Rt = fieldFromInstruction(Val, 12, 4); local 4948 unsigned Rt = fieldFromInstruction(Val, 12, 4); local [all...]
/external/llvm/lib/Target/ARM/AsmParser/
H A D	ARMAsmParser.cpp	`5130 unsigned Rt = MRI->getEncodingValue(Reg1); local 5133 // Rt2 must be Rt + 1 and Rt must be even. 5134 if (Rt + 1 != Rt2 \|\| (Rt & 1)) { 5258 // Rt2 must be Rt + 1. 5259 unsigned Rt = MRI->getEncodingValue(Inst.getOperand(0).getReg()); local 5261 if (Rt2 != Rt + 1) 5267 // Rt2 must be Rt + 1. 5268 unsigned Rt local 5278 unsigned Rt = MRI->getEncodingValue(Inst.getOperand(1).getReg()); local [all...]`

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