/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | AMDILCFGStructurizer.cpp | 400 PassT *passRep; member in class:llvmCFGStruct::CFGStructurizer 424 passRep = &pass; 513 passRep = &pass; 1348 CFGTraits::insertAssignInstrBefore(headBlk, passRep, initReg, initVal); 1377 (landBlk, CFGTraits::insertInstrBefore(landBlk, AMDGPU::ENDIF, passRep)); 1382 CFGTraits::insertAssignInstrBefore(insertPos, passRep, immReg, 2); 1386 CFGTraits::insertCompareInstrBefore(landBlk, insertPos, passRep, cmpResReg, 1389 AMDGPU::IF_LOGICALZ_i32, passRep, 1394 passRep, initReg, DebugLoc()); 1401 CFGTraits::insertAssignInstrBefore(trueBlk, passRep, initRe 3006 insertInstrBefore(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep) argument 3011 insertInstrBefore(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep, DebugLoc DL) argument 3029 insertInstrEnd(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep) argument 3034 insertInstrEnd(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep, DebugLoc DL) argument 3046 insertInstrBefore(MachineBasicBlock::iterator instrPos, int newOpcode, AMDGPUCFGStructurizer *passRep) argument 3063 insertCondBranchBefore(MachineBasicBlock::iterator instrPos, int newOpcode, AMDGPUCFGStructurizer *passRep, DebugLoc DL) argument 3082 insertCondBranchBefore(MachineBasicBlock *blk, MachineBasicBlock::iterator insertPos, int newOpcode, AMDGPUCFGStructurizer *passRep, RegiT regNum, DebugLoc DL) argument 3100 insertCondBranchEnd(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep, RegiT regNum) argument 3115 insertAssignInstrBefore(MachineBasicBlock::iterator instrPos, AMDGPUCFGStructurizer *passRep, RegiT regNum, int regVal) argument 3129 insertAssignInstrBefore(MachineBasicBlock *blk, AMDGPUCFGStructurizer *passRep, RegiT regNum, int regVal) argument 3147 insertCompareInstrBefore(MachineBasicBlock *blk, MachineBasicBlock::iterator instrPos, AMDGPUCFGStructurizer *passRep, RegiT dstReg, RegiT src1Reg, RegiT src2Reg) argument [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDILCFGStructurizer.cpp | 400 PassT *passRep; member in class:llvmCFGStruct::CFGStructurizer 424 passRep = &pass; 513 passRep = &pass; 1348 CFGTraits::insertAssignInstrBefore(headBlk, passRep, initReg, initVal); 1377 (landBlk, CFGTraits::insertInstrBefore(landBlk, AMDGPU::ENDIF, passRep)); 1382 CFGTraits::insertAssignInstrBefore(insertPos, passRep, immReg, 2); 1386 CFGTraits::insertCompareInstrBefore(landBlk, insertPos, passRep, cmpResReg, 1389 AMDGPU::IF_LOGICALZ_i32, passRep, 1394 passRep, initReg, DebugLoc()); 1401 CFGTraits::insertAssignInstrBefore(trueBlk, passRep, initRe 3006 insertInstrBefore(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep) argument 3011 insertInstrBefore(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep, DebugLoc DL) argument 3029 insertInstrEnd(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep) argument 3034 insertInstrEnd(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep, DebugLoc DL) argument 3046 insertInstrBefore(MachineBasicBlock::iterator instrPos, int newOpcode, AMDGPUCFGStructurizer *passRep) argument 3063 insertCondBranchBefore(MachineBasicBlock::iterator instrPos, int newOpcode, AMDGPUCFGStructurizer *passRep, DebugLoc DL) argument 3082 insertCondBranchBefore(MachineBasicBlock *blk, MachineBasicBlock::iterator insertPos, int newOpcode, AMDGPUCFGStructurizer *passRep, RegiT regNum, DebugLoc DL) argument 3100 insertCondBranchEnd(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep, RegiT regNum) argument 3115 insertAssignInstrBefore(MachineBasicBlock::iterator instrPos, AMDGPUCFGStructurizer *passRep, RegiT regNum, int regVal) argument 3129 insertAssignInstrBefore(MachineBasicBlock *blk, AMDGPUCFGStructurizer *passRep, RegiT regNum, int regVal) argument 3147 insertCompareInstrBefore(MachineBasicBlock *blk, MachineBasicBlock::iterator instrPos, AMDGPUCFGStructurizer *passRep, RegiT dstReg, RegiT src1Reg, RegiT src2Reg) argument [all...] |