| /external/llvm/lib/Target/Mips/ |
| H A D | Mips16InstrInfo.h | 78 /// Adjust SP by Amount bytes.
79 void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
96 static bool validImmediate(unsigned Opcode, unsigned Reg, int64_t Amount);
117 // Adjust SP by Amount bytes where bytes can be up to 32bit number.
118 void adjustStackPtrBig(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
122 // Adjust SP by Amount bytes where bytes can be up to 32bit number.
123 void adjustStackPtrBigUnrestricted(unsigned SP, int64_t Amount,
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| H A D | Mips16InstrInfo.cpp | 258 // Adjust SP by Amount bytes where bytes can be up to 32bit number.
263 void Mips16InstrInfo::adjustStackPtrBig(unsigned SP, int64_t Amount, argument
279 MIB1.addImm(Amount);
290 void Mips16InstrInfo::adjustStackPtrBigUnrestricted(unsigned SP, int64_t Amount, argument
296 /// Adjust SP by Amount bytes.
297 void Mips16InstrInfo::adjustStackPtr(unsigned SP, int64_t Amount, argument
300 if (isInt<16>(Amount)) // need to change to addiu sp, ....and isInt<16>
301 BuildAddiuSpImm(MBB, I, Amount);
303 adjustStackPtrBigUnrestricted(SP, Amount, MBB, I);
478 int64_t Amount) {
477 validImmediate(unsigned Opcode, unsigned Reg, int64_t Amount) argument
[all...] |
| H A D | Mips16FrameLowering.cpp | 146 int64_t Amount = I->getOperand(0).getImm(); local
149 Amount = -Amount;
154 TII.adjustStackPtr(Mips::SP, Amount, MBB, I);
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| H A D | MipsSEInstrInfo.h | 70 /// Adjust SP by Amount bytes.
71 void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
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| H A D | MipsSEFrameLowering.cpp | 486 int64_t Amount = I->getOperand(0).getImm(); local
489 Amount = -Amount;
492 TII.adjustStackPtr(SP, Amount, MBB, I);
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| H A D | MipsSEInstrInfo.cpp | 313 /// Adjust SP by Amount bytes.
314 void MipsSEInstrInfo::adjustStackPtr(unsigned SP, int64_t Amount, argument
322 if (isInt<16>(Amount))// addi sp, sp, amount
323 BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount);
325 unsigned Reg = loadImmediate(Amount, MBB, I, DL, 0);
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| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreFrameLowering.cpp | 313 uint64_t Amount = Old->getOperand(0).getImm(); local
314 if (Amount != 0) {
319 Amount = (Amount+Align-1)/Align*Align;
321 assert(Amount%4 == 0);
322 Amount /= 4;
324 bool isU6 = isImmU6(Amount);
325 if (!isU6 && !isImmU16(Amount)) {
329 << Amount << "\n";
338 .addImm(Amount);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430FrameLowering.cpp | 238 uint64_t Amount = Old->getOperand(0).getImm(); local
239 if (Amount != 0) {
243 Amount = (Amount+StackAlign-1)/StackAlign*StackAlign;
249 .addReg(MSP430::SPW).addImm(Amount);
254 Amount -= CalleeAmt;
255 if (Amount)
258 .addReg(MSP430::SPW).addImm(Amount);
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_emulate_loops.c | 53 float Amount; member in struct:count_inst
167 count_inst->Amount += amount;
174 count_inst->Amount -= amount;
232 count_inst.Amount = 0.0f;
272 if(count_inst.Amount == 0.0f){
275 DBG("Counter is increased by %f each iteration.\n", count_inst.Amount);
289 count_inst.Amount);
295 count_inst.Amount) + 1;
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| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_emulate_loops.c | 53 float Amount; member in struct:count_inst
167 count_inst->Amount += amount;
174 count_inst->Amount -= amount;
232 count_inst.Amount = 0.0f;
272 if(count_inst.Amount == 0.0f){
275 DBG("Counter is increased by %f each iteration.\n", count_inst.Amount);
289 count_inst.Amount);
295 count_inst.Amount) + 1;
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| /external/llvm/lib/Target/ARM/ |
| H A D | Thumb1FrameLowering.cpp | 60 unsigned Amount = Old->getOperand(0).getImm(); local
61 if (Amount != 0) {
66 Amount = (Amount+Align-1)/Align*Align;
71 emitSPUpdate(MBB, I, TII, dl, *RegInfo, -Amount);
74 emitSPUpdate(MBB, I, TII, dl, *RegInfo, Amount);
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| H A D | ARMFrameLowering.cpp | 1398 unsigned Amount = Old->getOperand(0).getImm(); local
1399 if (Amount != 0) {
1404 Amount = (Amount+Align-1)/Align*Align;
1419 emitSPUpdate(isARM, MBB, I, dl, TII, -Amount, MachineInstr::NoFlags,
1425 emitSPUpdate(isARM, MBB, I, dl, TII, Amount, MachineInstr::NoFlags,
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 612 int64_t Amount = MI->getOperand(0).getImm(); local
613 Amount = RoundUpToAlignment(Amount, Align);
614 if (!IsDestroy) Amount = -Amount;
624 assert(Amount > -0xfff && Amount < 0xfff && "call frame too large");
625 emitSPUpdate(MBB, MI, dl, TII, AArch64::NoRegister, Amount);
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 187 unsigned Amount; member in struct:__anon22264::AArch64Operand::ShiftExtendOp
313 return ShiftExtend.Amount == Log2_32(MemSize) || ShiftExtend.Amount == 0;
453 return is64Bit ? ShiftExtend.Amount <= 63 : ShiftExtend.Amount <= 31;
655 return ShiftExtend.Amount <= 4;
664 return !ShiftExtend.ImplicitAmount && ShiftExtend.Amount <= 4;
675 return ShiftExtend.Amount % 8 == 0 && ShiftExtend.Amount <= 24;
686 return ShiftExtend.Amount
802 CreateShiftExtend(A64SE::ShiftExtSpecifiers ShiftTyp, unsigned Amount, bool ImplicitAmount, SMLoc S, SMLoc E) argument
1817 unsigned Amount = Parser.getTok().getIntVal(); local
[all...] |
| /external/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.cpp | 1754 uint64_t Amount = !reseveCallFrame ? I->getOperand(0).getImm() : 0;
1763 if (Amount == 0)
1770 Amount = (Amount + StackAlign - 1) / StackAlign * StackAlign;
1774 New = BuildMI(MF, DL, TII.get(getSUBriOpcode(IsLP64, Amount)),
1777 .addImm(Amount);
1782 Amount -= CalleeAmt;
1784 if (Amount) {
1785 unsigned Opc = getADDriOpcode(IsLP64, Amount);
1787 .addReg(StackPtr).addImm(Amount);
[all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 4297 unsigned &Amount) {
4319 Amount = 0;
4349 Amount = Imm;
6846 unsigned Amount = ARM_AM::getSORegOffset(Inst.getOperand(2).getImm()); local
6847 if (Amount == 32) Amount = 0;
6855 TmpInst.addOperand(MCOperand::CreateImm(Amount));
4296 parseMemRegOffsetShift(ARM_AM::ShiftOpc &St, unsigned &Amount) argument
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| /external/e2fsprogs/lib/et/ |
| H A D | texinfo.tex | 1412 % Amount to narrow the margins by for @lisp.
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| /external/grub/docs/ |
| H A D | texinfo.tex | 4779 % Amount to narrow the margins by for @lisp.
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| /external/bison/build-aux/ |
| H A D | texinfo.tex | 6292 % Amount to narrow the margins by for @lisp.
|