Searched refs:mem_index (Results 1 - 11 of 11) sorted by relevance

/external/qemu/target-i386/
H A Dtranslate.c109 int mem_index; /* select memory access functions */ member in struct:DisasContext
515 int mem_index = (idx >> 2) - 1; local
518 tcg_gen_qemu_ld8s(cpu_T[0], cpu_A0, mem_index);
521 tcg_gen_qemu_ld16s(cpu_T[0], cpu_A0, mem_index);
525 tcg_gen_qemu_ld32s(cpu_T[0], cpu_A0, mem_index);
532 int mem_index = (idx >> 2) - 1; local
535 tcg_gen_qemu_ld8u(t0, a0, mem_index);
538 tcg_gen_qemu_ld16u(t0, a0, mem_index);
541 tcg_gen_qemu_ld32u(t0, a0, mem_index);
547 tcg_gen_qemu_ld64(t0, a0, mem_index);
571 int mem_index = (idx >> 2) - 1; local
2745 int mem_index = (idx >> 2) - 1; local
2752 int mem_index = (idx >> 2) - 1; local
2759 int mem_index = (idx >> 2) - 1; local
2769 int mem_index = (idx >> 2) - 1; local
[all...]
/external/qemu/tcg/
H A Dtcg-op.h136 TCGv_i32 addr, TCGArg mem_index)
141 *gen_opparam_ptr++ = mem_index;
145 TCGv_i64 addr, TCGArg mem_index)
150 *gen_opparam_ptr++ = mem_index;
2190 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) argument
2193 tcg_gen_op3i_i32(INDEX_op_qemu_ld8u, ret, addr, mem_index);
2196 TCGV_HIGH(addr), mem_index);
2201 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) argument
2204 tcg_gen_op3i_i32(INDEX_op_qemu_ld8s, ret, addr, mem_index);
2207 TCGV_HIGH(addr), mem_index);
135 tcg_gen_qemu_ldst_op_i64_i32(TCGOpcode opc, TCGv_i64 val, TCGv_i32 addr, TCGArg mem_index) argument
144 tcg_gen_qemu_ldst_op_i64_i64(TCGOpcode opc, TCGv_i64 val, TCGv_i64 addr, TCGArg mem_index) argument
2212 tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) argument
2223 tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) argument
2234 tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) argument
2245 tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) argument
2256 tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index) argument
2266 tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) argument
2276 tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) argument
2286 tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) argument
2296 tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index) argument
2312 tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) argument
2317 tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) argument
2322 tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) argument
2327 tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) argument
2332 tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) argument
2341 tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) argument
2350 tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index) argument
2355 tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) argument
2360 tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) argument
2365 tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) argument
2370 tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index) argument
[all...]
/external/qemu/tcg/arm/
H A Dtcg-target.c960 int mem_index, s_bits; local
982 mem_index = *args;
1000 * ldr r1 [r0, #(offsetof(CPUState, tlb_table[mem_index][0].addr_read))]
1001 * below, the offset is likely to exceed 12 bits if mem_index != 0 and
1003 * add r0, r0, #(mem_index * sizeof *CPUState.tlb_table)
1006 if (mem_index)
1008 (mem_index << (TLB_SHIFT & 1)) |
1079 tcg_out_dat_imm(s, COND_AL, ARITH_MOV, TCG_REG_R1, 0, mem_index);
1083 tcg_out_dat_imm(s, COND_AL, ARITH_MOV, TCG_REG_R2, 0, mem_index);
1183 int mem_index, s_bit local
[all...]
/external/qemu/tcg/i386/
H A Dtcg-target.c1002 int mem_index, int s_bits,
1029 offsetof(CPUState, tlb_table[mem_index][0])
1146 int mem_index, s_bits, arg_idx; local
1158 mem_index = args[addrlo_idx + 1 + (TARGET_LONG_BITS > TCG_TARGET_REG_BITS)];
1161 tcg_out_tlb_load(s, addrlo_idx, mem_index, s_bits, args,
1189 mem_index);
1320 int mem_index, s_bits; local
1333 mem_index = args[addrlo_idx + 1 + (TARGET_LONG_BITS > TCG_TARGET_REG_BITS)];
1336 tcg_out_tlb_load(s, addrlo_idx, mem_index, s_bits, args,
1360 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_RDX, mem_index);
1001 tcg_out_tlb_load(TCGContext *s, int addrlo_idx, int mem_index, int s_bits, const TCGArg *args, uint8_t **label_ptr, int which) argument
[all...]
/external/qemu/tcg/hppa/
H A Dtcg-target.c1030 int mem_index = *args; local
1036 offset = offsetof(CPUState, tlb_table[mem_index][0].addr_read);
1042 offsetof(CPUState, tlb_table[mem_index][0].addend) - offset);
1055 tcg_out_movi(s, TCG_TYPE_I32, argreg, mem_index);
1145 int mem_index = *args; local
1151 offset = offsetof(CPUState, tlb_table[mem_index][0].addr_write);
1157 offsetof(CPUState, tlb_table[mem_index][0].addend) - offset);
1178 tcg_out_movi(s, TCG_TYPE_I32, argreg, mem_index);
1182 tcg_out_movi(s, TCG_TYPE_I32, argreg, mem_index);
1186 tcg_out_movi(s, TCG_TYPE_I32, argreg, mem_index);
[all...]
/external/qemu/tcg/x86_64/
H A Dtcg-target.c560 int addr_reg, data_reg, r0, r1, mem_index, s_bits, bswap, rexw; local
568 mem_index = *args;
597 offsetof(CPUState, tlb_table[mem_index][0].addr_read));
611 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_RSI, mem_index);
754 int addr_reg, data_reg, r0, r1, mem_index, s_bits, bswap, rexw; local
762 mem_index = *args;
792 offsetof(CPUState, tlb_table[mem_index][0].addr_write));
824 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_RDX, mem_index);
/external/qemu/tcg/ppc/
H A Dtcg-target.c529 int addr_reg, data_reg, data_reg2, r0, r1, rbase, mem_index, s_bits, bswap; local
547 mem_index = *args;
568 | offsetof (CPUState, tlb_table[mem_index][0].addr_read)
595 tcg_out_movi (s, TCG_TYPE_I32, 4, mem_index);
599 tcg_out_movi (s, TCG_TYPE_I32, 5, mem_index);
642 /* r0 now contains &env->tlb_table[mem_index][index].addr_read */
649 /* r0 = env->tlb_table[mem_index][index].addend */
651 /* r0 = env->tlb_table[mem_index][index].addend + addr */
726 int addr_reg, r0, r1, data_reg, data_reg2, mem_index, bswap, rbase; local
744 mem_index
[all...]
/external/libnfc-nxp/src/
H A DphHciNfc_Sequence.c1289 static uint8_t mem_index = 0; local
1291 (NFC_ADDRESS_HAL_CONF + mem_index),
1292 (psHciContext->hal_mem_info + mem_index));
1295 mem_index++;
1296 if (NXP_HAL_MEM_INFO_SIZE <= mem_index )
1302 mem_index = 0;
H A DphFriNfc_TopazDynamicMap.c4216 uint8_t mem_index = 0; local
4220 page_address = (uint8_t)(p_mem_info[mem_index] >> NIBBLE_SIZE);
4221 bytes_offset = (uint8_t)(p_mem_info[mem_index] & TOPAZ_NIBBLE_MASK);
4223 mem_index = (mem_index + 1);
4224 ps_memtlv_info->Size = (uint16_t)p_mem_info[mem_index];
4226 mem_index = (mem_index + 1);
4228 (p_mem_info[mem_index] & TOPAZ_NIBBLE_MASK);
/external/qemu/tcg/ppc64/
H A Dtcg-target.c619 int addr_reg, data_reg, r0, r1, rbase, mem_index, s_bits, bswap; local
627 mem_index = *args;
637 offsetof (CPUState, tlb_table[mem_index][0].addr_read));
648 tcg_out_movi (s, TCG_TYPE_I64, 4, mem_index);
678 /* r0 now contains &env->tlb_table[mem_index][index].addr_read */
685 /* r0 = env->tlb_table[mem_index][index].addend */
687 /* r0 = env->tlb_table[mem_index][index].addend + addr */
766 int addr_reg, r0, r1, rbase, data_reg, mem_index, bswap; local
774 mem_index = *args;
783 offsetof (CPUState, tlb_table[mem_index][
[all...]
/external/qemu/tcg/sparc/
H A Dtcg-target.c751 int addr_reg, data_reg, arg0, arg1, arg2, mem_index, s_bits; local
758 mem_index = *args;
778 tlb_table[mem_index][0].addr_read));
801 tcg_out_movi(s, TCG_TYPE_I32, arg1, mem_index);
961 int addr_reg, data_reg, arg0, arg1, arg2, mem_index, s_bits; local
968 mem_index = *args;
990 tlb_table[mem_index][0].addr_write));
1016 tcg_out_movi(s, TCG_TYPE_I32, arg2, mem_index);

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