| /external/clang/test/CodeGen/ |
| H A D | arm-arguments.c | 99 struct s17 { short f0 : 13; char f1 : 4; }; struct
100 struct s17 f17(void) {}
|
| H A D | aarch64-arguments.c | 74 struct s17 { short f0 : 13; char f1 : 4; }; struct
75 struct s17 f17(void) {}
|
| /external/llvm/test/MC/ARM/ |
| H A D | thumb-v8fp.s | 43 vcvtm.s32.f32 s17, s8
44 @ CHECK: vcvtm.s32.f32 s17, s8 @ encoding: [0xff,0xfe,0xc4,0x8a]
45 vcvtm.s32.f64 s17, d8
46 @ CHECK: vcvtm.s32.f64 s17, d8 @ encoding: [0xff,0xfe,0xc8,0x8b]
60 vcvtm.u32.f32 s17, s8
61 @ CHECK: vcvtm.u32.f32 s17, s8 @ encoding: [0xff,0xfe,0x44,0x8a]
62 vcvtm.u32.f64 s17, d8
63 @ CHECK: vcvtm.u32.f64 s17, d8 @ encoding: [0xff,0xfe,0x48,0x8b]
|
| H A D | v8fp.s | 40 vcvtm.s32.f32 s17, s8
41 @ CHECK: vcvtm.s32.f32 s17, s8 @ encoding: [0xc4,0x8a,0xff,0xfe]
42 vcvtm.s32.f64 s17, d8
43 @ CHECK: vcvtm.s32.f64 s17, d8 @ encoding: [0xc8,0x8b,0xff,0xfe]
57 vcvtm.u32.f32 s17, s8
58 @ CHECK: vcvtm.u32.f32 s17, s8 @ encoding: [0x44,0x8a,0xff,0xfe]
59 vcvtm.u32.f64 s17, d8
60 @ CHECK: vcvtm.u32.f64 s17, d8 @ encoding: [0x48,0x8b,0xff,0xfe]
|
| H A D | simple-fp-encoding.s | 362 vcvt.f32.s16 s17, s17, #1
370 vcvt.s16.f32 s17, s17, #1
379 @ CHECK: vcvt.f32.s16 s17, s17, #1 @ encoding: [0x67,0x8a,0xfa,0xee]
388 @ CHECK: vcvt.s16.f32 s17, s17, #1 @ encoding: [0x67,0x8a,0xfe,0xee]
|
| /external/v8/src/arm/ |
| H A D | simulator-arm.h | 140 s16, s17, s18, s19, s20, s21, s22, s23, enumerator in enum:v8::internal::Simulator::Register
|
| H A D | assembler-arm.h | 292 const SwVfpRegister s17 = { 17 }; member in namespace:v8::internal
|
| /external/valgrind/main/none/tests/arm/ |
| H A D | vfp.c | 990 "vmov s17, r0\n\t"
992 "vstmia r1, {s16, s17}\n\t"
1001 "vmov s17, r0\n\t"
1003 "vstmdb r1!, {s16, s17}\n\t"
1047 "s0", "s1", "s2", "s3", "s5", "s6", "s16", "s17",
1582 TESTINSN_un_f32("vabs.f32 s18, s17", s18, s17, i32, f2u(INFINITY));
1604 TESTINSN_un_f32("vneg.f32 s18, s17", s18, s17, i32, f2u(INFINITY));
1626 TESTINSN_un_f32("vmov.f32 s18, s17", s1
[all...] |
| H A D | vfp.stdout.exp | 562 vabs.f32 s18, s17 :: Sd 0x7f800000 Sm (i32)0x7f800000
583 vneg.f32 s18, s17 :: Sd 0xff800000 Sm (i32)0x7f800000
604 vmov.f32 s18, s17 :: Sd 0x7f800000 Sm (i32)0x7f800000
625 vsqrt.f32 s18, s17 :: Sd 0x7f800000 Sm (i32)0x7f800000
646 vcvt.s32.f32 s0, s17 :: Sd 0x7fffffff Sm (i32)0x7f800000
656 vcvt.f32.u32 s10, s17 :: Sd 0x4f4f0000 Sm (i32)0xcf000000
670 vcvt.f32.s32 s0, s17 :: Sd 0x4eff0000 Sm (i32)0x7f800000
723 vcvt.f32.f64 s17, d29 :: Sd 0xff800000 Dm 0xfff00000 00000000
897 vldr s17, [r10] :: Sd 0x00000cc2 *(int*) (Rn + shift) 0x0cc2
979 vstmia r10, {s17}
[all...] |
| /external/chromium_org/v8/src/arm/ |
| H A D | simulator-arm.h | 140 s16, s17, s18, s19, s20, s21, s22, s23, enumerator in enum:v8::internal::Simulator::Register
|
| H A D | assembler-arm.h | 409 const SwVfpRegister s17 = { 17 }; member in namespace:v8::internal
|
| /external/llvm/test/MC/AArch64/ |
| H A D | basic-a64-instructions.s | 1774 frintm s16, s17
1787 // CHECK: frintm s16, s17 // encoding: [0x30,0x42,0x25,0x1e]
1829 fmul s20, s19, s17
1835 fmaxnm s16, s17, s18
1838 // CHECK: fmul s20, s19, s17 // encoding: [0x74,0x0a,0x31,0x1e]
1844 // CHECK: fmaxnm s16, s17, s18 // encoding: [0x30,0x6a,0x32,0x1e]
2043 scvtf s17, w18
2047 // CHECK: scvtf s17, w18 // encoding: [0x51,0x02,0x22,0x1e]
|
| /external/chromium_org/v8/benchmarks/ |
| H A D | regexp.js | 110 var s17 = computeInputVariants('qvi.so_zrah', 137);
168 s17[i].replace(re11, '');
|
| /external/v8/benchmarks/ |
| H A D | regexp.js | 110 var s17 = computeInputVariants('qvi.so_zrah', 137);
168 s17[i].replace(re11, '');
|