Searched refs:v7m (Results 1 - 5 of 5) sorted by relevance

/external/qemu/target-arm/
H A Dmachine.c99 qemu_put_be32(f, env->v7m.other_sp);
100 qemu_put_be32(f, env->v7m.vecbase);
101 qemu_put_be32(f, env->v7m.basepri);
102 qemu_put_be32(f, env->v7m.control);
103 qemu_put_be32(f, env->v7m.current_sp);
104 qemu_put_be32(f, env->v7m.exception);
215 env->v7m.other_sp = qemu_get_be32(f);
216 env->v7m.vecbase = qemu_get_be32(f);
217 env->v7m.basepri = qemu_get_be32(f);
218 env->v7m
[all...]
H A Dcpu.h167 } v7m; member in struct:CPUARMState
302 | env->v7m.exception;
327 env->v7m.exception = val & 0x1ff;
529 privmode = !((env->v7m.exception == 0) && (env->v7m.control & 1));
H A Dhelper.c709 if (env->v7m.current_sp != process) {
710 tmp = env->v7m.other_sp;
711 env->v7m.other_sp = env->regs[13];
713 env->v7m.current_sp = process;
723 if (env->v7m.exception != 0)
724 armv7m_nvic_complete_irq(env->nvic, env->v7m.exception);
755 if (env->v7m.current_sp)
757 if (env->v7m.exception == 0)
789 env->v7m.exception = armv7m_nvic_acknowledge_irq(env->nvic);
818 addr = ldl_phys(env->v7m
[all...]
/external/llvm/test/MC/ARM/
H A Dthumb2-mclass.s6 @ These tests test instruction encodings specific to v7m & v7m (FeatureMClass).
/external/qemu/hw/
H A Darmv7m_nvic.c188 return cpu_single_env->v7m.vecbase;
321 cpu_single_env->v7m.vecbase = value & 0xffffff80;

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