Targets.cpp revision 05fe4b5ce5cc14b95b4da1bbeb4e4e90282ae1dc 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include "llvm/Support/ErrorHandling.h"
30#include "llvm/Type.h"
31#include <algorithm>
32using namespace clang;
33
34//===----------------------------------------------------------------------===//
35//  Common code shared among targets.
36//===----------------------------------------------------------------------===//
37
38/// DefineStd - Define a macro name and standard variants.  For example if
39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
40/// when in GNU mode.
41static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42                      const LangOptions &Opts) {
43  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44
45  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46  // in the user's namespace.
47  if (Opts.GNUMode)
48    Builder.defineMacro(MacroName);
49
50  // Define __unix.
51  Builder.defineMacro("__" + MacroName);
52
53  // Define __unix__.
54  Builder.defineMacro("__" + MacroName + "__");
55}
56
57//===----------------------------------------------------------------------===//
58// Defines specific to certain operating systems.
59//===----------------------------------------------------------------------===//
60
61namespace {
62template<typename TgtInfo>
63class OSTargetInfo : public TgtInfo {
64protected:
65  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
66                            MacroBuilder &Builder) const=0;
67public:
68  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
69  virtual void getTargetDefines(const LangOptions &Opts,
70                                MacroBuilder &Builder) const {
71    TgtInfo::getTargetDefines(Opts, Builder);
72    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
73  }
74
75};
76} // end anonymous namespace
77
78
79static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
80                             const llvm::Triple &Triple,
81                             StringRef &PlatformName,
82                             VersionTuple &PlatformMinVersion) {
83  Builder.defineMacro("__APPLE_CC__", "5621");
84  Builder.defineMacro("__APPLE__");
85  Builder.defineMacro("__MACH__");
86  Builder.defineMacro("OBJC_NEW_PROPERTIES");
87
88  if (!Opts.ObjCAutoRefCount) {
89    // __weak is always defined, for use in blocks and with objc pointers.
90    Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
91
92    // Darwin defines __strong even in C mode (just to nothing).
93    if (Opts.getGC() != LangOptions::NonGC)
94      Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
95    else
96      Builder.defineMacro("__strong", "");
97
98    // __unsafe_unretained is defined to nothing in non-ARC mode. We even
99    // allow this in C, since one might have block pointers in structs that
100    // are used in pure C code and in Objective-C ARC.
101    Builder.defineMacro("__unsafe_unretained", "");
102  }
103
104  if (Opts.Static)
105    Builder.defineMacro("__STATIC__");
106  else
107    Builder.defineMacro("__DYNAMIC__");
108
109  if (Opts.POSIXThreads)
110    Builder.defineMacro("_REENTRANT");
111
112  // Get the platform type and version number from the triple.
113  unsigned Maj, Min, Rev;
114
115  // If no version was given, default to to 10.4.0, for simplifying tests.
116  if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") {
117    PlatformName = "macosx";
118    Min = Rev = 0;
119    Maj = 8;
120  } else {
121    // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]",
122    // "-osxNNN", and "-iosNNN").
123
124    if (Triple.getOS() == llvm::Triple::Darwin) {
125      // For historical reasons that make little sense, the version passed here
126      // is the "darwin" version, which drops the 10 and offsets by 4.
127      Triple.getOSVersion(Maj, Min, Rev);
128
129      if (Triple.getEnvironmentName() == "iphoneos") {
130        PlatformName = "ios";
131      } else {
132        PlatformName = "macosx";
133        Rev = Min;
134        Min = Maj - 4;
135        Maj = 10;
136      }
137    } else {
138      Triple.getOSVersion(Maj, Min, Rev);
139      PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
140    }
141  }
142
143  // If -ccc-host-triple arch-pc-win32-macho option specified, we're
144  // generating code for Win32 ABI. No need to emit
145  // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
146  if (PlatformName == "win32") {
147    PlatformMinVersion = VersionTuple(Maj, Min, Rev);
148    return;
149  }
150
151  // Set the appropriate OS version define.
152  if (PlatformName == "ios") {
153    assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
154    char Str[6];
155    Str[0] = '0' + Maj;
156    Str[1] = '0' + (Min / 10);
157    Str[2] = '0' + (Min % 10);
158    Str[3] = '0' + (Rev / 10);
159    Str[4] = '0' + (Rev % 10);
160    Str[5] = '\0';
161    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
162  } else {
163    // Note that the Driver allows versions which aren't representable in the
164    // define (because we only get a single digit for the minor and micro
165    // revision numbers). So, we limit them to the maximum representable
166    // version.
167    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
168    assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
169    char Str[5];
170    Str[0] = '0' + (Maj / 10);
171    Str[1] = '0' + (Maj % 10);
172    Str[2] = '0' + std::min(Min, 9U);
173    Str[3] = '0' + std::min(Rev, 9U);
174    Str[4] = '\0';
175    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
176  }
177
178  PlatformMinVersion = VersionTuple(Maj, Min, Rev);
179}
180
181namespace {
182template<typename Target>
183class DarwinTargetInfo : public OSTargetInfo<Target> {
184protected:
185  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
186                            MacroBuilder &Builder) const {
187    getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
188                     this->PlatformMinVersion);
189  }
190
191public:
192  DarwinTargetInfo(const std::string& triple) :
193    OSTargetInfo<Target>(triple) {
194      llvm::Triple T = llvm::Triple(triple);
195      this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
196      this->MCountName = "\01mcount";
197    }
198
199  virtual std::string isValidSectionSpecifier(StringRef SR) const {
200    // Let MCSectionMachO validate this.
201    StringRef Segment, Section;
202    unsigned TAA, StubSize;
203    bool HasTAA;
204    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
205                                                       TAA, HasTAA, StubSize);
206  }
207
208  virtual const char *getStaticInitSectionSpecifier() const {
209    // FIXME: We should return 0 when building kexts.
210    return "__TEXT,__StaticInit,regular,pure_instructions";
211  }
212
213};
214
215
216// DragonFlyBSD Target
217template<typename Target>
218class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
219protected:
220  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
221                            MacroBuilder &Builder) const {
222    // DragonFly defines; list based off of gcc output
223    Builder.defineMacro("__DragonFly__");
224    Builder.defineMacro("__DragonFly_cc_version", "100001");
225    Builder.defineMacro("__ELF__");
226    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
227    Builder.defineMacro("__tune_i386__");
228    DefineStd(Builder, "unix", Opts);
229  }
230public:
231  DragonFlyBSDTargetInfo(const std::string &triple)
232    : OSTargetInfo<Target>(triple) {}
233};
234
235// FreeBSD Target
236template<typename Target>
237class FreeBSDTargetInfo : public OSTargetInfo<Target> {
238protected:
239  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
240                            MacroBuilder &Builder) const {
241    // FreeBSD defines; list based off of gcc output
242
243    unsigned Release = Triple.getOSMajorVersion();
244    if (Release == 0U)
245      Release = 8;
246
247    Builder.defineMacro("__FreeBSD__", Twine(Release));
248    Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
249    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
250    DefineStd(Builder, "unix", Opts);
251    Builder.defineMacro("__ELF__");
252  }
253public:
254  FreeBSDTargetInfo(const std::string &triple)
255    : OSTargetInfo<Target>(triple) {
256      this->UserLabelPrefix = "";
257
258      llvm::Triple Triple(triple);
259      switch (Triple.getArch()) {
260        default:
261        case llvm::Triple::x86:
262        case llvm::Triple::x86_64:
263          this->MCountName = ".mcount";
264          break;
265        case llvm::Triple::mips:
266        case llvm::Triple::mipsel:
267        case llvm::Triple::ppc:
268        case llvm::Triple::ppc64:
269          this->MCountName = "_mcount";
270          break;
271        case llvm::Triple::arm:
272          this->MCountName = "__mcount";
273          break;
274      }
275
276    }
277};
278
279// Minix Target
280template<typename Target>
281class MinixTargetInfo : public OSTargetInfo<Target> {
282protected:
283  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
284                            MacroBuilder &Builder) const {
285    // Minix defines
286
287    Builder.defineMacro("__minix", "3");
288    Builder.defineMacro("_EM_WSIZE", "4");
289    Builder.defineMacro("_EM_PSIZE", "4");
290    Builder.defineMacro("_EM_SSIZE", "2");
291    Builder.defineMacro("_EM_LSIZE", "4");
292    Builder.defineMacro("_EM_FSIZE", "4");
293    Builder.defineMacro("_EM_DSIZE", "8");
294    Builder.defineMacro("__ELF__");
295    DefineStd(Builder, "unix", Opts);
296  }
297public:
298  MinixTargetInfo(const std::string &triple)
299    : OSTargetInfo<Target>(triple) {
300      this->UserLabelPrefix = "";
301    }
302};
303
304// Linux target
305template<typename Target>
306class LinuxTargetInfo : public OSTargetInfo<Target> {
307protected:
308  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
309                            MacroBuilder &Builder) const {
310    // Linux defines; list based off of gcc output
311    DefineStd(Builder, "unix", Opts);
312    DefineStd(Builder, "linux", Opts);
313    Builder.defineMacro("__gnu_linux__");
314    Builder.defineMacro("__ELF__");
315    if (Opts.POSIXThreads)
316      Builder.defineMacro("_REENTRANT");
317    if (Opts.CPlusPlus)
318      Builder.defineMacro("_GNU_SOURCE");
319  }
320public:
321  LinuxTargetInfo(const std::string& triple)
322    : OSTargetInfo<Target>(triple) {
323    this->UserLabelPrefix = "";
324    this->WIntType = TargetInfo::UnsignedInt;
325  }
326
327  virtual const char *getStaticInitSectionSpecifier() const {
328    return ".text.startup";
329  }
330};
331
332// NetBSD Target
333template<typename Target>
334class NetBSDTargetInfo : public OSTargetInfo<Target> {
335protected:
336  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
337                            MacroBuilder &Builder) const {
338    // NetBSD defines; list based off of gcc output
339    Builder.defineMacro("__NetBSD__");
340    Builder.defineMacro("__unix__");
341    Builder.defineMacro("__ELF__");
342    if (Opts.POSIXThreads)
343      Builder.defineMacro("_POSIX_THREADS");
344  }
345public:
346  NetBSDTargetInfo(const std::string &triple)
347    : OSTargetInfo<Target>(triple) {
348      this->UserLabelPrefix = "";
349    }
350};
351
352// OpenBSD Target
353template<typename Target>
354class OpenBSDTargetInfo : public OSTargetInfo<Target> {
355protected:
356  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
357                            MacroBuilder &Builder) const {
358    // OpenBSD defines; list based off of gcc output
359
360    Builder.defineMacro("__OpenBSD__");
361    DefineStd(Builder, "unix", Opts);
362    Builder.defineMacro("__ELF__");
363    if (Opts.POSIXThreads)
364      Builder.defineMacro("_POSIX_THREADS");
365  }
366public:
367  OpenBSDTargetInfo(const std::string &triple)
368    : OSTargetInfo<Target>(triple) {
369      this->UserLabelPrefix = "";
370
371      llvm::Triple Triple(triple);
372      switch (Triple.getArch()) {
373        default:
374        case llvm::Triple::x86:
375        case llvm::Triple::x86_64:
376        case llvm::Triple::arm:
377	case llvm::Triple::sparc:
378          this->MCountName = "__mcount";
379          break;
380        case llvm::Triple::mips64:
381        case llvm::Triple::mips64el:
382        case llvm::Triple::ppc:
383	case llvm::Triple::sparcv9:
384          this->MCountName = "_mcount";
385          break;
386      }
387  }
388};
389
390// PSP Target
391template<typename Target>
392class PSPTargetInfo : public OSTargetInfo<Target> {
393protected:
394  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
395                            MacroBuilder &Builder) const {
396    // PSP defines; list based on the output of the pspdev gcc toolchain.
397    Builder.defineMacro("PSP");
398    Builder.defineMacro("_PSP");
399    Builder.defineMacro("__psp__");
400    Builder.defineMacro("__ELF__");
401  }
402public:
403  PSPTargetInfo(const std::string& triple)
404    : OSTargetInfo<Target>(triple) {
405    this->UserLabelPrefix = "";
406  }
407};
408
409// PS3 PPU Target
410template<typename Target>
411class PS3PPUTargetInfo : public OSTargetInfo<Target> {
412protected:
413  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
414                            MacroBuilder &Builder) const {
415    // PS3 PPU defines.
416    Builder.defineMacro("__PPC__");
417    Builder.defineMacro("__PPU__");
418    Builder.defineMacro("__CELLOS_LV2__");
419    Builder.defineMacro("__ELF__");
420    Builder.defineMacro("__LP32__");
421    Builder.defineMacro("_ARCH_PPC64");
422    Builder.defineMacro("__powerpc64__");
423  }
424public:
425  PS3PPUTargetInfo(const std::string& triple)
426    : OSTargetInfo<Target>(triple) {
427    this->UserLabelPrefix = "";
428    this->LongWidth = this->LongAlign = 32;
429    this->PointerWidth = this->PointerAlign = 32;
430    this->IntMaxType = TargetInfo::SignedLongLong;
431    this->UIntMaxType = TargetInfo::UnsignedLongLong;
432    this->Int64Type = TargetInfo::SignedLongLong;
433    this->SizeType = TargetInfo::UnsignedInt;
434    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
435                              "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
436  }
437};
438
439// FIXME: Need a real SPU target.
440// PS3 SPU Target
441template<typename Target>
442class PS3SPUTargetInfo : public OSTargetInfo<Target> {
443protected:
444  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
445                            MacroBuilder &Builder) const {
446    // PS3 PPU defines.
447    Builder.defineMacro("__SPU__");
448    Builder.defineMacro("__ELF__");
449  }
450public:
451  PS3SPUTargetInfo(const std::string& triple)
452    : OSTargetInfo<Target>(triple) {
453    this->UserLabelPrefix = "";
454  }
455};
456
457// AuroraUX target
458template<typename Target>
459class AuroraUXTargetInfo : public OSTargetInfo<Target> {
460protected:
461  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
462                            MacroBuilder &Builder) const {
463    DefineStd(Builder, "sun", Opts);
464    DefineStd(Builder, "unix", Opts);
465    Builder.defineMacro("__ELF__");
466    Builder.defineMacro("__svr4__");
467    Builder.defineMacro("__SVR4");
468  }
469public:
470  AuroraUXTargetInfo(const std::string& triple)
471    : OSTargetInfo<Target>(triple) {
472    this->UserLabelPrefix = "";
473    this->WCharType = this->SignedLong;
474    // FIXME: WIntType should be SignedLong
475  }
476};
477
478// Solaris target
479template<typename Target>
480class SolarisTargetInfo : public OSTargetInfo<Target> {
481protected:
482  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
483                            MacroBuilder &Builder) const {
484    DefineStd(Builder, "sun", Opts);
485    DefineStd(Builder, "unix", Opts);
486    Builder.defineMacro("__ELF__");
487    Builder.defineMacro("__svr4__");
488    Builder.defineMacro("__SVR4");
489  }
490public:
491  SolarisTargetInfo(const std::string& triple)
492    : OSTargetInfo<Target>(triple) {
493    this->UserLabelPrefix = "";
494    this->WCharType = this->SignedLong;
495    // FIXME: WIntType should be SignedLong
496  }
497};
498
499// Windows target
500template<typename Target>
501class WindowsTargetInfo : public OSTargetInfo<Target> {
502protected:
503  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
504                            MacroBuilder &Builder) const {
505    Builder.defineMacro("_WIN32");
506  }
507  void getVisualStudioDefines(const LangOptions &Opts,
508                              MacroBuilder &Builder) const {
509    if (Opts.CPlusPlus) {
510      if (Opts.RTTI)
511        Builder.defineMacro("_CPPRTTI");
512
513      if (Opts.Exceptions)
514        Builder.defineMacro("_CPPUNWIND");
515    }
516
517    if (!Opts.CharIsSigned)
518      Builder.defineMacro("_CHAR_UNSIGNED");
519
520    // FIXME: POSIXThreads isn't exactly the option this should be defined for,
521    //        but it works for now.
522    if (Opts.POSIXThreads)
523      Builder.defineMacro("_MT");
524
525    if (Opts.MSCVersion != 0)
526      Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
527
528    if (Opts.MicrosoftExt) {
529      Builder.defineMacro("_MSC_EXTENSIONS");
530
531      if (Opts.CPlusPlus0x) {
532        Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
533        Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
534        Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
535      }
536    }
537
538    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
539  }
540
541public:
542  WindowsTargetInfo(const std::string &triple)
543    : OSTargetInfo<Target>(triple) {}
544};
545
546} // end anonymous namespace.
547
548//===----------------------------------------------------------------------===//
549// Specific target implementations.
550//===----------------------------------------------------------------------===//
551
552namespace {
553// PPC abstract base class
554class PPCTargetInfo : public TargetInfo {
555  static const Builtin::Info BuiltinInfo[];
556  static const char * const GCCRegNames[];
557  static const TargetInfo::GCCRegAlias GCCRegAliases[];
558public:
559  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {}
560
561  virtual void getTargetBuiltins(const Builtin::Info *&Records,
562                                 unsigned &NumRecords) const {
563    Records = BuiltinInfo;
564    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
565  }
566
567  virtual void getTargetDefines(const LangOptions &Opts,
568                                MacroBuilder &Builder) const;
569
570  virtual void getGCCRegNames(const char * const *&Names,
571                              unsigned &NumNames) const;
572  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
573                                unsigned &NumAliases) const;
574  virtual bool validateAsmConstraint(const char *&Name,
575                                     TargetInfo::ConstraintInfo &Info) const {
576    switch (*Name) {
577    default: return false;
578    case 'O': // Zero
579      break;
580    case 'b': // Base register
581    case 'f': // Floating point register
582      Info.setAllowsRegister();
583      break;
584    // FIXME: The following are added to allow parsing.
585    // I just took a guess at what the actions should be.
586    // Also, is more specific checking needed?  I.e. specific registers?
587    case 'd': // Floating point register (containing 64-bit value)
588    case 'v': // Altivec vector register
589      Info.setAllowsRegister();
590      break;
591    case 'w':
592      switch (Name[1]) {
593        case 'd':// VSX vector register to hold vector double data
594        case 'f':// VSX vector register to hold vector float data
595        case 's':// VSX vector register to hold scalar float data
596        case 'a':// Any VSX register
597          break;
598        default:
599          return false;
600      }
601      Info.setAllowsRegister();
602      Name++; // Skip over 'w'.
603      break;
604    case 'h': // `MQ', `CTR', or `LINK' register
605    case 'q': // `MQ' register
606    case 'c': // `CTR' register
607    case 'l': // `LINK' register
608    case 'x': // `CR' register (condition register) number 0
609    case 'y': // `CR' register (condition register)
610    case 'z': // `XER[CA]' carry bit (part of the XER register)
611      Info.setAllowsRegister();
612      break;
613    case 'I': // Signed 16-bit constant
614    case 'J': // Unsigned 16-bit constant shifted left 16 bits
615              //  (use `L' instead for SImode constants)
616    case 'K': // Unsigned 16-bit constant
617    case 'L': // Signed 16-bit constant shifted left 16 bits
618    case 'M': // Constant larger than 31
619    case 'N': // Exact power of 2
620    case 'P': // Constant whose negation is a signed 16-bit constant
621    case 'G': // Floating point constant that can be loaded into a
622              // register with one instruction per word
623    case 'H': // Integer/Floating point constant that can be loaded
624              // into a register using three instructions
625      break;
626    case 'm': // Memory operand. Note that on PowerPC targets, m can
627              // include addresses that update the base register. It
628              // is therefore only safe to use `m' in an asm statement
629              // if that asm statement accesses the operand exactly once.
630              // The asm statement must also use `%U<opno>' as a
631              // placeholder for the "update" flag in the corresponding
632              // load or store instruction. For example:
633              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
634              // is correct but:
635              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
636              // is not. Use es rather than m if you don't want the base
637              // register to be updated.
638    case 'e':
639      if (Name[1] != 's')
640          return false;
641              // es: A "stable" memory operand; that is, one which does not
642              // include any automodification of the base register. Unlike
643              // `m', this constraint can be used in asm statements that
644              // might access the operand several times, or that might not
645              // access it at all.
646      Info.setAllowsMemory();
647      Name++; // Skip over 'e'.
648      break;
649    case 'Q': // Memory operand that is an offset from a register (it is
650              // usually better to use `m' or `es' in asm statements)
651    case 'Z': // Memory operand that is an indexed or indirect from a
652              // register (it is usually better to use `m' or `es' in
653              // asm statements)
654      Info.setAllowsMemory();
655      Info.setAllowsRegister();
656      break;
657    case 'R': // AIX TOC entry
658    case 'a': // Address operand that is an indexed or indirect from a
659              // register (`p' is preferable for asm statements)
660    case 'S': // Constant suitable as a 64-bit mask operand
661    case 'T': // Constant suitable as a 32-bit mask operand
662    case 'U': // System V Release 4 small data area reference
663    case 't': // AND masks that can be performed by two rldic{l, r}
664              // instructions
665    case 'W': // Vector constant that does not require memory
666    case 'j': // Vector constant that is all zeros.
667      break;
668    // End FIXME.
669    }
670    return true;
671  }
672  virtual const char *getClobbers() const {
673    return "";
674  }
675};
676
677const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
678#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
679#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
680                                              ALL_LANGUAGES },
681#include "clang/Basic/BuiltinsPPC.def"
682};
683
684
685/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
686/// #defines that are not tied to a specific subtarget.
687void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
688                                     MacroBuilder &Builder) const {
689  // Target identification.
690  Builder.defineMacro("__ppc__");
691  Builder.defineMacro("_ARCH_PPC");
692  Builder.defineMacro("__powerpc__");
693  Builder.defineMacro("__POWERPC__");
694  if (PointerWidth == 64) {
695    Builder.defineMacro("_ARCH_PPC64");
696    Builder.defineMacro("_LP64");
697    Builder.defineMacro("__LP64__");
698    Builder.defineMacro("__powerpc64__");
699    Builder.defineMacro("__ppc64__");
700  } else {
701    Builder.defineMacro("__ppc__");
702  }
703
704  // Target properties.
705  if (getTriple().getOS() != llvm::Triple::NetBSD)
706    Builder.defineMacro("_BIG_ENDIAN");
707  Builder.defineMacro("__BIG_ENDIAN__");
708
709  // Subtarget options.
710  Builder.defineMacro("__NATURAL_ALIGNMENT__");
711  Builder.defineMacro("__REGISTER_PREFIX__", "");
712
713  // FIXME: Should be controlled by command line option.
714  Builder.defineMacro("__LONG_DOUBLE_128__");
715
716  if (Opts.AltiVec) {
717    Builder.defineMacro("__VEC__", "10206");
718    Builder.defineMacro("__ALTIVEC__");
719  }
720}
721
722
723const char * const PPCTargetInfo::GCCRegNames[] = {
724  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
725  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
726  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
727  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
728  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
729  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
730  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
731  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
732  "mq", "lr", "ctr", "ap",
733  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
734  "xer",
735  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
736  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
737  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
738  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
739  "vrsave", "vscr",
740  "spe_acc", "spefscr",
741  "sfp"
742};
743
744void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
745                                   unsigned &NumNames) const {
746  Names = GCCRegNames;
747  NumNames = llvm::array_lengthof(GCCRegNames);
748}
749
750const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
751  // While some of these aliases do map to different registers
752  // they still share the same register name.
753  { { "0" }, "r0" },
754  { { "1"}, "r1" },
755  { { "2" }, "r2" },
756  { { "3" }, "r3" },
757  { { "4" }, "r4" },
758  { { "5" }, "r5" },
759  { { "6" }, "r6" },
760  { { "7" }, "r7" },
761  { { "8" }, "r8" },
762  { { "9" }, "r9" },
763  { { "10" }, "r10" },
764  { { "11" }, "r11" },
765  { { "12" }, "r12" },
766  { { "13" }, "r13" },
767  { { "14" }, "r14" },
768  { { "15" }, "r15" },
769  { { "16" }, "r16" },
770  { { "17" }, "r17" },
771  { { "18" }, "r18" },
772  { { "19" }, "r19" },
773  { { "20" }, "r20" },
774  { { "21" }, "r21" },
775  { { "22" }, "r22" },
776  { { "23" }, "r23" },
777  { { "24" }, "r24" },
778  { { "25" }, "r25" },
779  { { "26" }, "r26" },
780  { { "27" }, "r27" },
781  { { "28" }, "r28" },
782  { { "29" }, "r29" },
783  { { "30" }, "r30" },
784  { { "31" }, "r31" },
785  { { "fr0" }, "f0" },
786  { { "fr1" }, "f1" },
787  { { "fr2" }, "f2" },
788  { { "fr3" }, "f3" },
789  { { "fr4" }, "f4" },
790  { { "fr5" }, "f5" },
791  { { "fr6" }, "f6" },
792  { { "fr7" }, "f7" },
793  { { "fr8" }, "f8" },
794  { { "fr9" }, "f9" },
795  { { "fr10" }, "f10" },
796  { { "fr11" }, "f11" },
797  { { "fr12" }, "f12" },
798  { { "fr13" }, "f13" },
799  { { "fr14" }, "f14" },
800  { { "fr15" }, "f15" },
801  { { "fr16" }, "f16" },
802  { { "fr17" }, "f17" },
803  { { "fr18" }, "f18" },
804  { { "fr19" }, "f19" },
805  { { "fr20" }, "f20" },
806  { { "fr21" }, "f21" },
807  { { "fr22" }, "f22" },
808  { { "fr23" }, "f23" },
809  { { "fr24" }, "f24" },
810  { { "fr25" }, "f25" },
811  { { "fr26" }, "f26" },
812  { { "fr27" }, "f27" },
813  { { "fr28" }, "f28" },
814  { { "fr29" }, "f29" },
815  { { "fr30" }, "f30" },
816  { { "fr31" }, "f31" },
817  { { "cc" }, "cr0" },
818};
819
820void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
821                                     unsigned &NumAliases) const {
822  Aliases = GCCRegAliases;
823  NumAliases = llvm::array_lengthof(GCCRegAliases);
824}
825} // end anonymous namespace.
826
827namespace {
828class PPC32TargetInfo : public PPCTargetInfo {
829public:
830  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
831    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
832                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
833
834    switch (getTriple().getOS()) {
835    case llvm::Triple::FreeBSD:
836    case llvm::Triple::NetBSD:
837      SizeType = UnsignedInt;
838      break;
839    default:
840      break;
841    }
842  }
843
844  virtual const char *getVAListDeclaration() const {
845    // This is the ELF definition, and is overridden by the Darwin sub-target
846    return "typedef struct __va_list_tag {"
847           "  unsigned char gpr;"
848           "  unsigned char fpr;"
849           "  unsigned short reserved;"
850           "  void* overflow_arg_area;"
851           "  void* reg_save_area;"
852           "} __builtin_va_list[1];";
853  }
854};
855} // end anonymous namespace.
856
857namespace {
858class PPC64TargetInfo : public PPCTargetInfo {
859public:
860  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
861    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
862    IntMaxType = SignedLong;
863    UIntMaxType = UnsignedLong;
864    Int64Type = SignedLong;
865    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
866                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
867  }
868  virtual const char *getVAListDeclaration() const {
869    return "typedef char* __builtin_va_list;";
870  }
871};
872} // end anonymous namespace.
873
874
875namespace {
876class DarwinPPC32TargetInfo :
877  public DarwinTargetInfo<PPC32TargetInfo> {
878public:
879  DarwinPPC32TargetInfo(const std::string& triple)
880    : DarwinTargetInfo<PPC32TargetInfo>(triple) {
881    HasAlignMac68kSupport = true;
882    BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
883    SuitableAlign = 128;
884  }
885  virtual const char *getVAListDeclaration() const {
886    return "typedef char* __builtin_va_list;";
887  }
888};
889
890class DarwinPPC64TargetInfo :
891  public DarwinTargetInfo<PPC64TargetInfo> {
892public:
893  DarwinPPC64TargetInfo(const std::string& triple)
894    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
895    HasAlignMac68kSupport = true;
896    SuitableAlign = 128;
897  }
898};
899} // end anonymous namespace.
900
901namespace {
902  static const unsigned PTXAddrSpaceMap[] = {
903    0,    // opencl_global
904    4,    // opencl_local
905    1     // opencl_constant
906  };
907  class PTXTargetInfo : public TargetInfo {
908    static const char * const GCCRegNames[];
909    static const Builtin::Info BuiltinInfo[];
910    std::vector<llvm::StringRef> AvailableFeatures;
911  public:
912    PTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
913      BigEndian = false;
914      TLSSupported = false;
915      LongWidth = LongAlign = 64;
916      AddrSpaceMap = &PTXAddrSpaceMap;
917      // Define available target features
918      // These must be defined in sorted order!
919      AvailableFeatures.push_back("compute10");
920      AvailableFeatures.push_back("compute11");
921      AvailableFeatures.push_back("compute12");
922      AvailableFeatures.push_back("compute13");
923      AvailableFeatures.push_back("compute20");
924      AvailableFeatures.push_back("double");
925      AvailableFeatures.push_back("no-fma");
926      AvailableFeatures.push_back("ptx20");
927      AvailableFeatures.push_back("ptx21");
928      AvailableFeatures.push_back("ptx22");
929      AvailableFeatures.push_back("ptx23");
930      AvailableFeatures.push_back("sm10");
931      AvailableFeatures.push_back("sm11");
932      AvailableFeatures.push_back("sm12");
933      AvailableFeatures.push_back("sm13");
934      AvailableFeatures.push_back("sm20");
935      AvailableFeatures.push_back("sm21");
936      AvailableFeatures.push_back("sm22");
937      AvailableFeatures.push_back("sm23");
938    }
939    virtual void getTargetDefines(const LangOptions &Opts,
940                                  MacroBuilder &Builder) const {
941      Builder.defineMacro("__PTX__");
942    }
943    virtual void getTargetBuiltins(const Builtin::Info *&Records,
944                                   unsigned &NumRecords) const {
945      Records = BuiltinInfo;
946      NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
947    }
948
949    virtual void getGCCRegNames(const char * const *&Names,
950                                unsigned &NumNames) const;
951    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
952                                  unsigned &NumAliases) const {
953      // No aliases.
954      Aliases = 0;
955      NumAliases = 0;
956    }
957    virtual bool validateAsmConstraint(const char *&Name,
958                                       TargetInfo::ConstraintInfo &info) const {
959      // FIXME: implement
960      return true;
961    }
962    virtual const char *getClobbers() const {
963      // FIXME: Is this really right?
964      return "";
965    }
966    virtual const char *getVAListDeclaration() const {
967      // FIXME: implement
968      return "typedef char* __builtin_va_list;";
969    }
970
971    virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
972                                   const std::string &Name,
973                                   bool Enabled) const;
974  };
975
976  const Builtin::Info PTXTargetInfo::BuiltinInfo[] = {
977#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
978#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
979                                              ALL_LANGUAGES },
980#include "clang/Basic/BuiltinsPTX.def"
981  };
982
983  const char * const PTXTargetInfo::GCCRegNames[] = {
984    "r0"
985  };
986
987  void PTXTargetInfo::getGCCRegNames(const char * const *&Names,
988                                     unsigned &NumNames) const {
989    Names = GCCRegNames;
990    NumNames = llvm::array_lengthof(GCCRegNames);
991  }
992
993  bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
994                                        const std::string &Name,
995                                        bool Enabled) const {
996    if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
997                          Name)) {
998      Features[Name] = Enabled;
999      return true;
1000    } else {
1001      return false;
1002    }
1003  }
1004
1005  class PTX32TargetInfo : public PTXTargetInfo {
1006  public:
1007  PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
1008      PointerWidth = PointerAlign = 32;
1009      SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1010      DescriptionString
1011        = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64";
1012    }
1013  };
1014
1015  class PTX64TargetInfo : public PTXTargetInfo {
1016  public:
1017  PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
1018      PointerWidth = PointerAlign = 64;
1019      SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1020      DescriptionString
1021        = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64";
1022    }
1023  };
1024}
1025
1026namespace {
1027// MBlaze abstract base class
1028class MBlazeTargetInfo : public TargetInfo {
1029  static const char * const GCCRegNames[];
1030  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1031
1032public:
1033  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1034    DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1035  }
1036
1037  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1038                                 unsigned &NumRecords) const {
1039    // FIXME: Implement.
1040    Records = 0;
1041    NumRecords = 0;
1042  }
1043
1044  virtual void getTargetDefines(const LangOptions &Opts,
1045                                MacroBuilder &Builder) const;
1046
1047  virtual const char *getVAListDeclaration() const {
1048    return "typedef char* __builtin_va_list;";
1049  }
1050  virtual const char *getTargetPrefix() const {
1051    return "mblaze";
1052  }
1053  virtual void getGCCRegNames(const char * const *&Names,
1054                              unsigned &NumNames) const;
1055  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1056                                unsigned &NumAliases) const;
1057  virtual bool validateAsmConstraint(const char *&Name,
1058                                     TargetInfo::ConstraintInfo &Info) const {
1059    switch (*Name) {
1060    default: return false;
1061    case 'O': // Zero
1062      return true;
1063    case 'b': // Base register
1064    case 'f': // Floating point register
1065      Info.setAllowsRegister();
1066      return true;
1067    }
1068  }
1069  virtual const char *getClobbers() const {
1070    return "";
1071  }
1072};
1073
1074/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1075/// #defines that are not tied to a specific subtarget.
1076void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1077                                     MacroBuilder &Builder) const {
1078  // Target identification.
1079  Builder.defineMacro("__microblaze__");
1080  Builder.defineMacro("_ARCH_MICROBLAZE");
1081  Builder.defineMacro("__MICROBLAZE__");
1082
1083  // Target properties.
1084  Builder.defineMacro("_BIG_ENDIAN");
1085  Builder.defineMacro("__BIG_ENDIAN__");
1086
1087  // Subtarget options.
1088  Builder.defineMacro("__REGISTER_PREFIX__", "");
1089}
1090
1091
1092const char * const MBlazeTargetInfo::GCCRegNames[] = {
1093  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
1094  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
1095  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
1096  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
1097  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
1098  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1099  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1100  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1101  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1102  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
1103};
1104
1105void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1106                                   unsigned &NumNames) const {
1107  Names = GCCRegNames;
1108  NumNames = llvm::array_lengthof(GCCRegNames);
1109}
1110
1111const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1112  { {"f0"},  "r0" },
1113  { {"f1"},  "r1" },
1114  { {"f2"},  "r2" },
1115  { {"f3"},  "r3" },
1116  { {"f4"},  "r4" },
1117  { {"f5"},  "r5" },
1118  { {"f6"},  "r6" },
1119  { {"f7"},  "r7" },
1120  { {"f8"},  "r8" },
1121  { {"f9"},  "r9" },
1122  { {"f10"}, "r10" },
1123  { {"f11"}, "r11" },
1124  { {"f12"}, "r12" },
1125  { {"f13"}, "r13" },
1126  { {"f14"}, "r14" },
1127  { {"f15"}, "r15" },
1128  { {"f16"}, "r16" },
1129  { {"f17"}, "r17" },
1130  { {"f18"}, "r18" },
1131  { {"f19"}, "r19" },
1132  { {"f20"}, "r20" },
1133  { {"f21"}, "r21" },
1134  { {"f22"}, "r22" },
1135  { {"f23"}, "r23" },
1136  { {"f24"}, "r24" },
1137  { {"f25"}, "r25" },
1138  { {"f26"}, "r26" },
1139  { {"f27"}, "r27" },
1140  { {"f28"}, "r28" },
1141  { {"f29"}, "r29" },
1142  { {"f30"}, "r30" },
1143  { {"f31"}, "r31" },
1144};
1145
1146void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1147                                     unsigned &NumAliases) const {
1148  Aliases = GCCRegAliases;
1149  NumAliases = llvm::array_lengthof(GCCRegAliases);
1150}
1151} // end anonymous namespace.
1152
1153namespace {
1154// Namespace for x86 abstract base class
1155const Builtin::Info BuiltinInfo[] = {
1156#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1157#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1158                                              ALL_LANGUAGES },
1159#include "clang/Basic/BuiltinsX86.def"
1160};
1161
1162static const char* const GCCRegNames[] = {
1163  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1164  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1165  "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1166  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1167  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1168  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1169  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1170  "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1171  "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1172};
1173
1174const TargetInfo::AddlRegName AddlRegNames[] = {
1175  { { "al", "ah", "eax", "rax" }, 0 },
1176  { { "bl", "bh", "ebx", "rbx" }, 3 },
1177  { { "cl", "ch", "ecx", "rcx" }, 2 },
1178  { { "dl", "dh", "edx", "rdx" }, 1 },
1179  { { "esi", "rsi" }, 4 },
1180  { { "edi", "rdi" }, 5 },
1181  { { "esp", "rsp" }, 7 },
1182  { { "ebp", "rbp" }, 6 },
1183};
1184
1185// X86 target abstract base class; x86-32 and x86-64 are very close, so
1186// most of the implementation can be shared.
1187class X86TargetInfo : public TargetInfo {
1188  enum X86SSEEnum {
1189    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1190  } SSELevel;
1191  enum MMX3DNowEnum {
1192    NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1193  } MMX3DNowLevel;
1194
1195  bool HasAES;
1196  bool HasLZCNT;
1197  bool HasBMI;
1198  bool HasBMI2;
1199  bool HasPOPCNT;
1200  bool HasFMA4;
1201
1202  /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1203  ///
1204  /// Each enumeration represents a particular CPU supported by Clang. These
1205  /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1206  enum CPUKind {
1207    CK_Generic,
1208
1209    /// \name i386
1210    /// i386-generation processors.
1211    //@{
1212    CK_i386,
1213    //@}
1214
1215    /// \name i486
1216    /// i486-generation processors.
1217    //@{
1218    CK_i486,
1219    CK_WinChipC6,
1220    CK_WinChip2,
1221    CK_C3,
1222    //@}
1223
1224    /// \name i586
1225    /// i586-generation processors, P5 microarchitecture based.
1226    //@{
1227    CK_i586,
1228    CK_Pentium,
1229    CK_PentiumMMX,
1230    //@}
1231
1232    /// \name i686
1233    /// i686-generation processors, P6 / Pentium M microarchitecture based.
1234    //@{
1235    CK_i686,
1236    CK_PentiumPro,
1237    CK_Pentium2,
1238    CK_Pentium3,
1239    CK_Pentium3M,
1240    CK_PentiumM,
1241    CK_C3_2,
1242
1243    /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1244    /// Clang however has some logic to suport this.
1245    // FIXME: Warn, deprecate, and potentially remove this.
1246    CK_Yonah,
1247    //@}
1248
1249    /// \name Netburst
1250    /// Netburst microarchitecture based processors.
1251    //@{
1252    CK_Pentium4,
1253    CK_Pentium4M,
1254    CK_Prescott,
1255    CK_Nocona,
1256    //@}
1257
1258    /// \name Core
1259    /// Core microarchitecture based processors.
1260    //@{
1261    CK_Core2,
1262
1263    /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1264    /// codename which GCC no longer accepts as an option to -march, but Clang
1265    /// has some logic for recognizing it.
1266    // FIXME: Warn, deprecate, and potentially remove this.
1267    CK_Penryn,
1268    //@}
1269
1270    /// \name Atom
1271    /// Atom processors
1272    //@{
1273    CK_Atom,
1274    //@}
1275
1276    /// \name Nehalem
1277    /// Nehalem microarchitecture based processors.
1278    //@{
1279    CK_Corei7,
1280    CK_Corei7AVX,
1281    CK_CoreAVXi,
1282    CK_CoreAVX2,
1283    //@}
1284
1285    /// \name K6
1286    /// K6 architecture processors.
1287    //@{
1288    CK_K6,
1289    CK_K6_2,
1290    CK_K6_3,
1291    //@}
1292
1293    /// \name K7
1294    /// K7 architecture processors.
1295    //@{
1296    CK_Athlon,
1297    CK_AthlonThunderbird,
1298    CK_Athlon4,
1299    CK_AthlonXP,
1300    CK_AthlonMP,
1301    //@}
1302
1303    /// \name K8
1304    /// K8 architecture processors.
1305    //@{
1306    CK_Athlon64,
1307    CK_Athlon64SSE3,
1308    CK_AthlonFX,
1309    CK_K8,
1310    CK_K8SSE3,
1311    CK_Opteron,
1312    CK_OpteronSSE3,
1313    CK_AMDFAM10,
1314
1315    /// \name K10
1316    /// K10 architecture processors.
1317    //@{
1318    CK_BDVER1,
1319    CK_BDVER2,
1320
1321    /// This specification is deprecated and will be removed in the future.
1322    /// Users should prefer \see CK_K8.
1323    // FIXME: Warn on this when the CPU is set to it.
1324    CK_x86_64,
1325    //@}
1326
1327    /// \name Geode
1328    /// Geode processors.
1329    //@{
1330    CK_Geode
1331    //@}
1332  } CPU;
1333
1334public:
1335  X86TargetInfo(const std::string& triple)
1336    : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1337      HasAES(false), HasLZCNT(false), HasBMI(false), HasBMI2(false),
1338      HasPOPCNT(false), HasFMA4(false), CPU(CK_Generic) {
1339    BigEndian = false;
1340    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1341  }
1342  virtual unsigned getFloatEvalMethod() const {
1343    // X87 evaluates with 80 bits "long double" precision.
1344    return SSELevel == NoSSE ? 2 : 0;
1345  }
1346  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1347                                 unsigned &NumRecords) const {
1348    Records = BuiltinInfo;
1349    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1350  }
1351  virtual void getGCCRegNames(const char * const *&Names,
1352                              unsigned &NumNames) const {
1353    Names = GCCRegNames;
1354    NumNames = llvm::array_lengthof(GCCRegNames);
1355  }
1356  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1357                                unsigned &NumAliases) const {
1358    Aliases = 0;
1359    NumAliases = 0;
1360  }
1361  virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1362				  unsigned &NumNames) const {
1363    Names = AddlRegNames;
1364    NumNames = llvm::array_lengthof(AddlRegNames);
1365  }
1366  virtual bool validateAsmConstraint(const char *&Name,
1367                                     TargetInfo::ConstraintInfo &info) const;
1368  virtual std::string convertConstraint(const char *&Constraint) const;
1369  virtual const char *getClobbers() const {
1370    return "~{dirflag},~{fpsr},~{flags}";
1371  }
1372  virtual void getTargetDefines(const LangOptions &Opts,
1373                                MacroBuilder &Builder) const;
1374  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1375                                 const std::string &Name,
1376                                 bool Enabled) const;
1377  virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1378  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1379  virtual const char* getABI() const {
1380    if (PointerWidth == 64 && SSELevel >= AVX)
1381      return "avx";
1382    else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow)
1383      return "no-mmx";
1384    return "";
1385  }
1386  virtual bool setCPU(const std::string &Name) {
1387    CPU = llvm::StringSwitch<CPUKind>(Name)
1388      .Case("i386", CK_i386)
1389      .Case("i486", CK_i486)
1390      .Case("winchip-c6", CK_WinChipC6)
1391      .Case("winchip2", CK_WinChip2)
1392      .Case("c3", CK_C3)
1393      .Case("i586", CK_i586)
1394      .Case("pentium", CK_Pentium)
1395      .Case("pentium-mmx", CK_PentiumMMX)
1396      .Case("i686", CK_i686)
1397      .Case("pentiumpro", CK_PentiumPro)
1398      .Case("pentium2", CK_Pentium2)
1399      .Case("pentium3", CK_Pentium3)
1400      .Case("pentium3m", CK_Pentium3M)
1401      .Case("pentium-m", CK_PentiumM)
1402      .Case("c3-2", CK_C3_2)
1403      .Case("yonah", CK_Yonah)
1404      .Case("pentium4", CK_Pentium4)
1405      .Case("pentium4m", CK_Pentium4M)
1406      .Case("prescott", CK_Prescott)
1407      .Case("nocona", CK_Nocona)
1408      .Case("core2", CK_Core2)
1409      .Case("penryn", CK_Penryn)
1410      .Case("atom", CK_Atom)
1411      .Case("corei7", CK_Corei7)
1412      .Case("corei7-avx", CK_Corei7AVX)
1413      .Case("core-avx-i", CK_CoreAVXi)
1414      .Case("core-avx2", CK_CoreAVX2)
1415      .Case("k6", CK_K6)
1416      .Case("k6-2", CK_K6_2)
1417      .Case("k6-3", CK_K6_3)
1418      .Case("athlon", CK_Athlon)
1419      .Case("athlon-tbird", CK_AthlonThunderbird)
1420      .Case("athlon-4", CK_Athlon4)
1421      .Case("athlon-xp", CK_AthlonXP)
1422      .Case("athlon-mp", CK_AthlonMP)
1423      .Case("athlon64", CK_Athlon64)
1424      .Case("athlon64-sse3", CK_Athlon64SSE3)
1425      .Case("athlon-fx", CK_AthlonFX)
1426      .Case("k8", CK_K8)
1427      .Case("k8-sse3", CK_K8SSE3)
1428      .Case("opteron", CK_Opteron)
1429      .Case("opteron-sse3", CK_OpteronSSE3)
1430      .Case("amdfam10", CK_AMDFAM10)
1431      .Case("bdver1", CK_BDVER1)
1432      .Case("bdver2", CK_BDVER2)
1433      .Case("x86-64", CK_x86_64)
1434      .Case("geode", CK_Geode)
1435      .Default(CK_Generic);
1436
1437    // Perform any per-CPU checks necessary to determine if this CPU is
1438    // acceptable.
1439    // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1440    // invalid without explaining *why*.
1441    switch (CPU) {
1442    case CK_Generic:
1443      // No processor selected!
1444      return false;
1445
1446    case CK_i386:
1447    case CK_i486:
1448    case CK_WinChipC6:
1449    case CK_WinChip2:
1450    case CK_C3:
1451    case CK_i586:
1452    case CK_Pentium:
1453    case CK_PentiumMMX:
1454    case CK_i686:
1455    case CK_PentiumPro:
1456    case CK_Pentium2:
1457    case CK_Pentium3:
1458    case CK_Pentium3M:
1459    case CK_PentiumM:
1460    case CK_Yonah:
1461    case CK_C3_2:
1462    case CK_Pentium4:
1463    case CK_Pentium4M:
1464    case CK_Prescott:
1465    case CK_K6:
1466    case CK_K6_2:
1467    case CK_K6_3:
1468    case CK_Athlon:
1469    case CK_AthlonThunderbird:
1470    case CK_Athlon4:
1471    case CK_AthlonXP:
1472    case CK_AthlonMP:
1473    case CK_Geode:
1474      // Only accept certain architectures when compiling in 32-bit mode.
1475      if (PointerWidth != 32)
1476        return false;
1477
1478      // Fallthrough
1479    case CK_Nocona:
1480    case CK_Core2:
1481    case CK_Penryn:
1482    case CK_Atom:
1483    case CK_Corei7:
1484    case CK_Corei7AVX:
1485    case CK_CoreAVXi:
1486    case CK_CoreAVX2:
1487    case CK_Athlon64:
1488    case CK_Athlon64SSE3:
1489    case CK_AthlonFX:
1490    case CK_K8:
1491    case CK_K8SSE3:
1492    case CK_Opteron:
1493    case CK_OpteronSSE3:
1494    case CK_AMDFAM10:
1495    case CK_BDVER1:
1496    case CK_BDVER2:
1497    case CK_x86_64:
1498      return true;
1499    }
1500    llvm_unreachable("Unhandled CPU kind");
1501  }
1502};
1503
1504void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1505  // FIXME: This should not be here.
1506  Features["3dnow"] = false;
1507  Features["3dnowa"] = false;
1508  Features["mmx"] = false;
1509  Features["sse"] = false;
1510  Features["sse2"] = false;
1511  Features["sse3"] = false;
1512  Features["ssse3"] = false;
1513  Features["sse41"] = false;
1514  Features["sse42"] = false;
1515  Features["sse4a"] = false;
1516  Features["aes"] = false;
1517  Features["avx"] = false;
1518  Features["avx2"] = false;
1519  Features["lzcnt"] = false;
1520  Features["bmi"] = false;
1521  Features["bmi2"] = false;
1522  Features["popcnt"] = false;
1523  Features["fma4"] = false;
1524
1525  // FIXME: This *really* should not be here.
1526
1527  // X86_64 always has SSE2.
1528  if (PointerWidth == 64)
1529    Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1530
1531  switch (CPU) {
1532  case CK_Generic:
1533  case CK_i386:
1534  case CK_i486:
1535  case CK_i586:
1536  case CK_Pentium:
1537  case CK_i686:
1538  case CK_PentiumPro:
1539    break;
1540  case CK_PentiumMMX:
1541  case CK_Pentium2:
1542    setFeatureEnabled(Features, "mmx", true);
1543    break;
1544  case CK_Pentium3:
1545  case CK_Pentium3M:
1546    setFeatureEnabled(Features, "mmx", true);
1547    setFeatureEnabled(Features, "sse", true);
1548    break;
1549  case CK_PentiumM:
1550  case CK_Pentium4:
1551  case CK_Pentium4M:
1552  case CK_x86_64:
1553    setFeatureEnabled(Features, "mmx", true);
1554    setFeatureEnabled(Features, "sse2", true);
1555    break;
1556  case CK_Yonah:
1557  case CK_Prescott:
1558  case CK_Nocona:
1559    setFeatureEnabled(Features, "mmx", true);
1560    setFeatureEnabled(Features, "sse3", true);
1561    break;
1562  case CK_Core2:
1563    setFeatureEnabled(Features, "mmx", true);
1564    setFeatureEnabled(Features, "ssse3", true);
1565    break;
1566  case CK_Penryn:
1567    setFeatureEnabled(Features, "mmx", true);
1568    setFeatureEnabled(Features, "sse4.1", true);
1569    break;
1570  case CK_Atom:
1571    setFeatureEnabled(Features, "mmx", true);
1572    setFeatureEnabled(Features, "ssse3", true);
1573    break;
1574  case CK_Corei7:
1575    setFeatureEnabled(Features, "mmx", true);
1576    setFeatureEnabled(Features, "sse4", true);
1577    setFeatureEnabled(Features, "aes", true);
1578    break;
1579  case CK_Corei7AVX:
1580  case CK_CoreAVXi:
1581    setFeatureEnabled(Features, "mmx", true);
1582    setFeatureEnabled(Features, "sse4", true);
1583    setFeatureEnabled(Features, "aes", true);
1584    //setFeatureEnabled(Features, "avx", true);
1585    break;
1586  case CK_CoreAVX2:
1587    setFeatureEnabled(Features, "mmx", true);
1588    setFeatureEnabled(Features, "sse4", true);
1589    setFeatureEnabled(Features, "aes", true);
1590    setFeatureEnabled(Features, "lzcnt", true);
1591    setFeatureEnabled(Features, "bmi", true);
1592    setFeatureEnabled(Features, "bmi2", true);
1593    //setFeatureEnabled(Features, "avx2", true);
1594    break;
1595  case CK_K6:
1596  case CK_WinChipC6:
1597    setFeatureEnabled(Features, "mmx", true);
1598    break;
1599  case CK_K6_2:
1600  case CK_K6_3:
1601  case CK_WinChip2:
1602  case CK_C3:
1603    setFeatureEnabled(Features, "3dnow", true);
1604    break;
1605  case CK_Athlon:
1606  case CK_AthlonThunderbird:
1607  case CK_Geode:
1608    setFeatureEnabled(Features, "3dnowa", true);
1609    break;
1610  case CK_Athlon4:
1611  case CK_AthlonXP:
1612  case CK_AthlonMP:
1613    setFeatureEnabled(Features, "sse", true);
1614    setFeatureEnabled(Features, "3dnowa", true);
1615    break;
1616  case CK_K8:
1617  case CK_Opteron:
1618  case CK_Athlon64:
1619  case CK_AthlonFX:
1620    setFeatureEnabled(Features, "sse2", true);
1621    setFeatureEnabled(Features, "3dnowa", true);
1622    break;
1623  case CK_K8SSE3:
1624  case CK_OpteronSSE3:
1625  case CK_Athlon64SSE3:
1626    setFeatureEnabled(Features, "sse3", true);
1627    setFeatureEnabled(Features, "3dnowa", true);
1628    break;
1629  case CK_AMDFAM10:
1630    setFeatureEnabled(Features, "sse3", true);
1631    setFeatureEnabled(Features, "sse4a", true);
1632    setFeatureEnabled(Features, "3dnowa", true);
1633    break;
1634  case CK_BDVER1:
1635  case CK_BDVER2:
1636    setFeatureEnabled(Features, "sse4", true);
1637    setFeatureEnabled(Features, "sse4a", true);
1638    setFeatureEnabled(Features, "aes", true);
1639    break;
1640  case CK_C3_2:
1641    setFeatureEnabled(Features, "mmx", true);
1642    setFeatureEnabled(Features, "sse", true);
1643    break;
1644  }
1645}
1646
1647bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1648                                      const std::string &Name,
1649                                      bool Enabled) const {
1650  // FIXME: This *really* should not be here.  We need some way of translating
1651  // options into llvm subtarget features.
1652  if (!Features.count(Name) &&
1653      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1654    return false;
1655
1656  // FIXME: this should probably use a switch with fall through.
1657
1658  if (Enabled) {
1659    if (Name == "mmx")
1660      Features["mmx"] = true;
1661    else if (Name == "sse")
1662      Features["mmx"] = Features["sse"] = true;
1663    else if (Name == "sse2")
1664      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1665    else if (Name == "sse3")
1666      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1667        true;
1668    else if (Name == "ssse3")
1669      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1670        Features["ssse3"] = true;
1671    else if (Name == "sse4" || Name == "sse4.2")
1672      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1673        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1674        Features["popcnt"] = true;
1675    else if (Name == "sse4.1")
1676      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1677        Features["ssse3"] = Features["sse41"] = true;
1678    else if (Name == "3dnow")
1679      Features["mmx"] = Features["3dnow"] = true;
1680    else if (Name == "3dnowa")
1681      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
1682    else if (Name == "aes")
1683      Features["aes"] = true;
1684    else if (Name == "avx")
1685      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1686        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1687        Features["popcnt"] = Features["avx"] = true;
1688    else if (Name == "avx2")
1689      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1690        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1691        Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
1692    else if (Name == "fma4")
1693        Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1694        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1695        Features["popcnt"] = Features["avx"] = Features["fma4"] = true;
1696    else if (Name == "sse4a")
1697      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1698        Features["sse4a"] = true;
1699    else if (Name == "lzcnt")
1700      Features["lzcnt"] = true;
1701    else if (Name == "bmi")
1702      Features["bmi"] = true;
1703    else if (Name == "bmi2")
1704      Features["bmi2"] = true;
1705    else if (Name == "popcnt")
1706      Features["popcnt"] = true;
1707  } else {
1708    if (Name == "mmx")
1709      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
1710    else if (Name == "sse")
1711      Features["sse"] = Features["sse2"] = Features["sse3"] =
1712        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1713        Features["sse4a"] = false;
1714    else if (Name == "sse2")
1715      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1716        Features["sse41"] = Features["sse42"] = Features["sse4a"] = false;
1717    else if (Name == "sse3")
1718      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1719        Features["sse42"] = Features["sse4a"] = false;
1720    else if (Name == "ssse3")
1721      Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1722    else if (Name == "sse4" || Name == "sse4.1")
1723      Features["sse41"] = Features["sse42"] = false;
1724    else if (Name == "sse4.2")
1725      Features["sse42"] = false;
1726    else if (Name == "3dnow")
1727      Features["3dnow"] = Features["3dnowa"] = false;
1728    else if (Name == "3dnowa")
1729      Features["3dnowa"] = false;
1730    else if (Name == "aes")
1731      Features["aes"] = false;
1732    else if (Name == "avx")
1733      Features["avx"] = Features["avx2"] = Features["fma4"] = false;
1734    else if (Name == "avx2")
1735      Features["avx2"] = false;
1736    else if (Name == "sse4a")
1737      Features["sse4a"] = false;
1738    else if (Name == "lzcnt")
1739      Features["lzcnt"] = false;
1740    else if (Name == "bmi")
1741      Features["bmi"] = false;
1742    else if (Name == "bmi2")
1743      Features["bmi2"] = false;
1744    else if (Name == "popcnt")
1745      Features["popcnt"] = false;
1746    else if (Name == "fma4")
1747      Features["fma4"] = false;
1748  }
1749
1750  return true;
1751}
1752
1753/// HandleTargetOptions - Perform initialization based on the user
1754/// configured set of features.
1755void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1756  // Remember the maximum enabled sselevel.
1757  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1758    // Ignore disabled features.
1759    if (Features[i][0] == '-')
1760      continue;
1761
1762    if (Features[i].substr(1) == "aes") {
1763      HasAES = true;
1764      continue;
1765    }
1766
1767    if (Features[i].substr(1) == "lzcnt") {
1768      HasLZCNT = true;
1769      continue;
1770    }
1771
1772    if (Features[i].substr(1) == "bmi") {
1773      HasBMI = true;
1774      continue;
1775    }
1776
1777    if (Features[i].substr(1) == "bmi2") {
1778      HasBMI2 = true;
1779      continue;
1780    }
1781
1782    if (Features[i].substr(1) == "popcnt") {
1783      HasPOPCNT = true;
1784      continue;
1785    }
1786
1787    if (Features[i].substr(1) == "fma4") {
1788      HasFMA4 = true;
1789      continue;
1790    }
1791
1792    assert(Features[i][0] == '+' && "Invalid target feature!");
1793    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
1794      .Case("avx2", AVX2)
1795      .Case("avx", AVX)
1796      .Case("sse42", SSE42)
1797      .Case("sse41", SSE41)
1798      .Case("ssse3", SSSE3)
1799      .Case("sse3", SSE3)
1800      .Case("sse2", SSE2)
1801      .Case("sse", SSE1)
1802      .Default(NoSSE);
1803    SSELevel = std::max(SSELevel, Level);
1804
1805    MMX3DNowEnum ThreeDNowLevel =
1806      llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1))
1807        .Case("3dnowa", AMD3DNowAthlon)
1808        .Case("3dnow", AMD3DNow)
1809        .Case("mmx", MMX)
1810        .Default(NoMMX3DNow);
1811
1812    MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
1813  }
1814
1815  // Don't tell the backend if we're turning off mmx; it will end up disabling
1816  // SSE, which we don't want.
1817  std::vector<std::string>::iterator it;
1818  it = std::find(Features.begin(), Features.end(), "-mmx");
1819  if (it != Features.end())
1820    Features.erase(it);
1821}
1822
1823/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
1824/// definitions for this particular subtarget.
1825void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1826                                     MacroBuilder &Builder) const {
1827  // Target identification.
1828  if (PointerWidth == 64) {
1829    Builder.defineMacro("_LP64");
1830    Builder.defineMacro("__LP64__");
1831    Builder.defineMacro("__amd64__");
1832    Builder.defineMacro("__amd64");
1833    Builder.defineMacro("__x86_64");
1834    Builder.defineMacro("__x86_64__");
1835  } else {
1836    DefineStd(Builder, "i386", Opts);
1837  }
1838
1839  // Subtarget options.
1840  // FIXME: We are hard-coding the tune parameters based on the CPU, but they
1841  // truly should be based on -mtune options.
1842  switch (CPU) {
1843  case CK_Generic:
1844    break;
1845  case CK_i386:
1846    // The rest are coming from the i386 define above.
1847    Builder.defineMacro("__tune_i386__");
1848    break;
1849  case CK_i486:
1850  case CK_WinChipC6:
1851  case CK_WinChip2:
1852  case CK_C3:
1853    Builder.defineMacro("__i486");
1854    Builder.defineMacro("__i486__");
1855    Builder.defineMacro("__tune_i486__");
1856    break;
1857  case CK_PentiumMMX:
1858    Builder.defineMacro("__pentium_mmx__");
1859    Builder.defineMacro("__tune_pentium_mmx__");
1860    // Fallthrough
1861  case CK_i586:
1862  case CK_Pentium:
1863    Builder.defineMacro("__i586");
1864    Builder.defineMacro("__i586__");
1865    Builder.defineMacro("__tune_i586__");
1866    Builder.defineMacro("__pentium");
1867    Builder.defineMacro("__pentium__");
1868    Builder.defineMacro("__tune_pentium__");
1869    break;
1870  case CK_Pentium3:
1871  case CK_Pentium3M:
1872  case CK_PentiumM:
1873    Builder.defineMacro("__tune_pentium3__");
1874    // Fallthrough
1875  case CK_Pentium2:
1876  case CK_C3_2:
1877    Builder.defineMacro("__tune_pentium2__");
1878    // Fallthrough
1879  case CK_PentiumPro:
1880    Builder.defineMacro("__tune_i686__");
1881    Builder.defineMacro("__tune_pentiumpro__");
1882    // Fallthrough
1883  case CK_i686:
1884    Builder.defineMacro("__i686");
1885    Builder.defineMacro("__i686__");
1886    // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
1887    Builder.defineMacro("__pentiumpro");
1888    Builder.defineMacro("__pentiumpro__");
1889    break;
1890  case CK_Pentium4:
1891  case CK_Pentium4M:
1892    Builder.defineMacro("__pentium4");
1893    Builder.defineMacro("__pentium4__");
1894    Builder.defineMacro("__tune_pentium4__");
1895    break;
1896  case CK_Yonah:
1897  case CK_Prescott:
1898  case CK_Nocona:
1899    Builder.defineMacro("__nocona");
1900    Builder.defineMacro("__nocona__");
1901    Builder.defineMacro("__tune_nocona__");
1902    break;
1903  case CK_Core2:
1904  case CK_Penryn:
1905    Builder.defineMacro("__core2");
1906    Builder.defineMacro("__core2__");
1907    Builder.defineMacro("__tune_core2__");
1908    break;
1909  case CK_Atom:
1910    Builder.defineMacro("__atom");
1911    Builder.defineMacro("__atom__");
1912    Builder.defineMacro("__tune_atom__");
1913    break;
1914  case CK_Corei7:
1915  case CK_Corei7AVX:
1916  case CK_CoreAVXi:
1917  case CK_CoreAVX2:
1918    Builder.defineMacro("__corei7");
1919    Builder.defineMacro("__corei7__");
1920    Builder.defineMacro("__tune_corei7__");
1921    break;
1922  case CK_K6_2:
1923    Builder.defineMacro("__k6_2__");
1924    Builder.defineMacro("__tune_k6_2__");
1925    // Fallthrough
1926  case CK_K6_3:
1927    if (CPU != CK_K6_2) {  // In case of fallthrough
1928      // FIXME: GCC may be enabling these in cases where some other k6
1929      // architecture is specified but -m3dnow is explicitly provided. The
1930      // exact semantics need to be determined and emulated here.
1931      Builder.defineMacro("__k6_3__");
1932      Builder.defineMacro("__tune_k6_3__");
1933    }
1934    // Fallthrough
1935  case CK_K6:
1936    Builder.defineMacro("__k6");
1937    Builder.defineMacro("__k6__");
1938    Builder.defineMacro("__tune_k6__");
1939    break;
1940  case CK_Athlon:
1941  case CK_AthlonThunderbird:
1942  case CK_Athlon4:
1943  case CK_AthlonXP:
1944  case CK_AthlonMP:
1945    Builder.defineMacro("__athlon");
1946    Builder.defineMacro("__athlon__");
1947    Builder.defineMacro("__tune_athlon__");
1948    if (SSELevel != NoSSE) {
1949      Builder.defineMacro("__athlon_sse__");
1950      Builder.defineMacro("__tune_athlon_sse__");
1951    }
1952    break;
1953  case CK_K8:
1954  case CK_K8SSE3:
1955  case CK_x86_64:
1956  case CK_Opteron:
1957  case CK_OpteronSSE3:
1958  case CK_Athlon64:
1959  case CK_Athlon64SSE3:
1960  case CK_AthlonFX:
1961    Builder.defineMacro("__k8");
1962    Builder.defineMacro("__k8__");
1963    Builder.defineMacro("__tune_k8__");
1964    break;
1965  case CK_AMDFAM10:
1966    Builder.defineMacro("__amdfam10");
1967    Builder.defineMacro("__amdfam10__");
1968    Builder.defineMacro("__tune_amdfam10__");
1969    break;
1970  case CK_BDVER1:
1971    Builder.defineMacro("__bdver1");
1972    Builder.defineMacro("__bdver1__");
1973    Builder.defineMacro("__tune__bdver1__");
1974    break;
1975  case CK_BDVER2:
1976    Builder.defineMacro("__bdver2");
1977    Builder.defineMacro("__bdver2__");
1978    Builder.defineMacro("__tune__bdver2__");
1979    break;
1980  case CK_Geode:
1981    Builder.defineMacro("__geode");
1982    Builder.defineMacro("__geode__");
1983    Builder.defineMacro("__tune_geode__");
1984    break;
1985  }
1986
1987  // Target properties.
1988  Builder.defineMacro("__LITTLE_ENDIAN__");
1989  Builder.defineMacro("__REGISTER_PREFIX__", "");
1990
1991  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
1992  // functions in glibc header files that use FP Stack inline asm which the
1993  // backend can't deal with (PR879).
1994  Builder.defineMacro("__NO_MATH_INLINES");
1995
1996  if (HasAES)
1997    Builder.defineMacro("__AES__");
1998
1999  if (HasLZCNT)
2000    Builder.defineMacro("__LZCNT__");
2001
2002  if (HasBMI)
2003    Builder.defineMacro("__BMI__");
2004
2005  if (HasBMI2)
2006    Builder.defineMacro("__BMI2__");
2007
2008  if (HasPOPCNT)
2009    Builder.defineMacro("__POPCNT__");
2010
2011  if (HasFMA4)
2012    Builder.defineMacro("__FMA4__");
2013
2014  // Each case falls through to the previous one here.
2015  switch (SSELevel) {
2016  case AVX2:
2017    Builder.defineMacro("__AVX2__");
2018  case AVX:
2019    Builder.defineMacro("__AVX__");
2020  case SSE42:
2021    Builder.defineMacro("__SSE4_2__");
2022  case SSE41:
2023    Builder.defineMacro("__SSE4_1__");
2024  case SSSE3:
2025    Builder.defineMacro("__SSSE3__");
2026  case SSE3:
2027    Builder.defineMacro("__SSE3__");
2028  case SSE2:
2029    Builder.defineMacro("__SSE2__");
2030    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
2031  case SSE1:
2032    Builder.defineMacro("__SSE__");
2033    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
2034  case NoSSE:
2035    break;
2036  }
2037
2038  if (Opts.MicrosoftExt && PointerWidth == 32) {
2039    switch (SSELevel) {
2040    case AVX2:
2041    case AVX:
2042    case SSE42:
2043    case SSE41:
2044    case SSSE3:
2045    case SSE3:
2046    case SSE2:
2047      Builder.defineMacro("_M_IX86_FP", Twine(2));
2048      break;
2049    case SSE1:
2050      Builder.defineMacro("_M_IX86_FP", Twine(1));
2051      break;
2052    default:
2053      Builder.defineMacro("_M_IX86_FP", Twine(0));
2054    }
2055  }
2056
2057  // Each case falls through to the previous one here.
2058  switch (MMX3DNowLevel) {
2059  case AMD3DNowAthlon:
2060    Builder.defineMacro("__3dNOW_A__");
2061  case AMD3DNow:
2062    Builder.defineMacro("__3dNOW__");
2063  case MMX:
2064    Builder.defineMacro("__MMX__");
2065  case NoMMX3DNow:
2066    break;
2067  }
2068}
2069
2070
2071bool
2072X86TargetInfo::validateAsmConstraint(const char *&Name,
2073                                     TargetInfo::ConstraintInfo &Info) const {
2074  switch (*Name) {
2075  default: return false;
2076  case 'Y': // first letter of a pair:
2077    switch (*(Name+1)) {
2078    default: return false;
2079    case '0':  // First SSE register.
2080    case 't':  // Any SSE register, when SSE2 is enabled.
2081    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
2082    case 'm':  // any MMX register, when inter-unit moves enabled.
2083      break;   // falls through to setAllowsRegister.
2084  }
2085  case 'a': // eax.
2086  case 'b': // ebx.
2087  case 'c': // ecx.
2088  case 'd': // edx.
2089  case 'S': // esi.
2090  case 'D': // edi.
2091  case 'A': // edx:eax.
2092  case 'f': // any x87 floating point stack register.
2093  case 't': // top of floating point stack.
2094  case 'u': // second from top of floating point stack.
2095  case 'q': // Any register accessible as [r]l: a, b, c, and d.
2096  case 'y': // Any MMX register.
2097  case 'x': // Any SSE register.
2098  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2099  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2100  case 'l': // "Index" registers: any general register that can be used as an
2101            // index in a base+index memory access.
2102    Info.setAllowsRegister();
2103    return true;
2104  case 'C': // SSE floating point constant.
2105  case 'G': // x87 floating point constant.
2106  case 'e': // 32-bit signed integer constant for use with zero-extending
2107            // x86_64 instructions.
2108  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2109            // x86_64 instructions.
2110    return true;
2111  }
2112  return false;
2113}
2114
2115
2116std::string
2117X86TargetInfo::convertConstraint(const char *&Constraint) const {
2118  switch (*Constraint) {
2119  case 'a': return std::string("{ax}");
2120  case 'b': return std::string("{bx}");
2121  case 'c': return std::string("{cx}");
2122  case 'd': return std::string("{dx}");
2123  case 'S': return std::string("{si}");
2124  case 'D': return std::string("{di}");
2125  case 'p': // address
2126    return std::string("im");
2127  case 't': // top of floating point stack.
2128    return std::string("{st}");
2129  case 'u': // second from top of floating point stack.
2130    return std::string("{st(1)}"); // second from top of floating point stack.
2131  default:
2132    return std::string(1, *Constraint);
2133  }
2134}
2135} // end anonymous namespace
2136
2137namespace {
2138// X86-32 generic target
2139class X86_32TargetInfo : public X86TargetInfo {
2140public:
2141  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2142    DoubleAlign = LongLongAlign = 32;
2143    LongDoubleWidth = 96;
2144    LongDoubleAlign = 32;
2145    SuitableAlign = 128;
2146    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2147                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2148                        "a0:0:64-f80:32:32-n8:16:32-S128";
2149    SizeType = UnsignedInt;
2150    PtrDiffType = SignedInt;
2151    IntPtrType = SignedInt;
2152    RegParmMax = 3;
2153
2154    // Use fpret for all types.
2155    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2156                             (1 << TargetInfo::Double) |
2157                             (1 << TargetInfo::LongDouble));
2158
2159    // x86-32 has atomics up to 8 bytes
2160    // FIXME: Check that we actually have cmpxchg8b before setting
2161    // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2162    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2163  }
2164  virtual const char *getVAListDeclaration() const {
2165    return "typedef char* __builtin_va_list;";
2166  }
2167
2168  int getEHDataRegisterNumber(unsigned RegNo) const {
2169    if (RegNo == 0) return 0;
2170    if (RegNo == 1) return 2;
2171    return -1;
2172  }
2173};
2174} // end anonymous namespace
2175
2176namespace {
2177class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2178public:
2179  NetBSDI386TargetInfo(const std::string &triple) :
2180    NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2181  }
2182
2183  virtual unsigned getFloatEvalMethod() const {
2184    // NetBSD defaults to "double" rounding
2185    return 1;
2186  }
2187};
2188} // end anonymous namespace
2189
2190namespace {
2191class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2192public:
2193  OpenBSDI386TargetInfo(const std::string& triple) :
2194    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2195    SizeType = UnsignedLong;
2196    IntPtrType = SignedLong;
2197    PtrDiffType = SignedLong;
2198  }
2199};
2200} // end anonymous namespace
2201
2202namespace {
2203class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2204public:
2205  DarwinI386TargetInfo(const std::string& triple) :
2206    DarwinTargetInfo<X86_32TargetInfo>(triple) {
2207    LongDoubleWidth = 128;
2208    LongDoubleAlign = 128;
2209    SuitableAlign = 128;
2210    SizeType = UnsignedLong;
2211    IntPtrType = SignedLong;
2212    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2213                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2214                        "a0:0:64-f80:128:128-n8:16:32-S128";
2215    HasAlignMac68kSupport = true;
2216  }
2217
2218};
2219} // end anonymous namespace
2220
2221namespace {
2222// x86-32 Windows target
2223class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2224public:
2225  WindowsX86_32TargetInfo(const std::string& triple)
2226    : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2227    TLSSupported = false;
2228    WCharType = UnsignedShort;
2229    DoubleAlign = LongLongAlign = 64;
2230    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2231                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2232                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2233  }
2234  virtual void getTargetDefines(const LangOptions &Opts,
2235                                MacroBuilder &Builder) const {
2236    WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2237  }
2238};
2239} // end anonymous namespace
2240
2241namespace {
2242
2243// x86-32 Windows Visual Studio target
2244class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2245public:
2246  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2247    : WindowsX86_32TargetInfo(triple) {
2248    LongDoubleWidth = LongDoubleAlign = 64;
2249    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2250  }
2251  virtual void getTargetDefines(const LangOptions &Opts,
2252                                MacroBuilder &Builder) const {
2253    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2254    WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2255    // The value of the following reflects processor type.
2256    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2257    // We lost the original triple, so we use the default.
2258    Builder.defineMacro("_M_IX86", "600");
2259  }
2260};
2261} // end anonymous namespace
2262
2263namespace {
2264// x86-32 MinGW target
2265class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2266public:
2267  MinGWX86_32TargetInfo(const std::string& triple)
2268    : WindowsX86_32TargetInfo(triple) {
2269  }
2270  virtual void getTargetDefines(const LangOptions &Opts,
2271                                MacroBuilder &Builder) const {
2272    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2273    DefineStd(Builder, "WIN32", Opts);
2274    DefineStd(Builder, "WINNT", Opts);
2275    Builder.defineMacro("_X86_");
2276    Builder.defineMacro("__MSVCRT__");
2277    Builder.defineMacro("__MINGW32__");
2278
2279    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2280    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2281    if (Opts.MicrosoftExt)
2282      // Provide "as-is" __declspec.
2283      Builder.defineMacro("__declspec", "__declspec");
2284    else
2285      // Provide alias of __attribute__ like mingw32-gcc.
2286      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2287  }
2288};
2289} // end anonymous namespace
2290
2291namespace {
2292// x86-32 Cygwin target
2293class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2294public:
2295  CygwinX86_32TargetInfo(const std::string& triple)
2296    : X86_32TargetInfo(triple) {
2297    TLSSupported = false;
2298    WCharType = UnsignedShort;
2299    DoubleAlign = LongLongAlign = 64;
2300    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2301                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2302                        "a0:0:64-f80:32:32-n8:16:32-S32";
2303  }
2304  virtual void getTargetDefines(const LangOptions &Opts,
2305                                MacroBuilder &Builder) const {
2306    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2307    Builder.defineMacro("__CYGWIN__");
2308    Builder.defineMacro("__CYGWIN32__");
2309    DefineStd(Builder, "unix", Opts);
2310    if (Opts.CPlusPlus)
2311      Builder.defineMacro("_GNU_SOURCE");
2312  }
2313};
2314} // end anonymous namespace
2315
2316namespace {
2317// x86-32 Haiku target
2318class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2319public:
2320  HaikuX86_32TargetInfo(const std::string& triple)
2321    : X86_32TargetInfo(triple) {
2322    SizeType = UnsignedLong;
2323    IntPtrType = SignedLong;
2324    PtrDiffType = SignedLong;
2325    this->UserLabelPrefix = "";
2326  }
2327  virtual void getTargetDefines(const LangOptions &Opts,
2328                                MacroBuilder &Builder) const {
2329    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2330    Builder.defineMacro("__INTEL__");
2331    Builder.defineMacro("__HAIKU__");
2332  }
2333};
2334} // end anonymous namespace
2335
2336// RTEMS Target
2337template<typename Target>
2338class RTEMSTargetInfo : public OSTargetInfo<Target> {
2339protected:
2340  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2341                            MacroBuilder &Builder) const {
2342    // RTEMS defines; list based off of gcc output
2343
2344    Builder.defineMacro("__rtems__");
2345    Builder.defineMacro("__ELF__");
2346  }
2347public:
2348  RTEMSTargetInfo(const std::string &triple)
2349    : OSTargetInfo<Target>(triple) {
2350      this->UserLabelPrefix = "";
2351
2352      llvm::Triple Triple(triple);
2353      switch (Triple.getArch()) {
2354        default:
2355        case llvm::Triple::x86:
2356          // this->MCountName = ".mcount";
2357          break;
2358        case llvm::Triple::mips:
2359        case llvm::Triple::mipsel:
2360        case llvm::Triple::ppc:
2361        case llvm::Triple::ppc64:
2362          // this->MCountName = "_mcount";
2363          break;
2364        case llvm::Triple::arm:
2365          // this->MCountName = "__mcount";
2366          break;
2367      }
2368
2369    }
2370};
2371
2372namespace {
2373// x86-32 RTEMS target
2374class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2375public:
2376  RTEMSX86_32TargetInfo(const std::string& triple)
2377    : X86_32TargetInfo(triple) {
2378    SizeType = UnsignedLong;
2379    IntPtrType = SignedLong;
2380    PtrDiffType = SignedLong;
2381    this->UserLabelPrefix = "";
2382  }
2383  virtual void getTargetDefines(const LangOptions &Opts,
2384                                MacroBuilder &Builder) const {
2385    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2386    Builder.defineMacro("__INTEL__");
2387    Builder.defineMacro("__rtems__");
2388  }
2389};
2390} // end anonymous namespace
2391
2392namespace {
2393// x86-64 generic target
2394class X86_64TargetInfo : public X86TargetInfo {
2395public:
2396  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2397    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2398    LongDoubleWidth = 128;
2399    LongDoubleAlign = 128;
2400    LargeArrayMinWidth = 128;
2401    LargeArrayAlign = 128;
2402    SuitableAlign = 128;
2403    IntMaxType = SignedLong;
2404    UIntMaxType = UnsignedLong;
2405    Int64Type = SignedLong;
2406    RegParmMax = 6;
2407
2408    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2409                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2410                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2411
2412    // Use fpret only for long double.
2413    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2414
2415    // Use fp2ret for _Complex long double.
2416    ComplexLongDoubleUsesFP2Ret = true;
2417
2418    // x86-64 has atomics up to 16 bytes.
2419    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2420    // on CPUs with cmpxchg16b
2421    MaxAtomicPromoteWidth = 128;
2422    MaxAtomicInlineWidth = 64;
2423  }
2424  virtual const char *getVAListDeclaration() const {
2425    return "typedef struct __va_list_tag {"
2426           "  unsigned gp_offset;"
2427           "  unsigned fp_offset;"
2428           "  void* overflow_arg_area;"
2429           "  void* reg_save_area;"
2430           "} __va_list_tag;"
2431           "typedef __va_list_tag __builtin_va_list[1];";
2432  }
2433
2434  int getEHDataRegisterNumber(unsigned RegNo) const {
2435    if (RegNo == 0) return 0;
2436    if (RegNo == 1) return 1;
2437    return -1;
2438  }
2439};
2440} // end anonymous namespace
2441
2442namespace {
2443// x86-64 Windows target
2444class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2445public:
2446  WindowsX86_64TargetInfo(const std::string& triple)
2447    : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2448    TLSSupported = false;
2449    WCharType = UnsignedShort;
2450    LongWidth = LongAlign = 32;
2451    DoubleAlign = LongLongAlign = 64;
2452    IntMaxType = SignedLongLong;
2453    UIntMaxType = UnsignedLongLong;
2454    Int64Type = SignedLongLong;
2455    SizeType = UnsignedLongLong;
2456    PtrDiffType = SignedLongLong;
2457    IntPtrType = SignedLongLong;
2458    this->UserLabelPrefix = "";
2459  }
2460  virtual void getTargetDefines(const LangOptions &Opts,
2461                                MacroBuilder &Builder) const {
2462    WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2463    Builder.defineMacro("_WIN64");
2464  }
2465  virtual const char *getVAListDeclaration() const {
2466    return "typedef char* __builtin_va_list;";
2467  }
2468};
2469} // end anonymous namespace
2470
2471namespace {
2472// x86-64 Windows Visual Studio target
2473class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2474public:
2475  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2476    : WindowsX86_64TargetInfo(triple) {
2477    LongDoubleWidth = LongDoubleAlign = 64;
2478    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2479  }
2480  virtual void getTargetDefines(const LangOptions &Opts,
2481                                MacroBuilder &Builder) const {
2482    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2483    WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2484    Builder.defineMacro("_M_X64");
2485    Builder.defineMacro("_M_AMD64");
2486  }
2487};
2488} // end anonymous namespace
2489
2490namespace {
2491// x86-64 MinGW target
2492class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2493public:
2494  MinGWX86_64TargetInfo(const std::string& triple)
2495    : WindowsX86_64TargetInfo(triple) {
2496  }
2497  virtual void getTargetDefines(const LangOptions &Opts,
2498                                MacroBuilder &Builder) const {
2499    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2500    DefineStd(Builder, "WIN64", Opts);
2501    Builder.defineMacro("__MSVCRT__");
2502    Builder.defineMacro("__MINGW32__");
2503    Builder.defineMacro("__MINGW64__");
2504
2505    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2506    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2507    if (Opts.MicrosoftExt)
2508      // Provide "as-is" __declspec.
2509      Builder.defineMacro("__declspec", "__declspec");
2510    else
2511      // Provide alias of __attribute__ like mingw32-gcc.
2512      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2513  }
2514};
2515} // end anonymous namespace
2516
2517namespace {
2518class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2519public:
2520  DarwinX86_64TargetInfo(const std::string& triple)
2521      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2522    Int64Type = SignedLongLong;
2523  }
2524};
2525} // end anonymous namespace
2526
2527namespace {
2528class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2529public:
2530  OpenBSDX86_64TargetInfo(const std::string& triple)
2531      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2532    IntMaxType = SignedLongLong;
2533    UIntMaxType = UnsignedLongLong;
2534    Int64Type = SignedLongLong;
2535  }
2536};
2537} // end anonymous namespace
2538
2539namespace {
2540class ARMTargetInfo : public TargetInfo {
2541  // Possible FPU choices.
2542  enum FPUMode {
2543    NoFPU,
2544    VFP2FPU,
2545    VFP3FPU,
2546    NeonFPU
2547  };
2548
2549  static bool FPUModeIsVFP(FPUMode Mode) {
2550    return Mode >= VFP2FPU && Mode <= NeonFPU;
2551  }
2552
2553  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2554  static const char * const GCCRegNames[];
2555
2556  std::string ABI, CPU;
2557
2558  unsigned FPU : 3;
2559
2560  unsigned IsThumb : 1;
2561
2562  // Initialized via features.
2563  unsigned SoftFloat : 1;
2564  unsigned SoftFloatABI : 1;
2565
2566  static const Builtin::Info BuiltinInfo[];
2567
2568public:
2569  ARMTargetInfo(const std::string &TripleStr)
2570    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
2571  {
2572    BigEndian = false;
2573    SizeType = UnsignedInt;
2574    PtrDiffType = SignedInt;
2575    // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
2576    WCharType = UnsignedInt;
2577
2578    // {} in inline assembly are neon specifiers, not assembly variant
2579    // specifiers.
2580    NoAsmVariants = true;
2581
2582    // FIXME: Should we just treat this as a feature?
2583    IsThumb = getTriple().getArchName().startswith("thumb");
2584    if (IsThumb) {
2585      // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2586      // so set preferred for small types to 32.
2587      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2588                           "i64:64:64-f32:32:32-f64:64:64-"
2589                           "v64:64:64-v128:64:128-a0:0:32-n32-S64");
2590    } else {
2591      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2592                           "i64:64:64-f32:32:32-f64:64:64-"
2593                           "v64:64:64-v128:64:128-a0:0:64-n32-S64");
2594    }
2595
2596    // ARM targets default to using the ARM C++ ABI.
2597    CXXABI = CXXABI_ARM;
2598
2599    // ARM has atomics up to 8 bytes
2600    // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
2601    MaxAtomicPromoteWidth = 64;
2602  }
2603  virtual const char *getABI() const { return ABI.c_str(); }
2604  virtual bool setABI(const std::string &Name) {
2605    ABI = Name;
2606
2607    // The defaults (above) are for AAPCS, check if we need to change them.
2608    //
2609    // FIXME: We need support for -meabi... we could just mangle it into the
2610    // name.
2611    if (Name == "apcs-gnu") {
2612      DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
2613      SizeType = UnsignedLong;
2614
2615      // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
2616      WCharType = SignedInt;
2617
2618      // Do not respect the alignment of bit-field types when laying out
2619      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
2620      UseBitFieldTypeAlignment = false;
2621
2622      /// Do force alignment of members that follow zero length bitfields.  If
2623      /// the alignment of the zero-length bitfield is greater than the member
2624      /// that follows it, `bar', `bar' will be aligned as the  type of the
2625      /// zero length bitfield.
2626      UseZeroLengthBitfieldAlignment = true;
2627
2628      /// gcc forces the alignment to 4 bytes, regardless of the type of the
2629      /// zero length bitfield.  This corresponds to EMPTY_FIELD_BOUNDARY in
2630      /// gcc.
2631      ZeroLengthBitfieldBoundary = 32;
2632
2633      if (IsThumb) {
2634        // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2635        // so set preferred for small types to 32.
2636        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2637                             "i64:32:64-f32:32:32-f64:32:64-"
2638                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2639      } else {
2640        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2641                             "i64:32:64-f32:32:32-f64:32:64-"
2642                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2643      }
2644
2645      // FIXME: Override "preferred align" for double and long long.
2646    } else if (Name == "aapcs") {
2647      // FIXME: Enumerated types are variable width in straight AAPCS.
2648    } else if (Name == "aapcs-linux") {
2649      ;
2650    } else
2651      return false;
2652
2653    return true;
2654  }
2655
2656  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
2657    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
2658      Features["vfp2"] = true;
2659    else if (CPU == "cortex-a8" || CPU == "cortex-a9")
2660      Features["neon"] = true;
2661  }
2662
2663  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2664                                 const std::string &Name,
2665                                 bool Enabled) const {
2666    if (Name == "soft-float" || Name == "soft-float-abi" ||
2667        Name == "vfp2" || Name == "vfp3" || Name == "neon") {
2668      Features[Name] = Enabled;
2669    } else
2670      return false;
2671
2672    return true;
2673  }
2674
2675  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2676    FPU = NoFPU;
2677    SoftFloat = SoftFloatABI = false;
2678    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
2679      if (Features[i] == "+soft-float")
2680        SoftFloat = true;
2681      else if (Features[i] == "+soft-float-abi")
2682        SoftFloatABI = true;
2683      else if (Features[i] == "+vfp2")
2684        FPU = VFP2FPU;
2685      else if (Features[i] == "+vfp3")
2686        FPU = VFP3FPU;
2687      else if (Features[i] == "+neon")
2688        FPU = NeonFPU;
2689    }
2690
2691    // Remove front-end specific options which the backend handles differently.
2692    std::vector<std::string>::iterator it;
2693    it = std::find(Features.begin(), Features.end(), "+soft-float");
2694    if (it != Features.end())
2695      Features.erase(it);
2696    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
2697    if (it != Features.end())
2698      Features.erase(it);
2699  }
2700
2701  static const char *getCPUDefineSuffix(StringRef Name) {
2702    return llvm::StringSwitch<const char*>(Name)
2703      .Cases("arm8", "arm810", "4")
2704      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
2705      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
2706      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
2707      .Case("ep9312", "4T")
2708      .Cases("arm10tdmi", "arm1020t", "5T")
2709      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
2710      .Case("arm926ej-s", "5TEJ")
2711      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
2712      .Cases("xscale", "iwmmxt", "5TE")
2713      .Case("arm1136j-s", "6J")
2714      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
2715      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
2716      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
2717      .Cases("cortex-a8", "cortex-a9", "7A")
2718      .Case("cortex-m3", "7M")
2719      .Case("cortex-m0", "6M")
2720      .Default(0);
2721  }
2722  virtual bool setCPU(const std::string &Name) {
2723    if (!getCPUDefineSuffix(Name))
2724      return false;
2725
2726    CPU = Name;
2727    return true;
2728  }
2729  virtual void getTargetDefines(const LangOptions &Opts,
2730                                MacroBuilder &Builder) const {
2731    // Target identification.
2732    Builder.defineMacro("__arm");
2733    Builder.defineMacro("__arm__");
2734
2735    // Target properties.
2736    Builder.defineMacro("__ARMEL__");
2737    Builder.defineMacro("__LITTLE_ENDIAN__");
2738    Builder.defineMacro("__REGISTER_PREFIX__", "");
2739
2740    StringRef CPUArch = getCPUDefineSuffix(CPU);
2741    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
2742
2743    // Subtarget options.
2744
2745    // FIXME: It's more complicated than this and we don't really support
2746    // interworking.
2747    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
2748      Builder.defineMacro("__THUMB_INTERWORK__");
2749
2750    if (ABI == "aapcs" || ABI == "aapcs-linux")
2751      Builder.defineMacro("__ARM_EABI__");
2752
2753    if (SoftFloat)
2754      Builder.defineMacro("__SOFTFP__");
2755
2756    if (CPU == "xscale")
2757      Builder.defineMacro("__XSCALE__");
2758
2759    bool IsARMv7 = CPUArch.startswith("7");
2760    if (IsThumb) {
2761      Builder.defineMacro("__THUMBEL__");
2762      Builder.defineMacro("__thumb__");
2763      if (CPUArch == "6T2" || IsARMv7)
2764        Builder.defineMacro("__thumb2__");
2765    }
2766
2767    // Note, this is always on in gcc, even though it doesn't make sense.
2768    Builder.defineMacro("__APCS_32__");
2769
2770    if (FPUModeIsVFP((FPUMode) FPU))
2771      Builder.defineMacro("__VFP_FP__");
2772
2773    // This only gets set when Neon instructions are actually available, unlike
2774    // the VFP define, hence the soft float and arch check. This is subtly
2775    // different from gcc, we follow the intent which was that it should be set
2776    // when Neon instructions are actually available.
2777    if (FPU == NeonFPU && !SoftFloat && IsARMv7)
2778      Builder.defineMacro("__ARM_NEON__");
2779  }
2780  virtual void getTargetBuiltins(const Builtin::Info *&Records,
2781                                 unsigned &NumRecords) const {
2782    Records = BuiltinInfo;
2783    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
2784  }
2785  virtual const char *getVAListDeclaration() const {
2786    return "typedef void* __builtin_va_list;";
2787  }
2788  virtual void getGCCRegNames(const char * const *&Names,
2789                              unsigned &NumNames) const;
2790  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2791                                unsigned &NumAliases) const;
2792  virtual bool validateAsmConstraint(const char *&Name,
2793                                     TargetInfo::ConstraintInfo &Info) const {
2794    // FIXME: Check if this is complete
2795    switch (*Name) {
2796    default:
2797    case 'l': // r0-r7
2798    case 'h': // r8-r15
2799    case 'w': // VFP Floating point register single precision
2800    case 'P': // VFP Floating point register double precision
2801      Info.setAllowsRegister();
2802      return true;
2803    case 'Q': // A memory address that is a single base register.
2804      Info.setAllowsMemory();
2805      return true;
2806    case 'U': // a memory reference...
2807      switch (Name[1]) {
2808      case 'q': // ...ARMV4 ldrsb
2809      case 'v': // ...VFP load/store (reg+constant offset)
2810      case 'y': // ...iWMMXt load/store
2811      case 't': // address valid for load/store opaque types wider
2812	        // than 128-bits
2813      case 'n': // valid address for Neon doubleword vector load/store
2814      case 'm': // valid address for Neon element and structure load/store
2815      case 's': // valid address for non-offset loads/stores of quad-word
2816	        // values in four ARM registers
2817        Info.setAllowsMemory();
2818        Name++;
2819        return true;
2820      }
2821    }
2822    return false;
2823  }
2824  virtual std::string convertConstraint(const char *&Constraint) const {
2825    std::string R;
2826    switch (*Constraint) {
2827    case 'U':   // Two-character constraint; add "^" hint for later parsing.
2828      R = std::string("^") + std::string(Constraint, 2);
2829      Constraint++;
2830      break;
2831    case 'p': // 'p' should be translated to 'r' by default.
2832      R = std::string("r");
2833      break;
2834    default:
2835      return std::string(1, *Constraint);
2836    }
2837    return R;
2838  }
2839  virtual const char *getClobbers() const {
2840    // FIXME: Is this really right?
2841    return "";
2842  }
2843};
2844
2845const char * const ARMTargetInfo::GCCRegNames[] = {
2846  // Integer registers
2847  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2848  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
2849
2850  // Float registers
2851  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
2852  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
2853  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
2854  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
2855
2856  // Double registers
2857  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
2858  "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
2859  "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
2860  "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
2861
2862  // Quad registers
2863  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
2864  "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
2865};
2866
2867void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
2868                                   unsigned &NumNames) const {
2869  Names = GCCRegNames;
2870  NumNames = llvm::array_lengthof(GCCRegNames);
2871}
2872
2873const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
2874  { { "a1" }, "r0" },
2875  { { "a2" }, "r1" },
2876  { { "a3" }, "r2" },
2877  { { "a4" }, "r3" },
2878  { { "v1" }, "r4" },
2879  { { "v2" }, "r5" },
2880  { { "v3" }, "r6" },
2881  { { "v4" }, "r7" },
2882  { { "v5" }, "r8" },
2883  { { "v6", "rfp" }, "r9" },
2884  { { "sl" }, "r10" },
2885  { { "fp" }, "r11" },
2886  { { "ip" }, "r12" },
2887  { { "r13" }, "sp" },
2888  { { "r14" }, "lr" },
2889  { { "r15" }, "pc" },
2890  // The S, D and Q registers overlap, but aren't really aliases; we
2891  // don't want to substitute one of these for a different-sized one.
2892};
2893
2894void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2895                                       unsigned &NumAliases) const {
2896  Aliases = GCCRegAliases;
2897  NumAliases = llvm::array_lengthof(GCCRegAliases);
2898}
2899
2900const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
2901#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
2902#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
2903                                              ALL_LANGUAGES },
2904#include "clang/Basic/BuiltinsARM.def"
2905};
2906} // end anonymous namespace.
2907
2908namespace {
2909class DarwinARMTargetInfo :
2910  public DarwinTargetInfo<ARMTargetInfo> {
2911protected:
2912  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2913                            MacroBuilder &Builder) const {
2914    getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
2915  }
2916
2917public:
2918  DarwinARMTargetInfo(const std::string& triple)
2919    : DarwinTargetInfo<ARMTargetInfo>(triple) {
2920    HasAlignMac68kSupport = true;
2921    // iOS always has 64-bit atomic instructions.
2922    // FIXME: This should be based off of the target features in ARMTargetInfo.
2923    MaxAtomicInlineWidth = 64;
2924  }
2925};
2926} // end anonymous namespace.
2927
2928
2929namespace {
2930// Hexagon abstract base class
2931class HexagonTargetInfo : public TargetInfo {
2932  static const Builtin::Info BuiltinInfo[];
2933  static const char * const GCCRegNames[];
2934  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2935  std::string CPU;
2936public:
2937  HexagonTargetInfo(const std::string& triple) : TargetInfo(triple)  {
2938    BigEndian = false;
2939    DescriptionString = ("e-p:32:32:32-"
2940                         "i64:64:64-i32:32:32-"
2941                         "i16:16:16-i1:32:32-a:0:0");
2942
2943    // {} in inline assembly are packet specifiers, not assembly variant
2944    // specifiers.
2945    NoAsmVariants = true;
2946  }
2947
2948  virtual void getTargetBuiltins(const Builtin::Info *&Records,
2949                                 unsigned &NumRecords) const {
2950    Records = BuiltinInfo;
2951    NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
2952  }
2953
2954  virtual bool validateAsmConstraint(const char *&Name,
2955                                     TargetInfo::ConstraintInfo &Info) const {
2956    return true;
2957  }
2958
2959  virtual void getTargetDefines(const LangOptions &Opts,
2960                                MacroBuilder &Builder) const;
2961
2962  virtual const char *getVAListDeclaration() const {
2963    return "typedef char* __builtin_va_list;";
2964  }
2965  virtual void getGCCRegNames(const char * const *&Names,
2966                              unsigned &NumNames) const;
2967  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2968                                unsigned &NumAliases) const;
2969  virtual const char *getClobbers() const {
2970    return "";
2971  }
2972  virtual bool setCPU(const std::string &Name) {
2973    CPU = Name;
2974    return true;
2975  }
2976};
2977
2978void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
2979                                MacroBuilder &Builder) const {
2980  Builder.defineMacro("qdsp6");
2981  Builder.defineMacro("__qdsp6", "1");
2982  Builder.defineMacro("__qdsp6__", "1");
2983
2984  Builder.defineMacro("hexagon");
2985  Builder.defineMacro("__hexagon", "1");
2986  Builder.defineMacro("__hexagon__", "1");
2987
2988  if(CPU == "hexagonv1") {
2989    Builder.defineMacro("__HEXAGON_V1__");
2990    Builder.defineMacro("__HEXAGON_ARCH__", "1");
2991    if(Opts.HexagonQdsp6Compat) {
2992      Builder.defineMacro("__QDSP6_V1__");
2993      Builder.defineMacro("__QDSP6_ARCH__", "1");
2994    }
2995  }
2996  else if(CPU == "hexagonv2") {
2997    Builder.defineMacro("__HEXAGON_V2__");
2998    Builder.defineMacro("__HEXAGON_ARCH__", "2");
2999    if(Opts.HexagonQdsp6Compat) {
3000      Builder.defineMacro("__QDSP6_V2__");
3001      Builder.defineMacro("__QDSP6_ARCH__", "2");
3002    }
3003  }
3004  else if(CPU == "hexagonv3") {
3005    Builder.defineMacro("__HEXAGON_V3__");
3006    Builder.defineMacro("__HEXAGON_ARCH__", "3");
3007    if(Opts.HexagonQdsp6Compat) {
3008      Builder.defineMacro("__QDSP6_V3__");
3009      Builder.defineMacro("__QDSP6_ARCH__", "3");
3010    }
3011  }
3012  else if(CPU == "hexagonv4") {
3013    Builder.defineMacro("__HEXAGON_V4__");
3014    Builder.defineMacro("__HEXAGON_ARCH__", "4");
3015    if(Opts.HexagonQdsp6Compat) {
3016      Builder.defineMacro("__QDSP6_V4__");
3017      Builder.defineMacro("__QDSP6_ARCH__", "4");
3018    }
3019  }
3020}
3021
3022const char * const HexagonTargetInfo::GCCRegNames[] = {
3023  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3024  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3025  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3026  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3027  "p0", "p1", "p2", "p3",
3028  "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3029};
3030
3031void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3032                                   unsigned &NumNames) const {
3033  Names = GCCRegNames;
3034  NumNames = llvm::array_lengthof(GCCRegNames);
3035}
3036
3037
3038const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3039  { { "sp" }, "r29" },
3040  { { "fp" }, "r30" },
3041  { { "lr" }, "r31" },
3042 };
3043
3044void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3045                                     unsigned &NumAliases) const {
3046  Aliases = GCCRegAliases;
3047  NumAliases = llvm::array_lengthof(GCCRegAliases);
3048}
3049
3050
3051const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3052#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3053#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3054                                              ALL_LANGUAGES },
3055#include "clang/Basic/BuiltinsHexagon.def"
3056};
3057}
3058
3059
3060namespace {
3061class SparcV8TargetInfo : public TargetInfo {
3062  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3063  static const char * const GCCRegNames[];
3064  bool SoftFloat;
3065public:
3066  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3067    // FIXME: Support Sparc quad-precision long double?
3068    BigEndian = false;
3069    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3070                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3071  }
3072  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3073                                 const std::string &Name,
3074                                 bool Enabled) const {
3075    if (Name == "soft-float")
3076      Features[Name] = Enabled;
3077    else
3078      return false;
3079
3080    return true;
3081  }
3082  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3083    SoftFloat = false;
3084    for (unsigned i = 0, e = Features.size(); i != e; ++i)
3085      if (Features[i] == "+soft-float")
3086        SoftFloat = true;
3087  }
3088  virtual void getTargetDefines(const LangOptions &Opts,
3089                                MacroBuilder &Builder) const {
3090    DefineStd(Builder, "sparc", Opts);
3091    Builder.defineMacro("__sparcv8");
3092    Builder.defineMacro("__REGISTER_PREFIX__", "");
3093
3094    if (SoftFloat)
3095      Builder.defineMacro("SOFT_FLOAT", "1");
3096  }
3097  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3098                                 unsigned &NumRecords) const {
3099    // FIXME: Implement!
3100  }
3101  virtual const char *getVAListDeclaration() const {
3102    return "typedef void* __builtin_va_list;";
3103  }
3104  virtual void getGCCRegNames(const char * const *&Names,
3105                              unsigned &NumNames) const;
3106  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3107                                unsigned &NumAliases) const;
3108  virtual bool validateAsmConstraint(const char *&Name,
3109                                     TargetInfo::ConstraintInfo &info) const {
3110    // FIXME: Implement!
3111    return false;
3112  }
3113  virtual const char *getClobbers() const {
3114    // FIXME: Implement!
3115    return "";
3116  }
3117};
3118
3119const char * const SparcV8TargetInfo::GCCRegNames[] = {
3120  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3121  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3122  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3123  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3124};
3125
3126void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3127                                       unsigned &NumNames) const {
3128  Names = GCCRegNames;
3129  NumNames = llvm::array_lengthof(GCCRegNames);
3130}
3131
3132const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3133  { { "g0" }, "r0" },
3134  { { "g1" }, "r1" },
3135  { { "g2" }, "r2" },
3136  { { "g3" }, "r3" },
3137  { { "g4" }, "r4" },
3138  { { "g5" }, "r5" },
3139  { { "g6" }, "r6" },
3140  { { "g7" }, "r7" },
3141  { { "o0" }, "r8" },
3142  { { "o1" }, "r9" },
3143  { { "o2" }, "r10" },
3144  { { "o3" }, "r11" },
3145  { { "o4" }, "r12" },
3146  { { "o5" }, "r13" },
3147  { { "o6", "sp" }, "r14" },
3148  { { "o7" }, "r15" },
3149  { { "l0" }, "r16" },
3150  { { "l1" }, "r17" },
3151  { { "l2" }, "r18" },
3152  { { "l3" }, "r19" },
3153  { { "l4" }, "r20" },
3154  { { "l5" }, "r21" },
3155  { { "l6" }, "r22" },
3156  { { "l7" }, "r23" },
3157  { { "i0" }, "r24" },
3158  { { "i1" }, "r25" },
3159  { { "i2" }, "r26" },
3160  { { "i3" }, "r27" },
3161  { { "i4" }, "r28" },
3162  { { "i5" }, "r29" },
3163  { { "i6", "fp" }, "r30" },
3164  { { "i7" }, "r31" },
3165};
3166
3167void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3168                                         unsigned &NumAliases) const {
3169  Aliases = GCCRegAliases;
3170  NumAliases = llvm::array_lengthof(GCCRegAliases);
3171}
3172} // end anonymous namespace.
3173
3174namespace {
3175class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3176public:
3177  AuroraUXSparcV8TargetInfo(const std::string& triple) :
3178      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3179    SizeType = UnsignedInt;
3180    PtrDiffType = SignedInt;
3181  }
3182};
3183class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3184public:
3185  SolarisSparcV8TargetInfo(const std::string& triple) :
3186      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3187    SizeType = UnsignedInt;
3188    PtrDiffType = SignedInt;
3189  }
3190};
3191} // end anonymous namespace.
3192
3193namespace {
3194  class MSP430TargetInfo : public TargetInfo {
3195    static const char * const GCCRegNames[];
3196  public:
3197    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3198      BigEndian = false;
3199      TLSSupported = false;
3200      IntWidth = 16; IntAlign = 16;
3201      LongWidth = 32; LongLongWidth = 64;
3202      LongAlign = LongLongAlign = 16;
3203      PointerWidth = 16; PointerAlign = 16;
3204      SuitableAlign = 16;
3205      SizeType = UnsignedInt;
3206      IntMaxType = SignedLong;
3207      UIntMaxType = UnsignedLong;
3208      IntPtrType = SignedShort;
3209      PtrDiffType = SignedInt;
3210      SigAtomicType = SignedLong;
3211      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3212   }
3213    virtual void getTargetDefines(const LangOptions &Opts,
3214                                  MacroBuilder &Builder) const {
3215      Builder.defineMacro("MSP430");
3216      Builder.defineMacro("__MSP430__");
3217      // FIXME: defines for different 'flavours' of MCU
3218    }
3219    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3220                                   unsigned &NumRecords) const {
3221     // FIXME: Implement.
3222      Records = 0;
3223      NumRecords = 0;
3224    }
3225    virtual void getGCCRegNames(const char * const *&Names,
3226                                unsigned &NumNames) const;
3227    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3228                                  unsigned &NumAliases) const {
3229      // No aliases.
3230      Aliases = 0;
3231      NumAliases = 0;
3232    }
3233    virtual bool validateAsmConstraint(const char *&Name,
3234                                       TargetInfo::ConstraintInfo &info) const {
3235      // No target constraints for now.
3236      return false;
3237    }
3238    virtual const char *getClobbers() const {
3239      // FIXME: Is this really right?
3240      return "";
3241    }
3242    virtual const char *getVAListDeclaration() const {
3243      // FIXME: implement
3244      return "typedef char* __builtin_va_list;";
3245   }
3246  };
3247
3248  const char * const MSP430TargetInfo::GCCRegNames[] = {
3249    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3250    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3251  };
3252
3253  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3254                                        unsigned &NumNames) const {
3255    Names = GCCRegNames;
3256    NumNames = llvm::array_lengthof(GCCRegNames);
3257  }
3258}
3259
3260namespace {
3261
3262  // LLVM and Clang cannot be used directly to output native binaries for
3263  // target, but is used to compile C code to llvm bitcode with correct
3264  // type and alignment information.
3265  //
3266  // TCE uses the llvm bitcode as input and uses it for generating customized
3267  // target processor and program binary. TCE co-design environment is
3268  // publicly available in http://tce.cs.tut.fi
3269
3270  static const unsigned TCEOpenCLAddrSpaceMap[] = {
3271      3, // opencl_global
3272      4, // opencl_local
3273      5  // opencl_constant
3274  };
3275
3276  class TCETargetInfo : public TargetInfo{
3277  public:
3278    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3279      TLSSupported = false;
3280      IntWidth = 32;
3281      LongWidth = LongLongWidth = 32;
3282      PointerWidth = 32;
3283      IntAlign = 32;
3284      LongAlign = LongLongAlign = 32;
3285      PointerAlign = 32;
3286      SuitableAlign = 32;
3287      SizeType = UnsignedInt;
3288      IntMaxType = SignedLong;
3289      UIntMaxType = UnsignedLong;
3290      IntPtrType = SignedInt;
3291      PtrDiffType = SignedInt;
3292      FloatWidth = 32;
3293      FloatAlign = 32;
3294      DoubleWidth = 32;
3295      DoubleAlign = 32;
3296      LongDoubleWidth = 32;
3297      LongDoubleAlign = 32;
3298      FloatFormat = &llvm::APFloat::IEEEsingle;
3299      DoubleFormat = &llvm::APFloat::IEEEsingle;
3300      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3301      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3302                          "i16:16:32-i32:32:32-i64:32:32-"
3303                          "f32:32:32-f64:32:32-v64:32:32-"
3304                          "v128:32:32-a0:0:32-n32";
3305      AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3306    }
3307
3308    virtual void getTargetDefines(const LangOptions &Opts,
3309                                  MacroBuilder &Builder) const {
3310      DefineStd(Builder, "tce", Opts);
3311      Builder.defineMacro("__TCE__");
3312      Builder.defineMacro("__TCE_V1__");
3313    }
3314    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3315                                   unsigned &NumRecords) const {}
3316    virtual const char *getClobbers() const {
3317      return "";
3318    }
3319    virtual const char *getVAListDeclaration() const {
3320      return "typedef void* __builtin_va_list;";
3321    }
3322    virtual void getGCCRegNames(const char * const *&Names,
3323                                unsigned &NumNames) const {}
3324    virtual bool validateAsmConstraint(const char *&Name,
3325                                       TargetInfo::ConstraintInfo &info) const {
3326      return true;
3327    }
3328    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3329                                  unsigned &NumAliases) const {}
3330  };
3331}
3332
3333namespace {
3334class MipsTargetInfoBase : public TargetInfo {
3335  std::string CPU;
3336protected:
3337  std::string ABI;
3338public:
3339  MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr)
3340    : TargetInfo(triple), ABI(ABIStr) {}
3341  virtual const char *getABI() const { return ABI.c_str(); }
3342  virtual bool setABI(const std::string &Name) = 0;
3343  virtual bool setCPU(const std::string &Name) {
3344    CPU = Name;
3345    return true;
3346  }
3347  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3348    Features[ABI] = true;
3349    Features[CPU] = true;
3350  }
3351  virtual void getArchDefines(const LangOptions &Opts,
3352                              MacroBuilder &Builder) const = 0;
3353  virtual void getTargetDefines(const LangOptions &Opts,
3354                                MacroBuilder &Builder) const = 0;
3355  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3356                                 unsigned &NumRecords) const {
3357    // FIXME: Implement!
3358  }
3359  virtual const char *getVAListDeclaration() const {
3360    return "typedef void* __builtin_va_list;";
3361  }
3362  virtual void getGCCRegNames(const char * const *&Names,
3363                              unsigned &NumNames) const {
3364    static const char * const GCCRegNames[] = {
3365      "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
3366      "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
3367      "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
3368      "$24",  "$25",  "$26",  "$27",  "$28",  "$sp",  "$fp",  "$31",
3369      "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
3370      "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
3371      "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
3372      "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
3373      "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
3374      "$fcc5","$fcc6","$fcc7"
3375    };
3376    Names = GCCRegNames;
3377    NumNames = llvm::array_lengthof(GCCRegNames);
3378  }
3379  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3380                                unsigned &NumAliases) const = 0;
3381  virtual bool validateAsmConstraint(const char *&Name,
3382                                     TargetInfo::ConstraintInfo &Info) const {
3383    switch (*Name) {
3384    default:
3385      return false;
3386
3387    case 'r': // CPU registers.
3388    case 'd': // Equivalent to "r" unless generating MIPS16 code.
3389    case 'y': // Equivalent to "r", backwards compatibility only.
3390    case 'f': // floating-point registers.
3391      Info.setAllowsRegister();
3392      return true;
3393    }
3394    return false;
3395  }
3396
3397  virtual const char *getClobbers() const {
3398    // FIXME: Implement!
3399    return "";
3400  }
3401};
3402
3403class Mips32TargetInfoBase : public MipsTargetInfoBase {
3404public:
3405  Mips32TargetInfoBase(const std::string& triple) :
3406    MipsTargetInfoBase(triple, "o32") {
3407    SizeType = UnsignedInt;
3408    PtrDiffType = SignedInt;
3409  }
3410  virtual bool setABI(const std::string &Name) {
3411    if ((Name == "o32") || (Name == "eabi")) {
3412      ABI = Name;
3413      return true;
3414    } else
3415      return false;
3416  }
3417  virtual void getArchDefines(const LangOptions &Opts,
3418                              MacroBuilder &Builder) const {
3419    Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
3420    Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
3421    Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
3422
3423    if (ABI == "o32") {
3424      Builder.defineMacro("__mips_o32");
3425      Builder.defineMacro("_ABIO32", "1");
3426      Builder.defineMacro("_MIPS_SIM", "_ABIO32");
3427    }
3428    else if (ABI == "eabi")
3429      Builder.defineMacro("__mips_eabi");
3430    else
3431      llvm_unreachable("Invalid ABI for Mips32.");
3432  }
3433  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3434                                unsigned &NumAliases) const {
3435    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3436      { { "at" },  "$1" },
3437      { { "v0" },  "$2" },
3438      { { "v1" },  "$3" },
3439      { { "a0" },  "$4" },
3440      { { "a1" },  "$5" },
3441      { { "a2" },  "$6" },
3442      { { "a3" },  "$7" },
3443      { { "t0" },  "$8" },
3444      { { "t1" },  "$9" },
3445      { { "t2" }, "$10" },
3446      { { "t3" }, "$11" },
3447      { { "t4" }, "$12" },
3448      { { "t5" }, "$13" },
3449      { { "t6" }, "$14" },
3450      { { "t7" }, "$15" },
3451      { { "s0" }, "$16" },
3452      { { "s1" }, "$17" },
3453      { { "s2" }, "$18" },
3454      { { "s3" }, "$19" },
3455      { { "s4" }, "$20" },
3456      { { "s5" }, "$21" },
3457      { { "s6" }, "$22" },
3458      { { "s7" }, "$23" },
3459      { { "t8" }, "$24" },
3460      { { "t9" }, "$25" },
3461      { { "k0" }, "$26" },
3462      { { "k1" }, "$27" },
3463      { { "gp" }, "$28" },
3464      { { "sp" }, "$29" },
3465      { { "fp" }, "$30" },
3466      { { "ra" }, "$31" }
3467    };
3468    Aliases = GCCRegAliases;
3469    NumAliases = llvm::array_lengthof(GCCRegAliases);
3470  }
3471};
3472
3473class Mips32EBTargetInfo : public Mips32TargetInfoBase {
3474public:
3475  Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3476    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3477                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3478  }
3479  virtual void getTargetDefines(const LangOptions &Opts,
3480                                MacroBuilder &Builder) const {
3481    DefineStd(Builder, "mips", Opts);
3482    Builder.defineMacro("_mips");
3483    DefineStd(Builder, "MIPSEB", Opts);
3484    Builder.defineMacro("_MIPSEB");
3485    Builder.defineMacro("__REGISTER_PREFIX__", "");
3486    getArchDefines(Opts, Builder);
3487  }
3488};
3489
3490class Mips32ELTargetInfo : public Mips32TargetInfoBase {
3491public:
3492  Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3493    BigEndian = false;
3494    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3495                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3496  }
3497  virtual void getTargetDefines(const LangOptions &Opts,
3498                                MacroBuilder &Builder) const {
3499    DefineStd(Builder, "mips", Opts);
3500    Builder.defineMacro("_mips");
3501    DefineStd(Builder, "MIPSEL", Opts);
3502    Builder.defineMacro("_MIPSEL");
3503    Builder.defineMacro("__REGISTER_PREFIX__", "");
3504    getArchDefines(Opts, Builder);
3505  }
3506};
3507
3508class Mips64TargetInfoBase : public MipsTargetInfoBase {
3509  virtual void SetDescriptionString(const std::string &Name) = 0;
3510public:
3511  Mips64TargetInfoBase(const std::string& triple) :
3512    MipsTargetInfoBase(triple, "n64") {
3513    LongWidth = LongAlign = 64;
3514    PointerWidth = PointerAlign = 64;
3515    LongDoubleWidth = LongDoubleAlign = 128;
3516    LongDoubleFormat = &llvm::APFloat::IEEEquad;
3517    SuitableAlign = 128;
3518  }
3519  virtual bool setABI(const std::string &Name) {
3520    SetDescriptionString(Name);
3521
3522    if (Name != "n32" && Name != "n64")
3523      return false;
3524
3525    ABI = Name;
3526
3527    if (Name == "n32") {
3528      LongWidth = LongAlign = 32;
3529      PointerWidth = PointerAlign = 32;
3530    }
3531
3532    return true;
3533  }
3534  virtual void getArchDefines(const LangOptions &Opts,
3535                              MacroBuilder &Builder) const {
3536    if (ABI == "n32") {
3537      Builder.defineMacro("__mips_n32");
3538      Builder.defineMacro("_ABIN32", "2");
3539      Builder.defineMacro("_MIPS_SIM", "_ABIN32");
3540    }
3541    else if (ABI == "n64") {
3542      Builder.defineMacro("__mips_n64");
3543      Builder.defineMacro("_ABI64", "3");
3544      Builder.defineMacro("_MIPS_SIM", "_ABI64");
3545    }
3546    else
3547      llvm_unreachable("Invalid ABI for Mips64.");
3548  }
3549  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3550                                unsigned &NumAliases) const {
3551    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3552      { { "at" },  "$1" },
3553      { { "v0" },  "$2" },
3554      { { "v1" },  "$3" },
3555      { { "a0" },  "$4" },
3556      { { "a1" },  "$5" },
3557      { { "a2" },  "$6" },
3558      { { "a3" },  "$7" },
3559      { { "a4" },  "$8" },
3560      { { "a5" },  "$9" },
3561      { { "a6" }, "$10" },
3562      { { "a7" }, "$11" },
3563      { { "t0" }, "$12" },
3564      { { "t1" }, "$13" },
3565      { { "t2" }, "$14" },
3566      { { "t3" }, "$15" },
3567      { { "s0" }, "$16" },
3568      { { "s1" }, "$17" },
3569      { { "s2" }, "$18" },
3570      { { "s3" }, "$19" },
3571      { { "s4" }, "$20" },
3572      { { "s5" }, "$21" },
3573      { { "s6" }, "$22" },
3574      { { "s7" }, "$23" },
3575      { { "t8" }, "$24" },
3576      { { "t9" }, "$25" },
3577      { { "k0" }, "$26" },
3578      { { "k1" }, "$27" },
3579      { { "gp" }, "$28" },
3580      { { "sp" }, "$29" },
3581      { { "fp" }, "$30" },
3582      { { "ra" }, "$31" }
3583    };
3584    Aliases = GCCRegAliases;
3585    NumAliases = llvm::array_lengthof(GCCRegAliases);
3586  }
3587};
3588
3589class Mips64EBTargetInfo : public Mips64TargetInfoBase {
3590  virtual void SetDescriptionString(const std::string &Name) {
3591    // Change DescriptionString only if ABI is n32.
3592    if (Name == "n32")
3593      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3594                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3595                          "v64:64:64-n32";
3596  }
3597public:
3598  Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3599    // Default ABI is n64.
3600    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3601                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3602                        "v64:64:64-n32";
3603  }
3604  virtual void getTargetDefines(const LangOptions &Opts,
3605                                MacroBuilder &Builder) const {
3606    DefineStd(Builder, "mips", Opts);
3607    Builder.defineMacro("_mips");
3608    DefineStd(Builder, "MIPSEB", Opts);
3609    Builder.defineMacro("_MIPSEB");
3610    Builder.defineMacro("__REGISTER_PREFIX__", "");
3611    getArchDefines(Opts, Builder);
3612  }
3613};
3614
3615class Mips64ELTargetInfo : public Mips64TargetInfoBase {
3616  virtual void SetDescriptionString(const std::string &Name) {
3617    // Change DescriptionString only if ABI is n32.
3618    if (Name == "n32")
3619      DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3620                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
3621                          "-v64:64:64-n32";
3622  }
3623public:
3624  Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3625    // Default ABI is n64.
3626    BigEndian = false;
3627    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3628                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3629                        "v64:64:64-n32";
3630  }
3631  virtual void getTargetDefines(const LangOptions &Opts,
3632                                MacroBuilder &Builder) const {
3633    DefineStd(Builder, "mips", Opts);
3634    Builder.defineMacro("_mips");
3635    DefineStd(Builder, "MIPSEL", Opts);
3636    Builder.defineMacro("_MIPSEL");
3637    Builder.defineMacro("__REGISTER_PREFIX__", "");
3638    getArchDefines(Opts, Builder);
3639  }
3640};
3641} // end anonymous namespace.
3642
3643namespace {
3644class PNaClTargetInfo : public TargetInfo {
3645public:
3646  PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
3647    BigEndian = false;
3648    this->UserLabelPrefix = "";
3649    this->LongAlign = 32;
3650    this->LongWidth = 32;
3651    this->PointerAlign = 32;
3652    this->PointerWidth = 32;
3653    this->IntMaxType = TargetInfo::SignedLongLong;
3654    this->UIntMaxType = TargetInfo::UnsignedLongLong;
3655    this->Int64Type = TargetInfo::SignedLongLong;
3656    this->DoubleAlign = 64;
3657    this->LongDoubleWidth = 64;
3658    this->LongDoubleAlign = 64;
3659    this->SizeType = TargetInfo::UnsignedInt;
3660    this->PtrDiffType = TargetInfo::SignedInt;
3661    this->IntPtrType = TargetInfo::SignedInt;
3662    this->RegParmMax = 2;
3663    DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
3664                        "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
3665  }
3666
3667  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3668  }
3669  virtual void getArchDefines(const LangOptions &Opts,
3670                              MacroBuilder &Builder) const {
3671    Builder.defineMacro("__le32__");
3672    Builder.defineMacro("__pnacl__");
3673  }
3674  virtual void getTargetDefines(const LangOptions &Opts,
3675                                MacroBuilder &Builder) const {
3676    DefineStd(Builder, "unix", Opts);
3677    Builder.defineMacro("__ELF__");
3678    if (Opts.POSIXThreads)
3679      Builder.defineMacro("_REENTRANT");
3680    if (Opts.CPlusPlus)
3681      Builder.defineMacro("_GNU_SOURCE");
3682
3683    Builder.defineMacro("__native_client__");
3684    getArchDefines(Opts, Builder);
3685  }
3686  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3687                                 unsigned &NumRecords) const {
3688  }
3689  virtual const char *getVAListDeclaration() const {
3690    return "typedef int __builtin_va_list[4];";
3691  }
3692  virtual void getGCCRegNames(const char * const *&Names,
3693                              unsigned &NumNames) const;
3694  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3695                                unsigned &NumAliases) const;
3696  virtual bool validateAsmConstraint(const char *&Name,
3697                                     TargetInfo::ConstraintInfo &Info) const {
3698    return false;
3699  }
3700
3701  virtual const char *getClobbers() const {
3702    return "";
3703  }
3704};
3705
3706void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
3707                                     unsigned &NumNames) const {
3708  Names = NULL;
3709  NumNames = 0;
3710}
3711
3712void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3713                                       unsigned &NumAliases) const {
3714  Aliases = NULL;
3715  NumAliases = 0;
3716}
3717} // end anonymous namespace.
3718
3719
3720//===----------------------------------------------------------------------===//
3721// Driver code
3722//===----------------------------------------------------------------------===//
3723
3724static TargetInfo *AllocateTarget(const std::string &T) {
3725  llvm::Triple Triple(T);
3726  llvm::Triple::OSType os = Triple.getOS();
3727
3728  switch (Triple.getArch()) {
3729  default:
3730    return NULL;
3731
3732  case llvm::Triple::hexagon:
3733    return new HexagonTargetInfo(T);
3734
3735  case llvm::Triple::arm:
3736  case llvm::Triple::thumb:
3737    if (Triple.isOSDarwin())
3738      return new DarwinARMTargetInfo(T);
3739
3740    switch (os) {
3741    case llvm::Triple::Linux:
3742      return new LinuxTargetInfo<ARMTargetInfo>(T);
3743    case llvm::Triple::FreeBSD:
3744      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
3745    case llvm::Triple::NetBSD:
3746      return new NetBSDTargetInfo<ARMTargetInfo>(T);
3747    case llvm::Triple::RTEMS:
3748      return new RTEMSTargetInfo<ARMTargetInfo>(T);
3749    default:
3750      return new ARMTargetInfo(T);
3751    }
3752
3753  case llvm::Triple::msp430:
3754    return new MSP430TargetInfo(T);
3755
3756  case llvm::Triple::mips:
3757    switch (os) {
3758    case llvm::Triple::Linux:
3759      return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
3760    case llvm::Triple::RTEMS:
3761      return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
3762    case llvm::Triple::FreeBSD:
3763      return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
3764    case llvm::Triple::NetBSD:
3765      return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
3766    default:
3767      return new Mips32EBTargetInfo(T);
3768    }
3769
3770  case llvm::Triple::mipsel:
3771    switch (os) {
3772    case llvm::Triple::Linux:
3773      return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
3774    case llvm::Triple::RTEMS:
3775      return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
3776    case llvm::Triple::FreeBSD:
3777      return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
3778    case llvm::Triple::NetBSD:
3779      return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
3780    default:
3781      return new Mips32ELTargetInfo(T);
3782    }
3783
3784  case llvm::Triple::mips64:
3785    switch (os) {
3786    case llvm::Triple::Linux:
3787      return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
3788    case llvm::Triple::RTEMS:
3789      return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
3790    case llvm::Triple::FreeBSD:
3791      return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
3792    case llvm::Triple::NetBSD:
3793      return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
3794    default:
3795      return new Mips64EBTargetInfo(T);
3796    }
3797
3798  case llvm::Triple::mips64el:
3799    switch (os) {
3800    case llvm::Triple::Linux:
3801      return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
3802    case llvm::Triple::RTEMS:
3803      return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
3804    case llvm::Triple::FreeBSD:
3805      return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
3806    case llvm::Triple::NetBSD:
3807      return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
3808    default:
3809      return new Mips64ELTargetInfo(T);
3810    }
3811
3812  case llvm::Triple::le32:
3813    switch (os) {
3814      case llvm::Triple::NativeClient:
3815        return new PNaClTargetInfo(T);
3816      default:
3817        return NULL;
3818    }
3819
3820  case llvm::Triple::ppc:
3821    if (Triple.isOSDarwin())
3822      return new DarwinPPC32TargetInfo(T);
3823    switch (os) {
3824    case llvm::Triple::Linux:
3825      return new LinuxTargetInfo<PPC32TargetInfo>(T);
3826    case llvm::Triple::FreeBSD:
3827      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
3828    case llvm::Triple::NetBSD:
3829      return new NetBSDTargetInfo<PPC32TargetInfo>(T);
3830    case llvm::Triple::RTEMS:
3831      return new RTEMSTargetInfo<PPC32TargetInfo>(T);
3832    default:
3833      return new PPC32TargetInfo(T);
3834    }
3835
3836  case llvm::Triple::ppc64:
3837    if (Triple.isOSDarwin())
3838      return new DarwinPPC64TargetInfo(T);
3839    switch (os) {
3840    case llvm::Triple::Linux:
3841      return new LinuxTargetInfo<PPC64TargetInfo>(T);
3842    case llvm::Triple::Lv2:
3843      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
3844    case llvm::Triple::FreeBSD:
3845      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
3846    case llvm::Triple::NetBSD:
3847      return new NetBSDTargetInfo<PPC64TargetInfo>(T);
3848    default:
3849      return new PPC64TargetInfo(T);
3850    }
3851
3852  case llvm::Triple::ptx32:
3853    return new PTX32TargetInfo(T);
3854  case llvm::Triple::ptx64:
3855    return new PTX64TargetInfo(T);
3856
3857  case llvm::Triple::mblaze:
3858    return new MBlazeTargetInfo(T);
3859
3860  case llvm::Triple::sparc:
3861    switch (os) {
3862    case llvm::Triple::Linux:
3863      return new LinuxTargetInfo<SparcV8TargetInfo>(T);
3864    case llvm::Triple::AuroraUX:
3865      return new AuroraUXSparcV8TargetInfo(T);
3866    case llvm::Triple::Solaris:
3867      return new SolarisSparcV8TargetInfo(T);
3868    case llvm::Triple::NetBSD:
3869      return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
3870    case llvm::Triple::RTEMS:
3871      return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
3872    default:
3873      return new SparcV8TargetInfo(T);
3874    }
3875
3876  // FIXME: Need a real SPU target.
3877  case llvm::Triple::cellspu:
3878    return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
3879
3880  case llvm::Triple::tce:
3881    return new TCETargetInfo(T);
3882
3883  case llvm::Triple::x86:
3884    if (Triple.isOSDarwin())
3885      return new DarwinI386TargetInfo(T);
3886
3887    switch (os) {
3888    case llvm::Triple::AuroraUX:
3889      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
3890    case llvm::Triple::Linux:
3891      return new LinuxTargetInfo<X86_32TargetInfo>(T);
3892    case llvm::Triple::DragonFly:
3893      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
3894    case llvm::Triple::NetBSD:
3895      return new NetBSDI386TargetInfo(T);
3896    case llvm::Triple::OpenBSD:
3897      return new OpenBSDI386TargetInfo(T);
3898    case llvm::Triple::FreeBSD:
3899      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
3900    case llvm::Triple::Minix:
3901      return new MinixTargetInfo<X86_32TargetInfo>(T);
3902    case llvm::Triple::Solaris:
3903      return new SolarisTargetInfo<X86_32TargetInfo>(T);
3904    case llvm::Triple::Cygwin:
3905      return new CygwinX86_32TargetInfo(T);
3906    case llvm::Triple::MinGW32:
3907      return new MinGWX86_32TargetInfo(T);
3908    case llvm::Triple::Win32:
3909      return new VisualStudioWindowsX86_32TargetInfo(T);
3910    case llvm::Triple::Haiku:
3911      return new HaikuX86_32TargetInfo(T);
3912    case llvm::Triple::RTEMS:
3913      return new RTEMSX86_32TargetInfo(T);
3914    default:
3915      return new X86_32TargetInfo(T);
3916    }
3917
3918  case llvm::Triple::x86_64:
3919    if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
3920      return new DarwinX86_64TargetInfo(T);
3921
3922    switch (os) {
3923    case llvm::Triple::AuroraUX:
3924      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
3925    case llvm::Triple::Linux:
3926      return new LinuxTargetInfo<X86_64TargetInfo>(T);
3927    case llvm::Triple::DragonFly:
3928      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
3929    case llvm::Triple::NetBSD:
3930      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
3931    case llvm::Triple::OpenBSD:
3932      return new OpenBSDX86_64TargetInfo(T);
3933    case llvm::Triple::FreeBSD:
3934      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
3935    case llvm::Triple::Solaris:
3936      return new SolarisTargetInfo<X86_64TargetInfo>(T);
3937    case llvm::Triple::MinGW32:
3938      return new MinGWX86_64TargetInfo(T);
3939    case llvm::Triple::Win32:   // This is what Triple.h supports now.
3940      return new VisualStudioWindowsX86_64TargetInfo(T);
3941    default:
3942      return new X86_64TargetInfo(T);
3943    }
3944  }
3945}
3946
3947/// CreateTargetInfo - Return the target info object for the specified target
3948/// triple.
3949TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
3950                                         TargetOptions &Opts) {
3951  llvm::Triple Triple(Opts.Triple);
3952
3953  // Construct the target
3954  llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
3955  if (!Target) {
3956    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
3957    return 0;
3958  }
3959
3960  // Set the target CPU if specified.
3961  if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
3962    Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
3963    return 0;
3964  }
3965
3966  // Set the target ABI if specified.
3967  if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
3968    Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
3969    return 0;
3970  }
3971
3972  // Set the target C++ ABI.
3973  if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
3974    Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
3975    return 0;
3976  }
3977
3978  // Compute the default target features, we need the target to handle this
3979  // because features may have dependencies on one another.
3980  llvm::StringMap<bool> Features;
3981  Target->getDefaultFeatures(Features);
3982
3983  // Apply the user specified deltas.
3984  // First the enables.
3985  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
3986         ie = Opts.Features.end(); it != ie; ++it) {
3987    const char *Name = it->c_str();
3988
3989    if (Name[0] != '+')
3990      continue;
3991
3992    // Apply the feature via the target.
3993    if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
3994      Diags.Report(diag::err_target_invalid_feature) << Name;
3995      return 0;
3996    }
3997  }
3998
3999  // Then the disables.
4000  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4001         ie = Opts.Features.end(); it != ie; ++it) {
4002    const char *Name = it->c_str();
4003
4004    if (Name[0] == '+')
4005      continue;
4006
4007    // Apply the feature via the target.
4008    if (Name[0] != '-' ||
4009        !Target->setFeatureEnabled(Features, Name + 1, false)) {
4010      Diags.Report(diag::err_target_invalid_feature) << Name;
4011      return 0;
4012    }
4013  }
4014
4015  // Add the features to the compile options.
4016  //
4017  // FIXME: If we are completely confident that we have the right set, we only
4018  // need to pass the minuses.
4019  Opts.Features.clear();
4020  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
4021         ie = Features.end(); it != ie; ++it)
4022    Opts.Features.push_back(std::string(it->second ? "+" : "-") +
4023                            it->first().str());
4024  Target->HandleTargetFeatures(Opts.Features);
4025
4026  return Target.take();
4027}
4028