Targets.cpp revision 0a0d2b179085a52c10402feebeb6db8b4d96a140
1//===--- Targets.cpp - Implement -arch option and targets -----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements construction of a TargetInfo object from a 11// target triple. 12// 13//===----------------------------------------------------------------------===// 14 15#include "clang/Basic/TargetInfo.h" 16#include "clang/Basic/Builtins.h" 17#include "clang/Basic/Diagnostic.h" 18#include "clang/Basic/LangOptions.h" 19#include "clang/Basic/MacroBuilder.h" 20#include "clang/Basic/TargetBuiltins.h" 21#include "clang/Basic/TargetOptions.h" 22#include "llvm/ADT/APFloat.h" 23#include "llvm/ADT/OwningPtr.h" 24#include "llvm/ADT/STLExtras.h" 25#include "llvm/ADT/StringRef.h" 26#include "llvm/ADT/StringSwitch.h" 27#include "llvm/ADT/Triple.h" 28#include "llvm/MC/MCSectionMachO.h" 29#include "llvm/Type.h" 30#include <algorithm> 31using namespace clang; 32 33//===----------------------------------------------------------------------===// 34// Common code shared among targets. 35//===----------------------------------------------------------------------===// 36 37/// DefineStd - Define a macro name and standard variants. For example if 38/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 39/// when in GNU mode. 40static void DefineStd(MacroBuilder &Builder, llvm::StringRef MacroName, 41 const LangOptions &Opts) { 42 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 43 44 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 45 // in the user's namespace. 46 if (Opts.GNUMode) 47 Builder.defineMacro(MacroName); 48 49 // Define __unix. 50 Builder.defineMacro("__" + MacroName); 51 52 // Define __unix__. 53 Builder.defineMacro("__" + MacroName + "__"); 54} 55 56//===----------------------------------------------------------------------===// 57// Defines specific to certain operating systems. 58//===----------------------------------------------------------------------===// 59 60namespace { 61template<typename TgtInfo> 62class OSTargetInfo : public TgtInfo { 63protected: 64 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 65 MacroBuilder &Builder) const=0; 66public: 67 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 68 virtual void getTargetDefines(const LangOptions &Opts, 69 MacroBuilder &Builder) const { 70 TgtInfo::getTargetDefines(Opts, Builder); 71 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 72 } 73 74}; 75} // end anonymous namespace 76 77 78static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 79 const llvm::Triple &Triple, 80 llvm::StringRef &PlatformName, 81 VersionTuple &PlatformMinVersion) { 82 Builder.defineMacro("__APPLE_CC__", "5621"); 83 Builder.defineMacro("__APPLE__"); 84 Builder.defineMacro("__MACH__"); 85 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 86 87 // __weak is always defined, for use in blocks and with objc pointers. 88 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 89 90 // Darwin defines __strong even in C mode (just to nothing). 91 if (!Opts.ObjC1 || Opts.getGCMode() == LangOptions::NonGC) 92 Builder.defineMacro("__strong", ""); 93 else 94 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 95 96 if (Opts.Static) 97 Builder.defineMacro("__STATIC__"); 98 else 99 Builder.defineMacro("__DYNAMIC__"); 100 101 if (Opts.POSIXThreads) 102 Builder.defineMacro("_REENTRANT"); 103 104 // Get the OS version number from the triple. 105 unsigned Maj, Min, Rev; 106 107 // If no version was given, default to to 10.4.0, for simplifying tests. 108 if (Triple.getOSName() == "darwin") { 109 Min = Rev = 0; 110 Maj = 8; 111 } else 112 Triple.getDarwinNumber(Maj, Min, Rev); 113 114 // Set the appropriate OS version define. 115 if (Triple.getEnvironmentName() == "iphoneos") { 116 assert(Maj < 10 && Min < 99 && Rev < 99 && "Invalid version!"); 117 char Str[6]; 118 Str[0] = '0' + Maj; 119 Str[1] = '0' + (Min / 10); 120 Str[2] = '0' + (Min % 10); 121 Str[3] = '0' + (Rev / 10); 122 Str[4] = '0' + (Rev % 10); 123 Str[5] = '\0'; 124 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 125 126 PlatformName = "ios"; 127 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 128 } else { 129 // For historical reasons that make little sense, the version passed here is 130 // the "darwin" version, which drops the 10 and offsets by 4. 131 Rev = Min; 132 Min = Maj - 4; 133 Maj = 10; 134 135 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 136 assert(Maj < 99 && Min < 10 && Rev < 10 && "Invalid version!"); 137 char Str[5]; 138 Str[0] = '0' + (Maj / 10); 139 Str[1] = '0' + (Maj % 10); 140 Str[2] = '0' + Min; 141 Str[3] = '0' + Rev; 142 Str[4] = '\0'; 143 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 144 145 PlatformName = "macosx"; 146 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 147 } 148} 149 150namespace { 151template<typename Target> 152class DarwinTargetInfo : public OSTargetInfo<Target> { 153protected: 154 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 155 MacroBuilder &Builder) const { 156 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 157 this->PlatformMinVersion); 158 } 159 160public: 161 DarwinTargetInfo(const std::string& triple) : 162 OSTargetInfo<Target>(triple) { 163 this->TLSSupported = llvm::Triple(triple).getDarwinMajorNumber() > 10; 164 this->MCountName = "\01mcount"; 165 } 166 167 virtual std::string isValidSectionSpecifier(llvm::StringRef SR) const { 168 // Let MCSectionMachO validate this. 169 llvm::StringRef Segment, Section; 170 unsigned TAA, StubSize; 171 bool HasTAA; 172 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 173 TAA, HasTAA, StubSize); 174 } 175 176 virtual const char *getStaticInitSectionSpecifier() const { 177 // FIXME: We should return 0 when building kexts. 178 return "__TEXT,__StaticInit,regular,pure_instructions"; 179 } 180 181}; 182 183 184// DragonFlyBSD Target 185template<typename Target> 186class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 187protected: 188 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 189 MacroBuilder &Builder) const { 190 // DragonFly defines; list based off of gcc output 191 Builder.defineMacro("__DragonFly__"); 192 Builder.defineMacro("__DragonFly_cc_version", "100001"); 193 Builder.defineMacro("__ELF__"); 194 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 195 Builder.defineMacro("__tune_i386__"); 196 DefineStd(Builder, "unix", Opts); 197 } 198public: 199 DragonFlyBSDTargetInfo(const std::string &triple) 200 : OSTargetInfo<Target>(triple) {} 201}; 202 203// FreeBSD Target 204template<typename Target> 205class FreeBSDTargetInfo : public OSTargetInfo<Target> { 206protected: 207 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 208 MacroBuilder &Builder) const { 209 // FreeBSD defines; list based off of gcc output 210 211 // FIXME: Move version number handling to llvm::Triple. 212 llvm::StringRef Release = Triple.getOSName().substr(strlen("freebsd"), 1); 213 214 Builder.defineMacro("__FreeBSD__", Release); 215 Builder.defineMacro("__FreeBSD_cc_version", Release + "00001"); 216 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 217 DefineStd(Builder, "unix", Opts); 218 Builder.defineMacro("__ELF__"); 219 } 220public: 221 FreeBSDTargetInfo(const std::string &triple) 222 : OSTargetInfo<Target>(triple) { 223 this->UserLabelPrefix = ""; 224 225 llvm::Triple Triple(triple); 226 switch (Triple.getArch()) { 227 default: 228 case llvm::Triple::x86: 229 case llvm::Triple::x86_64: 230 this->MCountName = ".mcount"; 231 break; 232 case llvm::Triple::mips: 233 case llvm::Triple::mipsel: 234 case llvm::Triple::ppc: 235 case llvm::Triple::ppc64: 236 this->MCountName = "_mcount"; 237 break; 238 case llvm::Triple::arm: 239 this->MCountName = "__mcount"; 240 break; 241 } 242 243 } 244}; 245 246// Minix Target 247template<typename Target> 248class MinixTargetInfo : public OSTargetInfo<Target> { 249protected: 250 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 251 MacroBuilder &Builder) const { 252 // Minix defines 253 254 Builder.defineMacro("__minix", "3"); 255 Builder.defineMacro("_EM_WSIZE", "4"); 256 Builder.defineMacro("_EM_PSIZE", "4"); 257 Builder.defineMacro("_EM_SSIZE", "2"); 258 Builder.defineMacro("_EM_LSIZE", "4"); 259 Builder.defineMacro("_EM_FSIZE", "4"); 260 Builder.defineMacro("_EM_DSIZE", "8"); 261 DefineStd(Builder, "unix", Opts); 262 } 263public: 264 MinixTargetInfo(const std::string &triple) 265 : OSTargetInfo<Target>(triple) { 266 this->UserLabelPrefix = ""; 267 } 268}; 269 270// Linux target 271template<typename Target> 272class LinuxTargetInfo : public OSTargetInfo<Target> { 273protected: 274 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 275 MacroBuilder &Builder) const { 276 // Linux defines; list based off of gcc output 277 DefineStd(Builder, "unix", Opts); 278 DefineStd(Builder, "linux", Opts); 279 Builder.defineMacro("__gnu_linux__"); 280 Builder.defineMacro("__ELF__"); 281 if (Opts.POSIXThreads) 282 Builder.defineMacro("_REENTRANT"); 283 if (Opts.CPlusPlus) 284 Builder.defineMacro("_GNU_SOURCE"); 285 } 286public: 287 LinuxTargetInfo(const std::string& triple) 288 : OSTargetInfo<Target>(triple) { 289 this->UserLabelPrefix = ""; 290 this->WIntType = TargetInfo::UnsignedInt; 291 } 292}; 293 294// NetBSD Target 295template<typename Target> 296class NetBSDTargetInfo : public OSTargetInfo<Target> { 297protected: 298 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 299 MacroBuilder &Builder) const { 300 // NetBSD defines; list based off of gcc output 301 Builder.defineMacro("__NetBSD__"); 302 Builder.defineMacro("__unix__"); 303 Builder.defineMacro("__ELF__"); 304 if (Opts.POSIXThreads) 305 Builder.defineMacro("_POSIX_THREADS"); 306 } 307public: 308 NetBSDTargetInfo(const std::string &triple) 309 : OSTargetInfo<Target>(triple) { 310 this->UserLabelPrefix = ""; 311 } 312}; 313 314// OpenBSD Target 315template<typename Target> 316class OpenBSDTargetInfo : public OSTargetInfo<Target> { 317protected: 318 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 319 MacroBuilder &Builder) const { 320 // OpenBSD defines; list based off of gcc output 321 322 Builder.defineMacro("__OpenBSD__"); 323 DefineStd(Builder, "unix", Opts); 324 Builder.defineMacro("__ELF__"); 325 if (Opts.POSIXThreads) 326 Builder.defineMacro("_POSIX_THREADS"); 327 } 328public: 329 OpenBSDTargetInfo(const std::string &triple) 330 : OSTargetInfo<Target>(triple) {} 331}; 332 333// PSP Target 334template<typename Target> 335class PSPTargetInfo : public OSTargetInfo<Target> { 336protected: 337 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 338 MacroBuilder &Builder) const { 339 // PSP defines; list based on the output of the pspdev gcc toolchain. 340 Builder.defineMacro("PSP"); 341 Builder.defineMacro("_PSP"); 342 Builder.defineMacro("__psp__"); 343 Builder.defineMacro("__ELF__"); 344 } 345public: 346 PSPTargetInfo(const std::string& triple) 347 : OSTargetInfo<Target>(triple) { 348 this->UserLabelPrefix = ""; 349 } 350}; 351 352// PS3 PPU Target 353template<typename Target> 354class PS3PPUTargetInfo : public OSTargetInfo<Target> { 355protected: 356 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 357 MacroBuilder &Builder) const { 358 // PS3 PPU defines. 359 Builder.defineMacro("__PPC__"); 360 Builder.defineMacro("__PPU__"); 361 Builder.defineMacro("__CELLOS_LV2__"); 362 Builder.defineMacro("__ELF__"); 363 Builder.defineMacro("__LP32__"); 364 Builder.defineMacro("_ARCH_PPC64"); 365 Builder.defineMacro("__powerpc64__"); 366 } 367public: 368 PS3PPUTargetInfo(const std::string& triple) 369 : OSTargetInfo<Target>(triple) { 370 this->UserLabelPrefix = ""; 371 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32; 372 this->IntMaxType = TargetInfo::SignedLongLong; 373 this->UIntMaxType = TargetInfo::UnsignedLongLong; 374 this->Int64Type = TargetInfo::SignedLongLong; 375 this->SizeType = TargetInfo::UnsignedInt; 376 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 377 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 378 } 379}; 380 381// FIXME: Need a real SPU target. 382// PS3 SPU Target 383template<typename Target> 384class PS3SPUTargetInfo : public OSTargetInfo<Target> { 385protected: 386 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 387 MacroBuilder &Builder) const { 388 // PS3 PPU defines. 389 Builder.defineMacro("__SPU__"); 390 Builder.defineMacro("__ELF__"); 391 } 392public: 393 PS3SPUTargetInfo(const std::string& triple) 394 : OSTargetInfo<Target>(triple) { 395 this->UserLabelPrefix = ""; 396 } 397}; 398 399// AuroraUX target 400template<typename Target> 401class AuroraUXTargetInfo : public OSTargetInfo<Target> { 402protected: 403 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 404 MacroBuilder &Builder) const { 405 DefineStd(Builder, "sun", Opts); 406 DefineStd(Builder, "unix", Opts); 407 Builder.defineMacro("__ELF__"); 408 Builder.defineMacro("__svr4__"); 409 Builder.defineMacro("__SVR4"); 410 } 411public: 412 AuroraUXTargetInfo(const std::string& triple) 413 : OSTargetInfo<Target>(triple) { 414 this->UserLabelPrefix = ""; 415 this->WCharType = this->SignedLong; 416 // FIXME: WIntType should be SignedLong 417 } 418}; 419 420// Solaris target 421template<typename Target> 422class SolarisTargetInfo : public OSTargetInfo<Target> { 423protected: 424 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 425 MacroBuilder &Builder) const { 426 DefineStd(Builder, "sun", Opts); 427 DefineStd(Builder, "unix", Opts); 428 Builder.defineMacro("__ELF__"); 429 Builder.defineMacro("__svr4__"); 430 Builder.defineMacro("__SVR4"); 431 } 432public: 433 SolarisTargetInfo(const std::string& triple) 434 : OSTargetInfo<Target>(triple) { 435 this->UserLabelPrefix = ""; 436 this->WCharType = this->SignedLong; 437 // FIXME: WIntType should be SignedLong 438 } 439}; 440 441// Windows target 442template<typename Target> 443class WindowsTargetInfo : public OSTargetInfo<Target> { 444protected: 445 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 446 MacroBuilder &Builder) const { 447 Builder.defineMacro("_WIN32"); 448 } 449 void getVisualStudioDefines(const LangOptions &Opts, 450 MacroBuilder &Builder) const { 451 if (Opts.CPlusPlus) { 452 if (Opts.RTTI) 453 Builder.defineMacro("_CPPRTTI"); 454 455 if (Opts.Exceptions) 456 Builder.defineMacro("_CPPUNWIND"); 457 } 458 459 if (!Opts.CharIsSigned) 460 Builder.defineMacro("_CHAR_UNSIGNED"); 461 462 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 463 // but it works for now. 464 if (Opts.POSIXThreads) 465 Builder.defineMacro("_MT"); 466 467 if (Opts.MSCVersion != 0) 468 Builder.defineMacro("_MSC_VER", llvm::Twine(Opts.MSCVersion)); 469 470 if (Opts.Microsoft) { 471 Builder.defineMacro("_MSC_EXTENSIONS"); 472 473 if (Opts.CPlusPlus0x) { 474 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 475 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 476 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 477 } 478 } 479 480 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 481 } 482 483public: 484 WindowsTargetInfo(const std::string &triple) 485 : OSTargetInfo<Target>(triple) {} 486}; 487 488} // end anonymous namespace. 489 490//===----------------------------------------------------------------------===// 491// Specific target implementations. 492//===----------------------------------------------------------------------===// 493 494namespace { 495// PPC abstract base class 496class PPCTargetInfo : public TargetInfo { 497 static const Builtin::Info BuiltinInfo[]; 498 static const char * const GCCRegNames[]; 499 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 500 501public: 502 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {} 503 504 virtual void getTargetBuiltins(const Builtin::Info *&Records, 505 unsigned &NumRecords) const { 506 Records = BuiltinInfo; 507 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 508 } 509 510 virtual void getTargetDefines(const LangOptions &Opts, 511 MacroBuilder &Builder) const; 512 513 virtual void getGCCRegNames(const char * const *&Names, 514 unsigned &NumNames) const; 515 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 516 unsigned &NumAliases) const; 517 virtual bool validateAsmConstraint(const char *&Name, 518 TargetInfo::ConstraintInfo &Info) const { 519 switch (*Name) { 520 default: return false; 521 case 'O': // Zero 522 break; 523 case 'b': // Base register 524 case 'f': // Floating point register 525 Info.setAllowsRegister(); 526 break; 527 // FIXME: The following are added to allow parsing. 528 // I just took a guess at what the actions should be. 529 // Also, is more specific checking needed? I.e. specific registers? 530 case 'd': // Floating point register (containing 64-bit value) 531 case 'v': // Altivec vector register 532 Info.setAllowsRegister(); 533 break; 534 case 'w': 535 switch (Name[1]) { 536 case 'd':// VSX vector register to hold vector double data 537 case 'f':// VSX vector register to hold vector float data 538 case 's':// VSX vector register to hold scalar float data 539 case 'a':// Any VSX register 540 break; 541 default: 542 return false; 543 } 544 Info.setAllowsRegister(); 545 Name++; // Skip over 'w'. 546 break; 547 case 'h': // `MQ', `CTR', or `LINK' register 548 case 'q': // `MQ' register 549 case 'c': // `CTR' register 550 case 'l': // `LINK' register 551 case 'x': // `CR' register (condition register) number 0 552 case 'y': // `CR' register (condition register) 553 case 'z': // `XER[CA]' carry bit (part of the XER register) 554 Info.setAllowsRegister(); 555 break; 556 case 'I': // Signed 16-bit constant 557 case 'J': // Unsigned 16-bit constant shifted left 16 bits 558 // (use `L' instead for SImode constants) 559 case 'K': // Unsigned 16-bit constant 560 case 'L': // Signed 16-bit constant shifted left 16 bits 561 case 'M': // Constant larger than 31 562 case 'N': // Exact power of 2 563 case 'P': // Constant whose negation is a signed 16-bit constant 564 case 'G': // Floating point constant that can be loaded into a 565 // register with one instruction per word 566 case 'H': // Integer/Floating point constant that can be loaded 567 // into a register using three instructions 568 break; 569 case 'm': // Memory operand. Note that on PowerPC targets, m can 570 // include addresses that update the base register. It 571 // is therefore only safe to use `m' in an asm statement 572 // if that asm statement accesses the operand exactly once. 573 // The asm statement must also use `%U<opno>' as a 574 // placeholder for the "update" flag in the corresponding 575 // load or store instruction. For example: 576 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 577 // is correct but: 578 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 579 // is not. Use es rather than m if you don't want the base 580 // register to be updated. 581 case 'e': 582 if (Name[1] != 's') 583 return false; 584 // es: A "stable" memory operand; that is, one which does not 585 // include any automodification of the base register. Unlike 586 // `m', this constraint can be used in asm statements that 587 // might access the operand several times, or that might not 588 // access it at all. 589 Info.setAllowsMemory(); 590 Name++; // Skip over 'e'. 591 break; 592 case 'Q': // Memory operand that is an offset from a register (it is 593 // usually better to use `m' or `es' in asm statements) 594 case 'Z': // Memory operand that is an indexed or indirect from a 595 // register (it is usually better to use `m' or `es' in 596 // asm statements) 597 Info.setAllowsMemory(); 598 Info.setAllowsRegister(); 599 break; 600 case 'R': // AIX TOC entry 601 case 'a': // Address operand that is an indexed or indirect from a 602 // register (`p' is preferable for asm statements) 603 case 'S': // Constant suitable as a 64-bit mask operand 604 case 'T': // Constant suitable as a 32-bit mask operand 605 case 'U': // System V Release 4 small data area reference 606 case 't': // AND masks that can be performed by two rldic{l, r} 607 // instructions 608 case 'W': // Vector constant that does not require memory 609 case 'j': // Vector constant that is all zeros. 610 break; 611 // End FIXME. 612 } 613 return true; 614 } 615 virtual const char *getClobbers() const { 616 return ""; 617 } 618}; 619 620const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 621#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false }, 622#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 623 ALL_LANGUAGES, false }, 624#include "clang/Basic/BuiltinsPPC.def" 625}; 626 627 628/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 629/// #defines that are not tied to a specific subtarget. 630void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 631 MacroBuilder &Builder) const { 632 // Target identification. 633 Builder.defineMacro("__ppc__"); 634 Builder.defineMacro("_ARCH_PPC"); 635 Builder.defineMacro("__powerpc__"); 636 Builder.defineMacro("__POWERPC__"); 637 if (PointerWidth == 64) { 638 Builder.defineMacro("_ARCH_PPC64"); 639 Builder.defineMacro("_LP64"); 640 Builder.defineMacro("__LP64__"); 641 Builder.defineMacro("__powerpc64__"); 642 Builder.defineMacro("__ppc64__"); 643 } else { 644 Builder.defineMacro("__ppc__"); 645 } 646 647 // Target properties. 648 Builder.defineMacro("_BIG_ENDIAN"); 649 Builder.defineMacro("__BIG_ENDIAN__"); 650 651 // Subtarget options. 652 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 653 Builder.defineMacro("__REGISTER_PREFIX__", ""); 654 655 // FIXME: Should be controlled by command line option. 656 Builder.defineMacro("__LONG_DOUBLE_128__"); 657 658 if (Opts.AltiVec) { 659 Builder.defineMacro("__VEC__", "10206"); 660 Builder.defineMacro("__ALTIVEC__"); 661 } 662} 663 664 665const char * const PPCTargetInfo::GCCRegNames[] = { 666 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 667 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 668 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 669 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 670 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 671 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 672 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 673 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 674 "mq", "lr", "ctr", "ap", 675 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 676 "xer", 677 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 678 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 679 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 680 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 681 "vrsave", "vscr", 682 "spe_acc", "spefscr", 683 "sfp" 684}; 685 686void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 687 unsigned &NumNames) const { 688 Names = GCCRegNames; 689 NumNames = llvm::array_lengthof(GCCRegNames); 690} 691 692const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 693 // While some of these aliases do map to different registers 694 // they still share the same register name. 695 { { "0" }, "r0" }, 696 { { "1"}, "r1" }, 697 { { "2" }, "r2" }, 698 { { "3" }, "r3" }, 699 { { "4" }, "r4" }, 700 { { "5" }, "r5" }, 701 { { "6" }, "r6" }, 702 { { "7" }, "r7" }, 703 { { "8" }, "r8" }, 704 { { "9" }, "r9" }, 705 { { "10" }, "r10" }, 706 { { "11" }, "r11" }, 707 { { "12" }, "r12" }, 708 { { "13" }, "r13" }, 709 { { "14" }, "r14" }, 710 { { "15" }, "r15" }, 711 { { "16" }, "r16" }, 712 { { "17" }, "r17" }, 713 { { "18" }, "r18" }, 714 { { "19" }, "r19" }, 715 { { "20" }, "r20" }, 716 { { "21" }, "r21" }, 717 { { "22" }, "r22" }, 718 { { "23" }, "r23" }, 719 { { "24" }, "r24" }, 720 { { "25" }, "r25" }, 721 { { "26" }, "r26" }, 722 { { "27" }, "r27" }, 723 { { "28" }, "r28" }, 724 { { "29" }, "r29" }, 725 { { "30" }, "r30" }, 726 { { "31" }, "r31" }, 727 { { "fr0" }, "f0" }, 728 { { "fr1" }, "f1" }, 729 { { "fr2" }, "f2" }, 730 { { "fr3" }, "f3" }, 731 { { "fr4" }, "f4" }, 732 { { "fr5" }, "f5" }, 733 { { "fr6" }, "f6" }, 734 { { "fr7" }, "f7" }, 735 { { "fr8" }, "f8" }, 736 { { "fr9" }, "f9" }, 737 { { "fr10" }, "f10" }, 738 { { "fr11" }, "f11" }, 739 { { "fr12" }, "f12" }, 740 { { "fr13" }, "f13" }, 741 { { "fr14" }, "f14" }, 742 { { "fr15" }, "f15" }, 743 { { "fr16" }, "f16" }, 744 { { "fr17" }, "f17" }, 745 { { "fr18" }, "f18" }, 746 { { "fr19" }, "f19" }, 747 { { "fr20" }, "f20" }, 748 { { "fr21" }, "f21" }, 749 { { "fr22" }, "f22" }, 750 { { "fr23" }, "f23" }, 751 { { "fr24" }, "f24" }, 752 { { "fr25" }, "f25" }, 753 { { "fr26" }, "f26" }, 754 { { "fr27" }, "f27" }, 755 { { "fr28" }, "f28" }, 756 { { "fr29" }, "f29" }, 757 { { "fr30" }, "f30" }, 758 { { "fr31" }, "f31" }, 759 { { "cc" }, "cr0" }, 760}; 761 762void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 763 unsigned &NumAliases) const { 764 Aliases = GCCRegAliases; 765 NumAliases = llvm::array_lengthof(GCCRegAliases); 766} 767} // end anonymous namespace. 768 769namespace { 770class PPC32TargetInfo : public PPCTargetInfo { 771public: 772 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 773 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 774 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 775 776 if (getTriple().getOS() == llvm::Triple::FreeBSD) 777 SizeType = UnsignedInt; 778 } 779 780 virtual const char *getVAListDeclaration() const { 781 // This is the ELF definition, and is overridden by the Darwin sub-target 782 return "typedef struct __va_list_tag {" 783 " unsigned char gpr;" 784 " unsigned char fpr;" 785 " unsigned short reserved;" 786 " void* overflow_arg_area;" 787 " void* reg_save_area;" 788 "} __builtin_va_list[1];"; 789 } 790}; 791} // end anonymous namespace. 792 793namespace { 794class PPC64TargetInfo : public PPCTargetInfo { 795public: 796 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 797 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 798 IntMaxType = SignedLong; 799 UIntMaxType = UnsignedLong; 800 Int64Type = SignedLong; 801 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 802 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 803 } 804 virtual const char *getVAListDeclaration() const { 805 return "typedef char* __builtin_va_list;"; 806 } 807}; 808} // end anonymous namespace. 809 810 811namespace { 812class DarwinPPC32TargetInfo : 813 public DarwinTargetInfo<PPC32TargetInfo> { 814public: 815 DarwinPPC32TargetInfo(const std::string& triple) 816 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 817 HasAlignMac68kSupport = true; 818 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 819 } 820 virtual const char *getVAListDeclaration() const { 821 return "typedef char* __builtin_va_list;"; 822 } 823}; 824 825class DarwinPPC64TargetInfo : 826 public DarwinTargetInfo<PPC64TargetInfo> { 827public: 828 DarwinPPC64TargetInfo(const std::string& triple) 829 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 830 HasAlignMac68kSupport = true; 831 } 832}; 833} // end anonymous namespace. 834 835namespace { 836// MBlaze abstract base class 837class MBlazeTargetInfo : public TargetInfo { 838 static const char * const GCCRegNames[]; 839 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 840 841public: 842 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 843 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 844 } 845 846 virtual void getTargetBuiltins(const Builtin::Info *&Records, 847 unsigned &NumRecords) const { 848 // FIXME: Implement. 849 Records = 0; 850 NumRecords = 0; 851 } 852 853 virtual void getTargetDefines(const LangOptions &Opts, 854 MacroBuilder &Builder) const; 855 856 virtual const char *getVAListDeclaration() const { 857 return "typedef char* __builtin_va_list;"; 858 } 859 virtual const char *getTargetPrefix() const { 860 return "mblaze"; 861 } 862 virtual void getGCCRegNames(const char * const *&Names, 863 unsigned &NumNames) const; 864 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 865 unsigned &NumAliases) const; 866 virtual bool validateAsmConstraint(const char *&Name, 867 TargetInfo::ConstraintInfo &Info) const { 868 switch (*Name) { 869 default: return false; 870 case 'O': // Zero 871 return true; 872 case 'b': // Base register 873 case 'f': // Floating point register 874 Info.setAllowsRegister(); 875 return true; 876 } 877 } 878 virtual const char *getClobbers() const { 879 return ""; 880 } 881}; 882 883/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 884/// #defines that are not tied to a specific subtarget. 885void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 886 MacroBuilder &Builder) const { 887 // Target identification. 888 Builder.defineMacro("__microblaze__"); 889 Builder.defineMacro("_ARCH_MICROBLAZE"); 890 Builder.defineMacro("__MICROBLAZE__"); 891 892 // Target properties. 893 Builder.defineMacro("_BIG_ENDIAN"); 894 Builder.defineMacro("__BIG_ENDIAN__"); 895 896 // Subtarget options. 897 Builder.defineMacro("__REGISTER_PREFIX__", ""); 898} 899 900 901const char * const MBlazeTargetInfo::GCCRegNames[] = { 902 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 903 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 904 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 905 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 906 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 907 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 908 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 909 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 910 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 911 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 912}; 913 914void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 915 unsigned &NumNames) const { 916 Names = GCCRegNames; 917 NumNames = llvm::array_lengthof(GCCRegNames); 918} 919 920const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 921 { {"f0"}, "r0" }, 922 { {"f1"}, "r1" }, 923 { {"f2"}, "r2" }, 924 { {"f3"}, "r3" }, 925 { {"f4"}, "r4" }, 926 { {"f5"}, "r5" }, 927 { {"f6"}, "r6" }, 928 { {"f7"}, "r7" }, 929 { {"f8"}, "r8" }, 930 { {"f9"}, "r9" }, 931 { {"f10"}, "r10" }, 932 { {"f11"}, "r11" }, 933 { {"f12"}, "r12" }, 934 { {"f13"}, "r13" }, 935 { {"f14"}, "r14" }, 936 { {"f15"}, "r15" }, 937 { {"f16"}, "r16" }, 938 { {"f17"}, "r17" }, 939 { {"f18"}, "r18" }, 940 { {"f19"}, "r19" }, 941 { {"f20"}, "r20" }, 942 { {"f21"}, "r21" }, 943 { {"f22"}, "r22" }, 944 { {"f23"}, "r23" }, 945 { {"f24"}, "r24" }, 946 { {"f25"}, "r25" }, 947 { {"f26"}, "r26" }, 948 { {"f27"}, "r27" }, 949 { {"f28"}, "r28" }, 950 { {"f29"}, "r29" }, 951 { {"f30"}, "r30" }, 952 { {"f31"}, "r31" }, 953}; 954 955void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 956 unsigned &NumAliases) const { 957 Aliases = GCCRegAliases; 958 NumAliases = llvm::array_lengthof(GCCRegAliases); 959} 960} // end anonymous namespace. 961 962namespace { 963// Namespace for x86 abstract base class 964const Builtin::Info BuiltinInfo[] = { 965#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false }, 966#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 967 ALL_LANGUAGES, false }, 968#include "clang/Basic/BuiltinsX86.def" 969}; 970 971static const char* const GCCRegNames[] = { 972 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 973 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 974 "argp", "flags", "fspr", "dirflag", "frame", 975 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 976 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 977 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 978 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15" 979}; 980 981const TargetInfo::GCCRegAlias GCCRegAliases[] = { 982 { { "al", "ah", "eax", "rax" }, "ax" }, 983 { { "bl", "bh", "ebx", "rbx" }, "bx" }, 984 { { "cl", "ch", "ecx", "rcx" }, "cx" }, 985 { { "dl", "dh", "edx", "rdx" }, "dx" }, 986 { { "esi", "rsi" }, "si" }, 987 { { "edi", "rdi" }, "di" }, 988 { { "esp", "rsp" }, "sp" }, 989 { { "ebp", "rbp" }, "bp" }, 990}; 991 992// X86 target abstract base class; x86-32 and x86-64 are very close, so 993// most of the implementation can be shared. 994class X86TargetInfo : public TargetInfo { 995 enum X86SSEEnum { 996 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 997 } SSELevel; 998 enum AMD3DNowEnum { 999 NoAMD3DNow, AMD3DNow, AMD3DNowAthlon 1000 } AMD3DNowLevel; 1001 1002 bool HasAES; 1003 bool HasAVX; 1004 1005public: 1006 X86TargetInfo(const std::string& triple) 1007 : TargetInfo(triple), SSELevel(NoMMXSSE), AMD3DNowLevel(NoAMD3DNow), 1008 HasAES(false), HasAVX(false) { 1009 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1010 } 1011 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1012 unsigned &NumRecords) const { 1013 Records = BuiltinInfo; 1014 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1015 } 1016 virtual void getGCCRegNames(const char * const *&Names, 1017 unsigned &NumNames) const { 1018 Names = GCCRegNames; 1019 NumNames = llvm::array_lengthof(GCCRegNames); 1020 } 1021 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1022 unsigned &NumAliases) const { 1023 Aliases = GCCRegAliases; 1024 NumAliases = llvm::array_lengthof(GCCRegAliases); 1025 } 1026 virtual bool validateAsmConstraint(const char *&Name, 1027 TargetInfo::ConstraintInfo &info) const; 1028 virtual std::string convertConstraint(const char Constraint) const; 1029 virtual const char *getClobbers() const { 1030 return "~{dirflag},~{fpsr},~{flags}"; 1031 } 1032 virtual void getTargetDefines(const LangOptions &Opts, 1033 MacroBuilder &Builder) const; 1034 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1035 const std::string &Name, 1036 bool Enabled) const; 1037 virtual void getDefaultFeatures(const std::string &CPU, 1038 llvm::StringMap<bool> &Features) const; 1039 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1040}; 1041 1042void X86TargetInfo::getDefaultFeatures(const std::string &CPU, 1043 llvm::StringMap<bool> &Features) const { 1044 // FIXME: This should not be here. 1045 Features["3dnow"] = false; 1046 Features["3dnowa"] = false; 1047 Features["mmx"] = false; 1048 Features["sse"] = false; 1049 Features["sse2"] = false; 1050 Features["sse3"] = false; 1051 Features["ssse3"] = false; 1052 Features["sse41"] = false; 1053 Features["sse42"] = false; 1054 Features["aes"] = false; 1055 Features["avx"] = false; 1056 1057 // LLVM does not currently recognize this. 1058 // Features["sse4a"] = false; 1059 1060 // FIXME: This *really* should not be here. 1061 1062 // X86_64 always has SSE2. 1063 if (PointerWidth == 64) 1064 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1065 1066 if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" || 1067 CPU == "pentium" || CPU == "i686" || CPU == "pentiumpro") 1068 ; 1069 else if (CPU == "pentium-mmx" || CPU == "pentium2") 1070 setFeatureEnabled(Features, "mmx", true); 1071 else if (CPU == "pentium3") 1072 setFeatureEnabled(Features, "sse", true); 1073 else if (CPU == "pentium-m" || CPU == "pentium4" || CPU == "x86-64") 1074 setFeatureEnabled(Features, "sse2", true); 1075 else if (CPU == "yonah" || CPU == "prescott" || CPU == "nocona") 1076 setFeatureEnabled(Features, "sse3", true); 1077 else if (CPU == "core2") 1078 setFeatureEnabled(Features, "ssse3", true); 1079 else if (CPU == "penryn") { 1080 setFeatureEnabled(Features, "sse4", true); 1081 Features["sse42"] = false; 1082 } else if (CPU == "atom") 1083 setFeatureEnabled(Features, "sse3", true); 1084 else if (CPU == "corei7") { 1085 setFeatureEnabled(Features, "sse4", true); 1086 setFeatureEnabled(Features, "aes", true); 1087 } 1088 else if (CPU == "k6" || CPU == "winchip-c6") 1089 setFeatureEnabled(Features, "mmx", true); 1090 else if (CPU == "k6-2" || CPU == "k6-3" || CPU == "athlon" || 1091 CPU == "athlon-tbird" || CPU == "winchip2" || CPU == "c3") { 1092 setFeatureEnabled(Features, "mmx", true); 1093 setFeatureEnabled(Features, "3dnow", true); 1094 } else if (CPU == "athlon-4" || CPU == "athlon-xp" || CPU == "athlon-mp") { 1095 setFeatureEnabled(Features, "sse", true); 1096 setFeatureEnabled(Features, "3dnowa", true); 1097 } else if (CPU == "k8" || CPU == "opteron" || CPU == "athlon64" || 1098 CPU == "athlon-fx") { 1099 setFeatureEnabled(Features, "sse2", true); 1100 setFeatureEnabled(Features, "3dnowa", true); 1101 } else if (CPU == "k8-sse3") { 1102 setFeatureEnabled(Features, "sse3", true); 1103 setFeatureEnabled(Features, "3dnowa", true); 1104 } else if (CPU == "c3-2") 1105 setFeatureEnabled(Features, "sse", true); 1106} 1107 1108bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1109 const std::string &Name, 1110 bool Enabled) const { 1111 // FIXME: This *really* should not be here. We need some way of translating 1112 // options into llvm subtarget features. 1113 if (!Features.count(Name) && 1114 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1115 return false; 1116 1117 if (Enabled) { 1118 if (Name == "mmx") 1119 Features["mmx"] = true; 1120 else if (Name == "sse") 1121 Features["mmx"] = Features["sse"] = true; 1122 else if (Name == "sse2") 1123 Features["mmx"] = Features["sse"] = Features["sse2"] = true; 1124 else if (Name == "sse3") 1125 Features["mmx"] = Features["sse"] = Features["sse2"] = 1126 Features["sse3"] = true; 1127 else if (Name == "ssse3") 1128 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1129 Features["ssse3"] = true; 1130 else if (Name == "sse4" || Name == "sse4.2") 1131 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1132 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1133 else if (Name == "sse4.1") 1134 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1135 Features["ssse3"] = Features["sse41"] = true; 1136 else if (Name == "3dnow") 1137 Features["3dnowa"] = true; 1138 else if (Name == "3dnowa") 1139 Features["3dnow"] = Features["3dnowa"] = true; 1140 else if (Name == "aes") 1141 Features["aes"] = true; 1142 else if (Name == "avx") 1143 Features["avx"] = true; 1144 } else { 1145 if (Name == "mmx") 1146 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1147 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1148 else if (Name == "sse") 1149 Features["sse"] = Features["sse2"] = Features["sse3"] = 1150 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1151 else if (Name == "sse2") 1152 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1153 Features["sse41"] = Features["sse42"] = false; 1154 else if (Name == "sse3") 1155 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1156 Features["sse42"] = false; 1157 else if (Name == "ssse3") 1158 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1159 else if (Name == "sse4") 1160 Features["sse41"] = Features["sse42"] = false; 1161 else if (Name == "sse4.2") 1162 Features["sse42"] = false; 1163 else if (Name == "sse4.1") 1164 Features["sse41"] = Features["sse42"] = false; 1165 else if (Name == "3dnow") 1166 Features["3dnow"] = Features["3dnowa"] = false; 1167 else if (Name == "3dnowa") 1168 Features["3dnowa"] = false; 1169 else if (Name == "aes") 1170 Features["aes"] = false; 1171 else if (Name == "avx") 1172 Features["avx"] = false; 1173 } 1174 1175 return true; 1176} 1177 1178/// HandleTargetOptions - Perform initialization based on the user 1179/// configured set of features. 1180void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1181 // Remember the maximum enabled sselevel. 1182 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1183 // Ignore disabled features. 1184 if (Features[i][0] == '-') 1185 continue; 1186 1187 if (Features[i].substr(1) == "aes") { 1188 HasAES = true; 1189 continue; 1190 } 1191 1192 // FIXME: Not sure yet how to treat AVX in regard to SSE levels. 1193 // For now let it be enabled together with other SSE levels. 1194 if (Features[i].substr(1) == "avx") { 1195 HasAVX = true; 1196 continue; 1197 } 1198 1199 assert(Features[i][0] == '+' && "Invalid target feature!"); 1200 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1201 .Case("sse42", SSE42) 1202 .Case("sse41", SSE41) 1203 .Case("ssse3", SSSE3) 1204 .Case("sse3", SSE3) 1205 .Case("sse2", SSE2) 1206 .Case("sse", SSE1) 1207 .Case("mmx", MMX) 1208 .Default(NoMMXSSE); 1209 SSELevel = std::max(SSELevel, Level); 1210 1211 AMD3DNowEnum ThreeDNowLevel = 1212 llvm::StringSwitch<AMD3DNowEnum>(Features[i].substr(1)) 1213 .Case("3dnowa", AMD3DNowAthlon) 1214 .Case("3dnow", AMD3DNow) 1215 .Default(NoAMD3DNow); 1216 1217 AMD3DNowLevel = std::max(AMD3DNowLevel, ThreeDNowLevel); 1218 } 1219} 1220 1221/// X86TargetInfo::getTargetDefines - Return a set of the X86-specific #defines 1222/// that are not tied to a specific subtarget. 1223void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1224 MacroBuilder &Builder) const { 1225 // Target identification. 1226 if (PointerWidth == 64) { 1227 Builder.defineMacro("_LP64"); 1228 Builder.defineMacro("__LP64__"); 1229 Builder.defineMacro("__amd64__"); 1230 Builder.defineMacro("__amd64"); 1231 Builder.defineMacro("__x86_64"); 1232 Builder.defineMacro("__x86_64__"); 1233 } else { 1234 DefineStd(Builder, "i386", Opts); 1235 } 1236 1237 if (HasAES) 1238 Builder.defineMacro("__AES__"); 1239 1240 if (HasAVX) 1241 Builder.defineMacro("__AVX__"); 1242 1243 // Target properties. 1244 Builder.defineMacro("__LITTLE_ENDIAN__"); 1245 1246 // Subtarget options. 1247 Builder.defineMacro("__nocona"); 1248 Builder.defineMacro("__nocona__"); 1249 Builder.defineMacro("__tune_nocona__"); 1250 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1251 1252 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 1253 // functions in glibc header files that use FP Stack inline asm which the 1254 // backend can't deal with (PR879). 1255 Builder.defineMacro("__NO_MATH_INLINES"); 1256 1257 // Each case falls through to the previous one here. 1258 switch (SSELevel) { 1259 case SSE42: 1260 Builder.defineMacro("__SSE4_2__"); 1261 case SSE41: 1262 Builder.defineMacro("__SSE4_1__"); 1263 case SSSE3: 1264 Builder.defineMacro("__SSSE3__"); 1265 case SSE3: 1266 Builder.defineMacro("__SSE3__"); 1267 case SSE2: 1268 Builder.defineMacro("__SSE2__"); 1269 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 1270 case SSE1: 1271 Builder.defineMacro("__SSE__"); 1272 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 1273 case MMX: 1274 Builder.defineMacro("__MMX__"); 1275 case NoMMXSSE: 1276 break; 1277 } 1278 1279 if (Opts.Microsoft && PointerWidth == 32) { 1280 switch (SSELevel) { 1281 case SSE42: 1282 case SSE41: 1283 case SSSE3: 1284 case SSE3: 1285 case SSE2: 1286 Builder.defineMacro("_M_IX86_FP", llvm::Twine(2)); 1287 break; 1288 case SSE1: 1289 Builder.defineMacro("_M_IX86_FP", llvm::Twine(1)); 1290 break; 1291 default: 1292 Builder.defineMacro("_M_IX86_FP", llvm::Twine(0)); 1293 } 1294 } 1295 1296 // Each case falls through to the previous one here. 1297 switch (AMD3DNowLevel) { 1298 case AMD3DNowAthlon: 1299 Builder.defineMacro("__3dNOW_A__"); 1300 case AMD3DNow: 1301 Builder.defineMacro("__3dNOW__"); 1302 case NoAMD3DNow: 1303 break; 1304 } 1305} 1306 1307 1308bool 1309X86TargetInfo::validateAsmConstraint(const char *&Name, 1310 TargetInfo::ConstraintInfo &Info) const { 1311 switch (*Name) { 1312 default: return false; 1313 case 'Y': // first letter of a pair: 1314 switch (*(Name+1)) { 1315 default: return false; 1316 case '0': // First SSE register. 1317 case 't': // Any SSE register, when SSE2 is enabled. 1318 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 1319 case 'm': // any MMX register, when inter-unit moves enabled. 1320 break; // falls through to setAllowsRegister. 1321 } 1322 case 'a': // eax. 1323 case 'b': // ebx. 1324 case 'c': // ecx. 1325 case 'd': // edx. 1326 case 'S': // esi. 1327 case 'D': // edi. 1328 case 'A': // edx:eax. 1329 case 'f': // any x87 floating point stack register. 1330 case 't': // top of floating point stack. 1331 case 'u': // second from top of floating point stack. 1332 case 'q': // Any register accessible as [r]l: a, b, c, and d. 1333 case 'y': // Any MMX register. 1334 case 'x': // Any SSE register. 1335 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 1336 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 1337 case 'l': // "Index" registers: any general register that can be used as an 1338 // index in a base+index memory access. 1339 Info.setAllowsRegister(); 1340 return true; 1341 case 'C': // SSE floating point constant. 1342 case 'G': // x87 floating point constant. 1343 case 'e': // 32-bit signed integer constant for use with zero-extending 1344 // x86_64 instructions. 1345 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 1346 // x86_64 instructions. 1347 return true; 1348 } 1349 return false; 1350} 1351 1352 1353std::string 1354X86TargetInfo::convertConstraint(const char Constraint) const { 1355 switch (Constraint) { 1356 case 'a': return std::string("{ax}"); 1357 case 'b': return std::string("{bx}"); 1358 case 'c': return std::string("{cx}"); 1359 case 'd': return std::string("{dx}"); 1360 case 'S': return std::string("{si}"); 1361 case 'D': return std::string("{di}"); 1362 case 'p': // address 1363 return std::string("im"); 1364 case 't': // top of floating point stack. 1365 return std::string("{st}"); 1366 case 'u': // second from top of floating point stack. 1367 return std::string("{st(1)}"); // second from top of floating point stack. 1368 default: 1369 return std::string(1, Constraint); 1370 } 1371} 1372} // end anonymous namespace 1373 1374namespace { 1375// X86-32 generic target 1376class X86_32TargetInfo : public X86TargetInfo { 1377public: 1378 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 1379 DoubleAlign = LongLongAlign = 32; 1380 LongDoubleWidth = 96; 1381 LongDoubleAlign = 32; 1382 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1383 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 1384 "a0:0:64-f80:32:32-n8:16:32"; 1385 SizeType = UnsignedInt; 1386 PtrDiffType = SignedInt; 1387 IntPtrType = SignedInt; 1388 RegParmMax = 3; 1389 1390 // Use fpret for all types. 1391 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 1392 (1 << TargetInfo::Double) | 1393 (1 << TargetInfo::LongDouble)); 1394 } 1395 virtual const char *getVAListDeclaration() const { 1396 return "typedef char* __builtin_va_list;"; 1397 } 1398 1399 int getEHDataRegisterNumber(unsigned RegNo) const { 1400 if (RegNo == 0) return 0; 1401 if (RegNo == 1) return 2; 1402 return -1; 1403 } 1404}; 1405} // end anonymous namespace 1406 1407namespace { 1408class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 1409public: 1410 OpenBSDI386TargetInfo(const std::string& triple) : 1411 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 1412 SizeType = UnsignedLong; 1413 IntPtrType = SignedLong; 1414 PtrDiffType = SignedLong; 1415 } 1416}; 1417} // end anonymous namespace 1418 1419namespace { 1420class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 1421public: 1422 DarwinI386TargetInfo(const std::string& triple) : 1423 DarwinTargetInfo<X86_32TargetInfo>(triple) { 1424 LongDoubleWidth = 128; 1425 LongDoubleAlign = 128; 1426 SizeType = UnsignedLong; 1427 IntPtrType = SignedLong; 1428 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1429 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 1430 "a0:0:64-f80:128:128-n8:16:32"; 1431 HasAlignMac68kSupport = true; 1432 } 1433 1434}; 1435} // end anonymous namespace 1436 1437namespace { 1438// x86-32 Windows target 1439class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 1440public: 1441 WindowsX86_32TargetInfo(const std::string& triple) 1442 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 1443 TLSSupported = false; 1444 WCharType = UnsignedShort; 1445 DoubleAlign = LongLongAlign = 64; 1446 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1447 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 1448 "v128:128:128-a0:0:64-f80:32:32-n8:16:32"; 1449 } 1450 virtual void getTargetDefines(const LangOptions &Opts, 1451 MacroBuilder &Builder) const { 1452 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 1453 } 1454}; 1455} // end anonymous namespace 1456 1457namespace { 1458 1459// x86-32 Windows Visual Studio target 1460class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 1461public: 1462 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 1463 : WindowsX86_32TargetInfo(triple) { 1464 LongDoubleWidth = LongDoubleAlign = 64; 1465 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 1466 } 1467 virtual void getTargetDefines(const LangOptions &Opts, 1468 MacroBuilder &Builder) const { 1469 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 1470 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 1471 // The value of the following reflects processor type. 1472 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 1473 // We lost the original triple, so we use the default. 1474 Builder.defineMacro("_M_IX86", "600"); 1475 } 1476}; 1477} // end anonymous namespace 1478 1479namespace { 1480// x86-32 MinGW target 1481class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 1482public: 1483 MinGWX86_32TargetInfo(const std::string& triple) 1484 : WindowsX86_32TargetInfo(triple) { 1485 } 1486 virtual void getTargetDefines(const LangOptions &Opts, 1487 MacroBuilder &Builder) const { 1488 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 1489 DefineStd(Builder, "WIN32", Opts); 1490 DefineStd(Builder, "WINNT", Opts); 1491 Builder.defineMacro("_X86_"); 1492 Builder.defineMacro("__MSVCRT__"); 1493 Builder.defineMacro("__MINGW32__"); 1494 1495 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 1496 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 1497 if (Opts.Microsoft) 1498 // Provide "as-is" __declspec. 1499 Builder.defineMacro("__declspec", "__declspec"); 1500 else 1501 // Provide alias of __attribute__ like mingw32-gcc. 1502 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 1503 } 1504}; 1505} // end anonymous namespace 1506 1507namespace { 1508// x86-32 Cygwin target 1509class CygwinX86_32TargetInfo : public X86_32TargetInfo { 1510public: 1511 CygwinX86_32TargetInfo(const std::string& triple) 1512 : X86_32TargetInfo(triple) { 1513 TLSSupported = false; 1514 WCharType = UnsignedShort; 1515 DoubleAlign = LongLongAlign = 64; 1516 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1517 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 1518 "a0:0:64-f80:32:32-n8:16:32"; 1519 } 1520 virtual void getTargetDefines(const LangOptions &Opts, 1521 MacroBuilder &Builder) const { 1522 X86_32TargetInfo::getTargetDefines(Opts, Builder); 1523 Builder.defineMacro("__CYGWIN__"); 1524 Builder.defineMacro("__CYGWIN32__"); 1525 DefineStd(Builder, "unix", Opts); 1526 if (Opts.CPlusPlus) 1527 Builder.defineMacro("_GNU_SOURCE"); 1528 } 1529}; 1530} // end anonymous namespace 1531 1532namespace { 1533// x86-32 Haiku target 1534class HaikuX86_32TargetInfo : public X86_32TargetInfo { 1535public: 1536 HaikuX86_32TargetInfo(const std::string& triple) 1537 : X86_32TargetInfo(triple) { 1538 SizeType = UnsignedLong; 1539 IntPtrType = SignedLong; 1540 PtrDiffType = SignedLong; 1541 this->UserLabelPrefix = ""; 1542 } 1543 virtual void getTargetDefines(const LangOptions &Opts, 1544 MacroBuilder &Builder) const { 1545 X86_32TargetInfo::getTargetDefines(Opts, Builder); 1546 Builder.defineMacro("__INTEL__"); 1547 Builder.defineMacro("__HAIKU__"); 1548 } 1549}; 1550} // end anonymous namespace 1551 1552namespace { 1553// x86-64 generic target 1554class X86_64TargetInfo : public X86TargetInfo { 1555public: 1556 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 1557 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 1558 LongDoubleWidth = 128; 1559 LongDoubleAlign = 128; 1560 LargeArrayMinWidth = 128; 1561 LargeArrayAlign = 128; 1562 IntMaxType = SignedLong; 1563 UIntMaxType = UnsignedLong; 1564 Int64Type = SignedLong; 1565 RegParmMax = 6; 1566 1567 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1568 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 1569 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"; 1570 1571 // Use fpret only for long double. 1572 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 1573 } 1574 virtual const char *getVAListDeclaration() const { 1575 return "typedef struct __va_list_tag {" 1576 " unsigned gp_offset;" 1577 " unsigned fp_offset;" 1578 " void* overflow_arg_area;" 1579 " void* reg_save_area;" 1580 "} __va_list_tag;" 1581 "typedef __va_list_tag __builtin_va_list[1];"; 1582 } 1583 1584 int getEHDataRegisterNumber(unsigned RegNo) const { 1585 if (RegNo == 0) return 0; 1586 if (RegNo == 1) return 1; 1587 return -1; 1588 } 1589}; 1590} // end anonymous namespace 1591 1592namespace { 1593// x86-64 Windows target 1594class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 1595public: 1596 WindowsX86_64TargetInfo(const std::string& triple) 1597 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 1598 TLSSupported = false; 1599 WCharType = UnsignedShort; 1600 LongWidth = LongAlign = 32; 1601 DoubleAlign = LongLongAlign = 64; 1602 IntMaxType = SignedLongLong; 1603 UIntMaxType = UnsignedLongLong; 1604 Int64Type = SignedLongLong; 1605 SizeType = UnsignedLongLong; 1606 PtrDiffType = SignedLongLong; 1607 IntPtrType = SignedLongLong; 1608 this->UserLabelPrefix = ""; 1609 } 1610 virtual void getTargetDefines(const LangOptions &Opts, 1611 MacroBuilder &Builder) const { 1612 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 1613 Builder.defineMacro("_WIN64"); 1614 } 1615 virtual const char *getVAListDeclaration() const { 1616 return "typedef char* __builtin_va_list;"; 1617 } 1618}; 1619} // end anonymous namespace 1620 1621namespace { 1622// x86-64 Windows Visual Studio target 1623class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 1624public: 1625 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 1626 : WindowsX86_64TargetInfo(triple) { 1627 LongDoubleWidth = LongDoubleAlign = 64; 1628 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 1629 } 1630 virtual void getTargetDefines(const LangOptions &Opts, 1631 MacroBuilder &Builder) const { 1632 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 1633 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 1634 Builder.defineMacro("_M_X64"); 1635 Builder.defineMacro("_M_AMD64"); 1636 } 1637}; 1638} // end anonymous namespace 1639 1640namespace { 1641// x86-64 MinGW target 1642class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 1643public: 1644 MinGWX86_64TargetInfo(const std::string& triple) 1645 : WindowsX86_64TargetInfo(triple) { 1646 } 1647 virtual void getTargetDefines(const LangOptions &Opts, 1648 MacroBuilder &Builder) const { 1649 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 1650 DefineStd(Builder, "WIN64", Opts); 1651 Builder.defineMacro("__MSVCRT__"); 1652 Builder.defineMacro("__MINGW32__"); 1653 Builder.defineMacro("__MINGW64__"); 1654 1655 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 1656 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 1657 if (Opts.Microsoft) 1658 // Provide "as-is" __declspec. 1659 Builder.defineMacro("__declspec", "__declspec"); 1660 else 1661 // Provide alias of __attribute__ like mingw32-gcc. 1662 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 1663 } 1664}; 1665} // end anonymous namespace 1666 1667namespace { 1668class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 1669public: 1670 DarwinX86_64TargetInfo(const std::string& triple) 1671 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 1672 Int64Type = SignedLongLong; 1673 } 1674}; 1675} // end anonymous namespace 1676 1677namespace { 1678class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 1679public: 1680 OpenBSDX86_64TargetInfo(const std::string& triple) 1681 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 1682 IntMaxType = SignedLongLong; 1683 UIntMaxType = UnsignedLongLong; 1684 Int64Type = SignedLongLong; 1685 } 1686}; 1687} // end anonymous namespace 1688 1689namespace { 1690class ARMTargetInfo : public TargetInfo { 1691 // Possible FPU choices. 1692 enum FPUMode { 1693 NoFPU, 1694 VFP2FPU, 1695 VFP3FPU, 1696 NeonFPU 1697 }; 1698 1699 static bool FPUModeIsVFP(FPUMode Mode) { 1700 return Mode >= VFP2FPU && Mode <= NeonFPU; 1701 } 1702 1703 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1704 static const char * const GCCRegNames[]; 1705 1706 std::string ABI, CPU; 1707 1708 unsigned FPU : 3; 1709 1710 unsigned IsThumb : 1; 1711 1712 // Initialized via features. 1713 unsigned SoftFloat : 1; 1714 unsigned SoftFloatABI : 1; 1715 1716 static const Builtin::Info BuiltinInfo[]; 1717 1718public: 1719 ARMTargetInfo(const std::string &TripleStr) 1720 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 1721 { 1722 SizeType = UnsignedInt; 1723 PtrDiffType = SignedInt; 1724 1725 // {} in inline assembly are neon specifiers, not assembly variant 1726 // specifiers. 1727 NoAsmVariants = true; 1728 1729 // FIXME: Should we just treat this as a feature? 1730 IsThumb = getTriple().getArchName().startswith("thumb"); 1731 if (IsThumb) { 1732 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 1733 "i64:64:64-f32:32:32-f64:64:64-" 1734 "v64:64:64-v128:128:128-a0:0:32-n32"); 1735 } else { 1736 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1737 "i64:64:64-f32:32:32-f64:64:64-" 1738 "v64:64:64-v128:128:128-a0:0:64-n32"); 1739 } 1740 1741 // ARM targets default to using the ARM C++ ABI. 1742 CXXABI = CXXABI_ARM; 1743 } 1744 virtual const char *getABI() const { return ABI.c_str(); } 1745 virtual bool setABI(const std::string &Name) { 1746 ABI = Name; 1747 1748 // The defaults (above) are for AAPCS, check if we need to change them. 1749 // 1750 // FIXME: We need support for -meabi... we could just mangle it into the 1751 // name. 1752 if (Name == "apcs-gnu") { 1753 DoubleAlign = LongLongAlign = LongDoubleAlign = 32; 1754 SizeType = UnsignedLong; 1755 1756 // Do not respect the alignment of bit-field types when laying out 1757 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 1758 UseBitFieldTypeAlignment = false; 1759 1760 if (IsThumb) { 1761 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 1762 "i64:32:32-f32:32:32-f64:32:32-" 1763 "v64:64:64-v128:128:128-a0:0:32-n32"); 1764 } else { 1765 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1766 "i64:32:32-f32:32:32-f64:32:32-" 1767 "v64:64:64-v128:128:128-a0:0:64-n32"); 1768 } 1769 1770 // FIXME: Override "preferred align" for double and long long. 1771 } else if (Name == "aapcs") { 1772 // FIXME: Enumerated types are variable width in straight AAPCS. 1773 } else if (Name == "aapcs-linux") { 1774 ; 1775 } else 1776 return false; 1777 1778 return true; 1779 } 1780 1781 void getDefaultFeatures(const std::string &CPU, 1782 llvm::StringMap<bool> &Features) const { 1783 // FIXME: This should not be here. 1784 Features["vfp2"] = false; 1785 Features["vfp3"] = false; 1786 Features["neon"] = false; 1787 1788 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 1789 Features["vfp2"] = true; 1790 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 1791 Features["neon"] = true; 1792 } 1793 1794 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1795 const std::string &Name, 1796 bool Enabled) const { 1797 if (Name == "soft-float" || Name == "soft-float-abi") { 1798 Features[Name] = Enabled; 1799 } else if (Name == "vfp2" || Name == "vfp3" || Name == "neon") { 1800 // These effectively are a single option, reset them when any is enabled. 1801 if (Enabled) 1802 Features["vfp2"] = Features["vfp3"] = Features["neon"] = false; 1803 Features[Name] = Enabled; 1804 } else 1805 return false; 1806 1807 return true; 1808 } 1809 1810 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 1811 FPU = NoFPU; 1812 SoftFloat = SoftFloatABI = false; 1813 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 1814 if (Features[i] == "+soft-float") 1815 SoftFloat = true; 1816 else if (Features[i] == "+soft-float-abi") 1817 SoftFloatABI = true; 1818 else if (Features[i] == "+vfp2") 1819 FPU = VFP2FPU; 1820 else if (Features[i] == "+vfp3") 1821 FPU = VFP3FPU; 1822 else if (Features[i] == "+neon") 1823 FPU = NeonFPU; 1824 } 1825 1826 // Remove front-end specific options which the backend handles differently. 1827 std::vector<std::string>::iterator it; 1828 it = std::find(Features.begin(), Features.end(), "+soft-float"); 1829 if (it != Features.end()) 1830 Features.erase(it); 1831 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 1832 if (it != Features.end()) 1833 Features.erase(it); 1834 } 1835 1836 static const char *getCPUDefineSuffix(llvm::StringRef Name) { 1837 return llvm::StringSwitch<const char*>(Name) 1838 .Cases("arm8", "arm810", "4") 1839 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 1840 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 1841 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 1842 .Case("ep9312", "4T") 1843 .Cases("arm10tdmi", "arm1020t", "5T") 1844 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 1845 .Case("arm926ej-s", "5TEJ") 1846 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 1847 .Cases("xscale", "iwmmxt", "5TE") 1848 .Case("arm1136j-s", "6J") 1849 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 1850 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 1851 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 1852 .Cases("cortex-a8", "cortex-a9", "7A") 1853 .Case("cortex-m3", "7M") 1854 .Case("cortex-m0", "6M") 1855 .Default(0); 1856 } 1857 virtual bool setCPU(const std::string &Name) { 1858 if (!getCPUDefineSuffix(Name)) 1859 return false; 1860 1861 CPU = Name; 1862 return true; 1863 } 1864 virtual void getTargetDefines(const LangOptions &Opts, 1865 MacroBuilder &Builder) const { 1866 // Target identification. 1867 Builder.defineMacro("__arm"); 1868 Builder.defineMacro("__arm__"); 1869 1870 // Target properties. 1871 Builder.defineMacro("__ARMEL__"); 1872 Builder.defineMacro("__LITTLE_ENDIAN__"); 1873 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1874 1875 llvm::StringRef CPUArch = getCPUDefineSuffix(CPU); 1876 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 1877 1878 // Subtarget options. 1879 1880 // FIXME: It's more complicated than this and we don't really support 1881 // interworking. 1882 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 1883 Builder.defineMacro("__THUMB_INTERWORK__"); 1884 1885 if (ABI == "aapcs" || ABI == "aapcs-linux") 1886 Builder.defineMacro("__ARM_EABI__"); 1887 1888 if (SoftFloat) 1889 Builder.defineMacro("__SOFTFP__"); 1890 1891 if (CPU == "xscale") 1892 Builder.defineMacro("__XSCALE__"); 1893 1894 bool IsThumb2 = IsThumb && (CPUArch == "6T2" || CPUArch.startswith("7")); 1895 if (IsThumb) { 1896 Builder.defineMacro("__THUMBEL__"); 1897 Builder.defineMacro("__thumb__"); 1898 if (IsThumb2) 1899 Builder.defineMacro("__thumb2__"); 1900 } 1901 1902 // Note, this is always on in gcc, even though it doesn't make sense. 1903 Builder.defineMacro("__APCS_32__"); 1904 1905 if (FPUModeIsVFP((FPUMode) FPU)) 1906 Builder.defineMacro("__VFP_FP__"); 1907 1908 // This only gets set when Neon instructions are actually available, unlike 1909 // the VFP define, hence the soft float and arch check. This is subtly 1910 // different from gcc, we follow the intent which was that it should be set 1911 // when Neon instructions are actually available. 1912 if (FPU == NeonFPU && !SoftFloat && IsThumb2) 1913 Builder.defineMacro("__ARM_NEON__"); 1914 } 1915 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1916 unsigned &NumRecords) const { 1917 Records = BuiltinInfo; 1918 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 1919 } 1920 virtual const char *getVAListDeclaration() const { 1921 return "typedef char* __builtin_va_list;"; 1922 } 1923 virtual void getGCCRegNames(const char * const *&Names, 1924 unsigned &NumNames) const; 1925 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1926 unsigned &NumAliases) const; 1927 virtual bool validateAsmConstraint(const char *&Name, 1928 TargetInfo::ConstraintInfo &Info) const { 1929 // FIXME: Check if this is complete 1930 switch (*Name) { 1931 default: 1932 case 'l': // r0-r7 1933 case 'h': // r8-r15 1934 case 'w': // VFP Floating point register single precision 1935 case 'P': // VFP Floating point register double precision 1936 Info.setAllowsRegister(); 1937 return true; 1938 } 1939 return false; 1940 } 1941 virtual const char *getClobbers() const { 1942 // FIXME: Is this really right? 1943 return ""; 1944 } 1945}; 1946 1947const char * const ARMTargetInfo::GCCRegNames[] = { 1948 // Integer registers 1949 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1950 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 1951 1952 // Float registers 1953 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 1954 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 1955 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 1956 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 1957 1958 // Double registers 1959 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 1960 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 1961 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 1962 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 1963 1964 // Quad registers 1965 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 1966 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 1967}; 1968 1969void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 1970 unsigned &NumNames) const { 1971 Names = GCCRegNames; 1972 NumNames = llvm::array_lengthof(GCCRegNames); 1973} 1974 1975const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 1976 { { "a1" }, "r0" }, 1977 { { "a2" }, "r1" }, 1978 { { "a3" }, "r2" }, 1979 { { "a4" }, "r3" }, 1980 { { "v1" }, "r4" }, 1981 { { "v2" }, "r5" }, 1982 { { "v3" }, "r6" }, 1983 { { "v4" }, "r7" }, 1984 { { "v5" }, "r8" }, 1985 { { "v6", "rfp" }, "r9" }, 1986 { { "sl" }, "r10" }, 1987 { { "fp" }, "r11" }, 1988 { { "ip" }, "r12" }, 1989 { { "r13" }, "sp" }, 1990 { { "r14" }, "lr" }, 1991 { { "r15" }, "pc" }, 1992 // The S, D and Q registers overlap, but aren't really aliases; we 1993 // don't want to substitute one of these for a different-sized one. 1994}; 1995 1996void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1997 unsigned &NumAliases) const { 1998 Aliases = GCCRegAliases; 1999 NumAliases = llvm::array_lengthof(GCCRegAliases); 2000} 2001 2002const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2003#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false }, 2004#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2005 ALL_LANGUAGES, false }, 2006#include "clang/Basic/BuiltinsARM.def" 2007}; 2008} // end anonymous namespace. 2009 2010 2011namespace { 2012class DarwinARMTargetInfo : 2013 public DarwinTargetInfo<ARMTargetInfo> { 2014protected: 2015 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2016 MacroBuilder &Builder) const { 2017 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2018 } 2019 2020public: 2021 DarwinARMTargetInfo(const std::string& triple) 2022 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2023 HasAlignMac68kSupport = true; 2024 } 2025}; 2026} // end anonymous namespace. 2027 2028namespace { 2029class SparcV8TargetInfo : public TargetInfo { 2030 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2031 static const char * const GCCRegNames[]; 2032 bool SoftFloat; 2033public: 2034 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 2035 // FIXME: Support Sparc quad-precision long double? 2036 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2037 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2038 } 2039 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2040 const std::string &Name, 2041 bool Enabled) const { 2042 if (Name == "soft-float") 2043 Features[Name] = Enabled; 2044 else 2045 return false; 2046 2047 return true; 2048 } 2049 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2050 SoftFloat = false; 2051 for (unsigned i = 0, e = Features.size(); i != e; ++i) 2052 if (Features[i] == "+soft-float") 2053 SoftFloat = true; 2054 } 2055 virtual void getTargetDefines(const LangOptions &Opts, 2056 MacroBuilder &Builder) const { 2057 DefineStd(Builder, "sparc", Opts); 2058 Builder.defineMacro("__sparcv8"); 2059 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2060 2061 if (SoftFloat) 2062 Builder.defineMacro("SOFT_FLOAT", "1"); 2063 } 2064 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2065 unsigned &NumRecords) const { 2066 // FIXME: Implement! 2067 } 2068 virtual const char *getVAListDeclaration() const { 2069 return "typedef void* __builtin_va_list;"; 2070 } 2071 virtual void getGCCRegNames(const char * const *&Names, 2072 unsigned &NumNames) const; 2073 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2074 unsigned &NumAliases) const; 2075 virtual bool validateAsmConstraint(const char *&Name, 2076 TargetInfo::ConstraintInfo &info) const { 2077 // FIXME: Implement! 2078 return false; 2079 } 2080 virtual const char *getClobbers() const { 2081 // FIXME: Implement! 2082 return ""; 2083 } 2084}; 2085 2086const char * const SparcV8TargetInfo::GCCRegNames[] = { 2087 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2088 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 2089 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 2090 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 2091}; 2092 2093void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 2094 unsigned &NumNames) const { 2095 Names = GCCRegNames; 2096 NumNames = llvm::array_lengthof(GCCRegNames); 2097} 2098 2099const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 2100 { { "g0" }, "r0" }, 2101 { { "g1" }, "r1" }, 2102 { { "g2" }, "r2" }, 2103 { { "g3" }, "r3" }, 2104 { { "g4" }, "r4" }, 2105 { { "g5" }, "r5" }, 2106 { { "g6" }, "r6" }, 2107 { { "g7" }, "r7" }, 2108 { { "o0" }, "r8" }, 2109 { { "o1" }, "r9" }, 2110 { { "o2" }, "r10" }, 2111 { { "o3" }, "r11" }, 2112 { { "o4" }, "r12" }, 2113 { { "o5" }, "r13" }, 2114 { { "o6", "sp" }, "r14" }, 2115 { { "o7" }, "r15" }, 2116 { { "l0" }, "r16" }, 2117 { { "l1" }, "r17" }, 2118 { { "l2" }, "r18" }, 2119 { { "l3" }, "r19" }, 2120 { { "l4" }, "r20" }, 2121 { { "l5" }, "r21" }, 2122 { { "l6" }, "r22" }, 2123 { { "l7" }, "r23" }, 2124 { { "i0" }, "r24" }, 2125 { { "i1" }, "r25" }, 2126 { { "i2" }, "r26" }, 2127 { { "i3" }, "r27" }, 2128 { { "i4" }, "r28" }, 2129 { { "i5" }, "r29" }, 2130 { { "i6", "fp" }, "r30" }, 2131 { { "i7" }, "r31" }, 2132}; 2133 2134void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2135 unsigned &NumAliases) const { 2136 Aliases = GCCRegAliases; 2137 NumAliases = llvm::array_lengthof(GCCRegAliases); 2138} 2139} // end anonymous namespace. 2140 2141namespace { 2142class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 2143public: 2144 AuroraUXSparcV8TargetInfo(const std::string& triple) : 2145 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 2146 SizeType = UnsignedInt; 2147 PtrDiffType = SignedInt; 2148 } 2149}; 2150class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 2151public: 2152 SolarisSparcV8TargetInfo(const std::string& triple) : 2153 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 2154 SizeType = UnsignedInt; 2155 PtrDiffType = SignedInt; 2156 } 2157}; 2158} // end anonymous namespace. 2159 2160namespace { 2161 class MSP430TargetInfo : public TargetInfo { 2162 static const char * const GCCRegNames[]; 2163 public: 2164 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 2165 TLSSupported = false; 2166 IntWidth = 16; IntAlign = 16; 2167 LongWidth = 32; LongLongWidth = 64; 2168 LongAlign = LongLongAlign = 16; 2169 PointerWidth = 16; PointerAlign = 16; 2170 SizeType = UnsignedInt; 2171 IntMaxType = SignedLong; 2172 UIntMaxType = UnsignedLong; 2173 IntPtrType = SignedShort; 2174 PtrDiffType = SignedInt; 2175 SigAtomicType = SignedLong; 2176 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 2177 } 2178 virtual void getTargetDefines(const LangOptions &Opts, 2179 MacroBuilder &Builder) const { 2180 Builder.defineMacro("MSP430"); 2181 Builder.defineMacro("__MSP430__"); 2182 // FIXME: defines for different 'flavours' of MCU 2183 } 2184 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2185 unsigned &NumRecords) const { 2186 // FIXME: Implement. 2187 Records = 0; 2188 NumRecords = 0; 2189 } 2190 virtual void getGCCRegNames(const char * const *&Names, 2191 unsigned &NumNames) const; 2192 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2193 unsigned &NumAliases) const { 2194 // No aliases. 2195 Aliases = 0; 2196 NumAliases = 0; 2197 } 2198 virtual bool validateAsmConstraint(const char *&Name, 2199 TargetInfo::ConstraintInfo &info) const { 2200 // No target constraints for now. 2201 return false; 2202 } 2203 virtual const char *getClobbers() const { 2204 // FIXME: Is this really right? 2205 return ""; 2206 } 2207 virtual const char *getVAListDeclaration() const { 2208 // FIXME: implement 2209 return "typedef char* __builtin_va_list;"; 2210 } 2211 }; 2212 2213 const char * const MSP430TargetInfo::GCCRegNames[] = { 2214 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2215 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2216 }; 2217 2218 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 2219 unsigned &NumNames) const { 2220 Names = GCCRegNames; 2221 NumNames = llvm::array_lengthof(GCCRegNames); 2222 } 2223} 2224 2225 2226namespace { 2227 class SystemZTargetInfo : public TargetInfo { 2228 static const char * const GCCRegNames[]; 2229 public: 2230 SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) { 2231 TLSSupported = false; 2232 IntWidth = IntAlign = 32; 2233 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64; 2234 PointerWidth = PointerAlign = 64; 2235 DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-" 2236 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64"; 2237 } 2238 virtual void getTargetDefines(const LangOptions &Opts, 2239 MacroBuilder &Builder) const { 2240 Builder.defineMacro("__s390__"); 2241 Builder.defineMacro("__s390x__"); 2242 } 2243 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2244 unsigned &NumRecords) const { 2245 // FIXME: Implement. 2246 Records = 0; 2247 NumRecords = 0; 2248 } 2249 2250 virtual void getGCCRegNames(const char * const *&Names, 2251 unsigned &NumNames) const; 2252 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2253 unsigned &NumAliases) const { 2254 // No aliases. 2255 Aliases = 0; 2256 NumAliases = 0; 2257 } 2258 virtual bool validateAsmConstraint(const char *&Name, 2259 TargetInfo::ConstraintInfo &info) const { 2260 // FIXME: implement 2261 return true; 2262 } 2263 virtual const char *getClobbers() const { 2264 // FIXME: Is this really right? 2265 return ""; 2266 } 2267 virtual const char *getVAListDeclaration() const { 2268 // FIXME: implement 2269 return "typedef char* __builtin_va_list;"; 2270 } 2271 }; 2272 2273 const char * const SystemZTargetInfo::GCCRegNames[] = { 2274 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2275 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2276 }; 2277 2278 void SystemZTargetInfo::getGCCRegNames(const char * const *&Names, 2279 unsigned &NumNames) const { 2280 Names = GCCRegNames; 2281 NumNames = llvm::array_lengthof(GCCRegNames); 2282 } 2283} 2284 2285namespace { 2286 class BlackfinTargetInfo : public TargetInfo { 2287 static const char * const GCCRegNames[]; 2288 public: 2289 BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) { 2290 TLSSupported = false; 2291 DoubleAlign = 32; 2292 LongLongAlign = 32; 2293 LongDoubleAlign = 32; 2294 DescriptionString = "e-p:32:32-i64:32-f64:32-n32"; 2295 } 2296 2297 virtual void getTargetDefines(const LangOptions &Opts, 2298 MacroBuilder &Builder) const { 2299 DefineStd(Builder, "bfin", Opts); 2300 DefineStd(Builder, "BFIN", Opts); 2301 Builder.defineMacro("__ADSPBLACKFIN__"); 2302 // FIXME: This one is really dependent on -mcpu 2303 Builder.defineMacro("__ADSPLPBLACKFIN__"); 2304 // FIXME: Add cpu-dependent defines and __SILICON_REVISION__ 2305 } 2306 2307 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2308 unsigned &NumRecords) const { 2309 // FIXME: Implement. 2310 Records = 0; 2311 NumRecords = 0; 2312 } 2313 2314 virtual void getGCCRegNames(const char * const *&Names, 2315 unsigned &NumNames) const; 2316 2317 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2318 unsigned &NumAliases) const { 2319 // No aliases. 2320 Aliases = 0; 2321 NumAliases = 0; 2322 } 2323 2324 virtual bool validateAsmConstraint(const char *&Name, 2325 TargetInfo::ConstraintInfo &Info) const { 2326 if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) { 2327 Info.setAllowsRegister(); 2328 return true; 2329 } 2330 return false; 2331 } 2332 2333 virtual const char *getClobbers() const { 2334 return ""; 2335 } 2336 2337 virtual const char *getVAListDeclaration() const { 2338 return "typedef char* __builtin_va_list;"; 2339 } 2340 }; 2341 2342 const char * const BlackfinTargetInfo::GCCRegNames[] = { 2343 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2344 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp", 2345 "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3", 2346 "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3", 2347 "a0", "a1", "cc", 2348 "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp", 2349 "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1" 2350 }; 2351 2352 void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names, 2353 unsigned &NumNames) const { 2354 Names = GCCRegNames; 2355 NumNames = llvm::array_lengthof(GCCRegNames); 2356 } 2357} 2358 2359namespace { 2360 2361 // LLVM and Clang cannot be used directly to output native binaries for 2362 // target, but is used to compile C code to llvm bitcode with correct 2363 // type and alignment information. 2364 // 2365 // TCE uses the llvm bitcode as input and uses it for generating customized 2366 // target processor and program binary. TCE co-design environment is 2367 // publicly available in http://tce.cs.tut.fi 2368 2369 class TCETargetInfo : public TargetInfo{ 2370 public: 2371 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 2372 TLSSupported = false; 2373 IntWidth = 32; 2374 LongWidth = LongLongWidth = 32; 2375 PointerWidth = 32; 2376 IntAlign = 32; 2377 LongAlign = LongLongAlign = 32; 2378 PointerAlign = 32; 2379 SizeType = UnsignedInt; 2380 IntMaxType = SignedLong; 2381 UIntMaxType = UnsignedLong; 2382 IntPtrType = SignedInt; 2383 PtrDiffType = SignedInt; 2384 FloatWidth = 32; 2385 FloatAlign = 32; 2386 DoubleWidth = 32; 2387 DoubleAlign = 32; 2388 LongDoubleWidth = 32; 2389 LongDoubleAlign = 32; 2390 FloatFormat = &llvm::APFloat::IEEEsingle; 2391 DoubleFormat = &llvm::APFloat::IEEEsingle; 2392 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 2393 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 2394 "i16:16:32-i32:32:32-i64:32:32-" 2395 "f32:32:32-f64:32:32-v64:32:32-" 2396 "v128:32:32-a0:0:32-n32"; 2397 } 2398 2399 virtual void getTargetDefines(const LangOptions &Opts, 2400 MacroBuilder &Builder) const { 2401 DefineStd(Builder, "tce", Opts); 2402 Builder.defineMacro("__TCE__"); 2403 Builder.defineMacro("__TCE_V1__"); 2404 } 2405 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2406 unsigned &NumRecords) const {} 2407 virtual const char *getClobbers() const { 2408 return ""; 2409 } 2410 virtual const char *getVAListDeclaration() const { 2411 return "typedef void* __builtin_va_list;"; 2412 } 2413 virtual void getGCCRegNames(const char * const *&Names, 2414 unsigned &NumNames) const {} 2415 virtual bool validateAsmConstraint(const char *&Name, 2416 TargetInfo::ConstraintInfo &info) const { 2417 return true; 2418 } 2419 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2420 unsigned &NumAliases) const {} 2421 }; 2422} 2423 2424namespace { 2425class MipsTargetInfo : public TargetInfo { 2426 std::string ABI, CPU; 2427 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2428 static const char * const GCCRegNames[]; 2429public: 2430 MipsTargetInfo(const std::string& triple) : TargetInfo(triple), ABI("o32") { 2431 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 2432 "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2433 } 2434 virtual const char *getABI() const { return ABI.c_str(); } 2435 virtual bool setABI(const std::string &Name) { 2436 2437 if ((Name == "o32") || (Name == "eabi")) { 2438 ABI = Name; 2439 return true; 2440 } else 2441 return false; 2442 } 2443 virtual bool setCPU(const std::string &Name) { 2444 CPU = Name; 2445 return true; 2446 } 2447 void getDefaultFeatures(const std::string &CPU, 2448 llvm::StringMap<bool> &Features) const { 2449 Features[ABI] = true; 2450 Features[CPU] = true; 2451 } 2452 virtual void getArchDefines(const LangOptions &Opts, 2453 MacroBuilder &Builder) const { 2454 if (ABI == "o32") 2455 Builder.defineMacro("__mips_o32"); 2456 else if (ABI == "eabi") 2457 Builder.defineMacro("__mips_eabi"); 2458 } 2459 virtual void getTargetDefines(const LangOptions &Opts, 2460 MacroBuilder &Builder) const { 2461 DefineStd(Builder, "mips", Opts); 2462 Builder.defineMacro("_mips"); 2463 DefineStd(Builder, "MIPSEB", Opts); 2464 Builder.defineMacro("_MIPSEB"); 2465 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2466 getArchDefines(Opts, Builder); 2467 } 2468 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2469 unsigned &NumRecords) const { 2470 // FIXME: Implement! 2471 } 2472 virtual const char *getVAListDeclaration() const { 2473 return "typedef void* __builtin_va_list;"; 2474 } 2475 virtual void getGCCRegNames(const char * const *&Names, 2476 unsigned &NumNames) const; 2477 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2478 unsigned &NumAliases) const; 2479 virtual bool validateAsmConstraint(const char *&Name, 2480 TargetInfo::ConstraintInfo &Info) const { 2481 switch (*Name) { 2482 default: 2483 case 'r': // CPU registers. 2484 case 'd': // Equivalent to "r" unless generating MIPS16 code. 2485 case 'y': // Equivalent to "r", backwards compatibility only. 2486 case 'f': // floating-point registers. 2487 Info.setAllowsRegister(); 2488 return true; 2489 } 2490 return false; 2491 } 2492 2493 virtual const char *getClobbers() const { 2494 // FIXME: Implement! 2495 return ""; 2496 } 2497}; 2498 2499const char * const MipsTargetInfo::GCCRegNames[] = { 2500 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 2501 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 2502 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 2503 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 2504 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 2505 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 2506 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 2507 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 2508 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 2509 "$fcc5","$fcc6","$fcc7" 2510}; 2511 2512void MipsTargetInfo::getGCCRegNames(const char * const *&Names, 2513 unsigned &NumNames) const { 2514 Names = GCCRegNames; 2515 NumNames = llvm::array_lengthof(GCCRegNames); 2516} 2517 2518const TargetInfo::GCCRegAlias MipsTargetInfo::GCCRegAliases[] = { 2519 { { "at" }, "$1" }, 2520 { { "v0" }, "$2" }, 2521 { { "v1" }, "$3" }, 2522 { { "a0" }, "$4" }, 2523 { { "a1" }, "$5" }, 2524 { { "a2" }, "$6" }, 2525 { { "a3" }, "$7" }, 2526 { { "t0" }, "$8" }, 2527 { { "t1" }, "$9" }, 2528 { { "t2" }, "$10" }, 2529 { { "t3" }, "$11" }, 2530 { { "t4" }, "$12" }, 2531 { { "t5" }, "$13" }, 2532 { { "t6" }, "$14" }, 2533 { { "t7" }, "$15" }, 2534 { { "s0" }, "$16" }, 2535 { { "s1" }, "$17" }, 2536 { { "s2" }, "$18" }, 2537 { { "s3" }, "$19" }, 2538 { { "s4" }, "$20" }, 2539 { { "s5" }, "$21" }, 2540 { { "s6" }, "$22" }, 2541 { { "s7" }, "$23" }, 2542 { { "t8" }, "$24" }, 2543 { { "t9" }, "$25" }, 2544 { { "k0" }, "$26" }, 2545 { { "k1" }, "$27" }, 2546 { { "gp" }, "$28" }, 2547 { { "sp" }, "$29" }, 2548 { { "fp" }, "$30" }, 2549 { { "ra" }, "$31" } 2550}; 2551 2552void MipsTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2553 unsigned &NumAliases) const { 2554 Aliases = GCCRegAliases; 2555 NumAliases = llvm::array_lengthof(GCCRegAliases); 2556} 2557} // end anonymous namespace. 2558 2559namespace { 2560class MipselTargetInfo : public MipsTargetInfo { 2561public: 2562 MipselTargetInfo(const std::string& triple) : MipsTargetInfo(triple) { 2563 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 2564 "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2565 } 2566 2567 virtual void getTargetDefines(const LangOptions &Opts, 2568 MacroBuilder &Builder) const; 2569}; 2570 2571void MipselTargetInfo::getTargetDefines(const LangOptions &Opts, 2572 MacroBuilder &Builder) const { 2573 DefineStd(Builder, "mips", Opts); 2574 Builder.defineMacro("_mips"); 2575 DefineStd(Builder, "MIPSEL", Opts); 2576 Builder.defineMacro("_MIPSEL"); 2577 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2578 getArchDefines(Opts, Builder); 2579} 2580} // end anonymous namespace. 2581 2582//===----------------------------------------------------------------------===// 2583// Driver code 2584//===----------------------------------------------------------------------===// 2585 2586static TargetInfo *AllocateTarget(const std::string &T) { 2587 llvm::Triple Triple(T); 2588 llvm::Triple::OSType os = Triple.getOS(); 2589 2590 switch (Triple.getArch()) { 2591 default: 2592 return NULL; 2593 2594 case llvm::Triple::arm: 2595 case llvm::Triple::thumb: 2596 switch (os) { 2597 case llvm::Triple::Linux: 2598 return new LinuxTargetInfo<ARMTargetInfo>(T); 2599 case llvm::Triple::Darwin: 2600 return new DarwinARMTargetInfo(T); 2601 case llvm::Triple::FreeBSD: 2602 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 2603 default: 2604 return new ARMTargetInfo(T); 2605 } 2606 2607 case llvm::Triple::bfin: 2608 return new BlackfinTargetInfo(T); 2609 2610 case llvm::Triple::msp430: 2611 return new MSP430TargetInfo(T); 2612 2613 case llvm::Triple::mips: 2614 if (os == llvm::Triple::Psp) 2615 return new PSPTargetInfo<MipsTargetInfo>(T); 2616 if (os == llvm::Triple::Linux) 2617 return new LinuxTargetInfo<MipsTargetInfo>(T); 2618 return new MipsTargetInfo(T); 2619 2620 case llvm::Triple::mipsel: 2621 if (os == llvm::Triple::Psp) 2622 return new PSPTargetInfo<MipselTargetInfo>(T); 2623 if (os == llvm::Triple::Linux) 2624 return new LinuxTargetInfo<MipselTargetInfo>(T); 2625 return new MipselTargetInfo(T); 2626 2627 case llvm::Triple::ppc: 2628 if (os == llvm::Triple::Darwin) 2629 return new DarwinPPC32TargetInfo(T); 2630 else if (os == llvm::Triple::FreeBSD) 2631 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 2632 return new PPC32TargetInfo(T); 2633 2634 case llvm::Triple::ppc64: 2635 if (os == llvm::Triple::Darwin) 2636 return new DarwinPPC64TargetInfo(T); 2637 else if (os == llvm::Triple::Lv2) 2638 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 2639 else if (os == llvm::Triple::FreeBSD) 2640 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 2641 return new PPC64TargetInfo(T); 2642 2643 case llvm::Triple::mblaze: 2644 return new MBlazeTargetInfo(T); 2645 2646 case llvm::Triple::sparc: 2647 if (os == llvm::Triple::AuroraUX) 2648 return new AuroraUXSparcV8TargetInfo(T); 2649 if (os == llvm::Triple::Solaris) 2650 return new SolarisSparcV8TargetInfo(T); 2651 return new SparcV8TargetInfo(T); 2652 2653 // FIXME: Need a real SPU target. 2654 case llvm::Triple::cellspu: 2655 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 2656 2657 case llvm::Triple::systemz: 2658 return new SystemZTargetInfo(T); 2659 2660 case llvm::Triple::tce: 2661 return new TCETargetInfo(T); 2662 2663 case llvm::Triple::x86: 2664 switch (os) { 2665 case llvm::Triple::AuroraUX: 2666 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 2667 case llvm::Triple::Darwin: 2668 return new DarwinI386TargetInfo(T); 2669 case llvm::Triple::Linux: 2670 return new LinuxTargetInfo<X86_32TargetInfo>(T); 2671 case llvm::Triple::DragonFly: 2672 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 2673 case llvm::Triple::NetBSD: 2674 return new NetBSDTargetInfo<X86_32TargetInfo>(T); 2675 case llvm::Triple::OpenBSD: 2676 return new OpenBSDI386TargetInfo(T); 2677 case llvm::Triple::FreeBSD: 2678 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 2679 case llvm::Triple::Minix: 2680 return new MinixTargetInfo<X86_32TargetInfo>(T); 2681 case llvm::Triple::Solaris: 2682 return new SolarisTargetInfo<X86_32TargetInfo>(T); 2683 case llvm::Triple::Cygwin: 2684 return new CygwinX86_32TargetInfo(T); 2685 case llvm::Triple::MinGW32: 2686 return new MinGWX86_32TargetInfo(T); 2687 case llvm::Triple::Win32: 2688 return new VisualStudioWindowsX86_32TargetInfo(T); 2689 case llvm::Triple::Haiku: 2690 return new HaikuX86_32TargetInfo(T); 2691 default: 2692 return new X86_32TargetInfo(T); 2693 } 2694 2695 case llvm::Triple::x86_64: 2696 switch (os) { 2697 case llvm::Triple::AuroraUX: 2698 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 2699 case llvm::Triple::Darwin: 2700 return new DarwinX86_64TargetInfo(T); 2701 case llvm::Triple::Linux: 2702 return new LinuxTargetInfo<X86_64TargetInfo>(T); 2703 case llvm::Triple::DragonFly: 2704 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 2705 case llvm::Triple::NetBSD: 2706 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 2707 case llvm::Triple::OpenBSD: 2708 return new OpenBSDX86_64TargetInfo(T); 2709 case llvm::Triple::FreeBSD: 2710 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 2711 case llvm::Triple::Solaris: 2712 return new SolarisTargetInfo<X86_64TargetInfo>(T); 2713 case llvm::Triple::MinGW32: 2714 return new MinGWX86_64TargetInfo(T); 2715 case llvm::Triple::Win32: // This is what Triple.h supports now. 2716 if (Triple.getEnvironment() == llvm::Triple::MachO) 2717 return new DarwinX86_64TargetInfo(T); 2718 else 2719 return new VisualStudioWindowsX86_64TargetInfo(T); 2720 default: 2721 return new X86_64TargetInfo(T); 2722 } 2723 } 2724} 2725 2726/// CreateTargetInfo - Return the target info object for the specified target 2727/// triple. 2728TargetInfo *TargetInfo::CreateTargetInfo(Diagnostic &Diags, 2729 TargetOptions &Opts) { 2730 llvm::Triple Triple(Opts.Triple); 2731 2732 // Construct the target 2733 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 2734 if (!Target) { 2735 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 2736 return 0; 2737 } 2738 2739 // Set the target CPU if specified. 2740 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 2741 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 2742 return 0; 2743 } 2744 2745 // Set the target ABI if specified. 2746 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 2747 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 2748 return 0; 2749 } 2750 2751 // Set the target C++ ABI. 2752 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 2753 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 2754 return 0; 2755 } 2756 2757 // Compute the default target features, we need the target to handle this 2758 // because features may have dependencies on one another. 2759 llvm::StringMap<bool> Features; 2760 Target->getDefaultFeatures(Opts.CPU, Features); 2761 2762 // Apply the user specified deltas. 2763 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 2764 ie = Opts.Features.end(); it != ie; ++it) { 2765 const char *Name = it->c_str(); 2766 2767 // Apply the feature via the target. 2768 if ((Name[0] != '-' && Name[0] != '+') || 2769 !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) { 2770 Diags.Report(diag::err_target_invalid_feature) << Name; 2771 return 0; 2772 } 2773 } 2774 2775 // Add the features to the compile options. 2776 // 2777 // FIXME: If we are completely confident that we have the right set, we only 2778 // need to pass the minuses. 2779 Opts.Features.clear(); 2780 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 2781 ie = Features.end(); it != ie; ++it) 2782 Opts.Features.push_back(std::string(it->second ? "+" : "-") + it->first()); 2783 Target->HandleTargetFeatures(Opts.Features); 2784 2785 return Target.take(); 2786} 2787