Targets.cpp revision 165329c1d134d000904d6e08b1d166bf34e05517 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include "llvm/Support/ErrorHandling.h"
30#include "llvm/Type.h"
31#include <algorithm>
32using namespace clang;
33
34//===----------------------------------------------------------------------===//
35//  Common code shared among targets.
36//===----------------------------------------------------------------------===//
37
38/// DefineStd - Define a macro name and standard variants.  For example if
39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
40/// when in GNU mode.
41static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42                      const LangOptions &Opts) {
43  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44
45  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46  // in the user's namespace.
47  if (Opts.GNUMode)
48    Builder.defineMacro(MacroName);
49
50  // Define __unix.
51  Builder.defineMacro("__" + MacroName);
52
53  // Define __unix__.
54  Builder.defineMacro("__" + MacroName + "__");
55}
56
57static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName,
58                            bool Tuning = true) {
59  Builder.defineMacro("__" + CPUName);
60  Builder.defineMacro("__" + CPUName + "__");
61  if (Tuning)
62    Builder.defineMacro("__tune_" + CPUName + "__");
63}
64
65//===----------------------------------------------------------------------===//
66// Defines specific to certain operating systems.
67//===----------------------------------------------------------------------===//
68
69namespace {
70template<typename TgtInfo>
71class OSTargetInfo : public TgtInfo {
72protected:
73  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
74                            MacroBuilder &Builder) const=0;
75public:
76  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
77  virtual void getTargetDefines(const LangOptions &Opts,
78                                MacroBuilder &Builder) const {
79    TgtInfo::getTargetDefines(Opts, Builder);
80    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
81  }
82
83};
84} // end anonymous namespace
85
86
87static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
88                             const llvm::Triple &Triple,
89                             StringRef &PlatformName,
90                             VersionTuple &PlatformMinVersion) {
91  Builder.defineMacro("__APPLE_CC__", "5621");
92  Builder.defineMacro("__APPLE__");
93  Builder.defineMacro("__MACH__");
94  Builder.defineMacro("OBJC_NEW_PROPERTIES");
95
96  if (!Opts.ObjCAutoRefCount) {
97    // __weak is always defined, for use in blocks and with objc pointers.
98    Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
99
100    // Darwin defines __strong even in C mode (just to nothing).
101    if (Opts.getGC() != LangOptions::NonGC)
102      Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
103    else
104      Builder.defineMacro("__strong", "");
105
106    // __unsafe_unretained is defined to nothing in non-ARC mode. We even
107    // allow this in C, since one might have block pointers in structs that
108    // are used in pure C code and in Objective-C ARC.
109    Builder.defineMacro("__unsafe_unretained", "");
110  }
111
112  if (Opts.Static)
113    Builder.defineMacro("__STATIC__");
114  else
115    Builder.defineMacro("__DYNAMIC__");
116
117  if (Opts.POSIXThreads)
118    Builder.defineMacro("_REENTRANT");
119
120  // Get the platform type and version number from the triple.
121  unsigned Maj, Min, Rev;
122  if (Triple.isMacOSX()) {
123    Triple.getMacOSXVersion(Maj, Min, Rev);
124    PlatformName = "macosx";
125  } else {
126    Triple.getOSVersion(Maj, Min, Rev);
127    PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
128  }
129
130  // If -target arch-pc-win32-macho option specified, we're
131  // generating code for Win32 ABI. No need to emit
132  // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
133  if (PlatformName == "win32") {
134    PlatformMinVersion = VersionTuple(Maj, Min, Rev);
135    return;
136  }
137
138  // Set the appropriate OS version define.
139  if (Triple.getOS() == llvm::Triple::IOS) {
140    assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
141    char Str[6];
142    Str[0] = '0' + Maj;
143    Str[1] = '0' + (Min / 10);
144    Str[2] = '0' + (Min % 10);
145    Str[3] = '0' + (Rev / 10);
146    Str[4] = '0' + (Rev % 10);
147    Str[5] = '\0';
148    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
149  } else {
150    // Note that the Driver allows versions which aren't representable in the
151    // define (because we only get a single digit for the minor and micro
152    // revision numbers). So, we limit them to the maximum representable
153    // version.
154    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
155    assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
156    char Str[5];
157    Str[0] = '0' + (Maj / 10);
158    Str[1] = '0' + (Maj % 10);
159    Str[2] = '0' + std::min(Min, 9U);
160    Str[3] = '0' + std::min(Rev, 9U);
161    Str[4] = '\0';
162    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
163  }
164
165  PlatformMinVersion = VersionTuple(Maj, Min, Rev);
166}
167
168namespace {
169template<typename Target>
170class DarwinTargetInfo : public OSTargetInfo<Target> {
171protected:
172  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
173                            MacroBuilder &Builder) const {
174    getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
175                     this->PlatformMinVersion);
176  }
177
178public:
179  DarwinTargetInfo(const std::string& triple) :
180    OSTargetInfo<Target>(triple) {
181      llvm::Triple T = llvm::Triple(triple);
182      this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
183      this->MCountName = "\01mcount";
184    }
185
186  virtual std::string isValidSectionSpecifier(StringRef SR) const {
187    // Let MCSectionMachO validate this.
188    StringRef Segment, Section;
189    unsigned TAA, StubSize;
190    bool HasTAA;
191    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
192                                                       TAA, HasTAA, StubSize);
193  }
194
195  virtual const char *getStaticInitSectionSpecifier() const {
196    // FIXME: We should return 0 when building kexts.
197    return "__TEXT,__StaticInit,regular,pure_instructions";
198  }
199
200  /// Darwin does not support protected visibility.  Darwin's "default"
201  /// is very similar to ELF's "protected";  Darwin requires a "weak"
202  /// attribute on declarations that can be dynamically replaced.
203  virtual bool hasProtectedVisibility() const {
204    return false;
205  }
206};
207
208
209// DragonFlyBSD Target
210template<typename Target>
211class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
212protected:
213  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
214                            MacroBuilder &Builder) const {
215    // DragonFly defines; list based off of gcc output
216    Builder.defineMacro("__DragonFly__");
217    Builder.defineMacro("__DragonFly_cc_version", "100001");
218    Builder.defineMacro("__ELF__");
219    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
220    Builder.defineMacro("__tune_i386__");
221    DefineStd(Builder, "unix", Opts);
222  }
223public:
224  DragonFlyBSDTargetInfo(const std::string &triple)
225    : OSTargetInfo<Target>(triple) {
226      this->UserLabelPrefix = "";
227
228      llvm::Triple Triple(triple);
229      switch (Triple.getArch()) {
230        default:
231        case llvm::Triple::x86:
232        case llvm::Triple::x86_64:
233          this->MCountName = ".mcount";
234          break;
235      }
236  }
237};
238
239// FreeBSD Target
240template<typename Target>
241class FreeBSDTargetInfo : public OSTargetInfo<Target> {
242protected:
243  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
244                            MacroBuilder &Builder) const {
245    // FreeBSD defines; list based off of gcc output
246
247    unsigned Release = Triple.getOSMajorVersion();
248    if (Release == 0U)
249      Release = 8;
250
251    Builder.defineMacro("__FreeBSD__", Twine(Release));
252    Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
253    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
254    DefineStd(Builder, "unix", Opts);
255    Builder.defineMacro("__ELF__");
256  }
257public:
258  FreeBSDTargetInfo(const std::string &triple)
259    : OSTargetInfo<Target>(triple) {
260      this->UserLabelPrefix = "";
261
262      llvm::Triple Triple(triple);
263      switch (Triple.getArch()) {
264        default:
265        case llvm::Triple::x86:
266        case llvm::Triple::x86_64:
267          this->MCountName = ".mcount";
268          break;
269        case llvm::Triple::mips:
270        case llvm::Triple::mipsel:
271        case llvm::Triple::ppc:
272        case llvm::Triple::ppc64:
273          this->MCountName = "_mcount";
274          break;
275        case llvm::Triple::arm:
276          this->MCountName = "__mcount";
277          break;
278      }
279
280    }
281};
282
283// Minix Target
284template<typename Target>
285class MinixTargetInfo : public OSTargetInfo<Target> {
286protected:
287  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
288                            MacroBuilder &Builder) const {
289    // Minix defines
290
291    Builder.defineMacro("__minix", "3");
292    Builder.defineMacro("_EM_WSIZE", "4");
293    Builder.defineMacro("_EM_PSIZE", "4");
294    Builder.defineMacro("_EM_SSIZE", "2");
295    Builder.defineMacro("_EM_LSIZE", "4");
296    Builder.defineMacro("_EM_FSIZE", "4");
297    Builder.defineMacro("_EM_DSIZE", "8");
298    Builder.defineMacro("__ELF__");
299    DefineStd(Builder, "unix", Opts);
300  }
301public:
302  MinixTargetInfo(const std::string &triple)
303    : OSTargetInfo<Target>(triple) {
304      this->UserLabelPrefix = "";
305    }
306};
307
308// Linux target
309template<typename Target>
310class LinuxTargetInfo : public OSTargetInfo<Target> {
311protected:
312  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
313                            MacroBuilder &Builder) const {
314    // Linux defines; list based off of gcc output
315    DefineStd(Builder, "unix", Opts);
316    DefineStd(Builder, "linux", Opts);
317    Builder.defineMacro("__gnu_linux__");
318    Builder.defineMacro("__ELF__");
319    if (Opts.POSIXThreads)
320      Builder.defineMacro("_REENTRANT");
321    if (Opts.CPlusPlus)
322      Builder.defineMacro("_GNU_SOURCE");
323  }
324public:
325  LinuxTargetInfo(const std::string& triple)
326    : OSTargetInfo<Target>(triple) {
327    this->UserLabelPrefix = "";
328    this->WIntType = TargetInfo::UnsignedInt;
329  }
330
331  virtual const char *getStaticInitSectionSpecifier() const {
332    return ".text.startup";
333  }
334};
335
336// NetBSD Target
337template<typename Target>
338class NetBSDTargetInfo : public OSTargetInfo<Target> {
339protected:
340  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
341                            MacroBuilder &Builder) const {
342    // NetBSD defines; list based off of gcc output
343    Builder.defineMacro("__NetBSD__");
344    Builder.defineMacro("__unix__");
345    Builder.defineMacro("__ELF__");
346    if (Opts.POSIXThreads)
347      Builder.defineMacro("_POSIX_THREADS");
348  }
349public:
350  NetBSDTargetInfo(const std::string &triple)
351    : OSTargetInfo<Target>(triple) {
352      this->UserLabelPrefix = "";
353    }
354};
355
356// OpenBSD Target
357template<typename Target>
358class OpenBSDTargetInfo : public OSTargetInfo<Target> {
359protected:
360  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
361                            MacroBuilder &Builder) const {
362    // OpenBSD defines; list based off of gcc output
363
364    Builder.defineMacro("__OpenBSD__");
365    DefineStd(Builder, "unix", Opts);
366    Builder.defineMacro("__ELF__");
367    if (Opts.POSIXThreads)
368      Builder.defineMacro("_POSIX_THREADS");
369  }
370public:
371  OpenBSDTargetInfo(const std::string &triple)
372    : OSTargetInfo<Target>(triple) {
373      this->UserLabelPrefix = "";
374
375      llvm::Triple Triple(triple);
376      switch (Triple.getArch()) {
377        default:
378        case llvm::Triple::x86:
379        case llvm::Triple::x86_64:
380        case llvm::Triple::arm:
381	case llvm::Triple::sparc:
382          this->MCountName = "__mcount";
383          break;
384        case llvm::Triple::mips64:
385        case llvm::Triple::mips64el:
386        case llvm::Triple::ppc:
387	case llvm::Triple::sparcv9:
388          this->MCountName = "_mcount";
389          break;
390      }
391  }
392};
393
394// PSP Target
395template<typename Target>
396class PSPTargetInfo : public OSTargetInfo<Target> {
397protected:
398  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
399                            MacroBuilder &Builder) const {
400    // PSP defines; list based on the output of the pspdev gcc toolchain.
401    Builder.defineMacro("PSP");
402    Builder.defineMacro("_PSP");
403    Builder.defineMacro("__psp__");
404    Builder.defineMacro("__ELF__");
405  }
406public:
407  PSPTargetInfo(const std::string& triple)
408    : OSTargetInfo<Target>(triple) {
409    this->UserLabelPrefix = "";
410  }
411};
412
413// PS3 PPU Target
414template<typename Target>
415class PS3PPUTargetInfo : public OSTargetInfo<Target> {
416protected:
417  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
418                            MacroBuilder &Builder) const {
419    // PS3 PPU defines.
420    Builder.defineMacro("__PPC__");
421    Builder.defineMacro("__PPU__");
422    Builder.defineMacro("__CELLOS_LV2__");
423    Builder.defineMacro("__ELF__");
424    Builder.defineMacro("__LP32__");
425    Builder.defineMacro("_ARCH_PPC64");
426    Builder.defineMacro("__powerpc64__");
427  }
428public:
429  PS3PPUTargetInfo(const std::string& triple)
430    : OSTargetInfo<Target>(triple) {
431    this->UserLabelPrefix = "";
432    this->LongWidth = this->LongAlign = 32;
433    this->PointerWidth = this->PointerAlign = 32;
434    this->IntMaxType = TargetInfo::SignedLongLong;
435    this->UIntMaxType = TargetInfo::UnsignedLongLong;
436    this->Int64Type = TargetInfo::SignedLongLong;
437    this->SizeType = TargetInfo::UnsignedInt;
438    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
439                              "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
440  }
441};
442
443// FIXME: Need a real SPU target.
444// PS3 SPU Target
445template<typename Target>
446class PS3SPUTargetInfo : public OSTargetInfo<Target> {
447protected:
448  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
449                            MacroBuilder &Builder) const {
450    // PS3 PPU defines.
451    Builder.defineMacro("__SPU__");
452    Builder.defineMacro("__ELF__");
453  }
454public:
455  PS3SPUTargetInfo(const std::string& triple)
456    : OSTargetInfo<Target>(triple) {
457    this->UserLabelPrefix = "";
458  }
459};
460
461// AuroraUX target
462template<typename Target>
463class AuroraUXTargetInfo : public OSTargetInfo<Target> {
464protected:
465  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
466                            MacroBuilder &Builder) const {
467    DefineStd(Builder, "sun", Opts);
468    DefineStd(Builder, "unix", Opts);
469    Builder.defineMacro("__ELF__");
470    Builder.defineMacro("__svr4__");
471    Builder.defineMacro("__SVR4");
472  }
473public:
474  AuroraUXTargetInfo(const std::string& triple)
475    : OSTargetInfo<Target>(triple) {
476    this->UserLabelPrefix = "";
477    this->WCharType = this->SignedLong;
478    // FIXME: WIntType should be SignedLong
479  }
480};
481
482// Solaris target
483template<typename Target>
484class SolarisTargetInfo : public OSTargetInfo<Target> {
485protected:
486  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
487                            MacroBuilder &Builder) const {
488    DefineStd(Builder, "sun", Opts);
489    DefineStd(Builder, "unix", Opts);
490    Builder.defineMacro("__ELF__");
491    Builder.defineMacro("__svr4__");
492    Builder.defineMacro("__SVR4");
493    // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and
494    // newer, but to 500 for everything else.  feature_test.h has a check to
495    // ensure that you are not using C99 with an old version of X/Open or C89
496    // with a new version.
497    if (Opts.C99 || Opts.C11)
498      Builder.defineMacro("_XOPEN_SOURCE", "600");
499    else
500      Builder.defineMacro("_XOPEN_SOURCE", "500");
501    if (Opts.CPlusPlus0x)
502      Builder.defineMacro("__C99FEATURES__");
503    Builder.defineMacro("_LARGEFILE_SOURCE");
504    Builder.defineMacro("_LARGEFILE64_SOURCE");
505    Builder.defineMacro("__EXTENSIONS__");
506    Builder.defineMacro("_REENTRANT");
507  }
508public:
509  SolarisTargetInfo(const std::string& triple)
510    : OSTargetInfo<Target>(triple) {
511    this->UserLabelPrefix = "";
512    this->WCharType = this->SignedLong;
513    // FIXME: WIntType should be SignedLong
514  }
515};
516
517// Windows target
518template<typename Target>
519class WindowsTargetInfo : public OSTargetInfo<Target> {
520protected:
521  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
522                            MacroBuilder &Builder) const {
523    Builder.defineMacro("_WIN32");
524  }
525  void getVisualStudioDefines(const LangOptions &Opts,
526                              MacroBuilder &Builder) const {
527    if (Opts.CPlusPlus) {
528      if (Opts.RTTI)
529        Builder.defineMacro("_CPPRTTI");
530
531      if (Opts.Exceptions)
532        Builder.defineMacro("_CPPUNWIND");
533    }
534
535    if (!Opts.CharIsSigned)
536      Builder.defineMacro("_CHAR_UNSIGNED");
537
538    // FIXME: POSIXThreads isn't exactly the option this should be defined for,
539    //        but it works for now.
540    if (Opts.POSIXThreads)
541      Builder.defineMacro("_MT");
542
543    if (Opts.MSCVersion != 0)
544      Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
545
546    if (Opts.MicrosoftExt) {
547      Builder.defineMacro("_MSC_EXTENSIONS");
548
549      if (Opts.CPlusPlus0x) {
550        Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
551        Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
552        Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
553      }
554    }
555
556    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
557  }
558
559public:
560  WindowsTargetInfo(const std::string &triple)
561    : OSTargetInfo<Target>(triple) {}
562};
563
564} // end anonymous namespace.
565
566//===----------------------------------------------------------------------===//
567// Specific target implementations.
568//===----------------------------------------------------------------------===//
569
570namespace {
571// PPC abstract base class
572class PPCTargetInfo : public TargetInfo {
573  static const Builtin::Info BuiltinInfo[];
574  static const char * const GCCRegNames[];
575  static const TargetInfo::GCCRegAlias GCCRegAliases[];
576public:
577  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {
578    LongDoubleWidth = LongDoubleAlign = 128;
579    LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
580  }
581
582  virtual void getTargetBuiltins(const Builtin::Info *&Records,
583                                 unsigned &NumRecords) const {
584    Records = BuiltinInfo;
585    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
586  }
587
588  virtual bool isCLZForZeroUndef() const { return false; }
589
590  virtual void getTargetDefines(const LangOptions &Opts,
591                                MacroBuilder &Builder) const;
592
593  virtual bool hasFeature(StringRef Feature) const;
594
595  virtual void getGCCRegNames(const char * const *&Names,
596                              unsigned &NumNames) const;
597  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
598                                unsigned &NumAliases) const;
599  virtual bool validateAsmConstraint(const char *&Name,
600                                     TargetInfo::ConstraintInfo &Info) const {
601    switch (*Name) {
602    default: return false;
603    case 'O': // Zero
604      break;
605    case 'b': // Base register
606    case 'f': // Floating point register
607      Info.setAllowsRegister();
608      break;
609    // FIXME: The following are added to allow parsing.
610    // I just took a guess at what the actions should be.
611    // Also, is more specific checking needed?  I.e. specific registers?
612    case 'd': // Floating point register (containing 64-bit value)
613    case 'v': // Altivec vector register
614      Info.setAllowsRegister();
615      break;
616    case 'w':
617      switch (Name[1]) {
618        case 'd':// VSX vector register to hold vector double data
619        case 'f':// VSX vector register to hold vector float data
620        case 's':// VSX vector register to hold scalar float data
621        case 'a':// Any VSX register
622          break;
623        default:
624          return false;
625      }
626      Info.setAllowsRegister();
627      Name++; // Skip over 'w'.
628      break;
629    case 'h': // `MQ', `CTR', or `LINK' register
630    case 'q': // `MQ' register
631    case 'c': // `CTR' register
632    case 'l': // `LINK' register
633    case 'x': // `CR' register (condition register) number 0
634    case 'y': // `CR' register (condition register)
635    case 'z': // `XER[CA]' carry bit (part of the XER register)
636      Info.setAllowsRegister();
637      break;
638    case 'I': // Signed 16-bit constant
639    case 'J': // Unsigned 16-bit constant shifted left 16 bits
640              //  (use `L' instead for SImode constants)
641    case 'K': // Unsigned 16-bit constant
642    case 'L': // Signed 16-bit constant shifted left 16 bits
643    case 'M': // Constant larger than 31
644    case 'N': // Exact power of 2
645    case 'P': // Constant whose negation is a signed 16-bit constant
646    case 'G': // Floating point constant that can be loaded into a
647              // register with one instruction per word
648    case 'H': // Integer/Floating point constant that can be loaded
649              // into a register using three instructions
650      break;
651    case 'm': // Memory operand. Note that on PowerPC targets, m can
652              // include addresses that update the base register. It
653              // is therefore only safe to use `m' in an asm statement
654              // if that asm statement accesses the operand exactly once.
655              // The asm statement must also use `%U<opno>' as a
656              // placeholder for the "update" flag in the corresponding
657              // load or store instruction. For example:
658              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
659              // is correct but:
660              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
661              // is not. Use es rather than m if you don't want the base
662              // register to be updated.
663    case 'e':
664      if (Name[1] != 's')
665          return false;
666              // es: A "stable" memory operand; that is, one which does not
667              // include any automodification of the base register. Unlike
668              // `m', this constraint can be used in asm statements that
669              // might access the operand several times, or that might not
670              // access it at all.
671      Info.setAllowsMemory();
672      Name++; // Skip over 'e'.
673      break;
674    case 'Q': // Memory operand that is an offset from a register (it is
675              // usually better to use `m' or `es' in asm statements)
676    case 'Z': // Memory operand that is an indexed or indirect from a
677              // register (it is usually better to use `m' or `es' in
678              // asm statements)
679      Info.setAllowsMemory();
680      Info.setAllowsRegister();
681      break;
682    case 'R': // AIX TOC entry
683    case 'a': // Address operand that is an indexed or indirect from a
684              // register (`p' is preferable for asm statements)
685    case 'S': // Constant suitable as a 64-bit mask operand
686    case 'T': // Constant suitable as a 32-bit mask operand
687    case 'U': // System V Release 4 small data area reference
688    case 't': // AND masks that can be performed by two rldic{l, r}
689              // instructions
690    case 'W': // Vector constant that does not require memory
691    case 'j': // Vector constant that is all zeros.
692      break;
693    // End FIXME.
694    }
695    return true;
696  }
697  virtual const char *getClobbers() const {
698    return "";
699  }
700};
701
702const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
703#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
704#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
705                                              ALL_LANGUAGES },
706#include "clang/Basic/BuiltinsPPC.def"
707};
708
709
710/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
711/// #defines that are not tied to a specific subtarget.
712void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
713                                     MacroBuilder &Builder) const {
714  // Target identification.
715  Builder.defineMacro("__ppc__");
716  Builder.defineMacro("_ARCH_PPC");
717  Builder.defineMacro("__powerpc__");
718  Builder.defineMacro("__POWERPC__");
719  if (PointerWidth == 64) {
720    Builder.defineMacro("_ARCH_PPC64");
721    Builder.defineMacro("_LP64");
722    Builder.defineMacro("__LP64__");
723    Builder.defineMacro("__powerpc64__");
724    Builder.defineMacro("__ppc64__");
725  } else {
726    Builder.defineMacro("__ppc__");
727  }
728
729  // Target properties.
730  if (getTriple().getOS() != llvm::Triple::NetBSD)
731    Builder.defineMacro("_BIG_ENDIAN");
732  Builder.defineMacro("__BIG_ENDIAN__");
733
734  // Subtarget options.
735  Builder.defineMacro("__NATURAL_ALIGNMENT__");
736  Builder.defineMacro("__REGISTER_PREFIX__", "");
737
738  // FIXME: Should be controlled by command line option.
739  Builder.defineMacro("__LONG_DOUBLE_128__");
740
741  if (Opts.AltiVec) {
742    Builder.defineMacro("__VEC__", "10206");
743    Builder.defineMacro("__ALTIVEC__");
744  }
745}
746
747bool PPCTargetInfo::hasFeature(StringRef Feature) const {
748  return Feature == "powerpc";
749}
750
751
752const char * const PPCTargetInfo::GCCRegNames[] = {
753  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
754  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
755  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
756  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
757  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
758  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
759  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
760  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
761  "mq", "lr", "ctr", "ap",
762  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
763  "xer",
764  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
765  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
766  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
767  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
768  "vrsave", "vscr",
769  "spe_acc", "spefscr",
770  "sfp"
771};
772
773void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
774                                   unsigned &NumNames) const {
775  Names = GCCRegNames;
776  NumNames = llvm::array_lengthof(GCCRegNames);
777}
778
779const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
780  // While some of these aliases do map to different registers
781  // they still share the same register name.
782  { { "0" }, "r0" },
783  { { "1"}, "r1" },
784  { { "2" }, "r2" },
785  { { "3" }, "r3" },
786  { { "4" }, "r4" },
787  { { "5" }, "r5" },
788  { { "6" }, "r6" },
789  { { "7" }, "r7" },
790  { { "8" }, "r8" },
791  { { "9" }, "r9" },
792  { { "10" }, "r10" },
793  { { "11" }, "r11" },
794  { { "12" }, "r12" },
795  { { "13" }, "r13" },
796  { { "14" }, "r14" },
797  { { "15" }, "r15" },
798  { { "16" }, "r16" },
799  { { "17" }, "r17" },
800  { { "18" }, "r18" },
801  { { "19" }, "r19" },
802  { { "20" }, "r20" },
803  { { "21" }, "r21" },
804  { { "22" }, "r22" },
805  { { "23" }, "r23" },
806  { { "24" }, "r24" },
807  { { "25" }, "r25" },
808  { { "26" }, "r26" },
809  { { "27" }, "r27" },
810  { { "28" }, "r28" },
811  { { "29" }, "r29" },
812  { { "30" }, "r30" },
813  { { "31" }, "r31" },
814  { { "fr0" }, "f0" },
815  { { "fr1" }, "f1" },
816  { { "fr2" }, "f2" },
817  { { "fr3" }, "f3" },
818  { { "fr4" }, "f4" },
819  { { "fr5" }, "f5" },
820  { { "fr6" }, "f6" },
821  { { "fr7" }, "f7" },
822  { { "fr8" }, "f8" },
823  { { "fr9" }, "f9" },
824  { { "fr10" }, "f10" },
825  { { "fr11" }, "f11" },
826  { { "fr12" }, "f12" },
827  { { "fr13" }, "f13" },
828  { { "fr14" }, "f14" },
829  { { "fr15" }, "f15" },
830  { { "fr16" }, "f16" },
831  { { "fr17" }, "f17" },
832  { { "fr18" }, "f18" },
833  { { "fr19" }, "f19" },
834  { { "fr20" }, "f20" },
835  { { "fr21" }, "f21" },
836  { { "fr22" }, "f22" },
837  { { "fr23" }, "f23" },
838  { { "fr24" }, "f24" },
839  { { "fr25" }, "f25" },
840  { { "fr26" }, "f26" },
841  { { "fr27" }, "f27" },
842  { { "fr28" }, "f28" },
843  { { "fr29" }, "f29" },
844  { { "fr30" }, "f30" },
845  { { "fr31" }, "f31" },
846  { { "cc" }, "cr0" },
847};
848
849void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
850                                     unsigned &NumAliases) const {
851  Aliases = GCCRegAliases;
852  NumAliases = llvm::array_lengthof(GCCRegAliases);
853}
854} // end anonymous namespace.
855
856namespace {
857class PPC32TargetInfo : public PPCTargetInfo {
858public:
859  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
860    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
861                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
862
863    switch (getTriple().getOS()) {
864    case llvm::Triple::Linux:
865    case llvm::Triple::FreeBSD:
866    case llvm::Triple::NetBSD:
867      SizeType = UnsignedInt;
868      break;
869    default:
870      break;
871    }
872  }
873
874  virtual const char *getVAListDeclaration() const {
875    // This is the ELF definition, and is overridden by the Darwin sub-target
876    return "typedef struct __va_list_tag {"
877           "  unsigned char gpr;"
878           "  unsigned char fpr;"
879           "  unsigned short reserved;"
880           "  void* overflow_arg_area;"
881           "  void* reg_save_area;"
882           "} __builtin_va_list[1];";
883  }
884};
885} // end anonymous namespace.
886
887namespace {
888class PPC64TargetInfo : public PPCTargetInfo {
889public:
890  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
891    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
892    IntMaxType = SignedLong;
893    UIntMaxType = UnsignedLong;
894    Int64Type = SignedLong;
895    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
896                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
897  }
898  virtual const char *getVAListDeclaration() const {
899    return "typedef char* __builtin_va_list;";
900  }
901};
902} // end anonymous namespace.
903
904
905namespace {
906class DarwinPPC32TargetInfo :
907  public DarwinTargetInfo<PPC32TargetInfo> {
908public:
909  DarwinPPC32TargetInfo(const std::string& triple)
910    : DarwinTargetInfo<PPC32TargetInfo>(triple) {
911    HasAlignMac68kSupport = true;
912    BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
913    LongLongAlign = 32;
914    SuitableAlign = 128;
915    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
916                        "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32";
917  }
918  virtual const char *getVAListDeclaration() const {
919    return "typedef char* __builtin_va_list;";
920  }
921};
922
923class DarwinPPC64TargetInfo :
924  public DarwinTargetInfo<PPC64TargetInfo> {
925public:
926  DarwinPPC64TargetInfo(const std::string& triple)
927    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
928    HasAlignMac68kSupport = true;
929    SuitableAlign = 128;
930  }
931};
932} // end anonymous namespace.
933
934namespace {
935  static const unsigned PTXAddrSpaceMap[] = {
936    0,    // opencl_global
937    4,    // opencl_local
938    1     // opencl_constant
939  };
940  class PTXTargetInfo : public TargetInfo {
941    static const char * const GCCRegNames[];
942    static const Builtin::Info BuiltinInfo[];
943    std::vector<llvm::StringRef> AvailableFeatures;
944  public:
945    PTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
946      BigEndian = false;
947      TLSSupported = false;
948      LongWidth = LongAlign = 64;
949      AddrSpaceMap = &PTXAddrSpaceMap;
950      // Define available target features
951      // These must be defined in sorted order!
952      AvailableFeatures.push_back("compute10");
953      AvailableFeatures.push_back("compute11");
954      AvailableFeatures.push_back("compute12");
955      AvailableFeatures.push_back("compute13");
956      AvailableFeatures.push_back("compute20");
957      AvailableFeatures.push_back("double");
958      AvailableFeatures.push_back("no-fma");
959      AvailableFeatures.push_back("ptx20");
960      AvailableFeatures.push_back("ptx21");
961      AvailableFeatures.push_back("ptx22");
962      AvailableFeatures.push_back("ptx23");
963      AvailableFeatures.push_back("sm10");
964      AvailableFeatures.push_back("sm11");
965      AvailableFeatures.push_back("sm12");
966      AvailableFeatures.push_back("sm13");
967      AvailableFeatures.push_back("sm20");
968      AvailableFeatures.push_back("sm21");
969      AvailableFeatures.push_back("sm22");
970      AvailableFeatures.push_back("sm23");
971    }
972    virtual void getTargetDefines(const LangOptions &Opts,
973                                  MacroBuilder &Builder) const {
974      Builder.defineMacro("__PTX__");
975    }
976    virtual void getTargetBuiltins(const Builtin::Info *&Records,
977                                   unsigned &NumRecords) const {
978      Records = BuiltinInfo;
979      NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
980    }
981    virtual bool hasFeature(StringRef Feature) const {
982      return Feature == "ptx";
983    }
984
985    virtual void getGCCRegNames(const char * const *&Names,
986                                unsigned &NumNames) const;
987    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
988                                  unsigned &NumAliases) const {
989      // No aliases.
990      Aliases = 0;
991      NumAliases = 0;
992    }
993    virtual bool validateAsmConstraint(const char *&Name,
994                                       TargetInfo::ConstraintInfo &info) const {
995      // FIXME: implement
996      return true;
997    }
998    virtual const char *getClobbers() const {
999      // FIXME: Is this really right?
1000      return "";
1001    }
1002    virtual const char *getVAListDeclaration() const {
1003      // FIXME: implement
1004      return "typedef char* __builtin_va_list;";
1005    }
1006
1007    virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1008                                   const std::string &Name,
1009                                   bool Enabled) const;
1010  };
1011
1012  const Builtin::Info PTXTargetInfo::BuiltinInfo[] = {
1013#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1014#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1015                                              ALL_LANGUAGES },
1016#include "clang/Basic/BuiltinsPTX.def"
1017  };
1018
1019  const char * const PTXTargetInfo::GCCRegNames[] = {
1020    "r0"
1021  };
1022
1023  void PTXTargetInfo::getGCCRegNames(const char * const *&Names,
1024                                     unsigned &NumNames) const {
1025    Names = GCCRegNames;
1026    NumNames = llvm::array_lengthof(GCCRegNames);
1027  }
1028
1029  bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1030                                        const std::string &Name,
1031                                        bool Enabled) const {
1032    if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
1033                          Name)) {
1034      Features[Name] = Enabled;
1035      return true;
1036    } else {
1037      return false;
1038    }
1039  }
1040
1041  class PTX32TargetInfo : public PTXTargetInfo {
1042  public:
1043  PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
1044      PointerWidth = PointerAlign = 32;
1045      SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1046      DescriptionString
1047        = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64";
1048    }
1049  };
1050
1051  class PTX64TargetInfo : public PTXTargetInfo {
1052  public:
1053  PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
1054      PointerWidth = PointerAlign = 64;
1055      SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1056      DescriptionString
1057        = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64";
1058    }
1059  };
1060}
1061
1062namespace {
1063// MBlaze abstract base class
1064class MBlazeTargetInfo : public TargetInfo {
1065  static const char * const GCCRegNames[];
1066  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1067
1068public:
1069  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1070    DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1071  }
1072
1073  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1074                                 unsigned &NumRecords) const {
1075    // FIXME: Implement.
1076    Records = 0;
1077    NumRecords = 0;
1078  }
1079
1080  virtual void getTargetDefines(const LangOptions &Opts,
1081                                MacroBuilder &Builder) const;
1082
1083  virtual bool hasFeature(StringRef Feature) const {
1084    return Feature == "mblaze";
1085  }
1086
1087  virtual const char *getVAListDeclaration() const {
1088    return "typedef char* __builtin_va_list;";
1089  }
1090  virtual const char *getTargetPrefix() const {
1091    return "mblaze";
1092  }
1093  virtual void getGCCRegNames(const char * const *&Names,
1094                              unsigned &NumNames) const;
1095  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1096                                unsigned &NumAliases) const;
1097  virtual bool validateAsmConstraint(const char *&Name,
1098                                     TargetInfo::ConstraintInfo &Info) const {
1099    switch (*Name) {
1100    default: return false;
1101    case 'O': // Zero
1102      return true;
1103    case 'b': // Base register
1104    case 'f': // Floating point register
1105      Info.setAllowsRegister();
1106      return true;
1107    }
1108  }
1109  virtual const char *getClobbers() const {
1110    return "";
1111  }
1112};
1113
1114/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1115/// #defines that are not tied to a specific subtarget.
1116void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1117                                     MacroBuilder &Builder) const {
1118  // Target identification.
1119  Builder.defineMacro("__microblaze__");
1120  Builder.defineMacro("_ARCH_MICROBLAZE");
1121  Builder.defineMacro("__MICROBLAZE__");
1122
1123  // Target properties.
1124  Builder.defineMacro("_BIG_ENDIAN");
1125  Builder.defineMacro("__BIG_ENDIAN__");
1126
1127  // Subtarget options.
1128  Builder.defineMacro("__REGISTER_PREFIX__", "");
1129}
1130
1131
1132const char * const MBlazeTargetInfo::GCCRegNames[] = {
1133  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
1134  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
1135  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
1136  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
1137  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
1138  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1139  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1140  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1141  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1142  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
1143};
1144
1145void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1146                                   unsigned &NumNames) const {
1147  Names = GCCRegNames;
1148  NumNames = llvm::array_lengthof(GCCRegNames);
1149}
1150
1151const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1152  { {"f0"},  "r0" },
1153  { {"f1"},  "r1" },
1154  { {"f2"},  "r2" },
1155  { {"f3"},  "r3" },
1156  { {"f4"},  "r4" },
1157  { {"f5"},  "r5" },
1158  { {"f6"},  "r6" },
1159  { {"f7"},  "r7" },
1160  { {"f8"},  "r8" },
1161  { {"f9"},  "r9" },
1162  { {"f10"}, "r10" },
1163  { {"f11"}, "r11" },
1164  { {"f12"}, "r12" },
1165  { {"f13"}, "r13" },
1166  { {"f14"}, "r14" },
1167  { {"f15"}, "r15" },
1168  { {"f16"}, "r16" },
1169  { {"f17"}, "r17" },
1170  { {"f18"}, "r18" },
1171  { {"f19"}, "r19" },
1172  { {"f20"}, "r20" },
1173  { {"f21"}, "r21" },
1174  { {"f22"}, "r22" },
1175  { {"f23"}, "r23" },
1176  { {"f24"}, "r24" },
1177  { {"f25"}, "r25" },
1178  { {"f26"}, "r26" },
1179  { {"f27"}, "r27" },
1180  { {"f28"}, "r28" },
1181  { {"f29"}, "r29" },
1182  { {"f30"}, "r30" },
1183  { {"f31"}, "r31" },
1184};
1185
1186void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1187                                     unsigned &NumAliases) const {
1188  Aliases = GCCRegAliases;
1189  NumAliases = llvm::array_lengthof(GCCRegAliases);
1190}
1191} // end anonymous namespace.
1192
1193namespace {
1194// Namespace for x86 abstract base class
1195const Builtin::Info BuiltinInfo[] = {
1196#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1197#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1198                                              ALL_LANGUAGES },
1199#include "clang/Basic/BuiltinsX86.def"
1200};
1201
1202static const char* const GCCRegNames[] = {
1203  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1204  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1205  "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1206  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1207  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1208  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1209  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1210  "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1211  "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1212};
1213
1214const TargetInfo::AddlRegName AddlRegNames[] = {
1215  { { "al", "ah", "eax", "rax" }, 0 },
1216  { { "bl", "bh", "ebx", "rbx" }, 3 },
1217  { { "cl", "ch", "ecx", "rcx" }, 2 },
1218  { { "dl", "dh", "edx", "rdx" }, 1 },
1219  { { "esi", "rsi" }, 4 },
1220  { { "edi", "rdi" }, 5 },
1221  { { "esp", "rsp" }, 7 },
1222  { { "ebp", "rbp" }, 6 },
1223};
1224
1225// X86 target abstract base class; x86-32 and x86-64 are very close, so
1226// most of the implementation can be shared.
1227class X86TargetInfo : public TargetInfo {
1228  enum X86SSEEnum {
1229    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1230  } SSELevel;
1231  enum MMX3DNowEnum {
1232    NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1233  } MMX3DNowLevel;
1234
1235  bool HasAES;
1236  bool HasLZCNT;
1237  bool HasBMI;
1238  bool HasBMI2;
1239  bool HasPOPCNT;
1240  bool HasFMA4;
1241
1242  /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1243  ///
1244  /// Each enumeration represents a particular CPU supported by Clang. These
1245  /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1246  enum CPUKind {
1247    CK_Generic,
1248
1249    /// \name i386
1250    /// i386-generation processors.
1251    //@{
1252    CK_i386,
1253    //@}
1254
1255    /// \name i486
1256    /// i486-generation processors.
1257    //@{
1258    CK_i486,
1259    CK_WinChipC6,
1260    CK_WinChip2,
1261    CK_C3,
1262    //@}
1263
1264    /// \name i586
1265    /// i586-generation processors, P5 microarchitecture based.
1266    //@{
1267    CK_i586,
1268    CK_Pentium,
1269    CK_PentiumMMX,
1270    //@}
1271
1272    /// \name i686
1273    /// i686-generation processors, P6 / Pentium M microarchitecture based.
1274    //@{
1275    CK_i686,
1276    CK_PentiumPro,
1277    CK_Pentium2,
1278    CK_Pentium3,
1279    CK_Pentium3M,
1280    CK_PentiumM,
1281    CK_C3_2,
1282
1283    /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1284    /// Clang however has some logic to suport this.
1285    // FIXME: Warn, deprecate, and potentially remove this.
1286    CK_Yonah,
1287    //@}
1288
1289    /// \name Netburst
1290    /// Netburst microarchitecture based processors.
1291    //@{
1292    CK_Pentium4,
1293    CK_Pentium4M,
1294    CK_Prescott,
1295    CK_Nocona,
1296    //@}
1297
1298    /// \name Core
1299    /// Core microarchitecture based processors.
1300    //@{
1301    CK_Core2,
1302
1303    /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1304    /// codename which GCC no longer accepts as an option to -march, but Clang
1305    /// has some logic for recognizing it.
1306    // FIXME: Warn, deprecate, and potentially remove this.
1307    CK_Penryn,
1308    //@}
1309
1310    /// \name Atom
1311    /// Atom processors
1312    //@{
1313    CK_Atom,
1314    //@}
1315
1316    /// \name Nehalem
1317    /// Nehalem microarchitecture based processors.
1318    //@{
1319    CK_Corei7,
1320    CK_Corei7AVX,
1321    CK_CoreAVXi,
1322    CK_CoreAVX2,
1323    //@}
1324
1325    /// \name K6
1326    /// K6 architecture processors.
1327    //@{
1328    CK_K6,
1329    CK_K6_2,
1330    CK_K6_3,
1331    //@}
1332
1333    /// \name K7
1334    /// K7 architecture processors.
1335    //@{
1336    CK_Athlon,
1337    CK_AthlonThunderbird,
1338    CK_Athlon4,
1339    CK_AthlonXP,
1340    CK_AthlonMP,
1341    //@}
1342
1343    /// \name K8
1344    /// K8 architecture processors.
1345    //@{
1346    CK_Athlon64,
1347    CK_Athlon64SSE3,
1348    CK_AthlonFX,
1349    CK_K8,
1350    CK_K8SSE3,
1351    CK_Opteron,
1352    CK_OpteronSSE3,
1353    CK_AMDFAM10,
1354    //@}
1355
1356    /// \name Bobcat
1357    /// Bobcat architecture processors.
1358    //@{
1359    CK_BTVER1,
1360    //@}
1361
1362    /// \name Bulldozer
1363    /// Bulldozer architecture processors.
1364    //@{
1365    CK_BDVER1,
1366    CK_BDVER2,
1367    //@}
1368
1369    /// This specification is deprecated and will be removed in the future.
1370    /// Users should prefer \see CK_K8.
1371    // FIXME: Warn on this when the CPU is set to it.
1372    CK_x86_64,
1373    //@}
1374
1375    /// \name Geode
1376    /// Geode processors.
1377    //@{
1378    CK_Geode
1379    //@}
1380  } CPU;
1381
1382public:
1383  X86TargetInfo(const std::string& triple)
1384    : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1385      HasAES(false), HasLZCNT(false), HasBMI(false), HasBMI2(false),
1386      HasPOPCNT(false), HasFMA4(false), CPU(CK_Generic) {
1387    BigEndian = false;
1388    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1389  }
1390  virtual unsigned getFloatEvalMethod() const {
1391    // X87 evaluates with 80 bits "long double" precision.
1392    return SSELevel == NoSSE ? 2 : 0;
1393  }
1394  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1395                                 unsigned &NumRecords) const {
1396    Records = BuiltinInfo;
1397    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1398  }
1399  virtual void getGCCRegNames(const char * const *&Names,
1400                              unsigned &NumNames) const {
1401    Names = GCCRegNames;
1402    NumNames = llvm::array_lengthof(GCCRegNames);
1403  }
1404  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1405                                unsigned &NumAliases) const {
1406    Aliases = 0;
1407    NumAliases = 0;
1408  }
1409  virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1410				  unsigned &NumNames) const {
1411    Names = AddlRegNames;
1412    NumNames = llvm::array_lengthof(AddlRegNames);
1413  }
1414  virtual bool validateAsmConstraint(const char *&Name,
1415                                     TargetInfo::ConstraintInfo &info) const;
1416  virtual std::string convertConstraint(const char *&Constraint) const;
1417  virtual const char *getClobbers() const {
1418    return "~{dirflag},~{fpsr},~{flags}";
1419  }
1420  virtual void getTargetDefines(const LangOptions &Opts,
1421                                MacroBuilder &Builder) const;
1422  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1423                                 const std::string &Name,
1424                                 bool Enabled) const;
1425  virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1426  virtual bool hasFeature(StringRef Feature) const;
1427  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1428  virtual const char* getABI() const {
1429    if (PointerWidth == 64 && SSELevel >= AVX)
1430      return "avx";
1431    else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow)
1432      return "no-mmx";
1433    return "";
1434  }
1435  virtual bool setCPU(const std::string &Name) {
1436    CPU = llvm::StringSwitch<CPUKind>(Name)
1437      .Case("i386", CK_i386)
1438      .Case("i486", CK_i486)
1439      .Case("winchip-c6", CK_WinChipC6)
1440      .Case("winchip2", CK_WinChip2)
1441      .Case("c3", CK_C3)
1442      .Case("i586", CK_i586)
1443      .Case("pentium", CK_Pentium)
1444      .Case("pentium-mmx", CK_PentiumMMX)
1445      .Case("i686", CK_i686)
1446      .Case("pentiumpro", CK_PentiumPro)
1447      .Case("pentium2", CK_Pentium2)
1448      .Case("pentium3", CK_Pentium3)
1449      .Case("pentium3m", CK_Pentium3M)
1450      .Case("pentium-m", CK_PentiumM)
1451      .Case("c3-2", CK_C3_2)
1452      .Case("yonah", CK_Yonah)
1453      .Case("pentium4", CK_Pentium4)
1454      .Case("pentium4m", CK_Pentium4M)
1455      .Case("prescott", CK_Prescott)
1456      .Case("nocona", CK_Nocona)
1457      .Case("core2", CK_Core2)
1458      .Case("penryn", CK_Penryn)
1459      .Case("atom", CK_Atom)
1460      .Case("corei7", CK_Corei7)
1461      .Case("corei7-avx", CK_Corei7AVX)
1462      .Case("core-avx-i", CK_CoreAVXi)
1463      .Case("core-avx2", CK_CoreAVX2)
1464      .Case("k6", CK_K6)
1465      .Case("k6-2", CK_K6_2)
1466      .Case("k6-3", CK_K6_3)
1467      .Case("athlon", CK_Athlon)
1468      .Case("athlon-tbird", CK_AthlonThunderbird)
1469      .Case("athlon-4", CK_Athlon4)
1470      .Case("athlon-xp", CK_AthlonXP)
1471      .Case("athlon-mp", CK_AthlonMP)
1472      .Case("athlon64", CK_Athlon64)
1473      .Case("athlon64-sse3", CK_Athlon64SSE3)
1474      .Case("athlon-fx", CK_AthlonFX)
1475      .Case("k8", CK_K8)
1476      .Case("k8-sse3", CK_K8SSE3)
1477      .Case("opteron", CK_Opteron)
1478      .Case("opteron-sse3", CK_OpteronSSE3)
1479      .Case("amdfam10", CK_AMDFAM10)
1480      .Case("btver1", CK_BTVER1)
1481      .Case("bdver1", CK_BDVER1)
1482      .Case("bdver2", CK_BDVER2)
1483      .Case("x86-64", CK_x86_64)
1484      .Case("geode", CK_Geode)
1485      .Default(CK_Generic);
1486
1487    // Perform any per-CPU checks necessary to determine if this CPU is
1488    // acceptable.
1489    // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1490    // invalid without explaining *why*.
1491    switch (CPU) {
1492    case CK_Generic:
1493      // No processor selected!
1494      return false;
1495
1496    case CK_i386:
1497    case CK_i486:
1498    case CK_WinChipC6:
1499    case CK_WinChip2:
1500    case CK_C3:
1501    case CK_i586:
1502    case CK_Pentium:
1503    case CK_PentiumMMX:
1504    case CK_i686:
1505    case CK_PentiumPro:
1506    case CK_Pentium2:
1507    case CK_Pentium3:
1508    case CK_Pentium3M:
1509    case CK_PentiumM:
1510    case CK_Yonah:
1511    case CK_C3_2:
1512    case CK_Pentium4:
1513    case CK_Pentium4M:
1514    case CK_Prescott:
1515    case CK_K6:
1516    case CK_K6_2:
1517    case CK_K6_3:
1518    case CK_Athlon:
1519    case CK_AthlonThunderbird:
1520    case CK_Athlon4:
1521    case CK_AthlonXP:
1522    case CK_AthlonMP:
1523    case CK_Geode:
1524      // Only accept certain architectures when compiling in 32-bit mode.
1525      if (PointerWidth != 32)
1526        return false;
1527
1528      // Fallthrough
1529    case CK_Nocona:
1530    case CK_Core2:
1531    case CK_Penryn:
1532    case CK_Atom:
1533    case CK_Corei7:
1534    case CK_Corei7AVX:
1535    case CK_CoreAVXi:
1536    case CK_CoreAVX2:
1537    case CK_Athlon64:
1538    case CK_Athlon64SSE3:
1539    case CK_AthlonFX:
1540    case CK_K8:
1541    case CK_K8SSE3:
1542    case CK_Opteron:
1543    case CK_OpteronSSE3:
1544    case CK_AMDFAM10:
1545    case CK_BTVER1:
1546    case CK_BDVER1:
1547    case CK_BDVER2:
1548    case CK_x86_64:
1549      return true;
1550    }
1551    llvm_unreachable("Unhandled CPU kind");
1552  }
1553};
1554
1555void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1556  // FIXME: This should not be here.
1557  Features["3dnow"] = false;
1558  Features["3dnowa"] = false;
1559  Features["mmx"] = false;
1560  Features["sse"] = false;
1561  Features["sse2"] = false;
1562  Features["sse3"] = false;
1563  Features["ssse3"] = false;
1564  Features["sse41"] = false;
1565  Features["sse42"] = false;
1566  Features["sse4a"] = false;
1567  Features["aes"] = false;
1568  Features["avx"] = false;
1569  Features["avx2"] = false;
1570  Features["lzcnt"] = false;
1571  Features["bmi"] = false;
1572  Features["bmi2"] = false;
1573  Features["popcnt"] = false;
1574  Features["fma4"] = false;
1575
1576  // FIXME: This *really* should not be here.
1577
1578  // X86_64 always has SSE2.
1579  if (PointerWidth == 64)
1580    Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1581
1582  switch (CPU) {
1583  case CK_Generic:
1584  case CK_i386:
1585  case CK_i486:
1586  case CK_i586:
1587  case CK_Pentium:
1588  case CK_i686:
1589  case CK_PentiumPro:
1590    break;
1591  case CK_PentiumMMX:
1592  case CK_Pentium2:
1593    setFeatureEnabled(Features, "mmx", true);
1594    break;
1595  case CK_Pentium3:
1596  case CK_Pentium3M:
1597    setFeatureEnabled(Features, "mmx", true);
1598    setFeatureEnabled(Features, "sse", true);
1599    break;
1600  case CK_PentiumM:
1601  case CK_Pentium4:
1602  case CK_Pentium4M:
1603  case CK_x86_64:
1604    setFeatureEnabled(Features, "mmx", true);
1605    setFeatureEnabled(Features, "sse2", true);
1606    break;
1607  case CK_Yonah:
1608  case CK_Prescott:
1609  case CK_Nocona:
1610    setFeatureEnabled(Features, "mmx", true);
1611    setFeatureEnabled(Features, "sse3", true);
1612    break;
1613  case CK_Core2:
1614    setFeatureEnabled(Features, "mmx", true);
1615    setFeatureEnabled(Features, "ssse3", true);
1616    break;
1617  case CK_Penryn:
1618    setFeatureEnabled(Features, "mmx", true);
1619    setFeatureEnabled(Features, "sse4.1", true);
1620    break;
1621  case CK_Atom:
1622    setFeatureEnabled(Features, "mmx", true);
1623    setFeatureEnabled(Features, "ssse3", true);
1624    break;
1625  case CK_Corei7:
1626    setFeatureEnabled(Features, "mmx", true);
1627    setFeatureEnabled(Features, "sse4", true);
1628    setFeatureEnabled(Features, "aes", true);
1629    break;
1630  case CK_Corei7AVX:
1631  case CK_CoreAVXi:
1632    setFeatureEnabled(Features, "mmx", true);
1633    setFeatureEnabled(Features, "sse4", true);
1634    setFeatureEnabled(Features, "aes", true);
1635    //setFeatureEnabled(Features, "avx", true);
1636    break;
1637  case CK_CoreAVX2:
1638    setFeatureEnabled(Features, "mmx", true);
1639    setFeatureEnabled(Features, "sse4", true);
1640    setFeatureEnabled(Features, "aes", true);
1641    setFeatureEnabled(Features, "lzcnt", true);
1642    setFeatureEnabled(Features, "bmi", true);
1643    setFeatureEnabled(Features, "bmi2", true);
1644    //setFeatureEnabled(Features, "avx2", true);
1645    break;
1646  case CK_K6:
1647  case CK_WinChipC6:
1648    setFeatureEnabled(Features, "mmx", true);
1649    break;
1650  case CK_K6_2:
1651  case CK_K6_3:
1652  case CK_WinChip2:
1653  case CK_C3:
1654    setFeatureEnabled(Features, "3dnow", true);
1655    break;
1656  case CK_Athlon:
1657  case CK_AthlonThunderbird:
1658  case CK_Geode:
1659    setFeatureEnabled(Features, "3dnowa", true);
1660    break;
1661  case CK_Athlon4:
1662  case CK_AthlonXP:
1663  case CK_AthlonMP:
1664    setFeatureEnabled(Features, "sse", true);
1665    setFeatureEnabled(Features, "3dnowa", true);
1666    break;
1667  case CK_K8:
1668  case CK_Opteron:
1669  case CK_Athlon64:
1670  case CK_AthlonFX:
1671    setFeatureEnabled(Features, "sse2", true);
1672    setFeatureEnabled(Features, "3dnowa", true);
1673    break;
1674  case CK_K8SSE3:
1675  case CK_OpteronSSE3:
1676  case CK_Athlon64SSE3:
1677    setFeatureEnabled(Features, "sse3", true);
1678    setFeatureEnabled(Features, "3dnowa", true);
1679    break;
1680  case CK_AMDFAM10:
1681    setFeatureEnabled(Features, "sse3", true);
1682    setFeatureEnabled(Features, "sse4a", true);
1683    setFeatureEnabled(Features, "3dnowa", true);
1684    break;
1685  case CK_BTVER1:
1686    setFeatureEnabled(Features, "ssse3", true);
1687    setFeatureEnabled(Features, "sse4a", true);
1688  case CK_BDVER1:
1689  case CK_BDVER2:
1690    setFeatureEnabled(Features, "sse4", true);
1691    setFeatureEnabled(Features, "sse4a", true);
1692    setFeatureEnabled(Features, "aes", true);
1693    break;
1694  case CK_C3_2:
1695    setFeatureEnabled(Features, "mmx", true);
1696    setFeatureEnabled(Features, "sse", true);
1697    break;
1698  }
1699}
1700
1701bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1702                                      const std::string &Name,
1703                                      bool Enabled) const {
1704  // FIXME: This *really* should not be here.  We need some way of translating
1705  // options into llvm subtarget features.
1706  if (!Features.count(Name) &&
1707      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1708    return false;
1709
1710  // FIXME: this should probably use a switch with fall through.
1711
1712  if (Enabled) {
1713    if (Name == "mmx")
1714      Features["mmx"] = true;
1715    else if (Name == "sse")
1716      Features["mmx"] = Features["sse"] = true;
1717    else if (Name == "sse2")
1718      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1719    else if (Name == "sse3")
1720      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1721        true;
1722    else if (Name == "ssse3")
1723      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1724        Features["ssse3"] = true;
1725    else if (Name == "sse4" || Name == "sse4.2")
1726      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1727        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1728        Features["popcnt"] = true;
1729    else if (Name == "sse4.1")
1730      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1731        Features["ssse3"] = Features["sse41"] = true;
1732    else if (Name == "3dnow")
1733      Features["mmx"] = Features["3dnow"] = true;
1734    else if (Name == "3dnowa")
1735      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
1736    else if (Name == "aes")
1737      Features["aes"] = true;
1738    else if (Name == "avx")
1739      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1740        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1741        Features["popcnt"] = Features["avx"] = true;
1742    else if (Name == "avx2")
1743      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1744        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1745        Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
1746    else if (Name == "fma4")
1747        Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1748        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1749        Features["popcnt"] = Features["avx"] = Features["fma4"] = true;
1750    else if (Name == "sse4a")
1751      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1752        Features["lzcnt"] = Features["popcnt"] = Features["sse4a"] = true;
1753    else if (Name == "lzcnt")
1754      Features["lzcnt"] = true;
1755    else if (Name == "bmi")
1756      Features["bmi"] = true;
1757    else if (Name == "bmi2")
1758      Features["bmi2"] = true;
1759    else if (Name == "popcnt")
1760      Features["popcnt"] = true;
1761  } else {
1762    if (Name == "mmx")
1763      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
1764    else if (Name == "sse")
1765      Features["sse"] = Features["sse2"] = Features["sse3"] =
1766        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1767        Features["sse4a"] = false;
1768    else if (Name == "sse2")
1769      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1770        Features["sse41"] = Features["sse42"] = Features["sse4a"] = false;
1771    else if (Name == "sse3")
1772      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1773        Features["sse42"] = Features["sse4a"] = false;
1774    else if (Name == "ssse3")
1775      Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1776    else if (Name == "sse4" || Name == "sse4.1")
1777      Features["sse41"] = Features["sse42"] = false;
1778    else if (Name == "sse4.2")
1779      Features["sse42"] = false;
1780    else if (Name == "3dnow")
1781      Features["3dnow"] = Features["3dnowa"] = false;
1782    else if (Name == "3dnowa")
1783      Features["3dnowa"] = false;
1784    else if (Name == "aes")
1785      Features["aes"] = false;
1786    else if (Name == "avx")
1787      Features["avx"] = Features["avx2"] = Features["fma4"] = false;
1788    else if (Name == "avx2")
1789      Features["avx2"] = false;
1790    else if (Name == "sse4a")
1791      Features["sse4a"] = false;
1792    else if (Name == "lzcnt")
1793      Features["lzcnt"] = false;
1794    else if (Name == "bmi")
1795      Features["bmi"] = false;
1796    else if (Name == "bmi2")
1797      Features["bmi2"] = false;
1798    else if (Name == "popcnt")
1799      Features["popcnt"] = false;
1800    else if (Name == "fma4")
1801      Features["fma4"] = false;
1802  }
1803
1804  return true;
1805}
1806
1807/// HandleTargetOptions - Perform initialization based on the user
1808/// configured set of features.
1809void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1810  // Remember the maximum enabled sselevel.
1811  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1812    // Ignore disabled features.
1813    if (Features[i][0] == '-')
1814      continue;
1815
1816    if (Features[i].substr(1) == "aes") {
1817      HasAES = true;
1818      continue;
1819    }
1820
1821    if (Features[i].substr(1) == "lzcnt") {
1822      HasLZCNT = true;
1823      continue;
1824    }
1825
1826    if (Features[i].substr(1) == "bmi") {
1827      HasBMI = true;
1828      continue;
1829    }
1830
1831    if (Features[i].substr(1) == "bmi2") {
1832      HasBMI2 = true;
1833      continue;
1834    }
1835
1836    if (Features[i].substr(1) == "popcnt") {
1837      HasPOPCNT = true;
1838      continue;
1839    }
1840
1841    if (Features[i].substr(1) == "fma4") {
1842      HasFMA4 = true;
1843      continue;
1844    }
1845
1846    assert(Features[i][0] == '+' && "Invalid target feature!");
1847    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
1848      .Case("avx2", AVX2)
1849      .Case("avx", AVX)
1850      .Case("sse42", SSE42)
1851      .Case("sse41", SSE41)
1852      .Case("ssse3", SSSE3)
1853      .Case("sse3", SSE3)
1854      .Case("sse2", SSE2)
1855      .Case("sse", SSE1)
1856      .Default(NoSSE);
1857    SSELevel = std::max(SSELevel, Level);
1858
1859    MMX3DNowEnum ThreeDNowLevel =
1860      llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1))
1861        .Case("3dnowa", AMD3DNowAthlon)
1862        .Case("3dnow", AMD3DNow)
1863        .Case("mmx", MMX)
1864        .Default(NoMMX3DNow);
1865
1866    MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
1867  }
1868
1869  // Don't tell the backend if we're turning off mmx; it will end up disabling
1870  // SSE, which we don't want.
1871  std::vector<std::string>::iterator it;
1872  it = std::find(Features.begin(), Features.end(), "-mmx");
1873  if (it != Features.end())
1874    Features.erase(it);
1875}
1876
1877/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
1878/// definitions for this particular subtarget.
1879void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1880                                     MacroBuilder &Builder) const {
1881  // Target identification.
1882  if (PointerWidth == 64) {
1883    Builder.defineMacro("_LP64");
1884    Builder.defineMacro("__LP64__");
1885    Builder.defineMacro("__amd64__");
1886    Builder.defineMacro("__amd64");
1887    Builder.defineMacro("__x86_64");
1888    Builder.defineMacro("__x86_64__");
1889  } else {
1890    DefineStd(Builder, "i386", Opts);
1891  }
1892
1893  // Subtarget options.
1894  // FIXME: We are hard-coding the tune parameters based on the CPU, but they
1895  // truly should be based on -mtune options.
1896  switch (CPU) {
1897  case CK_Generic:
1898    break;
1899  case CK_i386:
1900    // The rest are coming from the i386 define above.
1901    Builder.defineMacro("__tune_i386__");
1902    break;
1903  case CK_i486:
1904  case CK_WinChipC6:
1905  case CK_WinChip2:
1906  case CK_C3:
1907    defineCPUMacros(Builder, "i486");
1908    break;
1909  case CK_PentiumMMX:
1910    Builder.defineMacro("__pentium_mmx__");
1911    Builder.defineMacro("__tune_pentium_mmx__");
1912    // Fallthrough
1913  case CK_i586:
1914  case CK_Pentium:
1915    defineCPUMacros(Builder, "i586");
1916    defineCPUMacros(Builder, "pentium");
1917    break;
1918  case CK_Pentium3:
1919  case CK_Pentium3M:
1920  case CK_PentiumM:
1921    Builder.defineMacro("__tune_pentium3__");
1922    // Fallthrough
1923  case CK_Pentium2:
1924  case CK_C3_2:
1925    Builder.defineMacro("__tune_pentium2__");
1926    // Fallthrough
1927  case CK_PentiumPro:
1928    Builder.defineMacro("__tune_i686__");
1929    Builder.defineMacro("__tune_pentiumpro__");
1930    // Fallthrough
1931  case CK_i686:
1932    Builder.defineMacro("__i686");
1933    Builder.defineMacro("__i686__");
1934    // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
1935    Builder.defineMacro("__pentiumpro");
1936    Builder.defineMacro("__pentiumpro__");
1937    break;
1938  case CK_Pentium4:
1939  case CK_Pentium4M:
1940    defineCPUMacros(Builder, "pentium4");
1941    break;
1942  case CK_Yonah:
1943  case CK_Prescott:
1944  case CK_Nocona:
1945    defineCPUMacros(Builder, "nocona");
1946    break;
1947  case CK_Core2:
1948  case CK_Penryn:
1949    defineCPUMacros(Builder, "core2");
1950    break;
1951  case CK_Atom:
1952    defineCPUMacros(Builder, "atom");
1953    break;
1954  case CK_Corei7:
1955  case CK_Corei7AVX:
1956  case CK_CoreAVXi:
1957  case CK_CoreAVX2:
1958    defineCPUMacros(Builder, "corei7");
1959    break;
1960  case CK_K6_2:
1961    Builder.defineMacro("__k6_2__");
1962    Builder.defineMacro("__tune_k6_2__");
1963    // Fallthrough
1964  case CK_K6_3:
1965    if (CPU != CK_K6_2) {  // In case of fallthrough
1966      // FIXME: GCC may be enabling these in cases where some other k6
1967      // architecture is specified but -m3dnow is explicitly provided. The
1968      // exact semantics need to be determined and emulated here.
1969      Builder.defineMacro("__k6_3__");
1970      Builder.defineMacro("__tune_k6_3__");
1971    }
1972    // Fallthrough
1973  case CK_K6:
1974    defineCPUMacros(Builder, "k6");
1975    break;
1976  case CK_Athlon:
1977  case CK_AthlonThunderbird:
1978  case CK_Athlon4:
1979  case CK_AthlonXP:
1980  case CK_AthlonMP:
1981    defineCPUMacros(Builder, "athlon");
1982    if (SSELevel != NoSSE) {
1983      Builder.defineMacro("__athlon_sse__");
1984      Builder.defineMacro("__tune_athlon_sse__");
1985    }
1986    break;
1987  case CK_K8:
1988  case CK_K8SSE3:
1989  case CK_x86_64:
1990  case CK_Opteron:
1991  case CK_OpteronSSE3:
1992  case CK_Athlon64:
1993  case CK_Athlon64SSE3:
1994  case CK_AthlonFX:
1995    defineCPUMacros(Builder, "k8");
1996    break;
1997  case CK_AMDFAM10:
1998    defineCPUMacros(Builder, "amdfam10");
1999    break;
2000  case CK_BTVER1:
2001    defineCPUMacros(Builder, "btver1");
2002    break;
2003  case CK_BDVER1:
2004    defineCPUMacros(Builder, "bdver1");
2005    break;
2006  case CK_BDVER2:
2007    defineCPUMacros(Builder, "bdver2");
2008    break;
2009  case CK_Geode:
2010    defineCPUMacros(Builder, "geode");
2011    break;
2012  }
2013
2014  // Target properties.
2015  Builder.defineMacro("__LITTLE_ENDIAN__");
2016  Builder.defineMacro("__REGISTER_PREFIX__", "");
2017
2018  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
2019  // functions in glibc header files that use FP Stack inline asm which the
2020  // backend can't deal with (PR879).
2021  Builder.defineMacro("__NO_MATH_INLINES");
2022
2023  if (HasAES)
2024    Builder.defineMacro("__AES__");
2025
2026  if (HasLZCNT)
2027    Builder.defineMacro("__LZCNT__");
2028
2029  if (HasBMI)
2030    Builder.defineMacro("__BMI__");
2031
2032  if (HasBMI2)
2033    Builder.defineMacro("__BMI2__");
2034
2035  if (HasPOPCNT)
2036    Builder.defineMacro("__POPCNT__");
2037
2038  if (HasFMA4)
2039    Builder.defineMacro("__FMA4__");
2040
2041  // Each case falls through to the previous one here.
2042  switch (SSELevel) {
2043  case AVX2:
2044    Builder.defineMacro("__AVX2__");
2045  case AVX:
2046    Builder.defineMacro("__AVX__");
2047  case SSE42:
2048    Builder.defineMacro("__SSE4_2__");
2049  case SSE41:
2050    Builder.defineMacro("__SSE4_1__");
2051  case SSSE3:
2052    Builder.defineMacro("__SSSE3__");
2053  case SSE3:
2054    Builder.defineMacro("__SSE3__");
2055  case SSE2:
2056    Builder.defineMacro("__SSE2__");
2057    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
2058  case SSE1:
2059    Builder.defineMacro("__SSE__");
2060    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
2061  case NoSSE:
2062    break;
2063  }
2064
2065  if (Opts.MicrosoftExt && PointerWidth == 32) {
2066    switch (SSELevel) {
2067    case AVX2:
2068    case AVX:
2069    case SSE42:
2070    case SSE41:
2071    case SSSE3:
2072    case SSE3:
2073    case SSE2:
2074      Builder.defineMacro("_M_IX86_FP", Twine(2));
2075      break;
2076    case SSE1:
2077      Builder.defineMacro("_M_IX86_FP", Twine(1));
2078      break;
2079    default:
2080      Builder.defineMacro("_M_IX86_FP", Twine(0));
2081    }
2082  }
2083
2084  // Each case falls through to the previous one here.
2085  switch (MMX3DNowLevel) {
2086  case AMD3DNowAthlon:
2087    Builder.defineMacro("__3dNOW_A__");
2088  case AMD3DNow:
2089    Builder.defineMacro("__3dNOW__");
2090  case MMX:
2091    Builder.defineMacro("__MMX__");
2092  case NoMMX3DNow:
2093    break;
2094  }
2095}
2096
2097bool X86TargetInfo::hasFeature(StringRef Feature) const {
2098  return llvm::StringSwitch<bool>(Feature)
2099      .Case("aes", HasAES)
2100      .Case("avx", SSELevel >= AVX)
2101      .Case("avx2", SSELevel >= AVX2)
2102      .Case("bmi", HasBMI)
2103      .Case("bmi2", HasBMI2)
2104      .Case("fma4", HasFMA4)
2105      .Case("lzcnt", HasLZCNT)
2106      .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
2107      .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
2108      .Case("mmx", MMX3DNowLevel >= MMX)
2109      .Case("popcnt", HasPOPCNT)
2110      .Case("sse", SSELevel >= SSE1)
2111      .Case("sse2", SSELevel >= SSE2)
2112      .Case("sse3", SSELevel >= SSE3)
2113      .Case("ssse3", SSELevel >= SSSE3)
2114      .Case("sse41", SSELevel >= SSE41)
2115      .Case("sse42", SSELevel >= SSE42)
2116      .Case("x86", true)
2117      .Case("x86_32", PointerWidth == 32)
2118      .Case("x86_64", PointerWidth == 64)
2119      .Default(false);
2120}
2121
2122bool
2123X86TargetInfo::validateAsmConstraint(const char *&Name,
2124                                     TargetInfo::ConstraintInfo &Info) const {
2125  switch (*Name) {
2126  default: return false;
2127  case 'Y': // first letter of a pair:
2128    switch (*(Name+1)) {
2129    default: return false;
2130    case '0':  // First SSE register.
2131    case 't':  // Any SSE register, when SSE2 is enabled.
2132    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
2133    case 'm':  // any MMX register, when inter-unit moves enabled.
2134      break;   // falls through to setAllowsRegister.
2135  }
2136  case 'a': // eax.
2137  case 'b': // ebx.
2138  case 'c': // ecx.
2139  case 'd': // edx.
2140  case 'S': // esi.
2141  case 'D': // edi.
2142  case 'A': // edx:eax.
2143  case 'f': // any x87 floating point stack register.
2144  case 't': // top of floating point stack.
2145  case 'u': // second from top of floating point stack.
2146  case 'q': // Any register accessible as [r]l: a, b, c, and d.
2147  case 'y': // Any MMX register.
2148  case 'x': // Any SSE register.
2149  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2150  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2151  case 'l': // "Index" registers: any general register that can be used as an
2152            // index in a base+index memory access.
2153    Info.setAllowsRegister();
2154    return true;
2155  case 'C': // SSE floating point constant.
2156  case 'G': // x87 floating point constant.
2157  case 'e': // 32-bit signed integer constant for use with zero-extending
2158            // x86_64 instructions.
2159  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2160            // x86_64 instructions.
2161    return true;
2162  }
2163}
2164
2165
2166std::string
2167X86TargetInfo::convertConstraint(const char *&Constraint) const {
2168  switch (*Constraint) {
2169  case 'a': return std::string("{ax}");
2170  case 'b': return std::string("{bx}");
2171  case 'c': return std::string("{cx}");
2172  case 'd': return std::string("{dx}");
2173  case 'S': return std::string("{si}");
2174  case 'D': return std::string("{di}");
2175  case 'p': // address
2176    return std::string("im");
2177  case 't': // top of floating point stack.
2178    return std::string("{st}");
2179  case 'u': // second from top of floating point stack.
2180    return std::string("{st(1)}"); // second from top of floating point stack.
2181  default:
2182    return std::string(1, *Constraint);
2183  }
2184}
2185} // end anonymous namespace
2186
2187namespace {
2188// X86-32 generic target
2189class X86_32TargetInfo : public X86TargetInfo {
2190public:
2191  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2192    DoubleAlign = LongLongAlign = 32;
2193    LongDoubleWidth = 96;
2194    LongDoubleAlign = 32;
2195    SuitableAlign = 128;
2196    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2197                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2198                        "a0:0:64-f80:32:32-n8:16:32-S128";
2199    SizeType = UnsignedInt;
2200    PtrDiffType = SignedInt;
2201    IntPtrType = SignedInt;
2202    RegParmMax = 3;
2203
2204    // Use fpret for all types.
2205    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2206                             (1 << TargetInfo::Double) |
2207                             (1 << TargetInfo::LongDouble));
2208
2209    // x86-32 has atomics up to 8 bytes
2210    // FIXME: Check that we actually have cmpxchg8b before setting
2211    // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2212    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2213  }
2214  virtual const char *getVAListDeclaration() const {
2215    return "typedef char* __builtin_va_list;";
2216  }
2217
2218  int getEHDataRegisterNumber(unsigned RegNo) const {
2219    if (RegNo == 0) return 0;
2220    if (RegNo == 1) return 2;
2221    return -1;
2222  }
2223};
2224} // end anonymous namespace
2225
2226namespace {
2227class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2228public:
2229  NetBSDI386TargetInfo(const std::string &triple) :
2230    NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2231  }
2232
2233  virtual unsigned getFloatEvalMethod() const {
2234    // NetBSD defaults to "double" rounding
2235    return 1;
2236  }
2237};
2238} // end anonymous namespace
2239
2240namespace {
2241class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2242public:
2243  OpenBSDI386TargetInfo(const std::string& triple) :
2244    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2245    SizeType = UnsignedLong;
2246    IntPtrType = SignedLong;
2247    PtrDiffType = SignedLong;
2248  }
2249};
2250} // end anonymous namespace
2251
2252namespace {
2253class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2254public:
2255  DarwinI386TargetInfo(const std::string& triple) :
2256    DarwinTargetInfo<X86_32TargetInfo>(triple) {
2257    LongDoubleWidth = 128;
2258    LongDoubleAlign = 128;
2259    SuitableAlign = 128;
2260    SizeType = UnsignedLong;
2261    IntPtrType = SignedLong;
2262    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2263                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2264                        "a0:0:64-f80:128:128-n8:16:32-S128";
2265    HasAlignMac68kSupport = true;
2266  }
2267
2268};
2269} // end anonymous namespace
2270
2271namespace {
2272// x86-32 Windows target
2273class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2274public:
2275  WindowsX86_32TargetInfo(const std::string& triple)
2276    : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2277    TLSSupported = false;
2278    WCharType = UnsignedShort;
2279    DoubleAlign = LongLongAlign = 64;
2280    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2281                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2282                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2283  }
2284  virtual void getTargetDefines(const LangOptions &Opts,
2285                                MacroBuilder &Builder) const {
2286    WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2287  }
2288};
2289} // end anonymous namespace
2290
2291namespace {
2292
2293// x86-32 Windows Visual Studio target
2294class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2295public:
2296  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2297    : WindowsX86_32TargetInfo(triple) {
2298    LongDoubleWidth = LongDoubleAlign = 64;
2299    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2300  }
2301  virtual void getTargetDefines(const LangOptions &Opts,
2302                                MacroBuilder &Builder) const {
2303    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2304    WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2305    // The value of the following reflects processor type.
2306    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2307    // We lost the original triple, so we use the default.
2308    Builder.defineMacro("_M_IX86", "600");
2309  }
2310};
2311} // end anonymous namespace
2312
2313namespace {
2314// x86-32 MinGW target
2315class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2316public:
2317  MinGWX86_32TargetInfo(const std::string& triple)
2318    : WindowsX86_32TargetInfo(triple) {
2319  }
2320  virtual void getTargetDefines(const LangOptions &Opts,
2321                                MacroBuilder &Builder) const {
2322    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2323    DefineStd(Builder, "WIN32", Opts);
2324    DefineStd(Builder, "WINNT", Opts);
2325    Builder.defineMacro("_X86_");
2326    Builder.defineMacro("__MSVCRT__");
2327    Builder.defineMacro("__MINGW32__");
2328
2329    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2330    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2331    if (Opts.MicrosoftExt)
2332      // Provide "as-is" __declspec.
2333      Builder.defineMacro("__declspec", "__declspec");
2334    else
2335      // Provide alias of __attribute__ like mingw32-gcc.
2336      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2337  }
2338};
2339} // end anonymous namespace
2340
2341namespace {
2342// x86-32 Cygwin target
2343class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2344public:
2345  CygwinX86_32TargetInfo(const std::string& triple)
2346    : X86_32TargetInfo(triple) {
2347    TLSSupported = false;
2348    WCharType = UnsignedShort;
2349    DoubleAlign = LongLongAlign = 64;
2350    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2351                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2352                        "a0:0:64-f80:32:32-n8:16:32-S32";
2353  }
2354  virtual void getTargetDefines(const LangOptions &Opts,
2355                                MacroBuilder &Builder) const {
2356    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2357    Builder.defineMacro("__CYGWIN__");
2358    Builder.defineMacro("__CYGWIN32__");
2359    DefineStd(Builder, "unix", Opts);
2360    if (Opts.CPlusPlus)
2361      Builder.defineMacro("_GNU_SOURCE");
2362  }
2363};
2364} // end anonymous namespace
2365
2366namespace {
2367// x86-32 Haiku target
2368class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2369public:
2370  HaikuX86_32TargetInfo(const std::string& triple)
2371    : X86_32TargetInfo(triple) {
2372    SizeType = UnsignedLong;
2373    IntPtrType = SignedLong;
2374    PtrDiffType = SignedLong;
2375    this->UserLabelPrefix = "";
2376  }
2377  virtual void getTargetDefines(const LangOptions &Opts,
2378                                MacroBuilder &Builder) const {
2379    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2380    Builder.defineMacro("__INTEL__");
2381    Builder.defineMacro("__HAIKU__");
2382  }
2383};
2384} // end anonymous namespace
2385
2386// RTEMS Target
2387template<typename Target>
2388class RTEMSTargetInfo : public OSTargetInfo<Target> {
2389protected:
2390  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2391                            MacroBuilder &Builder) const {
2392    // RTEMS defines; list based off of gcc output
2393
2394    Builder.defineMacro("__rtems__");
2395    Builder.defineMacro("__ELF__");
2396  }
2397public:
2398  RTEMSTargetInfo(const std::string &triple)
2399    : OSTargetInfo<Target>(triple) {
2400      this->UserLabelPrefix = "";
2401
2402      llvm::Triple Triple(triple);
2403      switch (Triple.getArch()) {
2404        default:
2405        case llvm::Triple::x86:
2406          // this->MCountName = ".mcount";
2407          break;
2408        case llvm::Triple::mips:
2409        case llvm::Triple::mipsel:
2410        case llvm::Triple::ppc:
2411        case llvm::Triple::ppc64:
2412          // this->MCountName = "_mcount";
2413          break;
2414        case llvm::Triple::arm:
2415          // this->MCountName = "__mcount";
2416          break;
2417      }
2418
2419    }
2420};
2421
2422namespace {
2423// x86-32 RTEMS target
2424class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2425public:
2426  RTEMSX86_32TargetInfo(const std::string& triple)
2427    : X86_32TargetInfo(triple) {
2428    SizeType = UnsignedLong;
2429    IntPtrType = SignedLong;
2430    PtrDiffType = SignedLong;
2431    this->UserLabelPrefix = "";
2432  }
2433  virtual void getTargetDefines(const LangOptions &Opts,
2434                                MacroBuilder &Builder) const {
2435    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2436    Builder.defineMacro("__INTEL__");
2437    Builder.defineMacro("__rtems__");
2438  }
2439};
2440} // end anonymous namespace
2441
2442namespace {
2443// x86-64 generic target
2444class X86_64TargetInfo : public X86TargetInfo {
2445public:
2446  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2447    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2448    LongDoubleWidth = 128;
2449    LongDoubleAlign = 128;
2450    LargeArrayMinWidth = 128;
2451    LargeArrayAlign = 128;
2452    SuitableAlign = 128;
2453    IntMaxType = SignedLong;
2454    UIntMaxType = UnsignedLong;
2455    Int64Type = SignedLong;
2456    RegParmMax = 6;
2457
2458    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2459                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2460                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2461
2462    // Use fpret only for long double.
2463    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2464
2465    // Use fp2ret for _Complex long double.
2466    ComplexLongDoubleUsesFP2Ret = true;
2467
2468    // x86-64 has atomics up to 16 bytes.
2469    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2470    // on CPUs with cmpxchg16b
2471    MaxAtomicPromoteWidth = 128;
2472    MaxAtomicInlineWidth = 64;
2473  }
2474  virtual const char *getVAListDeclaration() const {
2475    return "typedef struct __va_list_tag {"
2476           "  unsigned gp_offset;"
2477           "  unsigned fp_offset;"
2478           "  void* overflow_arg_area;"
2479           "  void* reg_save_area;"
2480           "} __va_list_tag;"
2481           "typedef __va_list_tag __builtin_va_list[1];";
2482  }
2483
2484  int getEHDataRegisterNumber(unsigned RegNo) const {
2485    if (RegNo == 0) return 0;
2486    if (RegNo == 1) return 1;
2487    return -1;
2488  }
2489};
2490} // end anonymous namespace
2491
2492namespace {
2493// x86-64 Windows target
2494class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2495public:
2496  WindowsX86_64TargetInfo(const std::string& triple)
2497    : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2498    TLSSupported = false;
2499    WCharType = UnsignedShort;
2500    LongWidth = LongAlign = 32;
2501    DoubleAlign = LongLongAlign = 64;
2502    IntMaxType = SignedLongLong;
2503    UIntMaxType = UnsignedLongLong;
2504    Int64Type = SignedLongLong;
2505    SizeType = UnsignedLongLong;
2506    PtrDiffType = SignedLongLong;
2507    IntPtrType = SignedLongLong;
2508    this->UserLabelPrefix = "";
2509  }
2510  virtual void getTargetDefines(const LangOptions &Opts,
2511                                MacroBuilder &Builder) const {
2512    WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2513    Builder.defineMacro("_WIN64");
2514  }
2515  virtual const char *getVAListDeclaration() const {
2516    return "typedef char* __builtin_va_list;";
2517  }
2518};
2519} // end anonymous namespace
2520
2521namespace {
2522// x86-64 Windows Visual Studio target
2523class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2524public:
2525  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2526    : WindowsX86_64TargetInfo(triple) {
2527    LongDoubleWidth = LongDoubleAlign = 64;
2528    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2529  }
2530  virtual void getTargetDefines(const LangOptions &Opts,
2531                                MacroBuilder &Builder) const {
2532    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2533    WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2534    Builder.defineMacro("_M_X64");
2535    Builder.defineMacro("_M_AMD64");
2536  }
2537};
2538} // end anonymous namespace
2539
2540namespace {
2541// x86-64 MinGW target
2542class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2543public:
2544  MinGWX86_64TargetInfo(const std::string& triple)
2545    : WindowsX86_64TargetInfo(triple) {
2546  }
2547  virtual void getTargetDefines(const LangOptions &Opts,
2548                                MacroBuilder &Builder) const {
2549    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2550    DefineStd(Builder, "WIN64", Opts);
2551    Builder.defineMacro("__MSVCRT__");
2552    Builder.defineMacro("__MINGW32__");
2553    Builder.defineMacro("__MINGW64__");
2554
2555    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2556    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2557    if (Opts.MicrosoftExt)
2558      // Provide "as-is" __declspec.
2559      Builder.defineMacro("__declspec", "__declspec");
2560    else
2561      // Provide alias of __attribute__ like mingw32-gcc.
2562      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2563  }
2564};
2565} // end anonymous namespace
2566
2567namespace {
2568class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2569public:
2570  DarwinX86_64TargetInfo(const std::string& triple)
2571      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2572    Int64Type = SignedLongLong;
2573  }
2574};
2575} // end anonymous namespace
2576
2577namespace {
2578class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2579public:
2580  OpenBSDX86_64TargetInfo(const std::string& triple)
2581      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2582    IntMaxType = SignedLongLong;
2583    UIntMaxType = UnsignedLongLong;
2584    Int64Type = SignedLongLong;
2585  }
2586};
2587} // end anonymous namespace
2588
2589namespace {
2590class ARMTargetInfo : public TargetInfo {
2591  // Possible FPU choices.
2592  enum FPUMode {
2593    NoFPU,
2594    VFP2FPU,
2595    VFP3FPU,
2596    NeonFPU
2597  };
2598
2599  static bool FPUModeIsVFP(FPUMode Mode) {
2600    return Mode >= VFP2FPU && Mode <= NeonFPU;
2601  }
2602
2603  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2604  static const char * const GCCRegNames[];
2605
2606  std::string ABI, CPU;
2607
2608  unsigned FPU : 3;
2609
2610  unsigned IsThumb : 1;
2611
2612  // Initialized via features.
2613  unsigned SoftFloat : 1;
2614  unsigned SoftFloatABI : 1;
2615
2616  static const Builtin::Info BuiltinInfo[];
2617
2618public:
2619  ARMTargetInfo(const std::string &TripleStr)
2620    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
2621  {
2622    BigEndian = false;
2623    SizeType = UnsignedInt;
2624    PtrDiffType = SignedInt;
2625    // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
2626    WCharType = UnsignedInt;
2627
2628    // {} in inline assembly are neon specifiers, not assembly variant
2629    // specifiers.
2630    NoAsmVariants = true;
2631
2632    // FIXME: Should we just treat this as a feature?
2633    IsThumb = getTriple().getArchName().startswith("thumb");
2634    if (IsThumb) {
2635      // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2636      // so set preferred for small types to 32.
2637      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2638                           "i64:64:64-f32:32:32-f64:64:64-"
2639                           "v64:64:64-v128:64:128-a0:0:32-n32-S64");
2640    } else {
2641      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2642                           "i64:64:64-f32:32:32-f64:64:64-"
2643                           "v64:64:64-v128:64:128-a0:0:64-n32-S64");
2644    }
2645
2646    // ARM targets default to using the ARM C++ ABI.
2647    CXXABI = CXXABI_ARM;
2648
2649    // ARM has atomics up to 8 bytes
2650    // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
2651    MaxAtomicPromoteWidth = 64;
2652  }
2653  virtual const char *getABI() const { return ABI.c_str(); }
2654  virtual bool setABI(const std::string &Name) {
2655    ABI = Name;
2656
2657    // The defaults (above) are for AAPCS, check if we need to change them.
2658    //
2659    // FIXME: We need support for -meabi... we could just mangle it into the
2660    // name.
2661    if (Name == "apcs-gnu") {
2662      DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
2663      SizeType = UnsignedLong;
2664
2665      // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
2666      WCharType = SignedInt;
2667
2668      // Do not respect the alignment of bit-field types when laying out
2669      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
2670      UseBitFieldTypeAlignment = false;
2671
2672      /// Do force alignment of members that follow zero length bitfields.  If
2673      /// the alignment of the zero-length bitfield is greater than the member
2674      /// that follows it, `bar', `bar' will be aligned as the  type of the
2675      /// zero length bitfield.
2676      UseZeroLengthBitfieldAlignment = true;
2677
2678      /// gcc forces the alignment to 4 bytes, regardless of the type of the
2679      /// zero length bitfield.  This corresponds to EMPTY_FIELD_BOUNDARY in
2680      /// gcc.
2681      ZeroLengthBitfieldBoundary = 32;
2682
2683      if (IsThumb) {
2684        // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2685        // so set preferred for small types to 32.
2686        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2687                             "i64:32:64-f32:32:32-f64:32:64-"
2688                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2689      } else {
2690        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2691                             "i64:32:64-f32:32:32-f64:32:64-"
2692                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2693      }
2694
2695      // FIXME: Override "preferred align" for double and long long.
2696    } else if (Name == "aapcs") {
2697      // FIXME: Enumerated types are variable width in straight AAPCS.
2698    } else if (Name == "aapcs-linux") {
2699      ;
2700    } else
2701      return false;
2702
2703    return true;
2704  }
2705
2706  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
2707    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
2708      Features["vfp2"] = true;
2709    else if (CPU == "cortex-a8" || CPU == "cortex-a9")
2710      Features["neon"] = true;
2711  }
2712
2713  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2714                                 const std::string &Name,
2715                                 bool Enabled) const {
2716    if (Name == "soft-float" || Name == "soft-float-abi" ||
2717        Name == "vfp2" || Name == "vfp3" || Name == "neon" || Name == "d16") {
2718      Features[Name] = Enabled;
2719    } else
2720      return false;
2721
2722    return true;
2723  }
2724
2725  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2726    FPU = NoFPU;
2727    SoftFloat = SoftFloatABI = false;
2728    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
2729      if (Features[i] == "+soft-float")
2730        SoftFloat = true;
2731      else if (Features[i] == "+soft-float-abi")
2732        SoftFloatABI = true;
2733      else if (Features[i] == "+vfp2")
2734        FPU = VFP2FPU;
2735      else if (Features[i] == "+vfp3")
2736        FPU = VFP3FPU;
2737      else if (Features[i] == "+neon")
2738        FPU = NeonFPU;
2739    }
2740
2741    // Remove front-end specific options which the backend handles differently.
2742    std::vector<std::string>::iterator it;
2743    it = std::find(Features.begin(), Features.end(), "+soft-float");
2744    if (it != Features.end())
2745      Features.erase(it);
2746    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
2747    if (it != Features.end())
2748      Features.erase(it);
2749  }
2750
2751  virtual bool hasFeature(StringRef Feature) const {
2752    return llvm::StringSwitch<bool>(Feature)
2753        .Case("arm", true)
2754        .Case("softfloat", SoftFloat)
2755        .Case("thumb", IsThumb)
2756        .Case("neon", FPU == NeonFPU && !SoftFloat &&
2757              StringRef(getCPUDefineSuffix(CPU)).startswith("7"))
2758        .Default(false);
2759  }
2760  static const char *getCPUDefineSuffix(StringRef Name) {
2761    return llvm::StringSwitch<const char*>(Name)
2762      .Cases("arm8", "arm810", "4")
2763      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
2764      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
2765      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
2766      .Case("ep9312", "4T")
2767      .Cases("arm10tdmi", "arm1020t", "5T")
2768      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
2769      .Case("arm926ej-s", "5TEJ")
2770      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
2771      .Cases("xscale", "iwmmxt", "5TE")
2772      .Case("arm1136j-s", "6J")
2773      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
2774      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
2775      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
2776      .Cases("cortex-a8", "cortex-a9", "7A")
2777      .Case("cortex-m3", "7M")
2778      .Case("cortex-m0", "6M")
2779      .Default(0);
2780  }
2781  virtual bool setCPU(const std::string &Name) {
2782    if (!getCPUDefineSuffix(Name))
2783      return false;
2784
2785    CPU = Name;
2786    return true;
2787  }
2788  virtual void getTargetDefines(const LangOptions &Opts,
2789                                MacroBuilder &Builder) const {
2790    // Target identification.
2791    Builder.defineMacro("__arm");
2792    Builder.defineMacro("__arm__");
2793
2794    // Target properties.
2795    Builder.defineMacro("__ARMEL__");
2796    Builder.defineMacro("__LITTLE_ENDIAN__");
2797    Builder.defineMacro("__REGISTER_PREFIX__", "");
2798
2799    StringRef CPUArch = getCPUDefineSuffix(CPU);
2800    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
2801
2802    // Subtarget options.
2803
2804    // FIXME: It's more complicated than this and we don't really support
2805    // interworking.
2806    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
2807      Builder.defineMacro("__THUMB_INTERWORK__");
2808
2809    if (ABI == "aapcs" || ABI == "aapcs-linux")
2810      Builder.defineMacro("__ARM_EABI__");
2811
2812    if (SoftFloat)
2813      Builder.defineMacro("__SOFTFP__");
2814
2815    if (CPU == "xscale")
2816      Builder.defineMacro("__XSCALE__");
2817
2818    bool IsARMv7 = CPUArch.startswith("7");
2819    if (IsThumb) {
2820      Builder.defineMacro("__THUMBEL__");
2821      Builder.defineMacro("__thumb__");
2822      if (CPUArch == "6T2" || IsARMv7)
2823        Builder.defineMacro("__thumb2__");
2824    }
2825
2826    // Note, this is always on in gcc, even though it doesn't make sense.
2827    Builder.defineMacro("__APCS_32__");
2828
2829    if (FPUModeIsVFP((FPUMode) FPU))
2830      Builder.defineMacro("__VFP_FP__");
2831
2832    // This only gets set when Neon instructions are actually available, unlike
2833    // the VFP define, hence the soft float and arch check. This is subtly
2834    // different from gcc, we follow the intent which was that it should be set
2835    // when Neon instructions are actually available.
2836    if (FPU == NeonFPU && !SoftFloat && IsARMv7)
2837      Builder.defineMacro("__ARM_NEON__");
2838  }
2839  virtual void getTargetBuiltins(const Builtin::Info *&Records,
2840                                 unsigned &NumRecords) const {
2841    Records = BuiltinInfo;
2842    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
2843  }
2844  virtual bool isCLZForZeroUndef() const { return false; }
2845  virtual const char *getVAListDeclaration() const {
2846    return "typedef void* __builtin_va_list;";
2847  }
2848  virtual void getGCCRegNames(const char * const *&Names,
2849                              unsigned &NumNames) const;
2850  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2851                                unsigned &NumAliases) const;
2852  virtual bool validateAsmConstraint(const char *&Name,
2853                                     TargetInfo::ConstraintInfo &Info) const {
2854    // FIXME: Check if this is complete
2855    switch (*Name) {
2856    default:
2857    case 'l': // r0-r7
2858    case 'h': // r8-r15
2859    case 'w': // VFP Floating point register single precision
2860    case 'P': // VFP Floating point register double precision
2861      Info.setAllowsRegister();
2862      return true;
2863    case 'Q': // A memory address that is a single base register.
2864      Info.setAllowsMemory();
2865      return true;
2866    case 'U': // a memory reference...
2867      switch (Name[1]) {
2868      case 'q': // ...ARMV4 ldrsb
2869      case 'v': // ...VFP load/store (reg+constant offset)
2870      case 'y': // ...iWMMXt load/store
2871      case 't': // address valid for load/store opaque types wider
2872	        // than 128-bits
2873      case 'n': // valid address for Neon doubleword vector load/store
2874      case 'm': // valid address for Neon element and structure load/store
2875      case 's': // valid address for non-offset loads/stores of quad-word
2876	        // values in four ARM registers
2877        Info.setAllowsMemory();
2878        Name++;
2879        return true;
2880      }
2881    }
2882    return false;
2883  }
2884  virtual std::string convertConstraint(const char *&Constraint) const {
2885    std::string R;
2886    switch (*Constraint) {
2887    case 'U':   // Two-character constraint; add "^" hint for later parsing.
2888      R = std::string("^") + std::string(Constraint, 2);
2889      Constraint++;
2890      break;
2891    case 'p': // 'p' should be translated to 'r' by default.
2892      R = std::string("r");
2893      break;
2894    default:
2895      return std::string(1, *Constraint);
2896    }
2897    return R;
2898  }
2899  virtual const char *getClobbers() const {
2900    // FIXME: Is this really right?
2901    return "";
2902  }
2903};
2904
2905const char * const ARMTargetInfo::GCCRegNames[] = {
2906  // Integer registers
2907  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2908  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
2909
2910  // Float registers
2911  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
2912  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
2913  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
2914  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
2915
2916  // Double registers
2917  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
2918  "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
2919  "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
2920  "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
2921
2922  // Quad registers
2923  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
2924  "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
2925};
2926
2927void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
2928                                   unsigned &NumNames) const {
2929  Names = GCCRegNames;
2930  NumNames = llvm::array_lengthof(GCCRegNames);
2931}
2932
2933const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
2934  { { "a1" }, "r0" },
2935  { { "a2" }, "r1" },
2936  { { "a3" }, "r2" },
2937  { { "a4" }, "r3" },
2938  { { "v1" }, "r4" },
2939  { { "v2" }, "r5" },
2940  { { "v3" }, "r6" },
2941  { { "v4" }, "r7" },
2942  { { "v5" }, "r8" },
2943  { { "v6", "rfp" }, "r9" },
2944  { { "sl" }, "r10" },
2945  { { "fp" }, "r11" },
2946  { { "ip" }, "r12" },
2947  { { "r13" }, "sp" },
2948  { { "r14" }, "lr" },
2949  { { "r15" }, "pc" },
2950  // The S, D and Q registers overlap, but aren't really aliases; we
2951  // don't want to substitute one of these for a different-sized one.
2952};
2953
2954void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2955                                       unsigned &NumAliases) const {
2956  Aliases = GCCRegAliases;
2957  NumAliases = llvm::array_lengthof(GCCRegAliases);
2958}
2959
2960const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
2961#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
2962#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
2963                                              ALL_LANGUAGES },
2964#include "clang/Basic/BuiltinsARM.def"
2965};
2966} // end anonymous namespace.
2967
2968namespace {
2969class DarwinARMTargetInfo :
2970  public DarwinTargetInfo<ARMTargetInfo> {
2971protected:
2972  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2973                            MacroBuilder &Builder) const {
2974    getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
2975  }
2976
2977public:
2978  DarwinARMTargetInfo(const std::string& triple)
2979    : DarwinTargetInfo<ARMTargetInfo>(triple) {
2980    HasAlignMac68kSupport = true;
2981    // iOS always has 64-bit atomic instructions.
2982    // FIXME: This should be based off of the target features in ARMTargetInfo.
2983    MaxAtomicInlineWidth = 64;
2984  }
2985};
2986} // end anonymous namespace.
2987
2988
2989namespace {
2990// Hexagon abstract base class
2991class HexagonTargetInfo : public TargetInfo {
2992  static const Builtin::Info BuiltinInfo[];
2993  static const char * const GCCRegNames[];
2994  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2995  std::string CPU;
2996public:
2997  HexagonTargetInfo(const std::string& triple) : TargetInfo(triple)  {
2998    BigEndian = false;
2999    DescriptionString = ("e-p:32:32:32-"
3000                         "i64:64:64-i32:32:32-"
3001                         "i16:16:16-i1:32:32-a:0:0");
3002
3003    // {} in inline assembly are packet specifiers, not assembly variant
3004    // specifiers.
3005    NoAsmVariants = true;
3006  }
3007
3008  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3009                                 unsigned &NumRecords) const {
3010    Records = BuiltinInfo;
3011    NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
3012  }
3013
3014  virtual bool validateAsmConstraint(const char *&Name,
3015                                     TargetInfo::ConstraintInfo &Info) const {
3016    return true;
3017  }
3018
3019  virtual void getTargetDefines(const LangOptions &Opts,
3020                                MacroBuilder &Builder) const;
3021
3022  virtual bool hasFeature(StringRef Feature) const {
3023    return Feature == "hexagon";
3024  }
3025
3026  virtual const char *getVAListDeclaration() const {
3027    return "typedef char* __builtin_va_list;";
3028  }
3029  virtual void getGCCRegNames(const char * const *&Names,
3030                              unsigned &NumNames) const;
3031  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3032                                unsigned &NumAliases) const;
3033  virtual const char *getClobbers() const {
3034    return "";
3035  }
3036
3037  static const char *getHexagonCPUSuffix(StringRef Name) {
3038    return llvm::StringSwitch<const char*>(Name)
3039      .Case("hexagonv2", "2")
3040      .Case("hexagonv3", "3")
3041      .Case("hexagonv4", "4")
3042      .Default(0);
3043  }
3044
3045  virtual bool setCPU(const std::string &Name) {
3046    if (!getHexagonCPUSuffix(Name))
3047      return false;
3048
3049    CPU = Name;
3050    return true;
3051  }
3052};
3053
3054void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
3055                                MacroBuilder &Builder) const {
3056  Builder.defineMacro("qdsp6");
3057  Builder.defineMacro("__qdsp6", "1");
3058  Builder.defineMacro("__qdsp6__", "1");
3059
3060  Builder.defineMacro("hexagon");
3061  Builder.defineMacro("__hexagon", "1");
3062  Builder.defineMacro("__hexagon__", "1");
3063
3064  if(CPU == "hexagonv1") {
3065    Builder.defineMacro("__HEXAGON_V1__");
3066    Builder.defineMacro("__HEXAGON_ARCH__", "1");
3067    if(Opts.HexagonQdsp6Compat) {
3068      Builder.defineMacro("__QDSP6_V1__");
3069      Builder.defineMacro("__QDSP6_ARCH__", "1");
3070    }
3071  }
3072  else if(CPU == "hexagonv2") {
3073    Builder.defineMacro("__HEXAGON_V2__");
3074    Builder.defineMacro("__HEXAGON_ARCH__", "2");
3075    if(Opts.HexagonQdsp6Compat) {
3076      Builder.defineMacro("__QDSP6_V2__");
3077      Builder.defineMacro("__QDSP6_ARCH__", "2");
3078    }
3079  }
3080  else if(CPU == "hexagonv3") {
3081    Builder.defineMacro("__HEXAGON_V3__");
3082    Builder.defineMacro("__HEXAGON_ARCH__", "3");
3083    if(Opts.HexagonQdsp6Compat) {
3084      Builder.defineMacro("__QDSP6_V3__");
3085      Builder.defineMacro("__QDSP6_ARCH__", "3");
3086    }
3087  }
3088  else if(CPU == "hexagonv4") {
3089    Builder.defineMacro("__HEXAGON_V4__");
3090    Builder.defineMacro("__HEXAGON_ARCH__", "4");
3091    if(Opts.HexagonQdsp6Compat) {
3092      Builder.defineMacro("__QDSP6_V4__");
3093      Builder.defineMacro("__QDSP6_ARCH__", "4");
3094    }
3095  }
3096}
3097
3098const char * const HexagonTargetInfo::GCCRegNames[] = {
3099  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3100  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3101  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3102  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3103  "p0", "p1", "p2", "p3",
3104  "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3105};
3106
3107void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3108                                   unsigned &NumNames) const {
3109  Names = GCCRegNames;
3110  NumNames = llvm::array_lengthof(GCCRegNames);
3111}
3112
3113
3114const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3115  { { "sp" }, "r29" },
3116  { { "fp" }, "r30" },
3117  { { "lr" }, "r31" },
3118 };
3119
3120void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3121                                     unsigned &NumAliases) const {
3122  Aliases = GCCRegAliases;
3123  NumAliases = llvm::array_lengthof(GCCRegAliases);
3124}
3125
3126
3127const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3128#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3129#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3130                                              ALL_LANGUAGES },
3131#include "clang/Basic/BuiltinsHexagon.def"
3132};
3133}
3134
3135
3136namespace {
3137class SparcV8TargetInfo : public TargetInfo {
3138  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3139  static const char * const GCCRegNames[];
3140  bool SoftFloat;
3141public:
3142  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3143    // FIXME: Support Sparc quad-precision long double?
3144    BigEndian = false;
3145    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3146                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3147  }
3148  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3149                                 const std::string &Name,
3150                                 bool Enabled) const {
3151    if (Name == "soft-float")
3152      Features[Name] = Enabled;
3153    else
3154      return false;
3155
3156    return true;
3157  }
3158  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3159    SoftFloat = false;
3160    for (unsigned i = 0, e = Features.size(); i != e; ++i)
3161      if (Features[i] == "+soft-float")
3162        SoftFloat = true;
3163  }
3164  virtual void getTargetDefines(const LangOptions &Opts,
3165                                MacroBuilder &Builder) const {
3166    DefineStd(Builder, "sparc", Opts);
3167    Builder.defineMacro("__sparcv8");
3168    Builder.defineMacro("__REGISTER_PREFIX__", "");
3169
3170    if (SoftFloat)
3171      Builder.defineMacro("SOFT_FLOAT", "1");
3172  }
3173
3174  virtual bool hasFeature(StringRef Feature) const {
3175    return llvm::StringSwitch<bool>(Feature)
3176             .Case("softfloat", SoftFloat)
3177             .Case("sparc", true)
3178             .Default(false);
3179  }
3180
3181  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3182                                 unsigned &NumRecords) const {
3183    // FIXME: Implement!
3184  }
3185  virtual const char *getVAListDeclaration() const {
3186    return "typedef void* __builtin_va_list;";
3187  }
3188  virtual void getGCCRegNames(const char * const *&Names,
3189                              unsigned &NumNames) const;
3190  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3191                                unsigned &NumAliases) const;
3192  virtual bool validateAsmConstraint(const char *&Name,
3193                                     TargetInfo::ConstraintInfo &info) const {
3194    // FIXME: Implement!
3195    return false;
3196  }
3197  virtual const char *getClobbers() const {
3198    // FIXME: Implement!
3199    return "";
3200  }
3201};
3202
3203const char * const SparcV8TargetInfo::GCCRegNames[] = {
3204  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3205  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3206  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3207  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3208};
3209
3210void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3211                                       unsigned &NumNames) const {
3212  Names = GCCRegNames;
3213  NumNames = llvm::array_lengthof(GCCRegNames);
3214}
3215
3216const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3217  { { "g0" }, "r0" },
3218  { { "g1" }, "r1" },
3219  { { "g2" }, "r2" },
3220  { { "g3" }, "r3" },
3221  { { "g4" }, "r4" },
3222  { { "g5" }, "r5" },
3223  { { "g6" }, "r6" },
3224  { { "g7" }, "r7" },
3225  { { "o0" }, "r8" },
3226  { { "o1" }, "r9" },
3227  { { "o2" }, "r10" },
3228  { { "o3" }, "r11" },
3229  { { "o4" }, "r12" },
3230  { { "o5" }, "r13" },
3231  { { "o6", "sp" }, "r14" },
3232  { { "o7" }, "r15" },
3233  { { "l0" }, "r16" },
3234  { { "l1" }, "r17" },
3235  { { "l2" }, "r18" },
3236  { { "l3" }, "r19" },
3237  { { "l4" }, "r20" },
3238  { { "l5" }, "r21" },
3239  { { "l6" }, "r22" },
3240  { { "l7" }, "r23" },
3241  { { "i0" }, "r24" },
3242  { { "i1" }, "r25" },
3243  { { "i2" }, "r26" },
3244  { { "i3" }, "r27" },
3245  { { "i4" }, "r28" },
3246  { { "i5" }, "r29" },
3247  { { "i6", "fp" }, "r30" },
3248  { { "i7" }, "r31" },
3249};
3250
3251void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3252                                         unsigned &NumAliases) const {
3253  Aliases = GCCRegAliases;
3254  NumAliases = llvm::array_lengthof(GCCRegAliases);
3255}
3256} // end anonymous namespace.
3257
3258namespace {
3259class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3260public:
3261  AuroraUXSparcV8TargetInfo(const std::string& triple) :
3262      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3263    SizeType = UnsignedInt;
3264    PtrDiffType = SignedInt;
3265  }
3266};
3267class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3268public:
3269  SolarisSparcV8TargetInfo(const std::string& triple) :
3270      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3271    SizeType = UnsignedInt;
3272    PtrDiffType = SignedInt;
3273  }
3274};
3275} // end anonymous namespace.
3276
3277namespace {
3278  class MSP430TargetInfo : public TargetInfo {
3279    static const char * const GCCRegNames[];
3280  public:
3281    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3282      BigEndian = false;
3283      TLSSupported = false;
3284      IntWidth = 16; IntAlign = 16;
3285      LongWidth = 32; LongLongWidth = 64;
3286      LongAlign = LongLongAlign = 16;
3287      PointerWidth = 16; PointerAlign = 16;
3288      SuitableAlign = 16;
3289      SizeType = UnsignedInt;
3290      IntMaxType = SignedLong;
3291      UIntMaxType = UnsignedLong;
3292      IntPtrType = SignedShort;
3293      PtrDiffType = SignedInt;
3294      SigAtomicType = SignedLong;
3295      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3296   }
3297    virtual void getTargetDefines(const LangOptions &Opts,
3298                                  MacroBuilder &Builder) const {
3299      Builder.defineMacro("MSP430");
3300      Builder.defineMacro("__MSP430__");
3301      // FIXME: defines for different 'flavours' of MCU
3302    }
3303    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3304                                   unsigned &NumRecords) const {
3305     // FIXME: Implement.
3306      Records = 0;
3307      NumRecords = 0;
3308    }
3309    virtual bool hasFeature(StringRef Feature) const {
3310      return Feature == "msp430";
3311    }
3312    virtual void getGCCRegNames(const char * const *&Names,
3313                                unsigned &NumNames) const;
3314    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3315                                  unsigned &NumAliases) const {
3316      // No aliases.
3317      Aliases = 0;
3318      NumAliases = 0;
3319    }
3320    virtual bool validateAsmConstraint(const char *&Name,
3321                                       TargetInfo::ConstraintInfo &info) const {
3322      // No target constraints for now.
3323      return false;
3324    }
3325    virtual const char *getClobbers() const {
3326      // FIXME: Is this really right?
3327      return "";
3328    }
3329    virtual const char *getVAListDeclaration() const {
3330      // FIXME: implement
3331      return "typedef char* __builtin_va_list;";
3332   }
3333  };
3334
3335  const char * const MSP430TargetInfo::GCCRegNames[] = {
3336    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3337    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3338  };
3339
3340  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3341                                        unsigned &NumNames) const {
3342    Names = GCCRegNames;
3343    NumNames = llvm::array_lengthof(GCCRegNames);
3344  }
3345}
3346
3347namespace {
3348
3349  // LLVM and Clang cannot be used directly to output native binaries for
3350  // target, but is used to compile C code to llvm bitcode with correct
3351  // type and alignment information.
3352  //
3353  // TCE uses the llvm bitcode as input and uses it for generating customized
3354  // target processor and program binary. TCE co-design environment is
3355  // publicly available in http://tce.cs.tut.fi
3356
3357  static const unsigned TCEOpenCLAddrSpaceMap[] = {
3358      3, // opencl_global
3359      4, // opencl_local
3360      5  // opencl_constant
3361  };
3362
3363  class TCETargetInfo : public TargetInfo{
3364  public:
3365    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3366      TLSSupported = false;
3367      IntWidth = 32;
3368      LongWidth = LongLongWidth = 32;
3369      PointerWidth = 32;
3370      IntAlign = 32;
3371      LongAlign = LongLongAlign = 32;
3372      PointerAlign = 32;
3373      SuitableAlign = 32;
3374      SizeType = UnsignedInt;
3375      IntMaxType = SignedLong;
3376      UIntMaxType = UnsignedLong;
3377      IntPtrType = SignedInt;
3378      PtrDiffType = SignedInt;
3379      FloatWidth = 32;
3380      FloatAlign = 32;
3381      DoubleWidth = 32;
3382      DoubleAlign = 32;
3383      LongDoubleWidth = 32;
3384      LongDoubleAlign = 32;
3385      FloatFormat = &llvm::APFloat::IEEEsingle;
3386      DoubleFormat = &llvm::APFloat::IEEEsingle;
3387      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3388      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3389                          "i16:16:32-i32:32:32-i64:32:32-"
3390                          "f32:32:32-f64:32:32-v64:32:32-"
3391                          "v128:32:32-a0:0:32-n32";
3392      AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3393    }
3394
3395    virtual void getTargetDefines(const LangOptions &Opts,
3396                                  MacroBuilder &Builder) const {
3397      DefineStd(Builder, "tce", Opts);
3398      Builder.defineMacro("__TCE__");
3399      Builder.defineMacro("__TCE_V1__");
3400    }
3401    virtual bool hasFeature(StringRef Feature) const {
3402      return Feature == "tce";
3403    }
3404
3405    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3406                                   unsigned &NumRecords) const {}
3407    virtual const char *getClobbers() const {
3408      return "";
3409    }
3410    virtual const char *getVAListDeclaration() const {
3411      return "typedef void* __builtin_va_list;";
3412    }
3413    virtual void getGCCRegNames(const char * const *&Names,
3414                                unsigned &NumNames) const {}
3415    virtual bool validateAsmConstraint(const char *&Name,
3416                                       TargetInfo::ConstraintInfo &info) const {
3417      return true;
3418    }
3419    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3420                                  unsigned &NumAliases) const {}
3421  };
3422}
3423
3424namespace {
3425class MipsTargetInfoBase : public TargetInfo {
3426  std::string CPU;
3427protected:
3428  std::string ABI;
3429public:
3430  MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr)
3431    : TargetInfo(triple), ABI(ABIStr) {}
3432  virtual const char *getABI() const { return ABI.c_str(); }
3433  virtual bool setABI(const std::string &Name) = 0;
3434  virtual bool setCPU(const std::string &Name) {
3435    CPU = Name;
3436    return true;
3437  }
3438  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3439    Features[ABI] = true;
3440    Features[CPU] = true;
3441  }
3442  virtual void getArchDefines(const LangOptions &Opts,
3443                              MacroBuilder &Builder) const = 0;
3444  virtual void getTargetDefines(const LangOptions &Opts,
3445                                MacroBuilder &Builder) const = 0;
3446  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3447                                 unsigned &NumRecords) const {
3448    // FIXME: Implement!
3449  }
3450  virtual bool hasFeature(StringRef Feature) const {
3451    return Feature == "mips";
3452  }
3453  virtual const char *getVAListDeclaration() const {
3454    return "typedef void* __builtin_va_list;";
3455  }
3456  virtual void getGCCRegNames(const char * const *&Names,
3457                              unsigned &NumNames) const {
3458    static const char * const GCCRegNames[] = {
3459      "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
3460      "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
3461      "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
3462      "$24",  "$25",  "$26",  "$27",  "$28",  "$sp",  "$fp",  "$31",
3463      "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
3464      "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
3465      "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
3466      "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
3467      "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
3468      "$fcc5","$fcc6","$fcc7"
3469    };
3470    Names = GCCRegNames;
3471    NumNames = llvm::array_lengthof(GCCRegNames);
3472  }
3473  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3474                                unsigned &NumAliases) const = 0;
3475  virtual bool validateAsmConstraint(const char *&Name,
3476                                     TargetInfo::ConstraintInfo &Info) const {
3477    switch (*Name) {
3478    default:
3479      return false;
3480
3481    case 'r': // CPU registers.
3482    case 'd': // Equivalent to "r" unless generating MIPS16 code.
3483    case 'y': // Equivalent to "r", backwards compatibility only.
3484    case 'f': // floating-point registers.
3485      Info.setAllowsRegister();
3486      return true;
3487    }
3488  }
3489
3490  virtual const char *getClobbers() const {
3491    // FIXME: Implement!
3492    return "";
3493  }
3494};
3495
3496class Mips32TargetInfoBase : public MipsTargetInfoBase {
3497public:
3498  Mips32TargetInfoBase(const std::string& triple) :
3499    MipsTargetInfoBase(triple, "o32") {
3500    SizeType = UnsignedInt;
3501    PtrDiffType = SignedInt;
3502  }
3503  virtual bool setABI(const std::string &Name) {
3504    if ((Name == "o32") || (Name == "eabi")) {
3505      ABI = Name;
3506      return true;
3507    } else
3508      return false;
3509  }
3510  virtual void getArchDefines(const LangOptions &Opts,
3511                              MacroBuilder &Builder) const {
3512    Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
3513    Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
3514    Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
3515
3516    if (ABI == "o32") {
3517      Builder.defineMacro("__mips_o32");
3518      Builder.defineMacro("_ABIO32", "1");
3519      Builder.defineMacro("_MIPS_SIM", "_ABIO32");
3520    }
3521    else if (ABI == "eabi")
3522      Builder.defineMacro("__mips_eabi");
3523    else
3524      llvm_unreachable("Invalid ABI for Mips32.");
3525  }
3526  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3527                                unsigned &NumAliases) const {
3528    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3529      { { "at" },  "$1" },
3530      { { "v0" },  "$2" },
3531      { { "v1" },  "$3" },
3532      { { "a0" },  "$4" },
3533      { { "a1" },  "$5" },
3534      { { "a2" },  "$6" },
3535      { { "a3" },  "$7" },
3536      { { "t0" },  "$8" },
3537      { { "t1" },  "$9" },
3538      { { "t2" }, "$10" },
3539      { { "t3" }, "$11" },
3540      { { "t4" }, "$12" },
3541      { { "t5" }, "$13" },
3542      { { "t6" }, "$14" },
3543      { { "t7" }, "$15" },
3544      { { "s0" }, "$16" },
3545      { { "s1" }, "$17" },
3546      { { "s2" }, "$18" },
3547      { { "s3" }, "$19" },
3548      { { "s4" }, "$20" },
3549      { { "s5" }, "$21" },
3550      { { "s6" }, "$22" },
3551      { { "s7" }, "$23" },
3552      { { "t8" }, "$24" },
3553      { { "t9" }, "$25" },
3554      { { "k0" }, "$26" },
3555      { { "k1" }, "$27" },
3556      { { "gp" }, "$28" },
3557      { { "sp" }, "$29" },
3558      { { "fp" }, "$30" },
3559      { { "ra" }, "$31" }
3560    };
3561    Aliases = GCCRegAliases;
3562    NumAliases = llvm::array_lengthof(GCCRegAliases);
3563  }
3564};
3565
3566class Mips32EBTargetInfo : public Mips32TargetInfoBase {
3567public:
3568  Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3569    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3570                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3571  }
3572  virtual void getTargetDefines(const LangOptions &Opts,
3573                                MacroBuilder &Builder) const {
3574    DefineStd(Builder, "mips", Opts);
3575    Builder.defineMacro("_mips");
3576    DefineStd(Builder, "MIPSEB", Opts);
3577    Builder.defineMacro("_MIPSEB");
3578    Builder.defineMacro("__REGISTER_PREFIX__", "");
3579    getArchDefines(Opts, Builder);
3580  }
3581};
3582
3583class Mips32ELTargetInfo : public Mips32TargetInfoBase {
3584public:
3585  Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3586    BigEndian = false;
3587    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3588                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3589  }
3590  virtual void getTargetDefines(const LangOptions &Opts,
3591                                MacroBuilder &Builder) const {
3592    DefineStd(Builder, "mips", Opts);
3593    Builder.defineMacro("_mips");
3594    DefineStd(Builder, "MIPSEL", Opts);
3595    Builder.defineMacro("_MIPSEL");
3596    Builder.defineMacro("__REGISTER_PREFIX__", "");
3597    getArchDefines(Opts, Builder);
3598  }
3599};
3600
3601class Mips64TargetInfoBase : public MipsTargetInfoBase {
3602  virtual void SetDescriptionString(const std::string &Name) = 0;
3603public:
3604  Mips64TargetInfoBase(const std::string& triple) :
3605    MipsTargetInfoBase(triple, "n64") {
3606    LongWidth = LongAlign = 64;
3607    PointerWidth = PointerAlign = 64;
3608    LongDoubleWidth = LongDoubleAlign = 128;
3609    LongDoubleFormat = &llvm::APFloat::IEEEquad;
3610    SuitableAlign = 128;
3611  }
3612  virtual bool setABI(const std::string &Name) {
3613    SetDescriptionString(Name);
3614
3615    if (Name != "n32" && Name != "n64")
3616      return false;
3617
3618    ABI = Name;
3619
3620    if (Name == "n32") {
3621      LongWidth = LongAlign = 32;
3622      PointerWidth = PointerAlign = 32;
3623    }
3624
3625    return true;
3626  }
3627  virtual void getArchDefines(const LangOptions &Opts,
3628                              MacroBuilder &Builder) const {
3629    if (ABI == "n32") {
3630      Builder.defineMacro("__mips_n32");
3631      Builder.defineMacro("_ABIN32", "2");
3632      Builder.defineMacro("_MIPS_SIM", "_ABIN32");
3633    }
3634    else if (ABI == "n64") {
3635      Builder.defineMacro("__mips_n64");
3636      Builder.defineMacro("_ABI64", "3");
3637      Builder.defineMacro("_MIPS_SIM", "_ABI64");
3638    }
3639    else
3640      llvm_unreachable("Invalid ABI for Mips64.");
3641  }
3642  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3643                                unsigned &NumAliases) const {
3644    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3645      { { "at" },  "$1" },
3646      { { "v0" },  "$2" },
3647      { { "v1" },  "$3" },
3648      { { "a0" },  "$4" },
3649      { { "a1" },  "$5" },
3650      { { "a2" },  "$6" },
3651      { { "a3" },  "$7" },
3652      { { "a4" },  "$8" },
3653      { { "a5" },  "$9" },
3654      { { "a6" }, "$10" },
3655      { { "a7" }, "$11" },
3656      { { "t0" }, "$12" },
3657      { { "t1" }, "$13" },
3658      { { "t2" }, "$14" },
3659      { { "t3" }, "$15" },
3660      { { "s0" }, "$16" },
3661      { { "s1" }, "$17" },
3662      { { "s2" }, "$18" },
3663      { { "s3" }, "$19" },
3664      { { "s4" }, "$20" },
3665      { { "s5" }, "$21" },
3666      { { "s6" }, "$22" },
3667      { { "s7" }, "$23" },
3668      { { "t8" }, "$24" },
3669      { { "t9" }, "$25" },
3670      { { "k0" }, "$26" },
3671      { { "k1" }, "$27" },
3672      { { "gp" }, "$28" },
3673      { { "sp" }, "$29" },
3674      { { "fp" }, "$30" },
3675      { { "ra" }, "$31" }
3676    };
3677    Aliases = GCCRegAliases;
3678    NumAliases = llvm::array_lengthof(GCCRegAliases);
3679  }
3680};
3681
3682class Mips64EBTargetInfo : public Mips64TargetInfoBase {
3683  virtual void SetDescriptionString(const std::string &Name) {
3684    // Change DescriptionString only if ABI is n32.
3685    if (Name == "n32")
3686      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3687                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3688                          "v64:64:64-n32";
3689  }
3690public:
3691  Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3692    // Default ABI is n64.
3693    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3694                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3695                        "v64:64:64-n32";
3696  }
3697  virtual void getTargetDefines(const LangOptions &Opts,
3698                                MacroBuilder &Builder) const {
3699    DefineStd(Builder, "mips", Opts);
3700    Builder.defineMacro("_mips");
3701    DefineStd(Builder, "MIPSEB", Opts);
3702    Builder.defineMacro("_MIPSEB");
3703    Builder.defineMacro("__REGISTER_PREFIX__", "");
3704    getArchDefines(Opts, Builder);
3705  }
3706};
3707
3708class Mips64ELTargetInfo : public Mips64TargetInfoBase {
3709  virtual void SetDescriptionString(const std::string &Name) {
3710    // Change DescriptionString only if ABI is n32.
3711    if (Name == "n32")
3712      DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3713                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
3714                          "-v64:64:64-n32";
3715  }
3716public:
3717  Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3718    // Default ABI is n64.
3719    BigEndian = false;
3720    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3721                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3722                        "v64:64:64-n32";
3723  }
3724  virtual void getTargetDefines(const LangOptions &Opts,
3725                                MacroBuilder &Builder) const {
3726    DefineStd(Builder, "mips", Opts);
3727    Builder.defineMacro("_mips");
3728    DefineStd(Builder, "MIPSEL", Opts);
3729    Builder.defineMacro("_MIPSEL");
3730    Builder.defineMacro("__REGISTER_PREFIX__", "");
3731    getArchDefines(Opts, Builder);
3732  }
3733};
3734} // end anonymous namespace.
3735
3736namespace {
3737class PNaClTargetInfo : public TargetInfo {
3738public:
3739  PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
3740    BigEndian = false;
3741    this->UserLabelPrefix = "";
3742    this->LongAlign = 32;
3743    this->LongWidth = 32;
3744    this->PointerAlign = 32;
3745    this->PointerWidth = 32;
3746    this->IntMaxType = TargetInfo::SignedLongLong;
3747    this->UIntMaxType = TargetInfo::UnsignedLongLong;
3748    this->Int64Type = TargetInfo::SignedLongLong;
3749    this->DoubleAlign = 64;
3750    this->LongDoubleWidth = 64;
3751    this->LongDoubleAlign = 64;
3752    this->SizeType = TargetInfo::UnsignedInt;
3753    this->PtrDiffType = TargetInfo::SignedInt;
3754    this->IntPtrType = TargetInfo::SignedInt;
3755    this->RegParmMax = 2;
3756    DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
3757                        "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
3758  }
3759
3760  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3761  }
3762  virtual void getArchDefines(const LangOptions &Opts,
3763                              MacroBuilder &Builder) const {
3764    Builder.defineMacro("__le32__");
3765    Builder.defineMacro("__pnacl__");
3766  }
3767  virtual void getTargetDefines(const LangOptions &Opts,
3768                                MacroBuilder &Builder) const {
3769    DefineStd(Builder, "unix", Opts);
3770    Builder.defineMacro("__ELF__");
3771    if (Opts.POSIXThreads)
3772      Builder.defineMacro("_REENTRANT");
3773    if (Opts.CPlusPlus)
3774      Builder.defineMacro("_GNU_SOURCE");
3775
3776    Builder.defineMacro("__native_client__");
3777    getArchDefines(Opts, Builder);
3778  }
3779  virtual bool hasFeature(StringRef Feature) const {
3780    return Feature == "pnacl";
3781  }
3782  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3783                                 unsigned &NumRecords) const {
3784  }
3785  virtual const char *getVAListDeclaration() const {
3786    return "typedef int __builtin_va_list[4];";
3787  }
3788  virtual void getGCCRegNames(const char * const *&Names,
3789                              unsigned &NumNames) const;
3790  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3791                                unsigned &NumAliases) const;
3792  virtual bool validateAsmConstraint(const char *&Name,
3793                                     TargetInfo::ConstraintInfo &Info) const {
3794    return false;
3795  }
3796
3797  virtual const char *getClobbers() const {
3798    return "";
3799  }
3800};
3801
3802void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
3803                                     unsigned &NumNames) const {
3804  Names = NULL;
3805  NumNames = 0;
3806}
3807
3808void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3809                                       unsigned &NumAliases) const {
3810  Aliases = NULL;
3811  NumAliases = 0;
3812}
3813} // end anonymous namespace.
3814
3815
3816//===----------------------------------------------------------------------===//
3817// Driver code
3818//===----------------------------------------------------------------------===//
3819
3820static TargetInfo *AllocateTarget(const std::string &T) {
3821  llvm::Triple Triple(T);
3822  llvm::Triple::OSType os = Triple.getOS();
3823
3824  switch (Triple.getArch()) {
3825  default:
3826    return NULL;
3827
3828  case llvm::Triple::hexagon:
3829    return new HexagonTargetInfo(T);
3830
3831  case llvm::Triple::arm:
3832  case llvm::Triple::thumb:
3833    if (Triple.isOSDarwin())
3834      return new DarwinARMTargetInfo(T);
3835
3836    switch (os) {
3837    case llvm::Triple::Linux:
3838      return new LinuxTargetInfo<ARMTargetInfo>(T);
3839    case llvm::Triple::FreeBSD:
3840      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
3841    case llvm::Triple::NetBSD:
3842      return new NetBSDTargetInfo<ARMTargetInfo>(T);
3843    case llvm::Triple::RTEMS:
3844      return new RTEMSTargetInfo<ARMTargetInfo>(T);
3845    default:
3846      return new ARMTargetInfo(T);
3847    }
3848
3849  case llvm::Triple::msp430:
3850    return new MSP430TargetInfo(T);
3851
3852  case llvm::Triple::mips:
3853    switch (os) {
3854    case llvm::Triple::Linux:
3855      return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
3856    case llvm::Triple::RTEMS:
3857      return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
3858    case llvm::Triple::FreeBSD:
3859      return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
3860    case llvm::Triple::NetBSD:
3861      return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
3862    default:
3863      return new Mips32EBTargetInfo(T);
3864    }
3865
3866  case llvm::Triple::mipsel:
3867    switch (os) {
3868    case llvm::Triple::Linux:
3869      return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
3870    case llvm::Triple::RTEMS:
3871      return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
3872    case llvm::Triple::FreeBSD:
3873      return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
3874    case llvm::Triple::NetBSD:
3875      return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
3876    default:
3877      return new Mips32ELTargetInfo(T);
3878    }
3879
3880  case llvm::Triple::mips64:
3881    switch (os) {
3882    case llvm::Triple::Linux:
3883      return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
3884    case llvm::Triple::RTEMS:
3885      return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
3886    case llvm::Triple::FreeBSD:
3887      return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
3888    case llvm::Triple::NetBSD:
3889      return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
3890    default:
3891      return new Mips64EBTargetInfo(T);
3892    }
3893
3894  case llvm::Triple::mips64el:
3895    switch (os) {
3896    case llvm::Triple::Linux:
3897      return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
3898    case llvm::Triple::RTEMS:
3899      return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
3900    case llvm::Triple::FreeBSD:
3901      return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
3902    case llvm::Triple::NetBSD:
3903      return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
3904    default:
3905      return new Mips64ELTargetInfo(T);
3906    }
3907
3908  case llvm::Triple::le32:
3909    switch (os) {
3910      case llvm::Triple::NativeClient:
3911        return new PNaClTargetInfo(T);
3912      default:
3913        return NULL;
3914    }
3915
3916  case llvm::Triple::ppc:
3917    if (Triple.isOSDarwin())
3918      return new DarwinPPC32TargetInfo(T);
3919    switch (os) {
3920    case llvm::Triple::Linux:
3921      return new LinuxTargetInfo<PPC32TargetInfo>(T);
3922    case llvm::Triple::FreeBSD:
3923      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
3924    case llvm::Triple::NetBSD:
3925      return new NetBSDTargetInfo<PPC32TargetInfo>(T);
3926    case llvm::Triple::RTEMS:
3927      return new RTEMSTargetInfo<PPC32TargetInfo>(T);
3928    default:
3929      return new PPC32TargetInfo(T);
3930    }
3931
3932  case llvm::Triple::ppc64:
3933    if (Triple.isOSDarwin())
3934      return new DarwinPPC64TargetInfo(T);
3935    switch (os) {
3936    case llvm::Triple::Linux:
3937      return new LinuxTargetInfo<PPC64TargetInfo>(T);
3938    case llvm::Triple::Lv2:
3939      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
3940    case llvm::Triple::FreeBSD:
3941      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
3942    case llvm::Triple::NetBSD:
3943      return new NetBSDTargetInfo<PPC64TargetInfo>(T);
3944    default:
3945      return new PPC64TargetInfo(T);
3946    }
3947
3948  case llvm::Triple::ptx32:
3949    return new PTX32TargetInfo(T);
3950  case llvm::Triple::ptx64:
3951    return new PTX64TargetInfo(T);
3952
3953  case llvm::Triple::mblaze:
3954    return new MBlazeTargetInfo(T);
3955
3956  case llvm::Triple::sparc:
3957    switch (os) {
3958    case llvm::Triple::Linux:
3959      return new LinuxTargetInfo<SparcV8TargetInfo>(T);
3960    case llvm::Triple::AuroraUX:
3961      return new AuroraUXSparcV8TargetInfo(T);
3962    case llvm::Triple::Solaris:
3963      return new SolarisSparcV8TargetInfo(T);
3964    case llvm::Triple::NetBSD:
3965      return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
3966    case llvm::Triple::RTEMS:
3967      return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
3968    default:
3969      return new SparcV8TargetInfo(T);
3970    }
3971
3972  // FIXME: Need a real SPU target.
3973  case llvm::Triple::cellspu:
3974    return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
3975
3976  case llvm::Triple::tce:
3977    return new TCETargetInfo(T);
3978
3979  case llvm::Triple::x86:
3980    if (Triple.isOSDarwin())
3981      return new DarwinI386TargetInfo(T);
3982
3983    switch (os) {
3984    case llvm::Triple::AuroraUX:
3985      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
3986    case llvm::Triple::Linux:
3987      return new LinuxTargetInfo<X86_32TargetInfo>(T);
3988    case llvm::Triple::DragonFly:
3989      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
3990    case llvm::Triple::NetBSD:
3991      return new NetBSDI386TargetInfo(T);
3992    case llvm::Triple::OpenBSD:
3993      return new OpenBSDI386TargetInfo(T);
3994    case llvm::Triple::FreeBSD:
3995      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
3996    case llvm::Triple::Minix:
3997      return new MinixTargetInfo<X86_32TargetInfo>(T);
3998    case llvm::Triple::Solaris:
3999      return new SolarisTargetInfo<X86_32TargetInfo>(T);
4000    case llvm::Triple::Cygwin:
4001      return new CygwinX86_32TargetInfo(T);
4002    case llvm::Triple::MinGW32:
4003      return new MinGWX86_32TargetInfo(T);
4004    case llvm::Triple::Win32:
4005      return new VisualStudioWindowsX86_32TargetInfo(T);
4006    case llvm::Triple::Haiku:
4007      return new HaikuX86_32TargetInfo(T);
4008    case llvm::Triple::RTEMS:
4009      return new RTEMSX86_32TargetInfo(T);
4010    default:
4011      return new X86_32TargetInfo(T);
4012    }
4013
4014  case llvm::Triple::x86_64:
4015    if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
4016      return new DarwinX86_64TargetInfo(T);
4017
4018    switch (os) {
4019    case llvm::Triple::AuroraUX:
4020      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
4021    case llvm::Triple::Linux:
4022      return new LinuxTargetInfo<X86_64TargetInfo>(T);
4023    case llvm::Triple::DragonFly:
4024      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
4025    case llvm::Triple::NetBSD:
4026      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
4027    case llvm::Triple::OpenBSD:
4028      return new OpenBSDX86_64TargetInfo(T);
4029    case llvm::Triple::FreeBSD:
4030      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
4031    case llvm::Triple::Solaris:
4032      return new SolarisTargetInfo<X86_64TargetInfo>(T);
4033    case llvm::Triple::MinGW32:
4034      return new MinGWX86_64TargetInfo(T);
4035    case llvm::Triple::Win32:   // This is what Triple.h supports now.
4036      return new VisualStudioWindowsX86_64TargetInfo(T);
4037    default:
4038      return new X86_64TargetInfo(T);
4039    }
4040  }
4041}
4042
4043/// CreateTargetInfo - Return the target info object for the specified target
4044/// triple.
4045TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
4046                                         TargetOptions &Opts) {
4047  llvm::Triple Triple(Opts.Triple);
4048
4049  // Construct the target
4050  OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
4051  if (!Target) {
4052    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
4053    return 0;
4054  }
4055
4056  // Set the target CPU if specified.
4057  if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
4058    Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
4059    return 0;
4060  }
4061
4062  // Set the target ABI if specified.
4063  if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
4064    Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
4065    return 0;
4066  }
4067
4068  // Set the target C++ ABI.
4069  if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
4070    Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
4071    return 0;
4072  }
4073
4074  // Compute the default target features, we need the target to handle this
4075  // because features may have dependencies on one another.
4076  llvm::StringMap<bool> Features;
4077  Target->getDefaultFeatures(Features);
4078
4079  // Apply the user specified deltas.
4080  // First the enables.
4081  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4082         ie = Opts.Features.end(); it != ie; ++it) {
4083    const char *Name = it->c_str();
4084
4085    if (Name[0] != '+')
4086      continue;
4087
4088    // Apply the feature via the target.
4089    if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
4090      Diags.Report(diag::err_target_invalid_feature) << Name;
4091      return 0;
4092    }
4093  }
4094
4095  // Then the disables.
4096  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4097         ie = Opts.Features.end(); it != ie; ++it) {
4098    const char *Name = it->c_str();
4099
4100    if (Name[0] == '+')
4101      continue;
4102
4103    // Apply the feature via the target.
4104    if (Name[0] != '-' ||
4105        !Target->setFeatureEnabled(Features, Name + 1, false)) {
4106      Diags.Report(diag::err_target_invalid_feature) << Name;
4107      return 0;
4108    }
4109  }
4110
4111  // Add the features to the compile options.
4112  //
4113  // FIXME: If we are completely confident that we have the right set, we only
4114  // need to pass the minuses.
4115  Opts.Features.clear();
4116  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
4117         ie = Features.end(); it != ie; ++it)
4118    Opts.Features.push_back(std::string(it->second ? "+" : "-") +
4119                            it->first().str());
4120  Target->HandleTargetFeatures(Opts.Features);
4121
4122  return Target.take();
4123}
4124