Targets.cpp revision 20249a1af2e462dcafdd6a350f1c7967b264ff25
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include <algorithm>
30using namespace clang;
31
32//===----------------------------------------------------------------------===//
33//  Common code shared among targets.
34//===----------------------------------------------------------------------===//
35
36/// DefineStd - Define a macro name and standard variants.  For example if
37/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
38/// when in GNU mode.
39static void DefineStd(MacroBuilder &Builder, llvm::StringRef MacroName,
40                      const LangOptions &Opts) {
41  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
42
43  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
44  // in the user's namespace.
45  if (Opts.GNUMode)
46    Builder.defineMacro(MacroName);
47
48  // Define __unix.
49  Builder.defineMacro("__" + MacroName);
50
51  // Define __unix__.
52  Builder.defineMacro("__" + MacroName + "__");
53}
54
55//===----------------------------------------------------------------------===//
56// Defines specific to certain operating systems.
57//===----------------------------------------------------------------------===//
58
59namespace {
60template<typename TgtInfo>
61class OSTargetInfo : public TgtInfo {
62protected:
63  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
64                            MacroBuilder &Builder) const=0;
65public:
66  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
67  virtual void getTargetDefines(const LangOptions &Opts,
68                                MacroBuilder &Builder) const {
69    TgtInfo::getTargetDefines(Opts, Builder);
70    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
71  }
72
73};
74} // end anonymous namespace
75
76
77static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
78                             const llvm::Triple &Triple) {
79  Builder.defineMacro("__APPLE_CC__", "5621");
80  Builder.defineMacro("__APPLE__");
81  Builder.defineMacro("__MACH__");
82  Builder.defineMacro("OBJC_NEW_PROPERTIES");
83
84  // __weak is always defined, for use in blocks and with objc pointers.
85  Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
86
87  // Darwin defines __strong even in C mode (just to nothing).
88  if (!Opts.ObjC1 || Opts.getGCMode() == LangOptions::NonGC)
89    Builder.defineMacro("__strong", "");
90  else
91    Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
92
93  if (Opts.Static)
94    Builder.defineMacro("__STATIC__");
95  else
96    Builder.defineMacro("__DYNAMIC__");
97
98  if (Opts.POSIXThreads)
99    Builder.defineMacro("_REENTRANT");
100
101  // Get the OS version number from the triple.
102  unsigned Maj, Min, Rev;
103
104  // If no version was given, default to to 10.4.0, for simplifying tests.
105  if (Triple.getOSName() == "darwin") {
106    Min = Rev = 0;
107    Maj = 8;
108  } else
109    Triple.getDarwinNumber(Maj, Min, Rev);
110
111  // Set the appropriate OS version define.
112  if (Triple.getEnvironmentName() == "iphoneos") {
113    assert(Maj < 10 && Min < 99 && Rev < 99 && "Invalid version!");
114    char Str[6];
115    Str[0] = '0' + Maj;
116    Str[1] = '0' + (Min / 10);
117    Str[2] = '0' + (Min % 10);
118    Str[3] = '0' + (Rev / 10);
119    Str[4] = '0' + (Rev % 10);
120    Str[5] = '\0';
121    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
122  } else {
123    // For historical reasons that make little sense, the version passed here is
124    // the "darwin" version, which drops the 10 and offsets by 4.
125    Rev = Min;
126    Min = Maj - 4;
127    Maj = 10;
128
129    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
130    assert(Maj < 99 && Min < 10 && Rev < 10 && "Invalid version!");
131    char Str[5];
132    Str[0] = '0' + (Maj / 10);
133    Str[1] = '0' + (Maj % 10);
134    Str[2] = '0' + Min;
135    Str[3] = '0' + Rev;
136    Str[4] = '\0';
137    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
138  }
139}
140
141namespace {
142template<typename Target>
143class DarwinTargetInfo : public OSTargetInfo<Target> {
144protected:
145  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
146                            MacroBuilder &Builder) const {
147    getDarwinDefines(Builder, Opts, Triple);
148  }
149
150public:
151  DarwinTargetInfo(const std::string& triple) :
152    OSTargetInfo<Target>(triple) {
153      this->TLSSupported = llvm::Triple(triple).getDarwinMajorNumber() > 10;
154    }
155
156  virtual std::string isValidSectionSpecifier(llvm::StringRef SR) const {
157    // Let MCSectionMachO validate this.
158    llvm::StringRef Segment, Section;
159    unsigned TAA, StubSize;
160    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
161                                                       TAA, StubSize);
162  }
163
164  virtual const char *getStaticInitSectionSpecifier() const {
165    // FIXME: We should return 0 when building kexts.
166    return "__TEXT,__StaticInit,regular,pure_instructions";
167  }
168
169};
170
171
172// DragonFlyBSD Target
173template<typename Target>
174class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
175protected:
176  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
177                            MacroBuilder &Builder) const {
178    // DragonFly defines; list based off of gcc output
179    Builder.defineMacro("__DragonFly__");
180    Builder.defineMacro("__DragonFly_cc_version", "100001");
181    Builder.defineMacro("__ELF__");
182    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
183    Builder.defineMacro("__tune_i386__");
184    DefineStd(Builder, "unix", Opts);
185  }
186public:
187  DragonFlyBSDTargetInfo(const std::string &triple)
188    : OSTargetInfo<Target>(triple) {}
189};
190
191// FreeBSD Target
192template<typename Target>
193class FreeBSDTargetInfo : public OSTargetInfo<Target> {
194protected:
195  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
196                            MacroBuilder &Builder) const {
197    // FreeBSD defines; list based off of gcc output
198
199    // FIXME: Move version number handling to llvm::Triple.
200    llvm::StringRef Release = Triple.getOSName().substr(strlen("freebsd"), 1);
201
202    Builder.defineMacro("__FreeBSD__", Release);
203    Builder.defineMacro("__FreeBSD_cc_version", Release + "00001");
204    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
205    DefineStd(Builder, "unix", Opts);
206    Builder.defineMacro("__ELF__");
207  }
208public:
209  FreeBSDTargetInfo(const std::string &triple)
210    : OSTargetInfo<Target>(triple) {
211      this->UserLabelPrefix = "";
212    }
213};
214
215// Minix Target
216template<typename Target>
217class MinixTargetInfo : public OSTargetInfo<Target> {
218protected:
219  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
220                            MacroBuilder &Builder) const {
221    // Minix defines
222
223    Builder.defineMacro("__minix", "3");
224    Builder.defineMacro("_EM_WSIZE", "4");
225    Builder.defineMacro("_EM_PSIZE", "4");
226    Builder.defineMacro("_EM_SSIZE", "2");
227    Builder.defineMacro("_EM_LSIZE", "4");
228    Builder.defineMacro("_EM_FSIZE", "4");
229    Builder.defineMacro("_EM_DSIZE", "8");
230    DefineStd(Builder, "unix", Opts);
231  }
232public:
233  MinixTargetInfo(const std::string &triple)
234    : OSTargetInfo<Target>(triple) {
235      this->UserLabelPrefix = "";
236    }
237};
238
239// Linux target
240template<typename Target>
241class LinuxTargetInfo : public OSTargetInfo<Target> {
242protected:
243  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
244                            MacroBuilder &Builder) const {
245    // Linux defines; list based off of gcc output
246    DefineStd(Builder, "unix", Opts);
247    DefineStd(Builder, "linux", Opts);
248    Builder.defineMacro("__gnu_linux__");
249    Builder.defineMacro("__ELF__");
250    if (Opts.POSIXThreads)
251      Builder.defineMacro("_REENTRANT");
252    if (Opts.CPlusPlus)
253      Builder.defineMacro("_GNU_SOURCE");
254  }
255public:
256  LinuxTargetInfo(const std::string& triple)
257    : OSTargetInfo<Target>(triple) {
258    this->UserLabelPrefix = "";
259  }
260};
261
262// NetBSD Target
263template<typename Target>
264class NetBSDTargetInfo : public OSTargetInfo<Target> {
265protected:
266  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
267                            MacroBuilder &Builder) const {
268    // NetBSD defines; list based off of gcc output
269    Builder.defineMacro("__NetBSD__");
270    Builder.defineMacro("__unix__");
271    Builder.defineMacro("__ELF__");
272    if (Opts.POSIXThreads)
273      Builder.defineMacro("_POSIX_THREADS");
274  }
275public:
276  NetBSDTargetInfo(const std::string &triple)
277    : OSTargetInfo<Target>(triple) {
278      this->UserLabelPrefix = "";
279    }
280};
281
282// OpenBSD Target
283template<typename Target>
284class OpenBSDTargetInfo : public OSTargetInfo<Target> {
285protected:
286  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
287                            MacroBuilder &Builder) const {
288    // OpenBSD defines; list based off of gcc output
289
290    Builder.defineMacro("__OpenBSD__");
291    DefineStd(Builder, "unix", Opts);
292    Builder.defineMacro("__ELF__");
293    if (Opts.POSIXThreads)
294      Builder.defineMacro("_POSIX_THREADS");
295  }
296public:
297  OpenBSDTargetInfo(const std::string &triple)
298    : OSTargetInfo<Target>(triple) {}
299};
300
301// PSP Target
302template<typename Target>
303class PSPTargetInfo : public OSTargetInfo<Target> {
304protected:
305  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
306                            MacroBuilder &Builder) const {
307    // PSP defines; list based on the output of the pspdev gcc toolchain.
308    Builder.defineMacro("PSP");
309    Builder.defineMacro("_PSP");
310    Builder.defineMacro("__psp__");
311    Builder.defineMacro("__ELF__");
312  }
313public:
314  PSPTargetInfo(const std::string& triple)
315    : OSTargetInfo<Target>(triple) {
316    this->UserLabelPrefix = "";
317  }
318};
319
320// PS3 PPU Target
321template<typename Target>
322class PS3PPUTargetInfo : public OSTargetInfo<Target> {
323protected:
324  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
325                            MacroBuilder &Builder) const {
326    // PS3 PPU defines.
327    Builder.defineMacro("__PPC__");
328    Builder.defineMacro("__PPU__");
329    Builder.defineMacro("__CELLOS_LV2__");
330    Builder.defineMacro("__ELF__");
331    Builder.defineMacro("__LP32__");
332    Builder.defineMacro("_ARCH_PPC64");
333    Builder.defineMacro("__powerpc64__");
334  }
335public:
336  PS3PPUTargetInfo(const std::string& triple)
337    : OSTargetInfo<Target>(triple) {
338    this->UserLabelPrefix = "";
339    this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32;
340    this->IntMaxType = TargetInfo::SignedLongLong;
341    this->UIntMaxType = TargetInfo::UnsignedLongLong;
342    this->Int64Type = TargetInfo::SignedLongLong;
343    this->SizeType = TargetInfo::UnsignedInt;
344    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
345                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
346  }
347};
348
349// FIXME: Need a real SPU target.
350// PS3 SPU Target
351template<typename Target>
352class PS3SPUTargetInfo : public OSTargetInfo<Target> {
353protected:
354  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
355                            MacroBuilder &Builder) const {
356    // PS3 PPU defines.
357    Builder.defineMacro("__SPU__");
358    Builder.defineMacro("__ELF__");
359  }
360public:
361  PS3SPUTargetInfo(const std::string& triple)
362    : OSTargetInfo<Target>(triple) {
363    this->UserLabelPrefix = "";
364  }
365};
366
367// AuroraUX target
368template<typename Target>
369class AuroraUXTargetInfo : public OSTargetInfo<Target> {
370protected:
371  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
372                            MacroBuilder &Builder) const {
373    DefineStd(Builder, "sun", Opts);
374    DefineStd(Builder, "unix", Opts);
375    Builder.defineMacro("__ELF__");
376    Builder.defineMacro("__svr4__");
377    Builder.defineMacro("__SVR4");
378  }
379public:
380  AuroraUXTargetInfo(const std::string& triple)
381    : OSTargetInfo<Target>(triple) {
382    this->UserLabelPrefix = "";
383    this->WCharType = this->SignedLong;
384    // FIXME: WIntType should be SignedLong
385  }
386};
387
388// Solaris target
389template<typename Target>
390class SolarisTargetInfo : public OSTargetInfo<Target> {
391protected:
392  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
393                            MacroBuilder &Builder) const {
394    DefineStd(Builder, "sun", Opts);
395    DefineStd(Builder, "unix", Opts);
396    Builder.defineMacro("__ELF__");
397    Builder.defineMacro("__svr4__");
398    Builder.defineMacro("__SVR4");
399  }
400public:
401  SolarisTargetInfo(const std::string& triple)
402    : OSTargetInfo<Target>(triple) {
403    this->UserLabelPrefix = "";
404    this->WCharType = this->SignedLong;
405    // FIXME: WIntType should be SignedLong
406  }
407};
408} // end anonymous namespace.
409
410//===----------------------------------------------------------------------===//
411// Specific target implementations.
412//===----------------------------------------------------------------------===//
413
414namespace {
415// PPC abstract base class
416class PPCTargetInfo : public TargetInfo {
417  static const Builtin::Info BuiltinInfo[];
418  static const char * const GCCRegNames[];
419  static const TargetInfo::GCCRegAlias GCCRegAliases[];
420
421public:
422  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {}
423
424  virtual void getTargetBuiltins(const Builtin::Info *&Records,
425                                 unsigned &NumRecords) const {
426    Records = BuiltinInfo;
427    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
428  }
429
430  virtual void getTargetDefines(const LangOptions &Opts,
431                                MacroBuilder &Builder) const;
432
433  virtual const char *getVAListDeclaration() const {
434    return "typedef char* __builtin_va_list;";
435    // This is the right definition for ABI/V4: System V.4/eabi.
436    /*return "typedef struct __va_list_tag {"
437           "  unsigned char gpr;"
438           "  unsigned char fpr;"
439           "  unsigned short reserved;"
440           "  void* overflow_arg_area;"
441           "  void* reg_save_area;"
442           "} __builtin_va_list[1];";*/
443  }
444  virtual void getGCCRegNames(const char * const *&Names,
445                              unsigned &NumNames) const;
446  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
447                                unsigned &NumAliases) const;
448  virtual bool validateAsmConstraint(const char *&Name,
449                                     TargetInfo::ConstraintInfo &Info) const {
450    switch (*Name) {
451    default: return false;
452    case 'O': // Zero
453      break;
454    case 'b': // Base register
455    case 'f': // Floating point register
456      Info.setAllowsRegister();
457      break;
458    // FIXME: The following are added to allow parsing.
459    // I just took a guess at what the actions should be.
460    // Also, is more specific checking needed?  I.e. specific registers?
461    case 'd': // Floating point register (containing 64-bit value)
462    case 'v': // Altivec vector register
463      Info.setAllowsRegister();
464      break;
465    case 'w':
466      switch (Name[1]) {
467        case 'd':// VSX vector register to hold vector double data
468        case 'f':// VSX vector register to hold vector float data
469        case 's':// VSX vector register to hold scalar float data
470        case 'a':// Any VSX register
471          break;
472        default:
473          return false;
474      }
475      Info.setAllowsRegister();
476      Name++; // Skip over 'w'.
477      break;
478    case 'h': // `MQ', `CTR', or `LINK' register
479    case 'q': // `MQ' register
480    case 'c': // `CTR' register
481    case 'l': // `LINK' register
482    case 'x': // `CR' register (condition register) number 0
483    case 'y': // `CR' register (condition register)
484    case 'z': // `XER[CA]' carry bit (part of the XER register)
485      Info.setAllowsRegister();
486      break;
487    case 'I': // Signed 16-bit constant
488    case 'J': // Unsigned 16-bit constant shifted left 16 bits
489              //  (use `L' instead for SImode constants)
490    case 'K': // Unsigned 16-bit constant
491    case 'L': // Signed 16-bit constant shifted left 16 bits
492    case 'M': // Constant larger than 31
493    case 'N': // Exact power of 2
494    case 'P': // Constant whose negation is a signed 16-bit constant
495    case 'G': // Floating point constant that can be loaded into a
496              // register with one instruction per word
497    case 'H': // Integer/Floating point constant that can be loaded
498              // into a register using three instructions
499      break;
500    case 'm': // Memory operand. Note that on PowerPC targets, m can
501              // include addresses that update the base register. It
502              // is therefore only safe to use `m' in an asm statement
503              // if that asm statement accesses the operand exactly once.
504              // The asm statement must also use `%U<opno>' as a
505              // placeholder for the "update" flag in the corresponding
506              // load or store instruction. For example:
507              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
508              // is correct but:
509              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
510              // is not. Use es rather than m if you don't want the base
511              // register to be updated.
512    case 'e':
513      if (Name[1] != 's')
514          return false;
515              // es: A "stable" memory operand; that is, one which does not
516              // include any automodification of the base register. Unlike
517              // `m', this constraint can be used in asm statements that
518              // might access the operand several times, or that might not
519              // access it at all.
520      Info.setAllowsMemory();
521      Name++; // Skip over 'e'.
522      break;
523    case 'Q': // Memory operand that is an offset from a register (it is
524              // usually better to use `m' or `es' in asm statements)
525    case 'Z': // Memory operand that is an indexed or indirect from a
526              // register (it is usually better to use `m' or `es' in
527              // asm statements)
528      Info.setAllowsMemory();
529      Info.setAllowsRegister();
530      break;
531    case 'R': // AIX TOC entry
532    case 'a': // Address operand that is an indexed or indirect from a
533              // register (`p' is preferable for asm statements)
534    case 'S': // Constant suitable as a 64-bit mask operand
535    case 'T': // Constant suitable as a 32-bit mask operand
536    case 'U': // System V Release 4 small data area reference
537    case 't': // AND masks that can be performed by two rldic{l, r}
538              // instructions
539    case 'W': // Vector constant that does not require memory
540    case 'j': // Vector constant that is all zeros.
541      break;
542    // End FIXME.
543    }
544    return true;
545  }
546  virtual const char *getClobbers() const {
547    return "";
548  }
549};
550
551const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
552#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, false },
553#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER, false },
554#include "clang/Basic/BuiltinsPPC.def"
555};
556
557
558/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
559/// #defines that are not tied to a specific subtarget.
560void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
561                                     MacroBuilder &Builder) const {
562  // Target identification.
563  Builder.defineMacro("__ppc__");
564  Builder.defineMacro("_ARCH_PPC");
565  Builder.defineMacro("__powerpc__");
566  Builder.defineMacro("__POWERPC__");
567  if (PointerWidth == 64) {
568    Builder.defineMacro("_ARCH_PPC64");
569    Builder.defineMacro("_LP64");
570    Builder.defineMacro("__LP64__");
571    Builder.defineMacro("__powerpc64__");
572    Builder.defineMacro("__ppc64__");
573  } else {
574    Builder.defineMacro("__ppc__");
575  }
576
577  // Target properties.
578  Builder.defineMacro("_BIG_ENDIAN");
579  Builder.defineMacro("__BIG_ENDIAN__");
580
581  // Subtarget options.
582  Builder.defineMacro("__NATURAL_ALIGNMENT__");
583  Builder.defineMacro("__REGISTER_PREFIX__", "");
584
585  // FIXME: Should be controlled by command line option.
586  Builder.defineMacro("__LONG_DOUBLE_128__");
587
588  if (Opts.AltiVec) {
589    Builder.defineMacro("__VEC__", "10206");
590    Builder.defineMacro("__ALTIVEC__");
591  }
592}
593
594
595const char * const PPCTargetInfo::GCCRegNames[] = {
596  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
597  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
598  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
599  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
600  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
601  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
602  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
603  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
604  "mq", "lr", "ctr", "ap",
605  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
606  "xer",
607  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
608  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
609  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
610  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
611  "vrsave", "vscr",
612  "spe_acc", "spefscr",
613  "sfp"
614};
615
616void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
617                                   unsigned &NumNames) const {
618  Names = GCCRegNames;
619  NumNames = llvm::array_lengthof(GCCRegNames);
620}
621
622const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
623  // While some of these aliases do map to different registers
624  // they still share the same register name.
625  { { "0" }, "r0" },
626  { { "1"}, "r1" },
627  { { "2" }, "r2" },
628  { { "3" }, "r3" },
629  { { "4" }, "r4" },
630  { { "5" }, "r5" },
631  { { "6" }, "r6" },
632  { { "7" }, "r7" },
633  { { "8" }, "r8" },
634  { { "9" }, "r9" },
635  { { "10" }, "r10" },
636  { { "11" }, "r11" },
637  { { "12" }, "r12" },
638  { { "13" }, "r13" },
639  { { "14" }, "r14" },
640  { { "15" }, "r15" },
641  { { "16" }, "r16" },
642  { { "17" }, "r17" },
643  { { "18" }, "r18" },
644  { { "19" }, "r19" },
645  { { "20" }, "r20" },
646  { { "21" }, "r21" },
647  { { "22" }, "r22" },
648  { { "23" }, "r23" },
649  { { "24" }, "r24" },
650  { { "25" }, "r25" },
651  { { "26" }, "r26" },
652  { { "27" }, "r27" },
653  { { "28" }, "r28" },
654  { { "29" }, "r29" },
655  { { "30" }, "r30" },
656  { { "31" }, "r31" },
657  { { "fr0" }, "f0" },
658  { { "fr1" }, "f1" },
659  { { "fr2" }, "f2" },
660  { { "fr3" }, "f3" },
661  { { "fr4" }, "f4" },
662  { { "fr5" }, "f5" },
663  { { "fr6" }, "f6" },
664  { { "fr7" }, "f7" },
665  { { "fr8" }, "f8" },
666  { { "fr9" }, "f9" },
667  { { "fr10" }, "f10" },
668  { { "fr11" }, "f11" },
669  { { "fr12" }, "f12" },
670  { { "fr13" }, "f13" },
671  { { "fr14" }, "f14" },
672  { { "fr15" }, "f15" },
673  { { "fr16" }, "f16" },
674  { { "fr17" }, "f17" },
675  { { "fr18" }, "f18" },
676  { { "fr19" }, "f19" },
677  { { "fr20" }, "f20" },
678  { { "fr21" }, "f21" },
679  { { "fr22" }, "f22" },
680  { { "fr23" }, "f23" },
681  { { "fr24" }, "f24" },
682  { { "fr25" }, "f25" },
683  { { "fr26" }, "f26" },
684  { { "fr27" }, "f27" },
685  { { "fr28" }, "f28" },
686  { { "fr29" }, "f29" },
687  { { "fr30" }, "f30" },
688  { { "fr31" }, "f31" },
689  { { "cc" }, "cr0" },
690};
691
692void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
693                                     unsigned &NumAliases) const {
694  Aliases = GCCRegAliases;
695  NumAliases = llvm::array_lengthof(GCCRegAliases);
696}
697} // end anonymous namespace.
698
699namespace {
700class PPC32TargetInfo : public PPCTargetInfo {
701public:
702  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
703    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
704                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
705
706    if (getTriple().getOS() == llvm::Triple::FreeBSD)
707        this->SizeType = TargetInfo::UnsignedInt;
708  }
709};
710} // end anonymous namespace.
711
712namespace {
713class PPC64TargetInfo : public PPCTargetInfo {
714public:
715  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
716    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
717    IntMaxType = SignedLong;
718    UIntMaxType = UnsignedLong;
719    Int64Type = SignedLong;
720    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
721                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
722  }
723};
724} // end anonymous namespace.
725
726
727namespace {
728class DarwinPPCTargetInfo :
729  public DarwinTargetInfo<PPCTargetInfo> {
730public:
731  DarwinPPCTargetInfo(const std::string& triple)
732    : DarwinTargetInfo<PPCTargetInfo>(triple) {
733    HasAlignMac68kSupport = true;
734  }
735};
736
737class DarwinPPC64TargetInfo :
738  public DarwinTargetInfo<PPC64TargetInfo> {
739public:
740  DarwinPPC64TargetInfo(const std::string& triple)
741    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
742    HasAlignMac68kSupport = true;
743  }
744};
745} // end anonymous namespace.
746
747namespace {
748// MBlaze abstract base class
749class MBlazeTargetInfo : public TargetInfo {
750  static const char * const GCCRegNames[];
751  static const TargetInfo::GCCRegAlias GCCRegAliases[];
752
753public:
754  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
755    DescriptionString = "E-p:32:32-i8:8:8-i16:16:16-i64:32:32-f64:32:32-"
756                        "v64:32:32-v128:32:32-n32";
757  }
758
759  virtual void getTargetBuiltins(const Builtin::Info *&Records,
760                                 unsigned &NumRecords) const {
761    // FIXME: Implement.
762    Records = 0;
763    NumRecords = 0;
764  }
765
766  virtual void getTargetDefines(const LangOptions &Opts,
767                                MacroBuilder &Builder) const;
768
769  virtual const char *getVAListDeclaration() const {
770    return "typedef char* __builtin_va_list;";
771  }
772  virtual const char *getTargetPrefix() const {
773    return "mblaze";
774  }
775  virtual void getGCCRegNames(const char * const *&Names,
776                              unsigned &NumNames) const;
777  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
778                                unsigned &NumAliases) const;
779  virtual bool validateAsmConstraint(const char *&Name,
780                                     TargetInfo::ConstraintInfo &Info) const {
781    switch (*Name) {
782    default: return false;
783    case 'O': // Zero
784      return true;
785    case 'b': // Base register
786    case 'f': // Floating point register
787      Info.setAllowsRegister();
788      return true;
789    }
790  }
791  virtual const char *getClobbers() const {
792    return "";
793  }
794};
795
796/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
797/// #defines that are not tied to a specific subtarget.
798void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
799                                     MacroBuilder &Builder) const {
800  // Target identification.
801  Builder.defineMacro("__microblaze__");
802  Builder.defineMacro("_ARCH_MICROBLAZE");
803  Builder.defineMacro("__MICROBLAZE__");
804
805  // Target properties.
806  Builder.defineMacro("_BIG_ENDIAN");
807  Builder.defineMacro("__BIG_ENDIAN__");
808
809  // Subtarget options.
810  Builder.defineMacro("__REGISTER_PREFIX__", "");
811}
812
813
814const char * const MBlazeTargetInfo::GCCRegNames[] = {
815  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
816  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
817  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
818  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
819  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
820  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
821  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
822  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
823  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
824  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
825};
826
827void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
828                                   unsigned &NumNames) const {
829  Names = GCCRegNames;
830  NumNames = llvm::array_lengthof(GCCRegNames);
831}
832
833const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
834  { {"f0"},  "r0" },
835  { {"f1"},  "r1" },
836  { {"f2"},  "r2" },
837  { {"f3"},  "r3" },
838  { {"f4"},  "r4" },
839  { {"f5"},  "r5" },
840  { {"f6"},  "r6" },
841  { {"f7"},  "r7" },
842  { {"f8"},  "r8" },
843  { {"f9"},  "r9" },
844  { {"f10"}, "r10" },
845  { {"f11"}, "r11" },
846  { {"f12"}, "r12" },
847  { {"f13"}, "r13" },
848  { {"f14"}, "r14" },
849  { {"f15"}, "r15" },
850  { {"f16"}, "r16" },
851  { {"f17"}, "r17" },
852  { {"f18"}, "r18" },
853  { {"f19"}, "r19" },
854  { {"f20"}, "r20" },
855  { {"f21"}, "r21" },
856  { {"f22"}, "r22" },
857  { {"f23"}, "r23" },
858  { {"f24"}, "r24" },
859  { {"f25"}, "r25" },
860  { {"f26"}, "r26" },
861  { {"f27"}, "r27" },
862  { {"f28"}, "r28" },
863  { {"f29"}, "r29" },
864  { {"f30"}, "r30" },
865  { {"f31"}, "r31" },
866};
867
868void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
869                                     unsigned &NumAliases) const {
870  Aliases = GCCRegAliases;
871  NumAliases = llvm::array_lengthof(GCCRegAliases);
872}
873} // end anonymous namespace.
874
875namespace {
876// Namespace for x86 abstract base class
877const Builtin::Info BuiltinInfo[] = {
878#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, false },
879#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER, false },
880#include "clang/Basic/BuiltinsX86.def"
881};
882
883static const char* const GCCRegNames[] = {
884  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
885  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
886  "argp", "flags", "fspr", "dirflag", "frame",
887  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
888  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
889  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
890  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"
891};
892
893const TargetInfo::GCCRegAlias GCCRegAliases[] = {
894  { { "al", "ah", "eax", "rax" }, "ax" },
895  { { "bl", "bh", "ebx", "rbx" }, "bx" },
896  { { "cl", "ch", "ecx", "rcx" }, "cx" },
897  { { "dl", "dh", "edx", "rdx" }, "dx" },
898  { { "esi", "rsi" }, "si" },
899  { { "edi", "rdi" }, "di" },
900  { { "esp", "rsp" }, "sp" },
901  { { "ebp", "rbp" }, "bp" },
902};
903
904// X86 target abstract base class; x86-32 and x86-64 are very close, so
905// most of the implementation can be shared.
906class X86TargetInfo : public TargetInfo {
907  enum X86SSEEnum {
908    NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
909  } SSELevel;
910  enum AMD3DNowEnum {
911    NoAMD3DNow, AMD3DNow, AMD3DNowAthlon
912  } AMD3DNowLevel;
913
914  bool HasAES;
915  bool HasAVX;
916
917public:
918  X86TargetInfo(const std::string& triple)
919    : TargetInfo(triple), SSELevel(NoMMXSSE), AMD3DNowLevel(NoAMD3DNow),
920      HasAES(false), HasAVX(false) {
921    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
922  }
923  virtual void getTargetBuiltins(const Builtin::Info *&Records,
924                                 unsigned &NumRecords) const {
925    Records = BuiltinInfo;
926    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
927  }
928  virtual void getGCCRegNames(const char * const *&Names,
929                              unsigned &NumNames) const {
930    Names = GCCRegNames;
931    NumNames = llvm::array_lengthof(GCCRegNames);
932  }
933  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
934                                unsigned &NumAliases) const {
935    Aliases = GCCRegAliases;
936    NumAliases = llvm::array_lengthof(GCCRegAliases);
937  }
938  virtual bool validateAsmConstraint(const char *&Name,
939                                     TargetInfo::ConstraintInfo &info) const;
940  virtual std::string convertConstraint(const char Constraint) const;
941  virtual const char *getClobbers() const {
942    return "~{dirflag},~{fpsr},~{flags}";
943  }
944  virtual void getTargetDefines(const LangOptions &Opts,
945                                MacroBuilder &Builder) const;
946  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
947                                 const std::string &Name,
948                                 bool Enabled) const;
949  virtual void getDefaultFeatures(const std::string &CPU,
950                                  llvm::StringMap<bool> &Features) const;
951  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
952};
953
954void X86TargetInfo::getDefaultFeatures(const std::string &CPU,
955                                       llvm::StringMap<bool> &Features) const {
956  // FIXME: This should not be here.
957  Features["3dnow"] = false;
958  Features["3dnowa"] = false;
959  Features["mmx"] = false;
960  Features["sse"] = false;
961  Features["sse2"] = false;
962  Features["sse3"] = false;
963  Features["ssse3"] = false;
964  Features["sse41"] = false;
965  Features["sse42"] = false;
966  Features["aes"] = false;
967  Features["avx"] = false;
968
969  // LLVM does not currently recognize this.
970  // Features["sse4a"] = false;
971
972  // FIXME: This *really* should not be here.
973
974  // X86_64 always has SSE2.
975  if (PointerWidth == 64)
976    Features["sse2"] = Features["sse"] = Features["mmx"] = true;
977
978  if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" ||
979      CPU == "pentium" || CPU == "i686" || CPU == "pentiumpro")
980    ;
981  else if (CPU == "pentium-mmx" || CPU == "pentium2")
982    setFeatureEnabled(Features, "mmx", true);
983  else if (CPU == "pentium3")
984    setFeatureEnabled(Features, "sse", true);
985  else if (CPU == "pentium-m" || CPU == "pentium4" || CPU == "x86-64")
986    setFeatureEnabled(Features, "sse2", true);
987  else if (CPU == "yonah" || CPU == "prescott" || CPU == "nocona")
988    setFeatureEnabled(Features, "sse3", true);
989  else if (CPU == "core2")
990    setFeatureEnabled(Features, "ssse3", true);
991  else if (CPU == "penryn") {
992    setFeatureEnabled(Features, "sse4", true);
993    Features["sse42"] = false;
994  } else if (CPU == "atom")
995    setFeatureEnabled(Features, "sse3", true);
996  else if (CPU == "corei7") {
997    setFeatureEnabled(Features, "sse4", true);
998    setFeatureEnabled(Features, "aes", true);
999  }
1000  else if (CPU == "k6" || CPU == "winchip-c6")
1001    setFeatureEnabled(Features, "mmx", true);
1002  else if (CPU == "k6-2" || CPU == "k6-3" || CPU == "athlon" ||
1003           CPU == "athlon-tbird" || CPU == "winchip2" || CPU == "c3") {
1004    setFeatureEnabled(Features, "mmx", true);
1005    setFeatureEnabled(Features, "3dnow", true);
1006  } else if (CPU == "athlon-4" || CPU == "athlon-xp" || CPU == "athlon-mp") {
1007    setFeatureEnabled(Features, "sse", true);
1008    setFeatureEnabled(Features, "3dnowa", true);
1009  } else if (CPU == "k8" || CPU == "opteron" || CPU == "athlon64" ||
1010           CPU == "athlon-fx") {
1011    setFeatureEnabled(Features, "sse2", true);
1012    setFeatureEnabled(Features, "3dnowa", true);
1013  } else if (CPU == "c3-2")
1014    setFeatureEnabled(Features, "sse", true);
1015}
1016
1017bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1018                                      const std::string &Name,
1019                                      bool Enabled) const {
1020  // FIXME: This *really* should not be here.  We need some way of translating
1021  // options into llvm subtarget features.
1022  if (!Features.count(Name) &&
1023      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1024    return false;
1025
1026  if (Enabled) {
1027    if (Name == "mmx")
1028      Features["mmx"] = true;
1029    else if (Name == "sse")
1030      Features["mmx"] = Features["sse"] = true;
1031    else if (Name == "sse2")
1032      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1033    else if (Name == "sse3")
1034      Features["mmx"] = Features["sse"] = Features["sse2"] =
1035        Features["sse3"] = true;
1036    else if (Name == "ssse3")
1037      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1038        Features["ssse3"] = true;
1039    else if (Name == "sse4" || Name == "sse4.2")
1040      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1041        Features["ssse3"] = Features["sse41"] = Features["sse42"] = true;
1042    else if (Name == "sse4.1")
1043      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1044        Features["ssse3"] = Features["sse41"] = true;
1045    else if (Name == "3dnow")
1046      Features["3dnowa"] = true;
1047    else if (Name == "3dnowa")
1048      Features["3dnow"] = Features["3dnowa"] = true;
1049    else if (Name == "aes")
1050      Features["aes"] = true;
1051    else if (Name == "avx")
1052      Features["avx"] = true;
1053  } else {
1054    if (Name == "mmx")
1055      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1056        Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1057    else if (Name == "sse")
1058      Features["sse"] = Features["sse2"] = Features["sse3"] =
1059        Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1060    else if (Name == "sse2")
1061      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1062        Features["sse41"] = Features["sse42"] = false;
1063    else if (Name == "sse3")
1064      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1065        Features["sse42"] = false;
1066    else if (Name == "ssse3")
1067      Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1068    else if (Name == "sse4")
1069      Features["sse41"] = Features["sse42"] = false;
1070    else if (Name == "sse4.2")
1071      Features["sse42"] = false;
1072    else if (Name == "sse4.1")
1073      Features["sse41"] = Features["sse42"] = false;
1074    else if (Name == "3dnow")
1075      Features["3dnow"] = Features["3dnowa"] = false;
1076    else if (Name == "3dnowa")
1077      Features["3dnowa"] = false;
1078    else if (Name == "aes")
1079      Features["aes"] = false;
1080    else if (Name == "avx")
1081      Features["avx"] = false;
1082  }
1083
1084  return true;
1085}
1086
1087/// HandleTargetOptions - Perform initialization based on the user
1088/// configured set of features.
1089void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1090  // Remember the maximum enabled sselevel.
1091  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1092    // Ignore disabled features.
1093    if (Features[i][0] == '-')
1094      continue;
1095
1096    if (Features[i].substr(1) == "aes") {
1097      HasAES = true;
1098      continue;
1099    }
1100
1101    // FIXME: Not sure yet how to treat AVX in regard to SSE levels.
1102    // For now let it be enabled together with other SSE levels.
1103    if (Features[i].substr(1) == "avx") {
1104      HasAVX = true;
1105      continue;
1106    }
1107
1108    assert(Features[i][0] == '+' && "Invalid target feature!");
1109    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
1110      .Case("sse42", SSE42)
1111      .Case("sse41", SSE41)
1112      .Case("ssse3", SSSE3)
1113      .Case("sse3", SSE3)
1114      .Case("sse2", SSE2)
1115      .Case("sse", SSE1)
1116      .Case("mmx", MMX)
1117      .Default(NoMMXSSE);
1118    SSELevel = std::max(SSELevel, Level);
1119
1120    AMD3DNowEnum ThreeDNowLevel =
1121      llvm::StringSwitch<AMD3DNowEnum>(Features[i].substr(1))
1122        .Case("3dnowa", AMD3DNowAthlon)
1123        .Case("3dnow", AMD3DNow)
1124        .Default(NoAMD3DNow);
1125
1126    AMD3DNowLevel = std::max(AMD3DNowLevel, ThreeDNowLevel);
1127  }
1128}
1129
1130/// X86TargetInfo::getTargetDefines - Return a set of the X86-specific #defines
1131/// that are not tied to a specific subtarget.
1132void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1133                                     MacroBuilder &Builder) const {
1134  // Target identification.
1135  if (PointerWidth == 64) {
1136    Builder.defineMacro("_LP64");
1137    Builder.defineMacro("__LP64__");
1138    Builder.defineMacro("__amd64__");
1139    Builder.defineMacro("__amd64");
1140    Builder.defineMacro("__x86_64");
1141    Builder.defineMacro("__x86_64__");
1142  } else {
1143    DefineStd(Builder, "i386", Opts);
1144  }
1145
1146  if (HasAES)
1147    Builder.defineMacro("__AES__");
1148
1149  if (HasAVX)
1150    Builder.defineMacro("__AVX__");
1151
1152  // Target properties.
1153  Builder.defineMacro("__LITTLE_ENDIAN__");
1154
1155  // Subtarget options.
1156  Builder.defineMacro("__nocona");
1157  Builder.defineMacro("__nocona__");
1158  Builder.defineMacro("__tune_nocona__");
1159  Builder.defineMacro("__REGISTER_PREFIX__", "");
1160
1161  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
1162  // functions in glibc header files that use FP Stack inline asm which the
1163  // backend can't deal with (PR879).
1164  Builder.defineMacro("__NO_MATH_INLINES");
1165
1166  // Each case falls through to the previous one here.
1167  switch (SSELevel) {
1168  case SSE42:
1169    Builder.defineMacro("__SSE4_2__");
1170  case SSE41:
1171    Builder.defineMacro("__SSE4_1__");
1172  case SSSE3:
1173    Builder.defineMacro("__SSSE3__");
1174  case SSE3:
1175    Builder.defineMacro("__SSE3__");
1176  case SSE2:
1177    Builder.defineMacro("__SSE2__");
1178    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
1179  case SSE1:
1180    Builder.defineMacro("__SSE__");
1181    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
1182  case MMX:
1183    Builder.defineMacro("__MMX__");
1184  case NoMMXSSE:
1185    break;
1186  }
1187
1188  // Each case falls through to the previous one here.
1189  switch (AMD3DNowLevel) {
1190  case AMD3DNowAthlon:
1191    Builder.defineMacro("__3dNOW_A__");
1192  case AMD3DNow:
1193    Builder.defineMacro("__3dNOW__");
1194  case NoAMD3DNow:
1195    break;
1196  }
1197}
1198
1199
1200bool
1201X86TargetInfo::validateAsmConstraint(const char *&Name,
1202                                     TargetInfo::ConstraintInfo &Info) const {
1203  switch (*Name) {
1204  default: return false;
1205  case 'Y': // first letter of a pair:
1206    switch (*(Name+1)) {
1207    default: return false;
1208    case '0':  // First SSE register.
1209    case 't':  // Any SSE register, when SSE2 is enabled.
1210    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
1211    case 'm':  // any MMX register, when inter-unit moves enabled.
1212      break;   // falls through to setAllowsRegister.
1213  }
1214  case 'a': // eax.
1215  case 'b': // ebx.
1216  case 'c': // ecx.
1217  case 'd': // edx.
1218  case 'S': // esi.
1219  case 'D': // edi.
1220  case 'A': // edx:eax.
1221  case 'f': // any x87 floating point stack register.
1222  case 't': // top of floating point stack.
1223  case 'u': // second from top of floating point stack.
1224  case 'q': // Any register accessible as [r]l: a, b, c, and d.
1225  case 'y': // Any MMX register.
1226  case 'x': // Any SSE register.
1227  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
1228  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
1229  case 'l': // "Index" registers: any general register that can be used as an
1230            // index in a base+index memory access.
1231    Info.setAllowsRegister();
1232    return true;
1233  case 'C': // SSE floating point constant.
1234  case 'G': // x87 floating point constant.
1235  case 'e': // 32-bit signed integer constant for use with zero-extending
1236            // x86_64 instructions.
1237  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
1238            // x86_64 instructions.
1239    return true;
1240  }
1241  return false;
1242}
1243
1244std::string
1245X86TargetInfo::convertConstraint(const char Constraint) const {
1246  switch (Constraint) {
1247  case 'a': return std::string("{ax}");
1248  case 'b': return std::string("{bx}");
1249  case 'c': return std::string("{cx}");
1250  case 'd': return std::string("{dx}");
1251  case 'S': return std::string("{si}");
1252  case 'D': return std::string("{di}");
1253  case 't': // top of floating point stack.
1254    return std::string("{st}");
1255  case 'u': // second from top of floating point stack.
1256    return std::string("{st(1)}"); // second from top of floating point stack.
1257  default:
1258    return std::string(1, Constraint);
1259  }
1260}
1261} // end anonymous namespace
1262
1263namespace {
1264// X86-32 generic target
1265class X86_32TargetInfo : public X86TargetInfo {
1266public:
1267  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
1268    DoubleAlign = LongLongAlign = 32;
1269    LongDoubleWidth = 96;
1270    LongDoubleAlign = 32;
1271    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1272                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1273                        "a0:0:64-f80:32:32-n8:16:32";
1274    SizeType = UnsignedInt;
1275    PtrDiffType = SignedInt;
1276    IntPtrType = SignedInt;
1277    RegParmMax = 3;
1278
1279    // Use fpret for all types.
1280    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
1281                             (1 << TargetInfo::Double) |
1282                             (1 << TargetInfo::LongDouble));
1283  }
1284  virtual const char *getVAListDeclaration() const {
1285    return "typedef char* __builtin_va_list;";
1286  }
1287
1288  int getEHDataRegisterNumber(unsigned RegNo) const {
1289    if (RegNo == 0) return 0;
1290    if (RegNo == 1) return 2;
1291    return -1;
1292  }
1293};
1294} // end anonymous namespace
1295
1296namespace {
1297class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
1298public:
1299  OpenBSDI386TargetInfo(const std::string& triple) :
1300    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
1301    SizeType = UnsignedLong;
1302    IntPtrType = SignedLong;
1303    PtrDiffType = SignedLong;
1304  }
1305};
1306} // end anonymous namespace
1307
1308namespace {
1309class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
1310public:
1311  DarwinI386TargetInfo(const std::string& triple) :
1312    DarwinTargetInfo<X86_32TargetInfo>(triple) {
1313    LongDoubleWidth = 128;
1314    LongDoubleAlign = 128;
1315    SizeType = UnsignedLong;
1316    IntPtrType = SignedLong;
1317    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1318                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1319                        "a0:0:64-f80:128:128-n8:16:32";
1320    HasAlignMac68kSupport = true;
1321  }
1322
1323};
1324} // end anonymous namespace
1325
1326namespace {
1327// x86-32 Windows target
1328class WindowsX86_32TargetInfo : public X86_32TargetInfo {
1329public:
1330  WindowsX86_32TargetInfo(const std::string& triple)
1331    : X86_32TargetInfo(triple) {
1332    TLSSupported = false;
1333    WCharType = UnsignedShort;
1334    DoubleAlign = LongLongAlign = 64;
1335    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1336                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
1337                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32";
1338  }
1339  virtual void getTargetDefines(const LangOptions &Opts,
1340                                MacroBuilder &Builder) const {
1341    X86_32TargetInfo::getTargetDefines(Opts, Builder);
1342    // This list is based off of the the list of things MingW defines
1343    Builder.defineMacro("_WIN32");
1344    DefineStd(Builder, "WIN32", Opts);
1345    DefineStd(Builder, "WINNT", Opts);
1346    Builder.defineMacro("_X86_");
1347  }
1348};
1349} // end anonymous namespace
1350
1351namespace {
1352
1353// x86-32 Windows Visual Studio target
1354class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
1355public:
1356  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
1357    : WindowsX86_32TargetInfo(triple) {
1358    LongDoubleWidth = 64;
1359    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1360  }
1361  virtual void getTargetDefines(const LangOptions &Opts,
1362                                MacroBuilder &Builder) const {
1363    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
1364    // The value of the following reflects processor type.
1365    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
1366    // We lost the original triple, so we use the default.
1367    Builder.defineMacro("_M_IX86", "600");
1368    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
1369    Builder.defineMacro("_STDCALL_SUPPORTED");
1370  }
1371};
1372} // end anonymous namespace
1373
1374namespace {
1375// x86-32 MinGW target
1376class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
1377public:
1378  MinGWX86_32TargetInfo(const std::string& triple)
1379    : WindowsX86_32TargetInfo(triple) {
1380  }
1381  virtual void getTargetDefines(const LangOptions &Opts,
1382                                MacroBuilder &Builder) const {
1383    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
1384    Builder.defineMacro("__MSVCRT__");
1385    Builder.defineMacro("__MINGW32__");
1386    Builder.defineMacro("__declspec", "__declspec");
1387  }
1388};
1389} // end anonymous namespace
1390
1391namespace {
1392// x86-32 Cygwin target
1393class CygwinX86_32TargetInfo : public X86_32TargetInfo {
1394public:
1395  CygwinX86_32TargetInfo(const std::string& triple)
1396    : X86_32TargetInfo(triple) {
1397    TLSSupported = false;
1398    WCharType = UnsignedShort;
1399    DoubleAlign = LongLongAlign = 64;
1400    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1401                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
1402                        "a0:0:64-f80:32:32-n8:16:32";
1403  }
1404  virtual void getTargetDefines(const LangOptions &Opts,
1405                                MacroBuilder &Builder) const {
1406    X86_32TargetInfo::getTargetDefines(Opts, Builder);
1407    Builder.defineMacro("__CYGWIN__");
1408    Builder.defineMacro("__CYGWIN32__");
1409    DefineStd(Builder, "unix", Opts);
1410    if (Opts.CPlusPlus)
1411      Builder.defineMacro("_GNU_SOURCE");
1412  }
1413};
1414} // end anonymous namespace
1415
1416namespace {
1417// x86-32 Haiku target
1418class HaikuX86_32TargetInfo : public X86_32TargetInfo {
1419public:
1420  HaikuX86_32TargetInfo(const std::string& triple)
1421    : X86_32TargetInfo(triple) {
1422    SizeType = UnsignedLong;
1423    IntPtrType = SignedLong;
1424    PtrDiffType = SignedLong;
1425  }
1426  virtual void getTargetDefines(const LangOptions &Opts,
1427                                MacroBuilder &Builder) const {
1428    X86_32TargetInfo::getTargetDefines(Opts, Builder);
1429    Builder.defineMacro("__INTEL__");
1430    Builder.defineMacro("__HAIKU__");
1431  }
1432};
1433} // end anonymous namespace
1434
1435namespace {
1436// x86-64 generic target
1437class X86_64TargetInfo : public X86TargetInfo {
1438public:
1439  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
1440    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1441    LongDoubleWidth = 128;
1442    LongDoubleAlign = 128;
1443    LargeArrayMinWidth = 128;
1444    LargeArrayAlign = 128;
1445    IntMaxType = SignedLong;
1446    UIntMaxType = UnsignedLong;
1447    Int64Type = SignedLong;
1448    RegParmMax = 6;
1449
1450    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1451                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
1452                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64";
1453
1454    // Use fpret only for long double.
1455    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
1456  }
1457  virtual const char *getVAListDeclaration() const {
1458    return "typedef struct __va_list_tag {"
1459           "  unsigned gp_offset;"
1460           "  unsigned fp_offset;"
1461           "  void* overflow_arg_area;"
1462           "  void* reg_save_area;"
1463           "} __va_list_tag;"
1464           "typedef __va_list_tag __builtin_va_list[1];";
1465  }
1466
1467  int getEHDataRegisterNumber(unsigned RegNo) const {
1468    if (RegNo == 0) return 0;
1469    if (RegNo == 1) return 1;
1470    return -1;
1471  }
1472};
1473} // end anonymous namespace
1474
1475namespace {
1476// x86-64 Windows target
1477class WindowsX86_64TargetInfo : public X86_64TargetInfo {
1478public:
1479  WindowsX86_64TargetInfo(const std::string& triple)
1480    : X86_64TargetInfo(triple) {
1481    TLSSupported = false;
1482    WCharType = UnsignedShort;
1483    LongWidth = LongAlign = 32;
1484    DoubleAlign = LongLongAlign = 64;
1485    IntMaxType = SignedLongLong;
1486    UIntMaxType = UnsignedLongLong;
1487    Int64Type = SignedLongLong;
1488    SizeType = UnsignedLongLong;
1489    PtrDiffType = SignedLongLong;
1490    IntPtrType = SignedLongLong;
1491  }
1492  virtual void getTargetDefines(const LangOptions &Opts,
1493                                MacroBuilder &Builder) const {
1494    X86_64TargetInfo::getTargetDefines(Opts, Builder);
1495    Builder.defineMacro("_WIN64");
1496    DefineStd(Builder, "WIN64", Opts);
1497  }
1498};
1499} // end anonymous namespace
1500
1501namespace {
1502// x86-64 Windows Visual Studio target
1503class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
1504public:
1505  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
1506    : WindowsX86_64TargetInfo(triple) {
1507  }
1508  virtual void getTargetDefines(const LangOptions &Opts,
1509                                MacroBuilder &Builder) const {
1510    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
1511    Builder.defineMacro("_M_X64");
1512    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
1513  }
1514  virtual const char *getVAListDeclaration() const {
1515    return "typedef char* __builtin_va_list;";
1516  }
1517};
1518} // end anonymous namespace
1519
1520namespace {
1521// x86-64 MinGW target
1522class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
1523public:
1524  MinGWX86_64TargetInfo(const std::string& triple)
1525    : WindowsX86_64TargetInfo(triple) {
1526  }
1527  virtual void getTargetDefines(const LangOptions &Opts,
1528                                MacroBuilder &Builder) const {
1529    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
1530    Builder.defineMacro("__MSVCRT__");
1531    Builder.defineMacro("__MINGW64__");
1532    Builder.defineMacro("__declspec");
1533  }
1534};
1535} // end anonymous namespace
1536
1537namespace {
1538class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
1539public:
1540  DarwinX86_64TargetInfo(const std::string& triple)
1541      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
1542    Int64Type = SignedLongLong;
1543  }
1544};
1545} // end anonymous namespace
1546
1547namespace {
1548class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
1549public:
1550  OpenBSDX86_64TargetInfo(const std::string& triple)
1551      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
1552    IntMaxType = SignedLongLong;
1553    UIntMaxType = UnsignedLongLong;
1554    Int64Type = SignedLongLong;
1555  }
1556};
1557} // end anonymous namespace
1558
1559namespace {
1560class ARMTargetInfo : public TargetInfo {
1561  // Possible FPU choices.
1562  enum FPUMode {
1563    NoFPU,
1564    VFP2FPU,
1565    VFP3FPU,
1566    NeonFPU
1567  };
1568
1569  static bool FPUModeIsVFP(FPUMode Mode) {
1570    return Mode >= VFP2FPU && Mode <= NeonFPU;
1571  }
1572
1573  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1574  static const char * const GCCRegNames[];
1575
1576  std::string ABI, CPU;
1577
1578  unsigned FPU : 3;
1579
1580  unsigned IsThumb : 1;
1581
1582  // Initialized via features.
1583  unsigned SoftFloat : 1;
1584  unsigned SoftFloatABI : 1;
1585
1586  static const Builtin::Info BuiltinInfo[];
1587
1588public:
1589  ARMTargetInfo(const std::string &TripleStr)
1590    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
1591  {
1592    SizeType = UnsignedInt;
1593    PtrDiffType = SignedInt;
1594
1595    // {} in inline assembly are neon specifiers, not assembly variant
1596    // specifiers.
1597    NoAsmVariants = true;
1598
1599    // FIXME: Should we just treat this as a feature?
1600    IsThumb = getTriple().getArchName().startswith("thumb");
1601    if (IsThumb) {
1602      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
1603                           "i64:64:64-f32:32:32-f64:64:64-"
1604                           "v64:64:64-v128:128:128-a0:0:32-n32");
1605    } else {
1606      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1607                           "i64:64:64-f32:32:32-f64:64:64-"
1608                           "v64:64:64-v128:128:128-a0:0:64-n32");
1609    }
1610
1611    // ARM targets default to using the ARM C++ ABI.
1612    CXXABI = CXXABI_ARM;
1613  }
1614  virtual const char *getABI() const { return ABI.c_str(); }
1615  virtual bool setABI(const std::string &Name) {
1616    ABI = Name;
1617
1618    // The defaults (above) are for AAPCS, check if we need to change them.
1619    //
1620    // FIXME: We need support for -meabi... we could just mangle it into the
1621    // name.
1622    if (Name == "apcs-gnu") {
1623      DoubleAlign = LongLongAlign = LongDoubleAlign = 32;
1624      SizeType = UnsignedLong;
1625
1626      // Do not respect the alignment of bit-field types when laying out
1627      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
1628      UseBitFieldTypeAlignment = false;
1629
1630      if (IsThumb) {
1631        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
1632                             "i64:32:32-f32:32:32-f64:32:32-"
1633                             "v64:64:64-v128:128:128-a0:0:32-n32");
1634      } else {
1635        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1636                             "i64:32:32-f32:32:32-f64:32:32-"
1637                             "v64:64:64-v128:128:128-a0:0:64-n32");
1638      }
1639
1640      // FIXME: Override "preferred align" for double and long long.
1641    } else if (Name == "aapcs") {
1642      // FIXME: Enumerated types are variable width in straight AAPCS.
1643    } else if (Name == "aapcs-linux") {
1644      ;
1645    } else
1646      return false;
1647
1648    return true;
1649  }
1650
1651  void getDefaultFeatures(const std::string &CPU,
1652                          llvm::StringMap<bool> &Features) const {
1653    // FIXME: This should not be here.
1654    Features["vfp2"] = false;
1655    Features["vfp3"] = false;
1656    Features["neon"] = false;
1657
1658    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
1659      Features["vfp2"] = true;
1660    else if (CPU == "cortex-a8" || CPU == "cortex-a9")
1661      Features["neon"] = true;
1662  }
1663
1664  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1665                                 const std::string &Name,
1666                                 bool Enabled) const {
1667    if (Name == "soft-float" || Name == "soft-float-abi") {
1668      Features[Name] = Enabled;
1669    } else if (Name == "vfp2" || Name == "vfp3" || Name == "neon") {
1670      // These effectively are a single option, reset them when any is enabled.
1671      if (Enabled)
1672        Features["vfp2"] = Features["vfp3"] = Features["neon"] = false;
1673      Features[Name] = Enabled;
1674    } else
1675      return false;
1676
1677    return true;
1678  }
1679
1680  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
1681    FPU = NoFPU;
1682    SoftFloat = SoftFloatABI = false;
1683    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
1684      if (Features[i] == "+soft-float")
1685        SoftFloat = true;
1686      else if (Features[i] == "+soft-float-abi")
1687        SoftFloatABI = true;
1688      else if (Features[i] == "+vfp2")
1689        FPU = VFP2FPU;
1690      else if (Features[i] == "+vfp3")
1691        FPU = VFP3FPU;
1692      else if (Features[i] == "+neon")
1693        FPU = NeonFPU;
1694    }
1695
1696    // Remove front-end specific options which the backend handles differently.
1697    std::vector<std::string>::iterator it;
1698    it = std::find(Features.begin(), Features.end(), "+soft-float");
1699    if (it != Features.end())
1700      Features.erase(it);
1701    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
1702    if (it != Features.end())
1703      Features.erase(it);
1704  }
1705
1706  static const char *getCPUDefineSuffix(llvm::StringRef Name) {
1707    return llvm::StringSwitch<const char*>(Name)
1708      .Cases("arm8", "arm810", "4")
1709      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
1710      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
1711      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
1712      .Case("ep9312", "4T")
1713      .Cases("arm10tdmi", "arm1020t", "5T")
1714      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
1715      .Case("arm926ej-s", "5TEJ")
1716      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
1717      .Cases("xscale", "iwmmxt", "5TE")
1718      .Case("arm1136j-s", "6J")
1719      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
1720      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
1721      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
1722      .Cases("cortex-a8", "cortex-a9", "7A")
1723      .Default(0);
1724  }
1725  virtual bool setCPU(const std::string &Name) {
1726    if (!getCPUDefineSuffix(Name))
1727      return false;
1728
1729    CPU = Name;
1730    return true;
1731  }
1732  virtual void getTargetDefines(const LangOptions &Opts,
1733                                MacroBuilder &Builder) const {
1734    // Target identification.
1735    Builder.defineMacro("__arm");
1736    Builder.defineMacro("__arm__");
1737
1738    // Target properties.
1739    Builder.defineMacro("__ARMEL__");
1740    Builder.defineMacro("__LITTLE_ENDIAN__");
1741    Builder.defineMacro("__REGISTER_PREFIX__", "");
1742
1743    llvm::StringRef CPUArch = getCPUDefineSuffix(CPU);
1744    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
1745
1746    // Subtarget options.
1747
1748    // FIXME: It's more complicated than this and we don't really support
1749    // interworking.
1750    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
1751      Builder.defineMacro("__THUMB_INTERWORK__");
1752
1753    if (ABI == "aapcs" || ABI == "aapcs-linux")
1754      Builder.defineMacro("__ARM_EABI__");
1755
1756    if (SoftFloat)
1757      Builder.defineMacro("__SOFTFP__");
1758
1759    if (CPU == "xscale")
1760      Builder.defineMacro("__XSCALE__");
1761
1762    bool IsThumb2 = IsThumb && (CPUArch == "6T2" || CPUArch.startswith("7"));
1763    if (IsThumb) {
1764      Builder.defineMacro("__THUMBEL__");
1765      Builder.defineMacro("__thumb__");
1766      if (IsThumb2)
1767        Builder.defineMacro("__thumb2__");
1768    }
1769
1770    // Note, this is always on in gcc, even though it doesn't make sense.
1771    Builder.defineMacro("__APCS_32__");
1772
1773    if (FPUModeIsVFP((FPUMode) FPU))
1774      Builder.defineMacro("__VFP_FP__");
1775
1776    // This only gets set when Neon instructions are actually available, unlike
1777    // the VFP define, hence the soft float and arch check. This is subtly
1778    // different from gcc, we follow the intent which was that it should be set
1779    // when Neon instructions are actually available.
1780    if (FPU == NeonFPU && !SoftFloat && IsThumb2)
1781      Builder.defineMacro("__ARM_NEON__");
1782  }
1783  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1784                                 unsigned &NumRecords) const {
1785    Records = BuiltinInfo;
1786    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
1787  }
1788  virtual const char *getVAListDeclaration() const {
1789    return "typedef char* __builtin_va_list;";
1790  }
1791  virtual void getGCCRegNames(const char * const *&Names,
1792                              unsigned &NumNames) const;
1793  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1794                                unsigned &NumAliases) const;
1795  virtual bool validateAsmConstraint(const char *&Name,
1796                                     TargetInfo::ConstraintInfo &Info) const {
1797    // FIXME: Check if this is complete
1798    switch (*Name) {
1799    default:
1800    case 'l': // r0-r7
1801    case 'h': // r8-r15
1802    case 'w': // VFP Floating point register single precision
1803    case 'P': // VFP Floating point register double precision
1804      Info.setAllowsRegister();
1805      return true;
1806    }
1807    return false;
1808  }
1809  virtual const char *getClobbers() const {
1810    // FIXME: Is this really right?
1811    return "";
1812  }
1813};
1814
1815const char * const ARMTargetInfo::GCCRegNames[] = {
1816  // Integer registers
1817  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1818  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
1819
1820  // Float registers
1821  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
1822  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
1823  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
1824  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31"
1825
1826  // FIXME: Need double and NEON registers, but we need support for aliasing
1827  // multiple registers for that.
1828};
1829
1830void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
1831                                   unsigned &NumNames) const {
1832  Names = GCCRegNames;
1833  NumNames = llvm::array_lengthof(GCCRegNames);
1834}
1835
1836const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
1837  { { "a1" }, "r0" },
1838  { { "a2" }, "r1" },
1839  { { "a3" }, "r2" },
1840  { { "a4" }, "r3" },
1841  { { "v1" }, "r4" },
1842  { { "v2" }, "r5" },
1843  { { "v3" }, "r6" },
1844  { { "v4" }, "r7" },
1845  { { "v5" }, "r8" },
1846  { { "v6", "rfp" }, "r9" },
1847  { { "sl" }, "r10" },
1848  { { "fp" }, "r11" },
1849  { { "ip" }, "r12" },
1850  { { "r13" }, "sp" },
1851  { { "r14" }, "lr" },
1852  { { "r15" }, "pc" },
1853};
1854
1855void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1856                                       unsigned &NumAliases) const {
1857  Aliases = GCCRegAliases;
1858  NumAliases = llvm::array_lengthof(GCCRegAliases);
1859}
1860
1861const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
1862#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, false },
1863#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER, false },
1864#include "clang/Basic/BuiltinsARM.def"
1865};
1866} // end anonymous namespace.
1867
1868
1869namespace {
1870class DarwinARMTargetInfo :
1871  public DarwinTargetInfo<ARMTargetInfo> {
1872protected:
1873  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
1874                            MacroBuilder &Builder) const {
1875    getDarwinDefines(Builder, Opts, Triple);
1876  }
1877
1878public:
1879  DarwinARMTargetInfo(const std::string& triple)
1880    : DarwinTargetInfo<ARMTargetInfo>(triple) {
1881    HasAlignMac68kSupport = true;
1882  }
1883};
1884} // end anonymous namespace.
1885
1886namespace {
1887class SparcV8TargetInfo : public TargetInfo {
1888  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1889  static const char * const GCCRegNames[];
1890public:
1891  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
1892    // FIXME: Support Sparc quad-precision long double?
1893    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1894                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
1895  }
1896  virtual void getTargetDefines(const LangOptions &Opts,
1897                                MacroBuilder &Builder) const {
1898    DefineStd(Builder, "sparc", Opts);
1899    Builder.defineMacro("__sparcv8");
1900    Builder.defineMacro("__REGISTER_PREFIX__", "");
1901  }
1902  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1903                                 unsigned &NumRecords) const {
1904    // FIXME: Implement!
1905  }
1906  virtual const char *getVAListDeclaration() const {
1907    return "typedef void* __builtin_va_list;";
1908  }
1909  virtual void getGCCRegNames(const char * const *&Names,
1910                              unsigned &NumNames) const;
1911  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1912                                unsigned &NumAliases) const;
1913  virtual bool validateAsmConstraint(const char *&Name,
1914                                     TargetInfo::ConstraintInfo &info) const {
1915    // FIXME: Implement!
1916    return false;
1917  }
1918  virtual const char *getClobbers() const {
1919    // FIXME: Implement!
1920    return "";
1921  }
1922};
1923
1924const char * const SparcV8TargetInfo::GCCRegNames[] = {
1925  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1926  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1927  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
1928  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
1929};
1930
1931void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
1932                                       unsigned &NumNames) const {
1933  Names = GCCRegNames;
1934  NumNames = llvm::array_lengthof(GCCRegNames);
1935}
1936
1937const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
1938  { { "g0" }, "r0" },
1939  { { "g1" }, "r1" },
1940  { { "g2" }, "r2" },
1941  { { "g3" }, "r3" },
1942  { { "g4" }, "r4" },
1943  { { "g5" }, "r5" },
1944  { { "g6" }, "r6" },
1945  { { "g7" }, "r7" },
1946  { { "o0" }, "r8" },
1947  { { "o1" }, "r9" },
1948  { { "o2" }, "r10" },
1949  { { "o3" }, "r11" },
1950  { { "o4" }, "r12" },
1951  { { "o5" }, "r13" },
1952  { { "o6", "sp" }, "r14" },
1953  { { "o7" }, "r15" },
1954  { { "l0" }, "r16" },
1955  { { "l1" }, "r17" },
1956  { { "l2" }, "r18" },
1957  { { "l3" }, "r19" },
1958  { { "l4" }, "r20" },
1959  { { "l5" }, "r21" },
1960  { { "l6" }, "r22" },
1961  { { "l7" }, "r23" },
1962  { { "i0" }, "r24" },
1963  { { "i1" }, "r25" },
1964  { { "i2" }, "r26" },
1965  { { "i3" }, "r27" },
1966  { { "i4" }, "r28" },
1967  { { "i5" }, "r29" },
1968  { { "i6", "fp" }, "r30" },
1969  { { "i7" }, "r31" },
1970};
1971
1972void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1973                                         unsigned &NumAliases) const {
1974  Aliases = GCCRegAliases;
1975  NumAliases = llvm::array_lengthof(GCCRegAliases);
1976}
1977} // end anonymous namespace.
1978
1979namespace {
1980class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
1981public:
1982  AuroraUXSparcV8TargetInfo(const std::string& triple) :
1983      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
1984    SizeType = UnsignedInt;
1985    PtrDiffType = SignedInt;
1986  }
1987};
1988class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
1989public:
1990  SolarisSparcV8TargetInfo(const std::string& triple) :
1991      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
1992    SizeType = UnsignedInt;
1993    PtrDiffType = SignedInt;
1994  }
1995};
1996} // end anonymous namespace.
1997
1998namespace {
1999  class MSP430TargetInfo : public TargetInfo {
2000    static const char * const GCCRegNames[];
2001  public:
2002    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
2003      TLSSupported = false;
2004      IntWidth = 16; IntAlign = 16;
2005      LongWidth = 32; LongLongWidth = 64;
2006      LongAlign = LongLongAlign = 16;
2007      PointerWidth = 16; PointerAlign = 16;
2008      SizeType = UnsignedInt;
2009      IntMaxType = SignedLong;
2010      UIntMaxType = UnsignedLong;
2011      IntPtrType = SignedShort;
2012      PtrDiffType = SignedInt;
2013      SigAtomicType = SignedLong;
2014      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
2015   }
2016    virtual void getTargetDefines(const LangOptions &Opts,
2017                                  MacroBuilder &Builder) const {
2018      Builder.defineMacro("MSP430");
2019      Builder.defineMacro("__MSP430__");
2020      // FIXME: defines for different 'flavours' of MCU
2021    }
2022    virtual void getTargetBuiltins(const Builtin::Info *&Records,
2023                                   unsigned &NumRecords) const {
2024     // FIXME: Implement.
2025      Records = 0;
2026      NumRecords = 0;
2027    }
2028    virtual void getGCCRegNames(const char * const *&Names,
2029                                unsigned &NumNames) const;
2030    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2031                                  unsigned &NumAliases) const {
2032      // No aliases.
2033      Aliases = 0;
2034      NumAliases = 0;
2035    }
2036    virtual bool validateAsmConstraint(const char *&Name,
2037                                       TargetInfo::ConstraintInfo &info) const {
2038      // No target constraints for now.
2039      return false;
2040    }
2041    virtual const char *getClobbers() const {
2042      // FIXME: Is this really right?
2043      return "";
2044    }
2045    virtual const char *getVAListDeclaration() const {
2046      // FIXME: implement
2047      return "typedef char* __builtin_va_list;";
2048   }
2049  };
2050
2051  const char * const MSP430TargetInfo::GCCRegNames[] = {
2052    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2053    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2054  };
2055
2056  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
2057                                        unsigned &NumNames) const {
2058    Names = GCCRegNames;
2059    NumNames = llvm::array_lengthof(GCCRegNames);
2060  }
2061}
2062
2063
2064namespace {
2065  class SystemZTargetInfo : public TargetInfo {
2066    static const char * const GCCRegNames[];
2067  public:
2068    SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) {
2069      TLSSupported = false;
2070      IntWidth = IntAlign = 32;
2071      LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
2072      PointerWidth = PointerAlign = 64;
2073      DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-"
2074      "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64";
2075   }
2076    virtual void getTargetDefines(const LangOptions &Opts,
2077                                  MacroBuilder &Builder) const {
2078      Builder.defineMacro("__s390__");
2079      Builder.defineMacro("__s390x__");
2080    }
2081    virtual void getTargetBuiltins(const Builtin::Info *&Records,
2082                                   unsigned &NumRecords) const {
2083      // FIXME: Implement.
2084      Records = 0;
2085      NumRecords = 0;
2086    }
2087
2088    virtual void getGCCRegNames(const char * const *&Names,
2089                                unsigned &NumNames) const;
2090    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2091                                  unsigned &NumAliases) const {
2092      // No aliases.
2093      Aliases = 0;
2094      NumAliases = 0;
2095    }
2096    virtual bool validateAsmConstraint(const char *&Name,
2097                                       TargetInfo::ConstraintInfo &info) const {
2098      // FIXME: implement
2099      return true;
2100    }
2101    virtual const char *getClobbers() const {
2102      // FIXME: Is this really right?
2103      return "";
2104    }
2105    virtual const char *getVAListDeclaration() const {
2106      // FIXME: implement
2107      return "typedef char* __builtin_va_list;";
2108   }
2109  };
2110
2111  const char * const SystemZTargetInfo::GCCRegNames[] = {
2112    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2113    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2114  };
2115
2116  void SystemZTargetInfo::getGCCRegNames(const char * const *&Names,
2117                                         unsigned &NumNames) const {
2118    Names = GCCRegNames;
2119    NumNames = llvm::array_lengthof(GCCRegNames);
2120  }
2121}
2122
2123namespace {
2124  class BlackfinTargetInfo : public TargetInfo {
2125    static const char * const GCCRegNames[];
2126  public:
2127    BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) {
2128      TLSSupported = false;
2129      DoubleAlign = 32;
2130      LongLongAlign = 32;
2131      LongDoubleAlign = 32;
2132      DescriptionString = "e-p:32:32-i64:32-f64:32-n32";
2133    }
2134
2135    virtual void getTargetDefines(const LangOptions &Opts,
2136                                  MacroBuilder &Builder) const {
2137      DefineStd(Builder, "bfin", Opts);
2138      DefineStd(Builder, "BFIN", Opts);
2139      Builder.defineMacro("__ADSPBLACKFIN__");
2140      // FIXME: This one is really dependent on -mcpu
2141      Builder.defineMacro("__ADSPLPBLACKFIN__");
2142      // FIXME: Add cpu-dependent defines and __SILICON_REVISION__
2143    }
2144
2145    virtual void getTargetBuiltins(const Builtin::Info *&Records,
2146                                   unsigned &NumRecords) const {
2147      // FIXME: Implement.
2148      Records = 0;
2149      NumRecords = 0;
2150    }
2151
2152    virtual void getGCCRegNames(const char * const *&Names,
2153                                unsigned &NumNames) const;
2154
2155    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2156                                  unsigned &NumAliases) const {
2157      // No aliases.
2158      Aliases = 0;
2159      NumAliases = 0;
2160    }
2161
2162    virtual bool validateAsmConstraint(const char *&Name,
2163                                       TargetInfo::ConstraintInfo &Info) const {
2164      if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) {
2165        Info.setAllowsRegister();
2166        return true;
2167      }
2168      return false;
2169    }
2170
2171    virtual const char *getClobbers() const {
2172      return "";
2173    }
2174
2175    virtual const char *getVAListDeclaration() const {
2176      return "typedef char* __builtin_va_list;";
2177    }
2178  };
2179
2180  const char * const BlackfinTargetInfo::GCCRegNames[] = {
2181    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2182    "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
2183    "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3",
2184    "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3",
2185    "a0", "a1", "cc",
2186    "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp",
2187    "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1"
2188  };
2189
2190  void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names,
2191                                          unsigned &NumNames) const {
2192    Names = GCCRegNames;
2193    NumNames = llvm::array_lengthof(GCCRegNames);
2194  }
2195}
2196
2197namespace {
2198
2199  // LLVM and Clang cannot be used directly to output native binaries for
2200  // target, but is used to compile C code to llvm bitcode with correct
2201  // type and alignment information.
2202  //
2203  // TCE uses the llvm bitcode as input and uses it for generating customized
2204  // target processor and program binary. TCE co-design environment is
2205  // publicly available in http://tce.cs.tut.fi
2206
2207  class TCETargetInfo : public TargetInfo{
2208  public:
2209    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
2210      TLSSupported = false;
2211      IntWidth = 32;
2212      LongWidth = LongLongWidth = 32;
2213      PointerWidth = 32;
2214      IntAlign = 32;
2215      LongAlign = LongLongAlign = 32;
2216      PointerAlign = 32;
2217      SizeType = UnsignedInt;
2218      IntMaxType = SignedLong;
2219      UIntMaxType = UnsignedLong;
2220      IntPtrType = SignedInt;
2221      PtrDiffType = SignedInt;
2222      FloatWidth = 32;
2223      FloatAlign = 32;
2224      DoubleWidth = 32;
2225      DoubleAlign = 32;
2226      LongDoubleWidth = 32;
2227      LongDoubleAlign = 32;
2228      FloatFormat = &llvm::APFloat::IEEEsingle;
2229      DoubleFormat = &llvm::APFloat::IEEEsingle;
2230      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
2231      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
2232                          "i16:16:32-i32:32:32-i64:32:32-"
2233                          "f32:32:32-f64:64:64-v64:64:64-"
2234                          "v128:128:128-a0:0:64-n32";
2235    }
2236
2237    virtual void getTargetDefines(const LangOptions &Opts,
2238                                  MacroBuilder &Builder) const {
2239      DefineStd(Builder, "tce", Opts);
2240      Builder.defineMacro("__TCE__");
2241      Builder.defineMacro("__TCE_V1__");
2242    }
2243    virtual void getTargetBuiltins(const Builtin::Info *&Records,
2244                                   unsigned &NumRecords) const {}
2245    virtual const char *getClobbers() const {
2246      return "";
2247    }
2248    virtual const char *getVAListDeclaration() const {
2249      return "typedef void* __builtin_va_list;";
2250    }
2251    virtual void getGCCRegNames(const char * const *&Names,
2252                                unsigned &NumNames) const {}
2253    virtual bool validateAsmConstraint(const char *&Name,
2254                                       TargetInfo::ConstraintInfo &info) const {
2255      return true;
2256    }
2257    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2258                                  unsigned &NumAliases) const {}
2259  };
2260}
2261
2262namespace {
2263class MipsTargetInfo : public TargetInfo {
2264  std::string ABI, CPU;
2265  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2266  static const char * const GCCRegNames[];
2267public:
2268  MipsTargetInfo(const std::string& triple) : TargetInfo(triple), ABI("o32") {
2269    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
2270                        "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32";
2271  }
2272  virtual const char *getABI() const { return ABI.c_str(); }
2273  virtual bool setABI(const std::string &Name) {
2274
2275    if ((Name == "o32") || (Name == "eabi")) {
2276      ABI = Name;
2277      return true;
2278    } else
2279      return false;
2280  }
2281  virtual bool setCPU(const std::string &Name) {
2282    CPU = Name;
2283    return true;
2284  }
2285  void getDefaultFeatures(const std::string &CPU,
2286                          llvm::StringMap<bool> &Features) const {
2287    Features[ABI] = true;
2288    Features[CPU] = true;
2289  }
2290  virtual void getArchDefines(const LangOptions &Opts,
2291                                MacroBuilder &Builder) const {
2292    if (ABI == "o32")
2293      Builder.defineMacro("__mips_o32");
2294    else if (ABI == "eabi")
2295      Builder.defineMacro("__mips_eabi");
2296  }
2297  virtual void getTargetDefines(const LangOptions &Opts,
2298                                MacroBuilder &Builder) const {
2299    DefineStd(Builder, "mips", Opts);
2300    Builder.defineMacro("_mips");
2301    DefineStd(Builder, "MIPSEB", Opts);
2302    Builder.defineMacro("_MIPSEB");
2303    Builder.defineMacro("__REGISTER_PREFIX__", "");
2304    getArchDefines(Opts, Builder);
2305  }
2306  virtual void getTargetBuiltins(const Builtin::Info *&Records,
2307                                 unsigned &NumRecords) const {
2308    // FIXME: Implement!
2309  }
2310  virtual const char *getVAListDeclaration() const {
2311    return "typedef void* __builtin_va_list;";
2312  }
2313  virtual void getGCCRegNames(const char * const *&Names,
2314                              unsigned &NumNames) const;
2315  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2316                                unsigned &NumAliases) const;
2317  virtual bool validateAsmConstraint(const char *&Name,
2318                                     TargetInfo::ConstraintInfo &Info) const {
2319    switch (*Name) {
2320    default:
2321    case 'r': // CPU registers.
2322    case 'd': // Equivalent to "r" unless generating MIPS16 code.
2323    case 'y': // Equivalent to "r", backwards compatibility only.
2324    case 'f': // floating-point registers.
2325      Info.setAllowsRegister();
2326      return true;
2327    }
2328    return false;
2329  }
2330
2331  virtual const char *getClobbers() const {
2332    // FIXME: Implement!
2333    return "";
2334  }
2335};
2336
2337const char * const MipsTargetInfo::GCCRegNames[] = {
2338  "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
2339  "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
2340  "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
2341  "$24",  "$25",  "$26",  "$27",  "$28",  "$sp",  "$fp",  "$31",
2342  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
2343  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
2344  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
2345  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
2346  "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
2347  "$fcc5","$fcc6","$fcc7"
2348};
2349
2350void MipsTargetInfo::getGCCRegNames(const char * const *&Names,
2351                                       unsigned &NumNames) const {
2352  Names = GCCRegNames;
2353  NumNames = llvm::array_lengthof(GCCRegNames);
2354}
2355
2356const TargetInfo::GCCRegAlias MipsTargetInfo::GCCRegAliases[] = {
2357  { { "at" },  "$1" },
2358  { { "v0" },  "$2" },
2359  { { "v1" },  "$3" },
2360  { { "a0" },  "$4" },
2361  { { "a1" },  "$5" },
2362  { { "a2" },  "$6" },
2363  { { "a3" },  "$7" },
2364  { { "t0" },  "$8" },
2365  { { "t1" },  "$9" },
2366  { { "t2" }, "$10" },
2367  { { "t3" }, "$11" },
2368  { { "t4" }, "$12" },
2369  { { "t5" }, "$13" },
2370  { { "t6" }, "$14" },
2371  { { "t7" }, "$15" },
2372  { { "s0" }, "$16" },
2373  { { "s1" }, "$17" },
2374  { { "s2" }, "$18" },
2375  { { "s3" }, "$19" },
2376  { { "s4" }, "$20" },
2377  { { "s5" }, "$21" },
2378  { { "s6" }, "$22" },
2379  { { "s7" }, "$23" },
2380  { { "t8" }, "$24" },
2381  { { "t9" }, "$25" },
2382  { { "k0" }, "$26" },
2383  { { "k1" }, "$27" },
2384  { { "gp" }, "$28" },
2385  { { "sp" }, "$29" },
2386  { { "fp" }, "$30" },
2387  { { "ra" }, "$31" }
2388};
2389
2390void MipsTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2391                                         unsigned &NumAliases) const {
2392  Aliases = GCCRegAliases;
2393  NumAliases = llvm::array_lengthof(GCCRegAliases);
2394}
2395} // end anonymous namespace.
2396
2397namespace {
2398class MipselTargetInfo : public MipsTargetInfo {
2399public:
2400  MipselTargetInfo(const std::string& triple) : MipsTargetInfo(triple) {
2401    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
2402                        "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32";
2403  }
2404
2405  virtual void getTargetDefines(const LangOptions &Opts,
2406                                MacroBuilder &Builder) const;
2407};
2408
2409void MipselTargetInfo::getTargetDefines(const LangOptions &Opts,
2410                                        MacroBuilder &Builder) const {
2411  DefineStd(Builder, "mips", Opts);
2412  Builder.defineMacro("_mips");
2413  DefineStd(Builder, "MIPSEL", Opts);
2414  Builder.defineMacro("_MIPSEL");
2415  Builder.defineMacro("__REGISTER_PREFIX__", "");
2416  getArchDefines(Opts, Builder);
2417}
2418} // end anonymous namespace.
2419
2420//===----------------------------------------------------------------------===//
2421// Driver code
2422//===----------------------------------------------------------------------===//
2423
2424static TargetInfo *AllocateTarget(const std::string &T) {
2425  llvm::Triple Triple(T);
2426  llvm::Triple::OSType os = Triple.getOS();
2427
2428  switch (Triple.getArch()) {
2429  default:
2430    return NULL;
2431
2432  case llvm::Triple::arm:
2433  case llvm::Triple::thumb:
2434    switch (os) {
2435    case llvm::Triple::Linux:
2436      return new LinuxTargetInfo<ARMTargetInfo>(T);
2437    case llvm::Triple::Darwin:
2438      return new DarwinARMTargetInfo(T);
2439    case llvm::Triple::FreeBSD:
2440      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
2441    default:
2442      return new ARMTargetInfo(T);
2443    }
2444
2445  case llvm::Triple::bfin:
2446    return new BlackfinTargetInfo(T);
2447
2448  case llvm::Triple::msp430:
2449    return new MSP430TargetInfo(T);
2450
2451  case llvm::Triple::mips:
2452    if (os == llvm::Triple::Psp)
2453      return new PSPTargetInfo<MipsTargetInfo>(T);
2454    if (os == llvm::Triple::Linux)
2455      return new LinuxTargetInfo<MipsTargetInfo>(T);
2456    return new MipsTargetInfo(T);
2457
2458  case llvm::Triple::mipsel:
2459    if (os == llvm::Triple::Psp)
2460      return new PSPTargetInfo<MipselTargetInfo>(T);
2461    if (os == llvm::Triple::Linux)
2462      return new LinuxTargetInfo<MipselTargetInfo>(T);
2463    return new MipselTargetInfo(T);
2464
2465  case llvm::Triple::ppc:
2466    if (os == llvm::Triple::Darwin)
2467      return new DarwinPPCTargetInfo(T);
2468    else if (os == llvm::Triple::FreeBSD)
2469      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
2470    return new PPC32TargetInfo(T);
2471
2472  case llvm::Triple::ppc64:
2473    if (os == llvm::Triple::Darwin)
2474      return new DarwinPPC64TargetInfo(T);
2475    else if (os == llvm::Triple::Lv2)
2476      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
2477    else if (os == llvm::Triple::FreeBSD)
2478      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
2479    return new PPC64TargetInfo(T);
2480
2481  case llvm::Triple::mblaze:
2482    return new MBlazeTargetInfo(T);
2483
2484  case llvm::Triple::sparc:
2485    if (os == llvm::Triple::AuroraUX)
2486      return new AuroraUXSparcV8TargetInfo(T);
2487    if (os == llvm::Triple::Solaris)
2488      return new SolarisSparcV8TargetInfo(T);
2489    return new SparcV8TargetInfo(T);
2490
2491  // FIXME: Need a real SPU target.
2492  case llvm::Triple::cellspu:
2493    return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
2494
2495  case llvm::Triple::systemz:
2496    return new SystemZTargetInfo(T);
2497
2498  case llvm::Triple::tce:
2499    return new TCETargetInfo(T);
2500
2501  case llvm::Triple::x86:
2502    switch (os) {
2503    case llvm::Triple::AuroraUX:
2504      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
2505    case llvm::Triple::Darwin:
2506      return new DarwinI386TargetInfo(T);
2507    case llvm::Triple::Linux:
2508      return new LinuxTargetInfo<X86_32TargetInfo>(T);
2509    case llvm::Triple::DragonFly:
2510      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
2511    case llvm::Triple::NetBSD:
2512      return new NetBSDTargetInfo<X86_32TargetInfo>(T);
2513    case llvm::Triple::OpenBSD:
2514      return new OpenBSDI386TargetInfo(T);
2515    case llvm::Triple::FreeBSD:
2516      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
2517    case llvm::Triple::Minix:
2518      return new MinixTargetInfo<X86_32TargetInfo>(T);
2519    case llvm::Triple::Solaris:
2520      return new SolarisTargetInfo<X86_32TargetInfo>(T);
2521    case llvm::Triple::Cygwin:
2522      return new CygwinX86_32TargetInfo(T);
2523    case llvm::Triple::MinGW32:
2524      return new MinGWX86_32TargetInfo(T);
2525    case llvm::Triple::Win32:
2526      return new VisualStudioWindowsX86_32TargetInfo(T);
2527    case llvm::Triple::Haiku:
2528      return new HaikuX86_32TargetInfo(T);
2529    default:
2530      return new X86_32TargetInfo(T);
2531    }
2532
2533  case llvm::Triple::x86_64:
2534    switch (os) {
2535    case llvm::Triple::AuroraUX:
2536      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
2537    case llvm::Triple::Darwin:
2538      return new DarwinX86_64TargetInfo(T);
2539    case llvm::Triple::Linux:
2540      return new LinuxTargetInfo<X86_64TargetInfo>(T);
2541    case llvm::Triple::DragonFly:
2542      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
2543    case llvm::Triple::NetBSD:
2544      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
2545    case llvm::Triple::OpenBSD:
2546      return new OpenBSDX86_64TargetInfo(T);
2547    case llvm::Triple::FreeBSD:
2548      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
2549    case llvm::Triple::Solaris:
2550      return new SolarisTargetInfo<X86_64TargetInfo>(T);
2551    case llvm::Triple::MinGW64:
2552      return new MinGWX86_64TargetInfo(T);
2553    case llvm::Triple::Win32:   // This is what Triple.h supports now.
2554      return new VisualStudioWindowsX86_64TargetInfo(T);
2555    default:
2556      return new X86_64TargetInfo(T);
2557    }
2558  }
2559}
2560
2561/// CreateTargetInfo - Return the target info object for the specified target
2562/// triple.
2563TargetInfo *TargetInfo::CreateTargetInfo(Diagnostic &Diags,
2564                                         TargetOptions &Opts) {
2565  llvm::Triple Triple(Opts.Triple);
2566
2567  // Construct the target
2568  llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
2569  if (!Target) {
2570    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
2571    return 0;
2572  }
2573
2574  // Set the target CPU if specified.
2575  if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
2576    Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
2577    return 0;
2578  }
2579
2580  // Set the target ABI if specified.
2581  if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
2582    Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
2583    return 0;
2584  }
2585
2586  // Set the target C++ ABI.
2587  if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
2588    Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
2589    return 0;
2590  }
2591
2592  // Compute the default target features, we need the target to handle this
2593  // because features may have dependencies on one another.
2594  llvm::StringMap<bool> Features;
2595  Target->getDefaultFeatures(Opts.CPU, Features);
2596
2597  // Apply the user specified deltas.
2598  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
2599         ie = Opts.Features.end(); it != ie; ++it) {
2600    const char *Name = it->c_str();
2601
2602    // Apply the feature via the target.
2603    if ((Name[0] != '-' && Name[0] != '+') ||
2604        !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) {
2605      Diags.Report(diag::err_target_invalid_feature) << Name;
2606      return 0;
2607    }
2608  }
2609
2610  // Add the features to the compile options.
2611  //
2612  // FIXME: If we are completely confident that we have the right set, we only
2613  // need to pass the minuses.
2614  Opts.Features.clear();
2615  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
2616         ie = Features.end(); it != ie; ++it)
2617    Opts.Features.push_back(std::string(it->second ? "+" : "-") + it->first());
2618  Target->HandleTargetFeatures(Opts.Features);
2619
2620  return Target.take();
2621}
2622