Targets.cpp revision 3c0bc15afbcbbf6942a64798ba8a23bb8d9a77d9 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include "llvm/Support/ErrorHandling.h"
30#include "llvm/Type.h"
31#include <algorithm>
32using namespace clang;
33
34//===----------------------------------------------------------------------===//
35//  Common code shared among targets.
36//===----------------------------------------------------------------------===//
37
38/// DefineStd - Define a macro name and standard variants.  For example if
39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
40/// when in GNU mode.
41static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42                      const LangOptions &Opts) {
43  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44
45  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46  // in the user's namespace.
47  if (Opts.GNUMode)
48    Builder.defineMacro(MacroName);
49
50  // Define __unix.
51  Builder.defineMacro("__" + MacroName);
52
53  // Define __unix__.
54  Builder.defineMacro("__" + MacroName + "__");
55}
56
57static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName,
58                            bool Tuning = true) {
59  Builder.defineMacro("__" + CPUName);
60  Builder.defineMacro("__" + CPUName + "__");
61  if (Tuning)
62    Builder.defineMacro("__tune_" + CPUName + "__");
63}
64
65//===----------------------------------------------------------------------===//
66// Defines specific to certain operating systems.
67//===----------------------------------------------------------------------===//
68
69namespace {
70template<typename TgtInfo>
71class OSTargetInfo : public TgtInfo {
72protected:
73  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
74                            MacroBuilder &Builder) const=0;
75public:
76  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
77  virtual void getTargetDefines(const LangOptions &Opts,
78                                MacroBuilder &Builder) const {
79    TgtInfo::getTargetDefines(Opts, Builder);
80    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
81  }
82
83};
84} // end anonymous namespace
85
86
87static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
88                             const llvm::Triple &Triple,
89                             StringRef &PlatformName,
90                             VersionTuple &PlatformMinVersion) {
91  Builder.defineMacro("__APPLE_CC__", "5621");
92  Builder.defineMacro("__APPLE__");
93  Builder.defineMacro("__MACH__");
94  Builder.defineMacro("OBJC_NEW_PROPERTIES");
95
96  if (!Opts.ObjCAutoRefCount) {
97    // __weak is always defined, for use in blocks and with objc pointers.
98    Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
99
100    // Darwin defines __strong even in C mode (just to nothing).
101    if (Opts.getGC() != LangOptions::NonGC)
102      Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
103    else
104      Builder.defineMacro("__strong", "");
105
106    // __unsafe_unretained is defined to nothing in non-ARC mode. We even
107    // allow this in C, since one might have block pointers in structs that
108    // are used in pure C code and in Objective-C ARC.
109    Builder.defineMacro("__unsafe_unretained", "");
110  }
111
112  if (Opts.Static)
113    Builder.defineMacro("__STATIC__");
114  else
115    Builder.defineMacro("__DYNAMIC__");
116
117  if (Opts.POSIXThreads)
118    Builder.defineMacro("_REENTRANT");
119
120  // Get the platform type and version number from the triple.
121  unsigned Maj, Min, Rev;
122  if (Triple.isMacOSX()) {
123    Triple.getMacOSXVersion(Maj, Min, Rev);
124    PlatformName = "macosx";
125  } else {
126    Triple.getOSVersion(Maj, Min, Rev);
127    PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
128  }
129
130  // If -target arch-pc-win32-macho option specified, we're
131  // generating code for Win32 ABI. No need to emit
132  // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
133  if (PlatformName == "win32") {
134    PlatformMinVersion = VersionTuple(Maj, Min, Rev);
135    return;
136  }
137
138  // Set the appropriate OS version define.
139  if (Triple.getOS() == llvm::Triple::IOS) {
140    assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
141    char Str[6];
142    Str[0] = '0' + Maj;
143    Str[1] = '0' + (Min / 10);
144    Str[2] = '0' + (Min % 10);
145    Str[3] = '0' + (Rev / 10);
146    Str[4] = '0' + (Rev % 10);
147    Str[5] = '\0';
148    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
149  } else {
150    // Note that the Driver allows versions which aren't representable in the
151    // define (because we only get a single digit for the minor and micro
152    // revision numbers). So, we limit them to the maximum representable
153    // version.
154    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
155    assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
156    char Str[5];
157    Str[0] = '0' + (Maj / 10);
158    Str[1] = '0' + (Maj % 10);
159    Str[2] = '0' + std::min(Min, 9U);
160    Str[3] = '0' + std::min(Rev, 9U);
161    Str[4] = '\0';
162    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
163  }
164
165  PlatformMinVersion = VersionTuple(Maj, Min, Rev);
166}
167
168namespace {
169template<typename Target>
170class DarwinTargetInfo : public OSTargetInfo<Target> {
171protected:
172  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
173                            MacroBuilder &Builder) const {
174    getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
175                     this->PlatformMinVersion);
176  }
177
178public:
179  DarwinTargetInfo(const std::string& triple) :
180    OSTargetInfo<Target>(triple) {
181      llvm::Triple T = llvm::Triple(triple);
182      this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
183      this->MCountName = "\01mcount";
184    }
185
186  virtual std::string isValidSectionSpecifier(StringRef SR) const {
187    // Let MCSectionMachO validate this.
188    StringRef Segment, Section;
189    unsigned TAA, StubSize;
190    bool HasTAA;
191    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
192                                                       TAA, HasTAA, StubSize);
193  }
194
195  virtual const char *getStaticInitSectionSpecifier() const {
196    // FIXME: We should return 0 when building kexts.
197    return "__TEXT,__StaticInit,regular,pure_instructions";
198  }
199
200  /// Darwin does not support protected visibility.  Darwin's "default"
201  /// is very similar to ELF's "protected";  Darwin requires a "weak"
202  /// attribute on declarations that can be dynamically replaced.
203  virtual bool hasProtectedVisibility() const {
204    return false;
205  }
206};
207
208
209// DragonFlyBSD Target
210template<typename Target>
211class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
212protected:
213  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
214                            MacroBuilder &Builder) const {
215    // DragonFly defines; list based off of gcc output
216    Builder.defineMacro("__DragonFly__");
217    Builder.defineMacro("__DragonFly_cc_version", "100001");
218    Builder.defineMacro("__ELF__");
219    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
220    Builder.defineMacro("__tune_i386__");
221    DefineStd(Builder, "unix", Opts);
222  }
223public:
224  DragonFlyBSDTargetInfo(const std::string &triple)
225    : OSTargetInfo<Target>(triple) {
226      this->UserLabelPrefix = "";
227
228      llvm::Triple Triple(triple);
229      switch (Triple.getArch()) {
230        default:
231        case llvm::Triple::x86:
232        case llvm::Triple::x86_64:
233          this->MCountName = ".mcount";
234          break;
235      }
236  }
237};
238
239// FreeBSD Target
240template<typename Target>
241class FreeBSDTargetInfo : public OSTargetInfo<Target> {
242protected:
243  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
244                            MacroBuilder &Builder) const {
245    // FreeBSD defines; list based off of gcc output
246
247    unsigned Release = Triple.getOSMajorVersion();
248    if (Release == 0U)
249      Release = 8;
250
251    Builder.defineMacro("__FreeBSD__", Twine(Release));
252    Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
253    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
254    DefineStd(Builder, "unix", Opts);
255    Builder.defineMacro("__ELF__");
256  }
257public:
258  FreeBSDTargetInfo(const std::string &triple)
259    : OSTargetInfo<Target>(triple) {
260      this->UserLabelPrefix = "";
261
262      llvm::Triple Triple(triple);
263      switch (Triple.getArch()) {
264        default:
265        case llvm::Triple::x86:
266        case llvm::Triple::x86_64:
267          this->MCountName = ".mcount";
268          break;
269        case llvm::Triple::mips:
270        case llvm::Triple::mipsel:
271        case llvm::Triple::ppc:
272        case llvm::Triple::ppc64:
273          this->MCountName = "_mcount";
274          break;
275        case llvm::Triple::arm:
276          this->MCountName = "__mcount";
277          break;
278      }
279
280    }
281};
282
283// Minix Target
284template<typename Target>
285class MinixTargetInfo : public OSTargetInfo<Target> {
286protected:
287  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
288                            MacroBuilder &Builder) const {
289    // Minix defines
290
291    Builder.defineMacro("__minix", "3");
292    Builder.defineMacro("_EM_WSIZE", "4");
293    Builder.defineMacro("_EM_PSIZE", "4");
294    Builder.defineMacro("_EM_SSIZE", "2");
295    Builder.defineMacro("_EM_LSIZE", "4");
296    Builder.defineMacro("_EM_FSIZE", "4");
297    Builder.defineMacro("_EM_DSIZE", "8");
298    Builder.defineMacro("__ELF__");
299    DefineStd(Builder, "unix", Opts);
300  }
301public:
302  MinixTargetInfo(const std::string &triple)
303    : OSTargetInfo<Target>(triple) {
304      this->UserLabelPrefix = "";
305    }
306};
307
308// Linux target
309template<typename Target>
310class LinuxTargetInfo : public OSTargetInfo<Target> {
311protected:
312  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
313                            MacroBuilder &Builder) const {
314    // Linux defines; list based off of gcc output
315    DefineStd(Builder, "unix", Opts);
316    DefineStd(Builder, "linux", Opts);
317    Builder.defineMacro("__gnu_linux__");
318    Builder.defineMacro("__ELF__");
319    if (Triple.getEnvironment() == llvm::Triple::ANDROIDEABI)
320      Builder.defineMacro("__ANDROID__", "1");
321    if (Opts.POSIXThreads)
322      Builder.defineMacro("_REENTRANT");
323    if (Opts.CPlusPlus)
324      Builder.defineMacro("_GNU_SOURCE");
325  }
326public:
327  LinuxTargetInfo(const std::string& triple)
328    : OSTargetInfo<Target>(triple) {
329    this->UserLabelPrefix = "";
330    this->WIntType = TargetInfo::UnsignedInt;
331  }
332
333  virtual const char *getStaticInitSectionSpecifier() const {
334    return ".text.startup";
335  }
336};
337
338// NetBSD Target
339template<typename Target>
340class NetBSDTargetInfo : public OSTargetInfo<Target> {
341protected:
342  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
343                            MacroBuilder &Builder) const {
344    // NetBSD defines; list based off of gcc output
345    Builder.defineMacro("__NetBSD__");
346    Builder.defineMacro("__unix__");
347    Builder.defineMacro("__ELF__");
348    if (Opts.POSIXThreads)
349      Builder.defineMacro("_POSIX_THREADS");
350  }
351public:
352  NetBSDTargetInfo(const std::string &triple)
353    : OSTargetInfo<Target>(triple) {
354      this->UserLabelPrefix = "";
355    }
356};
357
358// OpenBSD Target
359template<typename Target>
360class OpenBSDTargetInfo : public OSTargetInfo<Target> {
361protected:
362  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
363                            MacroBuilder &Builder) const {
364    // OpenBSD defines; list based off of gcc output
365
366    Builder.defineMacro("__OpenBSD__");
367    DefineStd(Builder, "unix", Opts);
368    Builder.defineMacro("__ELF__");
369    if (Opts.POSIXThreads)
370      Builder.defineMacro("_REENTRANT");
371  }
372public:
373  OpenBSDTargetInfo(const std::string &triple)
374    : OSTargetInfo<Target>(triple) {
375      this->UserLabelPrefix = "";
376
377      llvm::Triple Triple(triple);
378      switch (Triple.getArch()) {
379        default:
380        case llvm::Triple::x86:
381        case llvm::Triple::x86_64:
382        case llvm::Triple::arm:
383	case llvm::Triple::sparc:
384          this->MCountName = "__mcount";
385          break;
386        case llvm::Triple::mips64:
387        case llvm::Triple::mips64el:
388        case llvm::Triple::ppc:
389	case llvm::Triple::sparcv9:
390          this->MCountName = "_mcount";
391          break;
392      }
393  }
394};
395
396// PSP Target
397template<typename Target>
398class PSPTargetInfo : public OSTargetInfo<Target> {
399protected:
400  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
401                            MacroBuilder &Builder) const {
402    // PSP defines; list based on the output of the pspdev gcc toolchain.
403    Builder.defineMacro("PSP");
404    Builder.defineMacro("_PSP");
405    Builder.defineMacro("__psp__");
406    Builder.defineMacro("__ELF__");
407  }
408public:
409  PSPTargetInfo(const std::string& triple)
410    : OSTargetInfo<Target>(triple) {
411    this->UserLabelPrefix = "";
412  }
413};
414
415// PS3 PPU Target
416template<typename Target>
417class PS3PPUTargetInfo : public OSTargetInfo<Target> {
418protected:
419  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
420                            MacroBuilder &Builder) const {
421    // PS3 PPU defines.
422    Builder.defineMacro("__PPC__");
423    Builder.defineMacro("__PPU__");
424    Builder.defineMacro("__CELLOS_LV2__");
425    Builder.defineMacro("__ELF__");
426    Builder.defineMacro("__LP32__");
427    Builder.defineMacro("_ARCH_PPC64");
428    Builder.defineMacro("__powerpc64__");
429  }
430public:
431  PS3PPUTargetInfo(const std::string& triple)
432    : OSTargetInfo<Target>(triple) {
433    this->UserLabelPrefix = "";
434    this->LongWidth = this->LongAlign = 32;
435    this->PointerWidth = this->PointerAlign = 32;
436    this->IntMaxType = TargetInfo::SignedLongLong;
437    this->UIntMaxType = TargetInfo::UnsignedLongLong;
438    this->Int64Type = TargetInfo::SignedLongLong;
439    this->SizeType = TargetInfo::UnsignedInt;
440    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
441                              "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
442  }
443};
444
445// FIXME: Need a real SPU target.
446// PS3 SPU Target
447template<typename Target>
448class PS3SPUTargetInfo : public OSTargetInfo<Target> {
449protected:
450  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
451                            MacroBuilder &Builder) const {
452    // PS3 PPU defines.
453    Builder.defineMacro("__SPU__");
454    Builder.defineMacro("__ELF__");
455  }
456public:
457  PS3SPUTargetInfo(const std::string& triple)
458    : OSTargetInfo<Target>(triple) {
459    this->UserLabelPrefix = "";
460  }
461};
462
463// AuroraUX target
464template<typename Target>
465class AuroraUXTargetInfo : public OSTargetInfo<Target> {
466protected:
467  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
468                            MacroBuilder &Builder) const {
469    DefineStd(Builder, "sun", Opts);
470    DefineStd(Builder, "unix", Opts);
471    Builder.defineMacro("__ELF__");
472    Builder.defineMacro("__svr4__");
473    Builder.defineMacro("__SVR4");
474  }
475public:
476  AuroraUXTargetInfo(const std::string& triple)
477    : OSTargetInfo<Target>(triple) {
478    this->UserLabelPrefix = "";
479    this->WCharType = this->SignedLong;
480    // FIXME: WIntType should be SignedLong
481  }
482};
483
484// Solaris target
485template<typename Target>
486class SolarisTargetInfo : public OSTargetInfo<Target> {
487protected:
488  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
489                            MacroBuilder &Builder) const {
490    DefineStd(Builder, "sun", Opts);
491    DefineStd(Builder, "unix", Opts);
492    Builder.defineMacro("__ELF__");
493    Builder.defineMacro("__svr4__");
494    Builder.defineMacro("__SVR4");
495    // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and
496    // newer, but to 500 for everything else.  feature_test.h has a check to
497    // ensure that you are not using C99 with an old version of X/Open or C89
498    // with a new version.
499    if (Opts.C99 || Opts.C11)
500      Builder.defineMacro("_XOPEN_SOURCE", "600");
501    else
502      Builder.defineMacro("_XOPEN_SOURCE", "500");
503    if (Opts.CPlusPlus)
504      Builder.defineMacro("__C99FEATURES__");
505    Builder.defineMacro("_LARGEFILE_SOURCE");
506    Builder.defineMacro("_LARGEFILE64_SOURCE");
507    Builder.defineMacro("__EXTENSIONS__");
508    Builder.defineMacro("_REENTRANT");
509  }
510public:
511  SolarisTargetInfo(const std::string& triple)
512    : OSTargetInfo<Target>(triple) {
513    this->UserLabelPrefix = "";
514    this->WCharType = this->SignedInt;
515    // FIXME: WIntType should be SignedLong
516  }
517};
518
519// Windows target
520template<typename Target>
521class WindowsTargetInfo : public OSTargetInfo<Target> {
522protected:
523  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
524                            MacroBuilder &Builder) const {
525    Builder.defineMacro("_WIN32");
526  }
527  void getVisualStudioDefines(const LangOptions &Opts,
528                              MacroBuilder &Builder) const {
529    if (Opts.CPlusPlus) {
530      if (Opts.RTTI)
531        Builder.defineMacro("_CPPRTTI");
532
533      if (Opts.Exceptions)
534        Builder.defineMacro("_CPPUNWIND");
535    }
536
537    if (!Opts.CharIsSigned)
538      Builder.defineMacro("_CHAR_UNSIGNED");
539
540    // FIXME: POSIXThreads isn't exactly the option this should be defined for,
541    //        but it works for now.
542    if (Opts.POSIXThreads)
543      Builder.defineMacro("_MT");
544
545    if (Opts.MSCVersion != 0)
546      Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
547
548    if (Opts.MicrosoftExt) {
549      Builder.defineMacro("_MSC_EXTENSIONS");
550
551      if (Opts.CPlusPlus0x) {
552        Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
553        Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
554        Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
555      }
556    }
557
558    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
559  }
560
561public:
562  WindowsTargetInfo(const std::string &triple)
563    : OSTargetInfo<Target>(triple) {}
564};
565
566} // end anonymous namespace.
567
568//===----------------------------------------------------------------------===//
569// Specific target implementations.
570//===----------------------------------------------------------------------===//
571
572namespace {
573// PPC abstract base class
574class PPCTargetInfo : public TargetInfo {
575  static const Builtin::Info BuiltinInfo[];
576  static const char * const GCCRegNames[];
577  static const TargetInfo::GCCRegAlias GCCRegAliases[];
578public:
579  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {
580    LongDoubleWidth = LongDoubleAlign = 128;
581    LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
582  }
583
584  virtual void getTargetBuiltins(const Builtin::Info *&Records,
585                                 unsigned &NumRecords) const {
586    Records = BuiltinInfo;
587    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
588  }
589
590  virtual bool isCLZForZeroUndef() const { return false; }
591
592  virtual void getTargetDefines(const LangOptions &Opts,
593                                MacroBuilder &Builder) const;
594
595  virtual bool hasFeature(StringRef Feature) const;
596
597  virtual void getGCCRegNames(const char * const *&Names,
598                              unsigned &NumNames) const;
599  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
600                                unsigned &NumAliases) const;
601  virtual bool validateAsmConstraint(const char *&Name,
602                                     TargetInfo::ConstraintInfo &Info) const {
603    switch (*Name) {
604    default: return false;
605    case 'O': // Zero
606      break;
607    case 'b': // Base register
608    case 'f': // Floating point register
609      Info.setAllowsRegister();
610      break;
611    // FIXME: The following are added to allow parsing.
612    // I just took a guess at what the actions should be.
613    // Also, is more specific checking needed?  I.e. specific registers?
614    case 'd': // Floating point register (containing 64-bit value)
615    case 'v': // Altivec vector register
616      Info.setAllowsRegister();
617      break;
618    case 'w':
619      switch (Name[1]) {
620        case 'd':// VSX vector register to hold vector double data
621        case 'f':// VSX vector register to hold vector float data
622        case 's':// VSX vector register to hold scalar float data
623        case 'a':// Any VSX register
624          break;
625        default:
626          return false;
627      }
628      Info.setAllowsRegister();
629      Name++; // Skip over 'w'.
630      break;
631    case 'h': // `MQ', `CTR', or `LINK' register
632    case 'q': // `MQ' register
633    case 'c': // `CTR' register
634    case 'l': // `LINK' register
635    case 'x': // `CR' register (condition register) number 0
636    case 'y': // `CR' register (condition register)
637    case 'z': // `XER[CA]' carry bit (part of the XER register)
638      Info.setAllowsRegister();
639      break;
640    case 'I': // Signed 16-bit constant
641    case 'J': // Unsigned 16-bit constant shifted left 16 bits
642              //  (use `L' instead for SImode constants)
643    case 'K': // Unsigned 16-bit constant
644    case 'L': // Signed 16-bit constant shifted left 16 bits
645    case 'M': // Constant larger than 31
646    case 'N': // Exact power of 2
647    case 'P': // Constant whose negation is a signed 16-bit constant
648    case 'G': // Floating point constant that can be loaded into a
649              // register with one instruction per word
650    case 'H': // Integer/Floating point constant that can be loaded
651              // into a register using three instructions
652      break;
653    case 'm': // Memory operand. Note that on PowerPC targets, m can
654              // include addresses that update the base register. It
655              // is therefore only safe to use `m' in an asm statement
656              // if that asm statement accesses the operand exactly once.
657              // The asm statement must also use `%U<opno>' as a
658              // placeholder for the "update" flag in the corresponding
659              // load or store instruction. For example:
660              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
661              // is correct but:
662              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
663              // is not. Use es rather than m if you don't want the base
664              // register to be updated.
665    case 'e':
666      if (Name[1] != 's')
667          return false;
668              // es: A "stable" memory operand; that is, one which does not
669              // include any automodification of the base register. Unlike
670              // `m', this constraint can be used in asm statements that
671              // might access the operand several times, or that might not
672              // access it at all.
673      Info.setAllowsMemory();
674      Name++; // Skip over 'e'.
675      break;
676    case 'Q': // Memory operand that is an offset from a register (it is
677              // usually better to use `m' or `es' in asm statements)
678    case 'Z': // Memory operand that is an indexed or indirect from a
679              // register (it is usually better to use `m' or `es' in
680              // asm statements)
681      Info.setAllowsMemory();
682      Info.setAllowsRegister();
683      break;
684    case 'R': // AIX TOC entry
685    case 'a': // Address operand that is an indexed or indirect from a
686              // register (`p' is preferable for asm statements)
687    case 'S': // Constant suitable as a 64-bit mask operand
688    case 'T': // Constant suitable as a 32-bit mask operand
689    case 'U': // System V Release 4 small data area reference
690    case 't': // AND masks that can be performed by two rldic{l, r}
691              // instructions
692    case 'W': // Vector constant that does not require memory
693    case 'j': // Vector constant that is all zeros.
694      break;
695    // End FIXME.
696    }
697    return true;
698  }
699  virtual const char *getClobbers() const {
700    return "";
701  }
702};
703
704const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
705#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
706#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
707                                              ALL_LANGUAGES },
708#include "clang/Basic/BuiltinsPPC.def"
709};
710
711
712/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
713/// #defines that are not tied to a specific subtarget.
714void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
715                                     MacroBuilder &Builder) const {
716  // Target identification.
717  Builder.defineMacro("__ppc__");
718  Builder.defineMacro("_ARCH_PPC");
719  Builder.defineMacro("__powerpc__");
720  Builder.defineMacro("__POWERPC__");
721  if (PointerWidth == 64) {
722    Builder.defineMacro("_ARCH_PPC64");
723    Builder.defineMacro("_LP64");
724    Builder.defineMacro("__LP64__");
725    Builder.defineMacro("__powerpc64__");
726    Builder.defineMacro("__ppc64__");
727  } else {
728    Builder.defineMacro("__ppc__");
729  }
730
731  // Target properties.
732  if (getTriple().getOS() != llvm::Triple::NetBSD)
733    Builder.defineMacro("_BIG_ENDIAN");
734  Builder.defineMacro("__BIG_ENDIAN__");
735
736  // Subtarget options.
737  Builder.defineMacro("__NATURAL_ALIGNMENT__");
738  Builder.defineMacro("__REGISTER_PREFIX__", "");
739
740  // FIXME: Should be controlled by command line option.
741  Builder.defineMacro("__LONG_DOUBLE_128__");
742
743  if (Opts.AltiVec) {
744    Builder.defineMacro("__VEC__", "10206");
745    Builder.defineMacro("__ALTIVEC__");
746  }
747}
748
749bool PPCTargetInfo::hasFeature(StringRef Feature) const {
750  return Feature == "powerpc";
751}
752
753
754const char * const PPCTargetInfo::GCCRegNames[] = {
755  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
756  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
757  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
758  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
759  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
760  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
761  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
762  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
763  "mq", "lr", "ctr", "ap",
764  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
765  "xer",
766  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
767  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
768  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
769  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
770  "vrsave", "vscr",
771  "spe_acc", "spefscr",
772  "sfp"
773};
774
775void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
776                                   unsigned &NumNames) const {
777  Names = GCCRegNames;
778  NumNames = llvm::array_lengthof(GCCRegNames);
779}
780
781const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
782  // While some of these aliases do map to different registers
783  // they still share the same register name.
784  { { "0" }, "r0" },
785  { { "1"}, "r1" },
786  { { "2" }, "r2" },
787  { { "3" }, "r3" },
788  { { "4" }, "r4" },
789  { { "5" }, "r5" },
790  { { "6" }, "r6" },
791  { { "7" }, "r7" },
792  { { "8" }, "r8" },
793  { { "9" }, "r9" },
794  { { "10" }, "r10" },
795  { { "11" }, "r11" },
796  { { "12" }, "r12" },
797  { { "13" }, "r13" },
798  { { "14" }, "r14" },
799  { { "15" }, "r15" },
800  { { "16" }, "r16" },
801  { { "17" }, "r17" },
802  { { "18" }, "r18" },
803  { { "19" }, "r19" },
804  { { "20" }, "r20" },
805  { { "21" }, "r21" },
806  { { "22" }, "r22" },
807  { { "23" }, "r23" },
808  { { "24" }, "r24" },
809  { { "25" }, "r25" },
810  { { "26" }, "r26" },
811  { { "27" }, "r27" },
812  { { "28" }, "r28" },
813  { { "29" }, "r29" },
814  { { "30" }, "r30" },
815  { { "31" }, "r31" },
816  { { "fr0" }, "f0" },
817  { { "fr1" }, "f1" },
818  { { "fr2" }, "f2" },
819  { { "fr3" }, "f3" },
820  { { "fr4" }, "f4" },
821  { { "fr5" }, "f5" },
822  { { "fr6" }, "f6" },
823  { { "fr7" }, "f7" },
824  { { "fr8" }, "f8" },
825  { { "fr9" }, "f9" },
826  { { "fr10" }, "f10" },
827  { { "fr11" }, "f11" },
828  { { "fr12" }, "f12" },
829  { { "fr13" }, "f13" },
830  { { "fr14" }, "f14" },
831  { { "fr15" }, "f15" },
832  { { "fr16" }, "f16" },
833  { { "fr17" }, "f17" },
834  { { "fr18" }, "f18" },
835  { { "fr19" }, "f19" },
836  { { "fr20" }, "f20" },
837  { { "fr21" }, "f21" },
838  { { "fr22" }, "f22" },
839  { { "fr23" }, "f23" },
840  { { "fr24" }, "f24" },
841  { { "fr25" }, "f25" },
842  { { "fr26" }, "f26" },
843  { { "fr27" }, "f27" },
844  { { "fr28" }, "f28" },
845  { { "fr29" }, "f29" },
846  { { "fr30" }, "f30" },
847  { { "fr31" }, "f31" },
848  { { "cc" }, "cr0" },
849};
850
851void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
852                                     unsigned &NumAliases) const {
853  Aliases = GCCRegAliases;
854  NumAliases = llvm::array_lengthof(GCCRegAliases);
855}
856} // end anonymous namespace.
857
858namespace {
859class PPC32TargetInfo : public PPCTargetInfo {
860public:
861  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
862    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
863                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
864
865    switch (getTriple().getOS()) {
866    case llvm::Triple::Linux:
867    case llvm::Triple::FreeBSD:
868    case llvm::Triple::NetBSD:
869      SizeType = UnsignedInt;
870      PtrDiffType = SignedInt;
871      IntPtrType = SignedInt;
872      break;
873    default:
874      break;
875    }
876
877    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
878      LongDoubleWidth = LongDoubleAlign = 64;
879      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
880    }
881  }
882
883  virtual const char *getVAListDeclaration() const {
884    // This is the ELF definition, and is overridden by the Darwin sub-target
885    return "typedef struct __va_list_tag {"
886           "  unsigned char gpr;"
887           "  unsigned char fpr;"
888           "  unsigned short reserved;"
889           "  void* overflow_arg_area;"
890           "  void* reg_save_area;"
891           "} __builtin_va_list[1];";
892  }
893};
894} // end anonymous namespace.
895
896namespace {
897class PPC64TargetInfo : public PPCTargetInfo {
898public:
899  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
900    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
901    IntMaxType = SignedLong;
902    UIntMaxType = UnsignedLong;
903    Int64Type = SignedLong;
904    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
905                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
906
907    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
908      LongDoubleWidth = LongDoubleAlign = 64;
909      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
910    }
911  }
912  virtual const char *getVAListDeclaration() const {
913    return "typedef char* __builtin_va_list;";
914  }
915};
916} // end anonymous namespace.
917
918
919namespace {
920class DarwinPPC32TargetInfo :
921  public DarwinTargetInfo<PPC32TargetInfo> {
922public:
923  DarwinPPC32TargetInfo(const std::string& triple)
924    : DarwinTargetInfo<PPC32TargetInfo>(triple) {
925    HasAlignMac68kSupport = true;
926    BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
927    LongLongAlign = 32;
928    SuitableAlign = 128;
929    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
930                        "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32";
931  }
932  virtual const char *getVAListDeclaration() const {
933    return "typedef char* __builtin_va_list;";
934  }
935};
936
937class DarwinPPC64TargetInfo :
938  public DarwinTargetInfo<PPC64TargetInfo> {
939public:
940  DarwinPPC64TargetInfo(const std::string& triple)
941    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
942    HasAlignMac68kSupport = true;
943    SuitableAlign = 128;
944  }
945};
946} // end anonymous namespace.
947
948namespace {
949  static const unsigned NVPTXAddrSpaceMap[] = {
950    1,    // opencl_global
951    3,    // opencl_local
952    4,    // opencl_constant
953    1,    // cuda_device
954    4,    // cuda_constant
955    3,    // cuda_shared
956  };
957  class NVPTXTargetInfo : public TargetInfo {
958    static const char * const GCCRegNames[];
959    static const Builtin::Info BuiltinInfo[];
960    std::vector<llvm::StringRef> AvailableFeatures;
961  public:
962    NVPTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
963      BigEndian = false;
964      TLSSupported = false;
965      LongWidth = LongAlign = 64;
966      AddrSpaceMap = &NVPTXAddrSpaceMap;
967      // Define available target features
968      // These must be defined in sorted order!
969    }
970    virtual void getTargetDefines(const LangOptions &Opts,
971                                  MacroBuilder &Builder) const {
972      Builder.defineMacro("__PTX__");
973      Builder.defineMacro("__NVPTX__");
974    }
975    virtual void getTargetBuiltins(const Builtin::Info *&Records,
976                                   unsigned &NumRecords) const {
977      Records = BuiltinInfo;
978      NumRecords = clang::NVPTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
979    }
980    virtual bool hasFeature(StringRef Feature) const {
981      return Feature == "ptx" || Feature == "nvptx";
982    }
983
984    virtual void getGCCRegNames(const char * const *&Names,
985                                unsigned &NumNames) const;
986    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
987                                  unsigned &NumAliases) const {
988      // No aliases.
989      Aliases = 0;
990      NumAliases = 0;
991    }
992    virtual bool validateAsmConstraint(const char *&Name,
993                                       TargetInfo::ConstraintInfo &info) const {
994      // FIXME: implement
995      return true;
996    }
997    virtual const char *getClobbers() const {
998      // FIXME: Is this really right?
999      return "";
1000    }
1001    virtual const char *getVAListDeclaration() const {
1002      // FIXME: implement
1003      return "typedef char* __builtin_va_list;";
1004    }
1005    virtual bool setCPU(const std::string &Name) {
1006      return Name == "sm_10" || Name == "sm_13" || Name == "sm_20";
1007    }
1008    virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1009                                   StringRef Name,
1010                                   bool Enabled) const;
1011  };
1012
1013  const Builtin::Info NVPTXTargetInfo::BuiltinInfo[] = {
1014#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1015#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1016                                              ALL_LANGUAGES },
1017#include "clang/Basic/BuiltinsNVPTX.def"
1018  };
1019
1020  const char * const NVPTXTargetInfo::GCCRegNames[] = {
1021    "r0"
1022  };
1023
1024  void NVPTXTargetInfo::getGCCRegNames(const char * const *&Names,
1025                                     unsigned &NumNames) const {
1026    Names = GCCRegNames;
1027    NumNames = llvm::array_lengthof(GCCRegNames);
1028  }
1029
1030  bool NVPTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1031                                          StringRef Name,
1032                                          bool Enabled) const {
1033    if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
1034                          Name)) {
1035      Features[Name] = Enabled;
1036      return true;
1037    } else {
1038      return false;
1039    }
1040  }
1041
1042  class NVPTX32TargetInfo : public NVPTXTargetInfo {
1043  public:
1044    NVPTX32TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1045      PointerWidth = PointerAlign = 32;
1046      SizeType     = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1047      DescriptionString
1048        = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1049          "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1050          "n16:32:64";
1051  }
1052  };
1053
1054  class NVPTX64TargetInfo : public NVPTXTargetInfo {
1055  public:
1056    NVPTX64TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1057      PointerWidth = PointerAlign = 64;
1058      SizeType     = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1059      DescriptionString
1060        = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1061          "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1062          "n16:32:64";
1063  }
1064  };
1065}
1066
1067namespace {
1068// MBlaze abstract base class
1069class MBlazeTargetInfo : public TargetInfo {
1070  static const char * const GCCRegNames[];
1071  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1072
1073public:
1074  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1075    DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1076  }
1077
1078  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1079                                 unsigned &NumRecords) const {
1080    // FIXME: Implement.
1081    Records = 0;
1082    NumRecords = 0;
1083  }
1084
1085  virtual void getTargetDefines(const LangOptions &Opts,
1086                                MacroBuilder &Builder) const;
1087
1088  virtual bool hasFeature(StringRef Feature) const {
1089    return Feature == "mblaze";
1090  }
1091
1092  virtual const char *getVAListDeclaration() const {
1093    return "typedef char* __builtin_va_list;";
1094  }
1095  virtual const char *getTargetPrefix() const {
1096    return "mblaze";
1097  }
1098  virtual void getGCCRegNames(const char * const *&Names,
1099                              unsigned &NumNames) const;
1100  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1101                                unsigned &NumAliases) const;
1102  virtual bool validateAsmConstraint(const char *&Name,
1103                                     TargetInfo::ConstraintInfo &Info) const {
1104    switch (*Name) {
1105    default: return false;
1106    case 'O': // Zero
1107      return true;
1108    case 'b': // Base register
1109    case 'f': // Floating point register
1110      Info.setAllowsRegister();
1111      return true;
1112    }
1113  }
1114  virtual const char *getClobbers() const {
1115    return "";
1116  }
1117};
1118
1119/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1120/// #defines that are not tied to a specific subtarget.
1121void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1122                                     MacroBuilder &Builder) const {
1123  // Target identification.
1124  Builder.defineMacro("__microblaze__");
1125  Builder.defineMacro("_ARCH_MICROBLAZE");
1126  Builder.defineMacro("__MICROBLAZE__");
1127
1128  // Target properties.
1129  Builder.defineMacro("_BIG_ENDIAN");
1130  Builder.defineMacro("__BIG_ENDIAN__");
1131
1132  // Subtarget options.
1133  Builder.defineMacro("__REGISTER_PREFIX__", "");
1134}
1135
1136
1137const char * const MBlazeTargetInfo::GCCRegNames[] = {
1138  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
1139  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
1140  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
1141  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
1142  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
1143  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1144  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1145  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1146  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1147  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
1148};
1149
1150void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1151                                   unsigned &NumNames) const {
1152  Names = GCCRegNames;
1153  NumNames = llvm::array_lengthof(GCCRegNames);
1154}
1155
1156const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1157  { {"f0"},  "r0" },
1158  { {"f1"},  "r1" },
1159  { {"f2"},  "r2" },
1160  { {"f3"},  "r3" },
1161  { {"f4"},  "r4" },
1162  { {"f5"},  "r5" },
1163  { {"f6"},  "r6" },
1164  { {"f7"},  "r7" },
1165  { {"f8"},  "r8" },
1166  { {"f9"},  "r9" },
1167  { {"f10"}, "r10" },
1168  { {"f11"}, "r11" },
1169  { {"f12"}, "r12" },
1170  { {"f13"}, "r13" },
1171  { {"f14"}, "r14" },
1172  { {"f15"}, "r15" },
1173  { {"f16"}, "r16" },
1174  { {"f17"}, "r17" },
1175  { {"f18"}, "r18" },
1176  { {"f19"}, "r19" },
1177  { {"f20"}, "r20" },
1178  { {"f21"}, "r21" },
1179  { {"f22"}, "r22" },
1180  { {"f23"}, "r23" },
1181  { {"f24"}, "r24" },
1182  { {"f25"}, "r25" },
1183  { {"f26"}, "r26" },
1184  { {"f27"}, "r27" },
1185  { {"f28"}, "r28" },
1186  { {"f29"}, "r29" },
1187  { {"f30"}, "r30" },
1188  { {"f31"}, "r31" },
1189};
1190
1191void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1192                                     unsigned &NumAliases) const {
1193  Aliases = GCCRegAliases;
1194  NumAliases = llvm::array_lengthof(GCCRegAliases);
1195}
1196} // end anonymous namespace.
1197
1198namespace {
1199// Namespace for x86 abstract base class
1200const Builtin::Info BuiltinInfo[] = {
1201#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1202#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1203                                              ALL_LANGUAGES },
1204#include "clang/Basic/BuiltinsX86.def"
1205};
1206
1207static const char* const GCCRegNames[] = {
1208  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1209  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1210  "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1211  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1212  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1213  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1214  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1215  "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1216  "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1217};
1218
1219const TargetInfo::AddlRegName AddlRegNames[] = {
1220  { { "al", "ah", "eax", "rax" }, 0 },
1221  { { "bl", "bh", "ebx", "rbx" }, 3 },
1222  { { "cl", "ch", "ecx", "rcx" }, 2 },
1223  { { "dl", "dh", "edx", "rdx" }, 1 },
1224  { { "esi", "rsi" }, 4 },
1225  { { "edi", "rdi" }, 5 },
1226  { { "esp", "rsp" }, 7 },
1227  { { "ebp", "rbp" }, 6 },
1228};
1229
1230// X86 target abstract base class; x86-32 and x86-64 are very close, so
1231// most of the implementation can be shared.
1232class X86TargetInfo : public TargetInfo {
1233  enum X86SSEEnum {
1234    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1235  } SSELevel;
1236  enum MMX3DNowEnum {
1237    NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1238  } MMX3DNowLevel;
1239
1240  bool HasAES;
1241  bool HasPCLMUL;
1242  bool HasLZCNT;
1243  bool HasBMI;
1244  bool HasBMI2;
1245  bool HasPOPCNT;
1246  bool HasSSE4a;
1247  bool HasFMA4;
1248
1249  /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1250  ///
1251  /// Each enumeration represents a particular CPU supported by Clang. These
1252  /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1253  enum CPUKind {
1254    CK_Generic,
1255
1256    /// \name i386
1257    /// i386-generation processors.
1258    //@{
1259    CK_i386,
1260    //@}
1261
1262    /// \name i486
1263    /// i486-generation processors.
1264    //@{
1265    CK_i486,
1266    CK_WinChipC6,
1267    CK_WinChip2,
1268    CK_C3,
1269    //@}
1270
1271    /// \name i586
1272    /// i586-generation processors, P5 microarchitecture based.
1273    //@{
1274    CK_i586,
1275    CK_Pentium,
1276    CK_PentiumMMX,
1277    //@}
1278
1279    /// \name i686
1280    /// i686-generation processors, P6 / Pentium M microarchitecture based.
1281    //@{
1282    CK_i686,
1283    CK_PentiumPro,
1284    CK_Pentium2,
1285    CK_Pentium3,
1286    CK_Pentium3M,
1287    CK_PentiumM,
1288    CK_C3_2,
1289
1290    /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1291    /// Clang however has some logic to suport this.
1292    // FIXME: Warn, deprecate, and potentially remove this.
1293    CK_Yonah,
1294    //@}
1295
1296    /// \name Netburst
1297    /// Netburst microarchitecture based processors.
1298    //@{
1299    CK_Pentium4,
1300    CK_Pentium4M,
1301    CK_Prescott,
1302    CK_Nocona,
1303    //@}
1304
1305    /// \name Core
1306    /// Core microarchitecture based processors.
1307    //@{
1308    CK_Core2,
1309
1310    /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1311    /// codename which GCC no longer accepts as an option to -march, but Clang
1312    /// has some logic for recognizing it.
1313    // FIXME: Warn, deprecate, and potentially remove this.
1314    CK_Penryn,
1315    //@}
1316
1317    /// \name Atom
1318    /// Atom processors
1319    //@{
1320    CK_Atom,
1321    //@}
1322
1323    /// \name Nehalem
1324    /// Nehalem microarchitecture based processors.
1325    //@{
1326    CK_Corei7,
1327    CK_Corei7AVX,
1328    CK_CoreAVXi,
1329    CK_CoreAVX2,
1330    //@}
1331
1332    /// \name K6
1333    /// K6 architecture processors.
1334    //@{
1335    CK_K6,
1336    CK_K6_2,
1337    CK_K6_3,
1338    //@}
1339
1340    /// \name K7
1341    /// K7 architecture processors.
1342    //@{
1343    CK_Athlon,
1344    CK_AthlonThunderbird,
1345    CK_Athlon4,
1346    CK_AthlonXP,
1347    CK_AthlonMP,
1348    //@}
1349
1350    /// \name K8
1351    /// K8 architecture processors.
1352    //@{
1353    CK_Athlon64,
1354    CK_Athlon64SSE3,
1355    CK_AthlonFX,
1356    CK_K8,
1357    CK_K8SSE3,
1358    CK_Opteron,
1359    CK_OpteronSSE3,
1360    CK_AMDFAM10,
1361    //@}
1362
1363    /// \name Bobcat
1364    /// Bobcat architecture processors.
1365    //@{
1366    CK_BTVER1,
1367    //@}
1368
1369    /// \name Bulldozer
1370    /// Bulldozer architecture processors.
1371    //@{
1372    CK_BDVER1,
1373    CK_BDVER2,
1374    //@}
1375
1376    /// This specification is deprecated and will be removed in the future.
1377    /// Users should prefer \see CK_K8.
1378    // FIXME: Warn on this when the CPU is set to it.
1379    CK_x86_64,
1380    //@}
1381
1382    /// \name Geode
1383    /// Geode processors.
1384    //@{
1385    CK_Geode
1386    //@}
1387  } CPU;
1388
1389public:
1390  X86TargetInfo(const std::string& triple)
1391    : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1392      HasAES(false), HasPCLMUL(false), HasLZCNT(false), HasBMI(false),
1393      HasBMI2(false), HasPOPCNT(false), HasSSE4a(false), HasFMA4(false),
1394      CPU(CK_Generic) {
1395    BigEndian = false;
1396    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1397  }
1398  virtual unsigned getFloatEvalMethod() const {
1399    // X87 evaluates with 80 bits "long double" precision.
1400    return SSELevel == NoSSE ? 2 : 0;
1401  }
1402  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1403                                 unsigned &NumRecords) const {
1404    Records = BuiltinInfo;
1405    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1406  }
1407  virtual void getGCCRegNames(const char * const *&Names,
1408                              unsigned &NumNames) const {
1409    Names = GCCRegNames;
1410    NumNames = llvm::array_lengthof(GCCRegNames);
1411  }
1412  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1413                                unsigned &NumAliases) const {
1414    Aliases = 0;
1415    NumAliases = 0;
1416  }
1417  virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1418				  unsigned &NumNames) const {
1419    Names = AddlRegNames;
1420    NumNames = llvm::array_lengthof(AddlRegNames);
1421  }
1422  virtual bool validateAsmConstraint(const char *&Name,
1423                                     TargetInfo::ConstraintInfo &info) const;
1424  virtual std::string convertConstraint(const char *&Constraint) const;
1425  virtual const char *getClobbers() const {
1426    return "~{dirflag},~{fpsr},~{flags}";
1427  }
1428  virtual void getTargetDefines(const LangOptions &Opts,
1429                                MacroBuilder &Builder) const;
1430  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1431                                 StringRef Name,
1432                                 bool Enabled) const;
1433  virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1434  virtual bool hasFeature(StringRef Feature) const;
1435  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1436  virtual const char* getABI() const {
1437    if (PointerWidth == 64 && SSELevel >= AVX)
1438      return "avx";
1439    else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow)
1440      return "no-mmx";
1441    return "";
1442  }
1443  virtual bool setCPU(const std::string &Name) {
1444    CPU = llvm::StringSwitch<CPUKind>(Name)
1445      .Case("i386", CK_i386)
1446      .Case("i486", CK_i486)
1447      .Case("winchip-c6", CK_WinChipC6)
1448      .Case("winchip2", CK_WinChip2)
1449      .Case("c3", CK_C3)
1450      .Case("i586", CK_i586)
1451      .Case("pentium", CK_Pentium)
1452      .Case("pentium-mmx", CK_PentiumMMX)
1453      .Case("i686", CK_i686)
1454      .Case("pentiumpro", CK_PentiumPro)
1455      .Case("pentium2", CK_Pentium2)
1456      .Case("pentium3", CK_Pentium3)
1457      .Case("pentium3m", CK_Pentium3M)
1458      .Case("pentium-m", CK_PentiumM)
1459      .Case("c3-2", CK_C3_2)
1460      .Case("yonah", CK_Yonah)
1461      .Case("pentium4", CK_Pentium4)
1462      .Case("pentium4m", CK_Pentium4M)
1463      .Case("prescott", CK_Prescott)
1464      .Case("nocona", CK_Nocona)
1465      .Case("core2", CK_Core2)
1466      .Case("penryn", CK_Penryn)
1467      .Case("atom", CK_Atom)
1468      .Case("corei7", CK_Corei7)
1469      .Case("corei7-avx", CK_Corei7AVX)
1470      .Case("core-avx-i", CK_CoreAVXi)
1471      .Case("core-avx2", CK_CoreAVX2)
1472      .Case("k6", CK_K6)
1473      .Case("k6-2", CK_K6_2)
1474      .Case("k6-3", CK_K6_3)
1475      .Case("athlon", CK_Athlon)
1476      .Case("athlon-tbird", CK_AthlonThunderbird)
1477      .Case("athlon-4", CK_Athlon4)
1478      .Case("athlon-xp", CK_AthlonXP)
1479      .Case("athlon-mp", CK_AthlonMP)
1480      .Case("athlon64", CK_Athlon64)
1481      .Case("athlon64-sse3", CK_Athlon64SSE3)
1482      .Case("athlon-fx", CK_AthlonFX)
1483      .Case("k8", CK_K8)
1484      .Case("k8-sse3", CK_K8SSE3)
1485      .Case("opteron", CK_Opteron)
1486      .Case("opteron-sse3", CK_OpteronSSE3)
1487      .Case("amdfam10", CK_AMDFAM10)
1488      .Case("btver1", CK_BTVER1)
1489      .Case("bdver1", CK_BDVER1)
1490      .Case("bdver2", CK_BDVER2)
1491      .Case("x86-64", CK_x86_64)
1492      .Case("geode", CK_Geode)
1493      .Default(CK_Generic);
1494
1495    // Perform any per-CPU checks necessary to determine if this CPU is
1496    // acceptable.
1497    // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1498    // invalid without explaining *why*.
1499    switch (CPU) {
1500    case CK_Generic:
1501      // No processor selected!
1502      return false;
1503
1504    case CK_i386:
1505    case CK_i486:
1506    case CK_WinChipC6:
1507    case CK_WinChip2:
1508    case CK_C3:
1509    case CK_i586:
1510    case CK_Pentium:
1511    case CK_PentiumMMX:
1512    case CK_i686:
1513    case CK_PentiumPro:
1514    case CK_Pentium2:
1515    case CK_Pentium3:
1516    case CK_Pentium3M:
1517    case CK_PentiumM:
1518    case CK_Yonah:
1519    case CK_C3_2:
1520    case CK_Pentium4:
1521    case CK_Pentium4M:
1522    case CK_Prescott:
1523    case CK_K6:
1524    case CK_K6_2:
1525    case CK_K6_3:
1526    case CK_Athlon:
1527    case CK_AthlonThunderbird:
1528    case CK_Athlon4:
1529    case CK_AthlonXP:
1530    case CK_AthlonMP:
1531    case CK_Geode:
1532      // Only accept certain architectures when compiling in 32-bit mode.
1533      if (PointerWidth != 32)
1534        return false;
1535
1536      // Fallthrough
1537    case CK_Nocona:
1538    case CK_Core2:
1539    case CK_Penryn:
1540    case CK_Atom:
1541    case CK_Corei7:
1542    case CK_Corei7AVX:
1543    case CK_CoreAVXi:
1544    case CK_CoreAVX2:
1545    case CK_Athlon64:
1546    case CK_Athlon64SSE3:
1547    case CK_AthlonFX:
1548    case CK_K8:
1549    case CK_K8SSE3:
1550    case CK_Opteron:
1551    case CK_OpteronSSE3:
1552    case CK_AMDFAM10:
1553    case CK_BTVER1:
1554    case CK_BDVER1:
1555    case CK_BDVER2:
1556    case CK_x86_64:
1557      return true;
1558    }
1559    llvm_unreachable("Unhandled CPU kind");
1560  }
1561};
1562
1563void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1564  // FIXME: This should not be here.
1565  Features["3dnow"] = false;
1566  Features["3dnowa"] = false;
1567  Features["mmx"] = false;
1568  Features["sse"] = false;
1569  Features["sse2"] = false;
1570  Features["sse3"] = false;
1571  Features["ssse3"] = false;
1572  Features["sse41"] = false;
1573  Features["sse42"] = false;
1574  Features["sse4a"] = false;
1575  Features["aes"] = false;
1576  Features["pclmul"] = false;
1577  Features["avx"] = false;
1578  Features["avx2"] = false;
1579  Features["lzcnt"] = false;
1580  Features["bmi"] = false;
1581  Features["bmi2"] = false;
1582  Features["popcnt"] = false;
1583  Features["fma4"] = false;
1584
1585  // FIXME: This *really* should not be here.
1586
1587  // X86_64 always has SSE2.
1588  if (PointerWidth == 64)
1589    Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1590
1591  switch (CPU) {
1592  case CK_Generic:
1593  case CK_i386:
1594  case CK_i486:
1595  case CK_i586:
1596  case CK_Pentium:
1597  case CK_i686:
1598  case CK_PentiumPro:
1599    break;
1600  case CK_PentiumMMX:
1601  case CK_Pentium2:
1602    setFeatureEnabled(Features, "mmx", true);
1603    break;
1604  case CK_Pentium3:
1605  case CK_Pentium3M:
1606    setFeatureEnabled(Features, "mmx", true);
1607    setFeatureEnabled(Features, "sse", true);
1608    break;
1609  case CK_PentiumM:
1610  case CK_Pentium4:
1611  case CK_Pentium4M:
1612  case CK_x86_64:
1613    setFeatureEnabled(Features, "mmx", true);
1614    setFeatureEnabled(Features, "sse2", true);
1615    break;
1616  case CK_Yonah:
1617  case CK_Prescott:
1618  case CK_Nocona:
1619    setFeatureEnabled(Features, "mmx", true);
1620    setFeatureEnabled(Features, "sse3", true);
1621    break;
1622  case CK_Core2:
1623    setFeatureEnabled(Features, "mmx", true);
1624    setFeatureEnabled(Features, "ssse3", true);
1625    break;
1626  case CK_Penryn:
1627    setFeatureEnabled(Features, "mmx", true);
1628    setFeatureEnabled(Features, "sse4.1", true);
1629    break;
1630  case CK_Atom:
1631    setFeatureEnabled(Features, "mmx", true);
1632    setFeatureEnabled(Features, "ssse3", true);
1633    break;
1634  case CK_Corei7:
1635    setFeatureEnabled(Features, "mmx", true);
1636    setFeatureEnabled(Features, "sse4", true);
1637    break;
1638  case CK_Corei7AVX:
1639  case CK_CoreAVXi:
1640    setFeatureEnabled(Features, "mmx", true);
1641    setFeatureEnabled(Features, "avx", true);
1642    setFeatureEnabled(Features, "aes", true);
1643    setFeatureEnabled(Features, "pclmul", true);
1644    break;
1645  case CK_CoreAVX2:
1646    setFeatureEnabled(Features, "mmx", true);
1647    setFeatureEnabled(Features, "avx2", true);
1648    setFeatureEnabled(Features, "aes", true);
1649    setFeatureEnabled(Features, "pclmul", true);
1650    setFeatureEnabled(Features, "lzcnt", true);
1651    setFeatureEnabled(Features, "bmi", true);
1652    setFeatureEnabled(Features, "bmi2", true);
1653    break;
1654  case CK_K6:
1655  case CK_WinChipC6:
1656    setFeatureEnabled(Features, "mmx", true);
1657    break;
1658  case CK_K6_2:
1659  case CK_K6_3:
1660  case CK_WinChip2:
1661  case CK_C3:
1662    setFeatureEnabled(Features, "3dnow", true);
1663    break;
1664  case CK_Athlon:
1665  case CK_AthlonThunderbird:
1666  case CK_Geode:
1667    setFeatureEnabled(Features, "3dnowa", true);
1668    break;
1669  case CK_Athlon4:
1670  case CK_AthlonXP:
1671  case CK_AthlonMP:
1672    setFeatureEnabled(Features, "sse", true);
1673    setFeatureEnabled(Features, "3dnowa", true);
1674    break;
1675  case CK_K8:
1676  case CK_Opteron:
1677  case CK_Athlon64:
1678  case CK_AthlonFX:
1679    setFeatureEnabled(Features, "sse2", true);
1680    setFeatureEnabled(Features, "3dnowa", true);
1681    break;
1682  case CK_K8SSE3:
1683  case CK_OpteronSSE3:
1684  case CK_Athlon64SSE3:
1685    setFeatureEnabled(Features, "sse3", true);
1686    setFeatureEnabled(Features, "3dnowa", true);
1687    break;
1688  case CK_AMDFAM10:
1689    setFeatureEnabled(Features, "sse3", true);
1690    setFeatureEnabled(Features, "sse4a", true);
1691    setFeatureEnabled(Features, "3dnowa", true);
1692    break;
1693  case CK_BTVER1:
1694    setFeatureEnabled(Features, "ssse3", true);
1695    setFeatureEnabled(Features, "sse4a", true);
1696    break;
1697  case CK_BDVER1:
1698  case CK_BDVER2:
1699    setFeatureEnabled(Features, "avx", true);
1700    setFeatureEnabled(Features, "sse4a", true);
1701    setFeatureEnabled(Features, "aes", true);
1702    setFeatureEnabled(Features, "pclmul", true);
1703    break;
1704  case CK_C3_2:
1705    setFeatureEnabled(Features, "mmx", true);
1706    setFeatureEnabled(Features, "sse", true);
1707    break;
1708  }
1709}
1710
1711bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1712                                      StringRef Name,
1713                                      bool Enabled) const {
1714  // FIXME: This *really* should not be here.  We need some way of translating
1715  // options into llvm subtarget features.
1716  if (!Features.count(Name) &&
1717      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1718    return false;
1719
1720  // FIXME: this should probably use a switch with fall through.
1721
1722  if (Enabled) {
1723    if (Name == "mmx")
1724      Features["mmx"] = true;
1725    else if (Name == "sse")
1726      Features["mmx"] = Features["sse"] = true;
1727    else if (Name == "sse2")
1728      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1729    else if (Name == "sse3")
1730      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1731        true;
1732    else if (Name == "ssse3")
1733      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1734        Features["ssse3"] = true;
1735    else if (Name == "sse4" || Name == "sse4.2")
1736      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1737        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1738        Features["popcnt"] = true;
1739    else if (Name == "sse4.1")
1740      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1741        Features["ssse3"] = Features["sse41"] = true;
1742    else if (Name == "3dnow")
1743      Features["mmx"] = Features["3dnow"] = true;
1744    else if (Name == "3dnowa")
1745      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
1746    else if (Name == "aes")
1747      Features["aes"] = true;
1748    else if (Name == "pclmul")
1749      Features["pclmul"] = true;
1750    else if (Name == "avx")
1751      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1752        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1753        Features["popcnt"] = Features["avx"] = true;
1754    else if (Name == "avx2")
1755      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1756        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1757        Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
1758    else if (Name == "fma4")
1759        Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1760        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1761        Features["popcnt"] = Features["avx"] = Features["sse4a"] =
1762        Features["fma4"] = true;
1763    else if (Name == "sse4a")
1764      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1765        Features["sse4a"] = true;
1766    else if (Name == "lzcnt")
1767      Features["lzcnt"] = true;
1768    else if (Name == "bmi")
1769      Features["bmi"] = true;
1770    else if (Name == "bmi2")
1771      Features["bmi2"] = true;
1772    else if (Name == "popcnt")
1773      Features["popcnt"] = true;
1774  } else {
1775    if (Name == "mmx")
1776      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
1777    else if (Name == "sse")
1778      Features["sse"] = Features["sse2"] = Features["sse3"] =
1779        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1780        Features["sse4a"] = false;
1781    else if (Name == "sse2")
1782      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1783        Features["sse41"] = Features["sse42"] = Features["sse4a"] = false;
1784    else if (Name == "sse3")
1785      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1786        Features["sse42"] = Features["sse4a"] = false;
1787    else if (Name == "ssse3")
1788      Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1789    else if (Name == "sse4" || Name == "sse4.1")
1790      Features["sse41"] = Features["sse42"] = false;
1791    else if (Name == "sse4.2")
1792      Features["sse42"] = false;
1793    else if (Name == "3dnow")
1794      Features["3dnow"] = Features["3dnowa"] = false;
1795    else if (Name == "3dnowa")
1796      Features["3dnowa"] = false;
1797    else if (Name == "aes")
1798      Features["aes"] = false;
1799    else if (Name == "pclmul")
1800      Features["pclmul"] = false;
1801    else if (Name == "avx")
1802      Features["avx"] = Features["avx2"] = Features["fma4"] = false;
1803    else if (Name == "avx2")
1804      Features["avx2"] = false;
1805    else if (Name == "sse4a")
1806      Features["sse4a"] = Features["fma4"] = false;
1807    else if (Name == "lzcnt")
1808      Features["lzcnt"] = false;
1809    else if (Name == "bmi")
1810      Features["bmi"] = false;
1811    else if (Name == "bmi2")
1812      Features["bmi2"] = false;
1813    else if (Name == "popcnt")
1814      Features["popcnt"] = false;
1815    else if (Name == "fma4")
1816      Features["fma4"] = false;
1817  }
1818
1819  return true;
1820}
1821
1822/// HandleTargetOptions - Perform initialization based on the user
1823/// configured set of features.
1824void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1825  // Remember the maximum enabled sselevel.
1826  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1827    // Ignore disabled features.
1828    if (Features[i][0] == '-')
1829      continue;
1830
1831    StringRef Feature = StringRef(Features[i]).substr(1);
1832
1833    if (Feature == "aes") {
1834      HasAES = true;
1835      continue;
1836    }
1837
1838    if (Feature == "pclmul") {
1839      HasPCLMUL = true;
1840      continue;
1841    }
1842
1843    if (Feature == "lzcnt") {
1844      HasLZCNT = true;
1845      continue;
1846    }
1847
1848    if (Feature == "bmi") {
1849      HasBMI = true;
1850      continue;
1851    }
1852
1853    if (Feature == "bmi2") {
1854      HasBMI2 = true;
1855      continue;
1856    }
1857
1858    if (Feature == "popcnt") {
1859      HasPOPCNT = true;
1860      continue;
1861    }
1862
1863    if (Feature == "sse4a") {
1864      HasSSE4a = true;
1865      continue;
1866    }
1867
1868    if (Feature == "fma4") {
1869      HasFMA4 = true;
1870      continue;
1871    }
1872
1873    assert(Features[i][0] == '+' && "Invalid target feature!");
1874    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
1875      .Case("avx2", AVX2)
1876      .Case("avx", AVX)
1877      .Case("sse42", SSE42)
1878      .Case("sse41", SSE41)
1879      .Case("ssse3", SSSE3)
1880      .Case("sse3", SSE3)
1881      .Case("sse2", SSE2)
1882      .Case("sse", SSE1)
1883      .Default(NoSSE);
1884    SSELevel = std::max(SSELevel, Level);
1885
1886    MMX3DNowEnum ThreeDNowLevel =
1887      llvm::StringSwitch<MMX3DNowEnum>(Feature)
1888        .Case("3dnowa", AMD3DNowAthlon)
1889        .Case("3dnow", AMD3DNow)
1890        .Case("mmx", MMX)
1891        .Default(NoMMX3DNow);
1892
1893    MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
1894  }
1895
1896  // Don't tell the backend if we're turning off mmx; it will end up disabling
1897  // SSE, which we don't want.
1898  std::vector<std::string>::iterator it;
1899  it = std::find(Features.begin(), Features.end(), "-mmx");
1900  if (it != Features.end())
1901    Features.erase(it);
1902}
1903
1904/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
1905/// definitions for this particular subtarget.
1906void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1907                                     MacroBuilder &Builder) const {
1908  // Target identification.
1909  if (PointerWidth == 64) {
1910    if (getLongWidth() == 64) {
1911      Builder.defineMacro("_LP64");
1912      Builder.defineMacro("__LP64__");
1913    }
1914    Builder.defineMacro("__amd64__");
1915    Builder.defineMacro("__amd64");
1916    Builder.defineMacro("__x86_64");
1917    Builder.defineMacro("__x86_64__");
1918  } else {
1919    DefineStd(Builder, "i386", Opts);
1920  }
1921
1922  // Subtarget options.
1923  // FIXME: We are hard-coding the tune parameters based on the CPU, but they
1924  // truly should be based on -mtune options.
1925  switch (CPU) {
1926  case CK_Generic:
1927    break;
1928  case CK_i386:
1929    // The rest are coming from the i386 define above.
1930    Builder.defineMacro("__tune_i386__");
1931    break;
1932  case CK_i486:
1933  case CK_WinChipC6:
1934  case CK_WinChip2:
1935  case CK_C3:
1936    defineCPUMacros(Builder, "i486");
1937    break;
1938  case CK_PentiumMMX:
1939    Builder.defineMacro("__pentium_mmx__");
1940    Builder.defineMacro("__tune_pentium_mmx__");
1941    // Fallthrough
1942  case CK_i586:
1943  case CK_Pentium:
1944    defineCPUMacros(Builder, "i586");
1945    defineCPUMacros(Builder, "pentium");
1946    break;
1947  case CK_Pentium3:
1948  case CK_Pentium3M:
1949  case CK_PentiumM:
1950    Builder.defineMacro("__tune_pentium3__");
1951    // Fallthrough
1952  case CK_Pentium2:
1953  case CK_C3_2:
1954    Builder.defineMacro("__tune_pentium2__");
1955    // Fallthrough
1956  case CK_PentiumPro:
1957    Builder.defineMacro("__tune_i686__");
1958    Builder.defineMacro("__tune_pentiumpro__");
1959    // Fallthrough
1960  case CK_i686:
1961    Builder.defineMacro("__i686");
1962    Builder.defineMacro("__i686__");
1963    // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
1964    Builder.defineMacro("__pentiumpro");
1965    Builder.defineMacro("__pentiumpro__");
1966    break;
1967  case CK_Pentium4:
1968  case CK_Pentium4M:
1969    defineCPUMacros(Builder, "pentium4");
1970    break;
1971  case CK_Yonah:
1972  case CK_Prescott:
1973  case CK_Nocona:
1974    defineCPUMacros(Builder, "nocona");
1975    break;
1976  case CK_Core2:
1977  case CK_Penryn:
1978    defineCPUMacros(Builder, "core2");
1979    break;
1980  case CK_Atom:
1981    defineCPUMacros(Builder, "atom");
1982    break;
1983  case CK_Corei7:
1984  case CK_Corei7AVX:
1985  case CK_CoreAVXi:
1986  case CK_CoreAVX2:
1987    defineCPUMacros(Builder, "corei7");
1988    break;
1989  case CK_K6_2:
1990    Builder.defineMacro("__k6_2__");
1991    Builder.defineMacro("__tune_k6_2__");
1992    // Fallthrough
1993  case CK_K6_3:
1994    if (CPU != CK_K6_2) {  // In case of fallthrough
1995      // FIXME: GCC may be enabling these in cases where some other k6
1996      // architecture is specified but -m3dnow is explicitly provided. The
1997      // exact semantics need to be determined and emulated here.
1998      Builder.defineMacro("__k6_3__");
1999      Builder.defineMacro("__tune_k6_3__");
2000    }
2001    // Fallthrough
2002  case CK_K6:
2003    defineCPUMacros(Builder, "k6");
2004    break;
2005  case CK_Athlon:
2006  case CK_AthlonThunderbird:
2007  case CK_Athlon4:
2008  case CK_AthlonXP:
2009  case CK_AthlonMP:
2010    defineCPUMacros(Builder, "athlon");
2011    if (SSELevel != NoSSE) {
2012      Builder.defineMacro("__athlon_sse__");
2013      Builder.defineMacro("__tune_athlon_sse__");
2014    }
2015    break;
2016  case CK_K8:
2017  case CK_K8SSE3:
2018  case CK_x86_64:
2019  case CK_Opteron:
2020  case CK_OpteronSSE3:
2021  case CK_Athlon64:
2022  case CK_Athlon64SSE3:
2023  case CK_AthlonFX:
2024    defineCPUMacros(Builder, "k8");
2025    break;
2026  case CK_AMDFAM10:
2027    defineCPUMacros(Builder, "amdfam10");
2028    break;
2029  case CK_BTVER1:
2030    defineCPUMacros(Builder, "btver1");
2031    break;
2032  case CK_BDVER1:
2033    defineCPUMacros(Builder, "bdver1");
2034    break;
2035  case CK_BDVER2:
2036    defineCPUMacros(Builder, "bdver2");
2037    break;
2038  case CK_Geode:
2039    defineCPUMacros(Builder, "geode");
2040    break;
2041  }
2042
2043  // Target properties.
2044  Builder.defineMacro("__LITTLE_ENDIAN__");
2045  Builder.defineMacro("__REGISTER_PREFIX__", "");
2046
2047  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
2048  // functions in glibc header files that use FP Stack inline asm which the
2049  // backend can't deal with (PR879).
2050  Builder.defineMacro("__NO_MATH_INLINES");
2051
2052  if (HasAES)
2053    Builder.defineMacro("__AES__");
2054
2055  if (HasPCLMUL)
2056    Builder.defineMacro("__PCLMUL__");
2057
2058  if (HasLZCNT)
2059    Builder.defineMacro("__LZCNT__");
2060
2061  if (HasBMI)
2062    Builder.defineMacro("__BMI__");
2063
2064  if (HasBMI2)
2065    Builder.defineMacro("__BMI2__");
2066
2067  if (HasPOPCNT)
2068    Builder.defineMacro("__POPCNT__");
2069
2070  if (HasSSE4a)
2071    Builder.defineMacro("__SSE4A__");
2072
2073  if (HasFMA4)
2074    Builder.defineMacro("__FMA4__");
2075
2076  // Each case falls through to the previous one here.
2077  switch (SSELevel) {
2078  case AVX2:
2079    Builder.defineMacro("__AVX2__");
2080  case AVX:
2081    Builder.defineMacro("__AVX__");
2082  case SSE42:
2083    Builder.defineMacro("__SSE4_2__");
2084  case SSE41:
2085    Builder.defineMacro("__SSE4_1__");
2086  case SSSE3:
2087    Builder.defineMacro("__SSSE3__");
2088  case SSE3:
2089    Builder.defineMacro("__SSE3__");
2090  case SSE2:
2091    Builder.defineMacro("__SSE2__");
2092    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
2093  case SSE1:
2094    Builder.defineMacro("__SSE__");
2095    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
2096  case NoSSE:
2097    break;
2098  }
2099
2100  if (Opts.MicrosoftExt && PointerWidth == 32) {
2101    switch (SSELevel) {
2102    case AVX2:
2103    case AVX:
2104    case SSE42:
2105    case SSE41:
2106    case SSSE3:
2107    case SSE3:
2108    case SSE2:
2109      Builder.defineMacro("_M_IX86_FP", Twine(2));
2110      break;
2111    case SSE1:
2112      Builder.defineMacro("_M_IX86_FP", Twine(1));
2113      break;
2114    default:
2115      Builder.defineMacro("_M_IX86_FP", Twine(0));
2116    }
2117  }
2118
2119  // Each case falls through to the previous one here.
2120  switch (MMX3DNowLevel) {
2121  case AMD3DNowAthlon:
2122    Builder.defineMacro("__3dNOW_A__");
2123  case AMD3DNow:
2124    Builder.defineMacro("__3dNOW__");
2125  case MMX:
2126    Builder.defineMacro("__MMX__");
2127  case NoMMX3DNow:
2128    break;
2129  }
2130}
2131
2132bool X86TargetInfo::hasFeature(StringRef Feature) const {
2133  return llvm::StringSwitch<bool>(Feature)
2134      .Case("aes", HasAES)
2135      .Case("avx", SSELevel >= AVX)
2136      .Case("avx2", SSELevel >= AVX2)
2137      .Case("bmi", HasBMI)
2138      .Case("bmi2", HasBMI2)
2139      .Case("fma4", HasFMA4)
2140      .Case("lzcnt", HasLZCNT)
2141      .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
2142      .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
2143      .Case("mmx", MMX3DNowLevel >= MMX)
2144      .Case("pclmul", HasPCLMUL)
2145      .Case("popcnt", HasPOPCNT)
2146      .Case("sse", SSELevel >= SSE1)
2147      .Case("sse2", SSELevel >= SSE2)
2148      .Case("sse3", SSELevel >= SSE3)
2149      .Case("ssse3", SSELevel >= SSSE3)
2150      .Case("sse41", SSELevel >= SSE41)
2151      .Case("sse42", SSELevel >= SSE42)
2152      .Case("sse4a", HasSSE4a)
2153      .Case("x86", true)
2154      .Case("x86_32", PointerWidth == 32)
2155      .Case("x86_64", PointerWidth == 64)
2156      .Default(false);
2157}
2158
2159bool
2160X86TargetInfo::validateAsmConstraint(const char *&Name,
2161                                     TargetInfo::ConstraintInfo &Info) const {
2162  switch (*Name) {
2163  default: return false;
2164  case 'Y': // first letter of a pair:
2165    switch (*(Name+1)) {
2166    default: return false;
2167    case '0':  // First SSE register.
2168    case 't':  // Any SSE register, when SSE2 is enabled.
2169    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
2170    case 'm':  // any MMX register, when inter-unit moves enabled.
2171      break;   // falls through to setAllowsRegister.
2172  }
2173  case 'a': // eax.
2174  case 'b': // ebx.
2175  case 'c': // ecx.
2176  case 'd': // edx.
2177  case 'S': // esi.
2178  case 'D': // edi.
2179  case 'A': // edx:eax.
2180  case 'f': // any x87 floating point stack register.
2181  case 't': // top of floating point stack.
2182  case 'u': // second from top of floating point stack.
2183  case 'q': // Any register accessible as [r]l: a, b, c, and d.
2184  case 'y': // Any MMX register.
2185  case 'x': // Any SSE register.
2186  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2187  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2188  case 'l': // "Index" registers: any general register that can be used as an
2189            // index in a base+index memory access.
2190    Info.setAllowsRegister();
2191    return true;
2192  case 'C': // SSE floating point constant.
2193  case 'G': // x87 floating point constant.
2194  case 'e': // 32-bit signed integer constant for use with zero-extending
2195            // x86_64 instructions.
2196  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2197            // x86_64 instructions.
2198    return true;
2199  }
2200}
2201
2202
2203std::string
2204X86TargetInfo::convertConstraint(const char *&Constraint) const {
2205  switch (*Constraint) {
2206  case 'a': return std::string("{ax}");
2207  case 'b': return std::string("{bx}");
2208  case 'c': return std::string("{cx}");
2209  case 'd': return std::string("{dx}");
2210  case 'S': return std::string("{si}");
2211  case 'D': return std::string("{di}");
2212  case 'p': // address
2213    return std::string("im");
2214  case 't': // top of floating point stack.
2215    return std::string("{st}");
2216  case 'u': // second from top of floating point stack.
2217    return std::string("{st(1)}"); // second from top of floating point stack.
2218  default:
2219    return std::string(1, *Constraint);
2220  }
2221}
2222} // end anonymous namespace
2223
2224namespace {
2225// X86-32 generic target
2226class X86_32TargetInfo : public X86TargetInfo {
2227public:
2228  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2229    DoubleAlign = LongLongAlign = 32;
2230    LongDoubleWidth = 96;
2231    LongDoubleAlign = 32;
2232    SuitableAlign = 128;
2233    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2234                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2235                        "a0:0:64-f80:32:32-n8:16:32-S128";
2236    SizeType = UnsignedInt;
2237    PtrDiffType = SignedInt;
2238    IntPtrType = SignedInt;
2239    RegParmMax = 3;
2240
2241    // Use fpret for all types.
2242    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2243                             (1 << TargetInfo::Double) |
2244                             (1 << TargetInfo::LongDouble));
2245
2246    // x86-32 has atomics up to 8 bytes
2247    // FIXME: Check that we actually have cmpxchg8b before setting
2248    // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2249    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2250  }
2251  virtual const char *getVAListDeclaration() const {
2252    return "typedef char* __builtin_va_list;";
2253  }
2254
2255  int getEHDataRegisterNumber(unsigned RegNo) const {
2256    if (RegNo == 0) return 0;
2257    if (RegNo == 1) return 2;
2258    return -1;
2259  }
2260};
2261} // end anonymous namespace
2262
2263namespace {
2264class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2265public:
2266  NetBSDI386TargetInfo(const std::string &triple) :
2267    NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2268  }
2269
2270  virtual unsigned getFloatEvalMethod() const {
2271    // NetBSD defaults to "double" rounding
2272    return 1;
2273  }
2274};
2275} // end anonymous namespace
2276
2277namespace {
2278class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2279public:
2280  OpenBSDI386TargetInfo(const std::string& triple) :
2281    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2282    SizeType = UnsignedLong;
2283    IntPtrType = SignedLong;
2284    PtrDiffType = SignedLong;
2285  }
2286};
2287} // end anonymous namespace
2288
2289namespace {
2290class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2291public:
2292  DarwinI386TargetInfo(const std::string& triple) :
2293    DarwinTargetInfo<X86_32TargetInfo>(triple) {
2294    LongDoubleWidth = 128;
2295    LongDoubleAlign = 128;
2296    SuitableAlign = 128;
2297    SizeType = UnsignedLong;
2298    IntPtrType = SignedLong;
2299    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2300                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2301                        "a0:0:64-f80:128:128-n8:16:32-S128";
2302    HasAlignMac68kSupport = true;
2303  }
2304
2305};
2306} // end anonymous namespace
2307
2308namespace {
2309// x86-32 Windows target
2310class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2311public:
2312  WindowsX86_32TargetInfo(const std::string& triple)
2313    : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2314    TLSSupported = false;
2315    WCharType = UnsignedShort;
2316    DoubleAlign = LongLongAlign = 64;
2317    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2318                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2319                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2320  }
2321  virtual void getTargetDefines(const LangOptions &Opts,
2322                                MacroBuilder &Builder) const {
2323    WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2324  }
2325};
2326} // end anonymous namespace
2327
2328namespace {
2329
2330// x86-32 Windows Visual Studio target
2331class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2332public:
2333  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2334    : WindowsX86_32TargetInfo(triple) {
2335    LongDoubleWidth = LongDoubleAlign = 64;
2336    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2337  }
2338  virtual void getTargetDefines(const LangOptions &Opts,
2339                                MacroBuilder &Builder) const {
2340    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2341    WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2342    // The value of the following reflects processor type.
2343    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2344    // We lost the original triple, so we use the default.
2345    Builder.defineMacro("_M_IX86", "600");
2346  }
2347};
2348} // end anonymous namespace
2349
2350namespace {
2351// x86-32 MinGW target
2352class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2353public:
2354  MinGWX86_32TargetInfo(const std::string& triple)
2355    : WindowsX86_32TargetInfo(triple) {
2356  }
2357  virtual void getTargetDefines(const LangOptions &Opts,
2358                                MacroBuilder &Builder) const {
2359    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2360    DefineStd(Builder, "WIN32", Opts);
2361    DefineStd(Builder, "WINNT", Opts);
2362    Builder.defineMacro("_X86_");
2363    Builder.defineMacro("__MSVCRT__");
2364    Builder.defineMacro("__MINGW32__");
2365
2366    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2367    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2368    if (Opts.MicrosoftExt)
2369      // Provide "as-is" __declspec.
2370      Builder.defineMacro("__declspec", "__declspec");
2371    else
2372      // Provide alias of __attribute__ like mingw32-gcc.
2373      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2374  }
2375};
2376} // end anonymous namespace
2377
2378namespace {
2379// x86-32 Cygwin target
2380class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2381public:
2382  CygwinX86_32TargetInfo(const std::string& triple)
2383    : X86_32TargetInfo(triple) {
2384    TLSSupported = false;
2385    WCharType = UnsignedShort;
2386    DoubleAlign = LongLongAlign = 64;
2387    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2388                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2389                        "a0:0:64-f80:32:32-n8:16:32-S32";
2390  }
2391  virtual void getTargetDefines(const LangOptions &Opts,
2392                                MacroBuilder &Builder) const {
2393    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2394    Builder.defineMacro("__CYGWIN__");
2395    Builder.defineMacro("__CYGWIN32__");
2396    DefineStd(Builder, "unix", Opts);
2397    if (Opts.CPlusPlus)
2398      Builder.defineMacro("_GNU_SOURCE");
2399  }
2400};
2401} // end anonymous namespace
2402
2403namespace {
2404// x86-32 Haiku target
2405class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2406public:
2407  HaikuX86_32TargetInfo(const std::string& triple)
2408    : X86_32TargetInfo(triple) {
2409    SizeType = UnsignedLong;
2410    IntPtrType = SignedLong;
2411    PtrDiffType = SignedLong;
2412    this->UserLabelPrefix = "";
2413  }
2414  virtual void getTargetDefines(const LangOptions &Opts,
2415                                MacroBuilder &Builder) const {
2416    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2417    Builder.defineMacro("__INTEL__");
2418    Builder.defineMacro("__HAIKU__");
2419  }
2420};
2421} // end anonymous namespace
2422
2423// RTEMS Target
2424template<typename Target>
2425class RTEMSTargetInfo : public OSTargetInfo<Target> {
2426protected:
2427  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2428                            MacroBuilder &Builder) const {
2429    // RTEMS defines; list based off of gcc output
2430
2431    Builder.defineMacro("__rtems__");
2432    Builder.defineMacro("__ELF__");
2433  }
2434public:
2435  RTEMSTargetInfo(const std::string &triple)
2436    : OSTargetInfo<Target>(triple) {
2437      this->UserLabelPrefix = "";
2438
2439      llvm::Triple Triple(triple);
2440      switch (Triple.getArch()) {
2441        default:
2442        case llvm::Triple::x86:
2443          // this->MCountName = ".mcount";
2444          break;
2445        case llvm::Triple::mips:
2446        case llvm::Triple::mipsel:
2447        case llvm::Triple::ppc:
2448        case llvm::Triple::ppc64:
2449          // this->MCountName = "_mcount";
2450          break;
2451        case llvm::Triple::arm:
2452          // this->MCountName = "__mcount";
2453          break;
2454      }
2455
2456    }
2457};
2458
2459namespace {
2460// x86-32 RTEMS target
2461class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2462public:
2463  RTEMSX86_32TargetInfo(const std::string& triple)
2464    : X86_32TargetInfo(triple) {
2465    SizeType = UnsignedLong;
2466    IntPtrType = SignedLong;
2467    PtrDiffType = SignedLong;
2468    this->UserLabelPrefix = "";
2469  }
2470  virtual void getTargetDefines(const LangOptions &Opts,
2471                                MacroBuilder &Builder) const {
2472    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2473    Builder.defineMacro("__INTEL__");
2474    Builder.defineMacro("__rtems__");
2475  }
2476};
2477} // end anonymous namespace
2478
2479namespace {
2480// x86-64 generic target
2481class X86_64TargetInfo : public X86TargetInfo {
2482public:
2483  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2484    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2485    LongDoubleWidth = 128;
2486    LongDoubleAlign = 128;
2487    LargeArrayMinWidth = 128;
2488    LargeArrayAlign = 128;
2489    SuitableAlign = 128;
2490    IntMaxType = SignedLong;
2491    UIntMaxType = UnsignedLong;
2492    Int64Type = SignedLong;
2493    RegParmMax = 6;
2494
2495    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2496                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2497                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2498
2499    // Use fpret only for long double.
2500    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2501
2502    // Use fp2ret for _Complex long double.
2503    ComplexLongDoubleUsesFP2Ret = true;
2504
2505    // x86-64 has atomics up to 16 bytes.
2506    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2507    // on CPUs with cmpxchg16b
2508    MaxAtomicPromoteWidth = 128;
2509    MaxAtomicInlineWidth = 64;
2510  }
2511  virtual const char *getVAListDeclaration() const {
2512    return "typedef struct __va_list_tag {"
2513           "  unsigned gp_offset;"
2514           "  unsigned fp_offset;"
2515           "  void* overflow_arg_area;"
2516           "  void* reg_save_area;"
2517           "} __va_list_tag;"
2518           "typedef __va_list_tag __builtin_va_list[1];";
2519  }
2520
2521  int getEHDataRegisterNumber(unsigned RegNo) const {
2522    if (RegNo == 0) return 0;
2523    if (RegNo == 1) return 1;
2524    return -1;
2525  }
2526};
2527} // end anonymous namespace
2528
2529namespace {
2530// x86-64 Windows target
2531class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2532public:
2533  WindowsX86_64TargetInfo(const std::string& triple)
2534    : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2535    TLSSupported = false;
2536    WCharType = UnsignedShort;
2537    LongWidth = LongAlign = 32;
2538    DoubleAlign = LongLongAlign = 64;
2539    IntMaxType = SignedLongLong;
2540    UIntMaxType = UnsignedLongLong;
2541    Int64Type = SignedLongLong;
2542    SizeType = UnsignedLongLong;
2543    PtrDiffType = SignedLongLong;
2544    IntPtrType = SignedLongLong;
2545    this->UserLabelPrefix = "";
2546  }
2547  virtual void getTargetDefines(const LangOptions &Opts,
2548                                MacroBuilder &Builder) const {
2549    WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2550    Builder.defineMacro("_WIN64");
2551  }
2552  virtual const char *getVAListDeclaration() const {
2553    return "typedef char* __builtin_va_list;";
2554  }
2555};
2556} // end anonymous namespace
2557
2558namespace {
2559// x86-64 Windows Visual Studio target
2560class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2561public:
2562  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2563    : WindowsX86_64TargetInfo(triple) {
2564    LongDoubleWidth = LongDoubleAlign = 64;
2565    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2566  }
2567  virtual void getTargetDefines(const LangOptions &Opts,
2568                                MacroBuilder &Builder) const {
2569    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2570    WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2571    Builder.defineMacro("_M_X64");
2572    Builder.defineMacro("_M_AMD64");
2573  }
2574};
2575} // end anonymous namespace
2576
2577namespace {
2578// x86-64 MinGW target
2579class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2580public:
2581  MinGWX86_64TargetInfo(const std::string& triple)
2582    : WindowsX86_64TargetInfo(triple) {
2583  }
2584  virtual void getTargetDefines(const LangOptions &Opts,
2585                                MacroBuilder &Builder) const {
2586    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2587    DefineStd(Builder, "WIN64", Opts);
2588    Builder.defineMacro("__MSVCRT__");
2589    Builder.defineMacro("__MINGW32__");
2590    Builder.defineMacro("__MINGW64__");
2591
2592    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2593    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2594    if (Opts.MicrosoftExt)
2595      // Provide "as-is" __declspec.
2596      Builder.defineMacro("__declspec", "__declspec");
2597    else
2598      // Provide alias of __attribute__ like mingw32-gcc.
2599      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2600  }
2601};
2602} // end anonymous namespace
2603
2604namespace {
2605class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2606public:
2607  DarwinX86_64TargetInfo(const std::string& triple)
2608      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2609    Int64Type = SignedLongLong;
2610  }
2611};
2612} // end anonymous namespace
2613
2614namespace {
2615class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2616public:
2617  OpenBSDX86_64TargetInfo(const std::string& triple)
2618      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2619    IntMaxType = SignedLongLong;
2620    UIntMaxType = UnsignedLongLong;
2621    Int64Type = SignedLongLong;
2622  }
2623};
2624} // end anonymous namespace
2625
2626namespace {
2627class ARMTargetInfo : public TargetInfo {
2628  // Possible FPU choices.
2629  enum FPUMode {
2630    NoFPU,
2631    VFP2FPU,
2632    VFP3FPU,
2633    NeonFPU
2634  };
2635
2636  static bool FPUModeIsVFP(FPUMode Mode) {
2637    return Mode >= VFP2FPU && Mode <= NeonFPU;
2638  }
2639
2640  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2641  static const char * const GCCRegNames[];
2642
2643  std::string ABI, CPU;
2644
2645  unsigned FPU : 3;
2646
2647  unsigned IsThumb : 1;
2648
2649  // Initialized via features.
2650  unsigned SoftFloat : 1;
2651  unsigned SoftFloatABI : 1;
2652
2653  static const Builtin::Info BuiltinInfo[];
2654
2655public:
2656  ARMTargetInfo(const std::string &TripleStr)
2657    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
2658  {
2659    BigEndian = false;
2660    SizeType = UnsignedInt;
2661    PtrDiffType = SignedInt;
2662    // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
2663    WCharType = UnsignedInt;
2664
2665    // {} in inline assembly are neon specifiers, not assembly variant
2666    // specifiers.
2667    NoAsmVariants = true;
2668
2669    // FIXME: Should we just treat this as a feature?
2670    IsThumb = getTriple().getArchName().startswith("thumb");
2671    if (IsThumb) {
2672      // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2673      // so set preferred for small types to 32.
2674      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2675                           "i64:64:64-f32:32:32-f64:64:64-"
2676                           "v64:64:64-v128:64:128-a0:0:32-n32-S64");
2677    } else {
2678      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2679                           "i64:64:64-f32:32:32-f64:64:64-"
2680                           "v64:64:64-v128:64:128-a0:0:64-n32-S64");
2681    }
2682
2683    // ARM targets default to using the ARM C++ ABI.
2684    CXXABI = CXXABI_ARM;
2685
2686    // ARM has atomics up to 8 bytes
2687    // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
2688    MaxAtomicPromoteWidth = 64;
2689
2690    // Do force alignment of members that follow zero length bitfields.  If
2691    // the alignment of the zero-length bitfield is greater than the member
2692    // that follows it, `bar', `bar' will be aligned as the  type of the
2693    // zero length bitfield.
2694    UseZeroLengthBitfieldAlignment = true;
2695  }
2696  virtual const char *getABI() const { return ABI.c_str(); }
2697  virtual bool setABI(const std::string &Name) {
2698    ABI = Name;
2699
2700    // The defaults (above) are for AAPCS, check if we need to change them.
2701    //
2702    // FIXME: We need support for -meabi... we could just mangle it into the
2703    // name.
2704    if (Name == "apcs-gnu") {
2705      DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
2706      SizeType = UnsignedLong;
2707
2708      // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
2709      WCharType = SignedInt;
2710
2711      // Do not respect the alignment of bit-field types when laying out
2712      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
2713      UseBitFieldTypeAlignment = false;
2714
2715      /// gcc forces the alignment to 4 bytes, regardless of the type of the
2716      /// zero length bitfield.  This corresponds to EMPTY_FIELD_BOUNDARY in
2717      /// gcc.
2718      ZeroLengthBitfieldBoundary = 32;
2719
2720      if (IsThumb) {
2721        // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2722        // so set preferred for small types to 32.
2723        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2724                             "i64:32:64-f32:32:32-f64:32:64-"
2725                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2726      } else {
2727        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2728                             "i64:32:64-f32:32:32-f64:32:64-"
2729                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2730      }
2731
2732      // FIXME: Override "preferred align" for double and long long.
2733    } else if (Name == "aapcs") {
2734      // FIXME: Enumerated types are variable width in straight AAPCS.
2735    } else if (Name == "aapcs-linux") {
2736      ;
2737    } else
2738      return false;
2739
2740    return true;
2741  }
2742
2743  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
2744    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
2745      Features["vfp2"] = true;
2746    else if (CPU == "cortex-a8" || CPU == "cortex-a9")
2747      Features["neon"] = true;
2748  }
2749
2750  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2751                                 StringRef Name,
2752                                 bool Enabled) const {
2753    if (Name == "soft-float" || Name == "soft-float-abi" ||
2754        Name == "vfp2" || Name == "vfp3" || Name == "neon" || Name == "d16" ||
2755        Name == "neonfp") {
2756      Features[Name] = Enabled;
2757    } else
2758      return false;
2759
2760    return true;
2761  }
2762
2763  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2764    FPU = NoFPU;
2765    SoftFloat = SoftFloatABI = false;
2766    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
2767      if (Features[i] == "+soft-float")
2768        SoftFloat = true;
2769      else if (Features[i] == "+soft-float-abi")
2770        SoftFloatABI = true;
2771      else if (Features[i] == "+vfp2")
2772        FPU = VFP2FPU;
2773      else if (Features[i] == "+vfp3")
2774        FPU = VFP3FPU;
2775      else if (Features[i] == "+neon")
2776        FPU = NeonFPU;
2777    }
2778
2779    // Remove front-end specific options which the backend handles differently.
2780    std::vector<std::string>::iterator it;
2781    it = std::find(Features.begin(), Features.end(), "+soft-float");
2782    if (it != Features.end())
2783      Features.erase(it);
2784    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
2785    if (it != Features.end())
2786      Features.erase(it);
2787  }
2788
2789  virtual bool hasFeature(StringRef Feature) const {
2790    return llvm::StringSwitch<bool>(Feature)
2791        .Case("arm", true)
2792        .Case("softfloat", SoftFloat)
2793        .Case("thumb", IsThumb)
2794        .Case("neon", FPU == NeonFPU && !SoftFloat &&
2795              StringRef(getCPUDefineSuffix(CPU)).startswith("7"))
2796        .Default(false);
2797  }
2798  static const char *getCPUDefineSuffix(StringRef Name) {
2799    return llvm::StringSwitch<const char*>(Name)
2800      .Cases("arm8", "arm810", "4")
2801      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
2802      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
2803      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
2804      .Case("ep9312", "4T")
2805      .Cases("arm10tdmi", "arm1020t", "5T")
2806      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
2807      .Case("arm926ej-s", "5TEJ")
2808      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
2809      .Cases("xscale", "iwmmxt", "5TE")
2810      .Case("arm1136j-s", "6J")
2811      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
2812      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
2813      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
2814      .Cases("cortex-a8", "cortex-a9", "7A")
2815      .Case("cortex-m3", "7M")
2816      .Case("cortex-m4", "7M")
2817      .Case("cortex-m0", "6M")
2818      .Default(0);
2819  }
2820  virtual bool setCPU(const std::string &Name) {
2821    if (!getCPUDefineSuffix(Name))
2822      return false;
2823
2824    CPU = Name;
2825    return true;
2826  }
2827  virtual void getTargetDefines(const LangOptions &Opts,
2828                                MacroBuilder &Builder) const {
2829    // Target identification.
2830    Builder.defineMacro("__arm");
2831    Builder.defineMacro("__arm__");
2832
2833    // Target properties.
2834    Builder.defineMacro("__ARMEL__");
2835    Builder.defineMacro("__LITTLE_ENDIAN__");
2836    Builder.defineMacro("__REGISTER_PREFIX__", "");
2837
2838    StringRef CPUArch = getCPUDefineSuffix(CPU);
2839    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
2840
2841    // Subtarget options.
2842
2843    // FIXME: It's more complicated than this and we don't really support
2844    // interworking.
2845    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
2846      Builder.defineMacro("__THUMB_INTERWORK__");
2847
2848    if (ABI == "aapcs" || ABI == "aapcs-linux")
2849      Builder.defineMacro("__ARM_EABI__");
2850
2851    if (SoftFloat)
2852      Builder.defineMacro("__SOFTFP__");
2853
2854    if (CPU == "xscale")
2855      Builder.defineMacro("__XSCALE__");
2856
2857    bool IsARMv7 = CPUArch.startswith("7");
2858    if (IsThumb) {
2859      Builder.defineMacro("__THUMBEL__");
2860      Builder.defineMacro("__thumb__");
2861      if (CPUArch == "6T2" || IsARMv7)
2862        Builder.defineMacro("__thumb2__");
2863    }
2864
2865    // Note, this is always on in gcc, even though it doesn't make sense.
2866    Builder.defineMacro("__APCS_32__");
2867
2868    if (FPUModeIsVFP((FPUMode) FPU))
2869      Builder.defineMacro("__VFP_FP__");
2870
2871    // This only gets set when Neon instructions are actually available, unlike
2872    // the VFP define, hence the soft float and arch check. This is subtly
2873    // different from gcc, we follow the intent which was that it should be set
2874    // when Neon instructions are actually available.
2875    if (FPU == NeonFPU && !SoftFloat && IsARMv7)
2876      Builder.defineMacro("__ARM_NEON__");
2877  }
2878  virtual void getTargetBuiltins(const Builtin::Info *&Records,
2879                                 unsigned &NumRecords) const {
2880    Records = BuiltinInfo;
2881    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
2882  }
2883  virtual bool isCLZForZeroUndef() const { return false; }
2884  virtual const char *getVAListDeclaration() const {
2885    return "typedef void* __builtin_va_list;";
2886  }
2887  virtual void getGCCRegNames(const char * const *&Names,
2888                              unsigned &NumNames) const;
2889  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2890                                unsigned &NumAliases) const;
2891  virtual bool validateAsmConstraint(const char *&Name,
2892                                     TargetInfo::ConstraintInfo &Info) const {
2893    // FIXME: Check if this is complete
2894    switch (*Name) {
2895    default:
2896    case 'l': // r0-r7
2897    case 'h': // r8-r15
2898    case 'w': // VFP Floating point register single precision
2899    case 'P': // VFP Floating point register double precision
2900      Info.setAllowsRegister();
2901      return true;
2902    case 'Q': // A memory address that is a single base register.
2903      Info.setAllowsMemory();
2904      return true;
2905    case 'U': // a memory reference...
2906      switch (Name[1]) {
2907      case 'q': // ...ARMV4 ldrsb
2908      case 'v': // ...VFP load/store (reg+constant offset)
2909      case 'y': // ...iWMMXt load/store
2910      case 't': // address valid for load/store opaque types wider
2911	        // than 128-bits
2912      case 'n': // valid address for Neon doubleword vector load/store
2913      case 'm': // valid address for Neon element and structure load/store
2914      case 's': // valid address for non-offset loads/stores of quad-word
2915	        // values in four ARM registers
2916        Info.setAllowsMemory();
2917        Name++;
2918        return true;
2919      }
2920    }
2921    return false;
2922  }
2923  virtual std::string convertConstraint(const char *&Constraint) const {
2924    std::string R;
2925    switch (*Constraint) {
2926    case 'U':   // Two-character constraint; add "^" hint for later parsing.
2927      R = std::string("^") + std::string(Constraint, 2);
2928      Constraint++;
2929      break;
2930    case 'p': // 'p' should be translated to 'r' by default.
2931      R = std::string("r");
2932      break;
2933    default:
2934      return std::string(1, *Constraint);
2935    }
2936    return R;
2937  }
2938  virtual const char *getClobbers() const {
2939    // FIXME: Is this really right?
2940    return "";
2941  }
2942};
2943
2944const char * const ARMTargetInfo::GCCRegNames[] = {
2945  // Integer registers
2946  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2947  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
2948
2949  // Float registers
2950  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
2951  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
2952  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
2953  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
2954
2955  // Double registers
2956  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
2957  "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
2958  "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
2959  "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
2960
2961  // Quad registers
2962  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
2963  "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
2964};
2965
2966void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
2967                                   unsigned &NumNames) const {
2968  Names = GCCRegNames;
2969  NumNames = llvm::array_lengthof(GCCRegNames);
2970}
2971
2972const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
2973  { { "a1" }, "r0" },
2974  { { "a2" }, "r1" },
2975  { { "a3" }, "r2" },
2976  { { "a4" }, "r3" },
2977  { { "v1" }, "r4" },
2978  { { "v2" }, "r5" },
2979  { { "v3" }, "r6" },
2980  { { "v4" }, "r7" },
2981  { { "v5" }, "r8" },
2982  { { "v6", "rfp" }, "r9" },
2983  { { "sl" }, "r10" },
2984  { { "fp" }, "r11" },
2985  { { "ip" }, "r12" },
2986  { { "r13" }, "sp" },
2987  { { "r14" }, "lr" },
2988  { { "r15" }, "pc" },
2989  // The S, D and Q registers overlap, but aren't really aliases; we
2990  // don't want to substitute one of these for a different-sized one.
2991};
2992
2993void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2994                                       unsigned &NumAliases) const {
2995  Aliases = GCCRegAliases;
2996  NumAliases = llvm::array_lengthof(GCCRegAliases);
2997}
2998
2999const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
3000#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3001#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3002                                              ALL_LANGUAGES },
3003#include "clang/Basic/BuiltinsARM.def"
3004};
3005} // end anonymous namespace.
3006
3007namespace {
3008class DarwinARMTargetInfo :
3009  public DarwinTargetInfo<ARMTargetInfo> {
3010protected:
3011  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
3012                            MacroBuilder &Builder) const {
3013    getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
3014  }
3015
3016public:
3017  DarwinARMTargetInfo(const std::string& triple)
3018    : DarwinTargetInfo<ARMTargetInfo>(triple) {
3019    HasAlignMac68kSupport = true;
3020    // iOS always has 64-bit atomic instructions.
3021    // FIXME: This should be based off of the target features in ARMTargetInfo.
3022    MaxAtomicInlineWidth = 64;
3023  }
3024};
3025} // end anonymous namespace.
3026
3027
3028namespace {
3029// Hexagon abstract base class
3030class HexagonTargetInfo : public TargetInfo {
3031  static const Builtin::Info BuiltinInfo[];
3032  static const char * const GCCRegNames[];
3033  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3034  std::string CPU;
3035public:
3036  HexagonTargetInfo(const std::string& triple) : TargetInfo(triple)  {
3037    BigEndian = false;
3038    DescriptionString = ("e-p:32:32:32-"
3039                         "i64:64:64-i32:32:32-i16:16:16-i1:32:32"
3040                         "f64:64:64-f32:32:32-a0:0-n32");
3041
3042    // {} in inline assembly are packet specifiers, not assembly variant
3043    // specifiers.
3044    NoAsmVariants = true;
3045  }
3046
3047  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3048                                 unsigned &NumRecords) const {
3049    Records = BuiltinInfo;
3050    NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
3051  }
3052
3053  virtual bool validateAsmConstraint(const char *&Name,
3054                                     TargetInfo::ConstraintInfo &Info) const {
3055    return true;
3056  }
3057
3058  virtual void getTargetDefines(const LangOptions &Opts,
3059                                MacroBuilder &Builder) const;
3060
3061  virtual bool hasFeature(StringRef Feature) const {
3062    return Feature == "hexagon";
3063  }
3064
3065  virtual const char *getVAListDeclaration() const {
3066    return "typedef char* __builtin_va_list;";
3067  }
3068  virtual void getGCCRegNames(const char * const *&Names,
3069                              unsigned &NumNames) const;
3070  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3071                                unsigned &NumAliases) const;
3072  virtual const char *getClobbers() const {
3073    return "";
3074  }
3075
3076  static const char *getHexagonCPUSuffix(StringRef Name) {
3077    return llvm::StringSwitch<const char*>(Name)
3078      .Case("hexagonv2", "2")
3079      .Case("hexagonv3", "3")
3080      .Case("hexagonv4", "4")
3081      .Case("hexagonv5", "5")
3082      .Default(0);
3083  }
3084
3085  virtual bool setCPU(const std::string &Name) {
3086    if (!getHexagonCPUSuffix(Name))
3087      return false;
3088
3089    CPU = Name;
3090    return true;
3091  }
3092};
3093
3094void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
3095                                MacroBuilder &Builder) const {
3096  Builder.defineMacro("qdsp6");
3097  Builder.defineMacro("__qdsp6", "1");
3098  Builder.defineMacro("__qdsp6__", "1");
3099
3100  Builder.defineMacro("hexagon");
3101  Builder.defineMacro("__hexagon", "1");
3102  Builder.defineMacro("__hexagon__", "1");
3103
3104  if(CPU == "hexagonv1") {
3105    Builder.defineMacro("__HEXAGON_V1__");
3106    Builder.defineMacro("__HEXAGON_ARCH__", "1");
3107    if(Opts.HexagonQdsp6Compat) {
3108      Builder.defineMacro("__QDSP6_V1__");
3109      Builder.defineMacro("__QDSP6_ARCH__", "1");
3110    }
3111  }
3112  else if(CPU == "hexagonv2") {
3113    Builder.defineMacro("__HEXAGON_V2__");
3114    Builder.defineMacro("__HEXAGON_ARCH__", "2");
3115    if(Opts.HexagonQdsp6Compat) {
3116      Builder.defineMacro("__QDSP6_V2__");
3117      Builder.defineMacro("__QDSP6_ARCH__", "2");
3118    }
3119  }
3120  else if(CPU == "hexagonv3") {
3121    Builder.defineMacro("__HEXAGON_V3__");
3122    Builder.defineMacro("__HEXAGON_ARCH__", "3");
3123    if(Opts.HexagonQdsp6Compat) {
3124      Builder.defineMacro("__QDSP6_V3__");
3125      Builder.defineMacro("__QDSP6_ARCH__", "3");
3126    }
3127  }
3128  else if(CPU == "hexagonv4") {
3129    Builder.defineMacro("__HEXAGON_V4__");
3130    Builder.defineMacro("__HEXAGON_ARCH__", "4");
3131    if(Opts.HexagonQdsp6Compat) {
3132      Builder.defineMacro("__QDSP6_V4__");
3133      Builder.defineMacro("__QDSP6_ARCH__", "4");
3134    }
3135  }
3136  else if(CPU == "hexagonv5") {
3137    Builder.defineMacro("__HEXAGON_V5__");
3138    Builder.defineMacro("__HEXAGON_ARCH__", "5");
3139    if(Opts.HexagonQdsp6Compat) {
3140      Builder.defineMacro("__QDSP6_V5__");
3141      Builder.defineMacro("__QDSP6_ARCH__", "5");
3142    }
3143  }
3144}
3145
3146const char * const HexagonTargetInfo::GCCRegNames[] = {
3147  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3148  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3149  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3150  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3151  "p0", "p1", "p2", "p3",
3152  "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3153};
3154
3155void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3156                                   unsigned &NumNames) const {
3157  Names = GCCRegNames;
3158  NumNames = llvm::array_lengthof(GCCRegNames);
3159}
3160
3161
3162const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3163  { { "sp" }, "r29" },
3164  { { "fp" }, "r30" },
3165  { { "lr" }, "r31" },
3166 };
3167
3168void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3169                                     unsigned &NumAliases) const {
3170  Aliases = GCCRegAliases;
3171  NumAliases = llvm::array_lengthof(GCCRegAliases);
3172}
3173
3174
3175const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3176#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3177#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3178                                              ALL_LANGUAGES },
3179#include "clang/Basic/BuiltinsHexagon.def"
3180};
3181}
3182
3183
3184namespace {
3185class SparcV8TargetInfo : public TargetInfo {
3186  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3187  static const char * const GCCRegNames[];
3188  bool SoftFloat;
3189public:
3190  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3191    // FIXME: Support Sparc quad-precision long double?
3192    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3193                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3194  }
3195  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3196                                 StringRef Name,
3197                                 bool Enabled) const {
3198    if (Name == "soft-float")
3199      Features[Name] = Enabled;
3200    else
3201      return false;
3202
3203    return true;
3204  }
3205  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3206    SoftFloat = false;
3207    for (unsigned i = 0, e = Features.size(); i != e; ++i)
3208      if (Features[i] == "+soft-float")
3209        SoftFloat = true;
3210  }
3211  virtual void getTargetDefines(const LangOptions &Opts,
3212                                MacroBuilder &Builder) const {
3213    DefineStd(Builder, "sparc", Opts);
3214    Builder.defineMacro("__sparcv8");
3215    Builder.defineMacro("__REGISTER_PREFIX__", "");
3216
3217    if (SoftFloat)
3218      Builder.defineMacro("SOFT_FLOAT", "1");
3219  }
3220
3221  virtual bool hasFeature(StringRef Feature) const {
3222    return llvm::StringSwitch<bool>(Feature)
3223             .Case("softfloat", SoftFloat)
3224             .Case("sparc", true)
3225             .Default(false);
3226  }
3227
3228  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3229                                 unsigned &NumRecords) const {
3230    // FIXME: Implement!
3231  }
3232  virtual const char *getVAListDeclaration() const {
3233    return "typedef void* __builtin_va_list;";
3234  }
3235  virtual void getGCCRegNames(const char * const *&Names,
3236                              unsigned &NumNames) const;
3237  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3238                                unsigned &NumAliases) const;
3239  virtual bool validateAsmConstraint(const char *&Name,
3240                                     TargetInfo::ConstraintInfo &info) const {
3241    // FIXME: Implement!
3242    return false;
3243  }
3244  virtual const char *getClobbers() const {
3245    // FIXME: Implement!
3246    return "";
3247  }
3248};
3249
3250const char * const SparcV8TargetInfo::GCCRegNames[] = {
3251  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3252  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3253  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3254  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3255};
3256
3257void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3258                                       unsigned &NumNames) const {
3259  Names = GCCRegNames;
3260  NumNames = llvm::array_lengthof(GCCRegNames);
3261}
3262
3263const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3264  { { "g0" }, "r0" },
3265  { { "g1" }, "r1" },
3266  { { "g2" }, "r2" },
3267  { { "g3" }, "r3" },
3268  { { "g4" }, "r4" },
3269  { { "g5" }, "r5" },
3270  { { "g6" }, "r6" },
3271  { { "g7" }, "r7" },
3272  { { "o0" }, "r8" },
3273  { { "o1" }, "r9" },
3274  { { "o2" }, "r10" },
3275  { { "o3" }, "r11" },
3276  { { "o4" }, "r12" },
3277  { { "o5" }, "r13" },
3278  { { "o6", "sp" }, "r14" },
3279  { { "o7" }, "r15" },
3280  { { "l0" }, "r16" },
3281  { { "l1" }, "r17" },
3282  { { "l2" }, "r18" },
3283  { { "l3" }, "r19" },
3284  { { "l4" }, "r20" },
3285  { { "l5" }, "r21" },
3286  { { "l6" }, "r22" },
3287  { { "l7" }, "r23" },
3288  { { "i0" }, "r24" },
3289  { { "i1" }, "r25" },
3290  { { "i2" }, "r26" },
3291  { { "i3" }, "r27" },
3292  { { "i4" }, "r28" },
3293  { { "i5" }, "r29" },
3294  { { "i6", "fp" }, "r30" },
3295  { { "i7" }, "r31" },
3296};
3297
3298void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3299                                         unsigned &NumAliases) const {
3300  Aliases = GCCRegAliases;
3301  NumAliases = llvm::array_lengthof(GCCRegAliases);
3302}
3303} // end anonymous namespace.
3304
3305namespace {
3306class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3307public:
3308  AuroraUXSparcV8TargetInfo(const std::string& triple) :
3309      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3310    SizeType = UnsignedInt;
3311    PtrDiffType = SignedInt;
3312  }
3313};
3314class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3315public:
3316  SolarisSparcV8TargetInfo(const std::string& triple) :
3317      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3318    SizeType = UnsignedInt;
3319    PtrDiffType = SignedInt;
3320  }
3321};
3322} // end anonymous namespace.
3323
3324namespace {
3325  class MSP430TargetInfo : public TargetInfo {
3326    static const char * const GCCRegNames[];
3327  public:
3328    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3329      BigEndian = false;
3330      TLSSupported = false;
3331      IntWidth = 16; IntAlign = 16;
3332      LongWidth = 32; LongLongWidth = 64;
3333      LongAlign = LongLongAlign = 16;
3334      PointerWidth = 16; PointerAlign = 16;
3335      SuitableAlign = 16;
3336      SizeType = UnsignedInt;
3337      IntMaxType = SignedLong;
3338      UIntMaxType = UnsignedLong;
3339      IntPtrType = SignedShort;
3340      PtrDiffType = SignedInt;
3341      SigAtomicType = SignedLong;
3342      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3343   }
3344    virtual void getTargetDefines(const LangOptions &Opts,
3345                                  MacroBuilder &Builder) const {
3346      Builder.defineMacro("MSP430");
3347      Builder.defineMacro("__MSP430__");
3348      // FIXME: defines for different 'flavours' of MCU
3349    }
3350    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3351                                   unsigned &NumRecords) const {
3352     // FIXME: Implement.
3353      Records = 0;
3354      NumRecords = 0;
3355    }
3356    virtual bool hasFeature(StringRef Feature) const {
3357      return Feature == "msp430";
3358    }
3359    virtual void getGCCRegNames(const char * const *&Names,
3360                                unsigned &NumNames) const;
3361    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3362                                  unsigned &NumAliases) const {
3363      // No aliases.
3364      Aliases = 0;
3365      NumAliases = 0;
3366    }
3367    virtual bool validateAsmConstraint(const char *&Name,
3368                                       TargetInfo::ConstraintInfo &info) const {
3369      // No target constraints for now.
3370      return false;
3371    }
3372    virtual const char *getClobbers() const {
3373      // FIXME: Is this really right?
3374      return "";
3375    }
3376    virtual const char *getVAListDeclaration() const {
3377      // FIXME: implement
3378      return "typedef char* __builtin_va_list;";
3379   }
3380  };
3381
3382  const char * const MSP430TargetInfo::GCCRegNames[] = {
3383    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3384    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3385  };
3386
3387  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3388                                        unsigned &NumNames) const {
3389    Names = GCCRegNames;
3390    NumNames = llvm::array_lengthof(GCCRegNames);
3391  }
3392}
3393
3394namespace {
3395
3396  // LLVM and Clang cannot be used directly to output native binaries for
3397  // target, but is used to compile C code to llvm bitcode with correct
3398  // type and alignment information.
3399  //
3400  // TCE uses the llvm bitcode as input and uses it for generating customized
3401  // target processor and program binary. TCE co-design environment is
3402  // publicly available in http://tce.cs.tut.fi
3403
3404  static const unsigned TCEOpenCLAddrSpaceMap[] = {
3405      3, // opencl_global
3406      4, // opencl_local
3407      5, // opencl_constant
3408      0, // cuda_device
3409      0, // cuda_constant
3410      0  // cuda_shared
3411  };
3412
3413  class TCETargetInfo : public TargetInfo{
3414  public:
3415    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3416      TLSSupported = false;
3417      IntWidth = 32;
3418      LongWidth = LongLongWidth = 32;
3419      PointerWidth = 32;
3420      IntAlign = 32;
3421      LongAlign = LongLongAlign = 32;
3422      PointerAlign = 32;
3423      SuitableAlign = 32;
3424      SizeType = UnsignedInt;
3425      IntMaxType = SignedLong;
3426      UIntMaxType = UnsignedLong;
3427      IntPtrType = SignedInt;
3428      PtrDiffType = SignedInt;
3429      FloatWidth = 32;
3430      FloatAlign = 32;
3431      DoubleWidth = 32;
3432      DoubleAlign = 32;
3433      LongDoubleWidth = 32;
3434      LongDoubleAlign = 32;
3435      FloatFormat = &llvm::APFloat::IEEEsingle;
3436      DoubleFormat = &llvm::APFloat::IEEEsingle;
3437      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3438      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3439                          "i16:16:32-i32:32:32-i64:32:32-"
3440                          "f32:32:32-f64:32:32-v64:32:32-"
3441                          "v128:32:32-a0:0:32-n32";
3442      AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3443    }
3444
3445    virtual void getTargetDefines(const LangOptions &Opts,
3446                                  MacroBuilder &Builder) const {
3447      DefineStd(Builder, "tce", Opts);
3448      Builder.defineMacro("__TCE__");
3449      Builder.defineMacro("__TCE_V1__");
3450    }
3451    virtual bool hasFeature(StringRef Feature) const {
3452      return Feature == "tce";
3453    }
3454
3455    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3456                                   unsigned &NumRecords) const {}
3457    virtual const char *getClobbers() const {
3458      return "";
3459    }
3460    virtual const char *getVAListDeclaration() const {
3461      return "typedef void* __builtin_va_list;";
3462    }
3463    virtual void getGCCRegNames(const char * const *&Names,
3464                                unsigned &NumNames) const {}
3465    virtual bool validateAsmConstraint(const char *&Name,
3466                                       TargetInfo::ConstraintInfo &info) const {
3467      return true;
3468    }
3469    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3470                                  unsigned &NumAliases) const {}
3471  };
3472}
3473
3474namespace {
3475class MipsTargetInfoBase : public TargetInfo {
3476  std::string CPU;
3477  bool SoftFloat;
3478  bool SingleFloat;
3479
3480protected:
3481  std::string ABI;
3482
3483public:
3484  MipsTargetInfoBase(const std::string& triple,
3485                     const std::string& ABIStr,
3486                     const std::string& CPUStr)
3487    : TargetInfo(triple),
3488      CPU(CPUStr),
3489      SoftFloat(false), SingleFloat(false),
3490      ABI(ABIStr)
3491  {}
3492
3493  virtual const char *getABI() const { return ABI.c_str(); }
3494  virtual bool setABI(const std::string &Name) = 0;
3495  virtual bool setCPU(const std::string &Name) {
3496    CPU = Name;
3497    return true;
3498  }
3499  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3500    Features[ABI] = true;
3501    Features[CPU] = true;
3502  }
3503
3504  virtual void getArchDefines(const LangOptions &Opts,
3505                              MacroBuilder &Builder) const {
3506    if (SoftFloat)
3507      Builder.defineMacro("__mips_soft_float", Twine(1));
3508    else if (SingleFloat)
3509      Builder.defineMacro("__mips_single_float", Twine(1));
3510    else if (!SoftFloat && !SingleFloat)
3511      Builder.defineMacro("__mips_hard_float", Twine(1));
3512    else
3513      llvm_unreachable("Invalid float ABI for Mips.");
3514
3515    Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
3516    Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
3517    Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
3518  }
3519
3520  virtual void getTargetDefines(const LangOptions &Opts,
3521                                MacroBuilder &Builder) const = 0;
3522  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3523                                 unsigned &NumRecords) const {
3524    // FIXME: Implement!
3525  }
3526  virtual bool hasFeature(StringRef Feature) const {
3527    return Feature == "mips";
3528  }
3529  virtual const char *getVAListDeclaration() const {
3530    return "typedef void* __builtin_va_list;";
3531  }
3532  virtual void getGCCRegNames(const char * const *&Names,
3533                              unsigned &NumNames) const {
3534    static const char * const GCCRegNames[] = {
3535      // CPU register names
3536      // Must match second column of GCCRegAliases
3537      "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
3538      "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
3539      "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
3540      "$24",  "$25",  "$26",  "$27",  "$28",  "$29",  "$30",  "$31",
3541      // Floating point register names
3542      "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
3543      "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
3544      "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
3545      "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
3546      // Hi/lo and condition register names
3547      "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
3548      "$fcc5","$fcc6","$fcc7"
3549    };
3550    Names = GCCRegNames;
3551    NumNames = llvm::array_lengthof(GCCRegNames);
3552  }
3553  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3554                                unsigned &NumAliases) const = 0;
3555  virtual bool validateAsmConstraint(const char *&Name,
3556                                     TargetInfo::ConstraintInfo &Info) const {
3557    switch (*Name) {
3558    default:
3559      return false;
3560
3561    case 'r': // CPU registers.
3562    case 'd': // Equivalent to "r" unless generating MIPS16 code.
3563    case 'y': // Equivalent to "r", backwards compatibility only.
3564    case 'f': // floating-point registers.
3565    case 'c': // $25 for indirect jumps
3566    case 'l': // lo register
3567    case 'x': // hilo register pair
3568      Info.setAllowsRegister();
3569      return true;
3570    }
3571  }
3572
3573  virtual const char *getClobbers() const {
3574    // FIXME: Implement!
3575    return "";
3576  }
3577
3578  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3579                                 StringRef Name,
3580                                 bool Enabled) const {
3581    if (Name == "soft-float" || Name == "single-float" ||
3582        Name == "o32" || Name == "n32" || Name == "n64" || Name == "eabi" ||
3583        Name == "mips32" || Name == "mips32r2" ||
3584        Name == "mips64" || Name == "mips64r2") {
3585      Features[Name] = Enabled;
3586      return true;
3587    }
3588    return false;
3589  }
3590
3591  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3592    SoftFloat = false;
3593    SingleFloat = false;
3594
3595    for (std::vector<std::string>::iterator it = Features.begin(),
3596         ie = Features.end(); it != ie; ++it) {
3597      if (*it == "+single-float") {
3598        SingleFloat = true;
3599        break;
3600      }
3601
3602      if (*it == "+soft-float") {
3603        SoftFloat = true;
3604        // This option is front-end specific.
3605        // Do not need to pass it to the backend.
3606        Features.erase(it);
3607        break;
3608      }
3609    }
3610  }
3611};
3612
3613class Mips32TargetInfoBase : public MipsTargetInfoBase {
3614public:
3615  Mips32TargetInfoBase(const std::string& triple) :
3616    MipsTargetInfoBase(triple, "o32", "mips32") {
3617    SizeType = UnsignedInt;
3618    PtrDiffType = SignedInt;
3619  }
3620  virtual bool setABI(const std::string &Name) {
3621    if ((Name == "o32") || (Name == "eabi")) {
3622      ABI = Name;
3623      return true;
3624    } else
3625      return false;
3626  }
3627  virtual void getArchDefines(const LangOptions &Opts,
3628                              MacroBuilder &Builder) const {
3629    MipsTargetInfoBase::getArchDefines(Opts, Builder);
3630
3631    if (ABI == "o32") {
3632      Builder.defineMacro("__mips_o32");
3633      Builder.defineMacro("_ABIO32", "1");
3634      Builder.defineMacro("_MIPS_SIM", "_ABIO32");
3635    }
3636    else if (ABI == "eabi")
3637      Builder.defineMacro("__mips_eabi");
3638    else
3639      llvm_unreachable("Invalid ABI for Mips32.");
3640  }
3641  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3642                                unsigned &NumAliases) const {
3643    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3644      { { "at" },  "$1" },
3645      { { "v0" },  "$2" },
3646      { { "v1" },  "$3" },
3647      { { "a0" },  "$4" },
3648      { { "a1" },  "$5" },
3649      { { "a2" },  "$6" },
3650      { { "a3" },  "$7" },
3651      { { "t0" },  "$8" },
3652      { { "t1" },  "$9" },
3653      { { "t2" }, "$10" },
3654      { { "t3" }, "$11" },
3655      { { "t4" }, "$12" },
3656      { { "t5" }, "$13" },
3657      { { "t6" }, "$14" },
3658      { { "t7" }, "$15" },
3659      { { "s0" }, "$16" },
3660      { { "s1" }, "$17" },
3661      { { "s2" }, "$18" },
3662      { { "s3" }, "$19" },
3663      { { "s4" }, "$20" },
3664      { { "s5" }, "$21" },
3665      { { "s6" }, "$22" },
3666      { { "s7" }, "$23" },
3667      { { "t8" }, "$24" },
3668      { { "t9" }, "$25" },
3669      { { "k0" }, "$26" },
3670      { { "k1" }, "$27" },
3671      { { "gp" }, "$28" },
3672      { { "sp","$sp" }, "$29" },
3673      { { "fp","$fp" }, "$30" },
3674      { { "ra" }, "$31" }
3675    };
3676    Aliases = GCCRegAliases;
3677    NumAliases = llvm::array_lengthof(GCCRegAliases);
3678  }
3679};
3680
3681class Mips32EBTargetInfo : public Mips32TargetInfoBase {
3682public:
3683  Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3684    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3685                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3686  }
3687  virtual void getTargetDefines(const LangOptions &Opts,
3688                                MacroBuilder &Builder) const {
3689    DefineStd(Builder, "mips", Opts);
3690    Builder.defineMacro("_mips");
3691    DefineStd(Builder, "MIPSEB", Opts);
3692    Builder.defineMacro("_MIPSEB");
3693    Builder.defineMacro("__REGISTER_PREFIX__", "");
3694    getArchDefines(Opts, Builder);
3695  }
3696};
3697
3698class Mips32ELTargetInfo : public Mips32TargetInfoBase {
3699public:
3700  Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3701    BigEndian = false;
3702    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3703                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3704  }
3705  virtual void getTargetDefines(const LangOptions &Opts,
3706                                MacroBuilder &Builder) const {
3707    DefineStd(Builder, "mips", Opts);
3708    Builder.defineMacro("_mips");
3709    DefineStd(Builder, "MIPSEL", Opts);
3710    Builder.defineMacro("_MIPSEL");
3711    Builder.defineMacro("__REGISTER_PREFIX__", "");
3712    getArchDefines(Opts, Builder);
3713  }
3714};
3715
3716class Mips64TargetInfoBase : public MipsTargetInfoBase {
3717  virtual void SetDescriptionString(const std::string &Name) = 0;
3718public:
3719  Mips64TargetInfoBase(const std::string& triple) :
3720    MipsTargetInfoBase(triple, "n64", "mips64") {
3721    LongWidth = LongAlign = 64;
3722    PointerWidth = PointerAlign = 64;
3723    LongDoubleWidth = LongDoubleAlign = 128;
3724    LongDoubleFormat = &llvm::APFloat::IEEEquad;
3725    SuitableAlign = 128;
3726  }
3727  virtual bool setABI(const std::string &Name) {
3728    SetDescriptionString(Name);
3729
3730    if (Name != "n32" && Name != "n64")
3731      return false;
3732
3733    ABI = Name;
3734
3735    if (Name == "n32") {
3736      LongWidth = LongAlign = 32;
3737      PointerWidth = PointerAlign = 32;
3738    }
3739
3740    return true;
3741  }
3742  virtual void getArchDefines(const LangOptions &Opts,
3743                              MacroBuilder &Builder) const {
3744    MipsTargetInfoBase::getArchDefines(Opts, Builder);
3745
3746    if (ABI == "n32") {
3747      Builder.defineMacro("__mips_n32");
3748      Builder.defineMacro("_ABIN32", "2");
3749      Builder.defineMacro("_MIPS_SIM", "_ABIN32");
3750    }
3751    else if (ABI == "n64") {
3752      Builder.defineMacro("__mips_n64");
3753      Builder.defineMacro("_ABI64", "3");
3754      Builder.defineMacro("_MIPS_SIM", "_ABI64");
3755    }
3756    else
3757      llvm_unreachable("Invalid ABI for Mips64.");
3758  }
3759  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3760                                unsigned &NumAliases) const {
3761    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3762      { { "at" },  "$1" },
3763      { { "v0" },  "$2" },
3764      { { "v1" },  "$3" },
3765      { { "a0" },  "$4" },
3766      { { "a1" },  "$5" },
3767      { { "a2" },  "$6" },
3768      { { "a3" },  "$7" },
3769      { { "a4" },  "$8" },
3770      { { "a5" },  "$9" },
3771      { { "a6" }, "$10" },
3772      { { "a7" }, "$11" },
3773      { { "t0" }, "$12" },
3774      { { "t1" }, "$13" },
3775      { { "t2" }, "$14" },
3776      { { "t3" }, "$15" },
3777      { { "s0" }, "$16" },
3778      { { "s1" }, "$17" },
3779      { { "s2" }, "$18" },
3780      { { "s3" }, "$19" },
3781      { { "s4" }, "$20" },
3782      { { "s5" }, "$21" },
3783      { { "s6" }, "$22" },
3784      { { "s7" }, "$23" },
3785      { { "t8" }, "$24" },
3786      { { "t9" }, "$25" },
3787      { { "k0" }, "$26" },
3788      { { "k1" }, "$27" },
3789      { { "gp" }, "$28" },
3790      { { "sp","$sp" }, "$29" },
3791      { { "fp","$fp" }, "$30" },
3792      { { "ra" }, "$31" }
3793    };
3794    Aliases = GCCRegAliases;
3795    NumAliases = llvm::array_lengthof(GCCRegAliases);
3796  }
3797};
3798
3799class Mips64EBTargetInfo : public Mips64TargetInfoBase {
3800  virtual void SetDescriptionString(const std::string &Name) {
3801    // Change DescriptionString only if ABI is n32.
3802    if (Name == "n32")
3803      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3804                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3805                          "v64:64:64-n32";
3806  }
3807public:
3808  Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3809    // Default ABI is n64.
3810    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3811                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3812                        "v64:64:64-n32";
3813  }
3814  virtual void getTargetDefines(const LangOptions &Opts,
3815                                MacroBuilder &Builder) const {
3816    DefineStd(Builder, "mips", Opts);
3817    Builder.defineMacro("_mips");
3818    DefineStd(Builder, "MIPSEB", Opts);
3819    Builder.defineMacro("_MIPSEB");
3820    Builder.defineMacro("__REGISTER_PREFIX__", "");
3821    getArchDefines(Opts, Builder);
3822  }
3823};
3824
3825class Mips64ELTargetInfo : public Mips64TargetInfoBase {
3826  virtual void SetDescriptionString(const std::string &Name) {
3827    // Change DescriptionString only if ABI is n32.
3828    if (Name == "n32")
3829      DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3830                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
3831                          "-v64:64:64-n32";
3832  }
3833public:
3834  Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3835    // Default ABI is n64.
3836    BigEndian = false;
3837    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3838                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3839                        "v64:64:64-n32";
3840  }
3841  virtual void getTargetDefines(const LangOptions &Opts,
3842                                MacroBuilder &Builder) const {
3843    DefineStd(Builder, "mips", Opts);
3844    Builder.defineMacro("_mips");
3845    DefineStd(Builder, "MIPSEL", Opts);
3846    Builder.defineMacro("_MIPSEL");
3847    Builder.defineMacro("__REGISTER_PREFIX__", "");
3848    getArchDefines(Opts, Builder);
3849  }
3850};
3851} // end anonymous namespace.
3852
3853namespace {
3854class PNaClTargetInfo : public TargetInfo {
3855public:
3856  PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
3857    BigEndian = false;
3858    this->UserLabelPrefix = "";
3859    this->LongAlign = 32;
3860    this->LongWidth = 32;
3861    this->PointerAlign = 32;
3862    this->PointerWidth = 32;
3863    this->IntMaxType = TargetInfo::SignedLongLong;
3864    this->UIntMaxType = TargetInfo::UnsignedLongLong;
3865    this->Int64Type = TargetInfo::SignedLongLong;
3866    this->DoubleAlign = 64;
3867    this->LongDoubleWidth = 64;
3868    this->LongDoubleAlign = 64;
3869    this->SizeType = TargetInfo::UnsignedInt;
3870    this->PtrDiffType = TargetInfo::SignedInt;
3871    this->IntPtrType = TargetInfo::SignedInt;
3872    this->RegParmMax = 2;
3873    DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
3874                        "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
3875  }
3876
3877  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3878  }
3879  virtual void getArchDefines(const LangOptions &Opts,
3880                              MacroBuilder &Builder) const {
3881    Builder.defineMacro("__le32__");
3882    Builder.defineMacro("__pnacl__");
3883  }
3884  virtual void getTargetDefines(const LangOptions &Opts,
3885                                MacroBuilder &Builder) const {
3886    DefineStd(Builder, "unix", Opts);
3887    Builder.defineMacro("__ELF__");
3888    if (Opts.POSIXThreads)
3889      Builder.defineMacro("_REENTRANT");
3890    if (Opts.CPlusPlus)
3891      Builder.defineMacro("_GNU_SOURCE");
3892
3893    Builder.defineMacro("__LITTLE_ENDIAN__");
3894    Builder.defineMacro("__native_client__");
3895    getArchDefines(Opts, Builder);
3896  }
3897  virtual bool hasFeature(StringRef Feature) const {
3898    return Feature == "pnacl";
3899  }
3900  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3901                                 unsigned &NumRecords) const {
3902  }
3903  virtual const char *getVAListDeclaration() const {
3904    return "typedef int __builtin_va_list[4];";
3905  }
3906  virtual void getGCCRegNames(const char * const *&Names,
3907                              unsigned &NumNames) const;
3908  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3909                                unsigned &NumAliases) const;
3910  virtual bool validateAsmConstraint(const char *&Name,
3911                                     TargetInfo::ConstraintInfo &Info) const {
3912    return false;
3913  }
3914
3915  virtual const char *getClobbers() const {
3916    return "";
3917  }
3918};
3919
3920void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
3921                                     unsigned &NumNames) const {
3922  Names = NULL;
3923  NumNames = 0;
3924}
3925
3926void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3927                                       unsigned &NumAliases) const {
3928  Aliases = NULL;
3929  NumAliases = 0;
3930}
3931} // end anonymous namespace.
3932
3933
3934//===----------------------------------------------------------------------===//
3935// Driver code
3936//===----------------------------------------------------------------------===//
3937
3938static TargetInfo *AllocateTarget(const std::string &T) {
3939  llvm::Triple Triple(T);
3940  llvm::Triple::OSType os = Triple.getOS();
3941
3942  switch (Triple.getArch()) {
3943  default:
3944    return NULL;
3945
3946  case llvm::Triple::hexagon:
3947    return new HexagonTargetInfo(T);
3948
3949  case llvm::Triple::arm:
3950  case llvm::Triple::thumb:
3951    if (Triple.isOSDarwin())
3952      return new DarwinARMTargetInfo(T);
3953
3954    switch (os) {
3955    case llvm::Triple::Linux:
3956      return new LinuxTargetInfo<ARMTargetInfo>(T);
3957    case llvm::Triple::FreeBSD:
3958      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
3959    case llvm::Triple::NetBSD:
3960      return new NetBSDTargetInfo<ARMTargetInfo>(T);
3961    case llvm::Triple::RTEMS:
3962      return new RTEMSTargetInfo<ARMTargetInfo>(T);
3963    default:
3964      return new ARMTargetInfo(T);
3965    }
3966
3967  case llvm::Triple::msp430:
3968    return new MSP430TargetInfo(T);
3969
3970  case llvm::Triple::mips:
3971    switch (os) {
3972    case llvm::Triple::Linux:
3973      return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
3974    case llvm::Triple::RTEMS:
3975      return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
3976    case llvm::Triple::FreeBSD:
3977      return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
3978    case llvm::Triple::NetBSD:
3979      return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
3980    default:
3981      return new Mips32EBTargetInfo(T);
3982    }
3983
3984  case llvm::Triple::mipsel:
3985    switch (os) {
3986    case llvm::Triple::Linux:
3987      return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
3988    case llvm::Triple::RTEMS:
3989      return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
3990    case llvm::Triple::FreeBSD:
3991      return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
3992    case llvm::Triple::NetBSD:
3993      return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
3994    default:
3995      return new Mips32ELTargetInfo(T);
3996    }
3997
3998  case llvm::Triple::mips64:
3999    switch (os) {
4000    case llvm::Triple::Linux:
4001      return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
4002    case llvm::Triple::RTEMS:
4003      return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
4004    case llvm::Triple::FreeBSD:
4005      return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
4006    case llvm::Triple::NetBSD:
4007      return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
4008    default:
4009      return new Mips64EBTargetInfo(T);
4010    }
4011
4012  case llvm::Triple::mips64el:
4013    switch (os) {
4014    case llvm::Triple::Linux:
4015      return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
4016    case llvm::Triple::RTEMS:
4017      return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
4018    case llvm::Triple::FreeBSD:
4019      return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
4020    case llvm::Triple::NetBSD:
4021      return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
4022    default:
4023      return new Mips64ELTargetInfo(T);
4024    }
4025
4026  case llvm::Triple::le32:
4027    switch (os) {
4028      case llvm::Triple::NativeClient:
4029        return new PNaClTargetInfo(T);
4030      default:
4031        return NULL;
4032    }
4033
4034  case llvm::Triple::ppc:
4035    if (Triple.isOSDarwin())
4036      return new DarwinPPC32TargetInfo(T);
4037    switch (os) {
4038    case llvm::Triple::Linux:
4039      return new LinuxTargetInfo<PPC32TargetInfo>(T);
4040    case llvm::Triple::FreeBSD:
4041      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
4042    case llvm::Triple::NetBSD:
4043      return new NetBSDTargetInfo<PPC32TargetInfo>(T);
4044    case llvm::Triple::RTEMS:
4045      return new RTEMSTargetInfo<PPC32TargetInfo>(T);
4046    default:
4047      return new PPC32TargetInfo(T);
4048    }
4049
4050  case llvm::Triple::ppc64:
4051    if (Triple.isOSDarwin())
4052      return new DarwinPPC64TargetInfo(T);
4053    switch (os) {
4054    case llvm::Triple::Linux:
4055      return new LinuxTargetInfo<PPC64TargetInfo>(T);
4056    case llvm::Triple::Lv2:
4057      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
4058    case llvm::Triple::FreeBSD:
4059      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
4060    case llvm::Triple::NetBSD:
4061      return new NetBSDTargetInfo<PPC64TargetInfo>(T);
4062    default:
4063      return new PPC64TargetInfo(T);
4064    }
4065
4066  case llvm::Triple::nvptx:
4067    return new NVPTX32TargetInfo(T);
4068  case llvm::Triple::nvptx64:
4069    return new NVPTX64TargetInfo(T);
4070
4071  case llvm::Triple::mblaze:
4072    return new MBlazeTargetInfo(T);
4073
4074  case llvm::Triple::sparc:
4075    switch (os) {
4076    case llvm::Triple::Linux:
4077      return new LinuxTargetInfo<SparcV8TargetInfo>(T);
4078    case llvm::Triple::AuroraUX:
4079      return new AuroraUXSparcV8TargetInfo(T);
4080    case llvm::Triple::Solaris:
4081      return new SolarisSparcV8TargetInfo(T);
4082    case llvm::Triple::NetBSD:
4083      return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
4084    case llvm::Triple::RTEMS:
4085      return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
4086    default:
4087      return new SparcV8TargetInfo(T);
4088    }
4089
4090  // FIXME: Need a real SPU target.
4091  case llvm::Triple::cellspu:
4092    return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
4093
4094  case llvm::Triple::tce:
4095    return new TCETargetInfo(T);
4096
4097  case llvm::Triple::x86:
4098    if (Triple.isOSDarwin())
4099      return new DarwinI386TargetInfo(T);
4100
4101    switch (os) {
4102    case llvm::Triple::AuroraUX:
4103      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
4104    case llvm::Triple::Linux:
4105      return new LinuxTargetInfo<X86_32TargetInfo>(T);
4106    case llvm::Triple::DragonFly:
4107      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
4108    case llvm::Triple::NetBSD:
4109      return new NetBSDI386TargetInfo(T);
4110    case llvm::Triple::OpenBSD:
4111      return new OpenBSDI386TargetInfo(T);
4112    case llvm::Triple::FreeBSD:
4113      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
4114    case llvm::Triple::Minix:
4115      return new MinixTargetInfo<X86_32TargetInfo>(T);
4116    case llvm::Triple::Solaris:
4117      return new SolarisTargetInfo<X86_32TargetInfo>(T);
4118    case llvm::Triple::Cygwin:
4119      return new CygwinX86_32TargetInfo(T);
4120    case llvm::Triple::MinGW32:
4121      return new MinGWX86_32TargetInfo(T);
4122    case llvm::Triple::Win32:
4123      return new VisualStudioWindowsX86_32TargetInfo(T);
4124    case llvm::Triple::Haiku:
4125      return new HaikuX86_32TargetInfo(T);
4126    case llvm::Triple::RTEMS:
4127      return new RTEMSX86_32TargetInfo(T);
4128    default:
4129      return new X86_32TargetInfo(T);
4130    }
4131
4132  case llvm::Triple::x86_64:
4133    if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
4134      return new DarwinX86_64TargetInfo(T);
4135
4136    switch (os) {
4137    case llvm::Triple::AuroraUX:
4138      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
4139    case llvm::Triple::Linux:
4140      return new LinuxTargetInfo<X86_64TargetInfo>(T);
4141    case llvm::Triple::DragonFly:
4142      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
4143    case llvm::Triple::NetBSD:
4144      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
4145    case llvm::Triple::OpenBSD:
4146      return new OpenBSDX86_64TargetInfo(T);
4147    case llvm::Triple::FreeBSD:
4148      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
4149    case llvm::Triple::Solaris:
4150      return new SolarisTargetInfo<X86_64TargetInfo>(T);
4151    case llvm::Triple::MinGW32:
4152      return new MinGWX86_64TargetInfo(T);
4153    case llvm::Triple::Win32:   // This is what Triple.h supports now.
4154      return new VisualStudioWindowsX86_64TargetInfo(T);
4155    default:
4156      return new X86_64TargetInfo(T);
4157    }
4158  }
4159}
4160
4161/// CreateTargetInfo - Return the target info object for the specified target
4162/// triple.
4163TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
4164                                         TargetOptions &Opts) {
4165  llvm::Triple Triple(Opts.Triple);
4166
4167  // Construct the target
4168  OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
4169  if (!Target) {
4170    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
4171    return 0;
4172  }
4173
4174  // Set the target CPU if specified.
4175  if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
4176    Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
4177    return 0;
4178  }
4179
4180  // Set the target ABI if specified.
4181  if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
4182    Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
4183    return 0;
4184  }
4185
4186  // Set the target C++ ABI.
4187  if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
4188    Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
4189    return 0;
4190  }
4191
4192  // Compute the default target features, we need the target to handle this
4193  // because features may have dependencies on one another.
4194  llvm::StringMap<bool> Features;
4195  Target->getDefaultFeatures(Features);
4196
4197  // Apply the user specified deltas.
4198  // First the enables.
4199  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4200         ie = Opts.Features.end(); it != ie; ++it) {
4201    const char *Name = it->c_str();
4202
4203    if (Name[0] != '+')
4204      continue;
4205
4206    // Apply the feature via the target.
4207    if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
4208      Diags.Report(diag::err_target_invalid_feature) << Name;
4209      return 0;
4210    }
4211  }
4212
4213  // Then the disables.
4214  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4215         ie = Opts.Features.end(); it != ie; ++it) {
4216    const char *Name = it->c_str();
4217
4218    if (Name[0] == '+')
4219      continue;
4220
4221    // Apply the feature via the target.
4222    if (Name[0] != '-' ||
4223        !Target->setFeatureEnabled(Features, Name + 1, false)) {
4224      Diags.Report(diag::err_target_invalid_feature) << Name;
4225      return 0;
4226    }
4227  }
4228
4229  // Add the features to the compile options.
4230  //
4231  // FIXME: If we are completely confident that we have the right set, we only
4232  // need to pass the minuses.
4233  Opts.Features.clear();
4234  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
4235         ie = Features.end(); it != ie; ++it)
4236    Opts.Features.push_back((it->second ? "+" : "-") + it->first().str());
4237  Target->HandleTargetFeatures(Opts.Features);
4238
4239  return Target.take();
4240}
4241