Targets.cpp revision 448f68d7ef0aa1b8f3016af00ce4851c8526805f 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include "llvm/Support/ErrorHandling.h"
30#include "llvm/Type.h"
31#include <algorithm>
32using namespace clang;
33
34//===----------------------------------------------------------------------===//
35//  Common code shared among targets.
36//===----------------------------------------------------------------------===//
37
38/// DefineStd - Define a macro name and standard variants.  For example if
39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
40/// when in GNU mode.
41static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42                      const LangOptions &Opts) {
43  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44
45  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46  // in the user's namespace.
47  if (Opts.GNUMode)
48    Builder.defineMacro(MacroName);
49
50  // Define __unix.
51  Builder.defineMacro("__" + MacroName);
52
53  // Define __unix__.
54  Builder.defineMacro("__" + MacroName + "__");
55}
56
57static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName,
58                            bool Tuning = true) {
59  Builder.defineMacro("__" + CPUName);
60  Builder.defineMacro("__" + CPUName + "__");
61  if (Tuning)
62    Builder.defineMacro("__tune_" + CPUName + "__");
63}
64
65//===----------------------------------------------------------------------===//
66// Defines specific to certain operating systems.
67//===----------------------------------------------------------------------===//
68
69namespace {
70template<typename TgtInfo>
71class OSTargetInfo : public TgtInfo {
72protected:
73  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
74                            MacroBuilder &Builder) const=0;
75public:
76  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
77  virtual void getTargetDefines(const LangOptions &Opts,
78                                MacroBuilder &Builder) const {
79    TgtInfo::getTargetDefines(Opts, Builder);
80    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
81  }
82
83};
84} // end anonymous namespace
85
86
87static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
88                             const llvm::Triple &Triple,
89                             StringRef &PlatformName,
90                             VersionTuple &PlatformMinVersion) {
91  Builder.defineMacro("__APPLE_CC__", "5621");
92  Builder.defineMacro("__APPLE__");
93  Builder.defineMacro("__MACH__");
94  Builder.defineMacro("OBJC_NEW_PROPERTIES");
95
96  if (!Opts.ObjCAutoRefCount) {
97    // __weak is always defined, for use in blocks and with objc pointers.
98    Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
99
100    // Darwin defines __strong even in C mode (just to nothing).
101    if (Opts.getGC() != LangOptions::NonGC)
102      Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
103    else
104      Builder.defineMacro("__strong", "");
105
106    // __unsafe_unretained is defined to nothing in non-ARC mode. We even
107    // allow this in C, since one might have block pointers in structs that
108    // are used in pure C code and in Objective-C ARC.
109    Builder.defineMacro("__unsafe_unretained", "");
110  }
111
112  if (Opts.Static)
113    Builder.defineMacro("__STATIC__");
114  else
115    Builder.defineMacro("__DYNAMIC__");
116
117  if (Opts.POSIXThreads)
118    Builder.defineMacro("_REENTRANT");
119
120  // Get the platform type and version number from the triple.
121  unsigned Maj, Min, Rev;
122
123  // If no version was given, default to to 10.4.0, for simplifying tests.
124  if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") {
125    PlatformName = "macosx";
126    Min = Rev = 0;
127    Maj = 8;
128  } else {
129    // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]",
130    // "-osxNNN", and "-iosNNN").
131
132    if (Triple.getOS() == llvm::Triple::Darwin) {
133      // For historical reasons that make little sense, the version passed here
134      // is the "darwin" version, which drops the 10 and offsets by 4.
135      Triple.getOSVersion(Maj, Min, Rev);
136
137      if (Triple.getEnvironmentName() == "iphoneos") {
138        PlatformName = "ios";
139      } else {
140        PlatformName = "macosx";
141        Rev = Min;
142        Min = Maj - 4;
143        Maj = 10;
144      }
145    } else {
146      Triple.getOSVersion(Maj, Min, Rev);
147      PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
148    }
149  }
150
151  // If -ccc-host-triple arch-pc-win32-macho option specified, we're
152  // generating code for Win32 ABI. No need to emit
153  // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
154  if (PlatformName == "win32") {
155    PlatformMinVersion = VersionTuple(Maj, Min, Rev);
156    return;
157  }
158
159  // Set the appropriate OS version define.
160  if (PlatformName == "ios") {
161    assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
162    char Str[6];
163    Str[0] = '0' + Maj;
164    Str[1] = '0' + (Min / 10);
165    Str[2] = '0' + (Min % 10);
166    Str[3] = '0' + (Rev / 10);
167    Str[4] = '0' + (Rev % 10);
168    Str[5] = '\0';
169    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
170  } else {
171    // Note that the Driver allows versions which aren't representable in the
172    // define (because we only get a single digit for the minor and micro
173    // revision numbers). So, we limit them to the maximum representable
174    // version.
175    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
176    assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
177    char Str[5];
178    Str[0] = '0' + (Maj / 10);
179    Str[1] = '0' + (Maj % 10);
180    Str[2] = '0' + std::min(Min, 9U);
181    Str[3] = '0' + std::min(Rev, 9U);
182    Str[4] = '\0';
183    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
184  }
185
186  PlatformMinVersion = VersionTuple(Maj, Min, Rev);
187}
188
189namespace {
190template<typename Target>
191class DarwinTargetInfo : public OSTargetInfo<Target> {
192protected:
193  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
194                            MacroBuilder &Builder) const {
195    getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
196                     this->PlatformMinVersion);
197  }
198
199public:
200  DarwinTargetInfo(const std::string& triple) :
201    OSTargetInfo<Target>(triple) {
202      llvm::Triple T = llvm::Triple(triple);
203      this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
204      this->MCountName = "\01mcount";
205    }
206
207  virtual std::string isValidSectionSpecifier(StringRef SR) const {
208    // Let MCSectionMachO validate this.
209    StringRef Segment, Section;
210    unsigned TAA, StubSize;
211    bool HasTAA;
212    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
213                                                       TAA, HasTAA, StubSize);
214  }
215
216  virtual const char *getStaticInitSectionSpecifier() const {
217    // FIXME: We should return 0 when building kexts.
218    return "__TEXT,__StaticInit,regular,pure_instructions";
219  }
220
221};
222
223
224// DragonFlyBSD Target
225template<typename Target>
226class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
227protected:
228  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
229                            MacroBuilder &Builder) const {
230    // DragonFly defines; list based off of gcc output
231    Builder.defineMacro("__DragonFly__");
232    Builder.defineMacro("__DragonFly_cc_version", "100001");
233    Builder.defineMacro("__ELF__");
234    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
235    Builder.defineMacro("__tune_i386__");
236    DefineStd(Builder, "unix", Opts);
237  }
238public:
239  DragonFlyBSDTargetInfo(const std::string &triple)
240    : OSTargetInfo<Target>(triple) {}
241};
242
243// FreeBSD Target
244template<typename Target>
245class FreeBSDTargetInfo : public OSTargetInfo<Target> {
246protected:
247  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
248                            MacroBuilder &Builder) const {
249    // FreeBSD defines; list based off of gcc output
250
251    unsigned Release = Triple.getOSMajorVersion();
252    if (Release == 0U)
253      Release = 8;
254
255    Builder.defineMacro("__FreeBSD__", Twine(Release));
256    Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
257    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
258    DefineStd(Builder, "unix", Opts);
259    Builder.defineMacro("__ELF__");
260  }
261public:
262  FreeBSDTargetInfo(const std::string &triple)
263    : OSTargetInfo<Target>(triple) {
264      this->UserLabelPrefix = "";
265
266      llvm::Triple Triple(triple);
267      switch (Triple.getArch()) {
268        default:
269        case llvm::Triple::x86:
270        case llvm::Triple::x86_64:
271          this->MCountName = ".mcount";
272          break;
273        case llvm::Triple::mips:
274        case llvm::Triple::mipsel:
275        case llvm::Triple::ppc:
276        case llvm::Triple::ppc64:
277          this->MCountName = "_mcount";
278          break;
279        case llvm::Triple::arm:
280          this->MCountName = "__mcount";
281          break;
282      }
283
284    }
285};
286
287// Minix Target
288template<typename Target>
289class MinixTargetInfo : public OSTargetInfo<Target> {
290protected:
291  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
292                            MacroBuilder &Builder) const {
293    // Minix defines
294
295    Builder.defineMacro("__minix", "3");
296    Builder.defineMacro("_EM_WSIZE", "4");
297    Builder.defineMacro("_EM_PSIZE", "4");
298    Builder.defineMacro("_EM_SSIZE", "2");
299    Builder.defineMacro("_EM_LSIZE", "4");
300    Builder.defineMacro("_EM_FSIZE", "4");
301    Builder.defineMacro("_EM_DSIZE", "8");
302    Builder.defineMacro("__ELF__");
303    DefineStd(Builder, "unix", Opts);
304  }
305public:
306  MinixTargetInfo(const std::string &triple)
307    : OSTargetInfo<Target>(triple) {
308      this->UserLabelPrefix = "";
309    }
310};
311
312// Linux target
313template<typename Target>
314class LinuxTargetInfo : public OSTargetInfo<Target> {
315protected:
316  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
317                            MacroBuilder &Builder) const {
318    // Linux defines; list based off of gcc output
319    DefineStd(Builder, "unix", Opts);
320    DefineStd(Builder, "linux", Opts);
321    Builder.defineMacro("__gnu_linux__");
322    Builder.defineMacro("__ELF__");
323    if (Opts.POSIXThreads)
324      Builder.defineMacro("_REENTRANT");
325    if (Opts.CPlusPlus)
326      Builder.defineMacro("_GNU_SOURCE");
327  }
328public:
329  LinuxTargetInfo(const std::string& triple)
330    : OSTargetInfo<Target>(triple) {
331    this->UserLabelPrefix = "";
332    this->WIntType = TargetInfo::UnsignedInt;
333  }
334
335  virtual const char *getStaticInitSectionSpecifier() const {
336    return ".text.startup";
337  }
338};
339
340// NetBSD Target
341template<typename Target>
342class NetBSDTargetInfo : public OSTargetInfo<Target> {
343protected:
344  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
345                            MacroBuilder &Builder) const {
346    // NetBSD defines; list based off of gcc output
347    Builder.defineMacro("__NetBSD__");
348    Builder.defineMacro("__unix__");
349    Builder.defineMacro("__ELF__");
350    if (Opts.POSIXThreads)
351      Builder.defineMacro("_POSIX_THREADS");
352  }
353public:
354  NetBSDTargetInfo(const std::string &triple)
355    : OSTargetInfo<Target>(triple) {
356      this->UserLabelPrefix = "";
357    }
358};
359
360// OpenBSD Target
361template<typename Target>
362class OpenBSDTargetInfo : public OSTargetInfo<Target> {
363protected:
364  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
365                            MacroBuilder &Builder) const {
366    // OpenBSD defines; list based off of gcc output
367
368    Builder.defineMacro("__OpenBSD__");
369    DefineStd(Builder, "unix", Opts);
370    Builder.defineMacro("__ELF__");
371    if (Opts.POSIXThreads)
372      Builder.defineMacro("_POSIX_THREADS");
373  }
374public:
375  OpenBSDTargetInfo(const std::string &triple)
376    : OSTargetInfo<Target>(triple) {
377      this->UserLabelPrefix = "";
378
379      llvm::Triple Triple(triple);
380      switch (Triple.getArch()) {
381        default:
382        case llvm::Triple::x86:
383        case llvm::Triple::x86_64:
384        case llvm::Triple::arm:
385	case llvm::Triple::sparc:
386          this->MCountName = "__mcount";
387          break;
388        case llvm::Triple::mips64:
389        case llvm::Triple::mips64el:
390        case llvm::Triple::ppc:
391	case llvm::Triple::sparcv9:
392          this->MCountName = "_mcount";
393          break;
394      }
395  }
396};
397
398// PSP Target
399template<typename Target>
400class PSPTargetInfo : public OSTargetInfo<Target> {
401protected:
402  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
403                            MacroBuilder &Builder) const {
404    // PSP defines; list based on the output of the pspdev gcc toolchain.
405    Builder.defineMacro("PSP");
406    Builder.defineMacro("_PSP");
407    Builder.defineMacro("__psp__");
408    Builder.defineMacro("__ELF__");
409  }
410public:
411  PSPTargetInfo(const std::string& triple)
412    : OSTargetInfo<Target>(triple) {
413    this->UserLabelPrefix = "";
414  }
415};
416
417// PS3 PPU Target
418template<typename Target>
419class PS3PPUTargetInfo : public OSTargetInfo<Target> {
420protected:
421  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
422                            MacroBuilder &Builder) const {
423    // PS3 PPU defines.
424    Builder.defineMacro("__PPC__");
425    Builder.defineMacro("__PPU__");
426    Builder.defineMacro("__CELLOS_LV2__");
427    Builder.defineMacro("__ELF__");
428    Builder.defineMacro("__LP32__");
429    Builder.defineMacro("_ARCH_PPC64");
430    Builder.defineMacro("__powerpc64__");
431  }
432public:
433  PS3PPUTargetInfo(const std::string& triple)
434    : OSTargetInfo<Target>(triple) {
435    this->UserLabelPrefix = "";
436    this->LongWidth = this->LongAlign = 32;
437    this->PointerWidth = this->PointerAlign = 32;
438    this->IntMaxType = TargetInfo::SignedLongLong;
439    this->UIntMaxType = TargetInfo::UnsignedLongLong;
440    this->Int64Type = TargetInfo::SignedLongLong;
441    this->SizeType = TargetInfo::UnsignedInt;
442    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
443                              "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
444  }
445};
446
447// FIXME: Need a real SPU target.
448// PS3 SPU Target
449template<typename Target>
450class PS3SPUTargetInfo : public OSTargetInfo<Target> {
451protected:
452  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
453                            MacroBuilder &Builder) const {
454    // PS3 PPU defines.
455    Builder.defineMacro("__SPU__");
456    Builder.defineMacro("__ELF__");
457  }
458public:
459  PS3SPUTargetInfo(const std::string& triple)
460    : OSTargetInfo<Target>(triple) {
461    this->UserLabelPrefix = "";
462  }
463};
464
465// AuroraUX target
466template<typename Target>
467class AuroraUXTargetInfo : public OSTargetInfo<Target> {
468protected:
469  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
470                            MacroBuilder &Builder) const {
471    DefineStd(Builder, "sun", Opts);
472    DefineStd(Builder, "unix", Opts);
473    Builder.defineMacro("__ELF__");
474    Builder.defineMacro("__svr4__");
475    Builder.defineMacro("__SVR4");
476  }
477public:
478  AuroraUXTargetInfo(const std::string& triple)
479    : OSTargetInfo<Target>(triple) {
480    this->UserLabelPrefix = "";
481    this->WCharType = this->SignedLong;
482    // FIXME: WIntType should be SignedLong
483  }
484};
485
486// Solaris target
487template<typename Target>
488class SolarisTargetInfo : public OSTargetInfo<Target> {
489protected:
490  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
491                            MacroBuilder &Builder) const {
492    DefineStd(Builder, "sun", Opts);
493    DefineStd(Builder, "unix", Opts);
494    Builder.defineMacro("__ELF__");
495    Builder.defineMacro("__svr4__");
496    Builder.defineMacro("__SVR4");
497  }
498public:
499  SolarisTargetInfo(const std::string& triple)
500    : OSTargetInfo<Target>(triple) {
501    this->UserLabelPrefix = "";
502    this->WCharType = this->SignedLong;
503    // FIXME: WIntType should be SignedLong
504  }
505};
506
507// Windows target
508template<typename Target>
509class WindowsTargetInfo : public OSTargetInfo<Target> {
510protected:
511  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
512                            MacroBuilder &Builder) const {
513    Builder.defineMacro("_WIN32");
514  }
515  void getVisualStudioDefines(const LangOptions &Opts,
516                              MacroBuilder &Builder) const {
517    if (Opts.CPlusPlus) {
518      if (Opts.RTTI)
519        Builder.defineMacro("_CPPRTTI");
520
521      if (Opts.Exceptions)
522        Builder.defineMacro("_CPPUNWIND");
523    }
524
525    if (!Opts.CharIsSigned)
526      Builder.defineMacro("_CHAR_UNSIGNED");
527
528    // FIXME: POSIXThreads isn't exactly the option this should be defined for,
529    //        but it works for now.
530    if (Opts.POSIXThreads)
531      Builder.defineMacro("_MT");
532
533    if (Opts.MSCVersion != 0)
534      Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
535
536    if (Opts.MicrosoftExt) {
537      Builder.defineMacro("_MSC_EXTENSIONS");
538
539      if (Opts.CPlusPlus0x) {
540        Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
541        Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
542        Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
543      }
544    }
545
546    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
547  }
548
549public:
550  WindowsTargetInfo(const std::string &triple)
551    : OSTargetInfo<Target>(triple) {}
552};
553
554} // end anonymous namespace.
555
556//===----------------------------------------------------------------------===//
557// Specific target implementations.
558//===----------------------------------------------------------------------===//
559
560namespace {
561// PPC abstract base class
562class PPCTargetInfo : public TargetInfo {
563  static const Builtin::Info BuiltinInfo[];
564  static const char * const GCCRegNames[];
565  static const TargetInfo::GCCRegAlias GCCRegAliases[];
566public:
567  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {}
568
569  virtual void getTargetBuiltins(const Builtin::Info *&Records,
570                                 unsigned &NumRecords) const {
571    Records = BuiltinInfo;
572    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
573  }
574
575  virtual void getTargetDefines(const LangOptions &Opts,
576                                MacroBuilder &Builder) const;
577
578  virtual void getGCCRegNames(const char * const *&Names,
579                              unsigned &NumNames) const;
580  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
581                                unsigned &NumAliases) const;
582  virtual bool validateAsmConstraint(const char *&Name,
583                                     TargetInfo::ConstraintInfo &Info) const {
584    switch (*Name) {
585    default: return false;
586    case 'O': // Zero
587      break;
588    case 'b': // Base register
589    case 'f': // Floating point register
590      Info.setAllowsRegister();
591      break;
592    // FIXME: The following are added to allow parsing.
593    // I just took a guess at what the actions should be.
594    // Also, is more specific checking needed?  I.e. specific registers?
595    case 'd': // Floating point register (containing 64-bit value)
596    case 'v': // Altivec vector register
597      Info.setAllowsRegister();
598      break;
599    case 'w':
600      switch (Name[1]) {
601        case 'd':// VSX vector register to hold vector double data
602        case 'f':// VSX vector register to hold vector float data
603        case 's':// VSX vector register to hold scalar float data
604        case 'a':// Any VSX register
605          break;
606        default:
607          return false;
608      }
609      Info.setAllowsRegister();
610      Name++; // Skip over 'w'.
611      break;
612    case 'h': // `MQ', `CTR', or `LINK' register
613    case 'q': // `MQ' register
614    case 'c': // `CTR' register
615    case 'l': // `LINK' register
616    case 'x': // `CR' register (condition register) number 0
617    case 'y': // `CR' register (condition register)
618    case 'z': // `XER[CA]' carry bit (part of the XER register)
619      Info.setAllowsRegister();
620      break;
621    case 'I': // Signed 16-bit constant
622    case 'J': // Unsigned 16-bit constant shifted left 16 bits
623              //  (use `L' instead for SImode constants)
624    case 'K': // Unsigned 16-bit constant
625    case 'L': // Signed 16-bit constant shifted left 16 bits
626    case 'M': // Constant larger than 31
627    case 'N': // Exact power of 2
628    case 'P': // Constant whose negation is a signed 16-bit constant
629    case 'G': // Floating point constant that can be loaded into a
630              // register with one instruction per word
631    case 'H': // Integer/Floating point constant that can be loaded
632              // into a register using three instructions
633      break;
634    case 'm': // Memory operand. Note that on PowerPC targets, m can
635              // include addresses that update the base register. It
636              // is therefore only safe to use `m' in an asm statement
637              // if that asm statement accesses the operand exactly once.
638              // The asm statement must also use `%U<opno>' as a
639              // placeholder for the "update" flag in the corresponding
640              // load or store instruction. For example:
641              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
642              // is correct but:
643              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
644              // is not. Use es rather than m if you don't want the base
645              // register to be updated.
646    case 'e':
647      if (Name[1] != 's')
648          return false;
649              // es: A "stable" memory operand; that is, one which does not
650              // include any automodification of the base register. Unlike
651              // `m', this constraint can be used in asm statements that
652              // might access the operand several times, or that might not
653              // access it at all.
654      Info.setAllowsMemory();
655      Name++; // Skip over 'e'.
656      break;
657    case 'Q': // Memory operand that is an offset from a register (it is
658              // usually better to use `m' or `es' in asm statements)
659    case 'Z': // Memory operand that is an indexed or indirect from a
660              // register (it is usually better to use `m' or `es' in
661              // asm statements)
662      Info.setAllowsMemory();
663      Info.setAllowsRegister();
664      break;
665    case 'R': // AIX TOC entry
666    case 'a': // Address operand that is an indexed or indirect from a
667              // register (`p' is preferable for asm statements)
668    case 'S': // Constant suitable as a 64-bit mask operand
669    case 'T': // Constant suitable as a 32-bit mask operand
670    case 'U': // System V Release 4 small data area reference
671    case 't': // AND masks that can be performed by two rldic{l, r}
672              // instructions
673    case 'W': // Vector constant that does not require memory
674    case 'j': // Vector constant that is all zeros.
675      break;
676    // End FIXME.
677    }
678    return true;
679  }
680  virtual const char *getClobbers() const {
681    return "";
682  }
683};
684
685const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
686#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
687#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
688                                              ALL_LANGUAGES },
689#include "clang/Basic/BuiltinsPPC.def"
690};
691
692
693/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
694/// #defines that are not tied to a specific subtarget.
695void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
696                                     MacroBuilder &Builder) const {
697  // Target identification.
698  Builder.defineMacro("__ppc__");
699  Builder.defineMacro("_ARCH_PPC");
700  Builder.defineMacro("__powerpc__");
701  Builder.defineMacro("__POWERPC__");
702  if (PointerWidth == 64) {
703    Builder.defineMacro("_ARCH_PPC64");
704    Builder.defineMacro("_LP64");
705    Builder.defineMacro("__LP64__");
706    Builder.defineMacro("__powerpc64__");
707    Builder.defineMacro("__ppc64__");
708  } else {
709    Builder.defineMacro("__ppc__");
710  }
711
712  // Target properties.
713  if (getTriple().getOS() != llvm::Triple::NetBSD)
714    Builder.defineMacro("_BIG_ENDIAN");
715  Builder.defineMacro("__BIG_ENDIAN__");
716
717  // Subtarget options.
718  Builder.defineMacro("__NATURAL_ALIGNMENT__");
719  Builder.defineMacro("__REGISTER_PREFIX__", "");
720
721  // FIXME: Should be controlled by command line option.
722  Builder.defineMacro("__LONG_DOUBLE_128__");
723
724  if (Opts.AltiVec) {
725    Builder.defineMacro("__VEC__", "10206");
726    Builder.defineMacro("__ALTIVEC__");
727  }
728}
729
730
731const char * const PPCTargetInfo::GCCRegNames[] = {
732  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
733  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
734  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
735  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
736  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
737  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
738  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
739  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
740  "mq", "lr", "ctr", "ap",
741  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
742  "xer",
743  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
744  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
745  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
746  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
747  "vrsave", "vscr",
748  "spe_acc", "spefscr",
749  "sfp"
750};
751
752void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
753                                   unsigned &NumNames) const {
754  Names = GCCRegNames;
755  NumNames = llvm::array_lengthof(GCCRegNames);
756}
757
758const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
759  // While some of these aliases do map to different registers
760  // they still share the same register name.
761  { { "0" }, "r0" },
762  { { "1"}, "r1" },
763  { { "2" }, "r2" },
764  { { "3" }, "r3" },
765  { { "4" }, "r4" },
766  { { "5" }, "r5" },
767  { { "6" }, "r6" },
768  { { "7" }, "r7" },
769  { { "8" }, "r8" },
770  { { "9" }, "r9" },
771  { { "10" }, "r10" },
772  { { "11" }, "r11" },
773  { { "12" }, "r12" },
774  { { "13" }, "r13" },
775  { { "14" }, "r14" },
776  { { "15" }, "r15" },
777  { { "16" }, "r16" },
778  { { "17" }, "r17" },
779  { { "18" }, "r18" },
780  { { "19" }, "r19" },
781  { { "20" }, "r20" },
782  { { "21" }, "r21" },
783  { { "22" }, "r22" },
784  { { "23" }, "r23" },
785  { { "24" }, "r24" },
786  { { "25" }, "r25" },
787  { { "26" }, "r26" },
788  { { "27" }, "r27" },
789  { { "28" }, "r28" },
790  { { "29" }, "r29" },
791  { { "30" }, "r30" },
792  { { "31" }, "r31" },
793  { { "fr0" }, "f0" },
794  { { "fr1" }, "f1" },
795  { { "fr2" }, "f2" },
796  { { "fr3" }, "f3" },
797  { { "fr4" }, "f4" },
798  { { "fr5" }, "f5" },
799  { { "fr6" }, "f6" },
800  { { "fr7" }, "f7" },
801  { { "fr8" }, "f8" },
802  { { "fr9" }, "f9" },
803  { { "fr10" }, "f10" },
804  { { "fr11" }, "f11" },
805  { { "fr12" }, "f12" },
806  { { "fr13" }, "f13" },
807  { { "fr14" }, "f14" },
808  { { "fr15" }, "f15" },
809  { { "fr16" }, "f16" },
810  { { "fr17" }, "f17" },
811  { { "fr18" }, "f18" },
812  { { "fr19" }, "f19" },
813  { { "fr20" }, "f20" },
814  { { "fr21" }, "f21" },
815  { { "fr22" }, "f22" },
816  { { "fr23" }, "f23" },
817  { { "fr24" }, "f24" },
818  { { "fr25" }, "f25" },
819  { { "fr26" }, "f26" },
820  { { "fr27" }, "f27" },
821  { { "fr28" }, "f28" },
822  { { "fr29" }, "f29" },
823  { { "fr30" }, "f30" },
824  { { "fr31" }, "f31" },
825  { { "cc" }, "cr0" },
826};
827
828void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
829                                     unsigned &NumAliases) const {
830  Aliases = GCCRegAliases;
831  NumAliases = llvm::array_lengthof(GCCRegAliases);
832}
833} // end anonymous namespace.
834
835namespace {
836class PPC32TargetInfo : public PPCTargetInfo {
837public:
838  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
839    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
840                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
841
842    switch (getTriple().getOS()) {
843    case llvm::Triple::FreeBSD:
844    case llvm::Triple::NetBSD:
845      SizeType = UnsignedInt;
846      break;
847    default:
848      break;
849    }
850  }
851
852  virtual const char *getVAListDeclaration() const {
853    // This is the ELF definition, and is overridden by the Darwin sub-target
854    return "typedef struct __va_list_tag {"
855           "  unsigned char gpr;"
856           "  unsigned char fpr;"
857           "  unsigned short reserved;"
858           "  void* overflow_arg_area;"
859           "  void* reg_save_area;"
860           "} __builtin_va_list[1];";
861  }
862};
863} // end anonymous namespace.
864
865namespace {
866class PPC64TargetInfo : public PPCTargetInfo {
867public:
868  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
869    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
870    IntMaxType = SignedLong;
871    UIntMaxType = UnsignedLong;
872    Int64Type = SignedLong;
873    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
874                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
875  }
876  virtual const char *getVAListDeclaration() const {
877    return "typedef char* __builtin_va_list;";
878  }
879};
880} // end anonymous namespace.
881
882
883namespace {
884class DarwinPPC32TargetInfo :
885  public DarwinTargetInfo<PPC32TargetInfo> {
886public:
887  DarwinPPC32TargetInfo(const std::string& triple)
888    : DarwinTargetInfo<PPC32TargetInfo>(triple) {
889    HasAlignMac68kSupport = true;
890    BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
891    SuitableAlign = 128;
892  }
893  virtual const char *getVAListDeclaration() const {
894    return "typedef char* __builtin_va_list;";
895  }
896};
897
898class DarwinPPC64TargetInfo :
899  public DarwinTargetInfo<PPC64TargetInfo> {
900public:
901  DarwinPPC64TargetInfo(const std::string& triple)
902    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
903    HasAlignMac68kSupport = true;
904    SuitableAlign = 128;
905  }
906};
907} // end anonymous namespace.
908
909namespace {
910  static const unsigned PTXAddrSpaceMap[] = {
911    0,    // opencl_global
912    4,    // opencl_local
913    1     // opencl_constant
914  };
915  class PTXTargetInfo : public TargetInfo {
916    static const char * const GCCRegNames[];
917    static const Builtin::Info BuiltinInfo[];
918    std::vector<llvm::StringRef> AvailableFeatures;
919  public:
920    PTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
921      BigEndian = false;
922      TLSSupported = false;
923      LongWidth = LongAlign = 64;
924      AddrSpaceMap = &PTXAddrSpaceMap;
925      // Define available target features
926      // These must be defined in sorted order!
927      AvailableFeatures.push_back("compute10");
928      AvailableFeatures.push_back("compute11");
929      AvailableFeatures.push_back("compute12");
930      AvailableFeatures.push_back("compute13");
931      AvailableFeatures.push_back("compute20");
932      AvailableFeatures.push_back("double");
933      AvailableFeatures.push_back("no-fma");
934      AvailableFeatures.push_back("ptx20");
935      AvailableFeatures.push_back("ptx21");
936      AvailableFeatures.push_back("ptx22");
937      AvailableFeatures.push_back("ptx23");
938      AvailableFeatures.push_back("sm10");
939      AvailableFeatures.push_back("sm11");
940      AvailableFeatures.push_back("sm12");
941      AvailableFeatures.push_back("sm13");
942      AvailableFeatures.push_back("sm20");
943      AvailableFeatures.push_back("sm21");
944      AvailableFeatures.push_back("sm22");
945      AvailableFeatures.push_back("sm23");
946    }
947    virtual void getTargetDefines(const LangOptions &Opts,
948                                  MacroBuilder &Builder) const {
949      Builder.defineMacro("__PTX__");
950    }
951    virtual void getTargetBuiltins(const Builtin::Info *&Records,
952                                   unsigned &NumRecords) const {
953      Records = BuiltinInfo;
954      NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
955    }
956
957    virtual void getGCCRegNames(const char * const *&Names,
958                                unsigned &NumNames) const;
959    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
960                                  unsigned &NumAliases) const {
961      // No aliases.
962      Aliases = 0;
963      NumAliases = 0;
964    }
965    virtual bool validateAsmConstraint(const char *&Name,
966                                       TargetInfo::ConstraintInfo &info) const {
967      // FIXME: implement
968      return true;
969    }
970    virtual const char *getClobbers() const {
971      // FIXME: Is this really right?
972      return "";
973    }
974    virtual const char *getVAListDeclaration() const {
975      // FIXME: implement
976      return "typedef char* __builtin_va_list;";
977    }
978
979    virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
980                                   const std::string &Name,
981                                   bool Enabled) const;
982  };
983
984  const Builtin::Info PTXTargetInfo::BuiltinInfo[] = {
985#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
986#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
987                                              ALL_LANGUAGES },
988#include "clang/Basic/BuiltinsPTX.def"
989  };
990
991  const char * const PTXTargetInfo::GCCRegNames[] = {
992    "r0"
993  };
994
995  void PTXTargetInfo::getGCCRegNames(const char * const *&Names,
996                                     unsigned &NumNames) const {
997    Names = GCCRegNames;
998    NumNames = llvm::array_lengthof(GCCRegNames);
999  }
1000
1001  bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1002                                        const std::string &Name,
1003                                        bool Enabled) const {
1004    if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
1005                          Name)) {
1006      Features[Name] = Enabled;
1007      return true;
1008    } else {
1009      return false;
1010    }
1011  }
1012
1013  class PTX32TargetInfo : public PTXTargetInfo {
1014  public:
1015  PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
1016      PointerWidth = PointerAlign = 32;
1017      SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1018      DescriptionString
1019        = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64";
1020    }
1021  };
1022
1023  class PTX64TargetInfo : public PTXTargetInfo {
1024  public:
1025  PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
1026      PointerWidth = PointerAlign = 64;
1027      SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1028      DescriptionString
1029        = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64";
1030    }
1031  };
1032}
1033
1034namespace {
1035// MBlaze abstract base class
1036class MBlazeTargetInfo : public TargetInfo {
1037  static const char * const GCCRegNames[];
1038  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1039
1040public:
1041  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1042    DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1043  }
1044
1045  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1046                                 unsigned &NumRecords) const {
1047    // FIXME: Implement.
1048    Records = 0;
1049    NumRecords = 0;
1050  }
1051
1052  virtual void getTargetDefines(const LangOptions &Opts,
1053                                MacroBuilder &Builder) const;
1054
1055  virtual const char *getVAListDeclaration() const {
1056    return "typedef char* __builtin_va_list;";
1057  }
1058  virtual const char *getTargetPrefix() const {
1059    return "mblaze";
1060  }
1061  virtual void getGCCRegNames(const char * const *&Names,
1062                              unsigned &NumNames) const;
1063  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1064                                unsigned &NumAliases) const;
1065  virtual bool validateAsmConstraint(const char *&Name,
1066                                     TargetInfo::ConstraintInfo &Info) const {
1067    switch (*Name) {
1068    default: return false;
1069    case 'O': // Zero
1070      return true;
1071    case 'b': // Base register
1072    case 'f': // Floating point register
1073      Info.setAllowsRegister();
1074      return true;
1075    }
1076  }
1077  virtual const char *getClobbers() const {
1078    return "";
1079  }
1080};
1081
1082/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1083/// #defines that are not tied to a specific subtarget.
1084void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1085                                     MacroBuilder &Builder) const {
1086  // Target identification.
1087  Builder.defineMacro("__microblaze__");
1088  Builder.defineMacro("_ARCH_MICROBLAZE");
1089  Builder.defineMacro("__MICROBLAZE__");
1090
1091  // Target properties.
1092  Builder.defineMacro("_BIG_ENDIAN");
1093  Builder.defineMacro("__BIG_ENDIAN__");
1094
1095  // Subtarget options.
1096  Builder.defineMacro("__REGISTER_PREFIX__", "");
1097}
1098
1099
1100const char * const MBlazeTargetInfo::GCCRegNames[] = {
1101  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
1102  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
1103  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
1104  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
1105  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
1106  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1107  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1108  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1109  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1110  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
1111};
1112
1113void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1114                                   unsigned &NumNames) const {
1115  Names = GCCRegNames;
1116  NumNames = llvm::array_lengthof(GCCRegNames);
1117}
1118
1119const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1120  { {"f0"},  "r0" },
1121  { {"f1"},  "r1" },
1122  { {"f2"},  "r2" },
1123  { {"f3"},  "r3" },
1124  { {"f4"},  "r4" },
1125  { {"f5"},  "r5" },
1126  { {"f6"},  "r6" },
1127  { {"f7"},  "r7" },
1128  { {"f8"},  "r8" },
1129  { {"f9"},  "r9" },
1130  { {"f10"}, "r10" },
1131  { {"f11"}, "r11" },
1132  { {"f12"}, "r12" },
1133  { {"f13"}, "r13" },
1134  { {"f14"}, "r14" },
1135  { {"f15"}, "r15" },
1136  { {"f16"}, "r16" },
1137  { {"f17"}, "r17" },
1138  { {"f18"}, "r18" },
1139  { {"f19"}, "r19" },
1140  { {"f20"}, "r20" },
1141  { {"f21"}, "r21" },
1142  { {"f22"}, "r22" },
1143  { {"f23"}, "r23" },
1144  { {"f24"}, "r24" },
1145  { {"f25"}, "r25" },
1146  { {"f26"}, "r26" },
1147  { {"f27"}, "r27" },
1148  { {"f28"}, "r28" },
1149  { {"f29"}, "r29" },
1150  { {"f30"}, "r30" },
1151  { {"f31"}, "r31" },
1152};
1153
1154void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1155                                     unsigned &NumAliases) const {
1156  Aliases = GCCRegAliases;
1157  NumAliases = llvm::array_lengthof(GCCRegAliases);
1158}
1159} // end anonymous namespace.
1160
1161namespace {
1162// Namespace for x86 abstract base class
1163const Builtin::Info BuiltinInfo[] = {
1164#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1165#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1166                                              ALL_LANGUAGES },
1167#include "clang/Basic/BuiltinsX86.def"
1168};
1169
1170static const char* const GCCRegNames[] = {
1171  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1172  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1173  "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1174  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1175  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1176  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1177  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1178  "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1179  "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1180};
1181
1182const TargetInfo::AddlRegName AddlRegNames[] = {
1183  { { "al", "ah", "eax", "rax" }, 0 },
1184  { { "bl", "bh", "ebx", "rbx" }, 3 },
1185  { { "cl", "ch", "ecx", "rcx" }, 2 },
1186  { { "dl", "dh", "edx", "rdx" }, 1 },
1187  { { "esi", "rsi" }, 4 },
1188  { { "edi", "rdi" }, 5 },
1189  { { "esp", "rsp" }, 7 },
1190  { { "ebp", "rbp" }, 6 },
1191};
1192
1193// X86 target abstract base class; x86-32 and x86-64 are very close, so
1194// most of the implementation can be shared.
1195class X86TargetInfo : public TargetInfo {
1196  enum X86SSEEnum {
1197    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1198  } SSELevel;
1199  enum MMX3DNowEnum {
1200    NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1201  } MMX3DNowLevel;
1202
1203  bool HasAES;
1204  bool HasLZCNT;
1205  bool HasBMI;
1206  bool HasBMI2;
1207  bool HasPOPCNT;
1208  bool HasFMA4;
1209
1210  /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1211  ///
1212  /// Each enumeration represents a particular CPU supported by Clang. These
1213  /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1214  enum CPUKind {
1215    CK_Generic,
1216
1217    /// \name i386
1218    /// i386-generation processors.
1219    //@{
1220    CK_i386,
1221    //@}
1222
1223    /// \name i486
1224    /// i486-generation processors.
1225    //@{
1226    CK_i486,
1227    CK_WinChipC6,
1228    CK_WinChip2,
1229    CK_C3,
1230    //@}
1231
1232    /// \name i586
1233    /// i586-generation processors, P5 microarchitecture based.
1234    //@{
1235    CK_i586,
1236    CK_Pentium,
1237    CK_PentiumMMX,
1238    //@}
1239
1240    /// \name i686
1241    /// i686-generation processors, P6 / Pentium M microarchitecture based.
1242    //@{
1243    CK_i686,
1244    CK_PentiumPro,
1245    CK_Pentium2,
1246    CK_Pentium3,
1247    CK_Pentium3M,
1248    CK_PentiumM,
1249    CK_C3_2,
1250
1251    /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1252    /// Clang however has some logic to suport this.
1253    // FIXME: Warn, deprecate, and potentially remove this.
1254    CK_Yonah,
1255    //@}
1256
1257    /// \name Netburst
1258    /// Netburst microarchitecture based processors.
1259    //@{
1260    CK_Pentium4,
1261    CK_Pentium4M,
1262    CK_Prescott,
1263    CK_Nocona,
1264    //@}
1265
1266    /// \name Core
1267    /// Core microarchitecture based processors.
1268    //@{
1269    CK_Core2,
1270
1271    /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1272    /// codename which GCC no longer accepts as an option to -march, but Clang
1273    /// has some logic for recognizing it.
1274    // FIXME: Warn, deprecate, and potentially remove this.
1275    CK_Penryn,
1276    //@}
1277
1278    /// \name Atom
1279    /// Atom processors
1280    //@{
1281    CK_Atom,
1282    //@}
1283
1284    /// \name Nehalem
1285    /// Nehalem microarchitecture based processors.
1286    //@{
1287    CK_Corei7,
1288    CK_Corei7AVX,
1289    CK_CoreAVXi,
1290    CK_CoreAVX2,
1291    //@}
1292
1293    /// \name K6
1294    /// K6 architecture processors.
1295    //@{
1296    CK_K6,
1297    CK_K6_2,
1298    CK_K6_3,
1299    //@}
1300
1301    /// \name K7
1302    /// K7 architecture processors.
1303    //@{
1304    CK_Athlon,
1305    CK_AthlonThunderbird,
1306    CK_Athlon4,
1307    CK_AthlonXP,
1308    CK_AthlonMP,
1309    //@}
1310
1311    /// \name K8
1312    /// K8 architecture processors.
1313    //@{
1314    CK_Athlon64,
1315    CK_Athlon64SSE3,
1316    CK_AthlonFX,
1317    CK_K8,
1318    CK_K8SSE3,
1319    CK_Opteron,
1320    CK_OpteronSSE3,
1321    CK_AMDFAM10,
1322
1323    /// \name K10
1324    /// K10 architecture processors.
1325    //@{
1326    CK_BDVER1,
1327    CK_BDVER2,
1328
1329    /// This specification is deprecated and will be removed in the future.
1330    /// Users should prefer \see CK_K8.
1331    // FIXME: Warn on this when the CPU is set to it.
1332    CK_x86_64,
1333    //@}
1334
1335    /// \name Geode
1336    /// Geode processors.
1337    //@{
1338    CK_Geode
1339    //@}
1340  } CPU;
1341
1342public:
1343  X86TargetInfo(const std::string& triple)
1344    : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1345      HasAES(false), HasLZCNT(false), HasBMI(false), HasBMI2(false),
1346      HasPOPCNT(false), HasFMA4(false), CPU(CK_Generic) {
1347    BigEndian = false;
1348    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1349  }
1350  virtual unsigned getFloatEvalMethod() const {
1351    // X87 evaluates with 80 bits "long double" precision.
1352    return SSELevel == NoSSE ? 2 : 0;
1353  }
1354  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1355                                 unsigned &NumRecords) const {
1356    Records = BuiltinInfo;
1357    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1358  }
1359  virtual void getGCCRegNames(const char * const *&Names,
1360                              unsigned &NumNames) const {
1361    Names = GCCRegNames;
1362    NumNames = llvm::array_lengthof(GCCRegNames);
1363  }
1364  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1365                                unsigned &NumAliases) const {
1366    Aliases = 0;
1367    NumAliases = 0;
1368  }
1369  virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1370				  unsigned &NumNames) const {
1371    Names = AddlRegNames;
1372    NumNames = llvm::array_lengthof(AddlRegNames);
1373  }
1374  virtual bool validateAsmConstraint(const char *&Name,
1375                                     TargetInfo::ConstraintInfo &info) const;
1376  virtual std::string convertConstraint(const char *&Constraint) const;
1377  virtual const char *getClobbers() const {
1378    return "~{dirflag},~{fpsr},~{flags}";
1379  }
1380  virtual void getTargetDefines(const LangOptions &Opts,
1381                                MacroBuilder &Builder) const;
1382  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1383                                 const std::string &Name,
1384                                 bool Enabled) const;
1385  virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1386  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1387  virtual const char* getABI() const {
1388    if (PointerWidth == 64 && SSELevel >= AVX)
1389      return "avx";
1390    else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow)
1391      return "no-mmx";
1392    return "";
1393  }
1394  virtual bool setCPU(const std::string &Name) {
1395    CPU = llvm::StringSwitch<CPUKind>(Name)
1396      .Case("i386", CK_i386)
1397      .Case("i486", CK_i486)
1398      .Case("winchip-c6", CK_WinChipC6)
1399      .Case("winchip2", CK_WinChip2)
1400      .Case("c3", CK_C3)
1401      .Case("i586", CK_i586)
1402      .Case("pentium", CK_Pentium)
1403      .Case("pentium-mmx", CK_PentiumMMX)
1404      .Case("i686", CK_i686)
1405      .Case("pentiumpro", CK_PentiumPro)
1406      .Case("pentium2", CK_Pentium2)
1407      .Case("pentium3", CK_Pentium3)
1408      .Case("pentium3m", CK_Pentium3M)
1409      .Case("pentium-m", CK_PentiumM)
1410      .Case("c3-2", CK_C3_2)
1411      .Case("yonah", CK_Yonah)
1412      .Case("pentium4", CK_Pentium4)
1413      .Case("pentium4m", CK_Pentium4M)
1414      .Case("prescott", CK_Prescott)
1415      .Case("nocona", CK_Nocona)
1416      .Case("core2", CK_Core2)
1417      .Case("penryn", CK_Penryn)
1418      .Case("atom", CK_Atom)
1419      .Case("corei7", CK_Corei7)
1420      .Case("corei7-avx", CK_Corei7AVX)
1421      .Case("core-avx-i", CK_CoreAVXi)
1422      .Case("core-avx2", CK_CoreAVX2)
1423      .Case("k6", CK_K6)
1424      .Case("k6-2", CK_K6_2)
1425      .Case("k6-3", CK_K6_3)
1426      .Case("athlon", CK_Athlon)
1427      .Case("athlon-tbird", CK_AthlonThunderbird)
1428      .Case("athlon-4", CK_Athlon4)
1429      .Case("athlon-xp", CK_AthlonXP)
1430      .Case("athlon-mp", CK_AthlonMP)
1431      .Case("athlon64", CK_Athlon64)
1432      .Case("athlon64-sse3", CK_Athlon64SSE3)
1433      .Case("athlon-fx", CK_AthlonFX)
1434      .Case("k8", CK_K8)
1435      .Case("k8-sse3", CK_K8SSE3)
1436      .Case("opteron", CK_Opteron)
1437      .Case("opteron-sse3", CK_OpteronSSE3)
1438      .Case("amdfam10", CK_AMDFAM10)
1439      .Case("bdver1", CK_BDVER1)
1440      .Case("bdver2", CK_BDVER2)
1441      .Case("x86-64", CK_x86_64)
1442      .Case("geode", CK_Geode)
1443      .Default(CK_Generic);
1444
1445    // Perform any per-CPU checks necessary to determine if this CPU is
1446    // acceptable.
1447    // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1448    // invalid without explaining *why*.
1449    switch (CPU) {
1450    case CK_Generic:
1451      // No processor selected!
1452      return false;
1453
1454    case CK_i386:
1455    case CK_i486:
1456    case CK_WinChipC6:
1457    case CK_WinChip2:
1458    case CK_C3:
1459    case CK_i586:
1460    case CK_Pentium:
1461    case CK_PentiumMMX:
1462    case CK_i686:
1463    case CK_PentiumPro:
1464    case CK_Pentium2:
1465    case CK_Pentium3:
1466    case CK_Pentium3M:
1467    case CK_PentiumM:
1468    case CK_Yonah:
1469    case CK_C3_2:
1470    case CK_Pentium4:
1471    case CK_Pentium4M:
1472    case CK_Prescott:
1473    case CK_K6:
1474    case CK_K6_2:
1475    case CK_K6_3:
1476    case CK_Athlon:
1477    case CK_AthlonThunderbird:
1478    case CK_Athlon4:
1479    case CK_AthlonXP:
1480    case CK_AthlonMP:
1481    case CK_Geode:
1482      // Only accept certain architectures when compiling in 32-bit mode.
1483      if (PointerWidth != 32)
1484        return false;
1485
1486      // Fallthrough
1487    case CK_Nocona:
1488    case CK_Core2:
1489    case CK_Penryn:
1490    case CK_Atom:
1491    case CK_Corei7:
1492    case CK_Corei7AVX:
1493    case CK_CoreAVXi:
1494    case CK_CoreAVX2:
1495    case CK_Athlon64:
1496    case CK_Athlon64SSE3:
1497    case CK_AthlonFX:
1498    case CK_K8:
1499    case CK_K8SSE3:
1500    case CK_Opteron:
1501    case CK_OpteronSSE3:
1502    case CK_AMDFAM10:
1503    case CK_BDVER1:
1504    case CK_BDVER2:
1505    case CK_x86_64:
1506      return true;
1507    }
1508    llvm_unreachable("Unhandled CPU kind");
1509  }
1510};
1511
1512void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1513  // FIXME: This should not be here.
1514  Features["3dnow"] = false;
1515  Features["3dnowa"] = false;
1516  Features["mmx"] = false;
1517  Features["sse"] = false;
1518  Features["sse2"] = false;
1519  Features["sse3"] = false;
1520  Features["ssse3"] = false;
1521  Features["sse41"] = false;
1522  Features["sse42"] = false;
1523  Features["sse4a"] = false;
1524  Features["aes"] = false;
1525  Features["avx"] = false;
1526  Features["avx2"] = false;
1527  Features["lzcnt"] = false;
1528  Features["bmi"] = false;
1529  Features["bmi2"] = false;
1530  Features["popcnt"] = false;
1531  Features["fma4"] = false;
1532
1533  // FIXME: This *really* should not be here.
1534
1535  // X86_64 always has SSE2.
1536  if (PointerWidth == 64)
1537    Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1538
1539  switch (CPU) {
1540  case CK_Generic:
1541  case CK_i386:
1542  case CK_i486:
1543  case CK_i586:
1544  case CK_Pentium:
1545  case CK_i686:
1546  case CK_PentiumPro:
1547    break;
1548  case CK_PentiumMMX:
1549  case CK_Pentium2:
1550    setFeatureEnabled(Features, "mmx", true);
1551    break;
1552  case CK_Pentium3:
1553  case CK_Pentium3M:
1554    setFeatureEnabled(Features, "mmx", true);
1555    setFeatureEnabled(Features, "sse", true);
1556    break;
1557  case CK_PentiumM:
1558  case CK_Pentium4:
1559  case CK_Pentium4M:
1560  case CK_x86_64:
1561    setFeatureEnabled(Features, "mmx", true);
1562    setFeatureEnabled(Features, "sse2", true);
1563    break;
1564  case CK_Yonah:
1565  case CK_Prescott:
1566  case CK_Nocona:
1567    setFeatureEnabled(Features, "mmx", true);
1568    setFeatureEnabled(Features, "sse3", true);
1569    break;
1570  case CK_Core2:
1571    setFeatureEnabled(Features, "mmx", true);
1572    setFeatureEnabled(Features, "ssse3", true);
1573    break;
1574  case CK_Penryn:
1575    setFeatureEnabled(Features, "mmx", true);
1576    setFeatureEnabled(Features, "sse4.1", true);
1577    break;
1578  case CK_Atom:
1579    setFeatureEnabled(Features, "mmx", true);
1580    setFeatureEnabled(Features, "ssse3", true);
1581    break;
1582  case CK_Corei7:
1583    setFeatureEnabled(Features, "mmx", true);
1584    setFeatureEnabled(Features, "sse4", true);
1585    setFeatureEnabled(Features, "aes", true);
1586    break;
1587  case CK_Corei7AVX:
1588  case CK_CoreAVXi:
1589    setFeatureEnabled(Features, "mmx", true);
1590    setFeatureEnabled(Features, "sse4", true);
1591    setFeatureEnabled(Features, "aes", true);
1592    //setFeatureEnabled(Features, "avx", true);
1593    break;
1594  case CK_CoreAVX2:
1595    setFeatureEnabled(Features, "mmx", true);
1596    setFeatureEnabled(Features, "sse4", true);
1597    setFeatureEnabled(Features, "aes", true);
1598    setFeatureEnabled(Features, "lzcnt", true);
1599    setFeatureEnabled(Features, "bmi", true);
1600    setFeatureEnabled(Features, "bmi2", true);
1601    //setFeatureEnabled(Features, "avx2", true);
1602    break;
1603  case CK_K6:
1604  case CK_WinChipC6:
1605    setFeatureEnabled(Features, "mmx", true);
1606    break;
1607  case CK_K6_2:
1608  case CK_K6_3:
1609  case CK_WinChip2:
1610  case CK_C3:
1611    setFeatureEnabled(Features, "3dnow", true);
1612    break;
1613  case CK_Athlon:
1614  case CK_AthlonThunderbird:
1615  case CK_Geode:
1616    setFeatureEnabled(Features, "3dnowa", true);
1617    break;
1618  case CK_Athlon4:
1619  case CK_AthlonXP:
1620  case CK_AthlonMP:
1621    setFeatureEnabled(Features, "sse", true);
1622    setFeatureEnabled(Features, "3dnowa", true);
1623    break;
1624  case CK_K8:
1625  case CK_Opteron:
1626  case CK_Athlon64:
1627  case CK_AthlonFX:
1628    setFeatureEnabled(Features, "sse2", true);
1629    setFeatureEnabled(Features, "3dnowa", true);
1630    break;
1631  case CK_K8SSE3:
1632  case CK_OpteronSSE3:
1633  case CK_Athlon64SSE3:
1634    setFeatureEnabled(Features, "sse3", true);
1635    setFeatureEnabled(Features, "3dnowa", true);
1636    break;
1637  case CK_AMDFAM10:
1638    setFeatureEnabled(Features, "sse3", true);
1639    setFeatureEnabled(Features, "sse4a", true);
1640    setFeatureEnabled(Features, "3dnowa", true);
1641    break;
1642  case CK_BDVER1:
1643  case CK_BDVER2:
1644    setFeatureEnabled(Features, "sse4", true);
1645    setFeatureEnabled(Features, "sse4a", true);
1646    setFeatureEnabled(Features, "aes", true);
1647    break;
1648  case CK_C3_2:
1649    setFeatureEnabled(Features, "mmx", true);
1650    setFeatureEnabled(Features, "sse", true);
1651    break;
1652  }
1653}
1654
1655bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1656                                      const std::string &Name,
1657                                      bool Enabled) const {
1658  // FIXME: This *really* should not be here.  We need some way of translating
1659  // options into llvm subtarget features.
1660  if (!Features.count(Name) &&
1661      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1662    return false;
1663
1664  // FIXME: this should probably use a switch with fall through.
1665
1666  if (Enabled) {
1667    if (Name == "mmx")
1668      Features["mmx"] = true;
1669    else if (Name == "sse")
1670      Features["mmx"] = Features["sse"] = true;
1671    else if (Name == "sse2")
1672      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1673    else if (Name == "sse3")
1674      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1675        true;
1676    else if (Name == "ssse3")
1677      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1678        Features["ssse3"] = true;
1679    else if (Name == "sse4" || Name == "sse4.2")
1680      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1681        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1682        Features["popcnt"] = true;
1683    else if (Name == "sse4.1")
1684      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1685        Features["ssse3"] = Features["sse41"] = true;
1686    else if (Name == "3dnow")
1687      Features["mmx"] = Features["3dnow"] = true;
1688    else if (Name == "3dnowa")
1689      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
1690    else if (Name == "aes")
1691      Features["aes"] = true;
1692    else if (Name == "avx")
1693      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1694        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1695        Features["popcnt"] = Features["avx"] = true;
1696    else if (Name == "avx2")
1697      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1698        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1699        Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
1700    else if (Name == "fma4")
1701        Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1702        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1703        Features["popcnt"] = Features["avx"] = Features["fma4"] = true;
1704    else if (Name == "sse4a")
1705      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1706        Features["sse4a"] = true;
1707    else if (Name == "lzcnt")
1708      Features["lzcnt"] = true;
1709    else if (Name == "bmi")
1710      Features["bmi"] = true;
1711    else if (Name == "bmi2")
1712      Features["bmi2"] = true;
1713    else if (Name == "popcnt")
1714      Features["popcnt"] = true;
1715  } else {
1716    if (Name == "mmx")
1717      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
1718    else if (Name == "sse")
1719      Features["sse"] = Features["sse2"] = Features["sse3"] =
1720        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1721        Features["sse4a"] = false;
1722    else if (Name == "sse2")
1723      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1724        Features["sse41"] = Features["sse42"] = Features["sse4a"] = false;
1725    else if (Name == "sse3")
1726      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1727        Features["sse42"] = Features["sse4a"] = false;
1728    else if (Name == "ssse3")
1729      Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1730    else if (Name == "sse4" || Name == "sse4.1")
1731      Features["sse41"] = Features["sse42"] = false;
1732    else if (Name == "sse4.2")
1733      Features["sse42"] = false;
1734    else if (Name == "3dnow")
1735      Features["3dnow"] = Features["3dnowa"] = false;
1736    else if (Name == "3dnowa")
1737      Features["3dnowa"] = false;
1738    else if (Name == "aes")
1739      Features["aes"] = false;
1740    else if (Name == "avx")
1741      Features["avx"] = Features["avx2"] = Features["fma4"] = false;
1742    else if (Name == "avx2")
1743      Features["avx2"] = false;
1744    else if (Name == "sse4a")
1745      Features["sse4a"] = false;
1746    else if (Name == "lzcnt")
1747      Features["lzcnt"] = false;
1748    else if (Name == "bmi")
1749      Features["bmi"] = false;
1750    else if (Name == "bmi2")
1751      Features["bmi2"] = false;
1752    else if (Name == "popcnt")
1753      Features["popcnt"] = false;
1754    else if (Name == "fma4")
1755      Features["fma4"] = false;
1756  }
1757
1758  return true;
1759}
1760
1761/// HandleTargetOptions - Perform initialization based on the user
1762/// configured set of features.
1763void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1764  // Remember the maximum enabled sselevel.
1765  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1766    // Ignore disabled features.
1767    if (Features[i][0] == '-')
1768      continue;
1769
1770    if (Features[i].substr(1) == "aes") {
1771      HasAES = true;
1772      continue;
1773    }
1774
1775    if (Features[i].substr(1) == "lzcnt") {
1776      HasLZCNT = true;
1777      continue;
1778    }
1779
1780    if (Features[i].substr(1) == "bmi") {
1781      HasBMI = true;
1782      continue;
1783    }
1784
1785    if (Features[i].substr(1) == "bmi2") {
1786      HasBMI2 = true;
1787      continue;
1788    }
1789
1790    if (Features[i].substr(1) == "popcnt") {
1791      HasPOPCNT = true;
1792      continue;
1793    }
1794
1795    if (Features[i].substr(1) == "fma4") {
1796      HasFMA4 = true;
1797      continue;
1798    }
1799
1800    assert(Features[i][0] == '+' && "Invalid target feature!");
1801    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
1802      .Case("avx2", AVX2)
1803      .Case("avx", AVX)
1804      .Case("sse42", SSE42)
1805      .Case("sse41", SSE41)
1806      .Case("ssse3", SSSE3)
1807      .Case("sse3", SSE3)
1808      .Case("sse2", SSE2)
1809      .Case("sse", SSE1)
1810      .Default(NoSSE);
1811    SSELevel = std::max(SSELevel, Level);
1812
1813    MMX3DNowEnum ThreeDNowLevel =
1814      llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1))
1815        .Case("3dnowa", AMD3DNowAthlon)
1816        .Case("3dnow", AMD3DNow)
1817        .Case("mmx", MMX)
1818        .Default(NoMMX3DNow);
1819
1820    MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
1821  }
1822
1823  // Don't tell the backend if we're turning off mmx; it will end up disabling
1824  // SSE, which we don't want.
1825  std::vector<std::string>::iterator it;
1826  it = std::find(Features.begin(), Features.end(), "-mmx");
1827  if (it != Features.end())
1828    Features.erase(it);
1829}
1830
1831/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
1832/// definitions for this particular subtarget.
1833void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1834                                     MacroBuilder &Builder) const {
1835  // Target identification.
1836  if (PointerWidth == 64) {
1837    Builder.defineMacro("_LP64");
1838    Builder.defineMacro("__LP64__");
1839    Builder.defineMacro("__amd64__");
1840    Builder.defineMacro("__amd64");
1841    Builder.defineMacro("__x86_64");
1842    Builder.defineMacro("__x86_64__");
1843  } else {
1844    DefineStd(Builder, "i386", Opts);
1845  }
1846
1847  // Subtarget options.
1848  // FIXME: We are hard-coding the tune parameters based on the CPU, but they
1849  // truly should be based on -mtune options.
1850  switch (CPU) {
1851  case CK_Generic:
1852    break;
1853  case CK_i386:
1854    // The rest are coming from the i386 define above.
1855    Builder.defineMacro("__tune_i386__");
1856    break;
1857  case CK_i486:
1858  case CK_WinChipC6:
1859  case CK_WinChip2:
1860  case CK_C3:
1861    defineCPUMacros(Builder, "i486");
1862    break;
1863  case CK_PentiumMMX:
1864    Builder.defineMacro("__pentium_mmx__");
1865    Builder.defineMacro("__tune_pentium_mmx__");
1866    // Fallthrough
1867  case CK_i586:
1868  case CK_Pentium:
1869    defineCPUMacros(Builder, "i586");
1870    defineCPUMacros(Builder, "pentium");
1871    break;
1872  case CK_Pentium3:
1873  case CK_Pentium3M:
1874  case CK_PentiumM:
1875    Builder.defineMacro("__tune_pentium3__");
1876    // Fallthrough
1877  case CK_Pentium2:
1878  case CK_C3_2:
1879    Builder.defineMacro("__tune_pentium2__");
1880    // Fallthrough
1881  case CK_PentiumPro:
1882    Builder.defineMacro("__tune_i686__");
1883    Builder.defineMacro("__tune_pentiumpro__");
1884    // Fallthrough
1885  case CK_i686:
1886    Builder.defineMacro("__i686");
1887    Builder.defineMacro("__i686__");
1888    // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
1889    Builder.defineMacro("__pentiumpro");
1890    Builder.defineMacro("__pentiumpro__");
1891    break;
1892  case CK_Pentium4:
1893  case CK_Pentium4M:
1894    defineCPUMacros(Builder, "pentium4");
1895    break;
1896  case CK_Yonah:
1897  case CK_Prescott:
1898  case CK_Nocona:
1899    defineCPUMacros(Builder, "nocona");
1900    break;
1901  case CK_Core2:
1902  case CK_Penryn:
1903    defineCPUMacros(Builder, "core2");
1904    break;
1905  case CK_Atom:
1906    defineCPUMacros(Builder, "atom");
1907    break;
1908  case CK_Corei7:
1909  case CK_Corei7AVX:
1910  case CK_CoreAVXi:
1911  case CK_CoreAVX2:
1912    defineCPUMacros(Builder, "corei7");
1913    break;
1914  case CK_K6_2:
1915    Builder.defineMacro("__k6_2__");
1916    Builder.defineMacro("__tune_k6_2__");
1917    // Fallthrough
1918  case CK_K6_3:
1919    if (CPU != CK_K6_2) {  // In case of fallthrough
1920      // FIXME: GCC may be enabling these in cases where some other k6
1921      // architecture is specified but -m3dnow is explicitly provided. The
1922      // exact semantics need to be determined and emulated here.
1923      Builder.defineMacro("__k6_3__");
1924      Builder.defineMacro("__tune_k6_3__");
1925    }
1926    // Fallthrough
1927  case CK_K6:
1928    defineCPUMacros(Builder, "k6");
1929    break;
1930  case CK_Athlon:
1931  case CK_AthlonThunderbird:
1932  case CK_Athlon4:
1933  case CK_AthlonXP:
1934  case CK_AthlonMP:
1935    defineCPUMacros(Builder, "athlon");
1936    if (SSELevel != NoSSE) {
1937      Builder.defineMacro("__athlon_sse__");
1938      Builder.defineMacro("__tune_athlon_sse__");
1939    }
1940    break;
1941  case CK_K8:
1942  case CK_K8SSE3:
1943  case CK_x86_64:
1944  case CK_Opteron:
1945  case CK_OpteronSSE3:
1946  case CK_Athlon64:
1947  case CK_Athlon64SSE3:
1948  case CK_AthlonFX:
1949    defineCPUMacros(Builder, "k8");
1950    break;
1951  case CK_AMDFAM10:
1952    defineCPUMacros(Builder, "amdfam10");
1953    break;
1954  case CK_BDVER1:
1955    defineCPUMacros(Builder, "bdver1");
1956    break;
1957  case CK_BDVER2:
1958    defineCPUMacros(Builder, "bdver2");
1959    break;
1960  case CK_Geode:
1961    defineCPUMacros(Builder, "geode");
1962    break;
1963  }
1964
1965  // Target properties.
1966  Builder.defineMacro("__LITTLE_ENDIAN__");
1967  Builder.defineMacro("__REGISTER_PREFIX__", "");
1968
1969  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
1970  // functions in glibc header files that use FP Stack inline asm which the
1971  // backend can't deal with (PR879).
1972  Builder.defineMacro("__NO_MATH_INLINES");
1973
1974  if (HasAES)
1975    Builder.defineMacro("__AES__");
1976
1977  if (HasLZCNT)
1978    Builder.defineMacro("__LZCNT__");
1979
1980  if (HasBMI)
1981    Builder.defineMacro("__BMI__");
1982
1983  if (HasBMI2)
1984    Builder.defineMacro("__BMI2__");
1985
1986  if (HasPOPCNT)
1987    Builder.defineMacro("__POPCNT__");
1988
1989  if (HasFMA4)
1990    Builder.defineMacro("__FMA4__");
1991
1992  // Each case falls through to the previous one here.
1993  switch (SSELevel) {
1994  case AVX2:
1995    Builder.defineMacro("__AVX2__");
1996  case AVX:
1997    Builder.defineMacro("__AVX__");
1998  case SSE42:
1999    Builder.defineMacro("__SSE4_2__");
2000  case SSE41:
2001    Builder.defineMacro("__SSE4_1__");
2002  case SSSE3:
2003    Builder.defineMacro("__SSSE3__");
2004  case SSE3:
2005    Builder.defineMacro("__SSE3__");
2006  case SSE2:
2007    Builder.defineMacro("__SSE2__");
2008    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
2009  case SSE1:
2010    Builder.defineMacro("__SSE__");
2011    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
2012  case NoSSE:
2013    break;
2014  }
2015
2016  if (Opts.MicrosoftExt && PointerWidth == 32) {
2017    switch (SSELevel) {
2018    case AVX2:
2019    case AVX:
2020    case SSE42:
2021    case SSE41:
2022    case SSSE3:
2023    case SSE3:
2024    case SSE2:
2025      Builder.defineMacro("_M_IX86_FP", Twine(2));
2026      break;
2027    case SSE1:
2028      Builder.defineMacro("_M_IX86_FP", Twine(1));
2029      break;
2030    default:
2031      Builder.defineMacro("_M_IX86_FP", Twine(0));
2032    }
2033  }
2034
2035  // Each case falls through to the previous one here.
2036  switch (MMX3DNowLevel) {
2037  case AMD3DNowAthlon:
2038    Builder.defineMacro("__3dNOW_A__");
2039  case AMD3DNow:
2040    Builder.defineMacro("__3dNOW__");
2041  case MMX:
2042    Builder.defineMacro("__MMX__");
2043  case NoMMX3DNow:
2044    break;
2045  }
2046}
2047
2048
2049bool
2050X86TargetInfo::validateAsmConstraint(const char *&Name,
2051                                     TargetInfo::ConstraintInfo &Info) const {
2052  switch (*Name) {
2053  default: return false;
2054  case 'Y': // first letter of a pair:
2055    switch (*(Name+1)) {
2056    default: return false;
2057    case '0':  // First SSE register.
2058    case 't':  // Any SSE register, when SSE2 is enabled.
2059    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
2060    case 'm':  // any MMX register, when inter-unit moves enabled.
2061      break;   // falls through to setAllowsRegister.
2062  }
2063  case 'a': // eax.
2064  case 'b': // ebx.
2065  case 'c': // ecx.
2066  case 'd': // edx.
2067  case 'S': // esi.
2068  case 'D': // edi.
2069  case 'A': // edx:eax.
2070  case 'f': // any x87 floating point stack register.
2071  case 't': // top of floating point stack.
2072  case 'u': // second from top of floating point stack.
2073  case 'q': // Any register accessible as [r]l: a, b, c, and d.
2074  case 'y': // Any MMX register.
2075  case 'x': // Any SSE register.
2076  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2077  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2078  case 'l': // "Index" registers: any general register that can be used as an
2079            // index in a base+index memory access.
2080    Info.setAllowsRegister();
2081    return true;
2082  case 'C': // SSE floating point constant.
2083  case 'G': // x87 floating point constant.
2084  case 'e': // 32-bit signed integer constant for use with zero-extending
2085            // x86_64 instructions.
2086  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2087            // x86_64 instructions.
2088    return true;
2089  }
2090  return false;
2091}
2092
2093
2094std::string
2095X86TargetInfo::convertConstraint(const char *&Constraint) const {
2096  switch (*Constraint) {
2097  case 'a': return std::string("{ax}");
2098  case 'b': return std::string("{bx}");
2099  case 'c': return std::string("{cx}");
2100  case 'd': return std::string("{dx}");
2101  case 'S': return std::string("{si}");
2102  case 'D': return std::string("{di}");
2103  case 'p': // address
2104    return std::string("im");
2105  case 't': // top of floating point stack.
2106    return std::string("{st}");
2107  case 'u': // second from top of floating point stack.
2108    return std::string("{st(1)}"); // second from top of floating point stack.
2109  default:
2110    return std::string(1, *Constraint);
2111  }
2112}
2113} // end anonymous namespace
2114
2115namespace {
2116// X86-32 generic target
2117class X86_32TargetInfo : public X86TargetInfo {
2118public:
2119  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2120    DoubleAlign = LongLongAlign = 32;
2121    LongDoubleWidth = 96;
2122    LongDoubleAlign = 32;
2123    SuitableAlign = 128;
2124    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2125                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2126                        "a0:0:64-f80:32:32-n8:16:32-S128";
2127    SizeType = UnsignedInt;
2128    PtrDiffType = SignedInt;
2129    IntPtrType = SignedInt;
2130    RegParmMax = 3;
2131
2132    // Use fpret for all types.
2133    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2134                             (1 << TargetInfo::Double) |
2135                             (1 << TargetInfo::LongDouble));
2136
2137    // x86-32 has atomics up to 8 bytes
2138    // FIXME: Check that we actually have cmpxchg8b before setting
2139    // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2140    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2141  }
2142  virtual const char *getVAListDeclaration() const {
2143    return "typedef char* __builtin_va_list;";
2144  }
2145
2146  int getEHDataRegisterNumber(unsigned RegNo) const {
2147    if (RegNo == 0) return 0;
2148    if (RegNo == 1) return 2;
2149    return -1;
2150  }
2151};
2152} // end anonymous namespace
2153
2154namespace {
2155class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2156public:
2157  NetBSDI386TargetInfo(const std::string &triple) :
2158    NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2159  }
2160
2161  virtual unsigned getFloatEvalMethod() const {
2162    // NetBSD defaults to "double" rounding
2163    return 1;
2164  }
2165};
2166} // end anonymous namespace
2167
2168namespace {
2169class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2170public:
2171  OpenBSDI386TargetInfo(const std::string& triple) :
2172    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2173    SizeType = UnsignedLong;
2174    IntPtrType = SignedLong;
2175    PtrDiffType = SignedLong;
2176  }
2177};
2178} // end anonymous namespace
2179
2180namespace {
2181class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2182public:
2183  DarwinI386TargetInfo(const std::string& triple) :
2184    DarwinTargetInfo<X86_32TargetInfo>(triple) {
2185    LongDoubleWidth = 128;
2186    LongDoubleAlign = 128;
2187    SuitableAlign = 128;
2188    SizeType = UnsignedLong;
2189    IntPtrType = SignedLong;
2190    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2191                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2192                        "a0:0:64-f80:128:128-n8:16:32-S128";
2193    HasAlignMac68kSupport = true;
2194  }
2195
2196};
2197} // end anonymous namespace
2198
2199namespace {
2200// x86-32 Windows target
2201class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2202public:
2203  WindowsX86_32TargetInfo(const std::string& triple)
2204    : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2205    TLSSupported = false;
2206    WCharType = UnsignedShort;
2207    DoubleAlign = LongLongAlign = 64;
2208    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2209                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2210                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2211  }
2212  virtual void getTargetDefines(const LangOptions &Opts,
2213                                MacroBuilder &Builder) const {
2214    WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2215  }
2216};
2217} // end anonymous namespace
2218
2219namespace {
2220
2221// x86-32 Windows Visual Studio target
2222class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2223public:
2224  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2225    : WindowsX86_32TargetInfo(triple) {
2226    LongDoubleWidth = LongDoubleAlign = 64;
2227    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2228  }
2229  virtual void getTargetDefines(const LangOptions &Opts,
2230                                MacroBuilder &Builder) const {
2231    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2232    WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2233    // The value of the following reflects processor type.
2234    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2235    // We lost the original triple, so we use the default.
2236    Builder.defineMacro("_M_IX86", "600");
2237  }
2238};
2239} // end anonymous namespace
2240
2241namespace {
2242// x86-32 MinGW target
2243class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2244public:
2245  MinGWX86_32TargetInfo(const std::string& triple)
2246    : WindowsX86_32TargetInfo(triple) {
2247  }
2248  virtual void getTargetDefines(const LangOptions &Opts,
2249                                MacroBuilder &Builder) const {
2250    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2251    DefineStd(Builder, "WIN32", Opts);
2252    DefineStd(Builder, "WINNT", Opts);
2253    Builder.defineMacro("_X86_");
2254    Builder.defineMacro("__MSVCRT__");
2255    Builder.defineMacro("__MINGW32__");
2256
2257    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2258    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2259    if (Opts.MicrosoftExt)
2260      // Provide "as-is" __declspec.
2261      Builder.defineMacro("__declspec", "__declspec");
2262    else
2263      // Provide alias of __attribute__ like mingw32-gcc.
2264      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2265  }
2266};
2267} // end anonymous namespace
2268
2269namespace {
2270// x86-32 Cygwin target
2271class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2272public:
2273  CygwinX86_32TargetInfo(const std::string& triple)
2274    : X86_32TargetInfo(triple) {
2275    TLSSupported = false;
2276    WCharType = UnsignedShort;
2277    DoubleAlign = LongLongAlign = 64;
2278    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2279                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2280                        "a0:0:64-f80:32:32-n8:16:32-S32";
2281  }
2282  virtual void getTargetDefines(const LangOptions &Opts,
2283                                MacroBuilder &Builder) const {
2284    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2285    Builder.defineMacro("__CYGWIN__");
2286    Builder.defineMacro("__CYGWIN32__");
2287    DefineStd(Builder, "unix", Opts);
2288    if (Opts.CPlusPlus)
2289      Builder.defineMacro("_GNU_SOURCE");
2290  }
2291};
2292} // end anonymous namespace
2293
2294namespace {
2295// x86-32 Haiku target
2296class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2297public:
2298  HaikuX86_32TargetInfo(const std::string& triple)
2299    : X86_32TargetInfo(triple) {
2300    SizeType = UnsignedLong;
2301    IntPtrType = SignedLong;
2302    PtrDiffType = SignedLong;
2303    this->UserLabelPrefix = "";
2304  }
2305  virtual void getTargetDefines(const LangOptions &Opts,
2306                                MacroBuilder &Builder) const {
2307    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2308    Builder.defineMacro("__INTEL__");
2309    Builder.defineMacro("__HAIKU__");
2310  }
2311};
2312} // end anonymous namespace
2313
2314// RTEMS Target
2315template<typename Target>
2316class RTEMSTargetInfo : public OSTargetInfo<Target> {
2317protected:
2318  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2319                            MacroBuilder &Builder) const {
2320    // RTEMS defines; list based off of gcc output
2321
2322    Builder.defineMacro("__rtems__");
2323    Builder.defineMacro("__ELF__");
2324  }
2325public:
2326  RTEMSTargetInfo(const std::string &triple)
2327    : OSTargetInfo<Target>(triple) {
2328      this->UserLabelPrefix = "";
2329
2330      llvm::Triple Triple(triple);
2331      switch (Triple.getArch()) {
2332        default:
2333        case llvm::Triple::x86:
2334          // this->MCountName = ".mcount";
2335          break;
2336        case llvm::Triple::mips:
2337        case llvm::Triple::mipsel:
2338        case llvm::Triple::ppc:
2339        case llvm::Triple::ppc64:
2340          // this->MCountName = "_mcount";
2341          break;
2342        case llvm::Triple::arm:
2343          // this->MCountName = "__mcount";
2344          break;
2345      }
2346
2347    }
2348};
2349
2350namespace {
2351// x86-32 RTEMS target
2352class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2353public:
2354  RTEMSX86_32TargetInfo(const std::string& triple)
2355    : X86_32TargetInfo(triple) {
2356    SizeType = UnsignedLong;
2357    IntPtrType = SignedLong;
2358    PtrDiffType = SignedLong;
2359    this->UserLabelPrefix = "";
2360  }
2361  virtual void getTargetDefines(const LangOptions &Opts,
2362                                MacroBuilder &Builder) const {
2363    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2364    Builder.defineMacro("__INTEL__");
2365    Builder.defineMacro("__rtems__");
2366  }
2367};
2368} // end anonymous namespace
2369
2370namespace {
2371// x86-64 generic target
2372class X86_64TargetInfo : public X86TargetInfo {
2373public:
2374  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2375    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2376    LongDoubleWidth = 128;
2377    LongDoubleAlign = 128;
2378    LargeArrayMinWidth = 128;
2379    LargeArrayAlign = 128;
2380    SuitableAlign = 128;
2381    IntMaxType = SignedLong;
2382    UIntMaxType = UnsignedLong;
2383    Int64Type = SignedLong;
2384    RegParmMax = 6;
2385
2386    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2387                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2388                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2389
2390    // Use fpret only for long double.
2391    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2392
2393    // Use fp2ret for _Complex long double.
2394    ComplexLongDoubleUsesFP2Ret = true;
2395
2396    // x86-64 has atomics up to 16 bytes.
2397    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2398    // on CPUs with cmpxchg16b
2399    MaxAtomicPromoteWidth = 128;
2400    MaxAtomicInlineWidth = 64;
2401  }
2402  virtual const char *getVAListDeclaration() const {
2403    return "typedef struct __va_list_tag {"
2404           "  unsigned gp_offset;"
2405           "  unsigned fp_offset;"
2406           "  void* overflow_arg_area;"
2407           "  void* reg_save_area;"
2408           "} __va_list_tag;"
2409           "typedef __va_list_tag __builtin_va_list[1];";
2410  }
2411
2412  int getEHDataRegisterNumber(unsigned RegNo) const {
2413    if (RegNo == 0) return 0;
2414    if (RegNo == 1) return 1;
2415    return -1;
2416  }
2417};
2418} // end anonymous namespace
2419
2420namespace {
2421// x86-64 Windows target
2422class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2423public:
2424  WindowsX86_64TargetInfo(const std::string& triple)
2425    : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2426    TLSSupported = false;
2427    WCharType = UnsignedShort;
2428    LongWidth = LongAlign = 32;
2429    DoubleAlign = LongLongAlign = 64;
2430    IntMaxType = SignedLongLong;
2431    UIntMaxType = UnsignedLongLong;
2432    Int64Type = SignedLongLong;
2433    SizeType = UnsignedLongLong;
2434    PtrDiffType = SignedLongLong;
2435    IntPtrType = SignedLongLong;
2436    this->UserLabelPrefix = "";
2437  }
2438  virtual void getTargetDefines(const LangOptions &Opts,
2439                                MacroBuilder &Builder) const {
2440    WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2441    Builder.defineMacro("_WIN64");
2442  }
2443  virtual const char *getVAListDeclaration() const {
2444    return "typedef char* __builtin_va_list;";
2445  }
2446};
2447} // end anonymous namespace
2448
2449namespace {
2450// x86-64 Windows Visual Studio target
2451class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2452public:
2453  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2454    : WindowsX86_64TargetInfo(triple) {
2455    LongDoubleWidth = LongDoubleAlign = 64;
2456    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2457  }
2458  virtual void getTargetDefines(const LangOptions &Opts,
2459                                MacroBuilder &Builder) const {
2460    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2461    WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2462    Builder.defineMacro("_M_X64");
2463    Builder.defineMacro("_M_AMD64");
2464  }
2465};
2466} // end anonymous namespace
2467
2468namespace {
2469// x86-64 MinGW target
2470class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2471public:
2472  MinGWX86_64TargetInfo(const std::string& triple)
2473    : WindowsX86_64TargetInfo(triple) {
2474  }
2475  virtual void getTargetDefines(const LangOptions &Opts,
2476                                MacroBuilder &Builder) const {
2477    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2478    DefineStd(Builder, "WIN64", Opts);
2479    Builder.defineMacro("__MSVCRT__");
2480    Builder.defineMacro("__MINGW32__");
2481    Builder.defineMacro("__MINGW64__");
2482
2483    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2484    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2485    if (Opts.MicrosoftExt)
2486      // Provide "as-is" __declspec.
2487      Builder.defineMacro("__declspec", "__declspec");
2488    else
2489      // Provide alias of __attribute__ like mingw32-gcc.
2490      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2491  }
2492};
2493} // end anonymous namespace
2494
2495namespace {
2496class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2497public:
2498  DarwinX86_64TargetInfo(const std::string& triple)
2499      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2500    Int64Type = SignedLongLong;
2501  }
2502};
2503} // end anonymous namespace
2504
2505namespace {
2506class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2507public:
2508  OpenBSDX86_64TargetInfo(const std::string& triple)
2509      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2510    IntMaxType = SignedLongLong;
2511    UIntMaxType = UnsignedLongLong;
2512    Int64Type = SignedLongLong;
2513  }
2514};
2515} // end anonymous namespace
2516
2517namespace {
2518class ARMTargetInfo : public TargetInfo {
2519  // Possible FPU choices.
2520  enum FPUMode {
2521    NoFPU,
2522    VFP2FPU,
2523    VFP3FPU,
2524    NeonFPU
2525  };
2526
2527  static bool FPUModeIsVFP(FPUMode Mode) {
2528    return Mode >= VFP2FPU && Mode <= NeonFPU;
2529  }
2530
2531  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2532  static const char * const GCCRegNames[];
2533
2534  std::string ABI, CPU;
2535
2536  unsigned FPU : 3;
2537
2538  unsigned IsThumb : 1;
2539
2540  // Initialized via features.
2541  unsigned SoftFloat : 1;
2542  unsigned SoftFloatABI : 1;
2543
2544  static const Builtin::Info BuiltinInfo[];
2545
2546public:
2547  ARMTargetInfo(const std::string &TripleStr)
2548    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
2549  {
2550    BigEndian = false;
2551    SizeType = UnsignedInt;
2552    PtrDiffType = SignedInt;
2553    // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
2554    WCharType = UnsignedInt;
2555
2556    // {} in inline assembly are neon specifiers, not assembly variant
2557    // specifiers.
2558    NoAsmVariants = true;
2559
2560    // FIXME: Should we just treat this as a feature?
2561    IsThumb = getTriple().getArchName().startswith("thumb");
2562    if (IsThumb) {
2563      // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2564      // so set preferred for small types to 32.
2565      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2566                           "i64:64:64-f32:32:32-f64:64:64-"
2567                           "v64:64:64-v128:64:128-a0:0:32-n32-S64");
2568    } else {
2569      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2570                           "i64:64:64-f32:32:32-f64:64:64-"
2571                           "v64:64:64-v128:64:128-a0:0:64-n32-S64");
2572    }
2573
2574    // ARM targets default to using the ARM C++ ABI.
2575    CXXABI = CXXABI_ARM;
2576
2577    // ARM has atomics up to 8 bytes
2578    // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
2579    MaxAtomicPromoteWidth = 64;
2580  }
2581  virtual const char *getABI() const { return ABI.c_str(); }
2582  virtual bool setABI(const std::string &Name) {
2583    ABI = Name;
2584
2585    // The defaults (above) are for AAPCS, check if we need to change them.
2586    //
2587    // FIXME: We need support for -meabi... we could just mangle it into the
2588    // name.
2589    if (Name == "apcs-gnu") {
2590      DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
2591      SizeType = UnsignedLong;
2592
2593      // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
2594      WCharType = SignedInt;
2595
2596      // Do not respect the alignment of bit-field types when laying out
2597      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
2598      UseBitFieldTypeAlignment = false;
2599
2600      /// Do force alignment of members that follow zero length bitfields.  If
2601      /// the alignment of the zero-length bitfield is greater than the member
2602      /// that follows it, `bar', `bar' will be aligned as the  type of the
2603      /// zero length bitfield.
2604      UseZeroLengthBitfieldAlignment = true;
2605
2606      /// gcc forces the alignment to 4 bytes, regardless of the type of the
2607      /// zero length bitfield.  This corresponds to EMPTY_FIELD_BOUNDARY in
2608      /// gcc.
2609      ZeroLengthBitfieldBoundary = 32;
2610
2611      if (IsThumb) {
2612        // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2613        // so set preferred for small types to 32.
2614        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2615                             "i64:32:64-f32:32:32-f64:32:64-"
2616                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2617      } else {
2618        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2619                             "i64:32:64-f32:32:32-f64:32:64-"
2620                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2621      }
2622
2623      // FIXME: Override "preferred align" for double and long long.
2624    } else if (Name == "aapcs") {
2625      // FIXME: Enumerated types are variable width in straight AAPCS.
2626    } else if (Name == "aapcs-linux") {
2627      ;
2628    } else
2629      return false;
2630
2631    return true;
2632  }
2633
2634  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
2635    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
2636      Features["vfp2"] = true;
2637    else if (CPU == "cortex-a8" || CPU == "cortex-a9")
2638      Features["neon"] = true;
2639  }
2640
2641  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2642                                 const std::string &Name,
2643                                 bool Enabled) const {
2644    if (Name == "soft-float" || Name == "soft-float-abi" ||
2645        Name == "vfp2" || Name == "vfp3" || Name == "neon") {
2646      Features[Name] = Enabled;
2647    } else
2648      return false;
2649
2650    return true;
2651  }
2652
2653  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2654    FPU = NoFPU;
2655    SoftFloat = SoftFloatABI = false;
2656    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
2657      if (Features[i] == "+soft-float")
2658        SoftFloat = true;
2659      else if (Features[i] == "+soft-float-abi")
2660        SoftFloatABI = true;
2661      else if (Features[i] == "+vfp2")
2662        FPU = VFP2FPU;
2663      else if (Features[i] == "+vfp3")
2664        FPU = VFP3FPU;
2665      else if (Features[i] == "+neon")
2666        FPU = NeonFPU;
2667    }
2668
2669    // Remove front-end specific options which the backend handles differently.
2670    std::vector<std::string>::iterator it;
2671    it = std::find(Features.begin(), Features.end(), "+soft-float");
2672    if (it != Features.end())
2673      Features.erase(it);
2674    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
2675    if (it != Features.end())
2676      Features.erase(it);
2677  }
2678
2679  static const char *getCPUDefineSuffix(StringRef Name) {
2680    return llvm::StringSwitch<const char*>(Name)
2681      .Cases("arm8", "arm810", "4")
2682      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
2683      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
2684      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
2685      .Case("ep9312", "4T")
2686      .Cases("arm10tdmi", "arm1020t", "5T")
2687      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
2688      .Case("arm926ej-s", "5TEJ")
2689      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
2690      .Cases("xscale", "iwmmxt", "5TE")
2691      .Case("arm1136j-s", "6J")
2692      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
2693      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
2694      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
2695      .Cases("cortex-a8", "cortex-a9", "7A")
2696      .Case("cortex-m3", "7M")
2697      .Case("cortex-m0", "6M")
2698      .Default(0);
2699  }
2700  virtual bool setCPU(const std::string &Name) {
2701    if (!getCPUDefineSuffix(Name))
2702      return false;
2703
2704    CPU = Name;
2705    return true;
2706  }
2707  virtual void getTargetDefines(const LangOptions &Opts,
2708                                MacroBuilder &Builder) const {
2709    // Target identification.
2710    Builder.defineMacro("__arm");
2711    Builder.defineMacro("__arm__");
2712
2713    // Target properties.
2714    Builder.defineMacro("__ARMEL__");
2715    Builder.defineMacro("__LITTLE_ENDIAN__");
2716    Builder.defineMacro("__REGISTER_PREFIX__", "");
2717
2718    StringRef CPUArch = getCPUDefineSuffix(CPU);
2719    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
2720
2721    // Subtarget options.
2722
2723    // FIXME: It's more complicated than this and we don't really support
2724    // interworking.
2725    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
2726      Builder.defineMacro("__THUMB_INTERWORK__");
2727
2728    if (ABI == "aapcs" || ABI == "aapcs-linux")
2729      Builder.defineMacro("__ARM_EABI__");
2730
2731    if (SoftFloat)
2732      Builder.defineMacro("__SOFTFP__");
2733
2734    if (CPU == "xscale")
2735      Builder.defineMacro("__XSCALE__");
2736
2737    bool IsARMv7 = CPUArch.startswith("7");
2738    if (IsThumb) {
2739      Builder.defineMacro("__THUMBEL__");
2740      Builder.defineMacro("__thumb__");
2741      if (CPUArch == "6T2" || IsARMv7)
2742        Builder.defineMacro("__thumb2__");
2743    }
2744
2745    // Note, this is always on in gcc, even though it doesn't make sense.
2746    Builder.defineMacro("__APCS_32__");
2747
2748    if (FPUModeIsVFP((FPUMode) FPU))
2749      Builder.defineMacro("__VFP_FP__");
2750
2751    // This only gets set when Neon instructions are actually available, unlike
2752    // the VFP define, hence the soft float and arch check. This is subtly
2753    // different from gcc, we follow the intent which was that it should be set
2754    // when Neon instructions are actually available.
2755    if (FPU == NeonFPU && !SoftFloat && IsARMv7)
2756      Builder.defineMacro("__ARM_NEON__");
2757  }
2758  virtual void getTargetBuiltins(const Builtin::Info *&Records,
2759                                 unsigned &NumRecords) const {
2760    Records = BuiltinInfo;
2761    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
2762  }
2763  virtual const char *getVAListDeclaration() const {
2764    return "typedef void* __builtin_va_list;";
2765  }
2766  virtual void getGCCRegNames(const char * const *&Names,
2767                              unsigned &NumNames) const;
2768  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2769                                unsigned &NumAliases) const;
2770  virtual bool validateAsmConstraint(const char *&Name,
2771                                     TargetInfo::ConstraintInfo &Info) const {
2772    // FIXME: Check if this is complete
2773    switch (*Name) {
2774    default:
2775    case 'l': // r0-r7
2776    case 'h': // r8-r15
2777    case 'w': // VFP Floating point register single precision
2778    case 'P': // VFP Floating point register double precision
2779      Info.setAllowsRegister();
2780      return true;
2781    case 'Q': // A memory address that is a single base register.
2782      Info.setAllowsMemory();
2783      return true;
2784    case 'U': // a memory reference...
2785      switch (Name[1]) {
2786      case 'q': // ...ARMV4 ldrsb
2787      case 'v': // ...VFP load/store (reg+constant offset)
2788      case 'y': // ...iWMMXt load/store
2789      case 't': // address valid for load/store opaque types wider
2790	        // than 128-bits
2791      case 'n': // valid address for Neon doubleword vector load/store
2792      case 'm': // valid address for Neon element and structure load/store
2793      case 's': // valid address for non-offset loads/stores of quad-word
2794	        // values in four ARM registers
2795        Info.setAllowsMemory();
2796        Name++;
2797        return true;
2798      }
2799    }
2800    return false;
2801  }
2802  virtual std::string convertConstraint(const char *&Constraint) const {
2803    std::string R;
2804    switch (*Constraint) {
2805    case 'U':   // Two-character constraint; add "^" hint for later parsing.
2806      R = std::string("^") + std::string(Constraint, 2);
2807      Constraint++;
2808      break;
2809    case 'p': // 'p' should be translated to 'r' by default.
2810      R = std::string("r");
2811      break;
2812    default:
2813      return std::string(1, *Constraint);
2814    }
2815    return R;
2816  }
2817  virtual const char *getClobbers() const {
2818    // FIXME: Is this really right?
2819    return "";
2820  }
2821};
2822
2823const char * const ARMTargetInfo::GCCRegNames[] = {
2824  // Integer registers
2825  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2826  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
2827
2828  // Float registers
2829  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
2830  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
2831  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
2832  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
2833
2834  // Double registers
2835  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
2836  "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
2837  "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
2838  "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
2839
2840  // Quad registers
2841  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
2842  "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
2843};
2844
2845void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
2846                                   unsigned &NumNames) const {
2847  Names = GCCRegNames;
2848  NumNames = llvm::array_lengthof(GCCRegNames);
2849}
2850
2851const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
2852  { { "a1" }, "r0" },
2853  { { "a2" }, "r1" },
2854  { { "a3" }, "r2" },
2855  { { "a4" }, "r3" },
2856  { { "v1" }, "r4" },
2857  { { "v2" }, "r5" },
2858  { { "v3" }, "r6" },
2859  { { "v4" }, "r7" },
2860  { { "v5" }, "r8" },
2861  { { "v6", "rfp" }, "r9" },
2862  { { "sl" }, "r10" },
2863  { { "fp" }, "r11" },
2864  { { "ip" }, "r12" },
2865  { { "r13" }, "sp" },
2866  { { "r14" }, "lr" },
2867  { { "r15" }, "pc" },
2868  // The S, D and Q registers overlap, but aren't really aliases; we
2869  // don't want to substitute one of these for a different-sized one.
2870};
2871
2872void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2873                                       unsigned &NumAliases) const {
2874  Aliases = GCCRegAliases;
2875  NumAliases = llvm::array_lengthof(GCCRegAliases);
2876}
2877
2878const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
2879#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
2880#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
2881                                              ALL_LANGUAGES },
2882#include "clang/Basic/BuiltinsARM.def"
2883};
2884} // end anonymous namespace.
2885
2886namespace {
2887class DarwinARMTargetInfo :
2888  public DarwinTargetInfo<ARMTargetInfo> {
2889protected:
2890  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2891                            MacroBuilder &Builder) const {
2892    getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
2893  }
2894
2895public:
2896  DarwinARMTargetInfo(const std::string& triple)
2897    : DarwinTargetInfo<ARMTargetInfo>(triple) {
2898    HasAlignMac68kSupport = true;
2899    // iOS always has 64-bit atomic instructions.
2900    // FIXME: This should be based off of the target features in ARMTargetInfo.
2901    MaxAtomicInlineWidth = 64;
2902  }
2903};
2904} // end anonymous namespace.
2905
2906
2907namespace {
2908// Hexagon abstract base class
2909class HexagonTargetInfo : public TargetInfo {
2910  static const Builtin::Info BuiltinInfo[];
2911  static const char * const GCCRegNames[];
2912  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2913  std::string CPU;
2914public:
2915  HexagonTargetInfo(const std::string& triple) : TargetInfo(triple)  {
2916    BigEndian = false;
2917    DescriptionString = ("e-p:32:32:32-"
2918                         "i64:64:64-i32:32:32-"
2919                         "i16:16:16-i1:32:32-a:0:0");
2920
2921    // {} in inline assembly are packet specifiers, not assembly variant
2922    // specifiers.
2923    NoAsmVariants = true;
2924  }
2925
2926  virtual void getTargetBuiltins(const Builtin::Info *&Records,
2927                                 unsigned &NumRecords) const {
2928    Records = BuiltinInfo;
2929    NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
2930  }
2931
2932  virtual bool validateAsmConstraint(const char *&Name,
2933                                     TargetInfo::ConstraintInfo &Info) const {
2934    return true;
2935  }
2936
2937  virtual void getTargetDefines(const LangOptions &Opts,
2938                                MacroBuilder &Builder) const;
2939
2940  virtual const char *getVAListDeclaration() const {
2941    return "typedef char* __builtin_va_list;";
2942  }
2943  virtual void getGCCRegNames(const char * const *&Names,
2944                              unsigned &NumNames) const;
2945  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2946                                unsigned &NumAliases) const;
2947  virtual const char *getClobbers() const {
2948    return "";
2949  }
2950  virtual bool setCPU(const std::string &Name) {
2951    CPU = Name;
2952    return true;
2953  }
2954};
2955
2956void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
2957                                MacroBuilder &Builder) const {
2958  Builder.defineMacro("qdsp6");
2959  Builder.defineMacro("__qdsp6", "1");
2960  Builder.defineMacro("__qdsp6__", "1");
2961
2962  Builder.defineMacro("hexagon");
2963  Builder.defineMacro("__hexagon", "1");
2964  Builder.defineMacro("__hexagon__", "1");
2965
2966  if(CPU == "hexagonv1") {
2967    Builder.defineMacro("__HEXAGON_V1__");
2968    Builder.defineMacro("__HEXAGON_ARCH__", "1");
2969    if(Opts.HexagonQdsp6Compat) {
2970      Builder.defineMacro("__QDSP6_V1__");
2971      Builder.defineMacro("__QDSP6_ARCH__", "1");
2972    }
2973  }
2974  else if(CPU == "hexagonv2") {
2975    Builder.defineMacro("__HEXAGON_V2__");
2976    Builder.defineMacro("__HEXAGON_ARCH__", "2");
2977    if(Opts.HexagonQdsp6Compat) {
2978      Builder.defineMacro("__QDSP6_V2__");
2979      Builder.defineMacro("__QDSP6_ARCH__", "2");
2980    }
2981  }
2982  else if(CPU == "hexagonv3") {
2983    Builder.defineMacro("__HEXAGON_V3__");
2984    Builder.defineMacro("__HEXAGON_ARCH__", "3");
2985    if(Opts.HexagonQdsp6Compat) {
2986      Builder.defineMacro("__QDSP6_V3__");
2987      Builder.defineMacro("__QDSP6_ARCH__", "3");
2988    }
2989  }
2990  else if(CPU == "hexagonv4") {
2991    Builder.defineMacro("__HEXAGON_V4__");
2992    Builder.defineMacro("__HEXAGON_ARCH__", "4");
2993    if(Opts.HexagonQdsp6Compat) {
2994      Builder.defineMacro("__QDSP6_V4__");
2995      Builder.defineMacro("__QDSP6_ARCH__", "4");
2996    }
2997  }
2998}
2999
3000const char * const HexagonTargetInfo::GCCRegNames[] = {
3001  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3002  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3003  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3004  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3005  "p0", "p1", "p2", "p3",
3006  "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3007};
3008
3009void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3010                                   unsigned &NumNames) const {
3011  Names = GCCRegNames;
3012  NumNames = llvm::array_lengthof(GCCRegNames);
3013}
3014
3015
3016const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3017  { { "sp" }, "r29" },
3018  { { "fp" }, "r30" },
3019  { { "lr" }, "r31" },
3020 };
3021
3022void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3023                                     unsigned &NumAliases) const {
3024  Aliases = GCCRegAliases;
3025  NumAliases = llvm::array_lengthof(GCCRegAliases);
3026}
3027
3028
3029const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3030#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3031#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3032                                              ALL_LANGUAGES },
3033#include "clang/Basic/BuiltinsHexagon.def"
3034};
3035}
3036
3037
3038namespace {
3039class SparcV8TargetInfo : public TargetInfo {
3040  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3041  static const char * const GCCRegNames[];
3042  bool SoftFloat;
3043public:
3044  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3045    // FIXME: Support Sparc quad-precision long double?
3046    BigEndian = false;
3047    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3048                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3049  }
3050  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3051                                 const std::string &Name,
3052                                 bool Enabled) const {
3053    if (Name == "soft-float")
3054      Features[Name] = Enabled;
3055    else
3056      return false;
3057
3058    return true;
3059  }
3060  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3061    SoftFloat = false;
3062    for (unsigned i = 0, e = Features.size(); i != e; ++i)
3063      if (Features[i] == "+soft-float")
3064        SoftFloat = true;
3065  }
3066  virtual void getTargetDefines(const LangOptions &Opts,
3067                                MacroBuilder &Builder) const {
3068    DefineStd(Builder, "sparc", Opts);
3069    Builder.defineMacro("__sparcv8");
3070    Builder.defineMacro("__REGISTER_PREFIX__", "");
3071
3072    if (SoftFloat)
3073      Builder.defineMacro("SOFT_FLOAT", "1");
3074  }
3075  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3076                                 unsigned &NumRecords) const {
3077    // FIXME: Implement!
3078  }
3079  virtual const char *getVAListDeclaration() const {
3080    return "typedef void* __builtin_va_list;";
3081  }
3082  virtual void getGCCRegNames(const char * const *&Names,
3083                              unsigned &NumNames) const;
3084  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3085                                unsigned &NumAliases) const;
3086  virtual bool validateAsmConstraint(const char *&Name,
3087                                     TargetInfo::ConstraintInfo &info) const {
3088    // FIXME: Implement!
3089    return false;
3090  }
3091  virtual const char *getClobbers() const {
3092    // FIXME: Implement!
3093    return "";
3094  }
3095};
3096
3097const char * const SparcV8TargetInfo::GCCRegNames[] = {
3098  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3099  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3100  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3101  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3102};
3103
3104void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3105                                       unsigned &NumNames) const {
3106  Names = GCCRegNames;
3107  NumNames = llvm::array_lengthof(GCCRegNames);
3108}
3109
3110const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3111  { { "g0" }, "r0" },
3112  { { "g1" }, "r1" },
3113  { { "g2" }, "r2" },
3114  { { "g3" }, "r3" },
3115  { { "g4" }, "r4" },
3116  { { "g5" }, "r5" },
3117  { { "g6" }, "r6" },
3118  { { "g7" }, "r7" },
3119  { { "o0" }, "r8" },
3120  { { "o1" }, "r9" },
3121  { { "o2" }, "r10" },
3122  { { "o3" }, "r11" },
3123  { { "o4" }, "r12" },
3124  { { "o5" }, "r13" },
3125  { { "o6", "sp" }, "r14" },
3126  { { "o7" }, "r15" },
3127  { { "l0" }, "r16" },
3128  { { "l1" }, "r17" },
3129  { { "l2" }, "r18" },
3130  { { "l3" }, "r19" },
3131  { { "l4" }, "r20" },
3132  { { "l5" }, "r21" },
3133  { { "l6" }, "r22" },
3134  { { "l7" }, "r23" },
3135  { { "i0" }, "r24" },
3136  { { "i1" }, "r25" },
3137  { { "i2" }, "r26" },
3138  { { "i3" }, "r27" },
3139  { { "i4" }, "r28" },
3140  { { "i5" }, "r29" },
3141  { { "i6", "fp" }, "r30" },
3142  { { "i7" }, "r31" },
3143};
3144
3145void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3146                                         unsigned &NumAliases) const {
3147  Aliases = GCCRegAliases;
3148  NumAliases = llvm::array_lengthof(GCCRegAliases);
3149}
3150} // end anonymous namespace.
3151
3152namespace {
3153class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3154public:
3155  AuroraUXSparcV8TargetInfo(const std::string& triple) :
3156      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3157    SizeType = UnsignedInt;
3158    PtrDiffType = SignedInt;
3159  }
3160};
3161class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3162public:
3163  SolarisSparcV8TargetInfo(const std::string& triple) :
3164      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3165    SizeType = UnsignedInt;
3166    PtrDiffType = SignedInt;
3167  }
3168};
3169} // end anonymous namespace.
3170
3171namespace {
3172  class MSP430TargetInfo : public TargetInfo {
3173    static const char * const GCCRegNames[];
3174  public:
3175    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3176      BigEndian = false;
3177      TLSSupported = false;
3178      IntWidth = 16; IntAlign = 16;
3179      LongWidth = 32; LongLongWidth = 64;
3180      LongAlign = LongLongAlign = 16;
3181      PointerWidth = 16; PointerAlign = 16;
3182      SuitableAlign = 16;
3183      SizeType = UnsignedInt;
3184      IntMaxType = SignedLong;
3185      UIntMaxType = UnsignedLong;
3186      IntPtrType = SignedShort;
3187      PtrDiffType = SignedInt;
3188      SigAtomicType = SignedLong;
3189      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3190   }
3191    virtual void getTargetDefines(const LangOptions &Opts,
3192                                  MacroBuilder &Builder) const {
3193      Builder.defineMacro("MSP430");
3194      Builder.defineMacro("__MSP430__");
3195      // FIXME: defines for different 'flavours' of MCU
3196    }
3197    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3198                                   unsigned &NumRecords) const {
3199     // FIXME: Implement.
3200      Records = 0;
3201      NumRecords = 0;
3202    }
3203    virtual void getGCCRegNames(const char * const *&Names,
3204                                unsigned &NumNames) const;
3205    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3206                                  unsigned &NumAliases) const {
3207      // No aliases.
3208      Aliases = 0;
3209      NumAliases = 0;
3210    }
3211    virtual bool validateAsmConstraint(const char *&Name,
3212                                       TargetInfo::ConstraintInfo &info) const {
3213      // No target constraints for now.
3214      return false;
3215    }
3216    virtual const char *getClobbers() const {
3217      // FIXME: Is this really right?
3218      return "";
3219    }
3220    virtual const char *getVAListDeclaration() const {
3221      // FIXME: implement
3222      return "typedef char* __builtin_va_list;";
3223   }
3224  };
3225
3226  const char * const MSP430TargetInfo::GCCRegNames[] = {
3227    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3228    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3229  };
3230
3231  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3232                                        unsigned &NumNames) const {
3233    Names = GCCRegNames;
3234    NumNames = llvm::array_lengthof(GCCRegNames);
3235  }
3236}
3237
3238namespace {
3239
3240  // LLVM and Clang cannot be used directly to output native binaries for
3241  // target, but is used to compile C code to llvm bitcode with correct
3242  // type and alignment information.
3243  //
3244  // TCE uses the llvm bitcode as input and uses it for generating customized
3245  // target processor and program binary. TCE co-design environment is
3246  // publicly available in http://tce.cs.tut.fi
3247
3248  static const unsigned TCEOpenCLAddrSpaceMap[] = {
3249      3, // opencl_global
3250      4, // opencl_local
3251      5  // opencl_constant
3252  };
3253
3254  class TCETargetInfo : public TargetInfo{
3255  public:
3256    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3257      TLSSupported = false;
3258      IntWidth = 32;
3259      LongWidth = LongLongWidth = 32;
3260      PointerWidth = 32;
3261      IntAlign = 32;
3262      LongAlign = LongLongAlign = 32;
3263      PointerAlign = 32;
3264      SuitableAlign = 32;
3265      SizeType = UnsignedInt;
3266      IntMaxType = SignedLong;
3267      UIntMaxType = UnsignedLong;
3268      IntPtrType = SignedInt;
3269      PtrDiffType = SignedInt;
3270      FloatWidth = 32;
3271      FloatAlign = 32;
3272      DoubleWidth = 32;
3273      DoubleAlign = 32;
3274      LongDoubleWidth = 32;
3275      LongDoubleAlign = 32;
3276      FloatFormat = &llvm::APFloat::IEEEsingle;
3277      DoubleFormat = &llvm::APFloat::IEEEsingle;
3278      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3279      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3280                          "i16:16:32-i32:32:32-i64:32:32-"
3281                          "f32:32:32-f64:32:32-v64:32:32-"
3282                          "v128:32:32-a0:0:32-n32";
3283      AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3284    }
3285
3286    virtual void getTargetDefines(const LangOptions &Opts,
3287                                  MacroBuilder &Builder) const {
3288      DefineStd(Builder, "tce", Opts);
3289      Builder.defineMacro("__TCE__");
3290      Builder.defineMacro("__TCE_V1__");
3291    }
3292    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3293                                   unsigned &NumRecords) const {}
3294    virtual const char *getClobbers() const {
3295      return "";
3296    }
3297    virtual const char *getVAListDeclaration() const {
3298      return "typedef void* __builtin_va_list;";
3299    }
3300    virtual void getGCCRegNames(const char * const *&Names,
3301                                unsigned &NumNames) const {}
3302    virtual bool validateAsmConstraint(const char *&Name,
3303                                       TargetInfo::ConstraintInfo &info) const {
3304      return true;
3305    }
3306    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3307                                  unsigned &NumAliases) const {}
3308  };
3309}
3310
3311namespace {
3312class MipsTargetInfoBase : public TargetInfo {
3313  std::string CPU;
3314protected:
3315  std::string ABI;
3316public:
3317  MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr)
3318    : TargetInfo(triple), ABI(ABIStr) {}
3319  virtual const char *getABI() const { return ABI.c_str(); }
3320  virtual bool setABI(const std::string &Name) = 0;
3321  virtual bool setCPU(const std::string &Name) {
3322    CPU = Name;
3323    return true;
3324  }
3325  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3326    Features[ABI] = true;
3327    Features[CPU] = true;
3328  }
3329  virtual void getArchDefines(const LangOptions &Opts,
3330                              MacroBuilder &Builder) const = 0;
3331  virtual void getTargetDefines(const LangOptions &Opts,
3332                                MacroBuilder &Builder) const = 0;
3333  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3334                                 unsigned &NumRecords) const {
3335    // FIXME: Implement!
3336  }
3337  virtual const char *getVAListDeclaration() const {
3338    return "typedef void* __builtin_va_list;";
3339  }
3340  virtual void getGCCRegNames(const char * const *&Names,
3341                              unsigned &NumNames) const {
3342    static const char * const GCCRegNames[] = {
3343      "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
3344      "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
3345      "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
3346      "$24",  "$25",  "$26",  "$27",  "$28",  "$sp",  "$fp",  "$31",
3347      "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
3348      "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
3349      "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
3350      "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
3351      "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
3352      "$fcc5","$fcc6","$fcc7"
3353    };
3354    Names = GCCRegNames;
3355    NumNames = llvm::array_lengthof(GCCRegNames);
3356  }
3357  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3358                                unsigned &NumAliases) const = 0;
3359  virtual bool validateAsmConstraint(const char *&Name,
3360                                     TargetInfo::ConstraintInfo &Info) const {
3361    switch (*Name) {
3362    default:
3363      return false;
3364
3365    case 'r': // CPU registers.
3366    case 'd': // Equivalent to "r" unless generating MIPS16 code.
3367    case 'y': // Equivalent to "r", backwards compatibility only.
3368    case 'f': // floating-point registers.
3369      Info.setAllowsRegister();
3370      return true;
3371    }
3372    return false;
3373  }
3374
3375  virtual const char *getClobbers() const {
3376    // FIXME: Implement!
3377    return "";
3378  }
3379};
3380
3381class Mips32TargetInfoBase : public MipsTargetInfoBase {
3382public:
3383  Mips32TargetInfoBase(const std::string& triple) :
3384    MipsTargetInfoBase(triple, "o32") {
3385    SizeType = UnsignedInt;
3386    PtrDiffType = SignedInt;
3387  }
3388  virtual bool setABI(const std::string &Name) {
3389    if ((Name == "o32") || (Name == "eabi")) {
3390      ABI = Name;
3391      return true;
3392    } else
3393      return false;
3394  }
3395  virtual void getArchDefines(const LangOptions &Opts,
3396                              MacroBuilder &Builder) const {
3397    Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
3398    Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
3399    Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
3400
3401    if (ABI == "o32") {
3402      Builder.defineMacro("__mips_o32");
3403      Builder.defineMacro("_ABIO32", "1");
3404      Builder.defineMacro("_MIPS_SIM", "_ABIO32");
3405    }
3406    else if (ABI == "eabi")
3407      Builder.defineMacro("__mips_eabi");
3408    else
3409      llvm_unreachable("Invalid ABI for Mips32.");
3410  }
3411  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3412                                unsigned &NumAliases) const {
3413    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3414      { { "at" },  "$1" },
3415      { { "v0" },  "$2" },
3416      { { "v1" },  "$3" },
3417      { { "a0" },  "$4" },
3418      { { "a1" },  "$5" },
3419      { { "a2" },  "$6" },
3420      { { "a3" },  "$7" },
3421      { { "t0" },  "$8" },
3422      { { "t1" },  "$9" },
3423      { { "t2" }, "$10" },
3424      { { "t3" }, "$11" },
3425      { { "t4" }, "$12" },
3426      { { "t5" }, "$13" },
3427      { { "t6" }, "$14" },
3428      { { "t7" }, "$15" },
3429      { { "s0" }, "$16" },
3430      { { "s1" }, "$17" },
3431      { { "s2" }, "$18" },
3432      { { "s3" }, "$19" },
3433      { { "s4" }, "$20" },
3434      { { "s5" }, "$21" },
3435      { { "s6" }, "$22" },
3436      { { "s7" }, "$23" },
3437      { { "t8" }, "$24" },
3438      { { "t9" }, "$25" },
3439      { { "k0" }, "$26" },
3440      { { "k1" }, "$27" },
3441      { { "gp" }, "$28" },
3442      { { "sp" }, "$29" },
3443      { { "fp" }, "$30" },
3444      { { "ra" }, "$31" }
3445    };
3446    Aliases = GCCRegAliases;
3447    NumAliases = llvm::array_lengthof(GCCRegAliases);
3448  }
3449};
3450
3451class Mips32EBTargetInfo : public Mips32TargetInfoBase {
3452public:
3453  Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3454    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3455                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3456  }
3457  virtual void getTargetDefines(const LangOptions &Opts,
3458                                MacroBuilder &Builder) const {
3459    DefineStd(Builder, "mips", Opts);
3460    Builder.defineMacro("_mips");
3461    DefineStd(Builder, "MIPSEB", Opts);
3462    Builder.defineMacro("_MIPSEB");
3463    Builder.defineMacro("__REGISTER_PREFIX__", "");
3464    getArchDefines(Opts, Builder);
3465  }
3466};
3467
3468class Mips32ELTargetInfo : public Mips32TargetInfoBase {
3469public:
3470  Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3471    BigEndian = false;
3472    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3473                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3474  }
3475  virtual void getTargetDefines(const LangOptions &Opts,
3476                                MacroBuilder &Builder) const {
3477    DefineStd(Builder, "mips", Opts);
3478    Builder.defineMacro("_mips");
3479    DefineStd(Builder, "MIPSEL", Opts);
3480    Builder.defineMacro("_MIPSEL");
3481    Builder.defineMacro("__REGISTER_PREFIX__", "");
3482    getArchDefines(Opts, Builder);
3483  }
3484};
3485
3486class Mips64TargetInfoBase : public MipsTargetInfoBase {
3487  virtual void SetDescriptionString(const std::string &Name) = 0;
3488public:
3489  Mips64TargetInfoBase(const std::string& triple) :
3490    MipsTargetInfoBase(triple, "n64") {
3491    LongWidth = LongAlign = 64;
3492    PointerWidth = PointerAlign = 64;
3493    LongDoubleWidth = LongDoubleAlign = 128;
3494    LongDoubleFormat = &llvm::APFloat::IEEEquad;
3495    SuitableAlign = 128;
3496  }
3497  virtual bool setABI(const std::string &Name) {
3498    SetDescriptionString(Name);
3499
3500    if (Name != "n32" && Name != "n64")
3501      return false;
3502
3503    ABI = Name;
3504
3505    if (Name == "n32") {
3506      LongWidth = LongAlign = 32;
3507      PointerWidth = PointerAlign = 32;
3508    }
3509
3510    return true;
3511  }
3512  virtual void getArchDefines(const LangOptions &Opts,
3513                              MacroBuilder &Builder) const {
3514    if (ABI == "n32") {
3515      Builder.defineMacro("__mips_n32");
3516      Builder.defineMacro("_ABIN32", "2");
3517      Builder.defineMacro("_MIPS_SIM", "_ABIN32");
3518    }
3519    else if (ABI == "n64") {
3520      Builder.defineMacro("__mips_n64");
3521      Builder.defineMacro("_ABI64", "3");
3522      Builder.defineMacro("_MIPS_SIM", "_ABI64");
3523    }
3524    else
3525      llvm_unreachable("Invalid ABI for Mips64.");
3526  }
3527  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3528                                unsigned &NumAliases) const {
3529    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3530      { { "at" },  "$1" },
3531      { { "v0" },  "$2" },
3532      { { "v1" },  "$3" },
3533      { { "a0" },  "$4" },
3534      { { "a1" },  "$5" },
3535      { { "a2" },  "$6" },
3536      { { "a3" },  "$7" },
3537      { { "a4" },  "$8" },
3538      { { "a5" },  "$9" },
3539      { { "a6" }, "$10" },
3540      { { "a7" }, "$11" },
3541      { { "t0" }, "$12" },
3542      { { "t1" }, "$13" },
3543      { { "t2" }, "$14" },
3544      { { "t3" }, "$15" },
3545      { { "s0" }, "$16" },
3546      { { "s1" }, "$17" },
3547      { { "s2" }, "$18" },
3548      { { "s3" }, "$19" },
3549      { { "s4" }, "$20" },
3550      { { "s5" }, "$21" },
3551      { { "s6" }, "$22" },
3552      { { "s7" }, "$23" },
3553      { { "t8" }, "$24" },
3554      { { "t9" }, "$25" },
3555      { { "k0" }, "$26" },
3556      { { "k1" }, "$27" },
3557      { { "gp" }, "$28" },
3558      { { "sp" }, "$29" },
3559      { { "fp" }, "$30" },
3560      { { "ra" }, "$31" }
3561    };
3562    Aliases = GCCRegAliases;
3563    NumAliases = llvm::array_lengthof(GCCRegAliases);
3564  }
3565};
3566
3567class Mips64EBTargetInfo : public Mips64TargetInfoBase {
3568  virtual void SetDescriptionString(const std::string &Name) {
3569    // Change DescriptionString only if ABI is n32.
3570    if (Name == "n32")
3571      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3572                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3573                          "v64:64:64-n32";
3574  }
3575public:
3576  Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3577    // Default ABI is n64.
3578    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3579                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3580                        "v64:64:64-n32";
3581  }
3582  virtual void getTargetDefines(const LangOptions &Opts,
3583                                MacroBuilder &Builder) const {
3584    DefineStd(Builder, "mips", Opts);
3585    Builder.defineMacro("_mips");
3586    DefineStd(Builder, "MIPSEB", Opts);
3587    Builder.defineMacro("_MIPSEB");
3588    Builder.defineMacro("__REGISTER_PREFIX__", "");
3589    getArchDefines(Opts, Builder);
3590  }
3591};
3592
3593class Mips64ELTargetInfo : public Mips64TargetInfoBase {
3594  virtual void SetDescriptionString(const std::string &Name) {
3595    // Change DescriptionString only if ABI is n32.
3596    if (Name == "n32")
3597      DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3598                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
3599                          "-v64:64:64-n32";
3600  }
3601public:
3602  Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3603    // Default ABI is n64.
3604    BigEndian = false;
3605    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3606                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3607                        "v64:64:64-n32";
3608  }
3609  virtual void getTargetDefines(const LangOptions &Opts,
3610                                MacroBuilder &Builder) const {
3611    DefineStd(Builder, "mips", Opts);
3612    Builder.defineMacro("_mips");
3613    DefineStd(Builder, "MIPSEL", Opts);
3614    Builder.defineMacro("_MIPSEL");
3615    Builder.defineMacro("__REGISTER_PREFIX__", "");
3616    getArchDefines(Opts, Builder);
3617  }
3618};
3619} // end anonymous namespace.
3620
3621namespace {
3622class PNaClTargetInfo : public TargetInfo {
3623public:
3624  PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
3625    BigEndian = false;
3626    this->UserLabelPrefix = "";
3627    this->LongAlign = 32;
3628    this->LongWidth = 32;
3629    this->PointerAlign = 32;
3630    this->PointerWidth = 32;
3631    this->IntMaxType = TargetInfo::SignedLongLong;
3632    this->UIntMaxType = TargetInfo::UnsignedLongLong;
3633    this->Int64Type = TargetInfo::SignedLongLong;
3634    this->DoubleAlign = 64;
3635    this->LongDoubleWidth = 64;
3636    this->LongDoubleAlign = 64;
3637    this->SizeType = TargetInfo::UnsignedInt;
3638    this->PtrDiffType = TargetInfo::SignedInt;
3639    this->IntPtrType = TargetInfo::SignedInt;
3640    this->RegParmMax = 2;
3641    DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
3642                        "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
3643  }
3644
3645  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3646  }
3647  virtual void getArchDefines(const LangOptions &Opts,
3648                              MacroBuilder &Builder) const {
3649    Builder.defineMacro("__le32__");
3650    Builder.defineMacro("__pnacl__");
3651  }
3652  virtual void getTargetDefines(const LangOptions &Opts,
3653                                MacroBuilder &Builder) const {
3654    DefineStd(Builder, "unix", Opts);
3655    Builder.defineMacro("__ELF__");
3656    if (Opts.POSIXThreads)
3657      Builder.defineMacro("_REENTRANT");
3658    if (Opts.CPlusPlus)
3659      Builder.defineMacro("_GNU_SOURCE");
3660
3661    Builder.defineMacro("__native_client__");
3662    getArchDefines(Opts, Builder);
3663  }
3664  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3665                                 unsigned &NumRecords) const {
3666  }
3667  virtual const char *getVAListDeclaration() const {
3668    return "typedef int __builtin_va_list[4];";
3669  }
3670  virtual void getGCCRegNames(const char * const *&Names,
3671                              unsigned &NumNames) const;
3672  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3673                                unsigned &NumAliases) const;
3674  virtual bool validateAsmConstraint(const char *&Name,
3675                                     TargetInfo::ConstraintInfo &Info) const {
3676    return false;
3677  }
3678
3679  virtual const char *getClobbers() const {
3680    return "";
3681  }
3682};
3683
3684void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
3685                                     unsigned &NumNames) const {
3686  Names = NULL;
3687  NumNames = 0;
3688}
3689
3690void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3691                                       unsigned &NumAliases) const {
3692  Aliases = NULL;
3693  NumAliases = 0;
3694}
3695} // end anonymous namespace.
3696
3697
3698//===----------------------------------------------------------------------===//
3699// Driver code
3700//===----------------------------------------------------------------------===//
3701
3702static TargetInfo *AllocateTarget(const std::string &T) {
3703  llvm::Triple Triple(T);
3704  llvm::Triple::OSType os = Triple.getOS();
3705
3706  switch (Triple.getArch()) {
3707  default:
3708    return NULL;
3709
3710  case llvm::Triple::hexagon:
3711    return new HexagonTargetInfo(T);
3712
3713  case llvm::Triple::arm:
3714  case llvm::Triple::thumb:
3715    if (Triple.isOSDarwin())
3716      return new DarwinARMTargetInfo(T);
3717
3718    switch (os) {
3719    case llvm::Triple::Linux:
3720      return new LinuxTargetInfo<ARMTargetInfo>(T);
3721    case llvm::Triple::FreeBSD:
3722      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
3723    case llvm::Triple::NetBSD:
3724      return new NetBSDTargetInfo<ARMTargetInfo>(T);
3725    case llvm::Triple::RTEMS:
3726      return new RTEMSTargetInfo<ARMTargetInfo>(T);
3727    default:
3728      return new ARMTargetInfo(T);
3729    }
3730
3731  case llvm::Triple::msp430:
3732    return new MSP430TargetInfo(T);
3733
3734  case llvm::Triple::mips:
3735    switch (os) {
3736    case llvm::Triple::Linux:
3737      return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
3738    case llvm::Triple::RTEMS:
3739      return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
3740    case llvm::Triple::FreeBSD:
3741      return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
3742    case llvm::Triple::NetBSD:
3743      return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
3744    default:
3745      return new Mips32EBTargetInfo(T);
3746    }
3747
3748  case llvm::Triple::mipsel:
3749    switch (os) {
3750    case llvm::Triple::Linux:
3751      return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
3752    case llvm::Triple::RTEMS:
3753      return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
3754    case llvm::Triple::FreeBSD:
3755      return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
3756    case llvm::Triple::NetBSD:
3757      return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
3758    default:
3759      return new Mips32ELTargetInfo(T);
3760    }
3761
3762  case llvm::Triple::mips64:
3763    switch (os) {
3764    case llvm::Triple::Linux:
3765      return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
3766    case llvm::Triple::RTEMS:
3767      return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
3768    case llvm::Triple::FreeBSD:
3769      return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
3770    case llvm::Triple::NetBSD:
3771      return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
3772    default:
3773      return new Mips64EBTargetInfo(T);
3774    }
3775
3776  case llvm::Triple::mips64el:
3777    switch (os) {
3778    case llvm::Triple::Linux:
3779      return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
3780    case llvm::Triple::RTEMS:
3781      return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
3782    case llvm::Triple::FreeBSD:
3783      return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
3784    case llvm::Triple::NetBSD:
3785      return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
3786    default:
3787      return new Mips64ELTargetInfo(T);
3788    }
3789
3790  case llvm::Triple::le32:
3791    switch (os) {
3792      case llvm::Triple::NativeClient:
3793        return new PNaClTargetInfo(T);
3794      default:
3795        return NULL;
3796    }
3797
3798  case llvm::Triple::ppc:
3799    if (Triple.isOSDarwin())
3800      return new DarwinPPC32TargetInfo(T);
3801    switch (os) {
3802    case llvm::Triple::Linux:
3803      return new LinuxTargetInfo<PPC32TargetInfo>(T);
3804    case llvm::Triple::FreeBSD:
3805      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
3806    case llvm::Triple::NetBSD:
3807      return new NetBSDTargetInfo<PPC32TargetInfo>(T);
3808    case llvm::Triple::RTEMS:
3809      return new RTEMSTargetInfo<PPC32TargetInfo>(T);
3810    default:
3811      return new PPC32TargetInfo(T);
3812    }
3813
3814  case llvm::Triple::ppc64:
3815    if (Triple.isOSDarwin())
3816      return new DarwinPPC64TargetInfo(T);
3817    switch (os) {
3818    case llvm::Triple::Linux:
3819      return new LinuxTargetInfo<PPC64TargetInfo>(T);
3820    case llvm::Triple::Lv2:
3821      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
3822    case llvm::Triple::FreeBSD:
3823      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
3824    case llvm::Triple::NetBSD:
3825      return new NetBSDTargetInfo<PPC64TargetInfo>(T);
3826    default:
3827      return new PPC64TargetInfo(T);
3828    }
3829
3830  case llvm::Triple::ptx32:
3831    return new PTX32TargetInfo(T);
3832  case llvm::Triple::ptx64:
3833    return new PTX64TargetInfo(T);
3834
3835  case llvm::Triple::mblaze:
3836    return new MBlazeTargetInfo(T);
3837
3838  case llvm::Triple::sparc:
3839    switch (os) {
3840    case llvm::Triple::Linux:
3841      return new LinuxTargetInfo<SparcV8TargetInfo>(T);
3842    case llvm::Triple::AuroraUX:
3843      return new AuroraUXSparcV8TargetInfo(T);
3844    case llvm::Triple::Solaris:
3845      return new SolarisSparcV8TargetInfo(T);
3846    case llvm::Triple::NetBSD:
3847      return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
3848    case llvm::Triple::RTEMS:
3849      return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
3850    default:
3851      return new SparcV8TargetInfo(T);
3852    }
3853
3854  // FIXME: Need a real SPU target.
3855  case llvm::Triple::cellspu:
3856    return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
3857
3858  case llvm::Triple::tce:
3859    return new TCETargetInfo(T);
3860
3861  case llvm::Triple::x86:
3862    if (Triple.isOSDarwin())
3863      return new DarwinI386TargetInfo(T);
3864
3865    switch (os) {
3866    case llvm::Triple::AuroraUX:
3867      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
3868    case llvm::Triple::Linux:
3869      return new LinuxTargetInfo<X86_32TargetInfo>(T);
3870    case llvm::Triple::DragonFly:
3871      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
3872    case llvm::Triple::NetBSD:
3873      return new NetBSDI386TargetInfo(T);
3874    case llvm::Triple::OpenBSD:
3875      return new OpenBSDI386TargetInfo(T);
3876    case llvm::Triple::FreeBSD:
3877      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
3878    case llvm::Triple::Minix:
3879      return new MinixTargetInfo<X86_32TargetInfo>(T);
3880    case llvm::Triple::Solaris:
3881      return new SolarisTargetInfo<X86_32TargetInfo>(T);
3882    case llvm::Triple::Cygwin:
3883      return new CygwinX86_32TargetInfo(T);
3884    case llvm::Triple::MinGW32:
3885      return new MinGWX86_32TargetInfo(T);
3886    case llvm::Triple::Win32:
3887      return new VisualStudioWindowsX86_32TargetInfo(T);
3888    case llvm::Triple::Haiku:
3889      return new HaikuX86_32TargetInfo(T);
3890    case llvm::Triple::RTEMS:
3891      return new RTEMSX86_32TargetInfo(T);
3892    default:
3893      return new X86_32TargetInfo(T);
3894    }
3895
3896  case llvm::Triple::x86_64:
3897    if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
3898      return new DarwinX86_64TargetInfo(T);
3899
3900    switch (os) {
3901    case llvm::Triple::AuroraUX:
3902      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
3903    case llvm::Triple::Linux:
3904      return new LinuxTargetInfo<X86_64TargetInfo>(T);
3905    case llvm::Triple::DragonFly:
3906      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
3907    case llvm::Triple::NetBSD:
3908      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
3909    case llvm::Triple::OpenBSD:
3910      return new OpenBSDX86_64TargetInfo(T);
3911    case llvm::Triple::FreeBSD:
3912      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
3913    case llvm::Triple::Solaris:
3914      return new SolarisTargetInfo<X86_64TargetInfo>(T);
3915    case llvm::Triple::MinGW32:
3916      return new MinGWX86_64TargetInfo(T);
3917    case llvm::Triple::Win32:   // This is what Triple.h supports now.
3918      return new VisualStudioWindowsX86_64TargetInfo(T);
3919    default:
3920      return new X86_64TargetInfo(T);
3921    }
3922  }
3923}
3924
3925/// CreateTargetInfo - Return the target info object for the specified target
3926/// triple.
3927TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
3928                                         TargetOptions &Opts) {
3929  llvm::Triple Triple(Opts.Triple);
3930
3931  // Construct the target
3932  llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
3933  if (!Target) {
3934    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
3935    return 0;
3936  }
3937
3938  // Set the target CPU if specified.
3939  if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
3940    Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
3941    return 0;
3942  }
3943
3944  // Set the target ABI if specified.
3945  if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
3946    Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
3947    return 0;
3948  }
3949
3950  // Set the target C++ ABI.
3951  if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
3952    Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
3953    return 0;
3954  }
3955
3956  // Compute the default target features, we need the target to handle this
3957  // because features may have dependencies on one another.
3958  llvm::StringMap<bool> Features;
3959  Target->getDefaultFeatures(Features);
3960
3961  // Apply the user specified deltas.
3962  // First the enables.
3963  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
3964         ie = Opts.Features.end(); it != ie; ++it) {
3965    const char *Name = it->c_str();
3966
3967    if (Name[0] != '+')
3968      continue;
3969
3970    // Apply the feature via the target.
3971    if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
3972      Diags.Report(diag::err_target_invalid_feature) << Name;
3973      return 0;
3974    }
3975  }
3976
3977  // Then the disables.
3978  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
3979         ie = Opts.Features.end(); it != ie; ++it) {
3980    const char *Name = it->c_str();
3981
3982    if (Name[0] == '+')
3983      continue;
3984
3985    // Apply the feature via the target.
3986    if (Name[0] != '-' ||
3987        !Target->setFeatureEnabled(Features, Name + 1, false)) {
3988      Diags.Report(diag::err_target_invalid_feature) << Name;
3989      return 0;
3990    }
3991  }
3992
3993  // Add the features to the compile options.
3994  //
3995  // FIXME: If we are completely confident that we have the right set, we only
3996  // need to pass the minuses.
3997  Opts.Features.clear();
3998  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
3999         ie = Features.end(); it != ie; ++it)
4000    Opts.Features.push_back(std::string(it->second ? "+" : "-") +
4001                            it->first().str());
4002  Target->HandleTargetFeatures(Opts.Features);
4003
4004  return Target.take();
4005}
4006