Targets.cpp revision 636e26e0f3c6aa352104864d3cc245789957dca2 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include <algorithm>
30using namespace clang;
31
32//===----------------------------------------------------------------------===//
33//  Common code shared among targets.
34//===----------------------------------------------------------------------===//
35
36/// DefineStd - Define a macro name and standard variants.  For example if
37/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
38/// when in GNU mode.
39static void DefineStd(MacroBuilder &Builder, llvm::StringRef MacroName,
40                      const LangOptions &Opts) {
41  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
42
43  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
44  // in the user's namespace.
45  if (Opts.GNUMode)
46    Builder.defineMacro(MacroName);
47
48  // Define __unix.
49  Builder.defineMacro("__" + MacroName);
50
51  // Define __unix__.
52  Builder.defineMacro("__" + MacroName + "__");
53}
54
55//===----------------------------------------------------------------------===//
56// Defines specific to certain operating systems.
57//===----------------------------------------------------------------------===//
58
59namespace {
60template<typename TgtInfo>
61class OSTargetInfo : public TgtInfo {
62protected:
63  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
64                            MacroBuilder &Builder) const=0;
65public:
66  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
67  virtual void getTargetDefines(const LangOptions &Opts,
68                                MacroBuilder &Builder) const {
69    TgtInfo::getTargetDefines(Opts, Builder);
70    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
71  }
72
73};
74} // end anonymous namespace
75
76
77static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
78                             const llvm::Triple &Triple) {
79  Builder.defineMacro("__APPLE_CC__", "5621");
80  Builder.defineMacro("__APPLE__");
81  Builder.defineMacro("__MACH__");
82  Builder.defineMacro("OBJC_NEW_PROPERTIES");
83
84  // __weak is always defined, for use in blocks and with objc pointers.
85  Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
86
87  // Darwin defines __strong even in C mode (just to nothing).
88  if (!Opts.ObjC1 || Opts.getGCMode() == LangOptions::NonGC)
89    Builder.defineMacro("__strong", "");
90  else
91    Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
92
93  if (Opts.Static)
94    Builder.defineMacro("__STATIC__");
95  else
96    Builder.defineMacro("__DYNAMIC__");
97
98  if (Opts.POSIXThreads)
99    Builder.defineMacro("_REENTRANT");
100
101  // Get the OS version number from the triple.
102  unsigned Maj, Min, Rev;
103
104  // If no version was given, default to to 10.4.0, for simplifying tests.
105  if (Triple.getOSName() == "darwin") {
106    Min = Rev = 0;
107    Maj = 8;
108  } else
109    Triple.getDarwinNumber(Maj, Min, Rev);
110
111  // Set the appropriate OS version define.
112  if (Triple.getEnvironmentName() == "iphoneos") {
113    assert(Maj < 10 && Min < 99 && Rev < 99 && "Invalid version!");
114    char Str[6];
115    Str[0] = '0' + Maj;
116    Str[1] = '0' + (Min / 10);
117    Str[2] = '0' + (Min % 10);
118    Str[3] = '0' + (Rev / 10);
119    Str[4] = '0' + (Rev % 10);
120    Str[5] = '\0';
121    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
122  } else {
123    // For historical reasons that make little sense, the version passed here is
124    // the "darwin" version, which drops the 10 and offsets by 4.
125    Rev = Min;
126    Min = Maj - 4;
127    Maj = 10;
128
129    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
130    assert(Maj < 99 && Min < 10 && Rev < 10 && "Invalid version!");
131    char Str[5];
132    Str[0] = '0' + (Maj / 10);
133    Str[1] = '0' + (Maj % 10);
134    Str[2] = '0' + Min;
135    Str[3] = '0' + Rev;
136    Str[4] = '\0';
137    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
138  }
139}
140
141namespace {
142template<typename Target>
143class DarwinTargetInfo : public OSTargetInfo<Target> {
144protected:
145  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
146                            MacroBuilder &Builder) const {
147    getDarwinDefines(Builder, Opts, Triple);
148  }
149
150public:
151  DarwinTargetInfo(const std::string& triple) :
152    OSTargetInfo<Target>(triple) {
153      this->TLSSupported = llvm::Triple(triple).getDarwinMajorNumber() > 10;
154    }
155
156  virtual std::string isValidSectionSpecifier(llvm::StringRef SR) const {
157    // Let MCSectionMachO validate this.
158    llvm::StringRef Segment, Section;
159    unsigned TAA, StubSize;
160    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
161                                                       TAA, StubSize);
162  }
163
164  virtual const char *getStaticInitSectionSpecifier() const {
165    // FIXME: We should return 0 when building kexts.
166    return "__TEXT,__StaticInit,regular,pure_instructions";
167  }
168
169};
170
171
172// DragonFlyBSD Target
173template<typename Target>
174class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
175protected:
176  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
177                            MacroBuilder &Builder) const {
178    // DragonFly defines; list based off of gcc output
179    Builder.defineMacro("__DragonFly__");
180    Builder.defineMacro("__DragonFly_cc_version", "100001");
181    Builder.defineMacro("__ELF__");
182    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
183    Builder.defineMacro("__tune_i386__");
184    DefineStd(Builder, "unix", Opts);
185  }
186public:
187  DragonFlyBSDTargetInfo(const std::string &triple)
188    : OSTargetInfo<Target>(triple) {}
189};
190
191// FreeBSD Target
192template<typename Target>
193class FreeBSDTargetInfo : public OSTargetInfo<Target> {
194protected:
195  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
196                            MacroBuilder &Builder) const {
197    // FreeBSD defines; list based off of gcc output
198
199    // FIXME: Move version number handling to llvm::Triple.
200    llvm::StringRef Release = Triple.getOSName().substr(strlen("freebsd"), 1);
201
202    Builder.defineMacro("__FreeBSD__", Release);
203    Builder.defineMacro("__FreeBSD_cc_version", Release + "00001");
204    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
205    DefineStd(Builder, "unix", Opts);
206    Builder.defineMacro("__ELF__");
207  }
208public:
209  FreeBSDTargetInfo(const std::string &triple)
210    : OSTargetInfo<Target>(triple) {
211      this->UserLabelPrefix = "";
212    }
213};
214
215// Minix Target
216template<typename Target>
217class MinixTargetInfo : public OSTargetInfo<Target> {
218protected:
219  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
220                            MacroBuilder &Builder) const {
221    // Minix defines
222
223    Builder.defineMacro("__minix", "3");
224    Builder.defineMacro("_EM_WSIZE", "4");
225    Builder.defineMacro("_EM_PSIZE", "4");
226    Builder.defineMacro("_EM_SSIZE", "2");
227    Builder.defineMacro("_EM_LSIZE", "4");
228    Builder.defineMacro("_EM_FSIZE", "4");
229    Builder.defineMacro("_EM_DSIZE", "8");
230    DefineStd(Builder, "unix", Opts);
231  }
232public:
233  MinixTargetInfo(const std::string &triple)
234    : OSTargetInfo<Target>(triple) {
235      this->UserLabelPrefix = "";
236    }
237};
238
239// Linux target
240template<typename Target>
241class LinuxTargetInfo : public OSTargetInfo<Target> {
242protected:
243  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
244                            MacroBuilder &Builder) const {
245    // Linux defines; list based off of gcc output
246    DefineStd(Builder, "unix", Opts);
247    DefineStd(Builder, "linux", Opts);
248    Builder.defineMacro("__gnu_linux__");
249    Builder.defineMacro("__ELF__");
250    if (Opts.POSIXThreads)
251      Builder.defineMacro("_REENTRANT");
252    if (Opts.CPlusPlus)
253      Builder.defineMacro("_GNU_SOURCE");
254  }
255public:
256  LinuxTargetInfo(const std::string& triple)
257    : OSTargetInfo<Target>(triple) {
258    this->UserLabelPrefix = "";
259  }
260};
261
262// NetBSD Target
263template<typename Target>
264class NetBSDTargetInfo : public OSTargetInfo<Target> {
265protected:
266  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
267                            MacroBuilder &Builder) const {
268    // NetBSD defines; list based off of gcc output
269    Builder.defineMacro("__NetBSD__");
270    Builder.defineMacro("__unix__");
271    Builder.defineMacro("__ELF__");
272    if (Opts.POSIXThreads)
273      Builder.defineMacro("_POSIX_THREADS");
274  }
275public:
276  NetBSDTargetInfo(const std::string &triple)
277    : OSTargetInfo<Target>(triple) {
278      this->UserLabelPrefix = "";
279    }
280};
281
282// OpenBSD Target
283template<typename Target>
284class OpenBSDTargetInfo : public OSTargetInfo<Target> {
285protected:
286  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
287                            MacroBuilder &Builder) const {
288    // OpenBSD defines; list based off of gcc output
289
290    Builder.defineMacro("__OpenBSD__");
291    DefineStd(Builder, "unix", Opts);
292    Builder.defineMacro("__ELF__");
293    if (Opts.POSIXThreads)
294      Builder.defineMacro("_POSIX_THREADS");
295  }
296public:
297  OpenBSDTargetInfo(const std::string &triple)
298    : OSTargetInfo<Target>(triple) {}
299};
300
301// PSP Target
302template<typename Target>
303class PSPTargetInfo : public OSTargetInfo<Target> {
304protected:
305  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
306                            MacroBuilder &Builder) const {
307    // PSP defines; list based on the output of the pspdev gcc toolchain.
308    Builder.defineMacro("PSP");
309    Builder.defineMacro("_PSP");
310    Builder.defineMacro("__psp__");
311    Builder.defineMacro("__ELF__");
312  }
313public:
314  PSPTargetInfo(const std::string& triple)
315    : OSTargetInfo<Target>(triple) {
316    this->UserLabelPrefix = "";
317  }
318};
319
320// PS3 PPU Target
321template<typename Target>
322class PS3PPUTargetInfo : public OSTargetInfo<Target> {
323protected:
324  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
325                            MacroBuilder &Builder) const {
326    // PS3 PPU defines.
327    Builder.defineMacro("__PPC__");
328    Builder.defineMacro("__PPU__");
329    Builder.defineMacro("__CELLOS_LV2__");
330    Builder.defineMacro("__ELF__");
331    Builder.defineMacro("__LP32__");
332    Builder.defineMacro("_ARCH_PPC64");
333    Builder.defineMacro("__powerpc64__");
334  }
335public:
336  PS3PPUTargetInfo(const std::string& triple)
337    : OSTargetInfo<Target>(triple) {
338    this->UserLabelPrefix = "";
339    this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32;
340    this->IntMaxType = TargetInfo::SignedLongLong;
341    this->UIntMaxType = TargetInfo::UnsignedLongLong;
342    this->Int64Type = TargetInfo::SignedLongLong;
343    this->SizeType = TargetInfo::UnsignedInt;
344    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
345                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
346  }
347};
348
349// FIXME: Need a real SPU target.
350// PS3 SPU Target
351template<typename Target>
352class PS3SPUTargetInfo : public OSTargetInfo<Target> {
353protected:
354  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
355                            MacroBuilder &Builder) const {
356    // PS3 PPU defines.
357    Builder.defineMacro("__SPU__");
358    Builder.defineMacro("__ELF__");
359  }
360public:
361  PS3SPUTargetInfo(const std::string& triple)
362    : OSTargetInfo<Target>(triple) {
363    this->UserLabelPrefix = "";
364  }
365};
366
367// AuroraUX target
368template<typename Target>
369class AuroraUXTargetInfo : public OSTargetInfo<Target> {
370protected:
371  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
372                            MacroBuilder &Builder) const {
373    DefineStd(Builder, "sun", Opts);
374    DefineStd(Builder, "unix", Opts);
375    Builder.defineMacro("__ELF__");
376    Builder.defineMacro("__svr4__");
377    Builder.defineMacro("__SVR4");
378  }
379public:
380  AuroraUXTargetInfo(const std::string& triple)
381    : OSTargetInfo<Target>(triple) {
382    this->UserLabelPrefix = "";
383    this->WCharType = this->SignedLong;
384    // FIXME: WIntType should be SignedLong
385  }
386};
387
388// Solaris target
389template<typename Target>
390class SolarisTargetInfo : public OSTargetInfo<Target> {
391protected:
392  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
393                            MacroBuilder &Builder) const {
394    DefineStd(Builder, "sun", Opts);
395    DefineStd(Builder, "unix", Opts);
396    Builder.defineMacro("__ELF__");
397    Builder.defineMacro("__svr4__");
398    Builder.defineMacro("__SVR4");
399  }
400public:
401  SolarisTargetInfo(const std::string& triple)
402    : OSTargetInfo<Target>(triple) {
403    this->UserLabelPrefix = "";
404    this->WCharType = this->SignedLong;
405    // FIXME: WIntType should be SignedLong
406  }
407};
408
409// Windows target
410template<typename Target>
411class WindowsTargetInfo : public OSTargetInfo<Target> {
412protected:
413  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
414                            MacroBuilder &Builder) const {
415    if (Opts.CPlusPlus) {
416      if (Opts.RTTI)
417        Builder.defineMacro("_CPPRTTI");
418
419      if (Opts.Exceptions)
420        Builder.defineMacro("_CPPUNWIND");
421    }
422
423    if (!Opts.CharIsSigned)
424      Builder.defineMacro("_CHAR_UNSIGNED");
425
426    // FIXME: POSIXThreads isn't exactly the option this should be defined for,
427    //        but it works for now.
428    if (Opts.POSIXThreads)
429      Builder.defineMacro("_MT");
430
431    if (Opts.Microsoft) {
432      Builder.defineMacro("_MSC_EXTENSIONS");
433
434      // Pretend to be the compiler that ships with Visual Studio 2003.
435      Builder.defineMacro("_MSC_VER", llvm::Twine(1300));
436
437      if (Opts.CPlusPlus0x) {
438        Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
439        Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
440        Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
441      }
442    }
443
444    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
445    Builder.defineMacro("_WIN32");
446  }
447
448  virtual const char *getVAListDeclaration() const {
449    return "typedef char* __builtin_va_list;";
450  }
451public:
452  WindowsTargetInfo(const std::string &triple)
453    : OSTargetInfo<Target>(triple) {}
454};
455
456} // end anonymous namespace.
457
458//===----------------------------------------------------------------------===//
459// Specific target implementations.
460//===----------------------------------------------------------------------===//
461
462namespace {
463// PPC abstract base class
464class PPCTargetInfo : public TargetInfo {
465  static const Builtin::Info BuiltinInfo[];
466  static const char * const GCCRegNames[];
467  static const TargetInfo::GCCRegAlias GCCRegAliases[];
468
469public:
470  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {}
471
472  virtual void getTargetBuiltins(const Builtin::Info *&Records,
473                                 unsigned &NumRecords) const {
474    Records = BuiltinInfo;
475    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
476  }
477
478  virtual void getTargetDefines(const LangOptions &Opts,
479                                MacroBuilder &Builder) const;
480
481  virtual const char *getVAListDeclaration() const {
482    return "typedef char* __builtin_va_list;";
483    // This is the right definition for ABI/V4: System V.4/eabi.
484    /*return "typedef struct __va_list_tag {"
485           "  unsigned char gpr;"
486           "  unsigned char fpr;"
487           "  unsigned short reserved;"
488           "  void* overflow_arg_area;"
489           "  void* reg_save_area;"
490           "} __builtin_va_list[1];";*/
491  }
492  virtual void getGCCRegNames(const char * const *&Names,
493                              unsigned &NumNames) const;
494  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
495                                unsigned &NumAliases) const;
496  virtual bool validateAsmConstraint(const char *&Name,
497                                     TargetInfo::ConstraintInfo &Info) const {
498    switch (*Name) {
499    default: return false;
500    case 'O': // Zero
501      break;
502    case 'b': // Base register
503    case 'f': // Floating point register
504      Info.setAllowsRegister();
505      break;
506    // FIXME: The following are added to allow parsing.
507    // I just took a guess at what the actions should be.
508    // Also, is more specific checking needed?  I.e. specific registers?
509    case 'd': // Floating point register (containing 64-bit value)
510    case 'v': // Altivec vector register
511      Info.setAllowsRegister();
512      break;
513    case 'w':
514      switch (Name[1]) {
515        case 'd':// VSX vector register to hold vector double data
516        case 'f':// VSX vector register to hold vector float data
517        case 's':// VSX vector register to hold scalar float data
518        case 'a':// Any VSX register
519          break;
520        default:
521          return false;
522      }
523      Info.setAllowsRegister();
524      Name++; // Skip over 'w'.
525      break;
526    case 'h': // `MQ', `CTR', or `LINK' register
527    case 'q': // `MQ' register
528    case 'c': // `CTR' register
529    case 'l': // `LINK' register
530    case 'x': // `CR' register (condition register) number 0
531    case 'y': // `CR' register (condition register)
532    case 'z': // `XER[CA]' carry bit (part of the XER register)
533      Info.setAllowsRegister();
534      break;
535    case 'I': // Signed 16-bit constant
536    case 'J': // Unsigned 16-bit constant shifted left 16 bits
537              //  (use `L' instead for SImode constants)
538    case 'K': // Unsigned 16-bit constant
539    case 'L': // Signed 16-bit constant shifted left 16 bits
540    case 'M': // Constant larger than 31
541    case 'N': // Exact power of 2
542    case 'P': // Constant whose negation is a signed 16-bit constant
543    case 'G': // Floating point constant that can be loaded into a
544              // register with one instruction per word
545    case 'H': // Integer/Floating point constant that can be loaded
546              // into a register using three instructions
547      break;
548    case 'm': // Memory operand. Note that on PowerPC targets, m can
549              // include addresses that update the base register. It
550              // is therefore only safe to use `m' in an asm statement
551              // if that asm statement accesses the operand exactly once.
552              // The asm statement must also use `%U<opno>' as a
553              // placeholder for the "update" flag in the corresponding
554              // load or store instruction. For example:
555              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
556              // is correct but:
557              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
558              // is not. Use es rather than m if you don't want the base
559              // register to be updated.
560    case 'e':
561      if (Name[1] != 's')
562          return false;
563              // es: A "stable" memory operand; that is, one which does not
564              // include any automodification of the base register. Unlike
565              // `m', this constraint can be used in asm statements that
566              // might access the operand several times, or that might not
567              // access it at all.
568      Info.setAllowsMemory();
569      Name++; // Skip over 'e'.
570      break;
571    case 'Q': // Memory operand that is an offset from a register (it is
572              // usually better to use `m' or `es' in asm statements)
573    case 'Z': // Memory operand that is an indexed or indirect from a
574              // register (it is usually better to use `m' or `es' in
575              // asm statements)
576      Info.setAllowsMemory();
577      Info.setAllowsRegister();
578      break;
579    case 'R': // AIX TOC entry
580    case 'a': // Address operand that is an indexed or indirect from a
581              // register (`p' is preferable for asm statements)
582    case 'S': // Constant suitable as a 64-bit mask operand
583    case 'T': // Constant suitable as a 32-bit mask operand
584    case 'U': // System V Release 4 small data area reference
585    case 't': // AND masks that can be performed by two rldic{l, r}
586              // instructions
587    case 'W': // Vector constant that does not require memory
588    case 'j': // Vector constant that is all zeros.
589      break;
590    // End FIXME.
591    }
592    return true;
593  }
594  virtual const char *getClobbers() const {
595    return "";
596  }
597};
598
599const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
600#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, false },
601#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER, false },
602#include "clang/Basic/BuiltinsPPC.def"
603};
604
605
606/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
607/// #defines that are not tied to a specific subtarget.
608void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
609                                     MacroBuilder &Builder) const {
610  // Target identification.
611  Builder.defineMacro("__ppc__");
612  Builder.defineMacro("_ARCH_PPC");
613  Builder.defineMacro("__powerpc__");
614  Builder.defineMacro("__POWERPC__");
615  if (PointerWidth == 64) {
616    Builder.defineMacro("_ARCH_PPC64");
617    Builder.defineMacro("_LP64");
618    Builder.defineMacro("__LP64__");
619    Builder.defineMacro("__powerpc64__");
620    Builder.defineMacro("__ppc64__");
621  } else {
622    Builder.defineMacro("__ppc__");
623  }
624
625  // Target properties.
626  Builder.defineMacro("_BIG_ENDIAN");
627  Builder.defineMacro("__BIG_ENDIAN__");
628
629  // Subtarget options.
630  Builder.defineMacro("__NATURAL_ALIGNMENT__");
631  Builder.defineMacro("__REGISTER_PREFIX__", "");
632
633  // FIXME: Should be controlled by command line option.
634  Builder.defineMacro("__LONG_DOUBLE_128__");
635
636  if (Opts.AltiVec) {
637    Builder.defineMacro("__VEC__", "10206");
638    Builder.defineMacro("__ALTIVEC__");
639  }
640}
641
642
643const char * const PPCTargetInfo::GCCRegNames[] = {
644  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
645  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
646  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
647  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
648  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
649  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
650  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
651  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
652  "mq", "lr", "ctr", "ap",
653  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
654  "xer",
655  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
656  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
657  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
658  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
659  "vrsave", "vscr",
660  "spe_acc", "spefscr",
661  "sfp"
662};
663
664void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
665                                   unsigned &NumNames) const {
666  Names = GCCRegNames;
667  NumNames = llvm::array_lengthof(GCCRegNames);
668}
669
670const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
671  // While some of these aliases do map to different registers
672  // they still share the same register name.
673  { { "0" }, "r0" },
674  { { "1"}, "r1" },
675  { { "2" }, "r2" },
676  { { "3" }, "r3" },
677  { { "4" }, "r4" },
678  { { "5" }, "r5" },
679  { { "6" }, "r6" },
680  { { "7" }, "r7" },
681  { { "8" }, "r8" },
682  { { "9" }, "r9" },
683  { { "10" }, "r10" },
684  { { "11" }, "r11" },
685  { { "12" }, "r12" },
686  { { "13" }, "r13" },
687  { { "14" }, "r14" },
688  { { "15" }, "r15" },
689  { { "16" }, "r16" },
690  { { "17" }, "r17" },
691  { { "18" }, "r18" },
692  { { "19" }, "r19" },
693  { { "20" }, "r20" },
694  { { "21" }, "r21" },
695  { { "22" }, "r22" },
696  { { "23" }, "r23" },
697  { { "24" }, "r24" },
698  { { "25" }, "r25" },
699  { { "26" }, "r26" },
700  { { "27" }, "r27" },
701  { { "28" }, "r28" },
702  { { "29" }, "r29" },
703  { { "30" }, "r30" },
704  { { "31" }, "r31" },
705  { { "fr0" }, "f0" },
706  { { "fr1" }, "f1" },
707  { { "fr2" }, "f2" },
708  { { "fr3" }, "f3" },
709  { { "fr4" }, "f4" },
710  { { "fr5" }, "f5" },
711  { { "fr6" }, "f6" },
712  { { "fr7" }, "f7" },
713  { { "fr8" }, "f8" },
714  { { "fr9" }, "f9" },
715  { { "fr10" }, "f10" },
716  { { "fr11" }, "f11" },
717  { { "fr12" }, "f12" },
718  { { "fr13" }, "f13" },
719  { { "fr14" }, "f14" },
720  { { "fr15" }, "f15" },
721  { { "fr16" }, "f16" },
722  { { "fr17" }, "f17" },
723  { { "fr18" }, "f18" },
724  { { "fr19" }, "f19" },
725  { { "fr20" }, "f20" },
726  { { "fr21" }, "f21" },
727  { { "fr22" }, "f22" },
728  { { "fr23" }, "f23" },
729  { { "fr24" }, "f24" },
730  { { "fr25" }, "f25" },
731  { { "fr26" }, "f26" },
732  { { "fr27" }, "f27" },
733  { { "fr28" }, "f28" },
734  { { "fr29" }, "f29" },
735  { { "fr30" }, "f30" },
736  { { "fr31" }, "f31" },
737  { { "cc" }, "cr0" },
738};
739
740void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
741                                     unsigned &NumAliases) const {
742  Aliases = GCCRegAliases;
743  NumAliases = llvm::array_lengthof(GCCRegAliases);
744}
745} // end anonymous namespace.
746
747namespace {
748class PPC32TargetInfo : public PPCTargetInfo {
749public:
750  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
751    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
752                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
753
754    if (getTriple().getOS() == llvm::Triple::FreeBSD)
755        this->SizeType = TargetInfo::UnsignedInt;
756  }
757};
758} // end anonymous namespace.
759
760namespace {
761class PPC64TargetInfo : public PPCTargetInfo {
762public:
763  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
764    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
765    IntMaxType = SignedLong;
766    UIntMaxType = UnsignedLong;
767    Int64Type = SignedLong;
768    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
769                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
770  }
771};
772} // end anonymous namespace.
773
774
775namespace {
776class DarwinPPCTargetInfo :
777  public DarwinTargetInfo<PPCTargetInfo> {
778public:
779  DarwinPPCTargetInfo(const std::string& triple)
780    : DarwinTargetInfo<PPCTargetInfo>(triple) {
781    HasAlignMac68kSupport = true;
782  }
783};
784
785class DarwinPPC64TargetInfo :
786  public DarwinTargetInfo<PPC64TargetInfo> {
787public:
788  DarwinPPC64TargetInfo(const std::string& triple)
789    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
790    HasAlignMac68kSupport = true;
791  }
792};
793} // end anonymous namespace.
794
795namespace {
796// MBlaze abstract base class
797class MBlazeTargetInfo : public TargetInfo {
798  static const char * const GCCRegNames[];
799  static const TargetInfo::GCCRegAlias GCCRegAliases[];
800
801public:
802  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
803    DescriptionString = "E-p:32:32-i8:8:8-i16:16:16-i64:32:32-f64:32:32-"
804                        "v64:32:32-v128:32:32-n32";
805  }
806
807  virtual void getTargetBuiltins(const Builtin::Info *&Records,
808                                 unsigned &NumRecords) const {
809    // FIXME: Implement.
810    Records = 0;
811    NumRecords = 0;
812  }
813
814  virtual void getTargetDefines(const LangOptions &Opts,
815                                MacroBuilder &Builder) const;
816
817  virtual const char *getVAListDeclaration() const {
818    return "typedef char* __builtin_va_list;";
819  }
820  virtual const char *getTargetPrefix() const {
821    return "mblaze";
822  }
823  virtual void getGCCRegNames(const char * const *&Names,
824                              unsigned &NumNames) const;
825  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
826                                unsigned &NumAliases) const;
827  virtual bool validateAsmConstraint(const char *&Name,
828                                     TargetInfo::ConstraintInfo &Info) const {
829    switch (*Name) {
830    default: return false;
831    case 'O': // Zero
832      return true;
833    case 'b': // Base register
834    case 'f': // Floating point register
835      Info.setAllowsRegister();
836      return true;
837    }
838  }
839  virtual const char *getClobbers() const {
840    return "";
841  }
842};
843
844/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
845/// #defines that are not tied to a specific subtarget.
846void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
847                                     MacroBuilder &Builder) const {
848  // Target identification.
849  Builder.defineMacro("__microblaze__");
850  Builder.defineMacro("_ARCH_MICROBLAZE");
851  Builder.defineMacro("__MICROBLAZE__");
852
853  // Target properties.
854  Builder.defineMacro("_BIG_ENDIAN");
855  Builder.defineMacro("__BIG_ENDIAN__");
856
857  // Subtarget options.
858  Builder.defineMacro("__REGISTER_PREFIX__", "");
859}
860
861
862const char * const MBlazeTargetInfo::GCCRegNames[] = {
863  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
864  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
865  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
866  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
867  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
868  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
869  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
870  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
871  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
872  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
873};
874
875void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
876                                   unsigned &NumNames) const {
877  Names = GCCRegNames;
878  NumNames = llvm::array_lengthof(GCCRegNames);
879}
880
881const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
882  { {"f0"},  "r0" },
883  { {"f1"},  "r1" },
884  { {"f2"},  "r2" },
885  { {"f3"},  "r3" },
886  { {"f4"},  "r4" },
887  { {"f5"},  "r5" },
888  { {"f6"},  "r6" },
889  { {"f7"},  "r7" },
890  { {"f8"},  "r8" },
891  { {"f9"},  "r9" },
892  { {"f10"}, "r10" },
893  { {"f11"}, "r11" },
894  { {"f12"}, "r12" },
895  { {"f13"}, "r13" },
896  { {"f14"}, "r14" },
897  { {"f15"}, "r15" },
898  { {"f16"}, "r16" },
899  { {"f17"}, "r17" },
900  { {"f18"}, "r18" },
901  { {"f19"}, "r19" },
902  { {"f20"}, "r20" },
903  { {"f21"}, "r21" },
904  { {"f22"}, "r22" },
905  { {"f23"}, "r23" },
906  { {"f24"}, "r24" },
907  { {"f25"}, "r25" },
908  { {"f26"}, "r26" },
909  { {"f27"}, "r27" },
910  { {"f28"}, "r28" },
911  { {"f29"}, "r29" },
912  { {"f30"}, "r30" },
913  { {"f31"}, "r31" },
914};
915
916void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
917                                     unsigned &NumAliases) const {
918  Aliases = GCCRegAliases;
919  NumAliases = llvm::array_lengthof(GCCRegAliases);
920}
921} // end anonymous namespace.
922
923namespace {
924// Namespace for x86 abstract base class
925const Builtin::Info BuiltinInfo[] = {
926#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, false },
927#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER, false },
928#include "clang/Basic/BuiltinsX86.def"
929};
930
931static const char* const GCCRegNames[] = {
932  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
933  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
934  "argp", "flags", "fspr", "dirflag", "frame",
935  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
936  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
937  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
938  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"
939};
940
941const TargetInfo::GCCRegAlias GCCRegAliases[] = {
942  { { "al", "ah", "eax", "rax" }, "ax" },
943  { { "bl", "bh", "ebx", "rbx" }, "bx" },
944  { { "cl", "ch", "ecx", "rcx" }, "cx" },
945  { { "dl", "dh", "edx", "rdx" }, "dx" },
946  { { "esi", "rsi" }, "si" },
947  { { "edi", "rdi" }, "di" },
948  { { "esp", "rsp" }, "sp" },
949  { { "ebp", "rbp" }, "bp" },
950};
951
952// X86 target abstract base class; x86-32 and x86-64 are very close, so
953// most of the implementation can be shared.
954class X86TargetInfo : public TargetInfo {
955  enum X86SSEEnum {
956    NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
957  } SSELevel;
958  enum AMD3DNowEnum {
959    NoAMD3DNow, AMD3DNow, AMD3DNowAthlon
960  } AMD3DNowLevel;
961
962  bool HasAES;
963  bool HasAVX;
964
965public:
966  X86TargetInfo(const std::string& triple)
967    : TargetInfo(triple), SSELevel(NoMMXSSE), AMD3DNowLevel(NoAMD3DNow),
968      HasAES(false), HasAVX(false) {
969    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
970  }
971  virtual void getTargetBuiltins(const Builtin::Info *&Records,
972                                 unsigned &NumRecords) const {
973    Records = BuiltinInfo;
974    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
975  }
976  virtual void getGCCRegNames(const char * const *&Names,
977                              unsigned &NumNames) const {
978    Names = GCCRegNames;
979    NumNames = llvm::array_lengthof(GCCRegNames);
980  }
981  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
982                                unsigned &NumAliases) const {
983    Aliases = GCCRegAliases;
984    NumAliases = llvm::array_lengthof(GCCRegAliases);
985  }
986  virtual bool validateAsmConstraint(const char *&Name,
987                                     TargetInfo::ConstraintInfo &info) const;
988  virtual std::string convertConstraint(const char Constraint) const;
989  virtual const char *getClobbers() const {
990    return "~{dirflag},~{fpsr},~{flags}";
991  }
992  virtual void getTargetDefines(const LangOptions &Opts,
993                                MacroBuilder &Builder) const;
994  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
995                                 const std::string &Name,
996                                 bool Enabled) const;
997  virtual void getDefaultFeatures(const std::string &CPU,
998                                  llvm::StringMap<bool> &Features) const;
999  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1000};
1001
1002void X86TargetInfo::getDefaultFeatures(const std::string &CPU,
1003                                       llvm::StringMap<bool> &Features) const {
1004  // FIXME: This should not be here.
1005  Features["3dnow"] = false;
1006  Features["3dnowa"] = false;
1007  Features["mmx"] = false;
1008  Features["sse"] = false;
1009  Features["sse2"] = false;
1010  Features["sse3"] = false;
1011  Features["ssse3"] = false;
1012  Features["sse41"] = false;
1013  Features["sse42"] = false;
1014  Features["aes"] = false;
1015  Features["avx"] = false;
1016
1017  // LLVM does not currently recognize this.
1018  // Features["sse4a"] = false;
1019
1020  // FIXME: This *really* should not be here.
1021
1022  // X86_64 always has SSE2.
1023  if (PointerWidth == 64)
1024    Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1025
1026  if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" ||
1027      CPU == "pentium" || CPU == "i686" || CPU == "pentiumpro")
1028    ;
1029  else if (CPU == "pentium-mmx" || CPU == "pentium2")
1030    setFeatureEnabled(Features, "mmx", true);
1031  else if (CPU == "pentium3")
1032    setFeatureEnabled(Features, "sse", true);
1033  else if (CPU == "pentium-m" || CPU == "pentium4" || CPU == "x86-64")
1034    setFeatureEnabled(Features, "sse2", true);
1035  else if (CPU == "yonah" || CPU == "prescott" || CPU == "nocona")
1036    setFeatureEnabled(Features, "sse3", true);
1037  else if (CPU == "core2")
1038    setFeatureEnabled(Features, "ssse3", true);
1039  else if (CPU == "penryn") {
1040    setFeatureEnabled(Features, "sse4", true);
1041    Features["sse42"] = false;
1042  } else if (CPU == "atom")
1043    setFeatureEnabled(Features, "sse3", true);
1044  else if (CPU == "corei7") {
1045    setFeatureEnabled(Features, "sse4", true);
1046    setFeatureEnabled(Features, "aes", true);
1047  }
1048  else if (CPU == "k6" || CPU == "winchip-c6")
1049    setFeatureEnabled(Features, "mmx", true);
1050  else if (CPU == "k6-2" || CPU == "k6-3" || CPU == "athlon" ||
1051           CPU == "athlon-tbird" || CPU == "winchip2" || CPU == "c3") {
1052    setFeatureEnabled(Features, "mmx", true);
1053    setFeatureEnabled(Features, "3dnow", true);
1054  } else if (CPU == "athlon-4" || CPU == "athlon-xp" || CPU == "athlon-mp") {
1055    setFeatureEnabled(Features, "sse", true);
1056    setFeatureEnabled(Features, "3dnowa", true);
1057  } else if (CPU == "k8" || CPU == "opteron" || CPU == "athlon64" ||
1058           CPU == "athlon-fx") {
1059    setFeatureEnabled(Features, "sse2", true);
1060    setFeatureEnabled(Features, "3dnowa", true);
1061  } else if (CPU == "c3-2")
1062    setFeatureEnabled(Features, "sse", true);
1063}
1064
1065bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1066                                      const std::string &Name,
1067                                      bool Enabled) const {
1068  // FIXME: This *really* should not be here.  We need some way of translating
1069  // options into llvm subtarget features.
1070  if (!Features.count(Name) &&
1071      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1072    return false;
1073
1074  if (Enabled) {
1075    if (Name == "mmx")
1076      Features["mmx"] = true;
1077    else if (Name == "sse")
1078      Features["mmx"] = Features["sse"] = true;
1079    else if (Name == "sse2")
1080      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1081    else if (Name == "sse3")
1082      Features["mmx"] = Features["sse"] = Features["sse2"] =
1083        Features["sse3"] = true;
1084    else if (Name == "ssse3")
1085      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1086        Features["ssse3"] = true;
1087    else if (Name == "sse4" || Name == "sse4.2")
1088      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1089        Features["ssse3"] = Features["sse41"] = Features["sse42"] = true;
1090    else if (Name == "sse4.1")
1091      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1092        Features["ssse3"] = Features["sse41"] = true;
1093    else if (Name == "3dnow")
1094      Features["3dnowa"] = true;
1095    else if (Name == "3dnowa")
1096      Features["3dnow"] = Features["3dnowa"] = true;
1097    else if (Name == "aes")
1098      Features["aes"] = true;
1099    else if (Name == "avx")
1100      Features["avx"] = true;
1101  } else {
1102    if (Name == "mmx")
1103      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1104        Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1105    else if (Name == "sse")
1106      Features["sse"] = Features["sse2"] = Features["sse3"] =
1107        Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1108    else if (Name == "sse2")
1109      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1110        Features["sse41"] = Features["sse42"] = false;
1111    else if (Name == "sse3")
1112      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1113        Features["sse42"] = false;
1114    else if (Name == "ssse3")
1115      Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1116    else if (Name == "sse4")
1117      Features["sse41"] = Features["sse42"] = false;
1118    else if (Name == "sse4.2")
1119      Features["sse42"] = false;
1120    else if (Name == "sse4.1")
1121      Features["sse41"] = Features["sse42"] = false;
1122    else if (Name == "3dnow")
1123      Features["3dnow"] = Features["3dnowa"] = false;
1124    else if (Name == "3dnowa")
1125      Features["3dnowa"] = false;
1126    else if (Name == "aes")
1127      Features["aes"] = false;
1128    else if (Name == "avx")
1129      Features["avx"] = false;
1130  }
1131
1132  return true;
1133}
1134
1135/// HandleTargetOptions - Perform initialization based on the user
1136/// configured set of features.
1137void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1138  // Remember the maximum enabled sselevel.
1139  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1140    // Ignore disabled features.
1141    if (Features[i][0] == '-')
1142      continue;
1143
1144    if (Features[i].substr(1) == "aes") {
1145      HasAES = true;
1146      continue;
1147    }
1148
1149    // FIXME: Not sure yet how to treat AVX in regard to SSE levels.
1150    // For now let it be enabled together with other SSE levels.
1151    if (Features[i].substr(1) == "avx") {
1152      HasAVX = true;
1153      continue;
1154    }
1155
1156    assert(Features[i][0] == '+' && "Invalid target feature!");
1157    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
1158      .Case("sse42", SSE42)
1159      .Case("sse41", SSE41)
1160      .Case("ssse3", SSSE3)
1161      .Case("sse3", SSE3)
1162      .Case("sse2", SSE2)
1163      .Case("sse", SSE1)
1164      .Case("mmx", MMX)
1165      .Default(NoMMXSSE);
1166    SSELevel = std::max(SSELevel, Level);
1167
1168    AMD3DNowEnum ThreeDNowLevel =
1169      llvm::StringSwitch<AMD3DNowEnum>(Features[i].substr(1))
1170        .Case("3dnowa", AMD3DNowAthlon)
1171        .Case("3dnow", AMD3DNow)
1172        .Default(NoAMD3DNow);
1173
1174    AMD3DNowLevel = std::max(AMD3DNowLevel, ThreeDNowLevel);
1175  }
1176}
1177
1178/// X86TargetInfo::getTargetDefines - Return a set of the X86-specific #defines
1179/// that are not tied to a specific subtarget.
1180void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1181                                     MacroBuilder &Builder) const {
1182  // Target identification.
1183  if (PointerWidth == 64) {
1184    Builder.defineMacro("_LP64");
1185    Builder.defineMacro("__LP64__");
1186    Builder.defineMacro("__amd64__");
1187    Builder.defineMacro("__amd64");
1188    Builder.defineMacro("__x86_64");
1189    Builder.defineMacro("__x86_64__");
1190  } else {
1191    DefineStd(Builder, "i386", Opts);
1192  }
1193
1194  if (HasAES)
1195    Builder.defineMacro("__AES__");
1196
1197  if (HasAVX)
1198    Builder.defineMacro("__AVX__");
1199
1200  // Target properties.
1201  Builder.defineMacro("__LITTLE_ENDIAN__");
1202
1203  // Subtarget options.
1204  Builder.defineMacro("__nocona");
1205  Builder.defineMacro("__nocona__");
1206  Builder.defineMacro("__tune_nocona__");
1207  Builder.defineMacro("__REGISTER_PREFIX__", "");
1208
1209  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
1210  // functions in glibc header files that use FP Stack inline asm which the
1211  // backend can't deal with (PR879).
1212  Builder.defineMacro("__NO_MATH_INLINES");
1213
1214  // Each case falls through to the previous one here.
1215  switch (SSELevel) {
1216  case SSE42:
1217    Builder.defineMacro("__SSE4_2__");
1218  case SSE41:
1219    Builder.defineMacro("__SSE4_1__");
1220  case SSSE3:
1221    Builder.defineMacro("__SSSE3__");
1222  case SSE3:
1223    Builder.defineMacro("__SSE3__");
1224  case SSE2:
1225    Builder.defineMacro("__SSE2__");
1226    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
1227  case SSE1:
1228    Builder.defineMacro("__SSE__");
1229    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
1230  case MMX:
1231    Builder.defineMacro("__MMX__");
1232  case NoMMXSSE:
1233    break;
1234  }
1235
1236  if (Opts.Microsoft && PointerWidth == 32) {
1237    Builder.defineMacro("_M_IX86", "600");
1238
1239    switch (SSELevel) {
1240    case SSE2:
1241      Builder.defineMacro("_M_IX86_FP", llvm::Twine(2));
1242      break;
1243    case SSE1:
1244      Builder.defineMacro("_M_IX86_FP", llvm::Twine(1));
1245      break;
1246    default:
1247      Builder.defineMacro("_M_IX86_FP", llvm::Twine(0));
1248    }
1249  }
1250
1251  // Each case falls through to the previous one here.
1252  switch (AMD3DNowLevel) {
1253  case AMD3DNowAthlon:
1254    Builder.defineMacro("__3dNOW_A__");
1255  case AMD3DNow:
1256    Builder.defineMacro("__3dNOW__");
1257  case NoAMD3DNow:
1258    break;
1259  }
1260}
1261
1262
1263bool
1264X86TargetInfo::validateAsmConstraint(const char *&Name,
1265                                     TargetInfo::ConstraintInfo &Info) const {
1266  switch (*Name) {
1267  default: return false;
1268  case 'Y': // first letter of a pair:
1269    switch (*(Name+1)) {
1270    default: return false;
1271    case '0':  // First SSE register.
1272    case 't':  // Any SSE register, when SSE2 is enabled.
1273    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
1274    case 'm':  // any MMX register, when inter-unit moves enabled.
1275      break;   // falls through to setAllowsRegister.
1276  }
1277  case 'a': // eax.
1278  case 'b': // ebx.
1279  case 'c': // ecx.
1280  case 'd': // edx.
1281  case 'S': // esi.
1282  case 'D': // edi.
1283  case 'A': // edx:eax.
1284  case 'f': // any x87 floating point stack register.
1285  case 't': // top of floating point stack.
1286  case 'u': // second from top of floating point stack.
1287  case 'q': // Any register accessible as [r]l: a, b, c, and d.
1288  case 'y': // Any MMX register.
1289  case 'x': // Any SSE register.
1290  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
1291  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
1292  case 'l': // "Index" registers: any general register that can be used as an
1293            // index in a base+index memory access.
1294    Info.setAllowsRegister();
1295    return true;
1296  case 'C': // SSE floating point constant.
1297  case 'G': // x87 floating point constant.
1298  case 'e': // 32-bit signed integer constant for use with zero-extending
1299            // x86_64 instructions.
1300  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
1301            // x86_64 instructions.
1302    return true;
1303  }
1304  return false;
1305}
1306
1307std::string
1308X86TargetInfo::convertConstraint(const char Constraint) const {
1309  switch (Constraint) {
1310  case 'a': return std::string("{ax}");
1311  case 'b': return std::string("{bx}");
1312  case 'c': return std::string("{cx}");
1313  case 'd': return std::string("{dx}");
1314  case 'S': return std::string("{si}");
1315  case 'D': return std::string("{di}");
1316  case 't': // top of floating point stack.
1317    return std::string("{st}");
1318  case 'u': // second from top of floating point stack.
1319    return std::string("{st(1)}"); // second from top of floating point stack.
1320  default:
1321    return std::string(1, Constraint);
1322  }
1323}
1324} // end anonymous namespace
1325
1326namespace {
1327// X86-32 generic target
1328class X86_32TargetInfo : public X86TargetInfo {
1329public:
1330  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
1331    DoubleAlign = LongLongAlign = 32;
1332    LongDoubleWidth = 96;
1333    LongDoubleAlign = 32;
1334    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1335                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1336                        "a0:0:64-f80:32:32-n8:16:32";
1337    SizeType = UnsignedInt;
1338    PtrDiffType = SignedInt;
1339    IntPtrType = SignedInt;
1340    RegParmMax = 3;
1341
1342    // Use fpret for all types.
1343    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
1344                             (1 << TargetInfo::Double) |
1345                             (1 << TargetInfo::LongDouble));
1346  }
1347  virtual const char *getVAListDeclaration() const {
1348    return "typedef char* __builtin_va_list;";
1349  }
1350
1351  int getEHDataRegisterNumber(unsigned RegNo) const {
1352    if (RegNo == 0) return 0;
1353    if (RegNo == 1) return 2;
1354    return -1;
1355  }
1356};
1357} // end anonymous namespace
1358
1359namespace {
1360class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
1361public:
1362  OpenBSDI386TargetInfo(const std::string& triple) :
1363    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
1364    SizeType = UnsignedLong;
1365    IntPtrType = SignedLong;
1366    PtrDiffType = SignedLong;
1367  }
1368};
1369} // end anonymous namespace
1370
1371namespace {
1372class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
1373public:
1374  DarwinI386TargetInfo(const std::string& triple) :
1375    DarwinTargetInfo<X86_32TargetInfo>(triple) {
1376    LongDoubleWidth = 128;
1377    LongDoubleAlign = 128;
1378    SizeType = UnsignedLong;
1379    IntPtrType = SignedLong;
1380    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1381                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1382                        "a0:0:64-f80:128:128-n8:16:32";
1383    HasAlignMac68kSupport = true;
1384  }
1385
1386};
1387} // end anonymous namespace
1388
1389namespace {
1390// x86-32 Windows target
1391class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
1392public:
1393  WindowsX86_32TargetInfo(const std::string& triple)
1394    : WindowsTargetInfo<X86_32TargetInfo>(triple) {
1395    TLSSupported = false;
1396    WCharType = UnsignedShort;
1397    DoubleAlign = LongLongAlign = 64;
1398    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1399                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
1400                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32";
1401  }
1402    LongDoubleWidth = 64;
1403    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1404};
1405} // end anonymous namespace
1406
1407namespace {
1408// x86-32 MinGW target
1409class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
1410public:
1411  MinGWX86_32TargetInfo(const std::string& triple)
1412    : WindowsX86_32TargetInfo(triple) {
1413  }
1414  virtual void getTargetDefines(const LangOptions &Opts,
1415                                MacroBuilder &Builder) const {
1416    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
1417    Builder.defineMacro("__MSVCRT__");
1418    Builder.defineMacro("__MINGW32__");
1419    Builder.defineMacro("__declspec", "__declspec");
1420  }
1421};
1422} // end anonymous namespace
1423
1424namespace {
1425// x86-32 Cygwin target
1426class CygwinX86_32TargetInfo : public X86_32TargetInfo {
1427public:
1428  CygwinX86_32TargetInfo(const std::string& triple)
1429    : X86_32TargetInfo(triple) {
1430    TLSSupported = false;
1431    WCharType = UnsignedShort;
1432    DoubleAlign = LongLongAlign = 64;
1433    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1434                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
1435                        "a0:0:64-f80:32:32-n8:16:32";
1436  }
1437  virtual void getTargetDefines(const LangOptions &Opts,
1438                                MacroBuilder &Builder) const {
1439    X86_32TargetInfo::getTargetDefines(Opts, Builder);
1440    Builder.defineMacro("__CYGWIN__");
1441    Builder.defineMacro("__CYGWIN32__");
1442    DefineStd(Builder, "unix", Opts);
1443    if (Opts.CPlusPlus)
1444      Builder.defineMacro("_GNU_SOURCE");
1445  }
1446};
1447} // end anonymous namespace
1448
1449namespace {
1450// x86-32 Haiku target
1451class HaikuX86_32TargetInfo : public X86_32TargetInfo {
1452public:
1453  HaikuX86_32TargetInfo(const std::string& triple)
1454    : X86_32TargetInfo(triple) {
1455    SizeType = UnsignedLong;
1456    IntPtrType = SignedLong;
1457    PtrDiffType = SignedLong;
1458  }
1459  virtual void getTargetDefines(const LangOptions &Opts,
1460                                MacroBuilder &Builder) const {
1461    X86_32TargetInfo::getTargetDefines(Opts, Builder);
1462    Builder.defineMacro("__INTEL__");
1463    Builder.defineMacro("__HAIKU__");
1464  }
1465};
1466} // end anonymous namespace
1467
1468namespace {
1469// x86-64 generic target
1470class X86_64TargetInfo : public X86TargetInfo {
1471public:
1472  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
1473    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1474    LongDoubleWidth = 128;
1475    LongDoubleAlign = 128;
1476    LargeArrayMinWidth = 128;
1477    LargeArrayAlign = 128;
1478    IntMaxType = SignedLong;
1479    UIntMaxType = UnsignedLong;
1480    Int64Type = SignedLong;
1481    RegParmMax = 6;
1482
1483    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1484                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
1485                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64";
1486
1487    // Use fpret only for long double.
1488    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
1489  }
1490  virtual const char *getVAListDeclaration() const {
1491    return "typedef struct __va_list_tag {"
1492           "  unsigned gp_offset;"
1493           "  unsigned fp_offset;"
1494           "  void* overflow_arg_area;"
1495           "  void* reg_save_area;"
1496           "} __va_list_tag;"
1497           "typedef __va_list_tag __builtin_va_list[1];";
1498  }
1499
1500  int getEHDataRegisterNumber(unsigned RegNo) const {
1501    if (RegNo == 0) return 0;
1502    if (RegNo == 1) return 1;
1503    return -1;
1504  }
1505};
1506} // end anonymous namespace
1507
1508namespace {
1509// x86-64 Windows target
1510class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
1511public:
1512  WindowsX86_64TargetInfo(const std::string& triple)
1513    : WindowsTargetInfo<X86_64TargetInfo>(triple) {
1514    TLSSupported = false;
1515    WCharType = UnsignedShort;
1516    LongWidth = LongAlign = 32;
1517    DoubleAlign = LongLongAlign = 64;
1518    IntMaxType = SignedLongLong;
1519    UIntMaxType = UnsignedLongLong;
1520    Int64Type = SignedLongLong;
1521    SizeType = UnsignedLongLong;
1522    PtrDiffType = SignedLongLong;
1523    IntPtrType = SignedLongLong;
1524  }
1525  virtual void getTargetDefines(const LangOptions &Opts,
1526                                MacroBuilder &Builder) const {
1527    WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
1528
1529    Builder.defineMacro("_WIN64");
1530    Builder.defineMacro("_M_X64");
1531    Builder.defineMacro("_M_AMD64");
1532  }
1533  virtual const char *getVAListDeclaration() const {
1534    return "typedef char* __builtin_va_list;";
1535  }
1536};
1537} // end anonymous namespace
1538
1539namespace {
1540// x86-64 MinGW target
1541class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
1542public:
1543  MinGWX86_64TargetInfo(const std::string& triple)
1544    : WindowsX86_64TargetInfo(triple) {
1545  }
1546  virtual void getTargetDefines(const LangOptions &Opts,
1547                                MacroBuilder &Builder) const {
1548    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
1549    Builder.defineMacro("__MSVCRT__");
1550    Builder.defineMacro("__MINGW64__");
1551    Builder.defineMacro("__declspec");
1552  }
1553};
1554} // end anonymous namespace
1555
1556namespace {
1557class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
1558public:
1559  DarwinX86_64TargetInfo(const std::string& triple)
1560      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
1561    Int64Type = SignedLongLong;
1562  }
1563};
1564} // end anonymous namespace
1565
1566namespace {
1567class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
1568public:
1569  OpenBSDX86_64TargetInfo(const std::string& triple)
1570      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
1571    IntMaxType = SignedLongLong;
1572    UIntMaxType = UnsignedLongLong;
1573    Int64Type = SignedLongLong;
1574  }
1575};
1576} // end anonymous namespace
1577
1578namespace {
1579class ARMTargetInfo : public TargetInfo {
1580  // Possible FPU choices.
1581  enum FPUMode {
1582    NoFPU,
1583    VFP2FPU,
1584    VFP3FPU,
1585    NeonFPU
1586  };
1587
1588  static bool FPUModeIsVFP(FPUMode Mode) {
1589    return Mode >= VFP2FPU && Mode <= NeonFPU;
1590  }
1591
1592  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1593  static const char * const GCCRegNames[];
1594
1595  std::string ABI, CPU;
1596
1597  unsigned FPU : 3;
1598
1599  unsigned IsThumb : 1;
1600
1601  // Initialized via features.
1602  unsigned SoftFloat : 1;
1603  unsigned SoftFloatABI : 1;
1604
1605  static const Builtin::Info BuiltinInfo[];
1606
1607public:
1608  ARMTargetInfo(const std::string &TripleStr)
1609    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
1610  {
1611    SizeType = UnsignedInt;
1612    PtrDiffType = SignedInt;
1613
1614    // {} in inline assembly are neon specifiers, not assembly variant
1615    // specifiers.
1616    NoAsmVariants = true;
1617
1618    // FIXME: Should we just treat this as a feature?
1619    IsThumb = getTriple().getArchName().startswith("thumb");
1620    if (IsThumb) {
1621      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
1622                           "i64:64:64-f32:32:32-f64:64:64-"
1623                           "v64:64:64-v128:128:128-a0:0:32-n32");
1624    } else {
1625      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1626                           "i64:64:64-f32:32:32-f64:64:64-"
1627                           "v64:64:64-v128:128:128-a0:0:64-n32");
1628    }
1629
1630    // ARM targets default to using the ARM C++ ABI.
1631    CXXABI = CXXABI_ARM;
1632  }
1633  virtual const char *getABI() const { return ABI.c_str(); }
1634  virtual bool setABI(const std::string &Name) {
1635    ABI = Name;
1636
1637    // The defaults (above) are for AAPCS, check if we need to change them.
1638    //
1639    // FIXME: We need support for -meabi... we could just mangle it into the
1640    // name.
1641    if (Name == "apcs-gnu") {
1642      DoubleAlign = LongLongAlign = LongDoubleAlign = 32;
1643      SizeType = UnsignedLong;
1644
1645      // Do not respect the alignment of bit-field types when laying out
1646      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
1647      UseBitFieldTypeAlignment = false;
1648
1649      if (IsThumb) {
1650        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
1651                             "i64:32:32-f32:32:32-f64:32:32-"
1652                             "v64:64:64-v128:128:128-a0:0:32-n32");
1653      } else {
1654        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1655                             "i64:32:32-f32:32:32-f64:32:32-"
1656                             "v64:64:64-v128:128:128-a0:0:64-n32");
1657      }
1658
1659      // FIXME: Override "preferred align" for double and long long.
1660    } else if (Name == "aapcs") {
1661      // FIXME: Enumerated types are variable width in straight AAPCS.
1662    } else if (Name == "aapcs-linux") {
1663      ;
1664    } else
1665      return false;
1666
1667    return true;
1668  }
1669
1670  void getDefaultFeatures(const std::string &CPU,
1671                          llvm::StringMap<bool> &Features) const {
1672    // FIXME: This should not be here.
1673    Features["vfp2"] = false;
1674    Features["vfp3"] = false;
1675    Features["neon"] = false;
1676
1677    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
1678      Features["vfp2"] = true;
1679    else if (CPU == "cortex-a8" || CPU == "cortex-a9")
1680      Features["neon"] = true;
1681  }
1682
1683  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1684                                 const std::string &Name,
1685                                 bool Enabled) const {
1686    if (Name == "soft-float" || Name == "soft-float-abi") {
1687      Features[Name] = Enabled;
1688    } else if (Name == "vfp2" || Name == "vfp3" || Name == "neon") {
1689      // These effectively are a single option, reset them when any is enabled.
1690      if (Enabled)
1691        Features["vfp2"] = Features["vfp3"] = Features["neon"] = false;
1692      Features[Name] = Enabled;
1693    } else
1694      return false;
1695
1696    return true;
1697  }
1698
1699  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
1700    FPU = NoFPU;
1701    SoftFloat = SoftFloatABI = false;
1702    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
1703      if (Features[i] == "+soft-float")
1704        SoftFloat = true;
1705      else if (Features[i] == "+soft-float-abi")
1706        SoftFloatABI = true;
1707      else if (Features[i] == "+vfp2")
1708        FPU = VFP2FPU;
1709      else if (Features[i] == "+vfp3")
1710        FPU = VFP3FPU;
1711      else if (Features[i] == "+neon")
1712        FPU = NeonFPU;
1713    }
1714
1715    // Remove front-end specific options which the backend handles differently.
1716    std::vector<std::string>::iterator it;
1717    it = std::find(Features.begin(), Features.end(), "+soft-float");
1718    if (it != Features.end())
1719      Features.erase(it);
1720    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
1721    if (it != Features.end())
1722      Features.erase(it);
1723  }
1724
1725  static const char *getCPUDefineSuffix(llvm::StringRef Name) {
1726    return llvm::StringSwitch<const char*>(Name)
1727      .Cases("arm8", "arm810", "4")
1728      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
1729      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
1730      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
1731      .Case("ep9312", "4T")
1732      .Cases("arm10tdmi", "arm1020t", "5T")
1733      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
1734      .Case("arm926ej-s", "5TEJ")
1735      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
1736      .Cases("xscale", "iwmmxt", "5TE")
1737      .Case("arm1136j-s", "6J")
1738      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
1739      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
1740      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
1741      .Cases("cortex-a8", "cortex-a9", "7A")
1742      .Default(0);
1743  }
1744  virtual bool setCPU(const std::string &Name) {
1745    if (!getCPUDefineSuffix(Name))
1746      return false;
1747
1748    CPU = Name;
1749    return true;
1750  }
1751  virtual void getTargetDefines(const LangOptions &Opts,
1752                                MacroBuilder &Builder) const {
1753    // Target identification.
1754    Builder.defineMacro("__arm");
1755    Builder.defineMacro("__arm__");
1756
1757    // Target properties.
1758    Builder.defineMacro("__ARMEL__");
1759    Builder.defineMacro("__LITTLE_ENDIAN__");
1760    Builder.defineMacro("__REGISTER_PREFIX__", "");
1761
1762    llvm::StringRef CPUArch = getCPUDefineSuffix(CPU);
1763    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
1764
1765    // Subtarget options.
1766
1767    // FIXME: It's more complicated than this and we don't really support
1768    // interworking.
1769    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
1770      Builder.defineMacro("__THUMB_INTERWORK__");
1771
1772    if (ABI == "aapcs" || ABI == "aapcs-linux")
1773      Builder.defineMacro("__ARM_EABI__");
1774
1775    if (SoftFloat)
1776      Builder.defineMacro("__SOFTFP__");
1777
1778    if (CPU == "xscale")
1779      Builder.defineMacro("__XSCALE__");
1780
1781    bool IsThumb2 = IsThumb && (CPUArch == "6T2" || CPUArch.startswith("7"));
1782    if (IsThumb) {
1783      Builder.defineMacro("__THUMBEL__");
1784      Builder.defineMacro("__thumb__");
1785      if (IsThumb2)
1786        Builder.defineMacro("__thumb2__");
1787    }
1788
1789    // Note, this is always on in gcc, even though it doesn't make sense.
1790    Builder.defineMacro("__APCS_32__");
1791
1792    if (FPUModeIsVFP((FPUMode) FPU))
1793      Builder.defineMacro("__VFP_FP__");
1794
1795    // This only gets set when Neon instructions are actually available, unlike
1796    // the VFP define, hence the soft float and arch check. This is subtly
1797    // different from gcc, we follow the intent which was that it should be set
1798    // when Neon instructions are actually available.
1799    if (FPU == NeonFPU && !SoftFloat && IsThumb2)
1800      Builder.defineMacro("__ARM_NEON__");
1801  }
1802  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1803                                 unsigned &NumRecords) const {
1804    Records = BuiltinInfo;
1805    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
1806  }
1807  virtual const char *getVAListDeclaration() const {
1808    return "typedef char* __builtin_va_list;";
1809  }
1810  virtual void getGCCRegNames(const char * const *&Names,
1811                              unsigned &NumNames) const;
1812  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1813                                unsigned &NumAliases) const;
1814  virtual bool validateAsmConstraint(const char *&Name,
1815                                     TargetInfo::ConstraintInfo &Info) const {
1816    // FIXME: Check if this is complete
1817    switch (*Name) {
1818    default:
1819    case 'l': // r0-r7
1820    case 'h': // r8-r15
1821    case 'w': // VFP Floating point register single precision
1822    case 'P': // VFP Floating point register double precision
1823      Info.setAllowsRegister();
1824      return true;
1825    }
1826    return false;
1827  }
1828  virtual const char *getClobbers() const {
1829    // FIXME: Is this really right?
1830    return "";
1831  }
1832};
1833
1834const char * const ARMTargetInfo::GCCRegNames[] = {
1835  // Integer registers
1836  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1837  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
1838
1839  // Float registers
1840  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
1841  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
1842  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
1843  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31"
1844
1845  // FIXME: Need double and NEON registers, but we need support for aliasing
1846  // multiple registers for that.
1847};
1848
1849void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
1850                                   unsigned &NumNames) const {
1851  Names = GCCRegNames;
1852  NumNames = llvm::array_lengthof(GCCRegNames);
1853}
1854
1855const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
1856  { { "a1" }, "r0" },
1857  { { "a2" }, "r1" },
1858  { { "a3" }, "r2" },
1859  { { "a4" }, "r3" },
1860  { { "v1" }, "r4" },
1861  { { "v2" }, "r5" },
1862  { { "v3" }, "r6" },
1863  { { "v4" }, "r7" },
1864  { { "v5" }, "r8" },
1865  { { "v6", "rfp" }, "r9" },
1866  { { "sl" }, "r10" },
1867  { { "fp" }, "r11" },
1868  { { "ip" }, "r12" },
1869  { { "r13" }, "sp" },
1870  { { "r14" }, "lr" },
1871  { { "r15" }, "pc" },
1872};
1873
1874void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1875                                       unsigned &NumAliases) const {
1876  Aliases = GCCRegAliases;
1877  NumAliases = llvm::array_lengthof(GCCRegAliases);
1878}
1879
1880const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
1881#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, false },
1882#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER, false },
1883#include "clang/Basic/BuiltinsARM.def"
1884};
1885} // end anonymous namespace.
1886
1887
1888namespace {
1889class DarwinARMTargetInfo :
1890  public DarwinTargetInfo<ARMTargetInfo> {
1891protected:
1892  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
1893                            MacroBuilder &Builder) const {
1894    getDarwinDefines(Builder, Opts, Triple);
1895  }
1896
1897public:
1898  DarwinARMTargetInfo(const std::string& triple)
1899    : DarwinTargetInfo<ARMTargetInfo>(triple) {
1900    HasAlignMac68kSupport = true;
1901  }
1902};
1903} // end anonymous namespace.
1904
1905namespace {
1906class SparcV8TargetInfo : public TargetInfo {
1907  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1908  static const char * const GCCRegNames[];
1909public:
1910  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
1911    // FIXME: Support Sparc quad-precision long double?
1912    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1913                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
1914  }
1915  virtual void getTargetDefines(const LangOptions &Opts,
1916                                MacroBuilder &Builder) const {
1917    DefineStd(Builder, "sparc", Opts);
1918    Builder.defineMacro("__sparcv8");
1919    Builder.defineMacro("__REGISTER_PREFIX__", "");
1920  }
1921  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1922                                 unsigned &NumRecords) const {
1923    // FIXME: Implement!
1924  }
1925  virtual const char *getVAListDeclaration() const {
1926    return "typedef void* __builtin_va_list;";
1927  }
1928  virtual void getGCCRegNames(const char * const *&Names,
1929                              unsigned &NumNames) const;
1930  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1931                                unsigned &NumAliases) const;
1932  virtual bool validateAsmConstraint(const char *&Name,
1933                                     TargetInfo::ConstraintInfo &info) const {
1934    // FIXME: Implement!
1935    return false;
1936  }
1937  virtual const char *getClobbers() const {
1938    // FIXME: Implement!
1939    return "";
1940  }
1941};
1942
1943const char * const SparcV8TargetInfo::GCCRegNames[] = {
1944  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1945  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1946  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
1947  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
1948};
1949
1950void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
1951                                       unsigned &NumNames) const {
1952  Names = GCCRegNames;
1953  NumNames = llvm::array_lengthof(GCCRegNames);
1954}
1955
1956const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
1957  { { "g0" }, "r0" },
1958  { { "g1" }, "r1" },
1959  { { "g2" }, "r2" },
1960  { { "g3" }, "r3" },
1961  { { "g4" }, "r4" },
1962  { { "g5" }, "r5" },
1963  { { "g6" }, "r6" },
1964  { { "g7" }, "r7" },
1965  { { "o0" }, "r8" },
1966  { { "o1" }, "r9" },
1967  { { "o2" }, "r10" },
1968  { { "o3" }, "r11" },
1969  { { "o4" }, "r12" },
1970  { { "o5" }, "r13" },
1971  { { "o6", "sp" }, "r14" },
1972  { { "o7" }, "r15" },
1973  { { "l0" }, "r16" },
1974  { { "l1" }, "r17" },
1975  { { "l2" }, "r18" },
1976  { { "l3" }, "r19" },
1977  { { "l4" }, "r20" },
1978  { { "l5" }, "r21" },
1979  { { "l6" }, "r22" },
1980  { { "l7" }, "r23" },
1981  { { "i0" }, "r24" },
1982  { { "i1" }, "r25" },
1983  { { "i2" }, "r26" },
1984  { { "i3" }, "r27" },
1985  { { "i4" }, "r28" },
1986  { { "i5" }, "r29" },
1987  { { "i6", "fp" }, "r30" },
1988  { { "i7" }, "r31" },
1989};
1990
1991void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1992                                         unsigned &NumAliases) const {
1993  Aliases = GCCRegAliases;
1994  NumAliases = llvm::array_lengthof(GCCRegAliases);
1995}
1996} // end anonymous namespace.
1997
1998namespace {
1999class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
2000public:
2001  AuroraUXSparcV8TargetInfo(const std::string& triple) :
2002      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
2003    SizeType = UnsignedInt;
2004    PtrDiffType = SignedInt;
2005  }
2006};
2007class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
2008public:
2009  SolarisSparcV8TargetInfo(const std::string& triple) :
2010      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
2011    SizeType = UnsignedInt;
2012    PtrDiffType = SignedInt;
2013  }
2014};
2015} // end anonymous namespace.
2016
2017namespace {
2018  class MSP430TargetInfo : public TargetInfo {
2019    static const char * const GCCRegNames[];
2020  public:
2021    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
2022      TLSSupported = false;
2023      IntWidth = 16; IntAlign = 16;
2024      LongWidth = 32; LongLongWidth = 64;
2025      LongAlign = LongLongAlign = 16;
2026      PointerWidth = 16; PointerAlign = 16;
2027      SizeType = UnsignedInt;
2028      IntMaxType = SignedLong;
2029      UIntMaxType = UnsignedLong;
2030      IntPtrType = SignedShort;
2031      PtrDiffType = SignedInt;
2032      SigAtomicType = SignedLong;
2033      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
2034   }
2035    virtual void getTargetDefines(const LangOptions &Opts,
2036                                  MacroBuilder &Builder) const {
2037      Builder.defineMacro("MSP430");
2038      Builder.defineMacro("__MSP430__");
2039      // FIXME: defines for different 'flavours' of MCU
2040    }
2041    virtual void getTargetBuiltins(const Builtin::Info *&Records,
2042                                   unsigned &NumRecords) const {
2043     // FIXME: Implement.
2044      Records = 0;
2045      NumRecords = 0;
2046    }
2047    virtual void getGCCRegNames(const char * const *&Names,
2048                                unsigned &NumNames) const;
2049    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2050                                  unsigned &NumAliases) const {
2051      // No aliases.
2052      Aliases = 0;
2053      NumAliases = 0;
2054    }
2055    virtual bool validateAsmConstraint(const char *&Name,
2056                                       TargetInfo::ConstraintInfo &info) const {
2057      // No target constraints for now.
2058      return false;
2059    }
2060    virtual const char *getClobbers() const {
2061      // FIXME: Is this really right?
2062      return "";
2063    }
2064    virtual const char *getVAListDeclaration() const {
2065      // FIXME: implement
2066      return "typedef char* __builtin_va_list;";
2067   }
2068  };
2069
2070  const char * const MSP430TargetInfo::GCCRegNames[] = {
2071    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2072    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2073  };
2074
2075  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
2076                                        unsigned &NumNames) const {
2077    Names = GCCRegNames;
2078    NumNames = llvm::array_lengthof(GCCRegNames);
2079  }
2080}
2081
2082
2083namespace {
2084  class SystemZTargetInfo : public TargetInfo {
2085    static const char * const GCCRegNames[];
2086  public:
2087    SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) {
2088      TLSSupported = false;
2089      IntWidth = IntAlign = 32;
2090      LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
2091      PointerWidth = PointerAlign = 64;
2092      DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-"
2093      "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64";
2094   }
2095    virtual void getTargetDefines(const LangOptions &Opts,
2096                                  MacroBuilder &Builder) const {
2097      Builder.defineMacro("__s390__");
2098      Builder.defineMacro("__s390x__");
2099    }
2100    virtual void getTargetBuiltins(const Builtin::Info *&Records,
2101                                   unsigned &NumRecords) const {
2102      // FIXME: Implement.
2103      Records = 0;
2104      NumRecords = 0;
2105    }
2106
2107    virtual void getGCCRegNames(const char * const *&Names,
2108                                unsigned &NumNames) const;
2109    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2110                                  unsigned &NumAliases) const {
2111      // No aliases.
2112      Aliases = 0;
2113      NumAliases = 0;
2114    }
2115    virtual bool validateAsmConstraint(const char *&Name,
2116                                       TargetInfo::ConstraintInfo &info) const {
2117      // FIXME: implement
2118      return true;
2119    }
2120    virtual const char *getClobbers() const {
2121      // FIXME: Is this really right?
2122      return "";
2123    }
2124    virtual const char *getVAListDeclaration() const {
2125      // FIXME: implement
2126      return "typedef char* __builtin_va_list;";
2127   }
2128  };
2129
2130  const char * const SystemZTargetInfo::GCCRegNames[] = {
2131    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2132    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2133  };
2134
2135  void SystemZTargetInfo::getGCCRegNames(const char * const *&Names,
2136                                         unsigned &NumNames) const {
2137    Names = GCCRegNames;
2138    NumNames = llvm::array_lengthof(GCCRegNames);
2139  }
2140}
2141
2142namespace {
2143  class BlackfinTargetInfo : public TargetInfo {
2144    static const char * const GCCRegNames[];
2145  public:
2146    BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) {
2147      TLSSupported = false;
2148      DoubleAlign = 32;
2149      LongLongAlign = 32;
2150      LongDoubleAlign = 32;
2151      DescriptionString = "e-p:32:32-i64:32-f64:32-n32";
2152    }
2153
2154    virtual void getTargetDefines(const LangOptions &Opts,
2155                                  MacroBuilder &Builder) const {
2156      DefineStd(Builder, "bfin", Opts);
2157      DefineStd(Builder, "BFIN", Opts);
2158      Builder.defineMacro("__ADSPBLACKFIN__");
2159      // FIXME: This one is really dependent on -mcpu
2160      Builder.defineMacro("__ADSPLPBLACKFIN__");
2161      // FIXME: Add cpu-dependent defines and __SILICON_REVISION__
2162    }
2163
2164    virtual void getTargetBuiltins(const Builtin::Info *&Records,
2165                                   unsigned &NumRecords) const {
2166      // FIXME: Implement.
2167      Records = 0;
2168      NumRecords = 0;
2169    }
2170
2171    virtual void getGCCRegNames(const char * const *&Names,
2172                                unsigned &NumNames) const;
2173
2174    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2175                                  unsigned &NumAliases) const {
2176      // No aliases.
2177      Aliases = 0;
2178      NumAliases = 0;
2179    }
2180
2181    virtual bool validateAsmConstraint(const char *&Name,
2182                                       TargetInfo::ConstraintInfo &Info) const {
2183      if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) {
2184        Info.setAllowsRegister();
2185        return true;
2186      }
2187      return false;
2188    }
2189
2190    virtual const char *getClobbers() const {
2191      return "";
2192    }
2193
2194    virtual const char *getVAListDeclaration() const {
2195      return "typedef char* __builtin_va_list;";
2196    }
2197  };
2198
2199  const char * const BlackfinTargetInfo::GCCRegNames[] = {
2200    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2201    "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
2202    "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3",
2203    "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3",
2204    "a0", "a1", "cc",
2205    "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp",
2206    "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1"
2207  };
2208
2209  void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names,
2210                                          unsigned &NumNames) const {
2211    Names = GCCRegNames;
2212    NumNames = llvm::array_lengthof(GCCRegNames);
2213  }
2214}
2215
2216namespace {
2217
2218  // LLVM and Clang cannot be used directly to output native binaries for
2219  // target, but is used to compile C code to llvm bitcode with correct
2220  // type and alignment information.
2221  //
2222  // TCE uses the llvm bitcode as input and uses it for generating customized
2223  // target processor and program binary. TCE co-design environment is
2224  // publicly available in http://tce.cs.tut.fi
2225
2226  class TCETargetInfo : public TargetInfo{
2227  public:
2228    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
2229      TLSSupported = false;
2230      IntWidth = 32;
2231      LongWidth = LongLongWidth = 32;
2232      PointerWidth = 32;
2233      IntAlign = 32;
2234      LongAlign = LongLongAlign = 32;
2235      PointerAlign = 32;
2236      SizeType = UnsignedInt;
2237      IntMaxType = SignedLong;
2238      UIntMaxType = UnsignedLong;
2239      IntPtrType = SignedInt;
2240      PtrDiffType = SignedInt;
2241      FloatWidth = 32;
2242      FloatAlign = 32;
2243      DoubleWidth = 32;
2244      DoubleAlign = 32;
2245      LongDoubleWidth = 32;
2246      LongDoubleAlign = 32;
2247      FloatFormat = &llvm::APFloat::IEEEsingle;
2248      DoubleFormat = &llvm::APFloat::IEEEsingle;
2249      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
2250      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
2251                          "i16:16:32-i32:32:32-i64:32:32-"
2252                          "f32:32:32-f64:64:64-v64:64:64-"
2253                          "v128:128:128-a0:0:64-n32";
2254    }
2255
2256    virtual void getTargetDefines(const LangOptions &Opts,
2257                                  MacroBuilder &Builder) const {
2258      DefineStd(Builder, "tce", Opts);
2259      Builder.defineMacro("__TCE__");
2260      Builder.defineMacro("__TCE_V1__");
2261    }
2262    virtual void getTargetBuiltins(const Builtin::Info *&Records,
2263                                   unsigned &NumRecords) const {}
2264    virtual const char *getClobbers() const {
2265      return "";
2266    }
2267    virtual const char *getVAListDeclaration() const {
2268      return "typedef void* __builtin_va_list;";
2269    }
2270    virtual void getGCCRegNames(const char * const *&Names,
2271                                unsigned &NumNames) const {}
2272    virtual bool validateAsmConstraint(const char *&Name,
2273                                       TargetInfo::ConstraintInfo &info) const {
2274      return true;
2275    }
2276    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2277                                  unsigned &NumAliases) const {}
2278  };
2279}
2280
2281namespace {
2282class MipsTargetInfo : public TargetInfo {
2283  std::string ABI, CPU;
2284  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2285  static const char * const GCCRegNames[];
2286public:
2287  MipsTargetInfo(const std::string& triple) : TargetInfo(triple), ABI("o32") {
2288    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
2289                        "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32";
2290  }
2291  virtual const char *getABI() const { return ABI.c_str(); }
2292  virtual bool setABI(const std::string &Name) {
2293
2294    if ((Name == "o32") || (Name == "eabi")) {
2295      ABI = Name;
2296      return true;
2297    } else
2298      return false;
2299  }
2300  virtual bool setCPU(const std::string &Name) {
2301    CPU = Name;
2302    return true;
2303  }
2304  void getDefaultFeatures(const std::string &CPU,
2305                          llvm::StringMap<bool> &Features) const {
2306    Features[ABI] = true;
2307    Features[CPU] = true;
2308  }
2309  virtual void getArchDefines(const LangOptions &Opts,
2310                                MacroBuilder &Builder) const {
2311    if (ABI == "o32")
2312      Builder.defineMacro("__mips_o32");
2313    else if (ABI == "eabi")
2314      Builder.defineMacro("__mips_eabi");
2315  }
2316  virtual void getTargetDefines(const LangOptions &Opts,
2317                                MacroBuilder &Builder) const {
2318    DefineStd(Builder, "mips", Opts);
2319    Builder.defineMacro("_mips");
2320    DefineStd(Builder, "MIPSEB", Opts);
2321    Builder.defineMacro("_MIPSEB");
2322    Builder.defineMacro("__REGISTER_PREFIX__", "");
2323    getArchDefines(Opts, Builder);
2324  }
2325  virtual void getTargetBuiltins(const Builtin::Info *&Records,
2326                                 unsigned &NumRecords) const {
2327    // FIXME: Implement!
2328  }
2329  virtual const char *getVAListDeclaration() const {
2330    return "typedef void* __builtin_va_list;";
2331  }
2332  virtual void getGCCRegNames(const char * const *&Names,
2333                              unsigned &NumNames) const;
2334  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2335                                unsigned &NumAliases) const;
2336  virtual bool validateAsmConstraint(const char *&Name,
2337                                     TargetInfo::ConstraintInfo &Info) const {
2338    switch (*Name) {
2339    default:
2340    case 'r': // CPU registers.
2341    case 'd': // Equivalent to "r" unless generating MIPS16 code.
2342    case 'y': // Equivalent to "r", backwards compatibility only.
2343    case 'f': // floating-point registers.
2344      Info.setAllowsRegister();
2345      return true;
2346    }
2347    return false;
2348  }
2349
2350  virtual const char *getClobbers() const {
2351    // FIXME: Implement!
2352    return "";
2353  }
2354};
2355
2356const char * const MipsTargetInfo::GCCRegNames[] = {
2357  "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
2358  "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
2359  "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
2360  "$24",  "$25",  "$26",  "$27",  "$28",  "$sp",  "$fp",  "$31",
2361  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
2362  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
2363  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
2364  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
2365  "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
2366  "$fcc5","$fcc6","$fcc7"
2367};
2368
2369void MipsTargetInfo::getGCCRegNames(const char * const *&Names,
2370                                       unsigned &NumNames) const {
2371  Names = GCCRegNames;
2372  NumNames = llvm::array_lengthof(GCCRegNames);
2373}
2374
2375const TargetInfo::GCCRegAlias MipsTargetInfo::GCCRegAliases[] = {
2376  { { "at" },  "$1" },
2377  { { "v0" },  "$2" },
2378  { { "v1" },  "$3" },
2379  { { "a0" },  "$4" },
2380  { { "a1" },  "$5" },
2381  { { "a2" },  "$6" },
2382  { { "a3" },  "$7" },
2383  { { "t0" },  "$8" },
2384  { { "t1" },  "$9" },
2385  { { "t2" }, "$10" },
2386  { { "t3" }, "$11" },
2387  { { "t4" }, "$12" },
2388  { { "t5" }, "$13" },
2389  { { "t6" }, "$14" },
2390  { { "t7" }, "$15" },
2391  { { "s0" }, "$16" },
2392  { { "s1" }, "$17" },
2393  { { "s2" }, "$18" },
2394  { { "s3" }, "$19" },
2395  { { "s4" }, "$20" },
2396  { { "s5" }, "$21" },
2397  { { "s6" }, "$22" },
2398  { { "s7" }, "$23" },
2399  { { "t8" }, "$24" },
2400  { { "t9" }, "$25" },
2401  { { "k0" }, "$26" },
2402  { { "k1" }, "$27" },
2403  { { "gp" }, "$28" },
2404  { { "sp" }, "$29" },
2405  { { "fp" }, "$30" },
2406  { { "ra" }, "$31" }
2407};
2408
2409void MipsTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2410                                         unsigned &NumAliases) const {
2411  Aliases = GCCRegAliases;
2412  NumAliases = llvm::array_lengthof(GCCRegAliases);
2413}
2414} // end anonymous namespace.
2415
2416namespace {
2417class MipselTargetInfo : public MipsTargetInfo {
2418public:
2419  MipselTargetInfo(const std::string& triple) : MipsTargetInfo(triple) {
2420    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
2421                        "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32";
2422  }
2423
2424  virtual void getTargetDefines(const LangOptions &Opts,
2425                                MacroBuilder &Builder) const;
2426};
2427
2428void MipselTargetInfo::getTargetDefines(const LangOptions &Opts,
2429                                        MacroBuilder &Builder) const {
2430  DefineStd(Builder, "mips", Opts);
2431  Builder.defineMacro("_mips");
2432  DefineStd(Builder, "MIPSEL", Opts);
2433  Builder.defineMacro("_MIPSEL");
2434  Builder.defineMacro("__REGISTER_PREFIX__", "");
2435  getArchDefines(Opts, Builder);
2436}
2437} // end anonymous namespace.
2438
2439//===----------------------------------------------------------------------===//
2440// Driver code
2441//===----------------------------------------------------------------------===//
2442
2443static TargetInfo *AllocateTarget(const std::string &T) {
2444  llvm::Triple Triple(T);
2445  llvm::Triple::OSType os = Triple.getOS();
2446
2447  switch (Triple.getArch()) {
2448  default:
2449    return NULL;
2450
2451  case llvm::Triple::arm:
2452  case llvm::Triple::thumb:
2453    switch (os) {
2454    case llvm::Triple::Linux:
2455      return new LinuxTargetInfo<ARMTargetInfo>(T);
2456    case llvm::Triple::Darwin:
2457      return new DarwinARMTargetInfo(T);
2458    case llvm::Triple::FreeBSD:
2459      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
2460    default:
2461      return new ARMTargetInfo(T);
2462    }
2463
2464  case llvm::Triple::bfin:
2465    return new BlackfinTargetInfo(T);
2466
2467  case llvm::Triple::msp430:
2468    return new MSP430TargetInfo(T);
2469
2470  case llvm::Triple::mips:
2471    if (os == llvm::Triple::Psp)
2472      return new PSPTargetInfo<MipsTargetInfo>(T);
2473    if (os == llvm::Triple::Linux)
2474      return new LinuxTargetInfo<MipsTargetInfo>(T);
2475    return new MipsTargetInfo(T);
2476
2477  case llvm::Triple::mipsel:
2478    if (os == llvm::Triple::Psp)
2479      return new PSPTargetInfo<MipselTargetInfo>(T);
2480    if (os == llvm::Triple::Linux)
2481      return new LinuxTargetInfo<MipselTargetInfo>(T);
2482    return new MipselTargetInfo(T);
2483
2484  case llvm::Triple::ppc:
2485    if (os == llvm::Triple::Darwin)
2486      return new DarwinPPCTargetInfo(T);
2487    else if (os == llvm::Triple::FreeBSD)
2488      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
2489    return new PPC32TargetInfo(T);
2490
2491  case llvm::Triple::ppc64:
2492    if (os == llvm::Triple::Darwin)
2493      return new DarwinPPC64TargetInfo(T);
2494    else if (os == llvm::Triple::Lv2)
2495      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
2496    else if (os == llvm::Triple::FreeBSD)
2497      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
2498    return new PPC64TargetInfo(T);
2499
2500  case llvm::Triple::mblaze:
2501    return new MBlazeTargetInfo(T);
2502
2503  case llvm::Triple::sparc:
2504    if (os == llvm::Triple::AuroraUX)
2505      return new AuroraUXSparcV8TargetInfo(T);
2506    if (os == llvm::Triple::Solaris)
2507      return new SolarisSparcV8TargetInfo(T);
2508    return new SparcV8TargetInfo(T);
2509
2510  // FIXME: Need a real SPU target.
2511  case llvm::Triple::cellspu:
2512    return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
2513
2514  case llvm::Triple::systemz:
2515    return new SystemZTargetInfo(T);
2516
2517  case llvm::Triple::tce:
2518    return new TCETargetInfo(T);
2519
2520  case llvm::Triple::x86:
2521    switch (os) {
2522    case llvm::Triple::AuroraUX:
2523      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
2524    case llvm::Triple::Darwin:
2525      return new DarwinI386TargetInfo(T);
2526    case llvm::Triple::Linux:
2527      return new LinuxTargetInfo<X86_32TargetInfo>(T);
2528    case llvm::Triple::DragonFly:
2529      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
2530    case llvm::Triple::NetBSD:
2531      return new NetBSDTargetInfo<X86_32TargetInfo>(T);
2532    case llvm::Triple::OpenBSD:
2533      return new OpenBSDI386TargetInfo(T);
2534    case llvm::Triple::FreeBSD:
2535      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
2536    case llvm::Triple::Minix:
2537      return new MinixTargetInfo<X86_32TargetInfo>(T);
2538    case llvm::Triple::Solaris:
2539      return new SolarisTargetInfo<X86_32TargetInfo>(T);
2540    case llvm::Triple::Cygwin:
2541      return new CygwinX86_32TargetInfo(T);
2542    case llvm::Triple::MinGW32:
2543      return new MinGWX86_32TargetInfo(T);
2544    case llvm::Triple::Win32:
2545      return new WindowsX86_32TargetInfo(T);
2546    case llvm::Triple::Haiku:
2547      return new HaikuX86_32TargetInfo(T);
2548    default:
2549      return new X86_32TargetInfo(T);
2550    }
2551
2552  case llvm::Triple::x86_64:
2553    switch (os) {
2554    case llvm::Triple::AuroraUX:
2555      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
2556    case llvm::Triple::Darwin:
2557      return new DarwinX86_64TargetInfo(T);
2558    case llvm::Triple::Linux:
2559      return new LinuxTargetInfo<X86_64TargetInfo>(T);
2560    case llvm::Triple::DragonFly:
2561      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
2562    case llvm::Triple::NetBSD:
2563      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
2564    case llvm::Triple::OpenBSD:
2565      return new OpenBSDX86_64TargetInfo(T);
2566    case llvm::Triple::FreeBSD:
2567      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
2568    case llvm::Triple::Solaris:
2569      return new SolarisTargetInfo<X86_64TargetInfo>(T);
2570    case llvm::Triple::MinGW64:
2571      return new MinGWX86_64TargetInfo(T);
2572    case llvm::Triple::Win32:   // This is what Triple.h supports now.
2573      return new WindowsX86_64TargetInfo(T);
2574    default:
2575      return new X86_64TargetInfo(T);
2576    }
2577  }
2578}
2579
2580/// CreateTargetInfo - Return the target info object for the specified target
2581/// triple.
2582TargetInfo *TargetInfo::CreateTargetInfo(Diagnostic &Diags,
2583                                         TargetOptions &Opts) {
2584  llvm::Triple Triple(Opts.Triple);
2585
2586  // Construct the target
2587  llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
2588  if (!Target) {
2589    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
2590    return 0;
2591  }
2592
2593  // Set the target CPU if specified.
2594  if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
2595    Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
2596    return 0;
2597  }
2598
2599  // Set the target ABI if specified.
2600  if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
2601    Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
2602    return 0;
2603  }
2604
2605  // Set the target C++ ABI.
2606  if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
2607    Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
2608    return 0;
2609  }
2610
2611  // Compute the default target features, we need the target to handle this
2612  // because features may have dependencies on one another.
2613  llvm::StringMap<bool> Features;
2614  Target->getDefaultFeatures(Opts.CPU, Features);
2615
2616  // Apply the user specified deltas.
2617  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
2618         ie = Opts.Features.end(); it != ie; ++it) {
2619    const char *Name = it->c_str();
2620
2621    // Apply the feature via the target.
2622    if ((Name[0] != '-' && Name[0] != '+') ||
2623        !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) {
2624      Diags.Report(diag::err_target_invalid_feature) << Name;
2625      return 0;
2626    }
2627  }
2628
2629  // Add the features to the compile options.
2630  //
2631  // FIXME: If we are completely confident that we have the right set, we only
2632  // need to pass the minuses.
2633  Opts.Features.clear();
2634  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
2635         ie = Features.end(); it != ie; ++it)
2636    Opts.Features.push_back(std::string(it->second ? "+" : "-") + it->first());
2637  Target->HandleTargetFeatures(Opts.Features);
2638
2639  return Target.take();
2640}
2641