Targets.cpp revision 6e1d2eaa7d7f1008a5bac12f73fbf6167802a46d 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include "llvm/Support/ErrorHandling.h"
30#include "llvm/Type.h"
31#include <algorithm>
32using namespace clang;
33
34//===----------------------------------------------------------------------===//
35//  Common code shared among targets.
36//===----------------------------------------------------------------------===//
37
38/// DefineStd - Define a macro name and standard variants.  For example if
39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
40/// when in GNU mode.
41static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42                      const LangOptions &Opts) {
43  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44
45  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46  // in the user's namespace.
47  if (Opts.GNUMode)
48    Builder.defineMacro(MacroName);
49
50  // Define __unix.
51  Builder.defineMacro("__" + MacroName);
52
53  // Define __unix__.
54  Builder.defineMacro("__" + MacroName + "__");
55}
56
57static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName,
58                            bool Tuning = true) {
59  Builder.defineMacro("__" + CPUName);
60  Builder.defineMacro("__" + CPUName + "__");
61  if (Tuning)
62    Builder.defineMacro("__tune_" + CPUName + "__");
63}
64
65//===----------------------------------------------------------------------===//
66// Defines specific to certain operating systems.
67//===----------------------------------------------------------------------===//
68
69namespace {
70template<typename TgtInfo>
71class OSTargetInfo : public TgtInfo {
72protected:
73  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
74                            MacroBuilder &Builder) const=0;
75public:
76  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
77  virtual void getTargetDefines(const LangOptions &Opts,
78                                MacroBuilder &Builder) const {
79    TgtInfo::getTargetDefines(Opts, Builder);
80    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
81  }
82
83};
84} // end anonymous namespace
85
86
87static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
88                             const llvm::Triple &Triple,
89                             StringRef &PlatformName,
90                             VersionTuple &PlatformMinVersion) {
91  Builder.defineMacro("__APPLE_CC__", "5621");
92  Builder.defineMacro("__APPLE__");
93  Builder.defineMacro("__MACH__");
94  Builder.defineMacro("OBJC_NEW_PROPERTIES");
95
96  if (!Opts.ObjCAutoRefCount) {
97    // __weak is always defined, for use in blocks and with objc pointers.
98    Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
99
100    // Darwin defines __strong even in C mode (just to nothing).
101    if (Opts.getGC() != LangOptions::NonGC)
102      Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
103    else
104      Builder.defineMacro("__strong", "");
105
106    // __unsafe_unretained is defined to nothing in non-ARC mode. We even
107    // allow this in C, since one might have block pointers in structs that
108    // are used in pure C code and in Objective-C ARC.
109    Builder.defineMacro("__unsafe_unretained", "");
110  }
111
112  if (Opts.Static)
113    Builder.defineMacro("__STATIC__");
114  else
115    Builder.defineMacro("__DYNAMIC__");
116
117  if (Opts.POSIXThreads)
118    Builder.defineMacro("_REENTRANT");
119
120  // Get the platform type and version number from the triple.
121  unsigned Maj, Min, Rev;
122
123  // If no version was given, default to to 10.4.0, for simplifying tests.
124  if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") {
125    PlatformName = "macosx";
126    Min = Rev = 0;
127    Maj = 8;
128  } else {
129    // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]",
130    // "-osxNNN", and "-iosNNN").
131
132    if (Triple.getOS() == llvm::Triple::Darwin) {
133      // For historical reasons that make little sense, the version passed here
134      // is the "darwin" version, which drops the 10 and offsets by 4.
135      Triple.getOSVersion(Maj, Min, Rev);
136
137      if (Triple.getEnvironmentName() == "iphoneos") {
138        PlatformName = "ios";
139      } else {
140        PlatformName = "macosx";
141        Rev = Min;
142        Min = Maj - 4;
143        Maj = 10;
144      }
145    } else {
146      Triple.getOSVersion(Maj, Min, Rev);
147      PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
148    }
149  }
150
151  // If -target arch-pc-win32-macho option specified, we're
152  // generating code for Win32 ABI. No need to emit
153  // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
154  if (PlatformName == "win32") {
155    PlatformMinVersion = VersionTuple(Maj, Min, Rev);
156    return;
157  }
158
159  // Set the appropriate OS version define.
160  if (PlatformName == "ios") {
161    assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
162    char Str[6];
163    Str[0] = '0' + Maj;
164    Str[1] = '0' + (Min / 10);
165    Str[2] = '0' + (Min % 10);
166    Str[3] = '0' + (Rev / 10);
167    Str[4] = '0' + (Rev % 10);
168    Str[5] = '\0';
169    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
170  } else {
171    // Note that the Driver allows versions which aren't representable in the
172    // define (because we only get a single digit for the minor and micro
173    // revision numbers). So, we limit them to the maximum representable
174    // version.
175    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
176    assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
177    char Str[5];
178    Str[0] = '0' + (Maj / 10);
179    Str[1] = '0' + (Maj % 10);
180    Str[2] = '0' + std::min(Min, 9U);
181    Str[3] = '0' + std::min(Rev, 9U);
182    Str[4] = '\0';
183    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
184  }
185
186  PlatformMinVersion = VersionTuple(Maj, Min, Rev);
187}
188
189namespace {
190template<typename Target>
191class DarwinTargetInfo : public OSTargetInfo<Target> {
192protected:
193  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
194                            MacroBuilder &Builder) const {
195    getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
196                     this->PlatformMinVersion);
197  }
198
199public:
200  DarwinTargetInfo(const std::string& triple) :
201    OSTargetInfo<Target>(triple) {
202      llvm::Triple T = llvm::Triple(triple);
203      this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
204      this->MCountName = "\01mcount";
205    }
206
207  virtual std::string isValidSectionSpecifier(StringRef SR) const {
208    // Let MCSectionMachO validate this.
209    StringRef Segment, Section;
210    unsigned TAA, StubSize;
211    bool HasTAA;
212    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
213                                                       TAA, HasTAA, StubSize);
214  }
215
216  virtual const char *getStaticInitSectionSpecifier() const {
217    // FIXME: We should return 0 when building kexts.
218    return "__TEXT,__StaticInit,regular,pure_instructions";
219  }
220
221  /// Darwin does not support protected visibility.  Darwin's "default"
222  /// is very similar to ELF's "protected";  Darwin requires a "weak"
223  /// attribute on declarations that can be dynamically replaced.
224  virtual bool hasProtectedVisibility() const {
225    return false;
226  }
227};
228
229
230// DragonFlyBSD Target
231template<typename Target>
232class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
233protected:
234  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
235                            MacroBuilder &Builder) const {
236    // DragonFly defines; list based off of gcc output
237    Builder.defineMacro("__DragonFly__");
238    Builder.defineMacro("__DragonFly_cc_version", "100001");
239    Builder.defineMacro("__ELF__");
240    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
241    Builder.defineMacro("__tune_i386__");
242    DefineStd(Builder, "unix", Opts);
243  }
244public:
245  DragonFlyBSDTargetInfo(const std::string &triple)
246    : OSTargetInfo<Target>(triple) {}
247};
248
249// FreeBSD Target
250template<typename Target>
251class FreeBSDTargetInfo : public OSTargetInfo<Target> {
252protected:
253  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
254                            MacroBuilder &Builder) const {
255    // FreeBSD defines; list based off of gcc output
256
257    unsigned Release = Triple.getOSMajorVersion();
258    if (Release == 0U)
259      Release = 8;
260
261    Builder.defineMacro("__FreeBSD__", Twine(Release));
262    Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
263    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
264    DefineStd(Builder, "unix", Opts);
265    Builder.defineMacro("__ELF__");
266  }
267public:
268  FreeBSDTargetInfo(const std::string &triple)
269    : OSTargetInfo<Target>(triple) {
270      this->UserLabelPrefix = "";
271
272      llvm::Triple Triple(triple);
273      switch (Triple.getArch()) {
274        default:
275        case llvm::Triple::x86:
276        case llvm::Triple::x86_64:
277          this->MCountName = ".mcount";
278          break;
279        case llvm::Triple::mips:
280        case llvm::Triple::mipsel:
281        case llvm::Triple::ppc:
282        case llvm::Triple::ppc64:
283          this->MCountName = "_mcount";
284          break;
285        case llvm::Triple::arm:
286          this->MCountName = "__mcount";
287          break;
288      }
289
290    }
291};
292
293// Minix Target
294template<typename Target>
295class MinixTargetInfo : public OSTargetInfo<Target> {
296protected:
297  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
298                            MacroBuilder &Builder) const {
299    // Minix defines
300
301    Builder.defineMacro("__minix", "3");
302    Builder.defineMacro("_EM_WSIZE", "4");
303    Builder.defineMacro("_EM_PSIZE", "4");
304    Builder.defineMacro("_EM_SSIZE", "2");
305    Builder.defineMacro("_EM_LSIZE", "4");
306    Builder.defineMacro("_EM_FSIZE", "4");
307    Builder.defineMacro("_EM_DSIZE", "8");
308    Builder.defineMacro("__ELF__");
309    DefineStd(Builder, "unix", Opts);
310  }
311public:
312  MinixTargetInfo(const std::string &triple)
313    : OSTargetInfo<Target>(triple) {
314      this->UserLabelPrefix = "";
315    }
316};
317
318// Linux target
319template<typename Target>
320class LinuxTargetInfo : public OSTargetInfo<Target> {
321protected:
322  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
323                            MacroBuilder &Builder) const {
324    // Linux defines; list based off of gcc output
325    DefineStd(Builder, "unix", Opts);
326    DefineStd(Builder, "linux", Opts);
327    Builder.defineMacro("__gnu_linux__");
328    Builder.defineMacro("__ELF__");
329    if (Opts.POSIXThreads)
330      Builder.defineMacro("_REENTRANT");
331    if (Opts.CPlusPlus)
332      Builder.defineMacro("_GNU_SOURCE");
333  }
334public:
335  LinuxTargetInfo(const std::string& triple)
336    : OSTargetInfo<Target>(triple) {
337    this->UserLabelPrefix = "";
338    this->WIntType = TargetInfo::UnsignedInt;
339  }
340
341  virtual const char *getStaticInitSectionSpecifier() const {
342    return ".text.startup";
343  }
344};
345
346// NetBSD Target
347template<typename Target>
348class NetBSDTargetInfo : public OSTargetInfo<Target> {
349protected:
350  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
351                            MacroBuilder &Builder) const {
352    // NetBSD defines; list based off of gcc output
353    Builder.defineMacro("__NetBSD__");
354    Builder.defineMacro("__unix__");
355    Builder.defineMacro("__ELF__");
356    if (Opts.POSIXThreads)
357      Builder.defineMacro("_POSIX_THREADS");
358  }
359public:
360  NetBSDTargetInfo(const std::string &triple)
361    : OSTargetInfo<Target>(triple) {
362      this->UserLabelPrefix = "";
363    }
364};
365
366// OpenBSD Target
367template<typename Target>
368class OpenBSDTargetInfo : public OSTargetInfo<Target> {
369protected:
370  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
371                            MacroBuilder &Builder) const {
372    // OpenBSD defines; list based off of gcc output
373
374    Builder.defineMacro("__OpenBSD__");
375    DefineStd(Builder, "unix", Opts);
376    Builder.defineMacro("__ELF__");
377    if (Opts.POSIXThreads)
378      Builder.defineMacro("_POSIX_THREADS");
379  }
380public:
381  OpenBSDTargetInfo(const std::string &triple)
382    : OSTargetInfo<Target>(triple) {
383      this->UserLabelPrefix = "";
384
385      llvm::Triple Triple(triple);
386      switch (Triple.getArch()) {
387        default:
388        case llvm::Triple::x86:
389        case llvm::Triple::x86_64:
390        case llvm::Triple::arm:
391	case llvm::Triple::sparc:
392          this->MCountName = "__mcount";
393          break;
394        case llvm::Triple::mips64:
395        case llvm::Triple::mips64el:
396        case llvm::Triple::ppc:
397	case llvm::Triple::sparcv9:
398          this->MCountName = "_mcount";
399          break;
400      }
401  }
402};
403
404// PSP Target
405template<typename Target>
406class PSPTargetInfo : public OSTargetInfo<Target> {
407protected:
408  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
409                            MacroBuilder &Builder) const {
410    // PSP defines; list based on the output of the pspdev gcc toolchain.
411    Builder.defineMacro("PSP");
412    Builder.defineMacro("_PSP");
413    Builder.defineMacro("__psp__");
414    Builder.defineMacro("__ELF__");
415  }
416public:
417  PSPTargetInfo(const std::string& triple)
418    : OSTargetInfo<Target>(triple) {
419    this->UserLabelPrefix = "";
420  }
421};
422
423// PS3 PPU Target
424template<typename Target>
425class PS3PPUTargetInfo : public OSTargetInfo<Target> {
426protected:
427  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
428                            MacroBuilder &Builder) const {
429    // PS3 PPU defines.
430    Builder.defineMacro("__PPC__");
431    Builder.defineMacro("__PPU__");
432    Builder.defineMacro("__CELLOS_LV2__");
433    Builder.defineMacro("__ELF__");
434    Builder.defineMacro("__LP32__");
435    Builder.defineMacro("_ARCH_PPC64");
436    Builder.defineMacro("__powerpc64__");
437  }
438public:
439  PS3PPUTargetInfo(const std::string& triple)
440    : OSTargetInfo<Target>(triple) {
441    this->UserLabelPrefix = "";
442    this->LongWidth = this->LongAlign = 32;
443    this->PointerWidth = this->PointerAlign = 32;
444    this->IntMaxType = TargetInfo::SignedLongLong;
445    this->UIntMaxType = TargetInfo::UnsignedLongLong;
446    this->Int64Type = TargetInfo::SignedLongLong;
447    this->SizeType = TargetInfo::UnsignedInt;
448    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
449                              "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
450  }
451};
452
453// FIXME: Need a real SPU target.
454// PS3 SPU Target
455template<typename Target>
456class PS3SPUTargetInfo : public OSTargetInfo<Target> {
457protected:
458  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
459                            MacroBuilder &Builder) const {
460    // PS3 PPU defines.
461    Builder.defineMacro("__SPU__");
462    Builder.defineMacro("__ELF__");
463  }
464public:
465  PS3SPUTargetInfo(const std::string& triple)
466    : OSTargetInfo<Target>(triple) {
467    this->UserLabelPrefix = "";
468  }
469};
470
471// AuroraUX target
472template<typename Target>
473class AuroraUXTargetInfo : public OSTargetInfo<Target> {
474protected:
475  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
476                            MacroBuilder &Builder) const {
477    DefineStd(Builder, "sun", Opts);
478    DefineStd(Builder, "unix", Opts);
479    Builder.defineMacro("__ELF__");
480    Builder.defineMacro("__svr4__");
481    Builder.defineMacro("__SVR4");
482  }
483public:
484  AuroraUXTargetInfo(const std::string& triple)
485    : OSTargetInfo<Target>(triple) {
486    this->UserLabelPrefix = "";
487    this->WCharType = this->SignedLong;
488    // FIXME: WIntType should be SignedLong
489  }
490};
491
492// Solaris target
493template<typename Target>
494class SolarisTargetInfo : public OSTargetInfo<Target> {
495protected:
496  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
497                            MacroBuilder &Builder) const {
498    DefineStd(Builder, "sun", Opts);
499    DefineStd(Builder, "unix", Opts);
500    Builder.defineMacro("__ELF__");
501    Builder.defineMacro("__svr4__");
502    Builder.defineMacro("__SVR4");
503  }
504public:
505  SolarisTargetInfo(const std::string& triple)
506    : OSTargetInfo<Target>(triple) {
507    this->UserLabelPrefix = "";
508    this->WCharType = this->SignedLong;
509    // FIXME: WIntType should be SignedLong
510  }
511};
512
513// Windows target
514template<typename Target>
515class WindowsTargetInfo : public OSTargetInfo<Target> {
516protected:
517  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
518                            MacroBuilder &Builder) const {
519    Builder.defineMacro("_WIN32");
520  }
521  void getVisualStudioDefines(const LangOptions &Opts,
522                              MacroBuilder &Builder) const {
523    if (Opts.CPlusPlus) {
524      if (Opts.RTTI)
525        Builder.defineMacro("_CPPRTTI");
526
527      if (Opts.Exceptions)
528        Builder.defineMacro("_CPPUNWIND");
529    }
530
531    if (!Opts.CharIsSigned)
532      Builder.defineMacro("_CHAR_UNSIGNED");
533
534    // FIXME: POSIXThreads isn't exactly the option this should be defined for,
535    //        but it works for now.
536    if (Opts.POSIXThreads)
537      Builder.defineMacro("_MT");
538
539    if (Opts.MSCVersion != 0)
540      Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
541
542    if (Opts.MicrosoftExt) {
543      Builder.defineMacro("_MSC_EXTENSIONS");
544
545      if (Opts.CPlusPlus0x) {
546        Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
547        Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
548        Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
549      }
550    }
551
552    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
553  }
554
555public:
556  WindowsTargetInfo(const std::string &triple)
557    : OSTargetInfo<Target>(triple) {}
558};
559
560} // end anonymous namespace.
561
562//===----------------------------------------------------------------------===//
563// Specific target implementations.
564//===----------------------------------------------------------------------===//
565
566namespace {
567// PPC abstract base class
568class PPCTargetInfo : public TargetInfo {
569  static const Builtin::Info BuiltinInfo[];
570  static const char * const GCCRegNames[];
571  static const TargetInfo::GCCRegAlias GCCRegAliases[];
572public:
573  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {
574    LongDoubleWidth = LongDoubleAlign = 128;
575    LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
576  }
577
578  virtual void getTargetBuiltins(const Builtin::Info *&Records,
579                                 unsigned &NumRecords) const {
580    Records = BuiltinInfo;
581    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
582  }
583
584  virtual bool isCLZForZeroUndef() const { return false; }
585
586  virtual void getTargetDefines(const LangOptions &Opts,
587                                MacroBuilder &Builder) const;
588
589  virtual bool hasFeature(StringRef Feature) const;
590
591  virtual void getGCCRegNames(const char * const *&Names,
592                              unsigned &NumNames) const;
593  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
594                                unsigned &NumAliases) const;
595  virtual bool validateAsmConstraint(const char *&Name,
596                                     TargetInfo::ConstraintInfo &Info) const {
597    switch (*Name) {
598    default: return false;
599    case 'O': // Zero
600      break;
601    case 'b': // Base register
602    case 'f': // Floating point register
603      Info.setAllowsRegister();
604      break;
605    // FIXME: The following are added to allow parsing.
606    // I just took a guess at what the actions should be.
607    // Also, is more specific checking needed?  I.e. specific registers?
608    case 'd': // Floating point register (containing 64-bit value)
609    case 'v': // Altivec vector register
610      Info.setAllowsRegister();
611      break;
612    case 'w':
613      switch (Name[1]) {
614        case 'd':// VSX vector register to hold vector double data
615        case 'f':// VSX vector register to hold vector float data
616        case 's':// VSX vector register to hold scalar float data
617        case 'a':// Any VSX register
618          break;
619        default:
620          return false;
621      }
622      Info.setAllowsRegister();
623      Name++; // Skip over 'w'.
624      break;
625    case 'h': // `MQ', `CTR', or `LINK' register
626    case 'q': // `MQ' register
627    case 'c': // `CTR' register
628    case 'l': // `LINK' register
629    case 'x': // `CR' register (condition register) number 0
630    case 'y': // `CR' register (condition register)
631    case 'z': // `XER[CA]' carry bit (part of the XER register)
632      Info.setAllowsRegister();
633      break;
634    case 'I': // Signed 16-bit constant
635    case 'J': // Unsigned 16-bit constant shifted left 16 bits
636              //  (use `L' instead for SImode constants)
637    case 'K': // Unsigned 16-bit constant
638    case 'L': // Signed 16-bit constant shifted left 16 bits
639    case 'M': // Constant larger than 31
640    case 'N': // Exact power of 2
641    case 'P': // Constant whose negation is a signed 16-bit constant
642    case 'G': // Floating point constant that can be loaded into a
643              // register with one instruction per word
644    case 'H': // Integer/Floating point constant that can be loaded
645              // into a register using three instructions
646      break;
647    case 'm': // Memory operand. Note that on PowerPC targets, m can
648              // include addresses that update the base register. It
649              // is therefore only safe to use `m' in an asm statement
650              // if that asm statement accesses the operand exactly once.
651              // The asm statement must also use `%U<opno>' as a
652              // placeholder for the "update" flag in the corresponding
653              // load or store instruction. For example:
654              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
655              // is correct but:
656              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
657              // is not. Use es rather than m if you don't want the base
658              // register to be updated.
659    case 'e':
660      if (Name[1] != 's')
661          return false;
662              // es: A "stable" memory operand; that is, one which does not
663              // include any automodification of the base register. Unlike
664              // `m', this constraint can be used in asm statements that
665              // might access the operand several times, or that might not
666              // access it at all.
667      Info.setAllowsMemory();
668      Name++; // Skip over 'e'.
669      break;
670    case 'Q': // Memory operand that is an offset from a register (it is
671              // usually better to use `m' or `es' in asm statements)
672    case 'Z': // Memory operand that is an indexed or indirect from a
673              // register (it is usually better to use `m' or `es' in
674              // asm statements)
675      Info.setAllowsMemory();
676      Info.setAllowsRegister();
677      break;
678    case 'R': // AIX TOC entry
679    case 'a': // Address operand that is an indexed or indirect from a
680              // register (`p' is preferable for asm statements)
681    case 'S': // Constant suitable as a 64-bit mask operand
682    case 'T': // Constant suitable as a 32-bit mask operand
683    case 'U': // System V Release 4 small data area reference
684    case 't': // AND masks that can be performed by two rldic{l, r}
685              // instructions
686    case 'W': // Vector constant that does not require memory
687    case 'j': // Vector constant that is all zeros.
688      break;
689    // End FIXME.
690    }
691    return true;
692  }
693  virtual const char *getClobbers() const {
694    return "";
695  }
696};
697
698const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
699#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
700#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
701                                              ALL_LANGUAGES },
702#include "clang/Basic/BuiltinsPPC.def"
703};
704
705
706/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
707/// #defines that are not tied to a specific subtarget.
708void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
709                                     MacroBuilder &Builder) const {
710  // Target identification.
711  Builder.defineMacro("__ppc__");
712  Builder.defineMacro("_ARCH_PPC");
713  Builder.defineMacro("__powerpc__");
714  Builder.defineMacro("__POWERPC__");
715  if (PointerWidth == 64) {
716    Builder.defineMacro("_ARCH_PPC64");
717    Builder.defineMacro("_LP64");
718    Builder.defineMacro("__LP64__");
719    Builder.defineMacro("__powerpc64__");
720    Builder.defineMacro("__ppc64__");
721  } else {
722    Builder.defineMacro("__ppc__");
723  }
724
725  // Target properties.
726  if (getTriple().getOS() != llvm::Triple::NetBSD)
727    Builder.defineMacro("_BIG_ENDIAN");
728  Builder.defineMacro("__BIG_ENDIAN__");
729
730  // Subtarget options.
731  Builder.defineMacro("__NATURAL_ALIGNMENT__");
732  Builder.defineMacro("__REGISTER_PREFIX__", "");
733
734  // FIXME: Should be controlled by command line option.
735  Builder.defineMacro("__LONG_DOUBLE_128__");
736
737  if (Opts.AltiVec) {
738    Builder.defineMacro("__VEC__", "10206");
739    Builder.defineMacro("__ALTIVEC__");
740  }
741}
742
743bool PPCTargetInfo::hasFeature(StringRef Feature) const {
744  return Feature == "powerpc";
745}
746
747
748const char * const PPCTargetInfo::GCCRegNames[] = {
749  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
750  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
751  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
752  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
753  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
754  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
755  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
756  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
757  "mq", "lr", "ctr", "ap",
758  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
759  "xer",
760  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
761  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
762  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
763  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
764  "vrsave", "vscr",
765  "spe_acc", "spefscr",
766  "sfp"
767};
768
769void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
770                                   unsigned &NumNames) const {
771  Names = GCCRegNames;
772  NumNames = llvm::array_lengthof(GCCRegNames);
773}
774
775const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
776  // While some of these aliases do map to different registers
777  // they still share the same register name.
778  { { "0" }, "r0" },
779  { { "1"}, "r1" },
780  { { "2" }, "r2" },
781  { { "3" }, "r3" },
782  { { "4" }, "r4" },
783  { { "5" }, "r5" },
784  { { "6" }, "r6" },
785  { { "7" }, "r7" },
786  { { "8" }, "r8" },
787  { { "9" }, "r9" },
788  { { "10" }, "r10" },
789  { { "11" }, "r11" },
790  { { "12" }, "r12" },
791  { { "13" }, "r13" },
792  { { "14" }, "r14" },
793  { { "15" }, "r15" },
794  { { "16" }, "r16" },
795  { { "17" }, "r17" },
796  { { "18" }, "r18" },
797  { { "19" }, "r19" },
798  { { "20" }, "r20" },
799  { { "21" }, "r21" },
800  { { "22" }, "r22" },
801  { { "23" }, "r23" },
802  { { "24" }, "r24" },
803  { { "25" }, "r25" },
804  { { "26" }, "r26" },
805  { { "27" }, "r27" },
806  { { "28" }, "r28" },
807  { { "29" }, "r29" },
808  { { "30" }, "r30" },
809  { { "31" }, "r31" },
810  { { "fr0" }, "f0" },
811  { { "fr1" }, "f1" },
812  { { "fr2" }, "f2" },
813  { { "fr3" }, "f3" },
814  { { "fr4" }, "f4" },
815  { { "fr5" }, "f5" },
816  { { "fr6" }, "f6" },
817  { { "fr7" }, "f7" },
818  { { "fr8" }, "f8" },
819  { { "fr9" }, "f9" },
820  { { "fr10" }, "f10" },
821  { { "fr11" }, "f11" },
822  { { "fr12" }, "f12" },
823  { { "fr13" }, "f13" },
824  { { "fr14" }, "f14" },
825  { { "fr15" }, "f15" },
826  { { "fr16" }, "f16" },
827  { { "fr17" }, "f17" },
828  { { "fr18" }, "f18" },
829  { { "fr19" }, "f19" },
830  { { "fr20" }, "f20" },
831  { { "fr21" }, "f21" },
832  { { "fr22" }, "f22" },
833  { { "fr23" }, "f23" },
834  { { "fr24" }, "f24" },
835  { { "fr25" }, "f25" },
836  { { "fr26" }, "f26" },
837  { { "fr27" }, "f27" },
838  { { "fr28" }, "f28" },
839  { { "fr29" }, "f29" },
840  { { "fr30" }, "f30" },
841  { { "fr31" }, "f31" },
842  { { "cc" }, "cr0" },
843};
844
845void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
846                                     unsigned &NumAliases) const {
847  Aliases = GCCRegAliases;
848  NumAliases = llvm::array_lengthof(GCCRegAliases);
849}
850} // end anonymous namespace.
851
852namespace {
853class PPC32TargetInfo : public PPCTargetInfo {
854public:
855  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
856    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
857                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
858
859    switch (getTriple().getOS()) {
860    case llvm::Triple::Linux:
861    case llvm::Triple::FreeBSD:
862    case llvm::Triple::NetBSD:
863      SizeType = UnsignedInt;
864      break;
865    default:
866      break;
867    }
868  }
869
870  virtual const char *getVAListDeclaration() const {
871    // This is the ELF definition, and is overridden by the Darwin sub-target
872    return "typedef struct __va_list_tag {"
873           "  unsigned char gpr;"
874           "  unsigned char fpr;"
875           "  unsigned short reserved;"
876           "  void* overflow_arg_area;"
877           "  void* reg_save_area;"
878           "} __builtin_va_list[1];";
879  }
880};
881} // end anonymous namespace.
882
883namespace {
884class PPC64TargetInfo : public PPCTargetInfo {
885public:
886  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
887    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
888    IntMaxType = SignedLong;
889    UIntMaxType = UnsignedLong;
890    Int64Type = SignedLong;
891    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
892                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
893  }
894  virtual const char *getVAListDeclaration() const {
895    return "typedef char* __builtin_va_list;";
896  }
897};
898} // end anonymous namespace.
899
900
901namespace {
902class DarwinPPC32TargetInfo :
903  public DarwinTargetInfo<PPC32TargetInfo> {
904public:
905  DarwinPPC32TargetInfo(const std::string& triple)
906    : DarwinTargetInfo<PPC32TargetInfo>(triple) {
907    HasAlignMac68kSupport = true;
908    BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
909    LongLongAlign = 32;
910    SuitableAlign = 128;
911    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
912                        "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32";
913  }
914  virtual const char *getVAListDeclaration() const {
915    return "typedef char* __builtin_va_list;";
916  }
917};
918
919class DarwinPPC64TargetInfo :
920  public DarwinTargetInfo<PPC64TargetInfo> {
921public:
922  DarwinPPC64TargetInfo(const std::string& triple)
923    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
924    HasAlignMac68kSupport = true;
925    SuitableAlign = 128;
926  }
927};
928} // end anonymous namespace.
929
930namespace {
931  static const unsigned PTXAddrSpaceMap[] = {
932    0,    // opencl_global
933    4,    // opencl_local
934    1     // opencl_constant
935  };
936  class PTXTargetInfo : public TargetInfo {
937    static const char * const GCCRegNames[];
938    static const Builtin::Info BuiltinInfo[];
939    std::vector<llvm::StringRef> AvailableFeatures;
940  public:
941    PTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
942      BigEndian = false;
943      TLSSupported = false;
944      LongWidth = LongAlign = 64;
945      AddrSpaceMap = &PTXAddrSpaceMap;
946      // Define available target features
947      // These must be defined in sorted order!
948      AvailableFeatures.push_back("compute10");
949      AvailableFeatures.push_back("compute11");
950      AvailableFeatures.push_back("compute12");
951      AvailableFeatures.push_back("compute13");
952      AvailableFeatures.push_back("compute20");
953      AvailableFeatures.push_back("double");
954      AvailableFeatures.push_back("no-fma");
955      AvailableFeatures.push_back("ptx20");
956      AvailableFeatures.push_back("ptx21");
957      AvailableFeatures.push_back("ptx22");
958      AvailableFeatures.push_back("ptx23");
959      AvailableFeatures.push_back("sm10");
960      AvailableFeatures.push_back("sm11");
961      AvailableFeatures.push_back("sm12");
962      AvailableFeatures.push_back("sm13");
963      AvailableFeatures.push_back("sm20");
964      AvailableFeatures.push_back("sm21");
965      AvailableFeatures.push_back("sm22");
966      AvailableFeatures.push_back("sm23");
967    }
968    virtual void getTargetDefines(const LangOptions &Opts,
969                                  MacroBuilder &Builder) const {
970      Builder.defineMacro("__PTX__");
971    }
972    virtual void getTargetBuiltins(const Builtin::Info *&Records,
973                                   unsigned &NumRecords) const {
974      Records = BuiltinInfo;
975      NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
976    }
977    virtual bool hasFeature(StringRef Feature) const {
978      return Feature == "ptx";
979    }
980
981    virtual void getGCCRegNames(const char * const *&Names,
982                                unsigned &NumNames) const;
983    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
984                                  unsigned &NumAliases) const {
985      // No aliases.
986      Aliases = 0;
987      NumAliases = 0;
988    }
989    virtual bool validateAsmConstraint(const char *&Name,
990                                       TargetInfo::ConstraintInfo &info) const {
991      // FIXME: implement
992      return true;
993    }
994    virtual const char *getClobbers() const {
995      // FIXME: Is this really right?
996      return "";
997    }
998    virtual const char *getVAListDeclaration() const {
999      // FIXME: implement
1000      return "typedef char* __builtin_va_list;";
1001    }
1002
1003    virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1004                                   const std::string &Name,
1005                                   bool Enabled) const;
1006  };
1007
1008  const Builtin::Info PTXTargetInfo::BuiltinInfo[] = {
1009#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1010#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1011                                              ALL_LANGUAGES },
1012#include "clang/Basic/BuiltinsPTX.def"
1013  };
1014
1015  const char * const PTXTargetInfo::GCCRegNames[] = {
1016    "r0"
1017  };
1018
1019  void PTXTargetInfo::getGCCRegNames(const char * const *&Names,
1020                                     unsigned &NumNames) const {
1021    Names = GCCRegNames;
1022    NumNames = llvm::array_lengthof(GCCRegNames);
1023  }
1024
1025  bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1026                                        const std::string &Name,
1027                                        bool Enabled) const {
1028    if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
1029                          Name)) {
1030      Features[Name] = Enabled;
1031      return true;
1032    } else {
1033      return false;
1034    }
1035  }
1036
1037  class PTX32TargetInfo : public PTXTargetInfo {
1038  public:
1039  PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
1040      PointerWidth = PointerAlign = 32;
1041      SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1042      DescriptionString
1043        = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64";
1044    }
1045  };
1046
1047  class PTX64TargetInfo : public PTXTargetInfo {
1048  public:
1049  PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
1050      PointerWidth = PointerAlign = 64;
1051      SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1052      DescriptionString
1053        = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64";
1054    }
1055  };
1056}
1057
1058namespace {
1059// MBlaze abstract base class
1060class MBlazeTargetInfo : public TargetInfo {
1061  static const char * const GCCRegNames[];
1062  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1063
1064public:
1065  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1066    DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1067  }
1068
1069  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1070                                 unsigned &NumRecords) const {
1071    // FIXME: Implement.
1072    Records = 0;
1073    NumRecords = 0;
1074  }
1075
1076  virtual void getTargetDefines(const LangOptions &Opts,
1077                                MacroBuilder &Builder) const;
1078
1079  virtual bool hasFeature(StringRef Feature) const {
1080    return Feature == "mblaze";
1081  }
1082
1083  virtual const char *getVAListDeclaration() const {
1084    return "typedef char* __builtin_va_list;";
1085  }
1086  virtual const char *getTargetPrefix() const {
1087    return "mblaze";
1088  }
1089  virtual void getGCCRegNames(const char * const *&Names,
1090                              unsigned &NumNames) const;
1091  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1092                                unsigned &NumAliases) const;
1093  virtual bool validateAsmConstraint(const char *&Name,
1094                                     TargetInfo::ConstraintInfo &Info) const {
1095    switch (*Name) {
1096    default: return false;
1097    case 'O': // Zero
1098      return true;
1099    case 'b': // Base register
1100    case 'f': // Floating point register
1101      Info.setAllowsRegister();
1102      return true;
1103    }
1104  }
1105  virtual const char *getClobbers() const {
1106    return "";
1107  }
1108};
1109
1110/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1111/// #defines that are not tied to a specific subtarget.
1112void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1113                                     MacroBuilder &Builder) const {
1114  // Target identification.
1115  Builder.defineMacro("__microblaze__");
1116  Builder.defineMacro("_ARCH_MICROBLAZE");
1117  Builder.defineMacro("__MICROBLAZE__");
1118
1119  // Target properties.
1120  Builder.defineMacro("_BIG_ENDIAN");
1121  Builder.defineMacro("__BIG_ENDIAN__");
1122
1123  // Subtarget options.
1124  Builder.defineMacro("__REGISTER_PREFIX__", "");
1125}
1126
1127
1128const char * const MBlazeTargetInfo::GCCRegNames[] = {
1129  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
1130  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
1131  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
1132  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
1133  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
1134  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1135  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1136  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1137  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1138  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
1139};
1140
1141void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1142                                   unsigned &NumNames) const {
1143  Names = GCCRegNames;
1144  NumNames = llvm::array_lengthof(GCCRegNames);
1145}
1146
1147const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1148  { {"f0"},  "r0" },
1149  { {"f1"},  "r1" },
1150  { {"f2"},  "r2" },
1151  { {"f3"},  "r3" },
1152  { {"f4"},  "r4" },
1153  { {"f5"},  "r5" },
1154  { {"f6"},  "r6" },
1155  { {"f7"},  "r7" },
1156  { {"f8"},  "r8" },
1157  { {"f9"},  "r9" },
1158  { {"f10"}, "r10" },
1159  { {"f11"}, "r11" },
1160  { {"f12"}, "r12" },
1161  { {"f13"}, "r13" },
1162  { {"f14"}, "r14" },
1163  { {"f15"}, "r15" },
1164  { {"f16"}, "r16" },
1165  { {"f17"}, "r17" },
1166  { {"f18"}, "r18" },
1167  { {"f19"}, "r19" },
1168  { {"f20"}, "r20" },
1169  { {"f21"}, "r21" },
1170  { {"f22"}, "r22" },
1171  { {"f23"}, "r23" },
1172  { {"f24"}, "r24" },
1173  { {"f25"}, "r25" },
1174  { {"f26"}, "r26" },
1175  { {"f27"}, "r27" },
1176  { {"f28"}, "r28" },
1177  { {"f29"}, "r29" },
1178  { {"f30"}, "r30" },
1179  { {"f31"}, "r31" },
1180};
1181
1182void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1183                                     unsigned &NumAliases) const {
1184  Aliases = GCCRegAliases;
1185  NumAliases = llvm::array_lengthof(GCCRegAliases);
1186}
1187} // end anonymous namespace.
1188
1189namespace {
1190// Namespace for x86 abstract base class
1191const Builtin::Info BuiltinInfo[] = {
1192#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1193#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1194                                              ALL_LANGUAGES },
1195#include "clang/Basic/BuiltinsX86.def"
1196};
1197
1198static const char* const GCCRegNames[] = {
1199  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1200  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1201  "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1202  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1203  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1204  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1205  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1206  "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1207  "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1208};
1209
1210const TargetInfo::AddlRegName AddlRegNames[] = {
1211  { { "al", "ah", "eax", "rax" }, 0 },
1212  { { "bl", "bh", "ebx", "rbx" }, 3 },
1213  { { "cl", "ch", "ecx", "rcx" }, 2 },
1214  { { "dl", "dh", "edx", "rdx" }, 1 },
1215  { { "esi", "rsi" }, 4 },
1216  { { "edi", "rdi" }, 5 },
1217  { { "esp", "rsp" }, 7 },
1218  { { "ebp", "rbp" }, 6 },
1219};
1220
1221// X86 target abstract base class; x86-32 and x86-64 are very close, so
1222// most of the implementation can be shared.
1223class X86TargetInfo : public TargetInfo {
1224  enum X86SSEEnum {
1225    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1226  } SSELevel;
1227  enum MMX3DNowEnum {
1228    NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1229  } MMX3DNowLevel;
1230
1231  bool HasAES;
1232  bool HasLZCNT;
1233  bool HasBMI;
1234  bool HasBMI2;
1235  bool HasPOPCNT;
1236  bool HasFMA4;
1237
1238  /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1239  ///
1240  /// Each enumeration represents a particular CPU supported by Clang. These
1241  /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1242  enum CPUKind {
1243    CK_Generic,
1244
1245    /// \name i386
1246    /// i386-generation processors.
1247    //@{
1248    CK_i386,
1249    //@}
1250
1251    /// \name i486
1252    /// i486-generation processors.
1253    //@{
1254    CK_i486,
1255    CK_WinChipC6,
1256    CK_WinChip2,
1257    CK_C3,
1258    //@}
1259
1260    /// \name i586
1261    /// i586-generation processors, P5 microarchitecture based.
1262    //@{
1263    CK_i586,
1264    CK_Pentium,
1265    CK_PentiumMMX,
1266    //@}
1267
1268    /// \name i686
1269    /// i686-generation processors, P6 / Pentium M microarchitecture based.
1270    //@{
1271    CK_i686,
1272    CK_PentiumPro,
1273    CK_Pentium2,
1274    CK_Pentium3,
1275    CK_Pentium3M,
1276    CK_PentiumM,
1277    CK_C3_2,
1278
1279    /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1280    /// Clang however has some logic to suport this.
1281    // FIXME: Warn, deprecate, and potentially remove this.
1282    CK_Yonah,
1283    //@}
1284
1285    /// \name Netburst
1286    /// Netburst microarchitecture based processors.
1287    //@{
1288    CK_Pentium4,
1289    CK_Pentium4M,
1290    CK_Prescott,
1291    CK_Nocona,
1292    //@}
1293
1294    /// \name Core
1295    /// Core microarchitecture based processors.
1296    //@{
1297    CK_Core2,
1298
1299    /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1300    /// codename which GCC no longer accepts as an option to -march, but Clang
1301    /// has some logic for recognizing it.
1302    // FIXME: Warn, deprecate, and potentially remove this.
1303    CK_Penryn,
1304    //@}
1305
1306    /// \name Atom
1307    /// Atom processors
1308    //@{
1309    CK_Atom,
1310    //@}
1311
1312    /// \name Nehalem
1313    /// Nehalem microarchitecture based processors.
1314    //@{
1315    CK_Corei7,
1316    CK_Corei7AVX,
1317    CK_CoreAVXi,
1318    CK_CoreAVX2,
1319    //@}
1320
1321    /// \name K6
1322    /// K6 architecture processors.
1323    //@{
1324    CK_K6,
1325    CK_K6_2,
1326    CK_K6_3,
1327    //@}
1328
1329    /// \name K7
1330    /// K7 architecture processors.
1331    //@{
1332    CK_Athlon,
1333    CK_AthlonThunderbird,
1334    CK_Athlon4,
1335    CK_AthlonXP,
1336    CK_AthlonMP,
1337    //@}
1338
1339    /// \name K8
1340    /// K8 architecture processors.
1341    //@{
1342    CK_Athlon64,
1343    CK_Athlon64SSE3,
1344    CK_AthlonFX,
1345    CK_K8,
1346    CK_K8SSE3,
1347    CK_Opteron,
1348    CK_OpteronSSE3,
1349    CK_AMDFAM10,
1350    //@}
1351
1352    /// \name Bobcat
1353    /// Bobcat architecture processors.
1354    //@{
1355    CK_BTVER1,
1356    //@}
1357
1358    /// \name Bulldozer
1359    /// Bulldozer architecture processors.
1360    //@{
1361    CK_BDVER1,
1362    CK_BDVER2,
1363    //@}
1364
1365    /// This specification is deprecated and will be removed in the future.
1366    /// Users should prefer \see CK_K8.
1367    // FIXME: Warn on this when the CPU is set to it.
1368    CK_x86_64,
1369    //@}
1370
1371    /// \name Geode
1372    /// Geode processors.
1373    //@{
1374    CK_Geode
1375    //@}
1376  } CPU;
1377
1378public:
1379  X86TargetInfo(const std::string& triple)
1380    : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1381      HasAES(false), HasLZCNT(false), HasBMI(false), HasBMI2(false),
1382      HasPOPCNT(false), HasFMA4(false), CPU(CK_Generic) {
1383    BigEndian = false;
1384    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1385  }
1386  virtual unsigned getFloatEvalMethod() const {
1387    // X87 evaluates with 80 bits "long double" precision.
1388    return SSELevel == NoSSE ? 2 : 0;
1389  }
1390  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1391                                 unsigned &NumRecords) const {
1392    Records = BuiltinInfo;
1393    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1394  }
1395  virtual void getGCCRegNames(const char * const *&Names,
1396                              unsigned &NumNames) const {
1397    Names = GCCRegNames;
1398    NumNames = llvm::array_lengthof(GCCRegNames);
1399  }
1400  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1401                                unsigned &NumAliases) const {
1402    Aliases = 0;
1403    NumAliases = 0;
1404  }
1405  virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1406				  unsigned &NumNames) const {
1407    Names = AddlRegNames;
1408    NumNames = llvm::array_lengthof(AddlRegNames);
1409  }
1410  virtual bool validateAsmConstraint(const char *&Name,
1411                                     TargetInfo::ConstraintInfo &info) const;
1412  virtual std::string convertConstraint(const char *&Constraint) const;
1413  virtual const char *getClobbers() const {
1414    return "~{dirflag},~{fpsr},~{flags}";
1415  }
1416  virtual void getTargetDefines(const LangOptions &Opts,
1417                                MacroBuilder &Builder) const;
1418  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1419                                 const std::string &Name,
1420                                 bool Enabled) const;
1421  virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1422  virtual bool hasFeature(StringRef Feature) const;
1423  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1424  virtual const char* getABI() const {
1425    if (PointerWidth == 64 && SSELevel >= AVX)
1426      return "avx";
1427    else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow)
1428      return "no-mmx";
1429    return "";
1430  }
1431  virtual bool setCPU(const std::string &Name) {
1432    CPU = llvm::StringSwitch<CPUKind>(Name)
1433      .Case("i386", CK_i386)
1434      .Case("i486", CK_i486)
1435      .Case("winchip-c6", CK_WinChipC6)
1436      .Case("winchip2", CK_WinChip2)
1437      .Case("c3", CK_C3)
1438      .Case("i586", CK_i586)
1439      .Case("pentium", CK_Pentium)
1440      .Case("pentium-mmx", CK_PentiumMMX)
1441      .Case("i686", CK_i686)
1442      .Case("pentiumpro", CK_PentiumPro)
1443      .Case("pentium2", CK_Pentium2)
1444      .Case("pentium3", CK_Pentium3)
1445      .Case("pentium3m", CK_Pentium3M)
1446      .Case("pentium-m", CK_PentiumM)
1447      .Case("c3-2", CK_C3_2)
1448      .Case("yonah", CK_Yonah)
1449      .Case("pentium4", CK_Pentium4)
1450      .Case("pentium4m", CK_Pentium4M)
1451      .Case("prescott", CK_Prescott)
1452      .Case("nocona", CK_Nocona)
1453      .Case("core2", CK_Core2)
1454      .Case("penryn", CK_Penryn)
1455      .Case("atom", CK_Atom)
1456      .Case("corei7", CK_Corei7)
1457      .Case("corei7-avx", CK_Corei7AVX)
1458      .Case("core-avx-i", CK_CoreAVXi)
1459      .Case("core-avx2", CK_CoreAVX2)
1460      .Case("k6", CK_K6)
1461      .Case("k6-2", CK_K6_2)
1462      .Case("k6-3", CK_K6_3)
1463      .Case("athlon", CK_Athlon)
1464      .Case("athlon-tbird", CK_AthlonThunderbird)
1465      .Case("athlon-4", CK_Athlon4)
1466      .Case("athlon-xp", CK_AthlonXP)
1467      .Case("athlon-mp", CK_AthlonMP)
1468      .Case("athlon64", CK_Athlon64)
1469      .Case("athlon64-sse3", CK_Athlon64SSE3)
1470      .Case("athlon-fx", CK_AthlonFX)
1471      .Case("k8", CK_K8)
1472      .Case("k8-sse3", CK_K8SSE3)
1473      .Case("opteron", CK_Opteron)
1474      .Case("opteron-sse3", CK_OpteronSSE3)
1475      .Case("amdfam10", CK_AMDFAM10)
1476      .Case("btver1", CK_BTVER1)
1477      .Case("bdver1", CK_BDVER1)
1478      .Case("bdver2", CK_BDVER2)
1479      .Case("x86-64", CK_x86_64)
1480      .Case("geode", CK_Geode)
1481      .Default(CK_Generic);
1482
1483    // Perform any per-CPU checks necessary to determine if this CPU is
1484    // acceptable.
1485    // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1486    // invalid without explaining *why*.
1487    switch (CPU) {
1488    case CK_Generic:
1489      // No processor selected!
1490      return false;
1491
1492    case CK_i386:
1493    case CK_i486:
1494    case CK_WinChipC6:
1495    case CK_WinChip2:
1496    case CK_C3:
1497    case CK_i586:
1498    case CK_Pentium:
1499    case CK_PentiumMMX:
1500    case CK_i686:
1501    case CK_PentiumPro:
1502    case CK_Pentium2:
1503    case CK_Pentium3:
1504    case CK_Pentium3M:
1505    case CK_PentiumM:
1506    case CK_Yonah:
1507    case CK_C3_2:
1508    case CK_Pentium4:
1509    case CK_Pentium4M:
1510    case CK_Prescott:
1511    case CK_K6:
1512    case CK_K6_2:
1513    case CK_K6_3:
1514    case CK_Athlon:
1515    case CK_AthlonThunderbird:
1516    case CK_Athlon4:
1517    case CK_AthlonXP:
1518    case CK_AthlonMP:
1519    case CK_Geode:
1520      // Only accept certain architectures when compiling in 32-bit mode.
1521      if (PointerWidth != 32)
1522        return false;
1523
1524      // Fallthrough
1525    case CK_Nocona:
1526    case CK_Core2:
1527    case CK_Penryn:
1528    case CK_Atom:
1529    case CK_Corei7:
1530    case CK_Corei7AVX:
1531    case CK_CoreAVXi:
1532    case CK_CoreAVX2:
1533    case CK_Athlon64:
1534    case CK_Athlon64SSE3:
1535    case CK_AthlonFX:
1536    case CK_K8:
1537    case CK_K8SSE3:
1538    case CK_Opteron:
1539    case CK_OpteronSSE3:
1540    case CK_AMDFAM10:
1541    case CK_BTVER1:
1542    case CK_BDVER1:
1543    case CK_BDVER2:
1544    case CK_x86_64:
1545      return true;
1546    }
1547    llvm_unreachable("Unhandled CPU kind");
1548  }
1549};
1550
1551void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1552  // FIXME: This should not be here.
1553  Features["3dnow"] = false;
1554  Features["3dnowa"] = false;
1555  Features["mmx"] = false;
1556  Features["sse"] = false;
1557  Features["sse2"] = false;
1558  Features["sse3"] = false;
1559  Features["ssse3"] = false;
1560  Features["sse41"] = false;
1561  Features["sse42"] = false;
1562  Features["sse4a"] = false;
1563  Features["aes"] = false;
1564  Features["avx"] = false;
1565  Features["avx2"] = false;
1566  Features["lzcnt"] = false;
1567  Features["bmi"] = false;
1568  Features["bmi2"] = false;
1569  Features["popcnt"] = false;
1570  Features["fma4"] = false;
1571
1572  // FIXME: This *really* should not be here.
1573
1574  // X86_64 always has SSE2.
1575  if (PointerWidth == 64)
1576    Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1577
1578  switch (CPU) {
1579  case CK_Generic:
1580  case CK_i386:
1581  case CK_i486:
1582  case CK_i586:
1583  case CK_Pentium:
1584  case CK_i686:
1585  case CK_PentiumPro:
1586    break;
1587  case CK_PentiumMMX:
1588  case CK_Pentium2:
1589    setFeatureEnabled(Features, "mmx", true);
1590    break;
1591  case CK_Pentium3:
1592  case CK_Pentium3M:
1593    setFeatureEnabled(Features, "mmx", true);
1594    setFeatureEnabled(Features, "sse", true);
1595    break;
1596  case CK_PentiumM:
1597  case CK_Pentium4:
1598  case CK_Pentium4M:
1599  case CK_x86_64:
1600    setFeatureEnabled(Features, "mmx", true);
1601    setFeatureEnabled(Features, "sse2", true);
1602    break;
1603  case CK_Yonah:
1604  case CK_Prescott:
1605  case CK_Nocona:
1606    setFeatureEnabled(Features, "mmx", true);
1607    setFeatureEnabled(Features, "sse3", true);
1608    break;
1609  case CK_Core2:
1610    setFeatureEnabled(Features, "mmx", true);
1611    setFeatureEnabled(Features, "ssse3", true);
1612    break;
1613  case CK_Penryn:
1614    setFeatureEnabled(Features, "mmx", true);
1615    setFeatureEnabled(Features, "sse4.1", true);
1616    break;
1617  case CK_Atom:
1618    setFeatureEnabled(Features, "mmx", true);
1619    setFeatureEnabled(Features, "ssse3", true);
1620    break;
1621  case CK_Corei7:
1622    setFeatureEnabled(Features, "mmx", true);
1623    setFeatureEnabled(Features, "sse4", true);
1624    setFeatureEnabled(Features, "aes", true);
1625    break;
1626  case CK_Corei7AVX:
1627  case CK_CoreAVXi:
1628    setFeatureEnabled(Features, "mmx", true);
1629    setFeatureEnabled(Features, "sse4", true);
1630    setFeatureEnabled(Features, "aes", true);
1631    //setFeatureEnabled(Features, "avx", true);
1632    break;
1633  case CK_CoreAVX2:
1634    setFeatureEnabled(Features, "mmx", true);
1635    setFeatureEnabled(Features, "sse4", true);
1636    setFeatureEnabled(Features, "aes", true);
1637    setFeatureEnabled(Features, "lzcnt", true);
1638    setFeatureEnabled(Features, "bmi", true);
1639    setFeatureEnabled(Features, "bmi2", true);
1640    //setFeatureEnabled(Features, "avx2", true);
1641    break;
1642  case CK_K6:
1643  case CK_WinChipC6:
1644    setFeatureEnabled(Features, "mmx", true);
1645    break;
1646  case CK_K6_2:
1647  case CK_K6_3:
1648  case CK_WinChip2:
1649  case CK_C3:
1650    setFeatureEnabled(Features, "3dnow", true);
1651    break;
1652  case CK_Athlon:
1653  case CK_AthlonThunderbird:
1654  case CK_Geode:
1655    setFeatureEnabled(Features, "3dnowa", true);
1656    break;
1657  case CK_Athlon4:
1658  case CK_AthlonXP:
1659  case CK_AthlonMP:
1660    setFeatureEnabled(Features, "sse", true);
1661    setFeatureEnabled(Features, "3dnowa", true);
1662    break;
1663  case CK_K8:
1664  case CK_Opteron:
1665  case CK_Athlon64:
1666  case CK_AthlonFX:
1667    setFeatureEnabled(Features, "sse2", true);
1668    setFeatureEnabled(Features, "3dnowa", true);
1669    break;
1670  case CK_K8SSE3:
1671  case CK_OpteronSSE3:
1672  case CK_Athlon64SSE3:
1673    setFeatureEnabled(Features, "sse3", true);
1674    setFeatureEnabled(Features, "3dnowa", true);
1675    break;
1676  case CK_AMDFAM10:
1677    setFeatureEnabled(Features, "sse3", true);
1678    setFeatureEnabled(Features, "sse4a", true);
1679    setFeatureEnabled(Features, "3dnowa", true);
1680    break;
1681  case CK_BTVER1:
1682    setFeatureEnabled(Features, "ssse3", true);
1683    setFeatureEnabled(Features, "sse4a", true);
1684  case CK_BDVER1:
1685  case CK_BDVER2:
1686    setFeatureEnabled(Features, "sse4", true);
1687    setFeatureEnabled(Features, "sse4a", true);
1688    setFeatureEnabled(Features, "aes", true);
1689    break;
1690  case CK_C3_2:
1691    setFeatureEnabled(Features, "mmx", true);
1692    setFeatureEnabled(Features, "sse", true);
1693    break;
1694  }
1695}
1696
1697bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1698                                      const std::string &Name,
1699                                      bool Enabled) const {
1700  // FIXME: This *really* should not be here.  We need some way of translating
1701  // options into llvm subtarget features.
1702  if (!Features.count(Name) &&
1703      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1704    return false;
1705
1706  // FIXME: this should probably use a switch with fall through.
1707
1708  if (Enabled) {
1709    if (Name == "mmx")
1710      Features["mmx"] = true;
1711    else if (Name == "sse")
1712      Features["mmx"] = Features["sse"] = true;
1713    else if (Name == "sse2")
1714      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1715    else if (Name == "sse3")
1716      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1717        true;
1718    else if (Name == "ssse3")
1719      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1720        Features["ssse3"] = true;
1721    else if (Name == "sse4" || Name == "sse4.2")
1722      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1723        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1724        Features["popcnt"] = true;
1725    else if (Name == "sse4.1")
1726      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1727        Features["ssse3"] = Features["sse41"] = true;
1728    else if (Name == "3dnow")
1729      Features["mmx"] = Features["3dnow"] = true;
1730    else if (Name == "3dnowa")
1731      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
1732    else if (Name == "aes")
1733      Features["aes"] = true;
1734    else if (Name == "avx")
1735      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1736        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1737        Features["popcnt"] = Features["avx"] = true;
1738    else if (Name == "avx2")
1739      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1740        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1741        Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
1742    else if (Name == "fma4")
1743        Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1744        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1745        Features["popcnt"] = Features["avx"] = Features["fma4"] = true;
1746    else if (Name == "sse4a")
1747      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1748        Features["lzcnt"] = Features["popcnt"] = Features["sse4a"] = true;
1749    else if (Name == "lzcnt")
1750      Features["lzcnt"] = true;
1751    else if (Name == "bmi")
1752      Features["bmi"] = true;
1753    else if (Name == "bmi2")
1754      Features["bmi2"] = true;
1755    else if (Name == "popcnt")
1756      Features["popcnt"] = true;
1757  } else {
1758    if (Name == "mmx")
1759      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
1760    else if (Name == "sse")
1761      Features["sse"] = Features["sse2"] = Features["sse3"] =
1762        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1763        Features["sse4a"] = false;
1764    else if (Name == "sse2")
1765      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1766        Features["sse41"] = Features["sse42"] = Features["sse4a"] = false;
1767    else if (Name == "sse3")
1768      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1769        Features["sse42"] = Features["sse4a"] = false;
1770    else if (Name == "ssse3")
1771      Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1772    else if (Name == "sse4" || Name == "sse4.1")
1773      Features["sse41"] = Features["sse42"] = false;
1774    else if (Name == "sse4.2")
1775      Features["sse42"] = false;
1776    else if (Name == "3dnow")
1777      Features["3dnow"] = Features["3dnowa"] = false;
1778    else if (Name == "3dnowa")
1779      Features["3dnowa"] = false;
1780    else if (Name == "aes")
1781      Features["aes"] = false;
1782    else if (Name == "avx")
1783      Features["avx"] = Features["avx2"] = Features["fma4"] = false;
1784    else if (Name == "avx2")
1785      Features["avx2"] = false;
1786    else if (Name == "sse4a")
1787      Features["sse4a"] = false;
1788    else if (Name == "lzcnt")
1789      Features["lzcnt"] = false;
1790    else if (Name == "bmi")
1791      Features["bmi"] = false;
1792    else if (Name == "bmi2")
1793      Features["bmi2"] = false;
1794    else if (Name == "popcnt")
1795      Features["popcnt"] = false;
1796    else if (Name == "fma4")
1797      Features["fma4"] = false;
1798  }
1799
1800  return true;
1801}
1802
1803/// HandleTargetOptions - Perform initialization based on the user
1804/// configured set of features.
1805void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1806  // Remember the maximum enabled sselevel.
1807  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1808    // Ignore disabled features.
1809    if (Features[i][0] == '-')
1810      continue;
1811
1812    if (Features[i].substr(1) == "aes") {
1813      HasAES = true;
1814      continue;
1815    }
1816
1817    if (Features[i].substr(1) == "lzcnt") {
1818      HasLZCNT = true;
1819      continue;
1820    }
1821
1822    if (Features[i].substr(1) == "bmi") {
1823      HasBMI = true;
1824      continue;
1825    }
1826
1827    if (Features[i].substr(1) == "bmi2") {
1828      HasBMI2 = true;
1829      continue;
1830    }
1831
1832    if (Features[i].substr(1) == "popcnt") {
1833      HasPOPCNT = true;
1834      continue;
1835    }
1836
1837    if (Features[i].substr(1) == "fma4") {
1838      HasFMA4 = true;
1839      continue;
1840    }
1841
1842    assert(Features[i][0] == '+' && "Invalid target feature!");
1843    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
1844      .Case("avx2", AVX2)
1845      .Case("avx", AVX)
1846      .Case("sse42", SSE42)
1847      .Case("sse41", SSE41)
1848      .Case("ssse3", SSSE3)
1849      .Case("sse3", SSE3)
1850      .Case("sse2", SSE2)
1851      .Case("sse", SSE1)
1852      .Default(NoSSE);
1853    SSELevel = std::max(SSELevel, Level);
1854
1855    MMX3DNowEnum ThreeDNowLevel =
1856      llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1))
1857        .Case("3dnowa", AMD3DNowAthlon)
1858        .Case("3dnow", AMD3DNow)
1859        .Case("mmx", MMX)
1860        .Default(NoMMX3DNow);
1861
1862    MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
1863  }
1864
1865  // Don't tell the backend if we're turning off mmx; it will end up disabling
1866  // SSE, which we don't want.
1867  std::vector<std::string>::iterator it;
1868  it = std::find(Features.begin(), Features.end(), "-mmx");
1869  if (it != Features.end())
1870    Features.erase(it);
1871}
1872
1873/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
1874/// definitions for this particular subtarget.
1875void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1876                                     MacroBuilder &Builder) const {
1877  // Target identification.
1878  if (PointerWidth == 64) {
1879    Builder.defineMacro("_LP64");
1880    Builder.defineMacro("__LP64__");
1881    Builder.defineMacro("__amd64__");
1882    Builder.defineMacro("__amd64");
1883    Builder.defineMacro("__x86_64");
1884    Builder.defineMacro("__x86_64__");
1885  } else {
1886    DefineStd(Builder, "i386", Opts);
1887  }
1888
1889  // Subtarget options.
1890  // FIXME: We are hard-coding the tune parameters based on the CPU, but they
1891  // truly should be based on -mtune options.
1892  switch (CPU) {
1893  case CK_Generic:
1894    break;
1895  case CK_i386:
1896    // The rest are coming from the i386 define above.
1897    Builder.defineMacro("__tune_i386__");
1898    break;
1899  case CK_i486:
1900  case CK_WinChipC6:
1901  case CK_WinChip2:
1902  case CK_C3:
1903    defineCPUMacros(Builder, "i486");
1904    break;
1905  case CK_PentiumMMX:
1906    Builder.defineMacro("__pentium_mmx__");
1907    Builder.defineMacro("__tune_pentium_mmx__");
1908    // Fallthrough
1909  case CK_i586:
1910  case CK_Pentium:
1911    defineCPUMacros(Builder, "i586");
1912    defineCPUMacros(Builder, "pentium");
1913    break;
1914  case CK_Pentium3:
1915  case CK_Pentium3M:
1916  case CK_PentiumM:
1917    Builder.defineMacro("__tune_pentium3__");
1918    // Fallthrough
1919  case CK_Pentium2:
1920  case CK_C3_2:
1921    Builder.defineMacro("__tune_pentium2__");
1922    // Fallthrough
1923  case CK_PentiumPro:
1924    Builder.defineMacro("__tune_i686__");
1925    Builder.defineMacro("__tune_pentiumpro__");
1926    // Fallthrough
1927  case CK_i686:
1928    Builder.defineMacro("__i686");
1929    Builder.defineMacro("__i686__");
1930    // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
1931    Builder.defineMacro("__pentiumpro");
1932    Builder.defineMacro("__pentiumpro__");
1933    break;
1934  case CK_Pentium4:
1935  case CK_Pentium4M:
1936    defineCPUMacros(Builder, "pentium4");
1937    break;
1938  case CK_Yonah:
1939  case CK_Prescott:
1940  case CK_Nocona:
1941    defineCPUMacros(Builder, "nocona");
1942    break;
1943  case CK_Core2:
1944  case CK_Penryn:
1945    defineCPUMacros(Builder, "core2");
1946    break;
1947  case CK_Atom:
1948    defineCPUMacros(Builder, "atom");
1949    break;
1950  case CK_Corei7:
1951  case CK_Corei7AVX:
1952  case CK_CoreAVXi:
1953  case CK_CoreAVX2:
1954    defineCPUMacros(Builder, "corei7");
1955    break;
1956  case CK_K6_2:
1957    Builder.defineMacro("__k6_2__");
1958    Builder.defineMacro("__tune_k6_2__");
1959    // Fallthrough
1960  case CK_K6_3:
1961    if (CPU != CK_K6_2) {  // In case of fallthrough
1962      // FIXME: GCC may be enabling these in cases where some other k6
1963      // architecture is specified but -m3dnow is explicitly provided. The
1964      // exact semantics need to be determined and emulated here.
1965      Builder.defineMacro("__k6_3__");
1966      Builder.defineMacro("__tune_k6_3__");
1967    }
1968    // Fallthrough
1969  case CK_K6:
1970    defineCPUMacros(Builder, "k6");
1971    break;
1972  case CK_Athlon:
1973  case CK_AthlonThunderbird:
1974  case CK_Athlon4:
1975  case CK_AthlonXP:
1976  case CK_AthlonMP:
1977    defineCPUMacros(Builder, "athlon");
1978    if (SSELevel != NoSSE) {
1979      Builder.defineMacro("__athlon_sse__");
1980      Builder.defineMacro("__tune_athlon_sse__");
1981    }
1982    break;
1983  case CK_K8:
1984  case CK_K8SSE3:
1985  case CK_x86_64:
1986  case CK_Opteron:
1987  case CK_OpteronSSE3:
1988  case CK_Athlon64:
1989  case CK_Athlon64SSE3:
1990  case CK_AthlonFX:
1991    defineCPUMacros(Builder, "k8");
1992    break;
1993  case CK_AMDFAM10:
1994    defineCPUMacros(Builder, "amdfam10");
1995    break;
1996  case CK_BTVER1:
1997    defineCPUMacros(Builder, "btver1");
1998    break;
1999  case CK_BDVER1:
2000    defineCPUMacros(Builder, "bdver1");
2001    break;
2002  case CK_BDVER2:
2003    defineCPUMacros(Builder, "bdver2");
2004    break;
2005  case CK_Geode:
2006    defineCPUMacros(Builder, "geode");
2007    break;
2008  }
2009
2010  // Target properties.
2011  Builder.defineMacro("__LITTLE_ENDIAN__");
2012  Builder.defineMacro("__REGISTER_PREFIX__", "");
2013
2014  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
2015  // functions in glibc header files that use FP Stack inline asm which the
2016  // backend can't deal with (PR879).
2017  Builder.defineMacro("__NO_MATH_INLINES");
2018
2019  if (HasAES)
2020    Builder.defineMacro("__AES__");
2021
2022  if (HasLZCNT)
2023    Builder.defineMacro("__LZCNT__");
2024
2025  if (HasBMI)
2026    Builder.defineMacro("__BMI__");
2027
2028  if (HasBMI2)
2029    Builder.defineMacro("__BMI2__");
2030
2031  if (HasPOPCNT)
2032    Builder.defineMacro("__POPCNT__");
2033
2034  if (HasFMA4)
2035    Builder.defineMacro("__FMA4__");
2036
2037  // Each case falls through to the previous one here.
2038  switch (SSELevel) {
2039  case AVX2:
2040    Builder.defineMacro("__AVX2__");
2041  case AVX:
2042    Builder.defineMacro("__AVX__");
2043  case SSE42:
2044    Builder.defineMacro("__SSE4_2__");
2045  case SSE41:
2046    Builder.defineMacro("__SSE4_1__");
2047  case SSSE3:
2048    Builder.defineMacro("__SSSE3__");
2049  case SSE3:
2050    Builder.defineMacro("__SSE3__");
2051  case SSE2:
2052    Builder.defineMacro("__SSE2__");
2053    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
2054  case SSE1:
2055    Builder.defineMacro("__SSE__");
2056    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
2057  case NoSSE:
2058    break;
2059  }
2060
2061  if (Opts.MicrosoftExt && PointerWidth == 32) {
2062    switch (SSELevel) {
2063    case AVX2:
2064    case AVX:
2065    case SSE42:
2066    case SSE41:
2067    case SSSE3:
2068    case SSE3:
2069    case SSE2:
2070      Builder.defineMacro("_M_IX86_FP", Twine(2));
2071      break;
2072    case SSE1:
2073      Builder.defineMacro("_M_IX86_FP", Twine(1));
2074      break;
2075    default:
2076      Builder.defineMacro("_M_IX86_FP", Twine(0));
2077    }
2078  }
2079
2080  // Each case falls through to the previous one here.
2081  switch (MMX3DNowLevel) {
2082  case AMD3DNowAthlon:
2083    Builder.defineMacro("__3dNOW_A__");
2084  case AMD3DNow:
2085    Builder.defineMacro("__3dNOW__");
2086  case MMX:
2087    Builder.defineMacro("__MMX__");
2088  case NoMMX3DNow:
2089    break;
2090  }
2091}
2092
2093bool X86TargetInfo::hasFeature(StringRef Feature) const {
2094  return llvm::StringSwitch<bool>(Feature)
2095      .Case("aes", HasAES)
2096      .Case("avx", SSELevel >= AVX)
2097      .Case("avx2", SSELevel >= AVX2)
2098      .Case("bmi", HasBMI)
2099      .Case("bmi2", HasBMI2)
2100      .Case("fma4", HasFMA4)
2101      .Case("lzcnt", HasLZCNT)
2102      .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
2103      .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
2104      .Case("mmx", MMX3DNowLevel >= MMX)
2105      .Case("popcnt", HasPOPCNT)
2106      .Case("sse", SSELevel >= SSE1)
2107      .Case("sse2", SSELevel >= SSE2)
2108      .Case("sse3", SSELevel >= SSE3)
2109      .Case("ssse3", SSELevel >= SSSE3)
2110      .Case("sse41", SSELevel >= SSE41)
2111      .Case("sse42", SSELevel >= SSE42)
2112      .Case("x86", true)
2113      .Case("x86_32", PointerWidth == 32)
2114      .Case("x86_64", PointerWidth == 64)
2115      .Default(false);
2116}
2117
2118bool
2119X86TargetInfo::validateAsmConstraint(const char *&Name,
2120                                     TargetInfo::ConstraintInfo &Info) const {
2121  switch (*Name) {
2122  default: return false;
2123  case 'Y': // first letter of a pair:
2124    switch (*(Name+1)) {
2125    default: return false;
2126    case '0':  // First SSE register.
2127    case 't':  // Any SSE register, when SSE2 is enabled.
2128    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
2129    case 'm':  // any MMX register, when inter-unit moves enabled.
2130      break;   // falls through to setAllowsRegister.
2131  }
2132  case 'a': // eax.
2133  case 'b': // ebx.
2134  case 'c': // ecx.
2135  case 'd': // edx.
2136  case 'S': // esi.
2137  case 'D': // edi.
2138  case 'A': // edx:eax.
2139  case 'f': // any x87 floating point stack register.
2140  case 't': // top of floating point stack.
2141  case 'u': // second from top of floating point stack.
2142  case 'q': // Any register accessible as [r]l: a, b, c, and d.
2143  case 'y': // Any MMX register.
2144  case 'x': // Any SSE register.
2145  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2146  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2147  case 'l': // "Index" registers: any general register that can be used as an
2148            // index in a base+index memory access.
2149    Info.setAllowsRegister();
2150    return true;
2151  case 'C': // SSE floating point constant.
2152  case 'G': // x87 floating point constant.
2153  case 'e': // 32-bit signed integer constant for use with zero-extending
2154            // x86_64 instructions.
2155  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2156            // x86_64 instructions.
2157    return true;
2158  }
2159}
2160
2161
2162std::string
2163X86TargetInfo::convertConstraint(const char *&Constraint) const {
2164  switch (*Constraint) {
2165  case 'a': return std::string("{ax}");
2166  case 'b': return std::string("{bx}");
2167  case 'c': return std::string("{cx}");
2168  case 'd': return std::string("{dx}");
2169  case 'S': return std::string("{si}");
2170  case 'D': return std::string("{di}");
2171  case 'p': // address
2172    return std::string("im");
2173  case 't': // top of floating point stack.
2174    return std::string("{st}");
2175  case 'u': // second from top of floating point stack.
2176    return std::string("{st(1)}"); // second from top of floating point stack.
2177  default:
2178    return std::string(1, *Constraint);
2179  }
2180}
2181} // end anonymous namespace
2182
2183namespace {
2184// X86-32 generic target
2185class X86_32TargetInfo : public X86TargetInfo {
2186public:
2187  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2188    DoubleAlign = LongLongAlign = 32;
2189    LongDoubleWidth = 96;
2190    LongDoubleAlign = 32;
2191    SuitableAlign = 128;
2192    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2193                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2194                        "a0:0:64-f80:32:32-n8:16:32-S128";
2195    SizeType = UnsignedInt;
2196    PtrDiffType = SignedInt;
2197    IntPtrType = SignedInt;
2198    RegParmMax = 3;
2199
2200    // Use fpret for all types.
2201    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2202                             (1 << TargetInfo::Double) |
2203                             (1 << TargetInfo::LongDouble));
2204
2205    // x86-32 has atomics up to 8 bytes
2206    // FIXME: Check that we actually have cmpxchg8b before setting
2207    // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2208    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2209  }
2210  virtual const char *getVAListDeclaration() const {
2211    return "typedef char* __builtin_va_list;";
2212  }
2213
2214  int getEHDataRegisterNumber(unsigned RegNo) const {
2215    if (RegNo == 0) return 0;
2216    if (RegNo == 1) return 2;
2217    return -1;
2218  }
2219};
2220} // end anonymous namespace
2221
2222namespace {
2223class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2224public:
2225  NetBSDI386TargetInfo(const std::string &triple) :
2226    NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2227  }
2228
2229  virtual unsigned getFloatEvalMethod() const {
2230    // NetBSD defaults to "double" rounding
2231    return 1;
2232  }
2233};
2234} // end anonymous namespace
2235
2236namespace {
2237class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2238public:
2239  OpenBSDI386TargetInfo(const std::string& triple) :
2240    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2241    SizeType = UnsignedLong;
2242    IntPtrType = SignedLong;
2243    PtrDiffType = SignedLong;
2244  }
2245};
2246} // end anonymous namespace
2247
2248namespace {
2249class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2250public:
2251  DarwinI386TargetInfo(const std::string& triple) :
2252    DarwinTargetInfo<X86_32TargetInfo>(triple) {
2253    LongDoubleWidth = 128;
2254    LongDoubleAlign = 128;
2255    SuitableAlign = 128;
2256    SizeType = UnsignedLong;
2257    IntPtrType = SignedLong;
2258    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2259                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2260                        "a0:0:64-f80:128:128-n8:16:32-S128";
2261    HasAlignMac68kSupport = true;
2262  }
2263
2264};
2265} // end anonymous namespace
2266
2267namespace {
2268// x86-32 Windows target
2269class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2270public:
2271  WindowsX86_32TargetInfo(const std::string& triple)
2272    : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2273    TLSSupported = false;
2274    WCharType = UnsignedShort;
2275    DoubleAlign = LongLongAlign = 64;
2276    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2277                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2278                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2279  }
2280  virtual void getTargetDefines(const LangOptions &Opts,
2281                                MacroBuilder &Builder) const {
2282    WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2283  }
2284};
2285} // end anonymous namespace
2286
2287namespace {
2288
2289// x86-32 Windows Visual Studio target
2290class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2291public:
2292  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2293    : WindowsX86_32TargetInfo(triple) {
2294    LongDoubleWidth = LongDoubleAlign = 64;
2295    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2296  }
2297  virtual void getTargetDefines(const LangOptions &Opts,
2298                                MacroBuilder &Builder) const {
2299    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2300    WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2301    // The value of the following reflects processor type.
2302    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2303    // We lost the original triple, so we use the default.
2304    Builder.defineMacro("_M_IX86", "600");
2305  }
2306};
2307} // end anonymous namespace
2308
2309namespace {
2310// x86-32 MinGW target
2311class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2312public:
2313  MinGWX86_32TargetInfo(const std::string& triple)
2314    : WindowsX86_32TargetInfo(triple) {
2315  }
2316  virtual void getTargetDefines(const LangOptions &Opts,
2317                                MacroBuilder &Builder) const {
2318    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2319    DefineStd(Builder, "WIN32", Opts);
2320    DefineStd(Builder, "WINNT", Opts);
2321    Builder.defineMacro("_X86_");
2322    Builder.defineMacro("__MSVCRT__");
2323    Builder.defineMacro("__MINGW32__");
2324
2325    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2326    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2327    if (Opts.MicrosoftExt)
2328      // Provide "as-is" __declspec.
2329      Builder.defineMacro("__declspec", "__declspec");
2330    else
2331      // Provide alias of __attribute__ like mingw32-gcc.
2332      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2333  }
2334};
2335} // end anonymous namespace
2336
2337namespace {
2338// x86-32 Cygwin target
2339class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2340public:
2341  CygwinX86_32TargetInfo(const std::string& triple)
2342    : X86_32TargetInfo(triple) {
2343    TLSSupported = false;
2344    WCharType = UnsignedShort;
2345    DoubleAlign = LongLongAlign = 64;
2346    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2347                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2348                        "a0:0:64-f80:32:32-n8:16:32-S32";
2349  }
2350  virtual void getTargetDefines(const LangOptions &Opts,
2351                                MacroBuilder &Builder) const {
2352    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2353    Builder.defineMacro("__CYGWIN__");
2354    Builder.defineMacro("__CYGWIN32__");
2355    DefineStd(Builder, "unix", Opts);
2356    if (Opts.CPlusPlus)
2357      Builder.defineMacro("_GNU_SOURCE");
2358  }
2359};
2360} // end anonymous namespace
2361
2362namespace {
2363// x86-32 Haiku target
2364class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2365public:
2366  HaikuX86_32TargetInfo(const std::string& triple)
2367    : X86_32TargetInfo(triple) {
2368    SizeType = UnsignedLong;
2369    IntPtrType = SignedLong;
2370    PtrDiffType = SignedLong;
2371    this->UserLabelPrefix = "";
2372  }
2373  virtual void getTargetDefines(const LangOptions &Opts,
2374                                MacroBuilder &Builder) const {
2375    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2376    Builder.defineMacro("__INTEL__");
2377    Builder.defineMacro("__HAIKU__");
2378  }
2379};
2380} // end anonymous namespace
2381
2382// RTEMS Target
2383template<typename Target>
2384class RTEMSTargetInfo : public OSTargetInfo<Target> {
2385protected:
2386  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2387                            MacroBuilder &Builder) const {
2388    // RTEMS defines; list based off of gcc output
2389
2390    Builder.defineMacro("__rtems__");
2391    Builder.defineMacro("__ELF__");
2392  }
2393public:
2394  RTEMSTargetInfo(const std::string &triple)
2395    : OSTargetInfo<Target>(triple) {
2396      this->UserLabelPrefix = "";
2397
2398      llvm::Triple Triple(triple);
2399      switch (Triple.getArch()) {
2400        default:
2401        case llvm::Triple::x86:
2402          // this->MCountName = ".mcount";
2403          break;
2404        case llvm::Triple::mips:
2405        case llvm::Triple::mipsel:
2406        case llvm::Triple::ppc:
2407        case llvm::Triple::ppc64:
2408          // this->MCountName = "_mcount";
2409          break;
2410        case llvm::Triple::arm:
2411          // this->MCountName = "__mcount";
2412          break;
2413      }
2414
2415    }
2416};
2417
2418namespace {
2419// x86-32 RTEMS target
2420class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2421public:
2422  RTEMSX86_32TargetInfo(const std::string& triple)
2423    : X86_32TargetInfo(triple) {
2424    SizeType = UnsignedLong;
2425    IntPtrType = SignedLong;
2426    PtrDiffType = SignedLong;
2427    this->UserLabelPrefix = "";
2428  }
2429  virtual void getTargetDefines(const LangOptions &Opts,
2430                                MacroBuilder &Builder) const {
2431    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2432    Builder.defineMacro("__INTEL__");
2433    Builder.defineMacro("__rtems__");
2434  }
2435};
2436} // end anonymous namespace
2437
2438namespace {
2439// x86-64 generic target
2440class X86_64TargetInfo : public X86TargetInfo {
2441public:
2442  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2443    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2444    LongDoubleWidth = 128;
2445    LongDoubleAlign = 128;
2446    LargeArrayMinWidth = 128;
2447    LargeArrayAlign = 128;
2448    SuitableAlign = 128;
2449    IntMaxType = SignedLong;
2450    UIntMaxType = UnsignedLong;
2451    Int64Type = SignedLong;
2452    RegParmMax = 6;
2453
2454    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2455                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2456                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2457
2458    // Use fpret only for long double.
2459    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2460
2461    // Use fp2ret for _Complex long double.
2462    ComplexLongDoubleUsesFP2Ret = true;
2463
2464    // x86-64 has atomics up to 16 bytes.
2465    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2466    // on CPUs with cmpxchg16b
2467    MaxAtomicPromoteWidth = 128;
2468    MaxAtomicInlineWidth = 64;
2469  }
2470  virtual const char *getVAListDeclaration() const {
2471    return "typedef struct __va_list_tag {"
2472           "  unsigned gp_offset;"
2473           "  unsigned fp_offset;"
2474           "  void* overflow_arg_area;"
2475           "  void* reg_save_area;"
2476           "} __va_list_tag;"
2477           "typedef __va_list_tag __builtin_va_list[1];";
2478  }
2479
2480  int getEHDataRegisterNumber(unsigned RegNo) const {
2481    if (RegNo == 0) return 0;
2482    if (RegNo == 1) return 1;
2483    return -1;
2484  }
2485};
2486} // end anonymous namespace
2487
2488namespace {
2489// x86-64 Windows target
2490class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2491public:
2492  WindowsX86_64TargetInfo(const std::string& triple)
2493    : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2494    TLSSupported = false;
2495    WCharType = UnsignedShort;
2496    LongWidth = LongAlign = 32;
2497    DoubleAlign = LongLongAlign = 64;
2498    IntMaxType = SignedLongLong;
2499    UIntMaxType = UnsignedLongLong;
2500    Int64Type = SignedLongLong;
2501    SizeType = UnsignedLongLong;
2502    PtrDiffType = SignedLongLong;
2503    IntPtrType = SignedLongLong;
2504    this->UserLabelPrefix = "";
2505  }
2506  virtual void getTargetDefines(const LangOptions &Opts,
2507                                MacroBuilder &Builder) const {
2508    WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2509    Builder.defineMacro("_WIN64");
2510  }
2511  virtual const char *getVAListDeclaration() const {
2512    return "typedef char* __builtin_va_list;";
2513  }
2514};
2515} // end anonymous namespace
2516
2517namespace {
2518// x86-64 Windows Visual Studio target
2519class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2520public:
2521  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2522    : WindowsX86_64TargetInfo(triple) {
2523    LongDoubleWidth = LongDoubleAlign = 64;
2524    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2525  }
2526  virtual void getTargetDefines(const LangOptions &Opts,
2527                                MacroBuilder &Builder) const {
2528    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2529    WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2530    Builder.defineMacro("_M_X64");
2531    Builder.defineMacro("_M_AMD64");
2532  }
2533};
2534} // end anonymous namespace
2535
2536namespace {
2537// x86-64 MinGW target
2538class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2539public:
2540  MinGWX86_64TargetInfo(const std::string& triple)
2541    : WindowsX86_64TargetInfo(triple) {
2542  }
2543  virtual void getTargetDefines(const LangOptions &Opts,
2544                                MacroBuilder &Builder) const {
2545    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2546    DefineStd(Builder, "WIN64", Opts);
2547    Builder.defineMacro("__MSVCRT__");
2548    Builder.defineMacro("__MINGW32__");
2549    Builder.defineMacro("__MINGW64__");
2550
2551    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2552    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2553    if (Opts.MicrosoftExt)
2554      // Provide "as-is" __declspec.
2555      Builder.defineMacro("__declspec", "__declspec");
2556    else
2557      // Provide alias of __attribute__ like mingw32-gcc.
2558      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2559  }
2560};
2561} // end anonymous namespace
2562
2563namespace {
2564class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2565public:
2566  DarwinX86_64TargetInfo(const std::string& triple)
2567      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2568    Int64Type = SignedLongLong;
2569  }
2570};
2571} // end anonymous namespace
2572
2573namespace {
2574class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2575public:
2576  OpenBSDX86_64TargetInfo(const std::string& triple)
2577      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2578    IntMaxType = SignedLongLong;
2579    UIntMaxType = UnsignedLongLong;
2580    Int64Type = SignedLongLong;
2581  }
2582};
2583} // end anonymous namespace
2584
2585namespace {
2586class ARMTargetInfo : public TargetInfo {
2587  // Possible FPU choices.
2588  enum FPUMode {
2589    NoFPU,
2590    VFP2FPU,
2591    VFP3FPU,
2592    NeonFPU
2593  };
2594
2595  static bool FPUModeIsVFP(FPUMode Mode) {
2596    return Mode >= VFP2FPU && Mode <= NeonFPU;
2597  }
2598
2599  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2600  static const char * const GCCRegNames[];
2601
2602  std::string ABI, CPU;
2603
2604  unsigned FPU : 3;
2605
2606  unsigned IsThumb : 1;
2607
2608  // Initialized via features.
2609  unsigned SoftFloat : 1;
2610  unsigned SoftFloatABI : 1;
2611
2612  static const Builtin::Info BuiltinInfo[];
2613
2614public:
2615  ARMTargetInfo(const std::string &TripleStr)
2616    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
2617  {
2618    BigEndian = false;
2619    SizeType = UnsignedInt;
2620    PtrDiffType = SignedInt;
2621    // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
2622    WCharType = UnsignedInt;
2623
2624    // {} in inline assembly are neon specifiers, not assembly variant
2625    // specifiers.
2626    NoAsmVariants = true;
2627
2628    // FIXME: Should we just treat this as a feature?
2629    IsThumb = getTriple().getArchName().startswith("thumb");
2630    if (IsThumb) {
2631      // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2632      // so set preferred for small types to 32.
2633      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2634                           "i64:64:64-f32:32:32-f64:64:64-"
2635                           "v64:64:64-v128:64:128-a0:0:32-n32-S64");
2636    } else {
2637      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2638                           "i64:64:64-f32:32:32-f64:64:64-"
2639                           "v64:64:64-v128:64:128-a0:0:64-n32-S64");
2640    }
2641
2642    // ARM targets default to using the ARM C++ ABI.
2643    CXXABI = CXXABI_ARM;
2644
2645    // ARM has atomics up to 8 bytes
2646    // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
2647    MaxAtomicPromoteWidth = 64;
2648  }
2649  virtual const char *getABI() const { return ABI.c_str(); }
2650  virtual bool setABI(const std::string &Name) {
2651    ABI = Name;
2652
2653    // The defaults (above) are for AAPCS, check if we need to change them.
2654    //
2655    // FIXME: We need support for -meabi... we could just mangle it into the
2656    // name.
2657    if (Name == "apcs-gnu") {
2658      DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
2659      SizeType = UnsignedLong;
2660
2661      // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
2662      WCharType = SignedInt;
2663
2664      // Do not respect the alignment of bit-field types when laying out
2665      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
2666      UseBitFieldTypeAlignment = false;
2667
2668      /// Do force alignment of members that follow zero length bitfields.  If
2669      /// the alignment of the zero-length bitfield is greater than the member
2670      /// that follows it, `bar', `bar' will be aligned as the  type of the
2671      /// zero length bitfield.
2672      UseZeroLengthBitfieldAlignment = true;
2673
2674      /// gcc forces the alignment to 4 bytes, regardless of the type of the
2675      /// zero length bitfield.  This corresponds to EMPTY_FIELD_BOUNDARY in
2676      /// gcc.
2677      ZeroLengthBitfieldBoundary = 32;
2678
2679      if (IsThumb) {
2680        // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2681        // so set preferred for small types to 32.
2682        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2683                             "i64:32:64-f32:32:32-f64:32:64-"
2684                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2685      } else {
2686        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2687                             "i64:32:64-f32:32:32-f64:32:64-"
2688                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2689      }
2690
2691      // FIXME: Override "preferred align" for double and long long.
2692    } else if (Name == "aapcs") {
2693      // FIXME: Enumerated types are variable width in straight AAPCS.
2694    } else if (Name == "aapcs-linux") {
2695      ;
2696    } else
2697      return false;
2698
2699    return true;
2700  }
2701
2702  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
2703    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
2704      Features["vfp2"] = true;
2705    else if (CPU == "cortex-a8" || CPU == "cortex-a9")
2706      Features["neon"] = true;
2707  }
2708
2709  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2710                                 const std::string &Name,
2711                                 bool Enabled) const {
2712    if (Name == "soft-float" || Name == "soft-float-abi" ||
2713        Name == "vfp2" || Name == "vfp3" || Name == "neon" || Name == "d16") {
2714      Features[Name] = Enabled;
2715    } else
2716      return false;
2717
2718    return true;
2719  }
2720
2721  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2722    FPU = NoFPU;
2723    SoftFloat = SoftFloatABI = false;
2724    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
2725      if (Features[i] == "+soft-float")
2726        SoftFloat = true;
2727      else if (Features[i] == "+soft-float-abi")
2728        SoftFloatABI = true;
2729      else if (Features[i] == "+vfp2")
2730        FPU = VFP2FPU;
2731      else if (Features[i] == "+vfp3")
2732        FPU = VFP3FPU;
2733      else if (Features[i] == "+neon")
2734        FPU = NeonFPU;
2735    }
2736
2737    // Remove front-end specific options which the backend handles differently.
2738    std::vector<std::string>::iterator it;
2739    it = std::find(Features.begin(), Features.end(), "+soft-float");
2740    if (it != Features.end())
2741      Features.erase(it);
2742    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
2743    if (it != Features.end())
2744      Features.erase(it);
2745  }
2746
2747  virtual bool hasFeature(StringRef Feature) const {
2748    return llvm::StringSwitch<bool>(Feature)
2749        .Case("arm", true)
2750        .Case("softfloat", SoftFloat)
2751        .Case("thumb", IsThumb)
2752        .Case("neon", FPU == NeonFPU && !SoftFloat &&
2753              StringRef(getCPUDefineSuffix(CPU)).startswith("7"))
2754        .Default(false);
2755  }
2756  static const char *getCPUDefineSuffix(StringRef Name) {
2757    return llvm::StringSwitch<const char*>(Name)
2758      .Cases("arm8", "arm810", "4")
2759      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
2760      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
2761      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
2762      .Case("ep9312", "4T")
2763      .Cases("arm10tdmi", "arm1020t", "5T")
2764      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
2765      .Case("arm926ej-s", "5TEJ")
2766      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
2767      .Cases("xscale", "iwmmxt", "5TE")
2768      .Case("arm1136j-s", "6J")
2769      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
2770      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
2771      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
2772      .Cases("cortex-a8", "cortex-a9", "7A")
2773      .Case("cortex-m3", "7M")
2774      .Case("cortex-m0", "6M")
2775      .Default(0);
2776  }
2777  virtual bool setCPU(const std::string &Name) {
2778    if (!getCPUDefineSuffix(Name))
2779      return false;
2780
2781    CPU = Name;
2782    return true;
2783  }
2784  virtual void getTargetDefines(const LangOptions &Opts,
2785                                MacroBuilder &Builder) const {
2786    // Target identification.
2787    Builder.defineMacro("__arm");
2788    Builder.defineMacro("__arm__");
2789
2790    // Target properties.
2791    Builder.defineMacro("__ARMEL__");
2792    Builder.defineMacro("__LITTLE_ENDIAN__");
2793    Builder.defineMacro("__REGISTER_PREFIX__", "");
2794
2795    StringRef CPUArch = getCPUDefineSuffix(CPU);
2796    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
2797
2798    // Subtarget options.
2799
2800    // FIXME: It's more complicated than this and we don't really support
2801    // interworking.
2802    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
2803      Builder.defineMacro("__THUMB_INTERWORK__");
2804
2805    if (ABI == "aapcs" || ABI == "aapcs-linux")
2806      Builder.defineMacro("__ARM_EABI__");
2807
2808    if (SoftFloat)
2809      Builder.defineMacro("__SOFTFP__");
2810
2811    if (CPU == "xscale")
2812      Builder.defineMacro("__XSCALE__");
2813
2814    bool IsARMv7 = CPUArch.startswith("7");
2815    if (IsThumb) {
2816      Builder.defineMacro("__THUMBEL__");
2817      Builder.defineMacro("__thumb__");
2818      if (CPUArch == "6T2" || IsARMv7)
2819        Builder.defineMacro("__thumb2__");
2820    }
2821
2822    // Note, this is always on in gcc, even though it doesn't make sense.
2823    Builder.defineMacro("__APCS_32__");
2824
2825    if (FPUModeIsVFP((FPUMode) FPU))
2826      Builder.defineMacro("__VFP_FP__");
2827
2828    // This only gets set when Neon instructions are actually available, unlike
2829    // the VFP define, hence the soft float and arch check. This is subtly
2830    // different from gcc, we follow the intent which was that it should be set
2831    // when Neon instructions are actually available.
2832    if (FPU == NeonFPU && !SoftFloat && IsARMv7)
2833      Builder.defineMacro("__ARM_NEON__");
2834  }
2835  virtual void getTargetBuiltins(const Builtin::Info *&Records,
2836                                 unsigned &NumRecords) const {
2837    Records = BuiltinInfo;
2838    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
2839  }
2840  virtual bool isCLZForZeroUndef() const { return false; }
2841  virtual const char *getVAListDeclaration() const {
2842    return "typedef void* __builtin_va_list;";
2843  }
2844  virtual void getGCCRegNames(const char * const *&Names,
2845                              unsigned &NumNames) const;
2846  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2847                                unsigned &NumAliases) const;
2848  virtual bool validateAsmConstraint(const char *&Name,
2849                                     TargetInfo::ConstraintInfo &Info) const {
2850    // FIXME: Check if this is complete
2851    switch (*Name) {
2852    default:
2853    case 'l': // r0-r7
2854    case 'h': // r8-r15
2855    case 'w': // VFP Floating point register single precision
2856    case 'P': // VFP Floating point register double precision
2857      Info.setAllowsRegister();
2858      return true;
2859    case 'Q': // A memory address that is a single base register.
2860      Info.setAllowsMemory();
2861      return true;
2862    case 'U': // a memory reference...
2863      switch (Name[1]) {
2864      case 'q': // ...ARMV4 ldrsb
2865      case 'v': // ...VFP load/store (reg+constant offset)
2866      case 'y': // ...iWMMXt load/store
2867      case 't': // address valid for load/store opaque types wider
2868	        // than 128-bits
2869      case 'n': // valid address for Neon doubleword vector load/store
2870      case 'm': // valid address for Neon element and structure load/store
2871      case 's': // valid address for non-offset loads/stores of quad-word
2872	        // values in four ARM registers
2873        Info.setAllowsMemory();
2874        Name++;
2875        return true;
2876      }
2877    }
2878    return false;
2879  }
2880  virtual std::string convertConstraint(const char *&Constraint) const {
2881    std::string R;
2882    switch (*Constraint) {
2883    case 'U':   // Two-character constraint; add "^" hint for later parsing.
2884      R = std::string("^") + std::string(Constraint, 2);
2885      Constraint++;
2886      break;
2887    case 'p': // 'p' should be translated to 'r' by default.
2888      R = std::string("r");
2889      break;
2890    default:
2891      return std::string(1, *Constraint);
2892    }
2893    return R;
2894  }
2895  virtual const char *getClobbers() const {
2896    // FIXME: Is this really right?
2897    return "";
2898  }
2899};
2900
2901const char * const ARMTargetInfo::GCCRegNames[] = {
2902  // Integer registers
2903  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2904  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
2905
2906  // Float registers
2907  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
2908  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
2909  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
2910  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
2911
2912  // Double registers
2913  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
2914  "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
2915  "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
2916  "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
2917
2918  // Quad registers
2919  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
2920  "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
2921};
2922
2923void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
2924                                   unsigned &NumNames) const {
2925  Names = GCCRegNames;
2926  NumNames = llvm::array_lengthof(GCCRegNames);
2927}
2928
2929const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
2930  { { "a1" }, "r0" },
2931  { { "a2" }, "r1" },
2932  { { "a3" }, "r2" },
2933  { { "a4" }, "r3" },
2934  { { "v1" }, "r4" },
2935  { { "v2" }, "r5" },
2936  { { "v3" }, "r6" },
2937  { { "v4" }, "r7" },
2938  { { "v5" }, "r8" },
2939  { { "v6", "rfp" }, "r9" },
2940  { { "sl" }, "r10" },
2941  { { "fp" }, "r11" },
2942  { { "ip" }, "r12" },
2943  { { "r13" }, "sp" },
2944  { { "r14" }, "lr" },
2945  { { "r15" }, "pc" },
2946  // The S, D and Q registers overlap, but aren't really aliases; we
2947  // don't want to substitute one of these for a different-sized one.
2948};
2949
2950void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2951                                       unsigned &NumAliases) const {
2952  Aliases = GCCRegAliases;
2953  NumAliases = llvm::array_lengthof(GCCRegAliases);
2954}
2955
2956const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
2957#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
2958#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
2959                                              ALL_LANGUAGES },
2960#include "clang/Basic/BuiltinsARM.def"
2961};
2962} // end anonymous namespace.
2963
2964namespace {
2965class DarwinARMTargetInfo :
2966  public DarwinTargetInfo<ARMTargetInfo> {
2967protected:
2968  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2969                            MacroBuilder &Builder) const {
2970    getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
2971  }
2972
2973public:
2974  DarwinARMTargetInfo(const std::string& triple)
2975    : DarwinTargetInfo<ARMTargetInfo>(triple) {
2976    HasAlignMac68kSupport = true;
2977    // iOS always has 64-bit atomic instructions.
2978    // FIXME: This should be based off of the target features in ARMTargetInfo.
2979    MaxAtomicInlineWidth = 64;
2980  }
2981};
2982} // end anonymous namespace.
2983
2984
2985namespace {
2986// Hexagon abstract base class
2987class HexagonTargetInfo : public TargetInfo {
2988  static const Builtin::Info BuiltinInfo[];
2989  static const char * const GCCRegNames[];
2990  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2991  std::string CPU;
2992public:
2993  HexagonTargetInfo(const std::string& triple) : TargetInfo(triple)  {
2994    BigEndian = false;
2995    DescriptionString = ("e-p:32:32:32-"
2996                         "i64:64:64-i32:32:32-"
2997                         "i16:16:16-i1:32:32-a:0:0");
2998
2999    // {} in inline assembly are packet specifiers, not assembly variant
3000    // specifiers.
3001    NoAsmVariants = true;
3002  }
3003
3004  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3005                                 unsigned &NumRecords) const {
3006    Records = BuiltinInfo;
3007    NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
3008  }
3009
3010  virtual bool validateAsmConstraint(const char *&Name,
3011                                     TargetInfo::ConstraintInfo &Info) const {
3012    return true;
3013  }
3014
3015  virtual void getTargetDefines(const LangOptions &Opts,
3016                                MacroBuilder &Builder) const;
3017
3018  virtual bool hasFeature(StringRef Feature) const {
3019    return Feature == "hexagon";
3020  }
3021
3022  virtual const char *getVAListDeclaration() const {
3023    return "typedef char* __builtin_va_list;";
3024  }
3025  virtual void getGCCRegNames(const char * const *&Names,
3026                              unsigned &NumNames) const;
3027  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3028                                unsigned &NumAliases) const;
3029  virtual const char *getClobbers() const {
3030    return "";
3031  }
3032
3033  static const char *getHexagonCPUSuffix(StringRef Name) {
3034    return llvm::StringSwitch<const char*>(Name)
3035      .Case("hexagonv2", "2")
3036      .Case("hexagonv3", "3")
3037      .Case("hexagonv4", "4")
3038      .Default(0);
3039  }
3040
3041  virtual bool setCPU(const std::string &Name) {
3042    if (!getHexagonCPUSuffix(Name))
3043      return false;
3044
3045    CPU = Name;
3046    return true;
3047  }
3048};
3049
3050void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
3051                                MacroBuilder &Builder) const {
3052  Builder.defineMacro("qdsp6");
3053  Builder.defineMacro("__qdsp6", "1");
3054  Builder.defineMacro("__qdsp6__", "1");
3055
3056  Builder.defineMacro("hexagon");
3057  Builder.defineMacro("__hexagon", "1");
3058  Builder.defineMacro("__hexagon__", "1");
3059
3060  if(CPU == "hexagonv1") {
3061    Builder.defineMacro("__HEXAGON_V1__");
3062    Builder.defineMacro("__HEXAGON_ARCH__", "1");
3063    if(Opts.HexagonQdsp6Compat) {
3064      Builder.defineMacro("__QDSP6_V1__");
3065      Builder.defineMacro("__QDSP6_ARCH__", "1");
3066    }
3067  }
3068  else if(CPU == "hexagonv2") {
3069    Builder.defineMacro("__HEXAGON_V2__");
3070    Builder.defineMacro("__HEXAGON_ARCH__", "2");
3071    if(Opts.HexagonQdsp6Compat) {
3072      Builder.defineMacro("__QDSP6_V2__");
3073      Builder.defineMacro("__QDSP6_ARCH__", "2");
3074    }
3075  }
3076  else if(CPU == "hexagonv3") {
3077    Builder.defineMacro("__HEXAGON_V3__");
3078    Builder.defineMacro("__HEXAGON_ARCH__", "3");
3079    if(Opts.HexagonQdsp6Compat) {
3080      Builder.defineMacro("__QDSP6_V3__");
3081      Builder.defineMacro("__QDSP6_ARCH__", "3");
3082    }
3083  }
3084  else if(CPU == "hexagonv4") {
3085    Builder.defineMacro("__HEXAGON_V4__");
3086    Builder.defineMacro("__HEXAGON_ARCH__", "4");
3087    if(Opts.HexagonQdsp6Compat) {
3088      Builder.defineMacro("__QDSP6_V4__");
3089      Builder.defineMacro("__QDSP6_ARCH__", "4");
3090    }
3091  }
3092}
3093
3094const char * const HexagonTargetInfo::GCCRegNames[] = {
3095  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3096  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3097  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3098  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3099  "p0", "p1", "p2", "p3",
3100  "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3101};
3102
3103void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3104                                   unsigned &NumNames) const {
3105  Names = GCCRegNames;
3106  NumNames = llvm::array_lengthof(GCCRegNames);
3107}
3108
3109
3110const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3111  { { "sp" }, "r29" },
3112  { { "fp" }, "r30" },
3113  { { "lr" }, "r31" },
3114 };
3115
3116void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3117                                     unsigned &NumAliases) const {
3118  Aliases = GCCRegAliases;
3119  NumAliases = llvm::array_lengthof(GCCRegAliases);
3120}
3121
3122
3123const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3124#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3125#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3126                                              ALL_LANGUAGES },
3127#include "clang/Basic/BuiltinsHexagon.def"
3128};
3129}
3130
3131
3132namespace {
3133class SparcV8TargetInfo : public TargetInfo {
3134  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3135  static const char * const GCCRegNames[];
3136  bool SoftFloat;
3137public:
3138  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3139    // FIXME: Support Sparc quad-precision long double?
3140    BigEndian = false;
3141    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3142                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3143  }
3144  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3145                                 const std::string &Name,
3146                                 bool Enabled) const {
3147    if (Name == "soft-float")
3148      Features[Name] = Enabled;
3149    else
3150      return false;
3151
3152    return true;
3153  }
3154  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3155    SoftFloat = false;
3156    for (unsigned i = 0, e = Features.size(); i != e; ++i)
3157      if (Features[i] == "+soft-float")
3158        SoftFloat = true;
3159  }
3160  virtual void getTargetDefines(const LangOptions &Opts,
3161                                MacroBuilder &Builder) const {
3162    DefineStd(Builder, "sparc", Opts);
3163    Builder.defineMacro("__sparcv8");
3164    Builder.defineMacro("__REGISTER_PREFIX__", "");
3165
3166    if (SoftFloat)
3167      Builder.defineMacro("SOFT_FLOAT", "1");
3168  }
3169
3170  virtual bool hasFeature(StringRef Feature) const {
3171    return llvm::StringSwitch<bool>(Feature)
3172             .Case("softfloat", SoftFloat)
3173             .Case("sparc", true)
3174             .Default(false);
3175  }
3176
3177  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3178                                 unsigned &NumRecords) const {
3179    // FIXME: Implement!
3180  }
3181  virtual const char *getVAListDeclaration() const {
3182    return "typedef void* __builtin_va_list;";
3183  }
3184  virtual void getGCCRegNames(const char * const *&Names,
3185                              unsigned &NumNames) const;
3186  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3187                                unsigned &NumAliases) const;
3188  virtual bool validateAsmConstraint(const char *&Name,
3189                                     TargetInfo::ConstraintInfo &info) const {
3190    // FIXME: Implement!
3191    return false;
3192  }
3193  virtual const char *getClobbers() const {
3194    // FIXME: Implement!
3195    return "";
3196  }
3197};
3198
3199const char * const SparcV8TargetInfo::GCCRegNames[] = {
3200  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3201  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3202  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3203  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3204};
3205
3206void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3207                                       unsigned &NumNames) const {
3208  Names = GCCRegNames;
3209  NumNames = llvm::array_lengthof(GCCRegNames);
3210}
3211
3212const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3213  { { "g0" }, "r0" },
3214  { { "g1" }, "r1" },
3215  { { "g2" }, "r2" },
3216  { { "g3" }, "r3" },
3217  { { "g4" }, "r4" },
3218  { { "g5" }, "r5" },
3219  { { "g6" }, "r6" },
3220  { { "g7" }, "r7" },
3221  { { "o0" }, "r8" },
3222  { { "o1" }, "r9" },
3223  { { "o2" }, "r10" },
3224  { { "o3" }, "r11" },
3225  { { "o4" }, "r12" },
3226  { { "o5" }, "r13" },
3227  { { "o6", "sp" }, "r14" },
3228  { { "o7" }, "r15" },
3229  { { "l0" }, "r16" },
3230  { { "l1" }, "r17" },
3231  { { "l2" }, "r18" },
3232  { { "l3" }, "r19" },
3233  { { "l4" }, "r20" },
3234  { { "l5" }, "r21" },
3235  { { "l6" }, "r22" },
3236  { { "l7" }, "r23" },
3237  { { "i0" }, "r24" },
3238  { { "i1" }, "r25" },
3239  { { "i2" }, "r26" },
3240  { { "i3" }, "r27" },
3241  { { "i4" }, "r28" },
3242  { { "i5" }, "r29" },
3243  { { "i6", "fp" }, "r30" },
3244  { { "i7" }, "r31" },
3245};
3246
3247void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3248                                         unsigned &NumAliases) const {
3249  Aliases = GCCRegAliases;
3250  NumAliases = llvm::array_lengthof(GCCRegAliases);
3251}
3252} // end anonymous namespace.
3253
3254namespace {
3255class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3256public:
3257  AuroraUXSparcV8TargetInfo(const std::string& triple) :
3258      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3259    SizeType = UnsignedInt;
3260    PtrDiffType = SignedInt;
3261  }
3262};
3263class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3264public:
3265  SolarisSparcV8TargetInfo(const std::string& triple) :
3266      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3267    SizeType = UnsignedInt;
3268    PtrDiffType = SignedInt;
3269  }
3270};
3271} // end anonymous namespace.
3272
3273namespace {
3274  class MSP430TargetInfo : public TargetInfo {
3275    static const char * const GCCRegNames[];
3276  public:
3277    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3278      BigEndian = false;
3279      TLSSupported = false;
3280      IntWidth = 16; IntAlign = 16;
3281      LongWidth = 32; LongLongWidth = 64;
3282      LongAlign = LongLongAlign = 16;
3283      PointerWidth = 16; PointerAlign = 16;
3284      SuitableAlign = 16;
3285      SizeType = UnsignedInt;
3286      IntMaxType = SignedLong;
3287      UIntMaxType = UnsignedLong;
3288      IntPtrType = SignedShort;
3289      PtrDiffType = SignedInt;
3290      SigAtomicType = SignedLong;
3291      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3292   }
3293    virtual void getTargetDefines(const LangOptions &Opts,
3294                                  MacroBuilder &Builder) const {
3295      Builder.defineMacro("MSP430");
3296      Builder.defineMacro("__MSP430__");
3297      // FIXME: defines for different 'flavours' of MCU
3298    }
3299    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3300                                   unsigned &NumRecords) const {
3301     // FIXME: Implement.
3302      Records = 0;
3303      NumRecords = 0;
3304    }
3305    virtual bool hasFeature(StringRef Feature) const {
3306      return Feature == "msp430";
3307    }
3308    virtual void getGCCRegNames(const char * const *&Names,
3309                                unsigned &NumNames) const;
3310    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3311                                  unsigned &NumAliases) const {
3312      // No aliases.
3313      Aliases = 0;
3314      NumAliases = 0;
3315    }
3316    virtual bool validateAsmConstraint(const char *&Name,
3317                                       TargetInfo::ConstraintInfo &info) const {
3318      // No target constraints for now.
3319      return false;
3320    }
3321    virtual const char *getClobbers() const {
3322      // FIXME: Is this really right?
3323      return "";
3324    }
3325    virtual const char *getVAListDeclaration() const {
3326      // FIXME: implement
3327      return "typedef char* __builtin_va_list;";
3328   }
3329  };
3330
3331  const char * const MSP430TargetInfo::GCCRegNames[] = {
3332    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3333    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3334  };
3335
3336  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3337                                        unsigned &NumNames) const {
3338    Names = GCCRegNames;
3339    NumNames = llvm::array_lengthof(GCCRegNames);
3340  }
3341}
3342
3343namespace {
3344
3345  // LLVM and Clang cannot be used directly to output native binaries for
3346  // target, but is used to compile C code to llvm bitcode with correct
3347  // type and alignment information.
3348  //
3349  // TCE uses the llvm bitcode as input and uses it for generating customized
3350  // target processor and program binary. TCE co-design environment is
3351  // publicly available in http://tce.cs.tut.fi
3352
3353  static const unsigned TCEOpenCLAddrSpaceMap[] = {
3354      3, // opencl_global
3355      4, // opencl_local
3356      5  // opencl_constant
3357  };
3358
3359  class TCETargetInfo : public TargetInfo{
3360  public:
3361    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3362      TLSSupported = false;
3363      IntWidth = 32;
3364      LongWidth = LongLongWidth = 32;
3365      PointerWidth = 32;
3366      IntAlign = 32;
3367      LongAlign = LongLongAlign = 32;
3368      PointerAlign = 32;
3369      SuitableAlign = 32;
3370      SizeType = UnsignedInt;
3371      IntMaxType = SignedLong;
3372      UIntMaxType = UnsignedLong;
3373      IntPtrType = SignedInt;
3374      PtrDiffType = SignedInt;
3375      FloatWidth = 32;
3376      FloatAlign = 32;
3377      DoubleWidth = 32;
3378      DoubleAlign = 32;
3379      LongDoubleWidth = 32;
3380      LongDoubleAlign = 32;
3381      FloatFormat = &llvm::APFloat::IEEEsingle;
3382      DoubleFormat = &llvm::APFloat::IEEEsingle;
3383      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3384      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3385                          "i16:16:32-i32:32:32-i64:32:32-"
3386                          "f32:32:32-f64:32:32-v64:32:32-"
3387                          "v128:32:32-a0:0:32-n32";
3388      AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3389    }
3390
3391    virtual void getTargetDefines(const LangOptions &Opts,
3392                                  MacroBuilder &Builder) const {
3393      DefineStd(Builder, "tce", Opts);
3394      Builder.defineMacro("__TCE__");
3395      Builder.defineMacro("__TCE_V1__");
3396    }
3397    virtual bool hasFeature(StringRef Feature) const {
3398      return Feature == "tce";
3399    }
3400
3401    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3402                                   unsigned &NumRecords) const {}
3403    virtual const char *getClobbers() const {
3404      return "";
3405    }
3406    virtual const char *getVAListDeclaration() const {
3407      return "typedef void* __builtin_va_list;";
3408    }
3409    virtual void getGCCRegNames(const char * const *&Names,
3410                                unsigned &NumNames) const {}
3411    virtual bool validateAsmConstraint(const char *&Name,
3412                                       TargetInfo::ConstraintInfo &info) const {
3413      return true;
3414    }
3415    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3416                                  unsigned &NumAliases) const {}
3417  };
3418}
3419
3420namespace {
3421class MipsTargetInfoBase : public TargetInfo {
3422  std::string CPU;
3423protected:
3424  std::string ABI;
3425public:
3426  MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr)
3427    : TargetInfo(triple), ABI(ABIStr) {}
3428  virtual const char *getABI() const { return ABI.c_str(); }
3429  virtual bool setABI(const std::string &Name) = 0;
3430  virtual bool setCPU(const std::string &Name) {
3431    CPU = Name;
3432    return true;
3433  }
3434  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3435    Features[ABI] = true;
3436    Features[CPU] = true;
3437  }
3438  virtual void getArchDefines(const LangOptions &Opts,
3439                              MacroBuilder &Builder) const = 0;
3440  virtual void getTargetDefines(const LangOptions &Opts,
3441                                MacroBuilder &Builder) const = 0;
3442  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3443                                 unsigned &NumRecords) const {
3444    // FIXME: Implement!
3445  }
3446  virtual bool hasFeature(StringRef Feature) const {
3447    return Feature == "mips";
3448  }
3449  virtual const char *getVAListDeclaration() const {
3450    return "typedef void* __builtin_va_list;";
3451  }
3452  virtual void getGCCRegNames(const char * const *&Names,
3453                              unsigned &NumNames) const {
3454    static const char * const GCCRegNames[] = {
3455      "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
3456      "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
3457      "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
3458      "$24",  "$25",  "$26",  "$27",  "$28",  "$sp",  "$fp",  "$31",
3459      "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
3460      "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
3461      "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
3462      "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
3463      "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
3464      "$fcc5","$fcc6","$fcc7"
3465    };
3466    Names = GCCRegNames;
3467    NumNames = llvm::array_lengthof(GCCRegNames);
3468  }
3469  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3470                                unsigned &NumAliases) const = 0;
3471  virtual bool validateAsmConstraint(const char *&Name,
3472                                     TargetInfo::ConstraintInfo &Info) const {
3473    switch (*Name) {
3474    default:
3475      return false;
3476
3477    case 'r': // CPU registers.
3478    case 'd': // Equivalent to "r" unless generating MIPS16 code.
3479    case 'y': // Equivalent to "r", backwards compatibility only.
3480    case 'f': // floating-point registers.
3481      Info.setAllowsRegister();
3482      return true;
3483    }
3484  }
3485
3486  virtual const char *getClobbers() const {
3487    // FIXME: Implement!
3488    return "";
3489  }
3490};
3491
3492class Mips32TargetInfoBase : public MipsTargetInfoBase {
3493public:
3494  Mips32TargetInfoBase(const std::string& triple) :
3495    MipsTargetInfoBase(triple, "o32") {
3496    SizeType = UnsignedInt;
3497    PtrDiffType = SignedInt;
3498  }
3499  virtual bool setABI(const std::string &Name) {
3500    if ((Name == "o32") || (Name == "eabi")) {
3501      ABI = Name;
3502      return true;
3503    } else
3504      return false;
3505  }
3506  virtual void getArchDefines(const LangOptions &Opts,
3507                              MacroBuilder &Builder) const {
3508    Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
3509    Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
3510    Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
3511
3512    if (ABI == "o32") {
3513      Builder.defineMacro("__mips_o32");
3514      Builder.defineMacro("_ABIO32", "1");
3515      Builder.defineMacro("_MIPS_SIM", "_ABIO32");
3516    }
3517    else if (ABI == "eabi")
3518      Builder.defineMacro("__mips_eabi");
3519    else
3520      llvm_unreachable("Invalid ABI for Mips32.");
3521  }
3522  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3523                                unsigned &NumAliases) const {
3524    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3525      { { "at" },  "$1" },
3526      { { "v0" },  "$2" },
3527      { { "v1" },  "$3" },
3528      { { "a0" },  "$4" },
3529      { { "a1" },  "$5" },
3530      { { "a2" },  "$6" },
3531      { { "a3" },  "$7" },
3532      { { "t0" },  "$8" },
3533      { { "t1" },  "$9" },
3534      { { "t2" }, "$10" },
3535      { { "t3" }, "$11" },
3536      { { "t4" }, "$12" },
3537      { { "t5" }, "$13" },
3538      { { "t6" }, "$14" },
3539      { { "t7" }, "$15" },
3540      { { "s0" }, "$16" },
3541      { { "s1" }, "$17" },
3542      { { "s2" }, "$18" },
3543      { { "s3" }, "$19" },
3544      { { "s4" }, "$20" },
3545      { { "s5" }, "$21" },
3546      { { "s6" }, "$22" },
3547      { { "s7" }, "$23" },
3548      { { "t8" }, "$24" },
3549      { { "t9" }, "$25" },
3550      { { "k0" }, "$26" },
3551      { { "k1" }, "$27" },
3552      { { "gp" }, "$28" },
3553      { { "sp" }, "$29" },
3554      { { "fp" }, "$30" },
3555      { { "ra" }, "$31" }
3556    };
3557    Aliases = GCCRegAliases;
3558    NumAliases = llvm::array_lengthof(GCCRegAliases);
3559  }
3560};
3561
3562class Mips32EBTargetInfo : public Mips32TargetInfoBase {
3563public:
3564  Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3565    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3566                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3567  }
3568  virtual void getTargetDefines(const LangOptions &Opts,
3569                                MacroBuilder &Builder) const {
3570    DefineStd(Builder, "mips", Opts);
3571    Builder.defineMacro("_mips");
3572    DefineStd(Builder, "MIPSEB", Opts);
3573    Builder.defineMacro("_MIPSEB");
3574    Builder.defineMacro("__REGISTER_PREFIX__", "");
3575    getArchDefines(Opts, Builder);
3576  }
3577};
3578
3579class Mips32ELTargetInfo : public Mips32TargetInfoBase {
3580public:
3581  Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3582    BigEndian = false;
3583    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3584                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3585  }
3586  virtual void getTargetDefines(const LangOptions &Opts,
3587                                MacroBuilder &Builder) const {
3588    DefineStd(Builder, "mips", Opts);
3589    Builder.defineMacro("_mips");
3590    DefineStd(Builder, "MIPSEL", Opts);
3591    Builder.defineMacro("_MIPSEL");
3592    Builder.defineMacro("__REGISTER_PREFIX__", "");
3593    getArchDefines(Opts, Builder);
3594  }
3595};
3596
3597class Mips64TargetInfoBase : public MipsTargetInfoBase {
3598  virtual void SetDescriptionString(const std::string &Name) = 0;
3599public:
3600  Mips64TargetInfoBase(const std::string& triple) :
3601    MipsTargetInfoBase(triple, "n64") {
3602    LongWidth = LongAlign = 64;
3603    PointerWidth = PointerAlign = 64;
3604    LongDoubleWidth = LongDoubleAlign = 128;
3605    LongDoubleFormat = &llvm::APFloat::IEEEquad;
3606    SuitableAlign = 128;
3607  }
3608  virtual bool setABI(const std::string &Name) {
3609    SetDescriptionString(Name);
3610
3611    if (Name != "n32" && Name != "n64")
3612      return false;
3613
3614    ABI = Name;
3615
3616    if (Name == "n32") {
3617      LongWidth = LongAlign = 32;
3618      PointerWidth = PointerAlign = 32;
3619    }
3620
3621    return true;
3622  }
3623  virtual void getArchDefines(const LangOptions &Opts,
3624                              MacroBuilder &Builder) const {
3625    if (ABI == "n32") {
3626      Builder.defineMacro("__mips_n32");
3627      Builder.defineMacro("_ABIN32", "2");
3628      Builder.defineMacro("_MIPS_SIM", "_ABIN32");
3629    }
3630    else if (ABI == "n64") {
3631      Builder.defineMacro("__mips_n64");
3632      Builder.defineMacro("_ABI64", "3");
3633      Builder.defineMacro("_MIPS_SIM", "_ABI64");
3634    }
3635    else
3636      llvm_unreachable("Invalid ABI for Mips64.");
3637  }
3638  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3639                                unsigned &NumAliases) const {
3640    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3641      { { "at" },  "$1" },
3642      { { "v0" },  "$2" },
3643      { { "v1" },  "$3" },
3644      { { "a0" },  "$4" },
3645      { { "a1" },  "$5" },
3646      { { "a2" },  "$6" },
3647      { { "a3" },  "$7" },
3648      { { "a4" },  "$8" },
3649      { { "a5" },  "$9" },
3650      { { "a6" }, "$10" },
3651      { { "a7" }, "$11" },
3652      { { "t0" }, "$12" },
3653      { { "t1" }, "$13" },
3654      { { "t2" }, "$14" },
3655      { { "t3" }, "$15" },
3656      { { "s0" }, "$16" },
3657      { { "s1" }, "$17" },
3658      { { "s2" }, "$18" },
3659      { { "s3" }, "$19" },
3660      { { "s4" }, "$20" },
3661      { { "s5" }, "$21" },
3662      { { "s6" }, "$22" },
3663      { { "s7" }, "$23" },
3664      { { "t8" }, "$24" },
3665      { { "t9" }, "$25" },
3666      { { "k0" }, "$26" },
3667      { { "k1" }, "$27" },
3668      { { "gp" }, "$28" },
3669      { { "sp" }, "$29" },
3670      { { "fp" }, "$30" },
3671      { { "ra" }, "$31" }
3672    };
3673    Aliases = GCCRegAliases;
3674    NumAliases = llvm::array_lengthof(GCCRegAliases);
3675  }
3676};
3677
3678class Mips64EBTargetInfo : public Mips64TargetInfoBase {
3679  virtual void SetDescriptionString(const std::string &Name) {
3680    // Change DescriptionString only if ABI is n32.
3681    if (Name == "n32")
3682      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3683                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3684                          "v64:64:64-n32";
3685  }
3686public:
3687  Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3688    // Default ABI is n64.
3689    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3690                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3691                        "v64:64:64-n32";
3692  }
3693  virtual void getTargetDefines(const LangOptions &Opts,
3694                                MacroBuilder &Builder) const {
3695    DefineStd(Builder, "mips", Opts);
3696    Builder.defineMacro("_mips");
3697    DefineStd(Builder, "MIPSEB", Opts);
3698    Builder.defineMacro("_MIPSEB");
3699    Builder.defineMacro("__REGISTER_PREFIX__", "");
3700    getArchDefines(Opts, Builder);
3701  }
3702};
3703
3704class Mips64ELTargetInfo : public Mips64TargetInfoBase {
3705  virtual void SetDescriptionString(const std::string &Name) {
3706    // Change DescriptionString only if ABI is n32.
3707    if (Name == "n32")
3708      DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3709                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
3710                          "-v64:64:64-n32";
3711  }
3712public:
3713  Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3714    // Default ABI is n64.
3715    BigEndian = false;
3716    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3717                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3718                        "v64:64:64-n32";
3719  }
3720  virtual void getTargetDefines(const LangOptions &Opts,
3721                                MacroBuilder &Builder) const {
3722    DefineStd(Builder, "mips", Opts);
3723    Builder.defineMacro("_mips");
3724    DefineStd(Builder, "MIPSEL", Opts);
3725    Builder.defineMacro("_MIPSEL");
3726    Builder.defineMacro("__REGISTER_PREFIX__", "");
3727    getArchDefines(Opts, Builder);
3728  }
3729};
3730} // end anonymous namespace.
3731
3732namespace {
3733class PNaClTargetInfo : public TargetInfo {
3734public:
3735  PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
3736    BigEndian = false;
3737    this->UserLabelPrefix = "";
3738    this->LongAlign = 32;
3739    this->LongWidth = 32;
3740    this->PointerAlign = 32;
3741    this->PointerWidth = 32;
3742    this->IntMaxType = TargetInfo::SignedLongLong;
3743    this->UIntMaxType = TargetInfo::UnsignedLongLong;
3744    this->Int64Type = TargetInfo::SignedLongLong;
3745    this->DoubleAlign = 64;
3746    this->LongDoubleWidth = 64;
3747    this->LongDoubleAlign = 64;
3748    this->SizeType = TargetInfo::UnsignedInt;
3749    this->PtrDiffType = TargetInfo::SignedInt;
3750    this->IntPtrType = TargetInfo::SignedInt;
3751    this->RegParmMax = 2;
3752    DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
3753                        "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
3754  }
3755
3756  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3757  }
3758  virtual void getArchDefines(const LangOptions &Opts,
3759                              MacroBuilder &Builder) const {
3760    Builder.defineMacro("__le32__");
3761    Builder.defineMacro("__pnacl__");
3762  }
3763  virtual void getTargetDefines(const LangOptions &Opts,
3764                                MacroBuilder &Builder) const {
3765    DefineStd(Builder, "unix", Opts);
3766    Builder.defineMacro("__ELF__");
3767    if (Opts.POSIXThreads)
3768      Builder.defineMacro("_REENTRANT");
3769    if (Opts.CPlusPlus)
3770      Builder.defineMacro("_GNU_SOURCE");
3771
3772    Builder.defineMacro("__native_client__");
3773    getArchDefines(Opts, Builder);
3774  }
3775  virtual bool hasFeature(StringRef Feature) const {
3776    return Feature == "pnacl";
3777  }
3778  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3779                                 unsigned &NumRecords) const {
3780  }
3781  virtual const char *getVAListDeclaration() const {
3782    return "typedef int __builtin_va_list[4];";
3783  }
3784  virtual void getGCCRegNames(const char * const *&Names,
3785                              unsigned &NumNames) const;
3786  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3787                                unsigned &NumAliases) const;
3788  virtual bool validateAsmConstraint(const char *&Name,
3789                                     TargetInfo::ConstraintInfo &Info) const {
3790    return false;
3791  }
3792
3793  virtual const char *getClobbers() const {
3794    return "";
3795  }
3796};
3797
3798void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
3799                                     unsigned &NumNames) const {
3800  Names = NULL;
3801  NumNames = 0;
3802}
3803
3804void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3805                                       unsigned &NumAliases) const {
3806  Aliases = NULL;
3807  NumAliases = 0;
3808}
3809} // end anonymous namespace.
3810
3811
3812//===----------------------------------------------------------------------===//
3813// Driver code
3814//===----------------------------------------------------------------------===//
3815
3816static TargetInfo *AllocateTarget(const std::string &T) {
3817  llvm::Triple Triple(T);
3818  llvm::Triple::OSType os = Triple.getOS();
3819
3820  switch (Triple.getArch()) {
3821  default:
3822    return NULL;
3823
3824  case llvm::Triple::hexagon:
3825    return new HexagonTargetInfo(T);
3826
3827  case llvm::Triple::arm:
3828  case llvm::Triple::thumb:
3829    if (Triple.isOSDarwin())
3830      return new DarwinARMTargetInfo(T);
3831
3832    switch (os) {
3833    case llvm::Triple::Linux:
3834      return new LinuxTargetInfo<ARMTargetInfo>(T);
3835    case llvm::Triple::FreeBSD:
3836      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
3837    case llvm::Triple::NetBSD:
3838      return new NetBSDTargetInfo<ARMTargetInfo>(T);
3839    case llvm::Triple::RTEMS:
3840      return new RTEMSTargetInfo<ARMTargetInfo>(T);
3841    default:
3842      return new ARMTargetInfo(T);
3843    }
3844
3845  case llvm::Triple::msp430:
3846    return new MSP430TargetInfo(T);
3847
3848  case llvm::Triple::mips:
3849    switch (os) {
3850    case llvm::Triple::Linux:
3851      return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
3852    case llvm::Triple::RTEMS:
3853      return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
3854    case llvm::Triple::FreeBSD:
3855      return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
3856    case llvm::Triple::NetBSD:
3857      return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
3858    default:
3859      return new Mips32EBTargetInfo(T);
3860    }
3861
3862  case llvm::Triple::mipsel:
3863    switch (os) {
3864    case llvm::Triple::Linux:
3865      return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
3866    case llvm::Triple::RTEMS:
3867      return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
3868    case llvm::Triple::FreeBSD:
3869      return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
3870    case llvm::Triple::NetBSD:
3871      return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
3872    default:
3873      return new Mips32ELTargetInfo(T);
3874    }
3875
3876  case llvm::Triple::mips64:
3877    switch (os) {
3878    case llvm::Triple::Linux:
3879      return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
3880    case llvm::Triple::RTEMS:
3881      return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
3882    case llvm::Triple::FreeBSD:
3883      return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
3884    case llvm::Triple::NetBSD:
3885      return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
3886    default:
3887      return new Mips64EBTargetInfo(T);
3888    }
3889
3890  case llvm::Triple::mips64el:
3891    switch (os) {
3892    case llvm::Triple::Linux:
3893      return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
3894    case llvm::Triple::RTEMS:
3895      return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
3896    case llvm::Triple::FreeBSD:
3897      return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
3898    case llvm::Triple::NetBSD:
3899      return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
3900    default:
3901      return new Mips64ELTargetInfo(T);
3902    }
3903
3904  case llvm::Triple::le32:
3905    switch (os) {
3906      case llvm::Triple::NativeClient:
3907        return new PNaClTargetInfo(T);
3908      default:
3909        return NULL;
3910    }
3911
3912  case llvm::Triple::ppc:
3913    if (Triple.isOSDarwin())
3914      return new DarwinPPC32TargetInfo(T);
3915    switch (os) {
3916    case llvm::Triple::Linux:
3917      return new LinuxTargetInfo<PPC32TargetInfo>(T);
3918    case llvm::Triple::FreeBSD:
3919      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
3920    case llvm::Triple::NetBSD:
3921      return new NetBSDTargetInfo<PPC32TargetInfo>(T);
3922    case llvm::Triple::RTEMS:
3923      return new RTEMSTargetInfo<PPC32TargetInfo>(T);
3924    default:
3925      return new PPC32TargetInfo(T);
3926    }
3927
3928  case llvm::Triple::ppc64:
3929    if (Triple.isOSDarwin())
3930      return new DarwinPPC64TargetInfo(T);
3931    switch (os) {
3932    case llvm::Triple::Linux:
3933      return new LinuxTargetInfo<PPC64TargetInfo>(T);
3934    case llvm::Triple::Lv2:
3935      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
3936    case llvm::Triple::FreeBSD:
3937      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
3938    case llvm::Triple::NetBSD:
3939      return new NetBSDTargetInfo<PPC64TargetInfo>(T);
3940    default:
3941      return new PPC64TargetInfo(T);
3942    }
3943
3944  case llvm::Triple::ptx32:
3945    return new PTX32TargetInfo(T);
3946  case llvm::Triple::ptx64:
3947    return new PTX64TargetInfo(T);
3948
3949  case llvm::Triple::mblaze:
3950    return new MBlazeTargetInfo(T);
3951
3952  case llvm::Triple::sparc:
3953    switch (os) {
3954    case llvm::Triple::Linux:
3955      return new LinuxTargetInfo<SparcV8TargetInfo>(T);
3956    case llvm::Triple::AuroraUX:
3957      return new AuroraUXSparcV8TargetInfo(T);
3958    case llvm::Triple::Solaris:
3959      return new SolarisSparcV8TargetInfo(T);
3960    case llvm::Triple::NetBSD:
3961      return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
3962    case llvm::Triple::RTEMS:
3963      return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
3964    default:
3965      return new SparcV8TargetInfo(T);
3966    }
3967
3968  // FIXME: Need a real SPU target.
3969  case llvm::Triple::cellspu:
3970    return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
3971
3972  case llvm::Triple::tce:
3973    return new TCETargetInfo(T);
3974
3975  case llvm::Triple::x86:
3976    if (Triple.isOSDarwin())
3977      return new DarwinI386TargetInfo(T);
3978
3979    switch (os) {
3980    case llvm::Triple::AuroraUX:
3981      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
3982    case llvm::Triple::Linux:
3983      return new LinuxTargetInfo<X86_32TargetInfo>(T);
3984    case llvm::Triple::DragonFly:
3985      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
3986    case llvm::Triple::NetBSD:
3987      return new NetBSDI386TargetInfo(T);
3988    case llvm::Triple::OpenBSD:
3989      return new OpenBSDI386TargetInfo(T);
3990    case llvm::Triple::FreeBSD:
3991      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
3992    case llvm::Triple::Minix:
3993      return new MinixTargetInfo<X86_32TargetInfo>(T);
3994    case llvm::Triple::Solaris:
3995      return new SolarisTargetInfo<X86_32TargetInfo>(T);
3996    case llvm::Triple::Cygwin:
3997      return new CygwinX86_32TargetInfo(T);
3998    case llvm::Triple::MinGW32:
3999      return new MinGWX86_32TargetInfo(T);
4000    case llvm::Triple::Win32:
4001      return new VisualStudioWindowsX86_32TargetInfo(T);
4002    case llvm::Triple::Haiku:
4003      return new HaikuX86_32TargetInfo(T);
4004    case llvm::Triple::RTEMS:
4005      return new RTEMSX86_32TargetInfo(T);
4006    default:
4007      return new X86_32TargetInfo(T);
4008    }
4009
4010  case llvm::Triple::x86_64:
4011    if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
4012      return new DarwinX86_64TargetInfo(T);
4013
4014    switch (os) {
4015    case llvm::Triple::AuroraUX:
4016      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
4017    case llvm::Triple::Linux:
4018      return new LinuxTargetInfo<X86_64TargetInfo>(T);
4019    case llvm::Triple::DragonFly:
4020      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
4021    case llvm::Triple::NetBSD:
4022      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
4023    case llvm::Triple::OpenBSD:
4024      return new OpenBSDX86_64TargetInfo(T);
4025    case llvm::Triple::FreeBSD:
4026      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
4027    case llvm::Triple::Solaris:
4028      return new SolarisTargetInfo<X86_64TargetInfo>(T);
4029    case llvm::Triple::MinGW32:
4030      return new MinGWX86_64TargetInfo(T);
4031    case llvm::Triple::Win32:   // This is what Triple.h supports now.
4032      return new VisualStudioWindowsX86_64TargetInfo(T);
4033    default:
4034      return new X86_64TargetInfo(T);
4035    }
4036  }
4037}
4038
4039/// CreateTargetInfo - Return the target info object for the specified target
4040/// triple.
4041TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
4042                                         TargetOptions &Opts) {
4043  llvm::Triple Triple(Opts.Triple);
4044
4045  // Construct the target
4046  llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
4047  if (!Target) {
4048    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
4049    return 0;
4050  }
4051
4052  // Set the target CPU if specified.
4053  if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
4054    Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
4055    return 0;
4056  }
4057
4058  // Set the target ABI if specified.
4059  if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
4060    Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
4061    return 0;
4062  }
4063
4064  // Set the target C++ ABI.
4065  if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
4066    Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
4067    return 0;
4068  }
4069
4070  // Compute the default target features, we need the target to handle this
4071  // because features may have dependencies on one another.
4072  llvm::StringMap<bool> Features;
4073  Target->getDefaultFeatures(Features);
4074
4075  // Apply the user specified deltas.
4076  // First the enables.
4077  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4078         ie = Opts.Features.end(); it != ie; ++it) {
4079    const char *Name = it->c_str();
4080
4081    if (Name[0] != '+')
4082      continue;
4083
4084    // Apply the feature via the target.
4085    if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
4086      Diags.Report(diag::err_target_invalid_feature) << Name;
4087      return 0;
4088    }
4089  }
4090
4091  // Then the disables.
4092  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4093         ie = Opts.Features.end(); it != ie; ++it) {
4094    const char *Name = it->c_str();
4095
4096    if (Name[0] == '+')
4097      continue;
4098
4099    // Apply the feature via the target.
4100    if (Name[0] != '-' ||
4101        !Target->setFeatureEnabled(Features, Name + 1, false)) {
4102      Diags.Report(diag::err_target_invalid_feature) << Name;
4103      return 0;
4104    }
4105  }
4106
4107  // Add the features to the compile options.
4108  //
4109  // FIXME: If we are completely confident that we have the right set, we only
4110  // need to pass the minuses.
4111  Opts.Features.clear();
4112  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
4113         ie = Features.end(); it != ie; ++it)
4114    Opts.Features.push_back(std::string(it->second ? "+" : "-") +
4115                            it->first().str());
4116  Target->HandleTargetFeatures(Opts.Features);
4117
4118  return Target.take();
4119}
4120