Targets.cpp revision 6e399b42b5356d8ee59eb5dc4da8c89a0d0b7ae1 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include "llvm/Support/ErrorHandling.h"
30#include "llvm/Type.h"
31#include <algorithm>
32using namespace clang;
33
34//===----------------------------------------------------------------------===//
35//  Common code shared among targets.
36//===----------------------------------------------------------------------===//
37
38/// DefineStd - Define a macro name and standard variants.  For example if
39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
40/// when in GNU mode.
41static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42                      const LangOptions &Opts) {
43  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44
45  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46  // in the user's namespace.
47  if (Opts.GNUMode)
48    Builder.defineMacro(MacroName);
49
50  // Define __unix.
51  Builder.defineMacro("__" + MacroName);
52
53  // Define __unix__.
54  Builder.defineMacro("__" + MacroName + "__");
55}
56
57static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName,
58                            bool Tuning = true) {
59  Builder.defineMacro("__" + CPUName);
60  Builder.defineMacro("__" + CPUName + "__");
61  if (Tuning)
62    Builder.defineMacro("__tune_" + CPUName + "__");
63}
64
65//===----------------------------------------------------------------------===//
66// Defines specific to certain operating systems.
67//===----------------------------------------------------------------------===//
68
69namespace {
70template<typename TgtInfo>
71class OSTargetInfo : public TgtInfo {
72protected:
73  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
74                            MacroBuilder &Builder) const=0;
75public:
76  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
77  virtual void getTargetDefines(const LangOptions &Opts,
78                                MacroBuilder &Builder) const {
79    TgtInfo::getTargetDefines(Opts, Builder);
80    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
81  }
82
83};
84} // end anonymous namespace
85
86
87static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
88                             const llvm::Triple &Triple,
89                             StringRef &PlatformName,
90                             VersionTuple &PlatformMinVersion) {
91  Builder.defineMacro("__APPLE_CC__", "5621");
92  Builder.defineMacro("__APPLE__");
93  Builder.defineMacro("__MACH__");
94  Builder.defineMacro("OBJC_NEW_PROPERTIES");
95  // AddressSanitizer doesn't play well with source fortification, which is on
96  // by default on Darwin.
97  if (Opts.SanitizeAddress) Builder.defineMacro("_FORTIFY_SOURCE", "0");
98
99  if (!Opts.ObjCAutoRefCount) {
100    // __weak is always defined, for use in blocks and with objc pointers.
101    Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
102
103    // Darwin defines __strong even in C mode (just to nothing).
104    if (Opts.getGC() != LangOptions::NonGC)
105      Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
106    else
107      Builder.defineMacro("__strong", "");
108
109    // __unsafe_unretained is defined to nothing in non-ARC mode. We even
110    // allow this in C, since one might have block pointers in structs that
111    // are used in pure C code and in Objective-C ARC.
112    Builder.defineMacro("__unsafe_unretained", "");
113  }
114
115  if (Opts.Static)
116    Builder.defineMacro("__STATIC__");
117  else
118    Builder.defineMacro("__DYNAMIC__");
119
120  if (Opts.POSIXThreads)
121    Builder.defineMacro("_REENTRANT");
122
123  // Get the platform type and version number from the triple.
124  unsigned Maj, Min, Rev;
125  if (Triple.isMacOSX()) {
126    Triple.getMacOSXVersion(Maj, Min, Rev);
127    PlatformName = "macosx";
128  } else {
129    Triple.getOSVersion(Maj, Min, Rev);
130    PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
131  }
132
133  // If -target arch-pc-win32-macho option specified, we're
134  // generating code for Win32 ABI. No need to emit
135  // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
136  if (PlatformName == "win32") {
137    PlatformMinVersion = VersionTuple(Maj, Min, Rev);
138    return;
139  }
140
141  // Set the appropriate OS version define.
142  if (Triple.getOS() == llvm::Triple::IOS) {
143    assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
144    char Str[6];
145    Str[0] = '0' + Maj;
146    Str[1] = '0' + (Min / 10);
147    Str[2] = '0' + (Min % 10);
148    Str[3] = '0' + (Rev / 10);
149    Str[4] = '0' + (Rev % 10);
150    Str[5] = '\0';
151    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
152  } else {
153    // Note that the Driver allows versions which aren't representable in the
154    // define (because we only get a single digit for the minor and micro
155    // revision numbers). So, we limit them to the maximum representable
156    // version.
157    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
158    assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
159    char Str[5];
160    Str[0] = '0' + (Maj / 10);
161    Str[1] = '0' + (Maj % 10);
162    Str[2] = '0' + std::min(Min, 9U);
163    Str[3] = '0' + std::min(Rev, 9U);
164    Str[4] = '\0';
165    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
166  }
167
168  PlatformMinVersion = VersionTuple(Maj, Min, Rev);
169}
170
171namespace {
172template<typename Target>
173class DarwinTargetInfo : public OSTargetInfo<Target> {
174protected:
175  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
176                            MacroBuilder &Builder) const {
177    getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
178                     this->PlatformMinVersion);
179  }
180
181public:
182  DarwinTargetInfo(const std::string& triple) :
183    OSTargetInfo<Target>(triple) {
184      llvm::Triple T = llvm::Triple(triple);
185      this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
186      this->MCountName = "\01mcount";
187    }
188
189  virtual std::string isValidSectionSpecifier(StringRef SR) const {
190    // Let MCSectionMachO validate this.
191    StringRef Segment, Section;
192    unsigned TAA, StubSize;
193    bool HasTAA;
194    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
195                                                       TAA, HasTAA, StubSize);
196  }
197
198  virtual const char *getStaticInitSectionSpecifier() const {
199    // FIXME: We should return 0 when building kexts.
200    return "__TEXT,__StaticInit,regular,pure_instructions";
201  }
202
203  /// Darwin does not support protected visibility.  Darwin's "default"
204  /// is very similar to ELF's "protected";  Darwin requires a "weak"
205  /// attribute on declarations that can be dynamically replaced.
206  virtual bool hasProtectedVisibility() const {
207    return false;
208  }
209};
210
211
212// DragonFlyBSD Target
213template<typename Target>
214class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
215protected:
216  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
217                            MacroBuilder &Builder) const {
218    // DragonFly defines; list based off of gcc output
219    Builder.defineMacro("__DragonFly__");
220    Builder.defineMacro("__DragonFly_cc_version", "100001");
221    Builder.defineMacro("__ELF__");
222    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
223    Builder.defineMacro("__tune_i386__");
224    DefineStd(Builder, "unix", Opts);
225  }
226public:
227  DragonFlyBSDTargetInfo(const std::string &triple)
228    : OSTargetInfo<Target>(triple) {
229      this->UserLabelPrefix = "";
230
231      llvm::Triple Triple(triple);
232      switch (Triple.getArch()) {
233        default:
234        case llvm::Triple::x86:
235        case llvm::Triple::x86_64:
236          this->MCountName = ".mcount";
237          break;
238      }
239  }
240};
241
242// FreeBSD Target
243template<typename Target>
244class FreeBSDTargetInfo : public OSTargetInfo<Target> {
245protected:
246  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
247                            MacroBuilder &Builder) const {
248    // FreeBSD defines; list based off of gcc output
249
250    unsigned Release = Triple.getOSMajorVersion();
251    if (Release == 0U)
252      Release = 8;
253
254    Builder.defineMacro("__FreeBSD__", Twine(Release));
255    Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
256    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
257    DefineStd(Builder, "unix", Opts);
258    Builder.defineMacro("__ELF__");
259  }
260public:
261  FreeBSDTargetInfo(const std::string &triple)
262    : OSTargetInfo<Target>(triple) {
263      this->UserLabelPrefix = "";
264
265      llvm::Triple Triple(triple);
266      switch (Triple.getArch()) {
267        default:
268        case llvm::Triple::x86:
269        case llvm::Triple::x86_64:
270          this->MCountName = ".mcount";
271          break;
272        case llvm::Triple::mips:
273        case llvm::Triple::mipsel:
274        case llvm::Triple::ppc:
275        case llvm::Triple::ppc64:
276          this->MCountName = "_mcount";
277          break;
278        case llvm::Triple::arm:
279          this->MCountName = "__mcount";
280          break;
281      }
282
283    }
284};
285
286// Minix Target
287template<typename Target>
288class MinixTargetInfo : public OSTargetInfo<Target> {
289protected:
290  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
291                            MacroBuilder &Builder) const {
292    // Minix defines
293
294    Builder.defineMacro("__minix", "3");
295    Builder.defineMacro("_EM_WSIZE", "4");
296    Builder.defineMacro("_EM_PSIZE", "4");
297    Builder.defineMacro("_EM_SSIZE", "2");
298    Builder.defineMacro("_EM_LSIZE", "4");
299    Builder.defineMacro("_EM_FSIZE", "4");
300    Builder.defineMacro("_EM_DSIZE", "8");
301    Builder.defineMacro("__ELF__");
302    DefineStd(Builder, "unix", Opts);
303  }
304public:
305  MinixTargetInfo(const std::string &triple)
306    : OSTargetInfo<Target>(triple) {
307      this->UserLabelPrefix = "";
308    }
309};
310
311// Linux target
312template<typename Target>
313class LinuxTargetInfo : public OSTargetInfo<Target> {
314protected:
315  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
316                            MacroBuilder &Builder) const {
317    // Linux defines; list based off of gcc output
318    DefineStd(Builder, "unix", Opts);
319    DefineStd(Builder, "linux", Opts);
320    Builder.defineMacro("__gnu_linux__");
321    Builder.defineMacro("__ELF__");
322    if (Triple.getEnvironment() == llvm::Triple::Android)
323      Builder.defineMacro("__ANDROID__", "1");
324    if (Opts.POSIXThreads)
325      Builder.defineMacro("_REENTRANT");
326    if (Opts.CPlusPlus)
327      Builder.defineMacro("_GNU_SOURCE");
328  }
329public:
330  LinuxTargetInfo(const std::string& triple)
331    : OSTargetInfo<Target>(triple) {
332    this->UserLabelPrefix = "";
333    this->WIntType = TargetInfo::UnsignedInt;
334  }
335
336  virtual const char *getStaticInitSectionSpecifier() const {
337    return ".text.startup";
338  }
339};
340
341// NetBSD Target
342template<typename Target>
343class NetBSDTargetInfo : public OSTargetInfo<Target> {
344protected:
345  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
346                            MacroBuilder &Builder) const {
347    // NetBSD defines; list based off of gcc output
348    Builder.defineMacro("__NetBSD__");
349    Builder.defineMacro("__unix__");
350    Builder.defineMacro("__ELF__");
351    if (Opts.POSIXThreads)
352      Builder.defineMacro("_POSIX_THREADS");
353  }
354public:
355  NetBSDTargetInfo(const std::string &triple)
356    : OSTargetInfo<Target>(triple) {
357      this->UserLabelPrefix = "";
358    }
359};
360
361// OpenBSD Target
362template<typename Target>
363class OpenBSDTargetInfo : public OSTargetInfo<Target> {
364protected:
365  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
366                            MacroBuilder &Builder) const {
367    // OpenBSD defines; list based off of gcc output
368
369    Builder.defineMacro("__OpenBSD__");
370    DefineStd(Builder, "unix", Opts);
371    Builder.defineMacro("__ELF__");
372    if (Opts.POSIXThreads)
373      Builder.defineMacro("_REENTRANT");
374  }
375public:
376  OpenBSDTargetInfo(const std::string &triple)
377    : OSTargetInfo<Target>(triple) {
378      this->UserLabelPrefix = "";
379      this->TLSSupported = false;
380
381      llvm::Triple Triple(triple);
382      switch (Triple.getArch()) {
383        default:
384        case llvm::Triple::x86:
385        case llvm::Triple::x86_64:
386        case llvm::Triple::arm:
387        case llvm::Triple::sparc:
388          this->MCountName = "__mcount";
389          break;
390        case llvm::Triple::mips64:
391        case llvm::Triple::mips64el:
392        case llvm::Triple::ppc:
393        case llvm::Triple::sparcv9:
394          this->MCountName = "_mcount";
395          break;
396      }
397  }
398};
399
400// Bitrig Target
401template<typename Target>
402class BitrigTargetInfo : public OSTargetInfo<Target> {
403protected:
404  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
405                            MacroBuilder &Builder) const {
406    // Bitrig defines; list based off of gcc output
407
408    Builder.defineMacro("__Bitrig__");
409    DefineStd(Builder, "unix", Opts);
410    Builder.defineMacro("__ELF__");
411    if (Opts.POSIXThreads)
412      Builder.defineMacro("_REENTRANT");
413  }
414public:
415  BitrigTargetInfo(const std::string &triple)
416    : OSTargetInfo<Target>(triple) {
417      this->UserLabelPrefix = "";
418      this->TLSSupported = false;
419      this->MCountName = "__mcount";
420  }
421};
422
423// PSP Target
424template<typename Target>
425class PSPTargetInfo : public OSTargetInfo<Target> {
426protected:
427  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
428                            MacroBuilder &Builder) const {
429    // PSP defines; list based on the output of the pspdev gcc toolchain.
430    Builder.defineMacro("PSP");
431    Builder.defineMacro("_PSP");
432    Builder.defineMacro("__psp__");
433    Builder.defineMacro("__ELF__");
434  }
435public:
436  PSPTargetInfo(const std::string& triple)
437    : OSTargetInfo<Target>(triple) {
438    this->UserLabelPrefix = "";
439  }
440};
441
442// PS3 PPU Target
443template<typename Target>
444class PS3PPUTargetInfo : public OSTargetInfo<Target> {
445protected:
446  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
447                            MacroBuilder &Builder) const {
448    // PS3 PPU defines.
449    Builder.defineMacro("__PPC__");
450    Builder.defineMacro("__PPU__");
451    Builder.defineMacro("__CELLOS_LV2__");
452    Builder.defineMacro("__ELF__");
453    Builder.defineMacro("__LP32__");
454    Builder.defineMacro("_ARCH_PPC64");
455    Builder.defineMacro("__powerpc64__");
456  }
457public:
458  PS3PPUTargetInfo(const std::string& triple)
459    : OSTargetInfo<Target>(triple) {
460    this->UserLabelPrefix = "";
461    this->LongWidth = this->LongAlign = 32;
462    this->PointerWidth = this->PointerAlign = 32;
463    this->IntMaxType = TargetInfo::SignedLongLong;
464    this->UIntMaxType = TargetInfo::UnsignedLongLong;
465    this->Int64Type = TargetInfo::SignedLongLong;
466    this->SizeType = TargetInfo::UnsignedInt;
467    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
468                              "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
469  }
470};
471
472// FIXME: Need a real SPU target.
473// PS3 SPU Target
474template<typename Target>
475class PS3SPUTargetInfo : public OSTargetInfo<Target> {
476protected:
477  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
478                            MacroBuilder &Builder) const {
479    // PS3 PPU defines.
480    Builder.defineMacro("__SPU__");
481    Builder.defineMacro("__ELF__");
482  }
483public:
484  PS3SPUTargetInfo(const std::string& triple)
485    : OSTargetInfo<Target>(triple) {
486    this->UserLabelPrefix = "";
487  }
488};
489
490// AuroraUX target
491template<typename Target>
492class AuroraUXTargetInfo : public OSTargetInfo<Target> {
493protected:
494  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
495                            MacroBuilder &Builder) const {
496    DefineStd(Builder, "sun", Opts);
497    DefineStd(Builder, "unix", Opts);
498    Builder.defineMacro("__ELF__");
499    Builder.defineMacro("__svr4__");
500    Builder.defineMacro("__SVR4");
501  }
502public:
503  AuroraUXTargetInfo(const std::string& triple)
504    : OSTargetInfo<Target>(triple) {
505    this->UserLabelPrefix = "";
506    this->WCharType = this->SignedLong;
507    // FIXME: WIntType should be SignedLong
508  }
509};
510
511// Solaris target
512template<typename Target>
513class SolarisTargetInfo : public OSTargetInfo<Target> {
514protected:
515  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
516                            MacroBuilder &Builder) const {
517    DefineStd(Builder, "sun", Opts);
518    DefineStd(Builder, "unix", Opts);
519    Builder.defineMacro("__ELF__");
520    Builder.defineMacro("__svr4__");
521    Builder.defineMacro("__SVR4");
522    // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and
523    // newer, but to 500 for everything else.  feature_test.h has a check to
524    // ensure that you are not using C99 with an old version of X/Open or C89
525    // with a new version.
526    if (Opts.C99 || Opts.C11)
527      Builder.defineMacro("_XOPEN_SOURCE", "600");
528    else
529      Builder.defineMacro("_XOPEN_SOURCE", "500");
530    if (Opts.CPlusPlus)
531      Builder.defineMacro("__C99FEATURES__");
532    Builder.defineMacro("_LARGEFILE_SOURCE");
533    Builder.defineMacro("_LARGEFILE64_SOURCE");
534    Builder.defineMacro("__EXTENSIONS__");
535    Builder.defineMacro("_REENTRANT");
536  }
537public:
538  SolarisTargetInfo(const std::string& triple)
539    : OSTargetInfo<Target>(triple) {
540    this->UserLabelPrefix = "";
541    this->WCharType = this->SignedInt;
542    // FIXME: WIntType should be SignedLong
543  }
544};
545
546// Windows target
547template<typename Target>
548class WindowsTargetInfo : public OSTargetInfo<Target> {
549protected:
550  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
551                            MacroBuilder &Builder) const {
552    Builder.defineMacro("_WIN32");
553  }
554  void getVisualStudioDefines(const LangOptions &Opts,
555                              MacroBuilder &Builder) const {
556    if (Opts.CPlusPlus) {
557      if (Opts.RTTI)
558        Builder.defineMacro("_CPPRTTI");
559
560      if (Opts.Exceptions)
561        Builder.defineMacro("_CPPUNWIND");
562    }
563
564    if (!Opts.CharIsSigned)
565      Builder.defineMacro("_CHAR_UNSIGNED");
566
567    // FIXME: POSIXThreads isn't exactly the option this should be defined for,
568    //        but it works for now.
569    if (Opts.POSIXThreads)
570      Builder.defineMacro("_MT");
571
572    if (Opts.MSCVersion != 0)
573      Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
574
575    if (Opts.MicrosoftExt) {
576      Builder.defineMacro("_MSC_EXTENSIONS");
577
578      if (Opts.CPlusPlus0x) {
579        Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
580        Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
581        Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
582      }
583    }
584
585    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
586  }
587
588public:
589  WindowsTargetInfo(const std::string &triple)
590    : OSTargetInfo<Target>(triple) {}
591};
592
593template <typename Target>
594class NaClTargetInfo : public OSTargetInfo<Target> {
595 protected:
596  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
597                            MacroBuilder &Builder) const {
598    if (Opts.POSIXThreads)
599      Builder.defineMacro("_REENTRANT");
600    if (Opts.CPlusPlus)
601      Builder.defineMacro("_GNU_SOURCE");
602
603    DefineStd(Builder, "unix", Opts);
604    Builder.defineMacro("__ELF__");
605    Builder.defineMacro("__native_client__");
606  }
607 public:
608  NaClTargetInfo(const std::string &triple)
609    : OSTargetInfo<Target>(triple) {
610    this->UserLabelPrefix = "";
611    this->LongAlign = 32;
612    this->LongWidth = 32;
613    this->PointerAlign = 32;
614    this->PointerWidth = 32;
615    this->IntMaxType = TargetInfo::SignedLongLong;
616    this->UIntMaxType = TargetInfo::UnsignedLongLong;
617    this->Int64Type = TargetInfo::SignedLongLong;
618    this->DoubleAlign = 64;
619    this->LongDoubleWidth = 64;
620    this->LongDoubleAlign = 64;
621    this->SizeType = TargetInfo::UnsignedInt;
622    this->PtrDiffType = TargetInfo::SignedInt;
623    this->IntPtrType = TargetInfo::SignedInt;
624    this->RegParmMax = 2;
625    this->LongDoubleFormat = &llvm::APFloat::IEEEdouble;
626    this->DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
627                              "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
628  }
629  virtual typename Target::CallingConvCheckResult checkCallingConvention(
630      CallingConv CC) const {
631    return CC == CC_PnaclCall ? Target::CCCR_OK :
632        Target::checkCallingConvention(CC);
633  }
634};
635} // end anonymous namespace.
636
637//===----------------------------------------------------------------------===//
638// Specific target implementations.
639//===----------------------------------------------------------------------===//
640
641namespace {
642// PPC abstract base class
643class PPCTargetInfo : public TargetInfo {
644  static const Builtin::Info BuiltinInfo[];
645  static const char * const GCCRegNames[];
646  static const TargetInfo::GCCRegAlias GCCRegAliases[];
647  std::string CPU;
648public:
649  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {
650    LongDoubleWidth = LongDoubleAlign = 128;
651    LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
652  }
653
654  /// \brief Flags for architecture specific defines.
655  typedef enum {
656    ArchDefineNone  = 0,
657    ArchDefineName  = 1 << 0, // <name> is substituted for arch name.
658    ArchDefinePpcgr = 1 << 1,
659    ArchDefinePpcsq = 1 << 2,
660    ArchDefine440   = 1 << 3,
661    ArchDefine603   = 1 << 4,
662    ArchDefine604   = 1 << 5,
663    ArchDefinePwr4  = 1 << 6,
664    ArchDefinePwr6  = 1 << 7
665  } ArchDefineTypes;
666
667  virtual bool setCPU(const std::string &Name) {
668    bool CPUKnown = llvm::StringSwitch<bool>(Name)
669      .Case("generic", true)
670      .Case("440", true)
671      .Case("450", true)
672      .Case("601", true)
673      .Case("602", true)
674      .Case("603", true)
675      .Case("603e", true)
676      .Case("603ev", true)
677      .Case("604", true)
678      .Case("604e", true)
679      .Case("620", true)
680      .Case("g3", true)
681      .Case("7400", true)
682      .Case("g4", true)
683      .Case("7450", true)
684      .Case("g4+", true)
685      .Case("750", true)
686      .Case("970", true)
687      .Case("g5", true)
688      .Case("a2", true)
689      .Case("e500mc", true)
690      .Case("e5500", true)
691      .Case("pwr6", true)
692      .Case("pwr7", true)
693      .Case("ppc", true)
694      .Case("ppc64", true)
695      .Default(false);
696
697    if (CPUKnown)
698      CPU = Name;
699
700    return CPUKnown;
701  }
702
703  virtual void getTargetBuiltins(const Builtin::Info *&Records,
704                                 unsigned &NumRecords) const {
705    Records = BuiltinInfo;
706    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
707  }
708
709  virtual bool isCLZForZeroUndef() const { return false; }
710
711  virtual void getTargetDefines(const LangOptions &Opts,
712                                MacroBuilder &Builder) const;
713
714  virtual bool hasFeature(StringRef Feature) const;
715
716  virtual void getGCCRegNames(const char * const *&Names,
717                              unsigned &NumNames) const;
718  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
719                                unsigned &NumAliases) const;
720  virtual bool validateAsmConstraint(const char *&Name,
721                                     TargetInfo::ConstraintInfo &Info) const {
722    switch (*Name) {
723    default: return false;
724    case 'O': // Zero
725      break;
726    case 'b': // Base register
727    case 'f': // Floating point register
728      Info.setAllowsRegister();
729      break;
730    // FIXME: The following are added to allow parsing.
731    // I just took a guess at what the actions should be.
732    // Also, is more specific checking needed?  I.e. specific registers?
733    case 'd': // Floating point register (containing 64-bit value)
734    case 'v': // Altivec vector register
735      Info.setAllowsRegister();
736      break;
737    case 'w':
738      switch (Name[1]) {
739        case 'd':// VSX vector register to hold vector double data
740        case 'f':// VSX vector register to hold vector float data
741        case 's':// VSX vector register to hold scalar float data
742        case 'a':// Any VSX register
743          break;
744        default:
745          return false;
746      }
747      Info.setAllowsRegister();
748      Name++; // Skip over 'w'.
749      break;
750    case 'h': // `MQ', `CTR', or `LINK' register
751    case 'q': // `MQ' register
752    case 'c': // `CTR' register
753    case 'l': // `LINK' register
754    case 'x': // `CR' register (condition register) number 0
755    case 'y': // `CR' register (condition register)
756    case 'z': // `XER[CA]' carry bit (part of the XER register)
757      Info.setAllowsRegister();
758      break;
759    case 'I': // Signed 16-bit constant
760    case 'J': // Unsigned 16-bit constant shifted left 16 bits
761              //  (use `L' instead for SImode constants)
762    case 'K': // Unsigned 16-bit constant
763    case 'L': // Signed 16-bit constant shifted left 16 bits
764    case 'M': // Constant larger than 31
765    case 'N': // Exact power of 2
766    case 'P': // Constant whose negation is a signed 16-bit constant
767    case 'G': // Floating point constant that can be loaded into a
768              // register with one instruction per word
769    case 'H': // Integer/Floating point constant that can be loaded
770              // into a register using three instructions
771      break;
772    case 'm': // Memory operand. Note that on PowerPC targets, m can
773              // include addresses that update the base register. It
774              // is therefore only safe to use `m' in an asm statement
775              // if that asm statement accesses the operand exactly once.
776              // The asm statement must also use `%U<opno>' as a
777              // placeholder for the "update" flag in the corresponding
778              // load or store instruction. For example:
779              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
780              // is correct but:
781              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
782              // is not. Use es rather than m if you don't want the base
783              // register to be updated.
784    case 'e':
785      if (Name[1] != 's')
786          return false;
787              // es: A "stable" memory operand; that is, one which does not
788              // include any automodification of the base register. Unlike
789              // `m', this constraint can be used in asm statements that
790              // might access the operand several times, or that might not
791              // access it at all.
792      Info.setAllowsMemory();
793      Name++; // Skip over 'e'.
794      break;
795    case 'Q': // Memory operand that is an offset from a register (it is
796              // usually better to use `m' or `es' in asm statements)
797    case 'Z': // Memory operand that is an indexed or indirect from a
798              // register (it is usually better to use `m' or `es' in
799              // asm statements)
800      Info.setAllowsMemory();
801      Info.setAllowsRegister();
802      break;
803    case 'R': // AIX TOC entry
804    case 'a': // Address operand that is an indexed or indirect from a
805              // register (`p' is preferable for asm statements)
806    case 'S': // Constant suitable as a 64-bit mask operand
807    case 'T': // Constant suitable as a 32-bit mask operand
808    case 'U': // System V Release 4 small data area reference
809    case 't': // AND masks that can be performed by two rldic{l, r}
810              // instructions
811    case 'W': // Vector constant that does not require memory
812    case 'j': // Vector constant that is all zeros.
813      break;
814    // End FIXME.
815    }
816    return true;
817  }
818  virtual const char *getClobbers() const {
819    return "";
820  }
821};
822
823const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
824#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
825#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
826                                              ALL_LANGUAGES },
827#include "clang/Basic/BuiltinsPPC.def"
828};
829
830
831/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
832/// #defines that are not tied to a specific subtarget.
833void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
834                                     MacroBuilder &Builder) const {
835  // Target identification.
836  Builder.defineMacro("__ppc__");
837  Builder.defineMacro("_ARCH_PPC");
838  Builder.defineMacro("__powerpc__");
839  Builder.defineMacro("__POWERPC__");
840  if (PointerWidth == 64) {
841    Builder.defineMacro("_ARCH_PPC64");
842    Builder.defineMacro("__powerpc64__");
843    Builder.defineMacro("__ppc64__");
844  } else {
845    Builder.defineMacro("__ppc__");
846  }
847
848  // Target properties.
849  if (getTriple().getOS() != llvm::Triple::NetBSD &&
850      getTriple().getOS() != llvm::Triple::OpenBSD)
851    Builder.defineMacro("_BIG_ENDIAN");
852  Builder.defineMacro("__BIG_ENDIAN__");
853
854  // Subtarget options.
855  Builder.defineMacro("__NATURAL_ALIGNMENT__");
856  Builder.defineMacro("__REGISTER_PREFIX__", "");
857
858  // FIXME: Should be controlled by command line option.
859  Builder.defineMacro("__LONG_DOUBLE_128__");
860
861  if (Opts.AltiVec) {
862    Builder.defineMacro("__VEC__", "10206");
863    Builder.defineMacro("__ALTIVEC__");
864  }
865
866  // CPU identification.
867  ArchDefineTypes defs = (ArchDefineTypes)llvm::StringSwitch<int>(CPU)
868    .Case("440",   ArchDefineName)
869    .Case("450",   ArchDefineName | ArchDefine440)
870    .Case("601",   ArchDefineName)
871    .Case("602",   ArchDefineName | ArchDefinePpcgr)
872    .Case("603",   ArchDefineName | ArchDefinePpcgr)
873    .Case("603e",  ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
874    .Case("603ev", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
875    .Case("604",   ArchDefineName | ArchDefinePpcgr)
876    .Case("604e",  ArchDefineName | ArchDefine604 | ArchDefinePpcgr)
877    .Case("620",   ArchDefineName | ArchDefinePpcgr)
878    .Case("7400",  ArchDefineName | ArchDefinePpcgr)
879    .Case("7450",  ArchDefineName | ArchDefinePpcgr)
880    .Case("750",   ArchDefineName | ArchDefinePpcgr)
881    .Case("970",   ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr
882                     | ArchDefinePpcsq)
883    .Case("pwr6",  ArchDefinePwr6 | ArchDefinePpcgr | ArchDefinePpcsq)
884    .Case("pwr7",  ArchDefineName | ArchDefinePwr6 | ArchDefinePpcgr
885                     | ArchDefinePpcsq)
886    .Default(ArchDefineNone);
887
888  if (defs & ArchDefineName)
889    Builder.defineMacro(Twine("_ARCH_", StringRef(CPU).upper()));
890  if (defs & ArchDefinePpcgr)
891    Builder.defineMacro("_ARCH_PPCGR");
892  if (defs & ArchDefinePpcsq)
893    Builder.defineMacro("_ARCH_PPCSQ");
894  if (defs & ArchDefine440)
895    Builder.defineMacro("_ARCH_440");
896  if (defs & ArchDefine603)
897    Builder.defineMacro("_ARCH_603");
898  if (defs & ArchDefine604)
899    Builder.defineMacro("_ARCH_604");
900  if (defs & (ArchDefinePwr4 | ArchDefinePwr6))
901    Builder.defineMacro("_ARCH_PWR4");
902  if (defs & ArchDefinePwr6) {
903    Builder.defineMacro("_ARCH_PWR5");
904    Builder.defineMacro("_ARCH_PWR6");
905  }
906}
907
908bool PPCTargetInfo::hasFeature(StringRef Feature) const {
909  return Feature == "powerpc";
910}
911
912
913const char * const PPCTargetInfo::GCCRegNames[] = {
914  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
915  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
916  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
917  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
918  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
919  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
920  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
921  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
922  "mq", "lr", "ctr", "ap",
923  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
924  "xer",
925  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
926  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
927  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
928  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
929  "vrsave", "vscr",
930  "spe_acc", "spefscr",
931  "sfp"
932};
933
934void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
935                                   unsigned &NumNames) const {
936  Names = GCCRegNames;
937  NumNames = llvm::array_lengthof(GCCRegNames);
938}
939
940const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
941  // While some of these aliases do map to different registers
942  // they still share the same register name.
943  { { "0" }, "r0" },
944  { { "1"}, "r1" },
945  { { "2" }, "r2" },
946  { { "3" }, "r3" },
947  { { "4" }, "r4" },
948  { { "5" }, "r5" },
949  { { "6" }, "r6" },
950  { { "7" }, "r7" },
951  { { "8" }, "r8" },
952  { { "9" }, "r9" },
953  { { "10" }, "r10" },
954  { { "11" }, "r11" },
955  { { "12" }, "r12" },
956  { { "13" }, "r13" },
957  { { "14" }, "r14" },
958  { { "15" }, "r15" },
959  { { "16" }, "r16" },
960  { { "17" }, "r17" },
961  { { "18" }, "r18" },
962  { { "19" }, "r19" },
963  { { "20" }, "r20" },
964  { { "21" }, "r21" },
965  { { "22" }, "r22" },
966  { { "23" }, "r23" },
967  { { "24" }, "r24" },
968  { { "25" }, "r25" },
969  { { "26" }, "r26" },
970  { { "27" }, "r27" },
971  { { "28" }, "r28" },
972  { { "29" }, "r29" },
973  { { "30" }, "r30" },
974  { { "31" }, "r31" },
975  { { "fr0" }, "f0" },
976  { { "fr1" }, "f1" },
977  { { "fr2" }, "f2" },
978  { { "fr3" }, "f3" },
979  { { "fr4" }, "f4" },
980  { { "fr5" }, "f5" },
981  { { "fr6" }, "f6" },
982  { { "fr7" }, "f7" },
983  { { "fr8" }, "f8" },
984  { { "fr9" }, "f9" },
985  { { "fr10" }, "f10" },
986  { { "fr11" }, "f11" },
987  { { "fr12" }, "f12" },
988  { { "fr13" }, "f13" },
989  { { "fr14" }, "f14" },
990  { { "fr15" }, "f15" },
991  { { "fr16" }, "f16" },
992  { { "fr17" }, "f17" },
993  { { "fr18" }, "f18" },
994  { { "fr19" }, "f19" },
995  { { "fr20" }, "f20" },
996  { { "fr21" }, "f21" },
997  { { "fr22" }, "f22" },
998  { { "fr23" }, "f23" },
999  { { "fr24" }, "f24" },
1000  { { "fr25" }, "f25" },
1001  { { "fr26" }, "f26" },
1002  { { "fr27" }, "f27" },
1003  { { "fr28" }, "f28" },
1004  { { "fr29" }, "f29" },
1005  { { "fr30" }, "f30" },
1006  { { "fr31" }, "f31" },
1007  { { "cc" }, "cr0" },
1008};
1009
1010void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1011                                     unsigned &NumAliases) const {
1012  Aliases = GCCRegAliases;
1013  NumAliases = llvm::array_lengthof(GCCRegAliases);
1014}
1015} // end anonymous namespace.
1016
1017namespace {
1018class PPC32TargetInfo : public PPCTargetInfo {
1019public:
1020  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
1021    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1022                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
1023
1024    switch (getTriple().getOS()) {
1025    case llvm::Triple::Linux:
1026    case llvm::Triple::FreeBSD:
1027    case llvm::Triple::NetBSD:
1028      SizeType = UnsignedInt;
1029      PtrDiffType = SignedInt;
1030      IntPtrType = SignedInt;
1031      break;
1032    default:
1033      break;
1034    }
1035
1036    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1037      LongDoubleWidth = LongDoubleAlign = 64;
1038      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1039    }
1040
1041    // PPC32 supports atomics up to 4 bytes.
1042    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
1043  }
1044
1045  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1046    // This is the ELF definition, and is overridden by the Darwin sub-target
1047    return TargetInfo::PowerABIBuiltinVaList;
1048  }
1049};
1050} // end anonymous namespace.
1051
1052namespace {
1053class PPC64TargetInfo : public PPCTargetInfo {
1054public:
1055  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
1056    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1057    IntMaxType = SignedLong;
1058    UIntMaxType = UnsignedLong;
1059    Int64Type = SignedLong;
1060
1061    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1062      LongDoubleWidth = LongDoubleAlign = 64;
1063      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1064      DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1065                          "i64:64:64-f32:32:32-f64:64:64-f128:64:64-"
1066                          "v128:128:128-n32:64";
1067    } else
1068      DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1069                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
1070                          "v128:128:128-n32:64";
1071
1072    // PPC64 supports atomics up to 8 bytes.
1073    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
1074  }
1075  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1076    return TargetInfo::CharPtrBuiltinVaList;
1077  }
1078};
1079} // end anonymous namespace.
1080
1081
1082namespace {
1083class DarwinPPC32TargetInfo :
1084  public DarwinTargetInfo<PPC32TargetInfo> {
1085public:
1086  DarwinPPC32TargetInfo(const std::string& triple)
1087    : DarwinTargetInfo<PPC32TargetInfo>(triple) {
1088    HasAlignMac68kSupport = true;
1089    BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
1090    LongLongAlign = 32;
1091    SuitableAlign = 128;
1092    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1093                        "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32";
1094  }
1095  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1096    return TargetInfo::CharPtrBuiltinVaList;
1097  }
1098};
1099
1100class DarwinPPC64TargetInfo :
1101  public DarwinTargetInfo<PPC64TargetInfo> {
1102public:
1103  DarwinPPC64TargetInfo(const std::string& triple)
1104    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
1105    HasAlignMac68kSupport = true;
1106    SuitableAlign = 128;
1107    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1108                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
1109  }
1110};
1111} // end anonymous namespace.
1112
1113namespace {
1114  static const unsigned NVPTXAddrSpaceMap[] = {
1115    1,    // opencl_global
1116    3,    // opencl_local
1117    4,    // opencl_constant
1118    1,    // cuda_device
1119    4,    // cuda_constant
1120    3,    // cuda_shared
1121  };
1122  class NVPTXTargetInfo : public TargetInfo {
1123    static const char * const GCCRegNames[];
1124    static const Builtin::Info BuiltinInfo[];
1125    std::vector<llvm::StringRef> AvailableFeatures;
1126  public:
1127    NVPTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
1128      BigEndian = false;
1129      TLSSupported = false;
1130      LongWidth = LongAlign = 64;
1131      AddrSpaceMap = &NVPTXAddrSpaceMap;
1132      // Define available target features
1133      // These must be defined in sorted order!
1134      NoAsmVariants = true;
1135    }
1136    virtual void getTargetDefines(const LangOptions &Opts,
1137                                  MacroBuilder &Builder) const {
1138      Builder.defineMacro("__PTX__");
1139      Builder.defineMacro("__NVPTX__");
1140    }
1141    virtual void getTargetBuiltins(const Builtin::Info *&Records,
1142                                   unsigned &NumRecords) const {
1143      Records = BuiltinInfo;
1144      NumRecords = clang::NVPTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
1145    }
1146    virtual bool hasFeature(StringRef Feature) const {
1147      return Feature == "ptx" || Feature == "nvptx";
1148    }
1149
1150    virtual void getGCCRegNames(const char * const *&Names,
1151                                unsigned &NumNames) const;
1152    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1153                                  unsigned &NumAliases) const {
1154      // No aliases.
1155      Aliases = 0;
1156      NumAliases = 0;
1157    }
1158    virtual bool validateAsmConstraint(const char *&Name,
1159                                       TargetInfo::ConstraintInfo &info) const {
1160      // FIXME: implement
1161      return true;
1162    }
1163    virtual const char *getClobbers() const {
1164      // FIXME: Is this really right?
1165      return "";
1166    }
1167    virtual BuiltinVaListKind getBuiltinVaListKind() const {
1168      // FIXME: implement
1169      return TargetInfo::CharPtrBuiltinVaList;
1170    }
1171    virtual bool setCPU(const std::string &Name) {
1172      return Name == "sm_10" || Name == "sm_13" || Name == "sm_20";
1173    }
1174    virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1175                                   StringRef Name,
1176                                   bool Enabled) const;
1177  };
1178
1179  const Builtin::Info NVPTXTargetInfo::BuiltinInfo[] = {
1180#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1181#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1182                                              ALL_LANGUAGES },
1183#include "clang/Basic/BuiltinsNVPTX.def"
1184  };
1185
1186  const char * const NVPTXTargetInfo::GCCRegNames[] = {
1187    "r0"
1188  };
1189
1190  void NVPTXTargetInfo::getGCCRegNames(const char * const *&Names,
1191                                     unsigned &NumNames) const {
1192    Names = GCCRegNames;
1193    NumNames = llvm::array_lengthof(GCCRegNames);
1194  }
1195
1196  bool NVPTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1197                                          StringRef Name,
1198                                          bool Enabled) const {
1199    if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
1200                          Name)) {
1201      Features[Name] = Enabled;
1202      return true;
1203    } else {
1204      return false;
1205    }
1206  }
1207
1208  class NVPTX32TargetInfo : public NVPTXTargetInfo {
1209  public:
1210    NVPTX32TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1211      PointerWidth = PointerAlign = 32;
1212      SizeType     = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1213      DescriptionString
1214        = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1215          "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1216          "n16:32:64";
1217  }
1218  };
1219
1220  class NVPTX64TargetInfo : public NVPTXTargetInfo {
1221  public:
1222    NVPTX64TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1223      PointerWidth = PointerAlign = 64;
1224      SizeType     = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1225      DescriptionString
1226        = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1227          "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1228          "n16:32:64";
1229  }
1230  };
1231}
1232
1233namespace {
1234
1235static const unsigned R600AddrSpaceMap[] = {
1236  1,    // opencl_global
1237  3,    // opencl_local
1238  2,    // opencl_constant
1239  1,    // cuda_device
1240  2,    // cuda_constant
1241  3     // cuda_shared
1242};
1243
1244class R600TargetInfo : public TargetInfo {
1245public:
1246  R600TargetInfo(const std::string& triple) : TargetInfo(triple) {
1247    DescriptionString =
1248          "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16"
1249          "-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:32:32"
1250          "-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64"
1251          "-v96:128:128-v128:128:128-v192:256:256-v256:256:256"
1252          "-v512:512:512-v1024:1024:1024-v2048:2048:2048"
1253          "-n8:16:32:64";
1254    AddrSpaceMap = &R600AddrSpaceMap;
1255  }
1256
1257  virtual const char * getClobbers() const {
1258    return "";
1259  }
1260
1261  virtual void getGCCRegNames(const char * const *&Names,
1262                              unsigned &numNames) const  {
1263    Names = NULL;
1264    numNames = 0;
1265  }
1266
1267  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1268                                unsigned &NumAliases) const {
1269    Aliases = NULL;
1270    NumAliases = 0;
1271  }
1272
1273  virtual bool validateAsmConstraint(const char *&Name,
1274                                     TargetInfo::ConstraintInfo &info) const {
1275    return true;
1276  }
1277
1278  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1279                                 unsigned &NumRecords) const {
1280    Records = NULL;
1281    NumRecords = 0;
1282  }
1283
1284
1285  virtual void getTargetDefines(const LangOptions &Opts,
1286                                MacroBuilder &Builder) const {
1287    Builder.defineMacro("__R600__");
1288  }
1289
1290  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1291    return TargetInfo::CharPtrBuiltinVaList;
1292  }
1293
1294};
1295
1296} // end anonymous namespace
1297
1298namespace {
1299// MBlaze abstract base class
1300class MBlazeTargetInfo : public TargetInfo {
1301  static const char * const GCCRegNames[];
1302  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1303
1304public:
1305  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1306    DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1307  }
1308
1309  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1310                                 unsigned &NumRecords) const {
1311    // FIXME: Implement.
1312    Records = 0;
1313    NumRecords = 0;
1314  }
1315
1316  virtual void getTargetDefines(const LangOptions &Opts,
1317                                MacroBuilder &Builder) const;
1318
1319  virtual bool hasFeature(StringRef Feature) const {
1320    return Feature == "mblaze";
1321  }
1322
1323  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1324    return TargetInfo::CharPtrBuiltinVaList;
1325  }
1326  virtual const char *getTargetPrefix() const {
1327    return "mblaze";
1328  }
1329  virtual void getGCCRegNames(const char * const *&Names,
1330                              unsigned &NumNames) const;
1331  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1332                                unsigned &NumAliases) const;
1333  virtual bool validateAsmConstraint(const char *&Name,
1334                                     TargetInfo::ConstraintInfo &Info) const {
1335    switch (*Name) {
1336    default: return false;
1337    case 'O': // Zero
1338      return true;
1339    case 'b': // Base register
1340    case 'f': // Floating point register
1341      Info.setAllowsRegister();
1342      return true;
1343    }
1344  }
1345  virtual const char *getClobbers() const {
1346    return "";
1347  }
1348};
1349
1350/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1351/// #defines that are not tied to a specific subtarget.
1352void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1353                                     MacroBuilder &Builder) const {
1354  // Target identification.
1355  Builder.defineMacro("__microblaze__");
1356  Builder.defineMacro("_ARCH_MICROBLAZE");
1357  Builder.defineMacro("__MICROBLAZE__");
1358
1359  // Target properties.
1360  Builder.defineMacro("_BIG_ENDIAN");
1361  Builder.defineMacro("__BIG_ENDIAN__");
1362
1363  // Subtarget options.
1364  Builder.defineMacro("__REGISTER_PREFIX__", "");
1365}
1366
1367
1368const char * const MBlazeTargetInfo::GCCRegNames[] = {
1369  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
1370  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
1371  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
1372  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
1373  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
1374  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1375  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1376  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1377  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1378  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
1379};
1380
1381void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1382                                   unsigned &NumNames) const {
1383  Names = GCCRegNames;
1384  NumNames = llvm::array_lengthof(GCCRegNames);
1385}
1386
1387const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1388  { {"f0"},  "r0" },
1389  { {"f1"},  "r1" },
1390  { {"f2"},  "r2" },
1391  { {"f3"},  "r3" },
1392  { {"f4"},  "r4" },
1393  { {"f5"},  "r5" },
1394  { {"f6"},  "r6" },
1395  { {"f7"},  "r7" },
1396  { {"f8"},  "r8" },
1397  { {"f9"},  "r9" },
1398  { {"f10"}, "r10" },
1399  { {"f11"}, "r11" },
1400  { {"f12"}, "r12" },
1401  { {"f13"}, "r13" },
1402  { {"f14"}, "r14" },
1403  { {"f15"}, "r15" },
1404  { {"f16"}, "r16" },
1405  { {"f17"}, "r17" },
1406  { {"f18"}, "r18" },
1407  { {"f19"}, "r19" },
1408  { {"f20"}, "r20" },
1409  { {"f21"}, "r21" },
1410  { {"f22"}, "r22" },
1411  { {"f23"}, "r23" },
1412  { {"f24"}, "r24" },
1413  { {"f25"}, "r25" },
1414  { {"f26"}, "r26" },
1415  { {"f27"}, "r27" },
1416  { {"f28"}, "r28" },
1417  { {"f29"}, "r29" },
1418  { {"f30"}, "r30" },
1419  { {"f31"}, "r31" },
1420};
1421
1422void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1423                                     unsigned &NumAliases) const {
1424  Aliases = GCCRegAliases;
1425  NumAliases = llvm::array_lengthof(GCCRegAliases);
1426}
1427} // end anonymous namespace.
1428
1429namespace {
1430// Namespace for x86 abstract base class
1431const Builtin::Info BuiltinInfo[] = {
1432#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1433#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1434                                              ALL_LANGUAGES },
1435#include "clang/Basic/BuiltinsX86.def"
1436};
1437
1438static const char* const GCCRegNames[] = {
1439  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1440  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1441  "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1442  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1443  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1444  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1445  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1446  "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1447  "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1448};
1449
1450const TargetInfo::AddlRegName AddlRegNames[] = {
1451  { { "al", "ah", "eax", "rax" }, 0 },
1452  { { "bl", "bh", "ebx", "rbx" }, 3 },
1453  { { "cl", "ch", "ecx", "rcx" }, 2 },
1454  { { "dl", "dh", "edx", "rdx" }, 1 },
1455  { { "esi", "rsi" }, 4 },
1456  { { "edi", "rdi" }, 5 },
1457  { { "esp", "rsp" }, 7 },
1458  { { "ebp", "rbp" }, 6 },
1459};
1460
1461// X86 target abstract base class; x86-32 and x86-64 are very close, so
1462// most of the implementation can be shared.
1463class X86TargetInfo : public TargetInfo {
1464  enum X86SSEEnum {
1465    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1466  } SSELevel;
1467  enum MMX3DNowEnum {
1468    NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1469  } MMX3DNowLevel;
1470
1471  bool HasAES;
1472  bool HasPCLMUL;
1473  bool HasLZCNT;
1474  bool HasRDRND;
1475  bool HasBMI;
1476  bool HasBMI2;
1477  bool HasPOPCNT;
1478  bool HasRTM;
1479  bool HasSSE4a;
1480  bool HasFMA4;
1481  bool HasFMA;
1482  bool HasXOP;
1483  bool HasF16C;
1484
1485  /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1486  ///
1487  /// Each enumeration represents a particular CPU supported by Clang. These
1488  /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1489  enum CPUKind {
1490    CK_Generic,
1491
1492    /// \name i386
1493    /// i386-generation processors.
1494    //@{
1495    CK_i386,
1496    //@}
1497
1498    /// \name i486
1499    /// i486-generation processors.
1500    //@{
1501    CK_i486,
1502    CK_WinChipC6,
1503    CK_WinChip2,
1504    CK_C3,
1505    //@}
1506
1507    /// \name i586
1508    /// i586-generation processors, P5 microarchitecture based.
1509    //@{
1510    CK_i586,
1511    CK_Pentium,
1512    CK_PentiumMMX,
1513    //@}
1514
1515    /// \name i686
1516    /// i686-generation processors, P6 / Pentium M microarchitecture based.
1517    //@{
1518    CK_i686,
1519    CK_PentiumPro,
1520    CK_Pentium2,
1521    CK_Pentium3,
1522    CK_Pentium3M,
1523    CK_PentiumM,
1524    CK_C3_2,
1525
1526    /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1527    /// Clang however has some logic to suport this.
1528    // FIXME: Warn, deprecate, and potentially remove this.
1529    CK_Yonah,
1530    //@}
1531
1532    /// \name Netburst
1533    /// Netburst microarchitecture based processors.
1534    //@{
1535    CK_Pentium4,
1536    CK_Pentium4M,
1537    CK_Prescott,
1538    CK_Nocona,
1539    //@}
1540
1541    /// \name Core
1542    /// Core microarchitecture based processors.
1543    //@{
1544    CK_Core2,
1545
1546    /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1547    /// codename which GCC no longer accepts as an option to -march, but Clang
1548    /// has some logic for recognizing it.
1549    // FIXME: Warn, deprecate, and potentially remove this.
1550    CK_Penryn,
1551    //@}
1552
1553    /// \name Atom
1554    /// Atom processors
1555    //@{
1556    CK_Atom,
1557    //@}
1558
1559    /// \name Nehalem
1560    /// Nehalem microarchitecture based processors.
1561    //@{
1562    CK_Corei7,
1563    CK_Corei7AVX,
1564    CK_CoreAVXi,
1565    CK_CoreAVX2,
1566    //@}
1567
1568    /// \name K6
1569    /// K6 architecture processors.
1570    //@{
1571    CK_K6,
1572    CK_K6_2,
1573    CK_K6_3,
1574    //@}
1575
1576    /// \name K7
1577    /// K7 architecture processors.
1578    //@{
1579    CK_Athlon,
1580    CK_AthlonThunderbird,
1581    CK_Athlon4,
1582    CK_AthlonXP,
1583    CK_AthlonMP,
1584    //@}
1585
1586    /// \name K8
1587    /// K8 architecture processors.
1588    //@{
1589    CK_Athlon64,
1590    CK_Athlon64SSE3,
1591    CK_AthlonFX,
1592    CK_K8,
1593    CK_K8SSE3,
1594    CK_Opteron,
1595    CK_OpteronSSE3,
1596    CK_AMDFAM10,
1597    //@}
1598
1599    /// \name Bobcat
1600    /// Bobcat architecture processors.
1601    //@{
1602    CK_BTVER1,
1603    //@}
1604
1605    /// \name Bulldozer
1606    /// Bulldozer architecture processors.
1607    //@{
1608    CK_BDVER1,
1609    CK_BDVER2,
1610    //@}
1611
1612    /// This specification is deprecated and will be removed in the future.
1613    /// Users should prefer \see CK_K8.
1614    // FIXME: Warn on this when the CPU is set to it.
1615    CK_x86_64,
1616    //@}
1617
1618    /// \name Geode
1619    /// Geode processors.
1620    //@{
1621    CK_Geode
1622    //@}
1623  } CPU;
1624
1625public:
1626  X86TargetInfo(const std::string& triple)
1627    : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1628      HasAES(false), HasPCLMUL(false), HasLZCNT(false), HasRDRND(false),
1629      HasBMI(false), HasBMI2(false), HasPOPCNT(false), HasRTM(false),
1630      HasSSE4a(false), HasFMA4(false), HasFMA(false), HasXOP(false),
1631      HasF16C(false), CPU(CK_Generic) {
1632    BigEndian = false;
1633    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1634  }
1635  virtual unsigned getFloatEvalMethod() const {
1636    // X87 evaluates with 80 bits "long double" precision.
1637    return SSELevel == NoSSE ? 2 : 0;
1638  }
1639  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1640                                 unsigned &NumRecords) const {
1641    Records = BuiltinInfo;
1642    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1643  }
1644  virtual void getGCCRegNames(const char * const *&Names,
1645                              unsigned &NumNames) const {
1646    Names = GCCRegNames;
1647    NumNames = llvm::array_lengthof(GCCRegNames);
1648  }
1649  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1650                                unsigned &NumAliases) const {
1651    Aliases = 0;
1652    NumAliases = 0;
1653  }
1654  virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1655                                  unsigned &NumNames) const {
1656    Names = AddlRegNames;
1657    NumNames = llvm::array_lengthof(AddlRegNames);
1658  }
1659  virtual bool validateAsmConstraint(const char *&Name,
1660                                     TargetInfo::ConstraintInfo &info) const;
1661  virtual std::string convertConstraint(const char *&Constraint) const;
1662  virtual const char *getClobbers() const {
1663    return "~{dirflag},~{fpsr},~{flags}";
1664  }
1665  virtual void getTargetDefines(const LangOptions &Opts,
1666                                MacroBuilder &Builder) const;
1667  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1668                                 StringRef Name,
1669                                 bool Enabled) const;
1670  virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1671  virtual bool hasFeature(StringRef Feature) const;
1672  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1673  virtual const char* getABI() const {
1674    if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
1675      return "avx";
1676    else if (getTriple().getArch() == llvm::Triple::x86 &&
1677             MMX3DNowLevel == NoMMX3DNow)
1678      return "no-mmx";
1679    return "";
1680  }
1681  virtual bool setCPU(const std::string &Name) {
1682    CPU = llvm::StringSwitch<CPUKind>(Name)
1683      .Case("i386", CK_i386)
1684      .Case("i486", CK_i486)
1685      .Case("winchip-c6", CK_WinChipC6)
1686      .Case("winchip2", CK_WinChip2)
1687      .Case("c3", CK_C3)
1688      .Case("i586", CK_i586)
1689      .Case("pentium", CK_Pentium)
1690      .Case("pentium-mmx", CK_PentiumMMX)
1691      .Case("i686", CK_i686)
1692      .Case("pentiumpro", CK_PentiumPro)
1693      .Case("pentium2", CK_Pentium2)
1694      .Case("pentium3", CK_Pentium3)
1695      .Case("pentium3m", CK_Pentium3M)
1696      .Case("pentium-m", CK_PentiumM)
1697      .Case("c3-2", CK_C3_2)
1698      .Case("yonah", CK_Yonah)
1699      .Case("pentium4", CK_Pentium4)
1700      .Case("pentium4m", CK_Pentium4M)
1701      .Case("prescott", CK_Prescott)
1702      .Case("nocona", CK_Nocona)
1703      .Case("core2", CK_Core2)
1704      .Case("penryn", CK_Penryn)
1705      .Case("atom", CK_Atom)
1706      .Case("corei7", CK_Corei7)
1707      .Case("corei7-avx", CK_Corei7AVX)
1708      .Case("core-avx-i", CK_CoreAVXi)
1709      .Case("core-avx2", CK_CoreAVX2)
1710      .Case("k6", CK_K6)
1711      .Case("k6-2", CK_K6_2)
1712      .Case("k6-3", CK_K6_3)
1713      .Case("athlon", CK_Athlon)
1714      .Case("athlon-tbird", CK_AthlonThunderbird)
1715      .Case("athlon-4", CK_Athlon4)
1716      .Case("athlon-xp", CK_AthlonXP)
1717      .Case("athlon-mp", CK_AthlonMP)
1718      .Case("athlon64", CK_Athlon64)
1719      .Case("athlon64-sse3", CK_Athlon64SSE3)
1720      .Case("athlon-fx", CK_AthlonFX)
1721      .Case("k8", CK_K8)
1722      .Case("k8-sse3", CK_K8SSE3)
1723      .Case("opteron", CK_Opteron)
1724      .Case("opteron-sse3", CK_OpteronSSE3)
1725      .Case("amdfam10", CK_AMDFAM10)
1726      .Case("btver1", CK_BTVER1)
1727      .Case("bdver1", CK_BDVER1)
1728      .Case("bdver2", CK_BDVER2)
1729      .Case("x86-64", CK_x86_64)
1730      .Case("geode", CK_Geode)
1731      .Default(CK_Generic);
1732
1733    // Perform any per-CPU checks necessary to determine if this CPU is
1734    // acceptable.
1735    // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1736    // invalid without explaining *why*.
1737    switch (CPU) {
1738    case CK_Generic:
1739      // No processor selected!
1740      return false;
1741
1742    case CK_i386:
1743    case CK_i486:
1744    case CK_WinChipC6:
1745    case CK_WinChip2:
1746    case CK_C3:
1747    case CK_i586:
1748    case CK_Pentium:
1749    case CK_PentiumMMX:
1750    case CK_i686:
1751    case CK_PentiumPro:
1752    case CK_Pentium2:
1753    case CK_Pentium3:
1754    case CK_Pentium3M:
1755    case CK_PentiumM:
1756    case CK_Yonah:
1757    case CK_C3_2:
1758    case CK_Pentium4:
1759    case CK_Pentium4M:
1760    case CK_Prescott:
1761    case CK_K6:
1762    case CK_K6_2:
1763    case CK_K6_3:
1764    case CK_Athlon:
1765    case CK_AthlonThunderbird:
1766    case CK_Athlon4:
1767    case CK_AthlonXP:
1768    case CK_AthlonMP:
1769    case CK_Geode:
1770      // Only accept certain architectures when compiling in 32-bit mode.
1771      if (getTriple().getArch() != llvm::Triple::x86)
1772        return false;
1773
1774      // Fallthrough
1775    case CK_Nocona:
1776    case CK_Core2:
1777    case CK_Penryn:
1778    case CK_Atom:
1779    case CK_Corei7:
1780    case CK_Corei7AVX:
1781    case CK_CoreAVXi:
1782    case CK_CoreAVX2:
1783    case CK_Athlon64:
1784    case CK_Athlon64SSE3:
1785    case CK_AthlonFX:
1786    case CK_K8:
1787    case CK_K8SSE3:
1788    case CK_Opteron:
1789    case CK_OpteronSSE3:
1790    case CK_AMDFAM10:
1791    case CK_BTVER1:
1792    case CK_BDVER1:
1793    case CK_BDVER2:
1794    case CK_x86_64:
1795      return true;
1796    }
1797    llvm_unreachable("Unhandled CPU kind");
1798  }
1799
1800  virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
1801    // We accept all non-ARM calling conventions
1802    return (CC == CC_X86ThisCall ||
1803            CC == CC_X86FastCall ||
1804            CC == CC_X86StdCall ||
1805            CC == CC_C ||
1806            CC == CC_X86Pascal) ? CCCR_OK : CCCR_Warning;
1807  }
1808
1809  virtual CallingConv getDefaultCallingConv() const {
1810    return CC_C;
1811  }
1812};
1813
1814void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1815  // FIXME: This should not be here.
1816  Features["3dnow"] = false;
1817  Features["3dnowa"] = false;
1818  Features["mmx"] = false;
1819  Features["sse"] = false;
1820  Features["sse2"] = false;
1821  Features["sse3"] = false;
1822  Features["ssse3"] = false;
1823  Features["sse41"] = false;
1824  Features["sse42"] = false;
1825  Features["sse4a"] = false;
1826  Features["aes"] = false;
1827  Features["pclmul"] = false;
1828  Features["avx"] = false;
1829  Features["avx2"] = false;
1830  Features["lzcnt"] = false;
1831  Features["rdrand"] = false;
1832  Features["bmi"] = false;
1833  Features["bmi2"] = false;
1834  Features["popcnt"] = false;
1835  Features["rtm"] = false;
1836  Features["fma4"] = false;
1837  Features["fma"] = false;
1838  Features["xop"] = false;
1839  Features["f16c"] = false;
1840
1841  // FIXME: This *really* should not be here.
1842
1843  // X86_64 always has SSE2.
1844  if (getTriple().getArch() == llvm::Triple::x86_64)
1845    setFeatureEnabled(Features, "sse2", true);
1846
1847  switch (CPU) {
1848  case CK_Generic:
1849  case CK_i386:
1850  case CK_i486:
1851  case CK_i586:
1852  case CK_Pentium:
1853  case CK_i686:
1854  case CK_PentiumPro:
1855    break;
1856  case CK_PentiumMMX:
1857  case CK_Pentium2:
1858    setFeatureEnabled(Features, "mmx", true);
1859    break;
1860  case CK_Pentium3:
1861  case CK_Pentium3M:
1862    setFeatureEnabled(Features, "sse", true);
1863    break;
1864  case CK_PentiumM:
1865  case CK_Pentium4:
1866  case CK_Pentium4M:
1867  case CK_x86_64:
1868    setFeatureEnabled(Features, "sse2", true);
1869    break;
1870  case CK_Yonah:
1871  case CK_Prescott:
1872  case CK_Nocona:
1873    setFeatureEnabled(Features, "sse3", true);
1874    break;
1875  case CK_Core2:
1876    setFeatureEnabled(Features, "ssse3", true);
1877    break;
1878  case CK_Penryn:
1879    setFeatureEnabled(Features, "sse4.1", true);
1880    break;
1881  case CK_Atom:
1882    setFeatureEnabled(Features, "ssse3", true);
1883    break;
1884  case CK_Corei7:
1885    setFeatureEnabled(Features, "sse4", true);
1886    break;
1887  case CK_Corei7AVX:
1888    setFeatureEnabled(Features, "avx", true);
1889    setFeatureEnabled(Features, "aes", true);
1890    setFeatureEnabled(Features, "pclmul", true);
1891    break;
1892  case CK_CoreAVXi:
1893    setFeatureEnabled(Features, "avx", true);
1894    setFeatureEnabled(Features, "aes", true);
1895    setFeatureEnabled(Features, "pclmul", true);
1896    setFeatureEnabled(Features, "rdrnd", true);
1897    setFeatureEnabled(Features, "f16c", true);
1898    break;
1899  case CK_CoreAVX2:
1900    setFeatureEnabled(Features, "avx2", true);
1901    setFeatureEnabled(Features, "aes", true);
1902    setFeatureEnabled(Features, "pclmul", true);
1903    setFeatureEnabled(Features, "lzcnt", true);
1904    setFeatureEnabled(Features, "rdrnd", true);
1905    setFeatureEnabled(Features, "f16c", true);
1906    setFeatureEnabled(Features, "bmi", true);
1907    setFeatureEnabled(Features, "bmi2", true);
1908    setFeatureEnabled(Features, "rtm", true);
1909    setFeatureEnabled(Features, "fma", true);
1910    break;
1911  case CK_K6:
1912  case CK_WinChipC6:
1913    setFeatureEnabled(Features, "mmx", true);
1914    break;
1915  case CK_K6_2:
1916  case CK_K6_3:
1917  case CK_WinChip2:
1918  case CK_C3:
1919    setFeatureEnabled(Features, "3dnow", true);
1920    break;
1921  case CK_Athlon:
1922  case CK_AthlonThunderbird:
1923  case CK_Geode:
1924    setFeatureEnabled(Features, "3dnowa", true);
1925    break;
1926  case CK_Athlon4:
1927  case CK_AthlonXP:
1928  case CK_AthlonMP:
1929    setFeatureEnabled(Features, "sse", true);
1930    setFeatureEnabled(Features, "3dnowa", true);
1931    break;
1932  case CK_K8:
1933  case CK_Opteron:
1934  case CK_Athlon64:
1935  case CK_AthlonFX:
1936    setFeatureEnabled(Features, "sse2", true);
1937    setFeatureEnabled(Features, "3dnowa", true);
1938    break;
1939  case CK_K8SSE3:
1940  case CK_OpteronSSE3:
1941  case CK_Athlon64SSE3:
1942    setFeatureEnabled(Features, "sse3", true);
1943    setFeatureEnabled(Features, "3dnowa", true);
1944    break;
1945  case CK_AMDFAM10:
1946    setFeatureEnabled(Features, "sse3", true);
1947    setFeatureEnabled(Features, "sse4a", true);
1948    setFeatureEnabled(Features, "3dnowa", true);
1949    setFeatureEnabled(Features, "lzcnt", true);
1950    setFeatureEnabled(Features, "popcnt", true);
1951    break;
1952  case CK_BTVER1:
1953    setFeatureEnabled(Features, "ssse3", true);
1954    setFeatureEnabled(Features, "sse4a", true);
1955    setFeatureEnabled(Features, "lzcnt", true);
1956    setFeatureEnabled(Features, "popcnt", true);
1957    break;
1958  case CK_BDVER1:
1959    setFeatureEnabled(Features, "xop", true);
1960    setFeatureEnabled(Features, "lzcnt", true);
1961    setFeatureEnabled(Features, "aes", true);
1962    setFeatureEnabled(Features, "pclmul", true);
1963    break;
1964  case CK_BDVER2:
1965    setFeatureEnabled(Features, "xop", true);
1966    setFeatureEnabled(Features, "lzcnt", true);
1967    setFeatureEnabled(Features, "aes", true);
1968    setFeatureEnabled(Features, "pclmul", true);
1969    setFeatureEnabled(Features, "bmi", true);
1970    setFeatureEnabled(Features, "fma", true);
1971    setFeatureEnabled(Features, "f16c", true);
1972    break;
1973  case CK_C3_2:
1974    setFeatureEnabled(Features, "sse", true);
1975    break;
1976  }
1977}
1978
1979bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1980                                      StringRef Name,
1981                                      bool Enabled) const {
1982  // FIXME: This *really* should not be here.  We need some way of translating
1983  // options into llvm subtarget features.
1984  if (!Features.count(Name) &&
1985      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1" &&
1986       Name != "rdrnd"))
1987    return false;
1988
1989  // FIXME: this should probably use a switch with fall through.
1990
1991  if (Enabled) {
1992    if (Name == "mmx")
1993      Features["mmx"] = true;
1994    else if (Name == "sse")
1995      Features["mmx"] = Features["sse"] = true;
1996    else if (Name == "sse2")
1997      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1998    else if (Name == "sse3")
1999      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2000        true;
2001    else if (Name == "ssse3")
2002      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2003        Features["ssse3"] = true;
2004    else if (Name == "sse4" || Name == "sse4.2")
2005      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2006        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2007        Features["popcnt"] = true;
2008    else if (Name == "sse4.1")
2009      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2010        Features["ssse3"] = Features["sse41"] = true;
2011    else if (Name == "3dnow")
2012      Features["mmx"] = Features["3dnow"] = true;
2013    else if (Name == "3dnowa")
2014      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
2015    else if (Name == "aes")
2016      Features["sse"] = Features["sse2"] = Features["aes"] = true;
2017    else if (Name == "pclmul")
2018      Features["sse"] = Features["sse2"] = Features["pclmul"] = true;
2019    else if (Name == "avx")
2020      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2021        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2022        Features["popcnt"] = Features["avx"] = true;
2023    else if (Name == "avx2")
2024      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2025        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2026        Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
2027    else if (Name == "fma")
2028      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2029        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2030        Features["popcnt"] = Features["avx"] = Features["fma"] = true;
2031    else if (Name == "fma4")
2032      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2033        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2034        Features["popcnt"] = Features["avx"] = Features["sse4a"] =
2035        Features["fma4"] = true;
2036    else if (Name == "xop")
2037      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2038        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2039        Features["popcnt"] = Features["avx"] = Features["sse4a"] =
2040        Features["fma4"] = Features["xop"] = true;
2041    else if (Name == "sse4a")
2042      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2043        Features["sse4a"] = true;
2044    else if (Name == "lzcnt")
2045      Features["lzcnt"] = true;
2046    else if (Name == "rdrnd")
2047      Features["rdrand"] = true;
2048    else if (Name == "bmi")
2049      Features["bmi"] = true;
2050    else if (Name == "bmi2")
2051      Features["bmi2"] = true;
2052    else if (Name == "popcnt")
2053      Features["popcnt"] = true;
2054    else if (Name == "f16c")
2055      Features["f16c"] = true;
2056    else if (Name == "rtm")
2057      Features["rtm"] = true;
2058  } else {
2059    if (Name == "mmx")
2060      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
2061    else if (Name == "sse")
2062      Features["sse"] = Features["sse2"] = Features["sse3"] =
2063        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2064        Features["sse4a"] = Features["avx"] = Features["avx2"] =
2065        Features["fma"] = Features["fma4"] = Features["aes"] =
2066        Features["pclmul"] = Features["xop"] = false;
2067    else if (Name == "sse2")
2068      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
2069        Features["sse41"] = Features["sse42"] = Features["sse4a"] =
2070        Features["avx"] = Features["avx2"] = Features["fma"] =
2071        Features["fma4"] = Features["aes"] = Features["pclmul"] =
2072        Features["xop"] = false;
2073    else if (Name == "sse3")
2074      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
2075        Features["sse42"] = Features["sse4a"] = Features["avx"] =
2076        Features["avx2"] = Features["fma"] = Features["fma4"] =
2077        Features["xop"] = false;
2078    else if (Name == "ssse3")
2079      Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2080        Features["avx"] = Features["avx2"] = Features["fma"] = false;
2081    else if (Name == "sse4" || Name == "sse4.1")
2082      Features["sse41"] = Features["sse42"] = Features["avx"] =
2083        Features["avx2"] = Features["fma"] = false;
2084    else if (Name == "sse4.2")
2085      Features["sse42"] = Features["avx"] = Features["avx2"] =
2086        Features["fma"] = false;
2087    else if (Name == "3dnow")
2088      Features["3dnow"] = Features["3dnowa"] = false;
2089    else if (Name == "3dnowa")
2090      Features["3dnowa"] = false;
2091    else if (Name == "aes")
2092      Features["aes"] = false;
2093    else if (Name == "pclmul")
2094      Features["pclmul"] = false;
2095    else if (Name == "avx")
2096      Features["avx"] = Features["avx2"] = Features["fma"] =
2097        Features["fma4"] = Features["xop"] = false;
2098    else if (Name == "avx2")
2099      Features["avx2"] = false;
2100    else if (Name == "fma")
2101      Features["fma"] = false;
2102    else if (Name == "sse4a")
2103      Features["sse4a"] = Features["fma4"] = Features["xop"] = false;
2104    else if (Name == "lzcnt")
2105      Features["lzcnt"] = false;
2106    else if (Name == "rdrnd")
2107      Features["rdrand"] = false;
2108    else if (Name == "bmi")
2109      Features["bmi"] = false;
2110    else if (Name == "bmi2")
2111      Features["bmi2"] = false;
2112    else if (Name == "popcnt")
2113      Features["popcnt"] = false;
2114    else if (Name == "fma4")
2115      Features["fma4"] = Features["xop"] = false;
2116    else if (Name == "xop")
2117      Features["xop"] = false;
2118    else if (Name == "f16c")
2119      Features["f16c"] = false;
2120    else if (Name == "rtm")
2121      Features["rtm"] = false;
2122  }
2123
2124  return true;
2125}
2126
2127/// HandleTargetOptions - Perform initialization based on the user
2128/// configured set of features.
2129void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
2130  // Remember the maximum enabled sselevel.
2131  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
2132    // Ignore disabled features.
2133    if (Features[i][0] == '-')
2134      continue;
2135
2136    StringRef Feature = StringRef(Features[i]).substr(1);
2137
2138    if (Feature == "aes") {
2139      HasAES = true;
2140      continue;
2141    }
2142
2143    if (Feature == "pclmul") {
2144      HasPCLMUL = true;
2145      continue;
2146    }
2147
2148    if (Feature == "lzcnt") {
2149      HasLZCNT = true;
2150      continue;
2151    }
2152
2153    if (Feature == "rdrand") {
2154      HasRDRND = true;
2155      continue;
2156    }
2157
2158    if (Feature == "bmi") {
2159      HasBMI = true;
2160      continue;
2161    }
2162
2163    if (Feature == "bmi2") {
2164      HasBMI2 = true;
2165      continue;
2166    }
2167
2168    if (Feature == "popcnt") {
2169      HasPOPCNT = true;
2170      continue;
2171    }
2172
2173    if (Feature == "rtm") {
2174      HasRTM = true;
2175      continue;
2176    }
2177
2178    if (Feature == "sse4a") {
2179      HasSSE4a = true;
2180      continue;
2181    }
2182
2183    if (Feature == "fma4") {
2184      HasFMA4 = true;
2185      continue;
2186    }
2187
2188    if (Feature == "fma") {
2189      HasFMA = true;
2190      continue;
2191    }
2192
2193    if (Feature == "xop") {
2194      HasXOP = true;
2195      continue;
2196    }
2197
2198    if (Feature == "f16c") {
2199      HasF16C = true;
2200      continue;
2201    }
2202
2203    assert(Features[i][0] == '+' && "Invalid target feature!");
2204    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
2205      .Case("avx2", AVX2)
2206      .Case("avx", AVX)
2207      .Case("sse42", SSE42)
2208      .Case("sse41", SSE41)
2209      .Case("ssse3", SSSE3)
2210      .Case("sse3", SSE3)
2211      .Case("sse2", SSE2)
2212      .Case("sse", SSE1)
2213      .Default(NoSSE);
2214    SSELevel = std::max(SSELevel, Level);
2215
2216    MMX3DNowEnum ThreeDNowLevel =
2217      llvm::StringSwitch<MMX3DNowEnum>(Feature)
2218        .Case("3dnowa", AMD3DNowAthlon)
2219        .Case("3dnow", AMD3DNow)
2220        .Case("mmx", MMX)
2221        .Default(NoMMX3DNow);
2222
2223    MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
2224  }
2225
2226  // Don't tell the backend if we're turning off mmx; it will end up disabling
2227  // SSE, which we don't want.
2228  std::vector<std::string>::iterator it;
2229  it = std::find(Features.begin(), Features.end(), "-mmx");
2230  if (it != Features.end())
2231    Features.erase(it);
2232}
2233
2234/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
2235/// definitions for this particular subtarget.
2236void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
2237                                     MacroBuilder &Builder) const {
2238  // Target identification.
2239  if (getTriple().getArch() == llvm::Triple::x86_64) {
2240    Builder.defineMacro("__amd64__");
2241    Builder.defineMacro("__amd64");
2242    Builder.defineMacro("__x86_64");
2243    Builder.defineMacro("__x86_64__");
2244  } else {
2245    DefineStd(Builder, "i386", Opts);
2246  }
2247
2248  // Subtarget options.
2249  // FIXME: We are hard-coding the tune parameters based on the CPU, but they
2250  // truly should be based on -mtune options.
2251  switch (CPU) {
2252  case CK_Generic:
2253    break;
2254  case CK_i386:
2255    // The rest are coming from the i386 define above.
2256    Builder.defineMacro("__tune_i386__");
2257    break;
2258  case CK_i486:
2259  case CK_WinChipC6:
2260  case CK_WinChip2:
2261  case CK_C3:
2262    defineCPUMacros(Builder, "i486");
2263    break;
2264  case CK_PentiumMMX:
2265    Builder.defineMacro("__pentium_mmx__");
2266    Builder.defineMacro("__tune_pentium_mmx__");
2267    // Fallthrough
2268  case CK_i586:
2269  case CK_Pentium:
2270    defineCPUMacros(Builder, "i586");
2271    defineCPUMacros(Builder, "pentium");
2272    break;
2273  case CK_Pentium3:
2274  case CK_Pentium3M:
2275  case CK_PentiumM:
2276    Builder.defineMacro("__tune_pentium3__");
2277    // Fallthrough
2278  case CK_Pentium2:
2279  case CK_C3_2:
2280    Builder.defineMacro("__tune_pentium2__");
2281    // Fallthrough
2282  case CK_PentiumPro:
2283    Builder.defineMacro("__tune_i686__");
2284    Builder.defineMacro("__tune_pentiumpro__");
2285    // Fallthrough
2286  case CK_i686:
2287    Builder.defineMacro("__i686");
2288    Builder.defineMacro("__i686__");
2289    // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
2290    Builder.defineMacro("__pentiumpro");
2291    Builder.defineMacro("__pentiumpro__");
2292    break;
2293  case CK_Pentium4:
2294  case CK_Pentium4M:
2295    defineCPUMacros(Builder, "pentium4");
2296    break;
2297  case CK_Yonah:
2298  case CK_Prescott:
2299  case CK_Nocona:
2300    defineCPUMacros(Builder, "nocona");
2301    break;
2302  case CK_Core2:
2303  case CK_Penryn:
2304    defineCPUMacros(Builder, "core2");
2305    break;
2306  case CK_Atom:
2307    defineCPUMacros(Builder, "atom");
2308    break;
2309  case CK_Corei7:
2310  case CK_Corei7AVX:
2311  case CK_CoreAVXi:
2312  case CK_CoreAVX2:
2313    defineCPUMacros(Builder, "corei7");
2314    break;
2315  case CK_K6_2:
2316    Builder.defineMacro("__k6_2__");
2317    Builder.defineMacro("__tune_k6_2__");
2318    // Fallthrough
2319  case CK_K6_3:
2320    if (CPU != CK_K6_2) {  // In case of fallthrough
2321      // FIXME: GCC may be enabling these in cases where some other k6
2322      // architecture is specified but -m3dnow is explicitly provided. The
2323      // exact semantics need to be determined and emulated here.
2324      Builder.defineMacro("__k6_3__");
2325      Builder.defineMacro("__tune_k6_3__");
2326    }
2327    // Fallthrough
2328  case CK_K6:
2329    defineCPUMacros(Builder, "k6");
2330    break;
2331  case CK_Athlon:
2332  case CK_AthlonThunderbird:
2333  case CK_Athlon4:
2334  case CK_AthlonXP:
2335  case CK_AthlonMP:
2336    defineCPUMacros(Builder, "athlon");
2337    if (SSELevel != NoSSE) {
2338      Builder.defineMacro("__athlon_sse__");
2339      Builder.defineMacro("__tune_athlon_sse__");
2340    }
2341    break;
2342  case CK_K8:
2343  case CK_K8SSE3:
2344  case CK_x86_64:
2345  case CK_Opteron:
2346  case CK_OpteronSSE3:
2347  case CK_Athlon64:
2348  case CK_Athlon64SSE3:
2349  case CK_AthlonFX:
2350    defineCPUMacros(Builder, "k8");
2351    break;
2352  case CK_AMDFAM10:
2353    defineCPUMacros(Builder, "amdfam10");
2354    break;
2355  case CK_BTVER1:
2356    defineCPUMacros(Builder, "btver1");
2357    break;
2358  case CK_BDVER1:
2359    defineCPUMacros(Builder, "bdver1");
2360    break;
2361  case CK_BDVER2:
2362    defineCPUMacros(Builder, "bdver2");
2363    break;
2364  case CK_Geode:
2365    defineCPUMacros(Builder, "geode");
2366    break;
2367  }
2368
2369  // Target properties.
2370  Builder.defineMacro("__LITTLE_ENDIAN__");
2371  Builder.defineMacro("__REGISTER_PREFIX__", "");
2372
2373  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
2374  // functions in glibc header files that use FP Stack inline asm which the
2375  // backend can't deal with (PR879).
2376  Builder.defineMacro("__NO_MATH_INLINES");
2377
2378  if (HasAES)
2379    Builder.defineMacro("__AES__");
2380
2381  if (HasPCLMUL)
2382    Builder.defineMacro("__PCLMUL__");
2383
2384  if (HasLZCNT)
2385    Builder.defineMacro("__LZCNT__");
2386
2387  if (HasRDRND)
2388    Builder.defineMacro("__RDRND__");
2389
2390  if (HasBMI)
2391    Builder.defineMacro("__BMI__");
2392
2393  if (HasBMI2)
2394    Builder.defineMacro("__BMI2__");
2395
2396  if (HasPOPCNT)
2397    Builder.defineMacro("__POPCNT__");
2398
2399  if (HasRTM)
2400    Builder.defineMacro("__RTM__");
2401
2402  if (HasSSE4a)
2403    Builder.defineMacro("__SSE4A__");
2404
2405  if (HasFMA4)
2406    Builder.defineMacro("__FMA4__");
2407
2408  if (HasFMA)
2409    Builder.defineMacro("__FMA__");
2410
2411  if (HasXOP)
2412    Builder.defineMacro("__XOP__");
2413
2414  if (HasF16C)
2415    Builder.defineMacro("__F16C__");
2416
2417  // Each case falls through to the previous one here.
2418  switch (SSELevel) {
2419  case AVX2:
2420    Builder.defineMacro("__AVX2__");
2421  case AVX:
2422    Builder.defineMacro("__AVX__");
2423  case SSE42:
2424    Builder.defineMacro("__SSE4_2__");
2425  case SSE41:
2426    Builder.defineMacro("__SSE4_1__");
2427  case SSSE3:
2428    Builder.defineMacro("__SSSE3__");
2429  case SSE3:
2430    Builder.defineMacro("__SSE3__");
2431  case SSE2:
2432    Builder.defineMacro("__SSE2__");
2433    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
2434  case SSE1:
2435    Builder.defineMacro("__SSE__");
2436    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
2437  case NoSSE:
2438    break;
2439  }
2440
2441  if (Opts.MicrosoftExt && getTriple().getArch() == llvm::Triple::x86) {
2442    switch (SSELevel) {
2443    case AVX2:
2444    case AVX:
2445    case SSE42:
2446    case SSE41:
2447    case SSSE3:
2448    case SSE3:
2449    case SSE2:
2450      Builder.defineMacro("_M_IX86_FP", Twine(2));
2451      break;
2452    case SSE1:
2453      Builder.defineMacro("_M_IX86_FP", Twine(1));
2454      break;
2455    default:
2456      Builder.defineMacro("_M_IX86_FP", Twine(0));
2457    }
2458  }
2459
2460  // Each case falls through to the previous one here.
2461  switch (MMX3DNowLevel) {
2462  case AMD3DNowAthlon:
2463    Builder.defineMacro("__3dNOW_A__");
2464  case AMD3DNow:
2465    Builder.defineMacro("__3dNOW__");
2466  case MMX:
2467    Builder.defineMacro("__MMX__");
2468  case NoMMX3DNow:
2469    break;
2470  }
2471}
2472
2473bool X86TargetInfo::hasFeature(StringRef Feature) const {
2474  return llvm::StringSwitch<bool>(Feature)
2475      .Case("aes", HasAES)
2476      .Case("avx", SSELevel >= AVX)
2477      .Case("avx2", SSELevel >= AVX2)
2478      .Case("bmi", HasBMI)
2479      .Case("bmi2", HasBMI2)
2480      .Case("fma", HasFMA)
2481      .Case("fma4", HasFMA4)
2482      .Case("lzcnt", HasLZCNT)
2483      .Case("rdrnd", HasRDRND)
2484      .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
2485      .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
2486      .Case("mmx", MMX3DNowLevel >= MMX)
2487      .Case("pclmul", HasPCLMUL)
2488      .Case("popcnt", HasPOPCNT)
2489      .Case("rtm", HasRTM)
2490      .Case("sse", SSELevel >= SSE1)
2491      .Case("sse2", SSELevel >= SSE2)
2492      .Case("sse3", SSELevel >= SSE3)
2493      .Case("ssse3", SSELevel >= SSSE3)
2494      .Case("sse41", SSELevel >= SSE41)
2495      .Case("sse42", SSELevel >= SSE42)
2496      .Case("sse4a", HasSSE4a)
2497      .Case("x86", true)
2498      .Case("x86_32", getTriple().getArch() == llvm::Triple::x86)
2499      .Case("x86_64", getTriple().getArch() == llvm::Triple::x86_64)
2500      .Case("xop", HasXOP)
2501      .Case("f16c", HasF16C)
2502      .Default(false);
2503}
2504
2505bool
2506X86TargetInfo::validateAsmConstraint(const char *&Name,
2507                                     TargetInfo::ConstraintInfo &Info) const {
2508  switch (*Name) {
2509  default: return false;
2510  case 'Y': // first letter of a pair:
2511    switch (*(Name+1)) {
2512    default: return false;
2513    case '0':  // First SSE register.
2514    case 't':  // Any SSE register, when SSE2 is enabled.
2515    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
2516    case 'm':  // any MMX register, when inter-unit moves enabled.
2517      break;   // falls through to setAllowsRegister.
2518  }
2519  case 'a': // eax.
2520  case 'b': // ebx.
2521  case 'c': // ecx.
2522  case 'd': // edx.
2523  case 'S': // esi.
2524  case 'D': // edi.
2525  case 'A': // edx:eax.
2526  case 'f': // any x87 floating point stack register.
2527  case 't': // top of floating point stack.
2528  case 'u': // second from top of floating point stack.
2529  case 'q': // Any register accessible as [r]l: a, b, c, and d.
2530  case 'y': // Any MMX register.
2531  case 'x': // Any SSE register.
2532  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2533  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2534  case 'l': // "Index" registers: any general register that can be used as an
2535            // index in a base+index memory access.
2536    Info.setAllowsRegister();
2537    return true;
2538  case 'C': // SSE floating point constant.
2539  case 'G': // x87 floating point constant.
2540  case 'e': // 32-bit signed integer constant for use with zero-extending
2541            // x86_64 instructions.
2542  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2543            // x86_64 instructions.
2544    return true;
2545  }
2546}
2547
2548
2549std::string
2550X86TargetInfo::convertConstraint(const char *&Constraint) const {
2551  switch (*Constraint) {
2552  case 'a': return std::string("{ax}");
2553  case 'b': return std::string("{bx}");
2554  case 'c': return std::string("{cx}");
2555  case 'd': return std::string("{dx}");
2556  case 'S': return std::string("{si}");
2557  case 'D': return std::string("{di}");
2558  case 'p': // address
2559    return std::string("im");
2560  case 't': // top of floating point stack.
2561    return std::string("{st}");
2562  case 'u': // second from top of floating point stack.
2563    return std::string("{st(1)}"); // second from top of floating point stack.
2564  default:
2565    return std::string(1, *Constraint);
2566  }
2567}
2568} // end anonymous namespace
2569
2570namespace {
2571// X86-32 generic target
2572class X86_32TargetInfo : public X86TargetInfo {
2573public:
2574  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2575    DoubleAlign = LongLongAlign = 32;
2576    LongDoubleWidth = 96;
2577    LongDoubleAlign = 32;
2578    SuitableAlign = 128;
2579    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2580                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2581                        "a0:0:64-f80:32:32-n8:16:32-S128";
2582    SizeType = UnsignedInt;
2583    PtrDiffType = SignedInt;
2584    IntPtrType = SignedInt;
2585    RegParmMax = 3;
2586
2587    // Use fpret for all types.
2588    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2589                             (1 << TargetInfo::Double) |
2590                             (1 << TargetInfo::LongDouble));
2591
2592    // x86-32 has atomics up to 8 bytes
2593    // FIXME: Check that we actually have cmpxchg8b before setting
2594    // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2595    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2596  }
2597  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2598    return TargetInfo::CharPtrBuiltinVaList;
2599  }
2600
2601  int getEHDataRegisterNumber(unsigned RegNo) const {
2602    if (RegNo == 0) return 0;
2603    if (RegNo == 1) return 2;
2604    return -1;
2605  }
2606  virtual bool validateInputSize(StringRef Constraint,
2607                                 unsigned Size) const {
2608    switch (Constraint[0]) {
2609    default: break;
2610    case 'a':
2611    case 'b':
2612    case 'c':
2613    case 'd':
2614      return Size <= 32;
2615    }
2616
2617    return true;
2618  }
2619};
2620} // end anonymous namespace
2621
2622namespace {
2623class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2624public:
2625  NetBSDI386TargetInfo(const std::string &triple) :
2626    NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2627  }
2628
2629  virtual unsigned getFloatEvalMethod() const {
2630    // NetBSD defaults to "double" rounding
2631    return 1;
2632  }
2633};
2634} // end anonymous namespace
2635
2636namespace {
2637class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2638public:
2639  OpenBSDI386TargetInfo(const std::string& triple) :
2640    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2641    SizeType = UnsignedLong;
2642    IntPtrType = SignedLong;
2643    PtrDiffType = SignedLong;
2644  }
2645};
2646} // end anonymous namespace
2647
2648namespace {
2649class BitrigI386TargetInfo : public BitrigTargetInfo<X86_32TargetInfo> {
2650public:
2651  BitrigI386TargetInfo(const std::string& triple) :
2652    BitrigTargetInfo<X86_32TargetInfo>(triple) {
2653    SizeType = UnsignedLong;
2654    IntPtrType = SignedLong;
2655    PtrDiffType = SignedLong;
2656  }
2657};
2658} // end anonymous namespace
2659
2660namespace {
2661class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2662public:
2663  DarwinI386TargetInfo(const std::string& triple) :
2664    DarwinTargetInfo<X86_32TargetInfo>(triple) {
2665    LongDoubleWidth = 128;
2666    LongDoubleAlign = 128;
2667    SuitableAlign = 128;
2668    MaxVectorAlign = 256;
2669    SizeType = UnsignedLong;
2670    IntPtrType = SignedLong;
2671    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2672                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2673                        "a0:0:64-f80:128:128-n8:16:32-S128";
2674    HasAlignMac68kSupport = true;
2675  }
2676
2677};
2678} // end anonymous namespace
2679
2680namespace {
2681// x86-32 Windows target
2682class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2683public:
2684  WindowsX86_32TargetInfo(const std::string& triple)
2685    : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2686    TLSSupported = false;
2687    WCharType = UnsignedShort;
2688    DoubleAlign = LongLongAlign = 64;
2689    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2690                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2691                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2692  }
2693  virtual void getTargetDefines(const LangOptions &Opts,
2694                                MacroBuilder &Builder) const {
2695    WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2696  }
2697};
2698} // end anonymous namespace
2699
2700namespace {
2701
2702// x86-32 Windows Visual Studio target
2703class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2704public:
2705  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2706    : WindowsX86_32TargetInfo(triple) {
2707    LongDoubleWidth = LongDoubleAlign = 64;
2708    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2709  }
2710  virtual void getTargetDefines(const LangOptions &Opts,
2711                                MacroBuilder &Builder) const {
2712    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2713    WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2714    // The value of the following reflects processor type.
2715    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2716    // We lost the original triple, so we use the default.
2717    Builder.defineMacro("_M_IX86", "600");
2718  }
2719};
2720} // end anonymous namespace
2721
2722namespace {
2723// x86-32 MinGW target
2724class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2725public:
2726  MinGWX86_32TargetInfo(const std::string& triple)
2727    : WindowsX86_32TargetInfo(triple) {
2728  }
2729  virtual void getTargetDefines(const LangOptions &Opts,
2730                                MacroBuilder &Builder) const {
2731    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2732    DefineStd(Builder, "WIN32", Opts);
2733    DefineStd(Builder, "WINNT", Opts);
2734    Builder.defineMacro("_X86_");
2735    Builder.defineMacro("__MSVCRT__");
2736    Builder.defineMacro("__MINGW32__");
2737
2738    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2739    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2740    if (Opts.MicrosoftExt)
2741      // Provide "as-is" __declspec.
2742      Builder.defineMacro("__declspec", "__declspec");
2743    else
2744      // Provide alias of __attribute__ like mingw32-gcc.
2745      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2746  }
2747};
2748} // end anonymous namespace
2749
2750namespace {
2751// x86-32 Cygwin target
2752class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2753public:
2754  CygwinX86_32TargetInfo(const std::string& triple)
2755    : X86_32TargetInfo(triple) {
2756    TLSSupported = false;
2757    WCharType = UnsignedShort;
2758    DoubleAlign = LongLongAlign = 64;
2759    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2760                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2761                        "a0:0:64-f80:32:32-n8:16:32-S32";
2762  }
2763  virtual void getTargetDefines(const LangOptions &Opts,
2764                                MacroBuilder &Builder) const {
2765    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2766    Builder.defineMacro("__CYGWIN__");
2767    Builder.defineMacro("__CYGWIN32__");
2768    DefineStd(Builder, "unix", Opts);
2769    if (Opts.CPlusPlus)
2770      Builder.defineMacro("_GNU_SOURCE");
2771  }
2772};
2773} // end anonymous namespace
2774
2775namespace {
2776// x86-32 Haiku target
2777class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2778public:
2779  HaikuX86_32TargetInfo(const std::string& triple)
2780    : X86_32TargetInfo(triple) {
2781    SizeType = UnsignedLong;
2782    IntPtrType = SignedLong;
2783    PtrDiffType = SignedLong;
2784    ProcessIDType = SignedLong;
2785    this->UserLabelPrefix = "";
2786    this->TLSSupported = false;
2787  }
2788  virtual void getTargetDefines(const LangOptions &Opts,
2789                                MacroBuilder &Builder) const {
2790    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2791    Builder.defineMacro("__INTEL__");
2792    Builder.defineMacro("__HAIKU__");
2793  }
2794};
2795} // end anonymous namespace
2796
2797// RTEMS Target
2798template<typename Target>
2799class RTEMSTargetInfo : public OSTargetInfo<Target> {
2800protected:
2801  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2802                            MacroBuilder &Builder) const {
2803    // RTEMS defines; list based off of gcc output
2804
2805    Builder.defineMacro("__rtems__");
2806    Builder.defineMacro("__ELF__");
2807  }
2808public:
2809  RTEMSTargetInfo(const std::string &triple)
2810    : OSTargetInfo<Target>(triple) {
2811      this->UserLabelPrefix = "";
2812
2813      llvm::Triple Triple(triple);
2814      switch (Triple.getArch()) {
2815        default:
2816        case llvm::Triple::x86:
2817          // this->MCountName = ".mcount";
2818          break;
2819        case llvm::Triple::mips:
2820        case llvm::Triple::mipsel:
2821        case llvm::Triple::ppc:
2822        case llvm::Triple::ppc64:
2823          // this->MCountName = "_mcount";
2824          break;
2825        case llvm::Triple::arm:
2826          // this->MCountName = "__mcount";
2827          break;
2828      }
2829
2830    }
2831};
2832
2833namespace {
2834// x86-32 RTEMS target
2835class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2836public:
2837  RTEMSX86_32TargetInfo(const std::string& triple)
2838    : X86_32TargetInfo(triple) {
2839    SizeType = UnsignedLong;
2840    IntPtrType = SignedLong;
2841    PtrDiffType = SignedLong;
2842    this->UserLabelPrefix = "";
2843  }
2844  virtual void getTargetDefines(const LangOptions &Opts,
2845                                MacroBuilder &Builder) const {
2846    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2847    Builder.defineMacro("__INTEL__");
2848    Builder.defineMacro("__rtems__");
2849  }
2850};
2851} // end anonymous namespace
2852
2853namespace {
2854// x86-64 generic target
2855class X86_64TargetInfo : public X86TargetInfo {
2856public:
2857  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2858    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2859    LongDoubleWidth = 128;
2860    LongDoubleAlign = 128;
2861    LargeArrayMinWidth = 128;
2862    LargeArrayAlign = 128;
2863    SuitableAlign = 128;
2864    IntMaxType = SignedLong;
2865    UIntMaxType = UnsignedLong;
2866    Int64Type = SignedLong;
2867    RegParmMax = 6;
2868
2869    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2870                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2871                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2872
2873    // Use fpret only for long double.
2874    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2875
2876    // Use fp2ret for _Complex long double.
2877    ComplexLongDoubleUsesFP2Ret = true;
2878
2879    // x86-64 has atomics up to 16 bytes.
2880    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2881    // on CPUs with cmpxchg16b
2882    MaxAtomicPromoteWidth = 128;
2883    MaxAtomicInlineWidth = 64;
2884  }
2885  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2886    return TargetInfo::X86_64ABIBuiltinVaList;
2887  }
2888
2889  int getEHDataRegisterNumber(unsigned RegNo) const {
2890    if (RegNo == 0) return 0;
2891    if (RegNo == 1) return 1;
2892    return -1;
2893  }
2894
2895  virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
2896    return TargetInfo::checkCallingConvention(CC);
2897  }
2898
2899  virtual CallingConv getDefaultCallingConv() const {
2900    return CC_Default;
2901  }
2902
2903};
2904} // end anonymous namespace
2905
2906namespace {
2907// x86-64 Windows target
2908class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2909public:
2910  WindowsX86_64TargetInfo(const std::string& triple)
2911    : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2912    TLSSupported = false;
2913    WCharType = UnsignedShort;
2914    LongWidth = LongAlign = 32;
2915    DoubleAlign = LongLongAlign = 64;
2916    IntMaxType = SignedLongLong;
2917    UIntMaxType = UnsignedLongLong;
2918    Int64Type = SignedLongLong;
2919    SizeType = UnsignedLongLong;
2920    PtrDiffType = SignedLongLong;
2921    IntPtrType = SignedLongLong;
2922    this->UserLabelPrefix = "";
2923  }
2924  virtual void getTargetDefines(const LangOptions &Opts,
2925                                MacroBuilder &Builder) const {
2926    WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2927    Builder.defineMacro("_WIN64");
2928  }
2929  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2930    return TargetInfo::CharPtrBuiltinVaList;
2931  }
2932};
2933} // end anonymous namespace
2934
2935namespace {
2936// x86-64 Windows Visual Studio target
2937class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2938public:
2939  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2940    : WindowsX86_64TargetInfo(triple) {
2941    LongDoubleWidth = LongDoubleAlign = 64;
2942    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2943  }
2944  virtual void getTargetDefines(const LangOptions &Opts,
2945                                MacroBuilder &Builder) const {
2946    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2947    WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2948    Builder.defineMacro("_M_X64");
2949    Builder.defineMacro("_M_AMD64");
2950  }
2951};
2952} // end anonymous namespace
2953
2954namespace {
2955// x86-64 MinGW target
2956class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2957public:
2958  MinGWX86_64TargetInfo(const std::string& triple)
2959    : WindowsX86_64TargetInfo(triple) {
2960  }
2961  virtual void getTargetDefines(const LangOptions &Opts,
2962                                MacroBuilder &Builder) const {
2963    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2964    DefineStd(Builder, "WIN64", Opts);
2965    Builder.defineMacro("__MSVCRT__");
2966    Builder.defineMacro("__MINGW32__");
2967    Builder.defineMacro("__MINGW64__");
2968
2969    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2970    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2971    if (Opts.MicrosoftExt)
2972      // Provide "as-is" __declspec.
2973      Builder.defineMacro("__declspec", "__declspec");
2974    else
2975      // Provide alias of __attribute__ like mingw32-gcc.
2976      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2977  }
2978};
2979} // end anonymous namespace
2980
2981namespace {
2982class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2983public:
2984  DarwinX86_64TargetInfo(const std::string& triple)
2985      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2986    Int64Type = SignedLongLong;
2987    MaxVectorAlign = 256;
2988  }
2989};
2990} // end anonymous namespace
2991
2992namespace {
2993class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2994public:
2995  OpenBSDX86_64TargetInfo(const std::string& triple)
2996      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2997    IntMaxType = SignedLongLong;
2998    UIntMaxType = UnsignedLongLong;
2999    Int64Type = SignedLongLong;
3000  }
3001};
3002} // end anonymous namespace
3003
3004namespace {
3005class BitrigX86_64TargetInfo : public BitrigTargetInfo<X86_64TargetInfo> {
3006public:
3007  BitrigX86_64TargetInfo(const std::string& triple)
3008      : BitrigTargetInfo<X86_64TargetInfo>(triple) {
3009     IntMaxType = SignedLongLong;
3010     UIntMaxType = UnsignedLongLong;
3011     Int64Type = SignedLongLong;
3012  }
3013};
3014} // end anonymous namespace
3015
3016namespace {
3017class ARMTargetInfo : public TargetInfo {
3018  // Possible FPU choices.
3019  enum FPUMode {
3020    VFP2FPU = (1 << 0),
3021    VFP3FPU = (1 << 1),
3022    VFP4FPU = (1 << 2),
3023    NeonFPU = (1 << 3)
3024  };
3025
3026  static bool FPUModeIsVFP(FPUMode Mode) {
3027    return Mode & (VFP2FPU | VFP3FPU | VFP4FPU | NeonFPU);
3028  }
3029
3030  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3031  static const char * const GCCRegNames[];
3032
3033  std::string ABI, CPU;
3034
3035  unsigned FPU : 4;
3036
3037  unsigned IsAAPCS : 1;
3038  unsigned IsThumb : 1;
3039
3040  // Initialized via features.
3041  unsigned SoftFloat : 1;
3042  unsigned SoftFloatABI : 1;
3043
3044  static const Builtin::Info BuiltinInfo[];
3045
3046public:
3047  ARMTargetInfo(const std::string &TripleStr)
3048    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s"), IsAAPCS(true)
3049  {
3050    BigEndian = false;
3051    SizeType = UnsignedInt;
3052    PtrDiffType = SignedInt;
3053    // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
3054    WCharType = UnsignedInt;
3055
3056    // {} in inline assembly are neon specifiers, not assembly variant
3057    // specifiers.
3058    NoAsmVariants = true;
3059
3060    // FIXME: Should we just treat this as a feature?
3061    IsThumb = getTriple().getArchName().startswith("thumb");
3062    if (IsThumb) {
3063      // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
3064      // so set preferred for small types to 32.
3065      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
3066                           "i64:64:64-f32:32:32-f64:64:64-"
3067                           "v64:64:64-v128:64:128-a0:0:32-n32-S64");
3068    } else {
3069      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3070                           "i64:64:64-f32:32:32-f64:64:64-"
3071                           "v64:64:64-v128:64:128-a0:0:64-n32-S64");
3072    }
3073
3074    // ARM targets default to using the ARM C++ ABI.
3075    CXXABI = CXXABI_ARM;
3076
3077    // ARM has atomics up to 8 bytes
3078    // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
3079    MaxAtomicPromoteWidth = 64;
3080
3081    // Do force alignment of members that follow zero length bitfields.  If
3082    // the alignment of the zero-length bitfield is greater than the member
3083    // that follows it, `bar', `bar' will be aligned as the  type of the
3084    // zero length bitfield.
3085    UseZeroLengthBitfieldAlignment = true;
3086  }
3087  virtual const char *getABI() const { return ABI.c_str(); }
3088  virtual bool setABI(const std::string &Name) {
3089    ABI = Name;
3090
3091    // The defaults (above) are for AAPCS, check if we need to change them.
3092    //
3093    // FIXME: We need support for -meabi... we could just mangle it into the
3094    // name.
3095    if (Name == "apcs-gnu") {
3096      DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
3097      SizeType = UnsignedLong;
3098
3099      // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
3100      WCharType = SignedInt;
3101
3102      // Do not respect the alignment of bit-field types when laying out
3103      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
3104      UseBitFieldTypeAlignment = false;
3105
3106      /// gcc forces the alignment to 4 bytes, regardless of the type of the
3107      /// zero length bitfield.  This corresponds to EMPTY_FIELD_BOUNDARY in
3108      /// gcc.
3109      ZeroLengthBitfieldBoundary = 32;
3110
3111      IsAAPCS = false;
3112
3113      if (IsThumb) {
3114        // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
3115        // so set preferred for small types to 32.
3116        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
3117                             "i64:32:64-f32:32:32-f64:32:64-"
3118                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
3119      } else {
3120        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3121                             "i64:32:64-f32:32:32-f64:32:64-"
3122                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
3123      }
3124
3125      // FIXME: Override "preferred align" for double and long long.
3126    } else if (Name == "aapcs" || Name == "aapcs-vfp") {
3127      IsAAPCS = true;
3128      // FIXME: Enumerated types are variable width in straight AAPCS.
3129    } else if (Name == "aapcs-linux") {
3130      IsAAPCS = true;
3131    } else
3132      return false;
3133
3134    return true;
3135  }
3136
3137  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3138    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
3139      Features["vfp2"] = true;
3140    else if (CPU == "cortex-a8" || CPU == "cortex-a15" ||
3141             CPU == "cortex-a9" || CPU == "cortex-a9-mp")
3142      Features["neon"] = true;
3143    else if (CPU == "swift") {
3144      Features["vfp4"] = true;
3145      Features["neon"] = true;
3146    }
3147  }
3148
3149  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3150                                 StringRef Name,
3151                                 bool Enabled) const {
3152    if (Name == "soft-float" || Name == "soft-float-abi" ||
3153        Name == "vfp2" || Name == "vfp3" || Name == "vfp4" || Name == "neon" ||
3154        Name == "d16" || Name == "neonfp") {
3155      Features[Name] = Enabled;
3156    } else
3157      return false;
3158
3159    return true;
3160  }
3161
3162  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3163    FPU = 0;
3164    SoftFloat = SoftFloatABI = false;
3165    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
3166      if (Features[i] == "+soft-float")
3167        SoftFloat = true;
3168      else if (Features[i] == "+soft-float-abi")
3169        SoftFloatABI = true;
3170      else if (Features[i] == "+vfp2")
3171        FPU |= VFP2FPU;
3172      else if (Features[i] == "+vfp3")
3173        FPU |= VFP3FPU;
3174      else if (Features[i] == "+vfp4")
3175        FPU |= VFP4FPU;
3176      else if (Features[i] == "+neon")
3177        FPU |= NeonFPU;
3178    }
3179
3180    // Remove front-end specific options which the backend handles differently.
3181    std::vector<std::string>::iterator it;
3182    it = std::find(Features.begin(), Features.end(), "+soft-float");
3183    if (it != Features.end())
3184      Features.erase(it);
3185    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
3186    if (it != Features.end())
3187      Features.erase(it);
3188  }
3189
3190  virtual bool hasFeature(StringRef Feature) const {
3191    return llvm::StringSwitch<bool>(Feature)
3192        .Case("arm", true)
3193        .Case("softfloat", SoftFloat)
3194        .Case("thumb", IsThumb)
3195        .Case("neon", FPU == NeonFPU && !SoftFloat &&
3196              StringRef(getCPUDefineSuffix(CPU)).startswith("7"))
3197        .Default(false);
3198  }
3199  // FIXME: Should we actually have some table instead of these switches?
3200  static const char *getCPUDefineSuffix(StringRef Name) {
3201    return llvm::StringSwitch<const char*>(Name)
3202      .Cases("arm8", "arm810", "4")
3203      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
3204      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
3205      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
3206      .Case("ep9312", "4T")
3207      .Cases("arm10tdmi", "arm1020t", "5T")
3208      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
3209      .Case("arm926ej-s", "5TEJ")
3210      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
3211      .Cases("xscale", "iwmmxt", "5TE")
3212      .Case("arm1136j-s", "6J")
3213      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
3214      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
3215      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
3216      .Cases("cortex-a5", "cortex-a8", "cortex-a9", "cortex-a15", "7A")
3217      .Case("cortex-a9-mp", "7F")
3218      .Case("swift", "7S")
3219      .Cases("cortex-m3", "cortex-m4", "7M")
3220      .Case("cortex-m0", "6M")
3221      .Default(0);
3222  }
3223  static const char *getCPUProfile(StringRef Name) {
3224    return llvm::StringSwitch<const char*>(Name)
3225      .Cases("cortex-a8", "cortex-a9", "A")
3226      .Cases("cortex-m3", "cortex-m4", "cortex-m0", "M")
3227      .Default("");
3228  }
3229  virtual bool setCPU(const std::string &Name) {
3230    if (!getCPUDefineSuffix(Name))
3231      return false;
3232
3233    CPU = Name;
3234    return true;
3235  }
3236  virtual void getTargetDefines(const LangOptions &Opts,
3237                                MacroBuilder &Builder) const {
3238    // Target identification.
3239    Builder.defineMacro("__arm");
3240    Builder.defineMacro("__arm__");
3241
3242    // Target properties.
3243    Builder.defineMacro("__ARMEL__");
3244    Builder.defineMacro("__LITTLE_ENDIAN__");
3245    Builder.defineMacro("__REGISTER_PREFIX__", "");
3246
3247    StringRef CPUArch = getCPUDefineSuffix(CPU);
3248    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
3249    Builder.defineMacro("__ARM_ARCH", CPUArch.substr(0, 1));
3250    StringRef CPUProfile = getCPUProfile(CPU);
3251    if (!CPUProfile.empty())
3252      Builder.defineMacro("__ARM_ARCH_PROFILE", CPUProfile);
3253
3254    // Subtarget options.
3255
3256    // FIXME: It's more complicated than this and we don't really support
3257    // interworking.
3258    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
3259      Builder.defineMacro("__THUMB_INTERWORK__");
3260
3261    if (ABI == "aapcs" || ABI == "aapcs-linux" || ABI == "aapcs-vfp") {
3262      // M-class CPUs on Darwin follow AAPCS, but not EABI.
3263      if (!(getTriple().isOSDarwin() && CPUProfile == "M"))
3264        Builder.defineMacro("__ARM_EABI__");
3265      Builder.defineMacro("__ARM_PCS", "1");
3266
3267      if ((!SoftFloat && !SoftFloatABI) || ABI == "aapcs-vfp")
3268        Builder.defineMacro("__ARM_PCS_VFP", "1");
3269    }
3270
3271    if (SoftFloat)
3272      Builder.defineMacro("__SOFTFP__");
3273
3274    if (CPU == "xscale")
3275      Builder.defineMacro("__XSCALE__");
3276
3277    bool IsARMv7 = CPUArch.startswith("7");
3278    if (IsThumb) {
3279      Builder.defineMacro("__THUMBEL__");
3280      Builder.defineMacro("__thumb__");
3281      if (CPUArch == "6T2" || IsARMv7)
3282        Builder.defineMacro("__thumb2__");
3283    }
3284
3285    // Note, this is always on in gcc, even though it doesn't make sense.
3286    Builder.defineMacro("__APCS_32__");
3287
3288    if (FPUModeIsVFP((FPUMode) FPU)) {
3289      Builder.defineMacro("__VFP_FP__");
3290      if (FPU & VFP2FPU)
3291        Builder.defineMacro("__ARM_VFPV2__");
3292      if (FPU & VFP3FPU)
3293        Builder.defineMacro("__ARM_VFPV3__");
3294      if (FPU & VFP4FPU)
3295        Builder.defineMacro("__ARM_VFPV4__");
3296    }
3297
3298    // This only gets set when Neon instructions are actually available, unlike
3299    // the VFP define, hence the soft float and arch check. This is subtly
3300    // different from gcc, we follow the intent which was that it should be set
3301    // when Neon instructions are actually available.
3302    if ((FPU & NeonFPU) && !SoftFloat && IsARMv7)
3303      Builder.defineMacro("__ARM_NEON__");
3304  }
3305  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3306                                 unsigned &NumRecords) const {
3307    Records = BuiltinInfo;
3308    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
3309  }
3310  virtual bool isCLZForZeroUndef() const { return false; }
3311  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3312    return IsAAPCS ? AAPCSABIBuiltinVaList : TargetInfo::VoidPtrBuiltinVaList;
3313  }
3314  virtual void getGCCRegNames(const char * const *&Names,
3315                              unsigned &NumNames) const;
3316  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3317                                unsigned &NumAliases) const;
3318  virtual bool validateAsmConstraint(const char *&Name,
3319                                     TargetInfo::ConstraintInfo &Info) const {
3320    switch (*Name) {
3321    default: break;
3322    case 'l': // r0-r7
3323    case 'h': // r8-r15
3324    case 'w': // VFP Floating point register single precision
3325    case 'P': // VFP Floating point register double precision
3326      Info.setAllowsRegister();
3327      return true;
3328    case 'Q': // A memory address that is a single base register.
3329      Info.setAllowsMemory();
3330      return true;
3331    case 'U': // a memory reference...
3332      switch (Name[1]) {
3333      case 'q': // ...ARMV4 ldrsb
3334      case 'v': // ...VFP load/store (reg+constant offset)
3335      case 'y': // ...iWMMXt load/store
3336      case 't': // address valid for load/store opaque types wider
3337                // than 128-bits
3338      case 'n': // valid address for Neon doubleword vector load/store
3339      case 'm': // valid address for Neon element and structure load/store
3340      case 's': // valid address for non-offset loads/stores of quad-word
3341                // values in four ARM registers
3342        Info.setAllowsMemory();
3343        Name++;
3344        return true;
3345      }
3346    }
3347    return false;
3348  }
3349  virtual std::string convertConstraint(const char *&Constraint) const {
3350    std::string R;
3351    switch (*Constraint) {
3352    case 'U':   // Two-character constraint; add "^" hint for later parsing.
3353      R = std::string("^") + std::string(Constraint, 2);
3354      Constraint++;
3355      break;
3356    case 'p': // 'p' should be translated to 'r' by default.
3357      R = std::string("r");
3358      break;
3359    default:
3360      return std::string(1, *Constraint);
3361    }
3362    return R;
3363  }
3364  virtual bool validateConstraintModifier(StringRef Constraint,
3365                                          const char Modifier,
3366                                          unsigned Size) const {
3367    bool isOutput = (Constraint[0] == '=');
3368    bool isInOut = (Constraint[0] == '+');
3369
3370    // Strip off constraint modifiers.
3371    while (Constraint[0] == '=' ||
3372           Constraint[0] == '+' ||
3373           Constraint[0] == '&')
3374      Constraint = Constraint.substr(1);
3375
3376    switch (Constraint[0]) {
3377    default: break;
3378    case 'r': {
3379      switch (Modifier) {
3380      default:
3381        return isInOut || (isOutput && Size >= 32) ||
3382          (!isOutput && !isInOut && Size <= 32);
3383      case 'q':
3384        // A register of size 32 cannot fit a vector type.
3385        return false;
3386      }
3387    }
3388    }
3389
3390    return true;
3391  }
3392  virtual const char *getClobbers() const {
3393    // FIXME: Is this really right?
3394    return "";
3395  }
3396
3397  virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
3398    return (CC == CC_AAPCS || CC == CC_AAPCS_VFP) ? CCCR_OK : CCCR_Warning;
3399  }
3400};
3401
3402const char * const ARMTargetInfo::GCCRegNames[] = {
3403  // Integer registers
3404  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3405  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
3406
3407  // Float registers
3408  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
3409  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
3410  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
3411  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
3412
3413  // Double registers
3414  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
3415  "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
3416  "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
3417  "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
3418
3419  // Quad registers
3420  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
3421  "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
3422};
3423
3424void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
3425                                   unsigned &NumNames) const {
3426  Names = GCCRegNames;
3427  NumNames = llvm::array_lengthof(GCCRegNames);
3428}
3429
3430const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
3431  { { "a1" }, "r0" },
3432  { { "a2" }, "r1" },
3433  { { "a3" }, "r2" },
3434  { { "a4" }, "r3" },
3435  { { "v1" }, "r4" },
3436  { { "v2" }, "r5" },
3437  { { "v3" }, "r6" },
3438  { { "v4" }, "r7" },
3439  { { "v5" }, "r8" },
3440  { { "v6", "rfp" }, "r9" },
3441  { { "sl" }, "r10" },
3442  { { "fp" }, "r11" },
3443  { { "ip" }, "r12" },
3444  { { "r13" }, "sp" },
3445  { { "r14" }, "lr" },
3446  { { "r15" }, "pc" },
3447  // The S, D and Q registers overlap, but aren't really aliases; we
3448  // don't want to substitute one of these for a different-sized one.
3449};
3450
3451void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3452                                       unsigned &NumAliases) const {
3453  Aliases = GCCRegAliases;
3454  NumAliases = llvm::array_lengthof(GCCRegAliases);
3455}
3456
3457const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
3458#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3459#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3460                                              ALL_LANGUAGES },
3461#include "clang/Basic/BuiltinsARM.def"
3462};
3463} // end anonymous namespace.
3464
3465namespace {
3466class DarwinARMTargetInfo :
3467  public DarwinTargetInfo<ARMTargetInfo> {
3468protected:
3469  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
3470                            MacroBuilder &Builder) const {
3471    getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
3472  }
3473
3474public:
3475  DarwinARMTargetInfo(const std::string& triple)
3476    : DarwinTargetInfo<ARMTargetInfo>(triple) {
3477    HasAlignMac68kSupport = true;
3478    // iOS always has 64-bit atomic instructions.
3479    // FIXME: This should be based off of the target features in ARMTargetInfo.
3480    MaxAtomicInlineWidth = 64;
3481  }
3482};
3483} // end anonymous namespace.
3484
3485
3486namespace {
3487// Hexagon abstract base class
3488class HexagonTargetInfo : public TargetInfo {
3489  static const Builtin::Info BuiltinInfo[];
3490  static const char * const GCCRegNames[];
3491  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3492  std::string CPU;
3493public:
3494  HexagonTargetInfo(const std::string& triple) : TargetInfo(triple)  {
3495    BigEndian = false;
3496    DescriptionString = ("e-p:32:32:32-"
3497                         "i64:64:64-i32:32:32-i16:16:16-i1:32:32"
3498                         "f64:64:64-f32:32:32-a0:0-n32");
3499
3500    // {} in inline assembly are packet specifiers, not assembly variant
3501    // specifiers.
3502    NoAsmVariants = true;
3503  }
3504
3505  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3506                                 unsigned &NumRecords) const {
3507    Records = BuiltinInfo;
3508    NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
3509  }
3510
3511  virtual bool validateAsmConstraint(const char *&Name,
3512                                     TargetInfo::ConstraintInfo &Info) const {
3513    return true;
3514  }
3515
3516  virtual void getTargetDefines(const LangOptions &Opts,
3517                                MacroBuilder &Builder) const;
3518
3519  virtual bool hasFeature(StringRef Feature) const {
3520    return Feature == "hexagon";
3521  }
3522
3523  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3524    return TargetInfo::CharPtrBuiltinVaList;
3525  }
3526  virtual void getGCCRegNames(const char * const *&Names,
3527                              unsigned &NumNames) const;
3528  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3529                                unsigned &NumAliases) const;
3530  virtual const char *getClobbers() const {
3531    return "";
3532  }
3533
3534  static const char *getHexagonCPUSuffix(StringRef Name) {
3535    return llvm::StringSwitch<const char*>(Name)
3536      .Case("hexagonv2", "2")
3537      .Case("hexagonv3", "3")
3538      .Case("hexagonv4", "4")
3539      .Case("hexagonv5", "5")
3540      .Default(0);
3541  }
3542
3543  virtual bool setCPU(const std::string &Name) {
3544    if (!getHexagonCPUSuffix(Name))
3545      return false;
3546
3547    CPU = Name;
3548    return true;
3549  }
3550};
3551
3552void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
3553                                MacroBuilder &Builder) const {
3554  Builder.defineMacro("qdsp6");
3555  Builder.defineMacro("__qdsp6", "1");
3556  Builder.defineMacro("__qdsp6__", "1");
3557
3558  Builder.defineMacro("hexagon");
3559  Builder.defineMacro("__hexagon", "1");
3560  Builder.defineMacro("__hexagon__", "1");
3561
3562  if(CPU == "hexagonv1") {
3563    Builder.defineMacro("__HEXAGON_V1__");
3564    Builder.defineMacro("__HEXAGON_ARCH__", "1");
3565    if(Opts.HexagonQdsp6Compat) {
3566      Builder.defineMacro("__QDSP6_V1__");
3567      Builder.defineMacro("__QDSP6_ARCH__", "1");
3568    }
3569  }
3570  else if(CPU == "hexagonv2") {
3571    Builder.defineMacro("__HEXAGON_V2__");
3572    Builder.defineMacro("__HEXAGON_ARCH__", "2");
3573    if(Opts.HexagonQdsp6Compat) {
3574      Builder.defineMacro("__QDSP6_V2__");
3575      Builder.defineMacro("__QDSP6_ARCH__", "2");
3576    }
3577  }
3578  else if(CPU == "hexagonv3") {
3579    Builder.defineMacro("__HEXAGON_V3__");
3580    Builder.defineMacro("__HEXAGON_ARCH__", "3");
3581    if(Opts.HexagonQdsp6Compat) {
3582      Builder.defineMacro("__QDSP6_V3__");
3583      Builder.defineMacro("__QDSP6_ARCH__", "3");
3584    }
3585  }
3586  else if(CPU == "hexagonv4") {
3587    Builder.defineMacro("__HEXAGON_V4__");
3588    Builder.defineMacro("__HEXAGON_ARCH__", "4");
3589    if(Opts.HexagonQdsp6Compat) {
3590      Builder.defineMacro("__QDSP6_V4__");
3591      Builder.defineMacro("__QDSP6_ARCH__", "4");
3592    }
3593  }
3594  else if(CPU == "hexagonv5") {
3595    Builder.defineMacro("__HEXAGON_V5__");
3596    Builder.defineMacro("__HEXAGON_ARCH__", "5");
3597    if(Opts.HexagonQdsp6Compat) {
3598      Builder.defineMacro("__QDSP6_V5__");
3599      Builder.defineMacro("__QDSP6_ARCH__", "5");
3600    }
3601  }
3602}
3603
3604const char * const HexagonTargetInfo::GCCRegNames[] = {
3605  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3606  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3607  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3608  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3609  "p0", "p1", "p2", "p3",
3610  "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3611};
3612
3613void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3614                                   unsigned &NumNames) const {
3615  Names = GCCRegNames;
3616  NumNames = llvm::array_lengthof(GCCRegNames);
3617}
3618
3619
3620const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3621  { { "sp" }, "r29" },
3622  { { "fp" }, "r30" },
3623  { { "lr" }, "r31" },
3624 };
3625
3626void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3627                                     unsigned &NumAliases) const {
3628  Aliases = GCCRegAliases;
3629  NumAliases = llvm::array_lengthof(GCCRegAliases);
3630}
3631
3632
3633const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3634#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3635#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3636                                              ALL_LANGUAGES },
3637#include "clang/Basic/BuiltinsHexagon.def"
3638};
3639}
3640
3641
3642namespace {
3643class SparcV8TargetInfo : public TargetInfo {
3644  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3645  static const char * const GCCRegNames[];
3646  bool SoftFloat;
3647public:
3648  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3649    // FIXME: Support Sparc quad-precision long double?
3650    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3651                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3652  }
3653  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3654                                 StringRef Name,
3655                                 bool Enabled) const {
3656    if (Name == "soft-float")
3657      Features[Name] = Enabled;
3658    else
3659      return false;
3660
3661    return true;
3662  }
3663  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3664    SoftFloat = false;
3665    for (unsigned i = 0, e = Features.size(); i != e; ++i)
3666      if (Features[i] == "+soft-float")
3667        SoftFloat = true;
3668  }
3669  virtual void getTargetDefines(const LangOptions &Opts,
3670                                MacroBuilder &Builder) const {
3671    DefineStd(Builder, "sparc", Opts);
3672    Builder.defineMacro("__sparcv8");
3673    Builder.defineMacro("__REGISTER_PREFIX__", "");
3674
3675    if (SoftFloat)
3676      Builder.defineMacro("SOFT_FLOAT", "1");
3677  }
3678
3679  virtual bool hasFeature(StringRef Feature) const {
3680    return llvm::StringSwitch<bool>(Feature)
3681             .Case("softfloat", SoftFloat)
3682             .Case("sparc", true)
3683             .Default(false);
3684  }
3685
3686  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3687                                 unsigned &NumRecords) const {
3688    // FIXME: Implement!
3689  }
3690  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3691    return TargetInfo::VoidPtrBuiltinVaList;
3692  }
3693  virtual void getGCCRegNames(const char * const *&Names,
3694                              unsigned &NumNames) const;
3695  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3696                                unsigned &NumAliases) const;
3697  virtual bool validateAsmConstraint(const char *&Name,
3698                                     TargetInfo::ConstraintInfo &info) const {
3699    // FIXME: Implement!
3700    return false;
3701  }
3702  virtual const char *getClobbers() const {
3703    // FIXME: Implement!
3704    return "";
3705  }
3706};
3707
3708const char * const SparcV8TargetInfo::GCCRegNames[] = {
3709  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3710  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3711  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3712  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3713};
3714
3715void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3716                                       unsigned &NumNames) const {
3717  Names = GCCRegNames;
3718  NumNames = llvm::array_lengthof(GCCRegNames);
3719}
3720
3721const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3722  { { "g0" }, "r0" },
3723  { { "g1" }, "r1" },
3724  { { "g2" }, "r2" },
3725  { { "g3" }, "r3" },
3726  { { "g4" }, "r4" },
3727  { { "g5" }, "r5" },
3728  { { "g6" }, "r6" },
3729  { { "g7" }, "r7" },
3730  { { "o0" }, "r8" },
3731  { { "o1" }, "r9" },
3732  { { "o2" }, "r10" },
3733  { { "o3" }, "r11" },
3734  { { "o4" }, "r12" },
3735  { { "o5" }, "r13" },
3736  { { "o6", "sp" }, "r14" },
3737  { { "o7" }, "r15" },
3738  { { "l0" }, "r16" },
3739  { { "l1" }, "r17" },
3740  { { "l2" }, "r18" },
3741  { { "l3" }, "r19" },
3742  { { "l4" }, "r20" },
3743  { { "l5" }, "r21" },
3744  { { "l6" }, "r22" },
3745  { { "l7" }, "r23" },
3746  { { "i0" }, "r24" },
3747  { { "i1" }, "r25" },
3748  { { "i2" }, "r26" },
3749  { { "i3" }, "r27" },
3750  { { "i4" }, "r28" },
3751  { { "i5" }, "r29" },
3752  { { "i6", "fp" }, "r30" },
3753  { { "i7" }, "r31" },
3754};
3755
3756void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3757                                         unsigned &NumAliases) const {
3758  Aliases = GCCRegAliases;
3759  NumAliases = llvm::array_lengthof(GCCRegAliases);
3760}
3761} // end anonymous namespace.
3762
3763namespace {
3764class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3765public:
3766  AuroraUXSparcV8TargetInfo(const std::string& triple) :
3767      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3768    SizeType = UnsignedInt;
3769    PtrDiffType = SignedInt;
3770  }
3771};
3772class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3773public:
3774  SolarisSparcV8TargetInfo(const std::string& triple) :
3775      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3776    SizeType = UnsignedInt;
3777    PtrDiffType = SignedInt;
3778  }
3779};
3780} // end anonymous namespace.
3781
3782namespace {
3783  class MSP430TargetInfo : public TargetInfo {
3784    static const char * const GCCRegNames[];
3785  public:
3786    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3787      BigEndian = false;
3788      TLSSupported = false;
3789      IntWidth = 16; IntAlign = 16;
3790      LongWidth = 32; LongLongWidth = 64;
3791      LongAlign = LongLongAlign = 16;
3792      PointerWidth = 16; PointerAlign = 16;
3793      SuitableAlign = 16;
3794      SizeType = UnsignedInt;
3795      IntMaxType = SignedLong;
3796      UIntMaxType = UnsignedLong;
3797      IntPtrType = SignedShort;
3798      PtrDiffType = SignedInt;
3799      SigAtomicType = SignedLong;
3800      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3801   }
3802    virtual void getTargetDefines(const LangOptions &Opts,
3803                                  MacroBuilder &Builder) const {
3804      Builder.defineMacro("MSP430");
3805      Builder.defineMacro("__MSP430__");
3806      // FIXME: defines for different 'flavours' of MCU
3807    }
3808    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3809                                   unsigned &NumRecords) const {
3810     // FIXME: Implement.
3811      Records = 0;
3812      NumRecords = 0;
3813    }
3814    virtual bool hasFeature(StringRef Feature) const {
3815      return Feature == "msp430";
3816    }
3817    virtual void getGCCRegNames(const char * const *&Names,
3818                                unsigned &NumNames) const;
3819    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3820                                  unsigned &NumAliases) const {
3821      // No aliases.
3822      Aliases = 0;
3823      NumAliases = 0;
3824    }
3825    virtual bool validateAsmConstraint(const char *&Name,
3826                                       TargetInfo::ConstraintInfo &info) const {
3827      // No target constraints for now.
3828      return false;
3829    }
3830    virtual const char *getClobbers() const {
3831      // FIXME: Is this really right?
3832      return "";
3833    }
3834    virtual BuiltinVaListKind getBuiltinVaListKind() const {
3835      // FIXME: implement
3836      return TargetInfo::CharPtrBuiltinVaList;
3837   }
3838  };
3839
3840  const char * const MSP430TargetInfo::GCCRegNames[] = {
3841    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3842    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3843  };
3844
3845  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3846                                        unsigned &NumNames) const {
3847    Names = GCCRegNames;
3848    NumNames = llvm::array_lengthof(GCCRegNames);
3849  }
3850}
3851
3852namespace {
3853
3854  // LLVM and Clang cannot be used directly to output native binaries for
3855  // target, but is used to compile C code to llvm bitcode with correct
3856  // type and alignment information.
3857  //
3858  // TCE uses the llvm bitcode as input and uses it for generating customized
3859  // target processor and program binary. TCE co-design environment is
3860  // publicly available in http://tce.cs.tut.fi
3861
3862  static const unsigned TCEOpenCLAddrSpaceMap[] = {
3863      3, // opencl_global
3864      4, // opencl_local
3865      5, // opencl_constant
3866      0, // cuda_device
3867      0, // cuda_constant
3868      0  // cuda_shared
3869  };
3870
3871  class TCETargetInfo : public TargetInfo{
3872  public:
3873    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3874      TLSSupported = false;
3875      IntWidth = 32;
3876      LongWidth = LongLongWidth = 32;
3877      PointerWidth = 32;
3878      IntAlign = 32;
3879      LongAlign = LongLongAlign = 32;
3880      PointerAlign = 32;
3881      SuitableAlign = 32;
3882      SizeType = UnsignedInt;
3883      IntMaxType = SignedLong;
3884      UIntMaxType = UnsignedLong;
3885      IntPtrType = SignedInt;
3886      PtrDiffType = SignedInt;
3887      FloatWidth = 32;
3888      FloatAlign = 32;
3889      DoubleWidth = 32;
3890      DoubleAlign = 32;
3891      LongDoubleWidth = 32;
3892      LongDoubleAlign = 32;
3893      FloatFormat = &llvm::APFloat::IEEEsingle;
3894      DoubleFormat = &llvm::APFloat::IEEEsingle;
3895      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3896      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3897                          "i16:16:32-i32:32:32-i64:32:32-"
3898                          "f32:32:32-f64:32:32-v64:32:32-"
3899                          "v128:32:32-a0:0:32-n32";
3900      AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3901    }
3902
3903    virtual void getTargetDefines(const LangOptions &Opts,
3904                                  MacroBuilder &Builder) const {
3905      DefineStd(Builder, "tce", Opts);
3906      Builder.defineMacro("__TCE__");
3907      Builder.defineMacro("__TCE_V1__");
3908    }
3909    virtual bool hasFeature(StringRef Feature) const {
3910      return Feature == "tce";
3911    }
3912
3913    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3914                                   unsigned &NumRecords) const {}
3915    virtual const char *getClobbers() const {
3916      return "";
3917    }
3918    virtual BuiltinVaListKind getBuiltinVaListKind() const {
3919      return TargetInfo::VoidPtrBuiltinVaList;
3920    }
3921    virtual void getGCCRegNames(const char * const *&Names,
3922                                unsigned &NumNames) const {}
3923    virtual bool validateAsmConstraint(const char *&Name,
3924                                       TargetInfo::ConstraintInfo &info) const {
3925      return true;
3926    }
3927    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3928                                  unsigned &NumAliases) const {}
3929  };
3930}
3931
3932namespace {
3933class MipsTargetInfoBase : public TargetInfo {
3934  static const Builtin::Info BuiltinInfo[];
3935  std::string CPU;
3936  bool IsMips16;
3937  enum MipsFloatABI {
3938    HardFloat, SingleFloat, SoftFloat
3939  } FloatABI;
3940  enum DspRevEnum {
3941    NoDSP, DSP1, DSP2
3942  } DspRev;
3943
3944protected:
3945  std::string ABI;
3946
3947public:
3948  MipsTargetInfoBase(const std::string& triple,
3949                     const std::string& ABIStr,
3950                     const std::string& CPUStr)
3951    : TargetInfo(triple),
3952      CPU(CPUStr),
3953      IsMips16(false),
3954      FloatABI(HardFloat),
3955      DspRev(NoDSP),
3956      ABI(ABIStr)
3957  {}
3958
3959  virtual const char *getABI() const { return ABI.c_str(); }
3960  virtual bool setABI(const std::string &Name) = 0;
3961  virtual bool setCPU(const std::string &Name) {
3962    CPU = Name;
3963    return true;
3964  }
3965  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3966    Features[ABI] = true;
3967    Features[CPU] = true;
3968  }
3969
3970  virtual void getTargetDefines(const LangOptions &Opts,
3971                                MacroBuilder &Builder) const {
3972    DefineStd(Builder, "mips", Opts);
3973    Builder.defineMacro("_mips");
3974    Builder.defineMacro("__REGISTER_PREFIX__", "");
3975
3976    switch (FloatABI) {
3977    case HardFloat:
3978      Builder.defineMacro("__mips_hard_float", Twine(1));
3979      break;
3980    case SingleFloat:
3981      Builder.defineMacro("__mips_hard_float", Twine(1));
3982      Builder.defineMacro("__mips_single_float", Twine(1));
3983      break;
3984    case SoftFloat:
3985      Builder.defineMacro("__mips_soft_float", Twine(1));
3986      break;
3987    }
3988
3989    if (IsMips16)
3990      Builder.defineMacro("__mips16", Twine(1));
3991
3992    switch (DspRev) {
3993    default:
3994      break;
3995    case DSP1:
3996      Builder.defineMacro("__mips_dsp_rev", Twine(1));
3997      Builder.defineMacro("__mips_dsp", Twine(1));
3998      break;
3999    case DSP2:
4000      Builder.defineMacro("__mips_dsp_rev", Twine(2));
4001      Builder.defineMacro("__mips_dspr2", Twine(1));
4002      Builder.defineMacro("__mips_dsp", Twine(1));
4003      break;
4004    }
4005
4006    Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
4007    Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
4008    Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
4009
4010    Builder.defineMacro("_MIPS_ARCH", "\"" + CPU + "\"");
4011    Builder.defineMacro("_MIPS_ARCH_" + StringRef(CPU).upper());
4012  }
4013
4014  virtual void getTargetBuiltins(const Builtin::Info *&Records,
4015                                 unsigned &NumRecords) const {
4016    Records = BuiltinInfo;
4017    NumRecords = clang::Mips::LastTSBuiltin - Builtin::FirstTSBuiltin;
4018  }
4019  virtual bool hasFeature(StringRef Feature) const {
4020    return Feature == "mips";
4021  }
4022  virtual BuiltinVaListKind getBuiltinVaListKind() const {
4023    return TargetInfo::VoidPtrBuiltinVaList;
4024  }
4025  virtual void getGCCRegNames(const char * const *&Names,
4026                              unsigned &NumNames) const {
4027    static const char * const GCCRegNames[] = {
4028      // CPU register names
4029      // Must match second column of GCCRegAliases
4030      "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
4031      "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
4032      "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
4033      "$24",  "$25",  "$26",  "$27",  "$28",  "$29",  "$30",  "$31",
4034      // Floating point register names
4035      "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
4036      "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
4037      "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
4038      "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
4039      // Hi/lo and condition register names
4040      "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
4041      "$fcc5","$fcc6","$fcc7"
4042    };
4043    Names = GCCRegNames;
4044    NumNames = llvm::array_lengthof(GCCRegNames);
4045  }
4046  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4047                                unsigned &NumAliases) const = 0;
4048  virtual bool validateAsmConstraint(const char *&Name,
4049                                     TargetInfo::ConstraintInfo &Info) const {
4050    switch (*Name) {
4051    default:
4052      return false;
4053
4054    case 'r': // CPU registers.
4055    case 'd': // Equivalent to "r" unless generating MIPS16 code.
4056    case 'y': // Equivalent to "r", backwards compatibility only.
4057    case 'f': // floating-point registers.
4058    case 'c': // $25 for indirect jumps
4059    case 'l': // lo register
4060    case 'x': // hilo register pair
4061      Info.setAllowsRegister();
4062      return true;
4063    }
4064  }
4065
4066  virtual const char *getClobbers() const {
4067    // FIXME: Implement!
4068    return "";
4069  }
4070
4071  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
4072                                 StringRef Name,
4073                                 bool Enabled) const {
4074    if (Name == "soft-float" || Name == "single-float" ||
4075        Name == "o32" || Name == "n32" || Name == "n64" || Name == "eabi" ||
4076        Name == "mips32" || Name == "mips32r2" ||
4077        Name == "mips64" || Name == "mips64r2" ||
4078        Name == "mips16" || Name == "dsp" || Name == "dspr2") {
4079      Features[Name] = Enabled;
4080      return true;
4081    }
4082    return false;
4083  }
4084
4085  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
4086    IsMips16 = false;
4087    FloatABI = HardFloat;
4088    DspRev = NoDSP;
4089
4090    for (std::vector<std::string>::iterator it = Features.begin(),
4091         ie = Features.end(); it != ie; ++it) {
4092      if (*it == "+single-float")
4093        FloatABI = SingleFloat;
4094      else if (*it == "+soft-float")
4095        FloatABI = SoftFloat;
4096      else if (*it == "+mips16")
4097        IsMips16 = true;
4098      else if (*it == "+dsp")
4099        DspRev = std::max(DspRev, DSP1);
4100      else if (*it == "+dspr2")
4101        DspRev = std::max(DspRev, DSP2);
4102    }
4103
4104    // Remove front-end specific option.
4105    std::vector<std::string>::iterator it =
4106      std::find(Features.begin(), Features.end(), "+soft-float");
4107    if (it != Features.end())
4108      Features.erase(it);
4109  }
4110};
4111
4112const Builtin::Info MipsTargetInfoBase::BuiltinInfo[] = {
4113#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
4114#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
4115                                              ALL_LANGUAGES },
4116#include "clang/Basic/BuiltinsMips.def"
4117};
4118
4119class Mips32TargetInfoBase : public MipsTargetInfoBase {
4120public:
4121  Mips32TargetInfoBase(const std::string& triple) :
4122    MipsTargetInfoBase(triple, "o32", "mips32") {
4123    SizeType = UnsignedInt;
4124    PtrDiffType = SignedInt;
4125  }
4126  virtual bool setABI(const std::string &Name) {
4127    if ((Name == "o32") || (Name == "eabi")) {
4128      ABI = Name;
4129      return true;
4130    } else
4131      return false;
4132  }
4133  virtual void getTargetDefines(const LangOptions &Opts,
4134                                MacroBuilder &Builder) const {
4135    MipsTargetInfoBase::getTargetDefines(Opts, Builder);
4136
4137    if (ABI == "o32") {
4138      Builder.defineMacro("__mips_o32");
4139      Builder.defineMacro("_ABIO32", "1");
4140      Builder.defineMacro("_MIPS_SIM", "_ABIO32");
4141    }
4142    else if (ABI == "eabi")
4143      Builder.defineMacro("__mips_eabi");
4144    else
4145      llvm_unreachable("Invalid ABI for Mips32.");
4146  }
4147  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4148                                unsigned &NumAliases) const {
4149    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
4150      { { "at" },  "$1" },
4151      { { "v0" },  "$2" },
4152      { { "v1" },  "$3" },
4153      { { "a0" },  "$4" },
4154      { { "a1" },  "$5" },
4155      { { "a2" },  "$6" },
4156      { { "a3" },  "$7" },
4157      { { "t0" },  "$8" },
4158      { { "t1" },  "$9" },
4159      { { "t2" }, "$10" },
4160      { { "t3" }, "$11" },
4161      { { "t4" }, "$12" },
4162      { { "t5" }, "$13" },
4163      { { "t6" }, "$14" },
4164      { { "t7" }, "$15" },
4165      { { "s0" }, "$16" },
4166      { { "s1" }, "$17" },
4167      { { "s2" }, "$18" },
4168      { { "s3" }, "$19" },
4169      { { "s4" }, "$20" },
4170      { { "s5" }, "$21" },
4171      { { "s6" }, "$22" },
4172      { { "s7" }, "$23" },
4173      { { "t8" }, "$24" },
4174      { { "t9" }, "$25" },
4175      { { "k0" }, "$26" },
4176      { { "k1" }, "$27" },
4177      { { "gp" }, "$28" },
4178      { { "sp","$sp" }, "$29" },
4179      { { "fp","$fp" }, "$30" },
4180      { { "ra" }, "$31" }
4181    };
4182    Aliases = GCCRegAliases;
4183    NumAliases = llvm::array_lengthof(GCCRegAliases);
4184  }
4185};
4186
4187class Mips32EBTargetInfo : public Mips32TargetInfoBase {
4188public:
4189  Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
4190    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4191                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
4192  }
4193  virtual void getTargetDefines(const LangOptions &Opts,
4194                                MacroBuilder &Builder) const {
4195    DefineStd(Builder, "MIPSEB", Opts);
4196    Builder.defineMacro("_MIPSEB");
4197    Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
4198  }
4199};
4200
4201class Mips32ELTargetInfo : public Mips32TargetInfoBase {
4202public:
4203  Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
4204    BigEndian = false;
4205    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4206                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
4207  }
4208  virtual void getTargetDefines(const LangOptions &Opts,
4209                                MacroBuilder &Builder) const {
4210    DefineStd(Builder, "MIPSEL", Opts);
4211    Builder.defineMacro("_MIPSEL");
4212    Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
4213  }
4214};
4215
4216class Mips64TargetInfoBase : public MipsTargetInfoBase {
4217  virtual void SetDescriptionString(const std::string &Name) = 0;
4218public:
4219  Mips64TargetInfoBase(const std::string& triple) :
4220    MipsTargetInfoBase(triple, "n64", "mips64") {
4221    LongWidth = LongAlign = 64;
4222    PointerWidth = PointerAlign = 64;
4223    LongDoubleWidth = LongDoubleAlign = 128;
4224    LongDoubleFormat = &llvm::APFloat::IEEEquad;
4225    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
4226      LongDoubleWidth = LongDoubleAlign = 64;
4227      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
4228    }
4229    SuitableAlign = 128;
4230  }
4231  virtual bool setABI(const std::string &Name) {
4232    SetDescriptionString(Name);
4233
4234    if (Name != "n32" && Name != "n64")
4235      return false;
4236
4237    ABI = Name;
4238
4239    if (Name == "n32") {
4240      LongWidth = LongAlign = 32;
4241      PointerWidth = PointerAlign = 32;
4242    }
4243
4244    return true;
4245  }
4246  virtual void getTargetDefines(const LangOptions &Opts,
4247                                MacroBuilder &Builder) const {
4248    MipsTargetInfoBase::getTargetDefines(Opts, Builder);
4249
4250    Builder.defineMacro("__mips64");
4251    Builder.defineMacro("__mips64__");
4252
4253    if (ABI == "n32") {
4254      Builder.defineMacro("__mips_n32");
4255      Builder.defineMacro("_ABIN32", "2");
4256      Builder.defineMacro("_MIPS_SIM", "_ABIN32");
4257    }
4258    else if (ABI == "n64") {
4259      Builder.defineMacro("__mips_n64");
4260      Builder.defineMacro("_ABI64", "3");
4261      Builder.defineMacro("_MIPS_SIM", "_ABI64");
4262    }
4263    else
4264      llvm_unreachable("Invalid ABI for Mips64.");
4265  }
4266  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4267                                unsigned &NumAliases) const {
4268    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
4269      { { "at" },  "$1" },
4270      { { "v0" },  "$2" },
4271      { { "v1" },  "$3" },
4272      { { "a0" },  "$4" },
4273      { { "a1" },  "$5" },
4274      { { "a2" },  "$6" },
4275      { { "a3" },  "$7" },
4276      { { "a4" },  "$8" },
4277      { { "a5" },  "$9" },
4278      { { "a6" }, "$10" },
4279      { { "a7" }, "$11" },
4280      { { "t0" }, "$12" },
4281      { { "t1" }, "$13" },
4282      { { "t2" }, "$14" },
4283      { { "t3" }, "$15" },
4284      { { "s0" }, "$16" },
4285      { { "s1" }, "$17" },
4286      { { "s2" }, "$18" },
4287      { { "s3" }, "$19" },
4288      { { "s4" }, "$20" },
4289      { { "s5" }, "$21" },
4290      { { "s6" }, "$22" },
4291      { { "s7" }, "$23" },
4292      { { "t8" }, "$24" },
4293      { { "t9" }, "$25" },
4294      { { "k0" }, "$26" },
4295      { { "k1" }, "$27" },
4296      { { "gp" }, "$28" },
4297      { { "sp","$sp" }, "$29" },
4298      { { "fp","$fp" }, "$30" },
4299      { { "ra" }, "$31" }
4300    };
4301    Aliases = GCCRegAliases;
4302    NumAliases = llvm::array_lengthof(GCCRegAliases);
4303  }
4304};
4305
4306class Mips64EBTargetInfo : public Mips64TargetInfoBase {
4307  virtual void SetDescriptionString(const std::string &Name) {
4308    // Change DescriptionString only if ABI is n32.
4309    if (Name == "n32")
4310      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4311                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4312                          "v64:64:64-n32";
4313  }
4314public:
4315  Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
4316    // Default ABI is n64.
4317    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4318                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4319                        "v64:64:64-n32";
4320  }
4321  virtual void getTargetDefines(const LangOptions &Opts,
4322                                MacroBuilder &Builder) const {
4323    DefineStd(Builder, "MIPSEB", Opts);
4324    Builder.defineMacro("_MIPSEB");
4325    Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
4326  }
4327};
4328
4329class Mips64ELTargetInfo : public Mips64TargetInfoBase {
4330  virtual void SetDescriptionString(const std::string &Name) {
4331    // Change DescriptionString only if ABI is n32.
4332    if (Name == "n32")
4333      DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4334                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
4335                          "-v64:64:64-n32";
4336  }
4337public:
4338  Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
4339    // Default ABI is n64.
4340    BigEndian = false;
4341    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4342                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4343                        "v64:64:64-n32";
4344  }
4345  virtual void getTargetDefines(const LangOptions &Opts,
4346                                MacroBuilder &Builder) const {
4347    DefineStd(Builder, "MIPSEL", Opts);
4348    Builder.defineMacro("_MIPSEL");
4349    Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
4350  }
4351};
4352} // end anonymous namespace.
4353
4354namespace {
4355class PNaClTargetInfo : public TargetInfo {
4356public:
4357  PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
4358    BigEndian = false;
4359    this->UserLabelPrefix = "";
4360    this->LongAlign = 32;
4361    this->LongWidth = 32;
4362    this->PointerAlign = 32;
4363    this->PointerWidth = 32;
4364    this->IntMaxType = TargetInfo::SignedLongLong;
4365    this->UIntMaxType = TargetInfo::UnsignedLongLong;
4366    this->Int64Type = TargetInfo::SignedLongLong;
4367    this->DoubleAlign = 64;
4368    this->LongDoubleWidth = 64;
4369    this->LongDoubleAlign = 64;
4370    this->SizeType = TargetInfo::UnsignedInt;
4371    this->PtrDiffType = TargetInfo::SignedInt;
4372    this->IntPtrType = TargetInfo::SignedInt;
4373    this->RegParmMax = 2;
4374    DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
4375                        "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
4376  }
4377
4378  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
4379  }
4380  virtual void getArchDefines(const LangOptions &Opts,
4381                              MacroBuilder &Builder) const {
4382    Builder.defineMacro("__le32__");
4383    Builder.defineMacro("__pnacl__");
4384  }
4385  virtual void getTargetDefines(const LangOptions &Opts,
4386                                MacroBuilder &Builder) const {
4387    Builder.defineMacro("__LITTLE_ENDIAN__");
4388    getArchDefines(Opts, Builder);
4389  }
4390  virtual bool hasFeature(StringRef Feature) const {
4391    return Feature == "pnacl";
4392  }
4393  virtual void getTargetBuiltins(const Builtin::Info *&Records,
4394                                 unsigned &NumRecords) const {
4395  }
4396  virtual BuiltinVaListKind getBuiltinVaListKind() const {
4397    return TargetInfo::PNaClABIBuiltinVaList;
4398  }
4399  virtual void getGCCRegNames(const char * const *&Names,
4400                              unsigned &NumNames) const;
4401  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4402                                unsigned &NumAliases) const;
4403  virtual bool validateAsmConstraint(const char *&Name,
4404                                     TargetInfo::ConstraintInfo &Info) const {
4405    return false;
4406  }
4407
4408  virtual const char *getClobbers() const {
4409    return "";
4410  }
4411};
4412
4413void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
4414                                     unsigned &NumNames) const {
4415  Names = NULL;
4416  NumNames = 0;
4417}
4418
4419void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
4420                                       unsigned &NumAliases) const {
4421  Aliases = NULL;
4422  NumAliases = 0;
4423}
4424} // end anonymous namespace.
4425
4426
4427//===----------------------------------------------------------------------===//
4428// Driver code
4429//===----------------------------------------------------------------------===//
4430
4431static TargetInfo *AllocateTarget(const std::string &T) {
4432  llvm::Triple Triple(T);
4433  llvm::Triple::OSType os = Triple.getOS();
4434
4435  switch (Triple.getArch()) {
4436  default:
4437    return NULL;
4438
4439  case llvm::Triple::hexagon:
4440    return new HexagonTargetInfo(T);
4441
4442  case llvm::Triple::arm:
4443  case llvm::Triple::thumb:
4444    if (Triple.isOSDarwin())
4445      return new DarwinARMTargetInfo(T);
4446
4447    switch (os) {
4448    case llvm::Triple::Linux:
4449      return new LinuxTargetInfo<ARMTargetInfo>(T);
4450    case llvm::Triple::FreeBSD:
4451      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
4452    case llvm::Triple::NetBSD:
4453      return new NetBSDTargetInfo<ARMTargetInfo>(T);
4454    case llvm::Triple::OpenBSD:
4455      return new OpenBSDTargetInfo<ARMTargetInfo>(T);
4456    case llvm::Triple::Bitrig:
4457      return new BitrigTargetInfo<ARMTargetInfo>(T);
4458    case llvm::Triple::RTEMS:
4459      return new RTEMSTargetInfo<ARMTargetInfo>(T);
4460    case llvm::Triple::NaCl:
4461      return new NaClTargetInfo<ARMTargetInfo>(T);
4462    default:
4463      return new ARMTargetInfo(T);
4464    }
4465
4466  case llvm::Triple::msp430:
4467    return new MSP430TargetInfo(T);
4468
4469  case llvm::Triple::mips:
4470    switch (os) {
4471    case llvm::Triple::Linux:
4472      return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
4473    case llvm::Triple::RTEMS:
4474      return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
4475    case llvm::Triple::FreeBSD:
4476      return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
4477    case llvm::Triple::NetBSD:
4478      return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
4479    default:
4480      return new Mips32EBTargetInfo(T);
4481    }
4482
4483  case llvm::Triple::mipsel:
4484    switch (os) {
4485    case llvm::Triple::Linux:
4486      return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
4487    case llvm::Triple::RTEMS:
4488      return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
4489    case llvm::Triple::FreeBSD:
4490      return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
4491    case llvm::Triple::NetBSD:
4492      return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
4493    default:
4494      return new Mips32ELTargetInfo(T);
4495    }
4496
4497  case llvm::Triple::mips64:
4498    switch (os) {
4499    case llvm::Triple::Linux:
4500      return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
4501    case llvm::Triple::RTEMS:
4502      return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
4503    case llvm::Triple::FreeBSD:
4504      return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
4505    case llvm::Triple::NetBSD:
4506      return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
4507    case llvm::Triple::OpenBSD:
4508      return new OpenBSDTargetInfo<Mips64EBTargetInfo>(T);
4509    default:
4510      return new Mips64EBTargetInfo(T);
4511    }
4512
4513  case llvm::Triple::mips64el:
4514    switch (os) {
4515    case llvm::Triple::Linux:
4516      return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
4517    case llvm::Triple::RTEMS:
4518      return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
4519    case llvm::Triple::FreeBSD:
4520      return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
4521    case llvm::Triple::NetBSD:
4522      return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
4523    case llvm::Triple::OpenBSD:
4524      return new OpenBSDTargetInfo<Mips64ELTargetInfo>(T);
4525    default:
4526      return new Mips64ELTargetInfo(T);
4527    }
4528
4529  case llvm::Triple::le32:
4530    switch (os) {
4531      case llvm::Triple::NaCl:
4532        return new NaClTargetInfo<PNaClTargetInfo>(T);
4533      default:
4534        return NULL;
4535    }
4536
4537  case llvm::Triple::ppc:
4538    if (Triple.isOSDarwin())
4539      return new DarwinPPC32TargetInfo(T);
4540    switch (os) {
4541    case llvm::Triple::Linux:
4542      return new LinuxTargetInfo<PPC32TargetInfo>(T);
4543    case llvm::Triple::FreeBSD:
4544      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
4545    case llvm::Triple::NetBSD:
4546      return new NetBSDTargetInfo<PPC32TargetInfo>(T);
4547    case llvm::Triple::OpenBSD:
4548      return new OpenBSDTargetInfo<PPC32TargetInfo>(T);
4549    case llvm::Triple::RTEMS:
4550      return new RTEMSTargetInfo<PPC32TargetInfo>(T);
4551    default:
4552      return new PPC32TargetInfo(T);
4553    }
4554
4555  case llvm::Triple::ppc64:
4556    if (Triple.isOSDarwin())
4557      return new DarwinPPC64TargetInfo(T);
4558    switch (os) {
4559    case llvm::Triple::Linux:
4560      return new LinuxTargetInfo<PPC64TargetInfo>(T);
4561    case llvm::Triple::Lv2:
4562      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
4563    case llvm::Triple::FreeBSD:
4564      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
4565    case llvm::Triple::NetBSD:
4566      return new NetBSDTargetInfo<PPC64TargetInfo>(T);
4567    default:
4568      return new PPC64TargetInfo(T);
4569    }
4570
4571  case llvm::Triple::nvptx:
4572    return new NVPTX32TargetInfo(T);
4573  case llvm::Triple::nvptx64:
4574    return new NVPTX64TargetInfo(T);
4575
4576  case llvm::Triple::mblaze:
4577    return new MBlazeTargetInfo(T);
4578
4579  case llvm::Triple::r600:
4580    return new R600TargetInfo(T);
4581
4582  case llvm::Triple::sparc:
4583    switch (os) {
4584    case llvm::Triple::Linux:
4585      return new LinuxTargetInfo<SparcV8TargetInfo>(T);
4586    case llvm::Triple::AuroraUX:
4587      return new AuroraUXSparcV8TargetInfo(T);
4588    case llvm::Triple::Solaris:
4589      return new SolarisSparcV8TargetInfo(T);
4590    case llvm::Triple::NetBSD:
4591      return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
4592    case llvm::Triple::OpenBSD:
4593      return new OpenBSDTargetInfo<SparcV8TargetInfo>(T);
4594    case llvm::Triple::RTEMS:
4595      return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
4596    default:
4597      return new SparcV8TargetInfo(T);
4598    }
4599
4600  case llvm::Triple::tce:
4601    return new TCETargetInfo(T);
4602
4603  case llvm::Triple::x86:
4604    if (Triple.isOSDarwin())
4605      return new DarwinI386TargetInfo(T);
4606
4607    switch (os) {
4608    case llvm::Triple::AuroraUX:
4609      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
4610    case llvm::Triple::Linux:
4611      return new LinuxTargetInfo<X86_32TargetInfo>(T);
4612    case llvm::Triple::DragonFly:
4613      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
4614    case llvm::Triple::NetBSD:
4615      return new NetBSDI386TargetInfo(T);
4616    case llvm::Triple::OpenBSD:
4617      return new OpenBSDI386TargetInfo(T);
4618    case llvm::Triple::Bitrig:
4619      return new BitrigI386TargetInfo(T);
4620    case llvm::Triple::FreeBSD:
4621      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
4622    case llvm::Triple::Minix:
4623      return new MinixTargetInfo<X86_32TargetInfo>(T);
4624    case llvm::Triple::Solaris:
4625      return new SolarisTargetInfo<X86_32TargetInfo>(T);
4626    case llvm::Triple::Cygwin:
4627      return new CygwinX86_32TargetInfo(T);
4628    case llvm::Triple::MinGW32:
4629      return new MinGWX86_32TargetInfo(T);
4630    case llvm::Triple::Win32:
4631      return new VisualStudioWindowsX86_32TargetInfo(T);
4632    case llvm::Triple::Haiku:
4633      return new HaikuX86_32TargetInfo(T);
4634    case llvm::Triple::RTEMS:
4635      return new RTEMSX86_32TargetInfo(T);
4636    case llvm::Triple::NaCl:
4637      return new NaClTargetInfo<X86_32TargetInfo>(T);
4638    default:
4639      return new X86_32TargetInfo(T);
4640    }
4641
4642  case llvm::Triple::x86_64:
4643    if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
4644      return new DarwinX86_64TargetInfo(T);
4645
4646    switch (os) {
4647    case llvm::Triple::AuroraUX:
4648      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
4649    case llvm::Triple::Linux:
4650      return new LinuxTargetInfo<X86_64TargetInfo>(T);
4651    case llvm::Triple::DragonFly:
4652      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
4653    case llvm::Triple::NetBSD:
4654      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
4655    case llvm::Triple::OpenBSD:
4656      return new OpenBSDX86_64TargetInfo(T);
4657    case llvm::Triple::Bitrig:
4658      return new BitrigX86_64TargetInfo(T);
4659    case llvm::Triple::FreeBSD:
4660      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
4661    case llvm::Triple::Solaris:
4662      return new SolarisTargetInfo<X86_64TargetInfo>(T);
4663    case llvm::Triple::MinGW32:
4664      return new MinGWX86_64TargetInfo(T);
4665    case llvm::Triple::Win32:   // This is what Triple.h supports now.
4666      return new VisualStudioWindowsX86_64TargetInfo(T);
4667    case llvm::Triple::NaCl:
4668      return new NaClTargetInfo<X86_64TargetInfo>(T);
4669    default:
4670      return new X86_64TargetInfo(T);
4671    }
4672  }
4673}
4674
4675/// CreateTargetInfo - Return the target info object for the specified target
4676/// triple.
4677TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
4678                                         TargetOptions *Opts) {
4679  llvm::Triple Triple(Opts->Triple);
4680
4681  // Construct the target
4682  OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
4683  if (!Target) {
4684    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
4685    return 0;
4686  }
4687  Target->setTargetOpts(Opts);
4688
4689  // Set the target CPU if specified.
4690  if (!Opts->CPU.empty() && !Target->setCPU(Opts->CPU)) {
4691    Diags.Report(diag::err_target_unknown_cpu) << Opts->CPU;
4692    return 0;
4693  }
4694
4695  // Set the target ABI if specified.
4696  if (!Opts->ABI.empty() && !Target->setABI(Opts->ABI)) {
4697    Diags.Report(diag::err_target_unknown_abi) << Opts->ABI;
4698    return 0;
4699  }
4700
4701  // Set the target C++ ABI.
4702  if (!Opts->CXXABI.empty() && !Target->setCXXABI(Opts->CXXABI)) {
4703    Diags.Report(diag::err_target_unknown_cxxabi) << Opts->CXXABI;
4704    return 0;
4705  }
4706
4707  // Compute the default target features, we need the target to handle this
4708  // because features may have dependencies on one another.
4709  llvm::StringMap<bool> Features;
4710  Target->getDefaultFeatures(Features);
4711
4712  // Apply the user specified deltas.
4713  // First the enables.
4714  for (std::vector<std::string>::const_iterator
4715         it = Opts->FeaturesAsWritten.begin(),
4716         ie = Opts->FeaturesAsWritten.end();
4717       it != ie; ++it) {
4718    const char *Name = it->c_str();
4719
4720    if (Name[0] != '+')
4721      continue;
4722
4723    // Apply the feature via the target.
4724    if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
4725      Diags.Report(diag::err_target_invalid_feature) << Name;
4726      return 0;
4727    }
4728  }
4729
4730  // Then the disables.
4731  for (std::vector<std::string>::const_iterator
4732         it = Opts->FeaturesAsWritten.begin(),
4733         ie = Opts->FeaturesAsWritten.end();
4734       it != ie; ++it) {
4735    const char *Name = it->c_str();
4736
4737    if (Name[0] == '+')
4738      continue;
4739
4740    // Apply the feature via the target.
4741    if (Name[0] != '-' ||
4742        !Target->setFeatureEnabled(Features, Name + 1, false)) {
4743      Diags.Report(diag::err_target_invalid_feature) << Name;
4744      return 0;
4745    }
4746  }
4747
4748  // Add the features to the compile options.
4749  //
4750  // FIXME: If we are completely confident that we have the right set, we only
4751  // need to pass the minuses.
4752  Opts->Features.clear();
4753  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
4754         ie = Features.end(); it != ie; ++it)
4755    Opts->Features.push_back((it->second ? "+" : "-") + it->first().str());
4756  Target->HandleTargetFeatures(Opts->Features);
4757
4758  return Target.take();
4759}
4760