Targets.cpp revision 849289e531a97895784ab86b550e43d190618dff 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include "llvm/Support/ErrorHandling.h"
30#include "llvm/Type.h"
31#include <algorithm>
32using namespace clang;
33
34//===----------------------------------------------------------------------===//
35//  Common code shared among targets.
36//===----------------------------------------------------------------------===//
37
38/// DefineStd - Define a macro name and standard variants.  For example if
39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
40/// when in GNU mode.
41static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42                      const LangOptions &Opts) {
43  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44
45  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46  // in the user's namespace.
47  if (Opts.GNUMode)
48    Builder.defineMacro(MacroName);
49
50  // Define __unix.
51  Builder.defineMacro("__" + MacroName);
52
53  // Define __unix__.
54  Builder.defineMacro("__" + MacroName + "__");
55}
56
57static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName,
58                            bool Tuning = true) {
59  Builder.defineMacro("__" + CPUName);
60  Builder.defineMacro("__" + CPUName + "__");
61  if (Tuning)
62    Builder.defineMacro("__tune_" + CPUName + "__");
63}
64
65//===----------------------------------------------------------------------===//
66// Defines specific to certain operating systems.
67//===----------------------------------------------------------------------===//
68
69namespace {
70template<typename TgtInfo>
71class OSTargetInfo : public TgtInfo {
72protected:
73  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
74                            MacroBuilder &Builder) const=0;
75public:
76  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
77  virtual void getTargetDefines(const LangOptions &Opts,
78                                MacroBuilder &Builder) const {
79    TgtInfo::getTargetDefines(Opts, Builder);
80    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
81  }
82
83};
84} // end anonymous namespace
85
86
87static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
88                             const llvm::Triple &Triple,
89                             StringRef &PlatformName,
90                             VersionTuple &PlatformMinVersion) {
91  Builder.defineMacro("__APPLE_CC__", "5621");
92  Builder.defineMacro("__APPLE__");
93  Builder.defineMacro("__MACH__");
94  Builder.defineMacro("OBJC_NEW_PROPERTIES");
95  // AddressSanitizer doesn't play well with source fortification, which is on
96  // by default on Darwin.
97  if (Opts.AddressSanitizer) Builder.defineMacro("_FORTIFY_SOURCE", "0");
98
99  if (!Opts.ObjCAutoRefCount) {
100    // __weak is always defined, for use in blocks and with objc pointers.
101    Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
102
103    // Darwin defines __strong even in C mode (just to nothing).
104    if (Opts.getGC() != LangOptions::NonGC)
105      Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
106    else
107      Builder.defineMacro("__strong", "");
108
109    // __unsafe_unretained is defined to nothing in non-ARC mode. We even
110    // allow this in C, since one might have block pointers in structs that
111    // are used in pure C code and in Objective-C ARC.
112    Builder.defineMacro("__unsafe_unretained", "");
113  }
114
115  if (Opts.Static)
116    Builder.defineMacro("__STATIC__");
117  else
118    Builder.defineMacro("__DYNAMIC__");
119
120  if (Opts.POSIXThreads)
121    Builder.defineMacro("_REENTRANT");
122
123  // Get the platform type and version number from the triple.
124  unsigned Maj, Min, Rev;
125  if (Triple.isMacOSX()) {
126    Triple.getMacOSXVersion(Maj, Min, Rev);
127    PlatformName = "macosx";
128  } else {
129    Triple.getOSVersion(Maj, Min, Rev);
130    PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
131  }
132
133  // If -target arch-pc-win32-macho option specified, we're
134  // generating code for Win32 ABI. No need to emit
135  // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
136  if (PlatformName == "win32") {
137    PlatformMinVersion = VersionTuple(Maj, Min, Rev);
138    return;
139  }
140
141  // Set the appropriate OS version define.
142  if (Triple.getOS() == llvm::Triple::IOS) {
143    assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
144    char Str[6];
145    Str[0] = '0' + Maj;
146    Str[1] = '0' + (Min / 10);
147    Str[2] = '0' + (Min % 10);
148    Str[3] = '0' + (Rev / 10);
149    Str[4] = '0' + (Rev % 10);
150    Str[5] = '\0';
151    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
152  } else {
153    // Note that the Driver allows versions which aren't representable in the
154    // define (because we only get a single digit for the minor and micro
155    // revision numbers). So, we limit them to the maximum representable
156    // version.
157    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
158    assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
159    char Str[5];
160    Str[0] = '0' + (Maj / 10);
161    Str[1] = '0' + (Maj % 10);
162    Str[2] = '0' + std::min(Min, 9U);
163    Str[3] = '0' + std::min(Rev, 9U);
164    Str[4] = '\0';
165    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
166  }
167
168  PlatformMinVersion = VersionTuple(Maj, Min, Rev);
169}
170
171namespace {
172template<typename Target>
173class DarwinTargetInfo : public OSTargetInfo<Target> {
174protected:
175  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
176                            MacroBuilder &Builder) const {
177    getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
178                     this->PlatformMinVersion);
179  }
180
181public:
182  DarwinTargetInfo(const std::string& triple) :
183    OSTargetInfo<Target>(triple) {
184      llvm::Triple T = llvm::Triple(triple);
185      this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
186      this->MCountName = "\01mcount";
187    }
188
189  virtual std::string isValidSectionSpecifier(StringRef SR) const {
190    // Let MCSectionMachO validate this.
191    StringRef Segment, Section;
192    unsigned TAA, StubSize;
193    bool HasTAA;
194    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
195                                                       TAA, HasTAA, StubSize);
196  }
197
198  virtual const char *getStaticInitSectionSpecifier() const {
199    // FIXME: We should return 0 when building kexts.
200    return "__TEXT,__StaticInit,regular,pure_instructions";
201  }
202
203  /// Darwin does not support protected visibility.  Darwin's "default"
204  /// is very similar to ELF's "protected";  Darwin requires a "weak"
205  /// attribute on declarations that can be dynamically replaced.
206  virtual bool hasProtectedVisibility() const {
207    return false;
208  }
209};
210
211
212// DragonFlyBSD Target
213template<typename Target>
214class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
215protected:
216  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
217                            MacroBuilder &Builder) const {
218    // DragonFly defines; list based off of gcc output
219    Builder.defineMacro("__DragonFly__");
220    Builder.defineMacro("__DragonFly_cc_version", "100001");
221    Builder.defineMacro("__ELF__");
222    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
223    Builder.defineMacro("__tune_i386__");
224    DefineStd(Builder, "unix", Opts);
225  }
226public:
227  DragonFlyBSDTargetInfo(const std::string &triple)
228    : OSTargetInfo<Target>(triple) {
229      this->UserLabelPrefix = "";
230
231      llvm::Triple Triple(triple);
232      switch (Triple.getArch()) {
233        default:
234        case llvm::Triple::x86:
235        case llvm::Triple::x86_64:
236          this->MCountName = ".mcount";
237          break;
238      }
239  }
240};
241
242// FreeBSD Target
243template<typename Target>
244class FreeBSDTargetInfo : public OSTargetInfo<Target> {
245protected:
246  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
247                            MacroBuilder &Builder) const {
248    // FreeBSD defines; list based off of gcc output
249
250    unsigned Release = Triple.getOSMajorVersion();
251    if (Release == 0U)
252      Release = 8;
253
254    Builder.defineMacro("__FreeBSD__", Twine(Release));
255    Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
256    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
257    DefineStd(Builder, "unix", Opts);
258    Builder.defineMacro("__ELF__");
259  }
260public:
261  FreeBSDTargetInfo(const std::string &triple)
262    : OSTargetInfo<Target>(triple) {
263      this->UserLabelPrefix = "";
264
265      llvm::Triple Triple(triple);
266      switch (Triple.getArch()) {
267        default:
268        case llvm::Triple::x86:
269        case llvm::Triple::x86_64:
270          this->MCountName = ".mcount";
271          break;
272        case llvm::Triple::mips:
273        case llvm::Triple::mipsel:
274        case llvm::Triple::ppc:
275        case llvm::Triple::ppc64:
276          this->MCountName = "_mcount";
277          break;
278        case llvm::Triple::arm:
279          this->MCountName = "__mcount";
280          break;
281      }
282
283    }
284};
285
286// Minix Target
287template<typename Target>
288class MinixTargetInfo : public OSTargetInfo<Target> {
289protected:
290  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
291                            MacroBuilder &Builder) const {
292    // Minix defines
293
294    Builder.defineMacro("__minix", "3");
295    Builder.defineMacro("_EM_WSIZE", "4");
296    Builder.defineMacro("_EM_PSIZE", "4");
297    Builder.defineMacro("_EM_SSIZE", "2");
298    Builder.defineMacro("_EM_LSIZE", "4");
299    Builder.defineMacro("_EM_FSIZE", "4");
300    Builder.defineMacro("_EM_DSIZE", "8");
301    Builder.defineMacro("__ELF__");
302    DefineStd(Builder, "unix", Opts);
303  }
304public:
305  MinixTargetInfo(const std::string &triple)
306    : OSTargetInfo<Target>(triple) {
307      this->UserLabelPrefix = "";
308    }
309};
310
311// Linux target
312template<typename Target>
313class LinuxTargetInfo : public OSTargetInfo<Target> {
314protected:
315  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
316                            MacroBuilder &Builder) const {
317    // Linux defines; list based off of gcc output
318    DefineStd(Builder, "unix", Opts);
319    DefineStd(Builder, "linux", Opts);
320    Builder.defineMacro("__gnu_linux__");
321    Builder.defineMacro("__ELF__");
322    if (Triple.getEnvironment() == llvm::Triple::Android)
323      Builder.defineMacro("__ANDROID__", "1");
324    if (Opts.POSIXThreads)
325      Builder.defineMacro("_REENTRANT");
326    if (Opts.CPlusPlus)
327      Builder.defineMacro("_GNU_SOURCE");
328  }
329public:
330  LinuxTargetInfo(const std::string& triple)
331    : OSTargetInfo<Target>(triple) {
332    this->UserLabelPrefix = "";
333    this->WIntType = TargetInfo::UnsignedInt;
334  }
335
336  virtual const char *getStaticInitSectionSpecifier() const {
337    return ".text.startup";
338  }
339};
340
341// NetBSD Target
342template<typename Target>
343class NetBSDTargetInfo : public OSTargetInfo<Target> {
344protected:
345  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
346                            MacroBuilder &Builder) const {
347    // NetBSD defines; list based off of gcc output
348    Builder.defineMacro("__NetBSD__");
349    Builder.defineMacro("__unix__");
350    Builder.defineMacro("__ELF__");
351    if (Opts.POSIXThreads)
352      Builder.defineMacro("_POSIX_THREADS");
353  }
354public:
355  NetBSDTargetInfo(const std::string &triple)
356    : OSTargetInfo<Target>(triple) {
357      this->UserLabelPrefix = "";
358    }
359};
360
361// OpenBSD Target
362template<typename Target>
363class OpenBSDTargetInfo : public OSTargetInfo<Target> {
364protected:
365  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
366                            MacroBuilder &Builder) const {
367    // OpenBSD defines; list based off of gcc output
368
369    Builder.defineMacro("__OpenBSD__");
370    DefineStd(Builder, "unix", Opts);
371    Builder.defineMacro("__ELF__");
372    if (Opts.POSIXThreads)
373      Builder.defineMacro("_REENTRANT");
374  }
375public:
376  OpenBSDTargetInfo(const std::string &triple)
377    : OSTargetInfo<Target>(triple) {
378      this->UserLabelPrefix = "";
379      this->TLSSupported = false;
380
381      llvm::Triple Triple(triple);
382      switch (Triple.getArch()) {
383        default:
384        case llvm::Triple::x86:
385        case llvm::Triple::x86_64:
386        case llvm::Triple::arm:
387	case llvm::Triple::sparc:
388          this->MCountName = "__mcount";
389          break;
390        case llvm::Triple::mips64:
391        case llvm::Triple::mips64el:
392        case llvm::Triple::ppc:
393	case llvm::Triple::sparcv9:
394          this->MCountName = "_mcount";
395          break;
396      }
397  }
398};
399
400// Bitrig Target
401template<typename Target>
402class BitrigTargetInfo : public OSTargetInfo<Target> {
403protected:
404  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
405                            MacroBuilder &Builder) const {
406    // Bitrig defines; list based off of gcc output
407
408    Builder.defineMacro("__Bitrig__");
409    DefineStd(Builder, "unix", Opts);
410    Builder.defineMacro("__ELF__");
411    if (Opts.POSIXThreads)
412      Builder.defineMacro("_REENTRANT");
413  }
414public:
415  BitrigTargetInfo(const std::string &triple)
416    : OSTargetInfo<Target>(triple) {
417      this->UserLabelPrefix = "";
418      this->TLSSupported = false;
419      this->MCountName = "__mcount";
420  }
421};
422
423// PSP Target
424template<typename Target>
425class PSPTargetInfo : public OSTargetInfo<Target> {
426protected:
427  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
428                            MacroBuilder &Builder) const {
429    // PSP defines; list based on the output of the pspdev gcc toolchain.
430    Builder.defineMacro("PSP");
431    Builder.defineMacro("_PSP");
432    Builder.defineMacro("__psp__");
433    Builder.defineMacro("__ELF__");
434  }
435public:
436  PSPTargetInfo(const std::string& triple)
437    : OSTargetInfo<Target>(triple) {
438    this->UserLabelPrefix = "";
439  }
440};
441
442// PS3 PPU Target
443template<typename Target>
444class PS3PPUTargetInfo : public OSTargetInfo<Target> {
445protected:
446  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
447                            MacroBuilder &Builder) const {
448    // PS3 PPU defines.
449    Builder.defineMacro("__PPC__");
450    Builder.defineMacro("__PPU__");
451    Builder.defineMacro("__CELLOS_LV2__");
452    Builder.defineMacro("__ELF__");
453    Builder.defineMacro("__LP32__");
454    Builder.defineMacro("_ARCH_PPC64");
455    Builder.defineMacro("__powerpc64__");
456  }
457public:
458  PS3PPUTargetInfo(const std::string& triple)
459    : OSTargetInfo<Target>(triple) {
460    this->UserLabelPrefix = "";
461    this->LongWidth = this->LongAlign = 32;
462    this->PointerWidth = this->PointerAlign = 32;
463    this->IntMaxType = TargetInfo::SignedLongLong;
464    this->UIntMaxType = TargetInfo::UnsignedLongLong;
465    this->Int64Type = TargetInfo::SignedLongLong;
466    this->SizeType = TargetInfo::UnsignedInt;
467    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
468                              "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
469  }
470};
471
472// FIXME: Need a real SPU target.
473// PS3 SPU Target
474template<typename Target>
475class PS3SPUTargetInfo : public OSTargetInfo<Target> {
476protected:
477  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
478                            MacroBuilder &Builder) const {
479    // PS3 PPU defines.
480    Builder.defineMacro("__SPU__");
481    Builder.defineMacro("__ELF__");
482  }
483public:
484  PS3SPUTargetInfo(const std::string& triple)
485    : OSTargetInfo<Target>(triple) {
486    this->UserLabelPrefix = "";
487  }
488};
489
490// AuroraUX target
491template<typename Target>
492class AuroraUXTargetInfo : public OSTargetInfo<Target> {
493protected:
494  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
495                            MacroBuilder &Builder) const {
496    DefineStd(Builder, "sun", Opts);
497    DefineStd(Builder, "unix", Opts);
498    Builder.defineMacro("__ELF__");
499    Builder.defineMacro("__svr4__");
500    Builder.defineMacro("__SVR4");
501  }
502public:
503  AuroraUXTargetInfo(const std::string& triple)
504    : OSTargetInfo<Target>(triple) {
505    this->UserLabelPrefix = "";
506    this->WCharType = this->SignedLong;
507    // FIXME: WIntType should be SignedLong
508  }
509};
510
511// Solaris target
512template<typename Target>
513class SolarisTargetInfo : public OSTargetInfo<Target> {
514protected:
515  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
516                            MacroBuilder &Builder) const {
517    DefineStd(Builder, "sun", Opts);
518    DefineStd(Builder, "unix", Opts);
519    Builder.defineMacro("__ELF__");
520    Builder.defineMacro("__svr4__");
521    Builder.defineMacro("__SVR4");
522    // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and
523    // newer, but to 500 for everything else.  feature_test.h has a check to
524    // ensure that you are not using C99 with an old version of X/Open or C89
525    // with a new version.
526    if (Opts.C99 || Opts.C11)
527      Builder.defineMacro("_XOPEN_SOURCE", "600");
528    else
529      Builder.defineMacro("_XOPEN_SOURCE", "500");
530    if (Opts.CPlusPlus)
531      Builder.defineMacro("__C99FEATURES__");
532    Builder.defineMacro("_LARGEFILE_SOURCE");
533    Builder.defineMacro("_LARGEFILE64_SOURCE");
534    Builder.defineMacro("__EXTENSIONS__");
535    Builder.defineMacro("_REENTRANT");
536  }
537public:
538  SolarisTargetInfo(const std::string& triple)
539    : OSTargetInfo<Target>(triple) {
540    this->UserLabelPrefix = "";
541    this->WCharType = this->SignedInt;
542    // FIXME: WIntType should be SignedLong
543  }
544};
545
546// Windows target
547template<typename Target>
548class WindowsTargetInfo : public OSTargetInfo<Target> {
549protected:
550  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
551                            MacroBuilder &Builder) const {
552    Builder.defineMacro("_WIN32");
553  }
554  void getVisualStudioDefines(const LangOptions &Opts,
555                              MacroBuilder &Builder) const {
556    if (Opts.CPlusPlus) {
557      if (Opts.RTTI)
558        Builder.defineMacro("_CPPRTTI");
559
560      if (Opts.Exceptions)
561        Builder.defineMacro("_CPPUNWIND");
562    }
563
564    if (!Opts.CharIsSigned)
565      Builder.defineMacro("_CHAR_UNSIGNED");
566
567    // FIXME: POSIXThreads isn't exactly the option this should be defined for,
568    //        but it works for now.
569    if (Opts.POSIXThreads)
570      Builder.defineMacro("_MT");
571
572    if (Opts.MSCVersion != 0)
573      Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
574
575    if (Opts.MicrosoftExt) {
576      Builder.defineMacro("_MSC_EXTENSIONS");
577
578      if (Opts.CPlusPlus0x) {
579        Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
580        Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
581        Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
582      }
583    }
584
585    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
586  }
587
588public:
589  WindowsTargetInfo(const std::string &triple)
590    : OSTargetInfo<Target>(triple) {}
591};
592
593template <typename Target>
594class NaClTargetInfo : public OSTargetInfo<Target> {
595 protected:
596  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
597                            MacroBuilder &Builder) const {
598    if (Opts.POSIXThreads)
599      Builder.defineMacro("_REENTRANT");
600    if (Opts.CPlusPlus)
601      Builder.defineMacro("_GNU_SOURCE");
602
603    DefineStd(Builder, "unix", Opts);
604    Builder.defineMacro("__ELF__");
605    Builder.defineMacro("__native_client__");
606  }
607 public:
608  NaClTargetInfo(const std::string &triple)
609    : OSTargetInfo<Target>(triple) {
610    this->UserLabelPrefix = "";
611    this->LongAlign = 32;
612    this->LongWidth = 32;
613    this->PointerAlign = 32;
614    this->PointerWidth = 32;
615    this->IntMaxType = TargetInfo::SignedLongLong;
616    this->UIntMaxType = TargetInfo::UnsignedLongLong;
617    this->Int64Type = TargetInfo::SignedLongLong;
618    this->DoubleAlign = 64;
619    this->LongDoubleWidth = 64;
620    this->LongDoubleAlign = 64;
621    this->SizeType = TargetInfo::UnsignedInt;
622    this->PtrDiffType = TargetInfo::SignedInt;
623    this->IntPtrType = TargetInfo::SignedInt;
624    this->RegParmMax = 2;
625    this->LongDoubleFormat = &llvm::APFloat::IEEEdouble;
626    this->DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
627                              "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
628  }
629  virtual typename Target::CallingConvCheckResult checkCallingConvention(
630      CallingConv CC) const {
631    return CC == CC_PnaclCall ? Target::CCCR_OK :
632        Target::checkCallingConvention(CC);
633  }
634};
635} // end anonymous namespace.
636
637//===----------------------------------------------------------------------===//
638// Specific target implementations.
639//===----------------------------------------------------------------------===//
640
641namespace {
642// PPC abstract base class
643class PPCTargetInfo : public TargetInfo {
644  static const Builtin::Info BuiltinInfo[];
645  static const char * const GCCRegNames[];
646  static const TargetInfo::GCCRegAlias GCCRegAliases[];
647  std::string CPU;
648public:
649  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {
650    LongDoubleWidth = LongDoubleAlign = 128;
651    LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
652  }
653
654  /// \brief Flags for architecture specific defines.
655  typedef enum {
656    ArchDefineNone  = 0,
657    ArchDefineName  = 1 << 0, // <name> is substituted for arch name.
658    ArchDefinePpcgr = 1 << 1,
659    ArchDefinePpcsq = 1 << 2,
660    ArchDefine440   = 1 << 3,
661    ArchDefine603   = 1 << 4,
662    ArchDefine604   = 1 << 5,
663    ArchDefinePwr4  = 1 << 6,
664    ArchDefinePwr6  = 1 << 7
665  } ArchDefineTypes;
666
667  virtual bool setCPU(const std::string &Name) {
668    bool CPUKnown = llvm::StringSwitch<bool>(Name)
669      .Case("generic", true)
670      .Case("440", true)
671      .Case("450", true)
672      .Case("601", true)
673      .Case("602", true)
674      .Case("603", true)
675      .Case("603e", true)
676      .Case("603ev", true)
677      .Case("604", true)
678      .Case("604e", true)
679      .Case("620", true)
680      .Case("g3", true)
681      .Case("7400", true)
682      .Case("g4", true)
683      .Case("7450", true)
684      .Case("g4+", true)
685      .Case("750", true)
686      .Case("970", true)
687      .Case("g5", true)
688      .Case("a2", true)
689      .Case("e500mc", true)
690      .Case("e5500", true)
691      .Case("pwr6", true)
692      .Case("pwr7", true)
693      .Case("ppc", true)
694      .Case("ppc64", true)
695      .Default(false);
696
697    if (CPUKnown)
698      CPU = Name;
699
700    return CPUKnown;
701  }
702
703  virtual void getTargetBuiltins(const Builtin::Info *&Records,
704                                 unsigned &NumRecords) const {
705    Records = BuiltinInfo;
706    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
707  }
708
709  virtual bool isCLZForZeroUndef() const { return false; }
710
711  virtual void getTargetDefines(const LangOptions &Opts,
712                                MacroBuilder &Builder) const;
713
714  virtual bool hasFeature(StringRef Feature) const;
715
716  virtual void getGCCRegNames(const char * const *&Names,
717                              unsigned &NumNames) const;
718  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
719                                unsigned &NumAliases) const;
720  virtual bool validateAsmConstraint(const char *&Name,
721                                     TargetInfo::ConstraintInfo &Info) const {
722    switch (*Name) {
723    default: return false;
724    case 'O': // Zero
725      break;
726    case 'b': // Base register
727    case 'f': // Floating point register
728      Info.setAllowsRegister();
729      break;
730    // FIXME: The following are added to allow parsing.
731    // I just took a guess at what the actions should be.
732    // Also, is more specific checking needed?  I.e. specific registers?
733    case 'd': // Floating point register (containing 64-bit value)
734    case 'v': // Altivec vector register
735      Info.setAllowsRegister();
736      break;
737    case 'w':
738      switch (Name[1]) {
739        case 'd':// VSX vector register to hold vector double data
740        case 'f':// VSX vector register to hold vector float data
741        case 's':// VSX vector register to hold scalar float data
742        case 'a':// Any VSX register
743          break;
744        default:
745          return false;
746      }
747      Info.setAllowsRegister();
748      Name++; // Skip over 'w'.
749      break;
750    case 'h': // `MQ', `CTR', or `LINK' register
751    case 'q': // `MQ' register
752    case 'c': // `CTR' register
753    case 'l': // `LINK' register
754    case 'x': // `CR' register (condition register) number 0
755    case 'y': // `CR' register (condition register)
756    case 'z': // `XER[CA]' carry bit (part of the XER register)
757      Info.setAllowsRegister();
758      break;
759    case 'I': // Signed 16-bit constant
760    case 'J': // Unsigned 16-bit constant shifted left 16 bits
761              //  (use `L' instead for SImode constants)
762    case 'K': // Unsigned 16-bit constant
763    case 'L': // Signed 16-bit constant shifted left 16 bits
764    case 'M': // Constant larger than 31
765    case 'N': // Exact power of 2
766    case 'P': // Constant whose negation is a signed 16-bit constant
767    case 'G': // Floating point constant that can be loaded into a
768              // register with one instruction per word
769    case 'H': // Integer/Floating point constant that can be loaded
770              // into a register using three instructions
771      break;
772    case 'm': // Memory operand. Note that on PowerPC targets, m can
773              // include addresses that update the base register. It
774              // is therefore only safe to use `m' in an asm statement
775              // if that asm statement accesses the operand exactly once.
776              // The asm statement must also use `%U<opno>' as a
777              // placeholder for the "update" flag in the corresponding
778              // load or store instruction. For example:
779              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
780              // is correct but:
781              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
782              // is not. Use es rather than m if you don't want the base
783              // register to be updated.
784    case 'e':
785      if (Name[1] != 's')
786          return false;
787              // es: A "stable" memory operand; that is, one which does not
788              // include any automodification of the base register. Unlike
789              // `m', this constraint can be used in asm statements that
790              // might access the operand several times, or that might not
791              // access it at all.
792      Info.setAllowsMemory();
793      Name++; // Skip over 'e'.
794      break;
795    case 'Q': // Memory operand that is an offset from a register (it is
796              // usually better to use `m' or `es' in asm statements)
797    case 'Z': // Memory operand that is an indexed or indirect from a
798              // register (it is usually better to use `m' or `es' in
799              // asm statements)
800      Info.setAllowsMemory();
801      Info.setAllowsRegister();
802      break;
803    case 'R': // AIX TOC entry
804    case 'a': // Address operand that is an indexed or indirect from a
805              // register (`p' is preferable for asm statements)
806    case 'S': // Constant suitable as a 64-bit mask operand
807    case 'T': // Constant suitable as a 32-bit mask operand
808    case 'U': // System V Release 4 small data area reference
809    case 't': // AND masks that can be performed by two rldic{l, r}
810              // instructions
811    case 'W': // Vector constant that does not require memory
812    case 'j': // Vector constant that is all zeros.
813      break;
814    // End FIXME.
815    }
816    return true;
817  }
818  virtual const char *getClobbers() const {
819    return "";
820  }
821};
822
823const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
824#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
825#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
826                                              ALL_LANGUAGES },
827#include "clang/Basic/BuiltinsPPC.def"
828};
829
830
831/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
832/// #defines that are not tied to a specific subtarget.
833void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
834                                     MacroBuilder &Builder) const {
835  // Target identification.
836  Builder.defineMacro("__ppc__");
837  Builder.defineMacro("_ARCH_PPC");
838  Builder.defineMacro("__powerpc__");
839  Builder.defineMacro("__POWERPC__");
840  if (PointerWidth == 64) {
841    Builder.defineMacro("_ARCH_PPC64");
842    Builder.defineMacro("__powerpc64__");
843    Builder.defineMacro("__ppc64__");
844  } else {
845    Builder.defineMacro("__ppc__");
846  }
847
848  // Target properties.
849  if (getTriple().getOS() != llvm::Triple::NetBSD &&
850      getTriple().getOS() != llvm::Triple::OpenBSD)
851    Builder.defineMacro("_BIG_ENDIAN");
852  Builder.defineMacro("__BIG_ENDIAN__");
853
854  // Subtarget options.
855  Builder.defineMacro("__NATURAL_ALIGNMENT__");
856  Builder.defineMacro("__REGISTER_PREFIX__", "");
857
858  // FIXME: Should be controlled by command line option.
859  Builder.defineMacro("__LONG_DOUBLE_128__");
860
861  if (Opts.AltiVec) {
862    Builder.defineMacro("__VEC__", "10206");
863    Builder.defineMacro("__ALTIVEC__");
864  }
865
866  // CPU identification.
867  ArchDefineTypes defs = (ArchDefineTypes)llvm::StringSwitch<int>(CPU)
868    .Case("440",   ArchDefineName)
869    .Case("450",   ArchDefineName | ArchDefine440)
870    .Case("601",   ArchDefineName)
871    .Case("602",   ArchDefineName | ArchDefinePpcgr)
872    .Case("603",   ArchDefineName | ArchDefinePpcgr)
873    .Case("603e",  ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
874    .Case("603ev", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
875    .Case("604",   ArchDefineName | ArchDefinePpcgr)
876    .Case("604e",  ArchDefineName | ArchDefine604 | ArchDefinePpcgr)
877    .Case("620",   ArchDefineName | ArchDefinePpcgr)
878    .Case("7400",  ArchDefineName | ArchDefinePpcgr)
879    .Case("7450",  ArchDefineName | ArchDefinePpcgr)
880    .Case("750",   ArchDefineName | ArchDefinePpcgr)
881    .Case("970",   ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr
882                     | ArchDefinePpcsq)
883    .Case("pwr6",  ArchDefinePwr6 | ArchDefinePpcgr | ArchDefinePpcsq)
884    .Case("pwr7",  ArchDefineName | ArchDefinePwr6 | ArchDefinePpcgr
885                     | ArchDefinePpcsq)
886    .Default(ArchDefineNone);
887
888  if (defs & ArchDefineName)
889    Builder.defineMacro(Twine("_ARCH_", StringRef(CPU).upper()));
890  if (defs & ArchDefinePpcgr)
891    Builder.defineMacro("_ARCH_PPCGR");
892  if (defs & ArchDefinePpcsq)
893    Builder.defineMacro("_ARCH_PPCSQ");
894  if (defs & ArchDefine440)
895    Builder.defineMacro("_ARCH_440");
896  if (defs & ArchDefine603)
897    Builder.defineMacro("_ARCH_603");
898  if (defs & ArchDefine604)
899    Builder.defineMacro("_ARCH_604");
900  if (defs & (ArchDefinePwr4 | ArchDefinePwr6))
901    Builder.defineMacro("_ARCH_PWR4");
902  if (defs & ArchDefinePwr6) {
903    Builder.defineMacro("_ARCH_PWR5");
904    Builder.defineMacro("_ARCH_PWR6");
905  }
906}
907
908bool PPCTargetInfo::hasFeature(StringRef Feature) const {
909  return Feature == "powerpc";
910}
911
912
913const char * const PPCTargetInfo::GCCRegNames[] = {
914  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
915  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
916  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
917  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
918  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
919  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
920  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
921  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
922  "mq", "lr", "ctr", "ap",
923  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
924  "xer",
925  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
926  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
927  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
928  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
929  "vrsave", "vscr",
930  "spe_acc", "spefscr",
931  "sfp"
932};
933
934void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
935                                   unsigned &NumNames) const {
936  Names = GCCRegNames;
937  NumNames = llvm::array_lengthof(GCCRegNames);
938}
939
940const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
941  // While some of these aliases do map to different registers
942  // they still share the same register name.
943  { { "0" }, "r0" },
944  { { "1"}, "r1" },
945  { { "2" }, "r2" },
946  { { "3" }, "r3" },
947  { { "4" }, "r4" },
948  { { "5" }, "r5" },
949  { { "6" }, "r6" },
950  { { "7" }, "r7" },
951  { { "8" }, "r8" },
952  { { "9" }, "r9" },
953  { { "10" }, "r10" },
954  { { "11" }, "r11" },
955  { { "12" }, "r12" },
956  { { "13" }, "r13" },
957  { { "14" }, "r14" },
958  { { "15" }, "r15" },
959  { { "16" }, "r16" },
960  { { "17" }, "r17" },
961  { { "18" }, "r18" },
962  { { "19" }, "r19" },
963  { { "20" }, "r20" },
964  { { "21" }, "r21" },
965  { { "22" }, "r22" },
966  { { "23" }, "r23" },
967  { { "24" }, "r24" },
968  { { "25" }, "r25" },
969  { { "26" }, "r26" },
970  { { "27" }, "r27" },
971  { { "28" }, "r28" },
972  { { "29" }, "r29" },
973  { { "30" }, "r30" },
974  { { "31" }, "r31" },
975  { { "fr0" }, "f0" },
976  { { "fr1" }, "f1" },
977  { { "fr2" }, "f2" },
978  { { "fr3" }, "f3" },
979  { { "fr4" }, "f4" },
980  { { "fr5" }, "f5" },
981  { { "fr6" }, "f6" },
982  { { "fr7" }, "f7" },
983  { { "fr8" }, "f8" },
984  { { "fr9" }, "f9" },
985  { { "fr10" }, "f10" },
986  { { "fr11" }, "f11" },
987  { { "fr12" }, "f12" },
988  { { "fr13" }, "f13" },
989  { { "fr14" }, "f14" },
990  { { "fr15" }, "f15" },
991  { { "fr16" }, "f16" },
992  { { "fr17" }, "f17" },
993  { { "fr18" }, "f18" },
994  { { "fr19" }, "f19" },
995  { { "fr20" }, "f20" },
996  { { "fr21" }, "f21" },
997  { { "fr22" }, "f22" },
998  { { "fr23" }, "f23" },
999  { { "fr24" }, "f24" },
1000  { { "fr25" }, "f25" },
1001  { { "fr26" }, "f26" },
1002  { { "fr27" }, "f27" },
1003  { { "fr28" }, "f28" },
1004  { { "fr29" }, "f29" },
1005  { { "fr30" }, "f30" },
1006  { { "fr31" }, "f31" },
1007  { { "cc" }, "cr0" },
1008};
1009
1010void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1011                                     unsigned &NumAliases) const {
1012  Aliases = GCCRegAliases;
1013  NumAliases = llvm::array_lengthof(GCCRegAliases);
1014}
1015} // end anonymous namespace.
1016
1017namespace {
1018class PPC32TargetInfo : public PPCTargetInfo {
1019public:
1020  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
1021    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1022                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
1023
1024    switch (getTriple().getOS()) {
1025    case llvm::Triple::Linux:
1026    case llvm::Triple::FreeBSD:
1027    case llvm::Triple::NetBSD:
1028      SizeType = UnsignedInt;
1029      PtrDiffType = SignedInt;
1030      IntPtrType = SignedInt;
1031      break;
1032    default:
1033      break;
1034    }
1035
1036    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1037      LongDoubleWidth = LongDoubleAlign = 64;
1038      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1039    }
1040  }
1041
1042  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1043    // This is the ELF definition, and is overridden by the Darwin sub-target
1044    return TargetInfo::PowerABIBuiltinVaList;
1045  }
1046};
1047} // end anonymous namespace.
1048
1049namespace {
1050class PPC64TargetInfo : public PPCTargetInfo {
1051public:
1052  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
1053    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1054    IntMaxType = SignedLong;
1055    UIntMaxType = UnsignedLong;
1056    Int64Type = SignedLong;
1057    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1058                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
1059
1060    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1061      LongDoubleWidth = LongDoubleAlign = 64;
1062      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1063    }
1064  }
1065  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1066    return TargetInfo::CharPtrBuiltinVaList;
1067  }
1068};
1069} // end anonymous namespace.
1070
1071
1072namespace {
1073class DarwinPPC32TargetInfo :
1074  public DarwinTargetInfo<PPC32TargetInfo> {
1075public:
1076  DarwinPPC32TargetInfo(const std::string& triple)
1077    : DarwinTargetInfo<PPC32TargetInfo>(triple) {
1078    HasAlignMac68kSupport = true;
1079    BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
1080    LongLongAlign = 32;
1081    SuitableAlign = 128;
1082    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1083                        "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32";
1084  }
1085  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1086    return TargetInfo::CharPtrBuiltinVaList;
1087  }
1088};
1089
1090class DarwinPPC64TargetInfo :
1091  public DarwinTargetInfo<PPC64TargetInfo> {
1092public:
1093  DarwinPPC64TargetInfo(const std::string& triple)
1094    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
1095    HasAlignMac68kSupport = true;
1096    SuitableAlign = 128;
1097  }
1098};
1099} // end anonymous namespace.
1100
1101namespace {
1102  static const unsigned NVPTXAddrSpaceMap[] = {
1103    1,    // opencl_global
1104    3,    // opencl_local
1105    4,    // opencl_constant
1106    1,    // cuda_device
1107    4,    // cuda_constant
1108    3,    // cuda_shared
1109  };
1110  class NVPTXTargetInfo : public TargetInfo {
1111    static const char * const GCCRegNames[];
1112    static const Builtin::Info BuiltinInfo[];
1113    std::vector<llvm::StringRef> AvailableFeatures;
1114  public:
1115    NVPTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
1116      BigEndian = false;
1117      TLSSupported = false;
1118      LongWidth = LongAlign = 64;
1119      AddrSpaceMap = &NVPTXAddrSpaceMap;
1120      // Define available target features
1121      // These must be defined in sorted order!
1122      NoAsmVariants = true;
1123    }
1124    virtual void getTargetDefines(const LangOptions &Opts,
1125                                  MacroBuilder &Builder) const {
1126      Builder.defineMacro("__PTX__");
1127      Builder.defineMacro("__NVPTX__");
1128    }
1129    virtual void getTargetBuiltins(const Builtin::Info *&Records,
1130                                   unsigned &NumRecords) const {
1131      Records = BuiltinInfo;
1132      NumRecords = clang::NVPTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
1133    }
1134    virtual bool hasFeature(StringRef Feature) const {
1135      return Feature == "ptx" || Feature == "nvptx";
1136    }
1137
1138    virtual void getGCCRegNames(const char * const *&Names,
1139                                unsigned &NumNames) const;
1140    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1141                                  unsigned &NumAliases) const {
1142      // No aliases.
1143      Aliases = 0;
1144      NumAliases = 0;
1145    }
1146    virtual bool validateAsmConstraint(const char *&Name,
1147                                       TargetInfo::ConstraintInfo &info) const {
1148      // FIXME: implement
1149      return true;
1150    }
1151    virtual const char *getClobbers() const {
1152      // FIXME: Is this really right?
1153      return "";
1154    }
1155    virtual BuiltinVaListKind getBuiltinVaListKind() const {
1156      // FIXME: implement
1157      return TargetInfo::CharPtrBuiltinVaList;
1158    }
1159    virtual bool setCPU(const std::string &Name) {
1160      return Name == "sm_10" || Name == "sm_13" || Name == "sm_20";
1161    }
1162    virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1163                                   StringRef Name,
1164                                   bool Enabled) const;
1165  };
1166
1167  const Builtin::Info NVPTXTargetInfo::BuiltinInfo[] = {
1168#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1169#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1170                                              ALL_LANGUAGES },
1171#include "clang/Basic/BuiltinsNVPTX.def"
1172  };
1173
1174  const char * const NVPTXTargetInfo::GCCRegNames[] = {
1175    "r0"
1176  };
1177
1178  void NVPTXTargetInfo::getGCCRegNames(const char * const *&Names,
1179                                     unsigned &NumNames) const {
1180    Names = GCCRegNames;
1181    NumNames = llvm::array_lengthof(GCCRegNames);
1182  }
1183
1184  bool NVPTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1185                                          StringRef Name,
1186                                          bool Enabled) const {
1187    if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
1188                          Name)) {
1189      Features[Name] = Enabled;
1190      return true;
1191    } else {
1192      return false;
1193    }
1194  }
1195
1196  class NVPTX32TargetInfo : public NVPTXTargetInfo {
1197  public:
1198    NVPTX32TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1199      PointerWidth = PointerAlign = 32;
1200      SizeType     = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1201      DescriptionString
1202        = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1203          "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1204          "n16:32:64";
1205  }
1206  };
1207
1208  class NVPTX64TargetInfo : public NVPTXTargetInfo {
1209  public:
1210    NVPTX64TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1211      PointerWidth = PointerAlign = 64;
1212      SizeType     = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1213      DescriptionString
1214        = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1215          "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1216          "n16:32:64";
1217  }
1218  };
1219}
1220
1221namespace {
1222
1223static const unsigned R600AddrSpaceMap[] = {
1224  1,    // opencl_global
1225  3,    // opencl_local
1226  2,    // opencl_constant
1227  1,    // cuda_device
1228  2,    // cuda_constant
1229  3     // cuda_shared
1230};
1231
1232class R600TargetInfo : public TargetInfo {
1233public:
1234  R600TargetInfo(const std::string& triple) : TargetInfo(triple) {
1235    DescriptionString =
1236          "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16"
1237          "-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:32:32"
1238          "-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64"
1239          "-v96:128:128-v128:128:128-v192:256:256-v256:256:256"
1240          "-v512:512:512-v1024:1024:1024-v2048:2048:2048"
1241          "-n8:16:32:64";
1242    AddrSpaceMap = &R600AddrSpaceMap;
1243  }
1244
1245  virtual const char * getClobbers() const {
1246    return "";
1247  }
1248
1249  virtual void getGCCRegNames(const char * const *&Names,
1250                              unsigned &numNames) const  {
1251    Names = NULL;
1252    numNames = 0;
1253  }
1254
1255  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1256                                unsigned &NumAliases) const {
1257    Aliases = NULL;
1258    NumAliases = 0;
1259  }
1260
1261  virtual bool validateAsmConstraint(const char *&Name,
1262                                     TargetInfo::ConstraintInfo &info) const {
1263    return true;
1264  }
1265
1266  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1267                                 unsigned &NumRecords) const {
1268    Records = NULL;
1269    NumRecords = 0;
1270  }
1271
1272
1273  virtual void getTargetDefines(const LangOptions &Opts,
1274                                MacroBuilder &Builder) const {
1275    Builder.defineMacro("__R600__");
1276  }
1277
1278  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1279    return TargetInfo::CharPtrBuiltinVaList;
1280  }
1281
1282};
1283
1284} // end anonymous namespace
1285
1286namespace {
1287// MBlaze abstract base class
1288class MBlazeTargetInfo : public TargetInfo {
1289  static const char * const GCCRegNames[];
1290  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1291
1292public:
1293  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1294    DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1295  }
1296
1297  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1298                                 unsigned &NumRecords) const {
1299    // FIXME: Implement.
1300    Records = 0;
1301    NumRecords = 0;
1302  }
1303
1304  virtual void getTargetDefines(const LangOptions &Opts,
1305                                MacroBuilder &Builder) const;
1306
1307  virtual bool hasFeature(StringRef Feature) const {
1308    return Feature == "mblaze";
1309  }
1310
1311  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1312    return TargetInfo::CharPtrBuiltinVaList;
1313  }
1314  virtual const char *getTargetPrefix() const {
1315    return "mblaze";
1316  }
1317  virtual void getGCCRegNames(const char * const *&Names,
1318                              unsigned &NumNames) const;
1319  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1320                                unsigned &NumAliases) const;
1321  virtual bool validateAsmConstraint(const char *&Name,
1322                                     TargetInfo::ConstraintInfo &Info) const {
1323    switch (*Name) {
1324    default: return false;
1325    case 'O': // Zero
1326      return true;
1327    case 'b': // Base register
1328    case 'f': // Floating point register
1329      Info.setAllowsRegister();
1330      return true;
1331    }
1332  }
1333  virtual const char *getClobbers() const {
1334    return "";
1335  }
1336};
1337
1338/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1339/// #defines that are not tied to a specific subtarget.
1340void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1341                                     MacroBuilder &Builder) const {
1342  // Target identification.
1343  Builder.defineMacro("__microblaze__");
1344  Builder.defineMacro("_ARCH_MICROBLAZE");
1345  Builder.defineMacro("__MICROBLAZE__");
1346
1347  // Target properties.
1348  Builder.defineMacro("_BIG_ENDIAN");
1349  Builder.defineMacro("__BIG_ENDIAN__");
1350
1351  // Subtarget options.
1352  Builder.defineMacro("__REGISTER_PREFIX__", "");
1353}
1354
1355
1356const char * const MBlazeTargetInfo::GCCRegNames[] = {
1357  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
1358  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
1359  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
1360  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
1361  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
1362  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1363  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1364  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1365  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1366  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
1367};
1368
1369void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1370                                   unsigned &NumNames) const {
1371  Names = GCCRegNames;
1372  NumNames = llvm::array_lengthof(GCCRegNames);
1373}
1374
1375const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1376  { {"f0"},  "r0" },
1377  { {"f1"},  "r1" },
1378  { {"f2"},  "r2" },
1379  { {"f3"},  "r3" },
1380  { {"f4"},  "r4" },
1381  { {"f5"},  "r5" },
1382  { {"f6"},  "r6" },
1383  { {"f7"},  "r7" },
1384  { {"f8"},  "r8" },
1385  { {"f9"},  "r9" },
1386  { {"f10"}, "r10" },
1387  { {"f11"}, "r11" },
1388  { {"f12"}, "r12" },
1389  { {"f13"}, "r13" },
1390  { {"f14"}, "r14" },
1391  { {"f15"}, "r15" },
1392  { {"f16"}, "r16" },
1393  { {"f17"}, "r17" },
1394  { {"f18"}, "r18" },
1395  { {"f19"}, "r19" },
1396  { {"f20"}, "r20" },
1397  { {"f21"}, "r21" },
1398  { {"f22"}, "r22" },
1399  { {"f23"}, "r23" },
1400  { {"f24"}, "r24" },
1401  { {"f25"}, "r25" },
1402  { {"f26"}, "r26" },
1403  { {"f27"}, "r27" },
1404  { {"f28"}, "r28" },
1405  { {"f29"}, "r29" },
1406  { {"f30"}, "r30" },
1407  { {"f31"}, "r31" },
1408};
1409
1410void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1411                                     unsigned &NumAliases) const {
1412  Aliases = GCCRegAliases;
1413  NumAliases = llvm::array_lengthof(GCCRegAliases);
1414}
1415} // end anonymous namespace.
1416
1417namespace {
1418// Namespace for x86 abstract base class
1419const Builtin::Info BuiltinInfo[] = {
1420#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1421#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1422                                              ALL_LANGUAGES },
1423#include "clang/Basic/BuiltinsX86.def"
1424};
1425
1426static const char* const GCCRegNames[] = {
1427  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1428  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1429  "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1430  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1431  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1432  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1433  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1434  "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1435  "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1436};
1437
1438const TargetInfo::AddlRegName AddlRegNames[] = {
1439  { { "al", "ah", "eax", "rax" }, 0 },
1440  { { "bl", "bh", "ebx", "rbx" }, 3 },
1441  { { "cl", "ch", "ecx", "rcx" }, 2 },
1442  { { "dl", "dh", "edx", "rdx" }, 1 },
1443  { { "esi", "rsi" }, 4 },
1444  { { "edi", "rdi" }, 5 },
1445  { { "esp", "rsp" }, 7 },
1446  { { "ebp", "rbp" }, 6 },
1447};
1448
1449// X86 target abstract base class; x86-32 and x86-64 are very close, so
1450// most of the implementation can be shared.
1451class X86TargetInfo : public TargetInfo {
1452  enum X86SSEEnum {
1453    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1454  } SSELevel;
1455  enum MMX3DNowEnum {
1456    NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1457  } MMX3DNowLevel;
1458
1459  bool HasAES;
1460  bool HasPCLMUL;
1461  bool HasLZCNT;
1462  bool HasRDRND;
1463  bool HasBMI;
1464  bool HasBMI2;
1465  bool HasPOPCNT;
1466  bool HasSSE4a;
1467  bool HasFMA4;
1468  bool HasFMA;
1469  bool HasXOP;
1470  bool HasF16C;
1471
1472  /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1473  ///
1474  /// Each enumeration represents a particular CPU supported by Clang. These
1475  /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1476  enum CPUKind {
1477    CK_Generic,
1478
1479    /// \name i386
1480    /// i386-generation processors.
1481    //@{
1482    CK_i386,
1483    //@}
1484
1485    /// \name i486
1486    /// i486-generation processors.
1487    //@{
1488    CK_i486,
1489    CK_WinChipC6,
1490    CK_WinChip2,
1491    CK_C3,
1492    //@}
1493
1494    /// \name i586
1495    /// i586-generation processors, P5 microarchitecture based.
1496    //@{
1497    CK_i586,
1498    CK_Pentium,
1499    CK_PentiumMMX,
1500    //@}
1501
1502    /// \name i686
1503    /// i686-generation processors, P6 / Pentium M microarchitecture based.
1504    //@{
1505    CK_i686,
1506    CK_PentiumPro,
1507    CK_Pentium2,
1508    CK_Pentium3,
1509    CK_Pentium3M,
1510    CK_PentiumM,
1511    CK_C3_2,
1512
1513    /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1514    /// Clang however has some logic to suport this.
1515    // FIXME: Warn, deprecate, and potentially remove this.
1516    CK_Yonah,
1517    //@}
1518
1519    /// \name Netburst
1520    /// Netburst microarchitecture based processors.
1521    //@{
1522    CK_Pentium4,
1523    CK_Pentium4M,
1524    CK_Prescott,
1525    CK_Nocona,
1526    //@}
1527
1528    /// \name Core
1529    /// Core microarchitecture based processors.
1530    //@{
1531    CK_Core2,
1532
1533    /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1534    /// codename which GCC no longer accepts as an option to -march, but Clang
1535    /// has some logic for recognizing it.
1536    // FIXME: Warn, deprecate, and potentially remove this.
1537    CK_Penryn,
1538    //@}
1539
1540    /// \name Atom
1541    /// Atom processors
1542    //@{
1543    CK_Atom,
1544    //@}
1545
1546    /// \name Nehalem
1547    /// Nehalem microarchitecture based processors.
1548    //@{
1549    CK_Corei7,
1550    CK_Corei7AVX,
1551    CK_CoreAVXi,
1552    CK_CoreAVX2,
1553    //@}
1554
1555    /// \name K6
1556    /// K6 architecture processors.
1557    //@{
1558    CK_K6,
1559    CK_K6_2,
1560    CK_K6_3,
1561    //@}
1562
1563    /// \name K7
1564    /// K7 architecture processors.
1565    //@{
1566    CK_Athlon,
1567    CK_AthlonThunderbird,
1568    CK_Athlon4,
1569    CK_AthlonXP,
1570    CK_AthlonMP,
1571    //@}
1572
1573    /// \name K8
1574    /// K8 architecture processors.
1575    //@{
1576    CK_Athlon64,
1577    CK_Athlon64SSE3,
1578    CK_AthlonFX,
1579    CK_K8,
1580    CK_K8SSE3,
1581    CK_Opteron,
1582    CK_OpteronSSE3,
1583    CK_AMDFAM10,
1584    //@}
1585
1586    /// \name Bobcat
1587    /// Bobcat architecture processors.
1588    //@{
1589    CK_BTVER1,
1590    //@}
1591
1592    /// \name Bulldozer
1593    /// Bulldozer architecture processors.
1594    //@{
1595    CK_BDVER1,
1596    CK_BDVER2,
1597    //@}
1598
1599    /// This specification is deprecated and will be removed in the future.
1600    /// Users should prefer \see CK_K8.
1601    // FIXME: Warn on this when the CPU is set to it.
1602    CK_x86_64,
1603    //@}
1604
1605    /// \name Geode
1606    /// Geode processors.
1607    //@{
1608    CK_Geode
1609    //@}
1610  } CPU;
1611
1612public:
1613  X86TargetInfo(const std::string& triple)
1614    : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1615      HasAES(false), HasPCLMUL(false), HasLZCNT(false), HasRDRND(false),
1616      HasBMI(false), HasBMI2(false), HasPOPCNT(false), HasSSE4a(false),
1617      HasFMA4(false), HasFMA(false), HasXOP(false), HasF16C(false),
1618      CPU(CK_Generic) {
1619    BigEndian = false;
1620    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1621  }
1622  virtual unsigned getFloatEvalMethod() const {
1623    // X87 evaluates with 80 bits "long double" precision.
1624    return SSELevel == NoSSE ? 2 : 0;
1625  }
1626  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1627                                 unsigned &NumRecords) const {
1628    Records = BuiltinInfo;
1629    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1630  }
1631  virtual void getGCCRegNames(const char * const *&Names,
1632                              unsigned &NumNames) const {
1633    Names = GCCRegNames;
1634    NumNames = llvm::array_lengthof(GCCRegNames);
1635  }
1636  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1637                                unsigned &NumAliases) const {
1638    Aliases = 0;
1639    NumAliases = 0;
1640  }
1641  virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1642				  unsigned &NumNames) const {
1643    Names = AddlRegNames;
1644    NumNames = llvm::array_lengthof(AddlRegNames);
1645  }
1646  virtual bool validateAsmConstraint(const char *&Name,
1647                                     TargetInfo::ConstraintInfo &info) const;
1648  virtual std::string convertConstraint(const char *&Constraint) const;
1649  virtual const char *getClobbers() const {
1650    return "~{dirflag},~{fpsr},~{flags}";
1651  }
1652  virtual void getTargetDefines(const LangOptions &Opts,
1653                                MacroBuilder &Builder) const;
1654  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1655                                 StringRef Name,
1656                                 bool Enabled) const;
1657  virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1658  virtual bool hasFeature(StringRef Feature) const;
1659  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1660  virtual const char* getABI() const {
1661    if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
1662      return "avx";
1663    else if (getTriple().getArch() == llvm::Triple::x86 &&
1664             MMX3DNowLevel == NoMMX3DNow)
1665      return "no-mmx";
1666    return "";
1667  }
1668  virtual bool setCPU(const std::string &Name) {
1669    CPU = llvm::StringSwitch<CPUKind>(Name)
1670      .Case("i386", CK_i386)
1671      .Case("i486", CK_i486)
1672      .Case("winchip-c6", CK_WinChipC6)
1673      .Case("winchip2", CK_WinChip2)
1674      .Case("c3", CK_C3)
1675      .Case("i586", CK_i586)
1676      .Case("pentium", CK_Pentium)
1677      .Case("pentium-mmx", CK_PentiumMMX)
1678      .Case("i686", CK_i686)
1679      .Case("pentiumpro", CK_PentiumPro)
1680      .Case("pentium2", CK_Pentium2)
1681      .Case("pentium3", CK_Pentium3)
1682      .Case("pentium3m", CK_Pentium3M)
1683      .Case("pentium-m", CK_PentiumM)
1684      .Case("c3-2", CK_C3_2)
1685      .Case("yonah", CK_Yonah)
1686      .Case("pentium4", CK_Pentium4)
1687      .Case("pentium4m", CK_Pentium4M)
1688      .Case("prescott", CK_Prescott)
1689      .Case("nocona", CK_Nocona)
1690      .Case("core2", CK_Core2)
1691      .Case("penryn", CK_Penryn)
1692      .Case("atom", CK_Atom)
1693      .Case("corei7", CK_Corei7)
1694      .Case("corei7-avx", CK_Corei7AVX)
1695      .Case("core-avx-i", CK_CoreAVXi)
1696      .Case("core-avx2", CK_CoreAVX2)
1697      .Case("k6", CK_K6)
1698      .Case("k6-2", CK_K6_2)
1699      .Case("k6-3", CK_K6_3)
1700      .Case("athlon", CK_Athlon)
1701      .Case("athlon-tbird", CK_AthlonThunderbird)
1702      .Case("athlon-4", CK_Athlon4)
1703      .Case("athlon-xp", CK_AthlonXP)
1704      .Case("athlon-mp", CK_AthlonMP)
1705      .Case("athlon64", CK_Athlon64)
1706      .Case("athlon64-sse3", CK_Athlon64SSE3)
1707      .Case("athlon-fx", CK_AthlonFX)
1708      .Case("k8", CK_K8)
1709      .Case("k8-sse3", CK_K8SSE3)
1710      .Case("opteron", CK_Opteron)
1711      .Case("opteron-sse3", CK_OpteronSSE3)
1712      .Case("amdfam10", CK_AMDFAM10)
1713      .Case("btver1", CK_BTVER1)
1714      .Case("bdver1", CK_BDVER1)
1715      .Case("bdver2", CK_BDVER2)
1716      .Case("x86-64", CK_x86_64)
1717      .Case("geode", CK_Geode)
1718      .Default(CK_Generic);
1719
1720    // Perform any per-CPU checks necessary to determine if this CPU is
1721    // acceptable.
1722    // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1723    // invalid without explaining *why*.
1724    switch (CPU) {
1725    case CK_Generic:
1726      // No processor selected!
1727      return false;
1728
1729    case CK_i386:
1730    case CK_i486:
1731    case CK_WinChipC6:
1732    case CK_WinChip2:
1733    case CK_C3:
1734    case CK_i586:
1735    case CK_Pentium:
1736    case CK_PentiumMMX:
1737    case CK_i686:
1738    case CK_PentiumPro:
1739    case CK_Pentium2:
1740    case CK_Pentium3:
1741    case CK_Pentium3M:
1742    case CK_PentiumM:
1743    case CK_Yonah:
1744    case CK_C3_2:
1745    case CK_Pentium4:
1746    case CK_Pentium4M:
1747    case CK_Prescott:
1748    case CK_K6:
1749    case CK_K6_2:
1750    case CK_K6_3:
1751    case CK_Athlon:
1752    case CK_AthlonThunderbird:
1753    case CK_Athlon4:
1754    case CK_AthlonXP:
1755    case CK_AthlonMP:
1756    case CK_Geode:
1757      // Only accept certain architectures when compiling in 32-bit mode.
1758      if (getTriple().getArch() != llvm::Triple::x86)
1759        return false;
1760
1761      // Fallthrough
1762    case CK_Nocona:
1763    case CK_Core2:
1764    case CK_Penryn:
1765    case CK_Atom:
1766    case CK_Corei7:
1767    case CK_Corei7AVX:
1768    case CK_CoreAVXi:
1769    case CK_CoreAVX2:
1770    case CK_Athlon64:
1771    case CK_Athlon64SSE3:
1772    case CK_AthlonFX:
1773    case CK_K8:
1774    case CK_K8SSE3:
1775    case CK_Opteron:
1776    case CK_OpteronSSE3:
1777    case CK_AMDFAM10:
1778    case CK_BTVER1:
1779    case CK_BDVER1:
1780    case CK_BDVER2:
1781    case CK_x86_64:
1782      return true;
1783    }
1784    llvm_unreachable("Unhandled CPU kind");
1785  }
1786
1787  virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
1788    // We accept all non-ARM calling conventions
1789    return (CC == CC_X86ThisCall ||
1790            CC == CC_X86FastCall ||
1791            CC == CC_X86StdCall ||
1792            CC == CC_C ||
1793            CC == CC_X86Pascal) ? CCCR_OK : CCCR_Warning;
1794  }
1795
1796  virtual CallingConv getDefaultCallingConv() const {
1797    return CC_C;
1798  }
1799};
1800
1801void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1802  // FIXME: This should not be here.
1803  Features["3dnow"] = false;
1804  Features["3dnowa"] = false;
1805  Features["mmx"] = false;
1806  Features["sse"] = false;
1807  Features["sse2"] = false;
1808  Features["sse3"] = false;
1809  Features["ssse3"] = false;
1810  Features["sse41"] = false;
1811  Features["sse42"] = false;
1812  Features["sse4a"] = false;
1813  Features["aes"] = false;
1814  Features["pclmul"] = false;
1815  Features["avx"] = false;
1816  Features["avx2"] = false;
1817  Features["lzcnt"] = false;
1818  Features["rdrand"] = false;
1819  Features["bmi"] = false;
1820  Features["bmi2"] = false;
1821  Features["popcnt"] = false;
1822  Features["fma4"] = false;
1823  Features["fma"] = false;
1824  Features["xop"] = false;
1825  Features["f16c"] = false;
1826
1827  // FIXME: This *really* should not be here.
1828
1829  // X86_64 always has SSE2.
1830  if (getTriple().getArch() == llvm::Triple::x86_64)
1831    Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1832
1833  switch (CPU) {
1834  case CK_Generic:
1835  case CK_i386:
1836  case CK_i486:
1837  case CK_i586:
1838  case CK_Pentium:
1839  case CK_i686:
1840  case CK_PentiumPro:
1841    break;
1842  case CK_PentiumMMX:
1843  case CK_Pentium2:
1844    setFeatureEnabled(Features, "mmx", true);
1845    break;
1846  case CK_Pentium3:
1847  case CK_Pentium3M:
1848    setFeatureEnabled(Features, "mmx", true);
1849    setFeatureEnabled(Features, "sse", true);
1850    break;
1851  case CK_PentiumM:
1852  case CK_Pentium4:
1853  case CK_Pentium4M:
1854  case CK_x86_64:
1855    setFeatureEnabled(Features, "mmx", true);
1856    setFeatureEnabled(Features, "sse2", true);
1857    break;
1858  case CK_Yonah:
1859  case CK_Prescott:
1860  case CK_Nocona:
1861    setFeatureEnabled(Features, "mmx", true);
1862    setFeatureEnabled(Features, "sse3", true);
1863    break;
1864  case CK_Core2:
1865    setFeatureEnabled(Features, "mmx", true);
1866    setFeatureEnabled(Features, "ssse3", true);
1867    break;
1868  case CK_Penryn:
1869    setFeatureEnabled(Features, "mmx", true);
1870    setFeatureEnabled(Features, "sse4.1", true);
1871    break;
1872  case CK_Atom:
1873    setFeatureEnabled(Features, "mmx", true);
1874    setFeatureEnabled(Features, "ssse3", true);
1875    break;
1876  case CK_Corei7:
1877    setFeatureEnabled(Features, "mmx", true);
1878    setFeatureEnabled(Features, "sse4", true);
1879    break;
1880  case CK_Corei7AVX:
1881    setFeatureEnabled(Features, "mmx", true);
1882    setFeatureEnabled(Features, "avx", true);
1883    setFeatureEnabled(Features, "aes", true);
1884    setFeatureEnabled(Features, "pclmul", true);
1885    break;
1886  case CK_CoreAVXi:
1887    setFeatureEnabled(Features, "mmx", true);
1888    setFeatureEnabled(Features, "avx", true);
1889    setFeatureEnabled(Features, "aes", true);
1890    setFeatureEnabled(Features, "pclmul", true);
1891    setFeatureEnabled(Features, "rdrnd", true);
1892    break;
1893  case CK_CoreAVX2:
1894    setFeatureEnabled(Features, "mmx", true);
1895    setFeatureEnabled(Features, "avx2", true);
1896    setFeatureEnabled(Features, "aes", true);
1897    setFeatureEnabled(Features, "pclmul", true);
1898    setFeatureEnabled(Features, "lzcnt", true);
1899    setFeatureEnabled(Features, "rdrnd", true);
1900    setFeatureEnabled(Features, "bmi", true);
1901    setFeatureEnabled(Features, "bmi2", true);
1902    setFeatureEnabled(Features, "fma", true);
1903    break;
1904  case CK_K6:
1905  case CK_WinChipC6:
1906    setFeatureEnabled(Features, "mmx", true);
1907    break;
1908  case CK_K6_2:
1909  case CK_K6_3:
1910  case CK_WinChip2:
1911  case CK_C3:
1912    setFeatureEnabled(Features, "3dnow", true);
1913    break;
1914  case CK_Athlon:
1915  case CK_AthlonThunderbird:
1916  case CK_Geode:
1917    setFeatureEnabled(Features, "3dnowa", true);
1918    break;
1919  case CK_Athlon4:
1920  case CK_AthlonXP:
1921  case CK_AthlonMP:
1922    setFeatureEnabled(Features, "sse", true);
1923    setFeatureEnabled(Features, "3dnowa", true);
1924    break;
1925  case CK_K8:
1926  case CK_Opteron:
1927  case CK_Athlon64:
1928  case CK_AthlonFX:
1929    setFeatureEnabled(Features, "sse2", true);
1930    setFeatureEnabled(Features, "3dnowa", true);
1931    break;
1932  case CK_K8SSE3:
1933  case CK_OpteronSSE3:
1934  case CK_Athlon64SSE3:
1935    setFeatureEnabled(Features, "sse3", true);
1936    setFeatureEnabled(Features, "3dnowa", true);
1937    break;
1938  case CK_AMDFAM10:
1939    setFeatureEnabled(Features, "sse3", true);
1940    setFeatureEnabled(Features, "sse4a", true);
1941    setFeatureEnabled(Features, "3dnowa", true);
1942    break;
1943  case CK_BTVER1:
1944    setFeatureEnabled(Features, "ssse3", true);
1945    setFeatureEnabled(Features, "sse4a", true);
1946    break;
1947  case CK_BDVER1:
1948  case CK_BDVER2:
1949    setFeatureEnabled(Features, "avx", true);
1950    setFeatureEnabled(Features, "xop", true);
1951    setFeatureEnabled(Features, "aes", true);
1952    setFeatureEnabled(Features, "pclmul", true);
1953    break;
1954  case CK_C3_2:
1955    setFeatureEnabled(Features, "mmx", true);
1956    setFeatureEnabled(Features, "sse", true);
1957    break;
1958  }
1959}
1960
1961bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1962                                      StringRef Name,
1963                                      bool Enabled) const {
1964  // FIXME: This *really* should not be here.  We need some way of translating
1965  // options into llvm subtarget features.
1966  if (!Features.count(Name) &&
1967      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1" &&
1968       Name != "rdrnd"))
1969    return false;
1970
1971  // FIXME: this should probably use a switch with fall through.
1972
1973  if (Enabled) {
1974    if (Name == "mmx")
1975      Features["mmx"] = true;
1976    else if (Name == "sse")
1977      Features["mmx"] = Features["sse"] = true;
1978    else if (Name == "sse2")
1979      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1980    else if (Name == "sse3")
1981      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1982        true;
1983    else if (Name == "ssse3")
1984      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1985        Features["ssse3"] = true;
1986    else if (Name == "sse4" || Name == "sse4.2")
1987      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1988        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1989        Features["popcnt"] = true;
1990    else if (Name == "sse4.1")
1991      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1992        Features["ssse3"] = Features["sse41"] = true;
1993    else if (Name == "3dnow")
1994      Features["mmx"] = Features["3dnow"] = true;
1995    else if (Name == "3dnowa")
1996      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
1997    else if (Name == "aes")
1998      Features["sse"] = Features["sse2"] = Features["aes"] = true;
1999    else if (Name == "pclmul")
2000      Features["sse"] = Features["sse2"] = Features["pclmul"] = true;
2001    else if (Name == "avx")
2002      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2003        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2004        Features["popcnt"] = Features["avx"] = true;
2005    else if (Name == "avx2")
2006      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2007        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2008        Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
2009    else if (Name == "fma")
2010      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2011        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2012        Features["popcnt"] = Features["avx"] = Features["fma"] = true;
2013    else if (Name == "fma4")
2014        Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2015        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2016        Features["popcnt"] = Features["avx"] = Features["sse4a"] =
2017        Features["fma4"] = true;
2018    else if (Name == "xop")
2019        Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2020        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2021        Features["popcnt"] = Features["avx"] = Features["sse4a"] =
2022        Features["fma4"] = Features["xop"] = true;
2023    else if (Name == "sse4a")
2024      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2025        Features["sse4a"] = true;
2026    else if (Name == "lzcnt")
2027      Features["lzcnt"] = true;
2028    else if (Name == "rdrnd")
2029      Features["rdrand"] = true;
2030    else if (Name == "bmi")
2031      Features["bmi"] = true;
2032    else if (Name == "bmi2")
2033      Features["bmi2"] = true;
2034    else if (Name == "popcnt")
2035      Features["popcnt"] = true;
2036    else if (Name == "f16c")
2037      Features["f16c"] = true;
2038  } else {
2039    if (Name == "mmx")
2040      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
2041    else if (Name == "sse")
2042      Features["sse"] = Features["sse2"] = Features["sse3"] =
2043        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2044        Features["sse4a"] = Features["avx"] = Features["avx2"] =
2045        Features["fma"] = Features["fma4"] = Features["aes"] =
2046        Features["pclmul"] = Features["xop"] = false;
2047    else if (Name == "sse2")
2048      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
2049        Features["sse41"] = Features["sse42"] = Features["sse4a"] =
2050        Features["avx"] = Features["avx2"] = Features["fma"] =
2051        Features["fma4"] = Features["aes"] = Features["pclmul"] =
2052        Features["xop"] = false;
2053    else if (Name == "sse3")
2054      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
2055        Features["sse42"] = Features["sse4a"] = Features["avx"] =
2056        Features["avx2"] = Features["fma"] = Features["fma4"] =
2057        Features["xop"] = false;
2058    else if (Name == "ssse3")
2059      Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2060        Features["avx"] = Features["avx2"] = Features["fma"] = false;
2061    else if (Name == "sse4" || Name == "sse4.1")
2062      Features["sse41"] = Features["sse42"] = Features["avx"] =
2063        Features["avx2"] = Features["fma"] = false;
2064    else if (Name == "sse4.2")
2065      Features["sse42"] = Features["avx"] = Features["avx2"] =
2066        Features["fma"] = false;
2067    else if (Name == "3dnow")
2068      Features["3dnow"] = Features["3dnowa"] = false;
2069    else if (Name == "3dnowa")
2070      Features["3dnowa"] = false;
2071    else if (Name == "aes")
2072      Features["aes"] = false;
2073    else if (Name == "pclmul")
2074      Features["pclmul"] = false;
2075    else if (Name == "avx")
2076      Features["avx"] = Features["avx2"] = Features["fma"] =
2077        Features["fma4"] = Features["xop"] = false;
2078    else if (Name == "avx2")
2079      Features["avx2"] = false;
2080    else if (Name == "fma")
2081      Features["fma"] = false;
2082    else if (Name == "sse4a")
2083      Features["sse4a"] = Features["fma4"] = Features["xop"] = false;
2084    else if (Name == "lzcnt")
2085      Features["lzcnt"] = false;
2086    else if (Name == "rdrnd")
2087      Features["rdrand"] = false;
2088    else if (Name == "bmi")
2089      Features["bmi"] = false;
2090    else if (Name == "bmi2")
2091      Features["bmi2"] = false;
2092    else if (Name == "popcnt")
2093      Features["popcnt"] = false;
2094    else if (Name == "fma4")
2095      Features["fma4"] = Features["xop"] = false;
2096    else if (Name == "xop")
2097      Features["xop"] = false;
2098    else if (Name == "f16c")
2099      Features["f16c"] = false;
2100  }
2101
2102  return true;
2103}
2104
2105/// HandleTargetOptions - Perform initialization based on the user
2106/// configured set of features.
2107void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
2108  // Remember the maximum enabled sselevel.
2109  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
2110    // Ignore disabled features.
2111    if (Features[i][0] == '-')
2112      continue;
2113
2114    StringRef Feature = StringRef(Features[i]).substr(1);
2115
2116    if (Feature == "aes") {
2117      HasAES = true;
2118      continue;
2119    }
2120
2121    if (Feature == "pclmul") {
2122      HasPCLMUL = true;
2123      continue;
2124    }
2125
2126    if (Feature == "lzcnt") {
2127      HasLZCNT = true;
2128      continue;
2129    }
2130
2131    if (Feature == "rdrand") {
2132      HasRDRND = true;
2133      continue;
2134    }
2135
2136    if (Feature == "bmi") {
2137      HasBMI = true;
2138      continue;
2139    }
2140
2141    if (Feature == "bmi2") {
2142      HasBMI2 = true;
2143      continue;
2144    }
2145
2146    if (Feature == "popcnt") {
2147      HasPOPCNT = true;
2148      continue;
2149    }
2150
2151    if (Feature == "sse4a") {
2152      HasSSE4a = true;
2153      continue;
2154    }
2155
2156    if (Feature == "fma4") {
2157      HasFMA4 = true;
2158      continue;
2159    }
2160
2161    if (Feature == "fma") {
2162      HasFMA = true;
2163      continue;
2164    }
2165
2166    if (Feature == "xop") {
2167      HasXOP = true;
2168      continue;
2169    }
2170
2171    if (Feature == "f16c") {
2172      HasF16C = true;
2173      continue;
2174    }
2175
2176    assert(Features[i][0] == '+' && "Invalid target feature!");
2177    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
2178      .Case("avx2", AVX2)
2179      .Case("avx", AVX)
2180      .Case("sse42", SSE42)
2181      .Case("sse41", SSE41)
2182      .Case("ssse3", SSSE3)
2183      .Case("sse3", SSE3)
2184      .Case("sse2", SSE2)
2185      .Case("sse", SSE1)
2186      .Default(NoSSE);
2187    SSELevel = std::max(SSELevel, Level);
2188
2189    MMX3DNowEnum ThreeDNowLevel =
2190      llvm::StringSwitch<MMX3DNowEnum>(Feature)
2191        .Case("3dnowa", AMD3DNowAthlon)
2192        .Case("3dnow", AMD3DNow)
2193        .Case("mmx", MMX)
2194        .Default(NoMMX3DNow);
2195
2196    MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
2197  }
2198
2199  // Don't tell the backend if we're turning off mmx; it will end up disabling
2200  // SSE, which we don't want.
2201  std::vector<std::string>::iterator it;
2202  it = std::find(Features.begin(), Features.end(), "-mmx");
2203  if (it != Features.end())
2204    Features.erase(it);
2205}
2206
2207/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
2208/// definitions for this particular subtarget.
2209void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
2210                                     MacroBuilder &Builder) const {
2211  // Target identification.
2212  if (getTriple().getArch() == llvm::Triple::x86_64) {
2213    Builder.defineMacro("__amd64__");
2214    Builder.defineMacro("__amd64");
2215    Builder.defineMacro("__x86_64");
2216    Builder.defineMacro("__x86_64__");
2217  } else {
2218    DefineStd(Builder, "i386", Opts);
2219  }
2220
2221  // Subtarget options.
2222  // FIXME: We are hard-coding the tune parameters based on the CPU, but they
2223  // truly should be based on -mtune options.
2224  switch (CPU) {
2225  case CK_Generic:
2226    break;
2227  case CK_i386:
2228    // The rest are coming from the i386 define above.
2229    Builder.defineMacro("__tune_i386__");
2230    break;
2231  case CK_i486:
2232  case CK_WinChipC6:
2233  case CK_WinChip2:
2234  case CK_C3:
2235    defineCPUMacros(Builder, "i486");
2236    break;
2237  case CK_PentiumMMX:
2238    Builder.defineMacro("__pentium_mmx__");
2239    Builder.defineMacro("__tune_pentium_mmx__");
2240    // Fallthrough
2241  case CK_i586:
2242  case CK_Pentium:
2243    defineCPUMacros(Builder, "i586");
2244    defineCPUMacros(Builder, "pentium");
2245    break;
2246  case CK_Pentium3:
2247  case CK_Pentium3M:
2248  case CK_PentiumM:
2249    Builder.defineMacro("__tune_pentium3__");
2250    // Fallthrough
2251  case CK_Pentium2:
2252  case CK_C3_2:
2253    Builder.defineMacro("__tune_pentium2__");
2254    // Fallthrough
2255  case CK_PentiumPro:
2256    Builder.defineMacro("__tune_i686__");
2257    Builder.defineMacro("__tune_pentiumpro__");
2258    // Fallthrough
2259  case CK_i686:
2260    Builder.defineMacro("__i686");
2261    Builder.defineMacro("__i686__");
2262    // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
2263    Builder.defineMacro("__pentiumpro");
2264    Builder.defineMacro("__pentiumpro__");
2265    break;
2266  case CK_Pentium4:
2267  case CK_Pentium4M:
2268    defineCPUMacros(Builder, "pentium4");
2269    break;
2270  case CK_Yonah:
2271  case CK_Prescott:
2272  case CK_Nocona:
2273    defineCPUMacros(Builder, "nocona");
2274    break;
2275  case CK_Core2:
2276  case CK_Penryn:
2277    defineCPUMacros(Builder, "core2");
2278    break;
2279  case CK_Atom:
2280    defineCPUMacros(Builder, "atom");
2281    break;
2282  case CK_Corei7:
2283  case CK_Corei7AVX:
2284  case CK_CoreAVXi:
2285  case CK_CoreAVX2:
2286    defineCPUMacros(Builder, "corei7");
2287    break;
2288  case CK_K6_2:
2289    Builder.defineMacro("__k6_2__");
2290    Builder.defineMacro("__tune_k6_2__");
2291    // Fallthrough
2292  case CK_K6_3:
2293    if (CPU != CK_K6_2) {  // In case of fallthrough
2294      // FIXME: GCC may be enabling these in cases where some other k6
2295      // architecture is specified but -m3dnow is explicitly provided. The
2296      // exact semantics need to be determined and emulated here.
2297      Builder.defineMacro("__k6_3__");
2298      Builder.defineMacro("__tune_k6_3__");
2299    }
2300    // Fallthrough
2301  case CK_K6:
2302    defineCPUMacros(Builder, "k6");
2303    break;
2304  case CK_Athlon:
2305  case CK_AthlonThunderbird:
2306  case CK_Athlon4:
2307  case CK_AthlonXP:
2308  case CK_AthlonMP:
2309    defineCPUMacros(Builder, "athlon");
2310    if (SSELevel != NoSSE) {
2311      Builder.defineMacro("__athlon_sse__");
2312      Builder.defineMacro("__tune_athlon_sse__");
2313    }
2314    break;
2315  case CK_K8:
2316  case CK_K8SSE3:
2317  case CK_x86_64:
2318  case CK_Opteron:
2319  case CK_OpteronSSE3:
2320  case CK_Athlon64:
2321  case CK_Athlon64SSE3:
2322  case CK_AthlonFX:
2323    defineCPUMacros(Builder, "k8");
2324    break;
2325  case CK_AMDFAM10:
2326    defineCPUMacros(Builder, "amdfam10");
2327    break;
2328  case CK_BTVER1:
2329    defineCPUMacros(Builder, "btver1");
2330    break;
2331  case CK_BDVER1:
2332    defineCPUMacros(Builder, "bdver1");
2333    break;
2334  case CK_BDVER2:
2335    defineCPUMacros(Builder, "bdver2");
2336    break;
2337  case CK_Geode:
2338    defineCPUMacros(Builder, "geode");
2339    break;
2340  }
2341
2342  // Target properties.
2343  Builder.defineMacro("__LITTLE_ENDIAN__");
2344  Builder.defineMacro("__REGISTER_PREFIX__", "");
2345
2346  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
2347  // functions in glibc header files that use FP Stack inline asm which the
2348  // backend can't deal with (PR879).
2349  Builder.defineMacro("__NO_MATH_INLINES");
2350
2351  if (HasAES)
2352    Builder.defineMacro("__AES__");
2353
2354  if (HasPCLMUL)
2355    Builder.defineMacro("__PCLMUL__");
2356
2357  if (HasLZCNT)
2358    Builder.defineMacro("__LZCNT__");
2359
2360  if (HasRDRND)
2361    Builder.defineMacro("__RDRND__");
2362
2363  if (HasBMI)
2364    Builder.defineMacro("__BMI__");
2365
2366  if (HasBMI2)
2367    Builder.defineMacro("__BMI2__");
2368
2369  if (HasPOPCNT)
2370    Builder.defineMacro("__POPCNT__");
2371
2372  if (HasSSE4a)
2373    Builder.defineMacro("__SSE4A__");
2374
2375  if (HasFMA4)
2376    Builder.defineMacro("__FMA4__");
2377
2378  if (HasFMA)
2379    Builder.defineMacro("__FMA__");
2380
2381  if (HasXOP)
2382    Builder.defineMacro("__XOP__");
2383
2384  if (HasF16C)
2385    Builder.defineMacro("__F16C__");
2386
2387  // Each case falls through to the previous one here.
2388  switch (SSELevel) {
2389  case AVX2:
2390    Builder.defineMacro("__AVX2__");
2391  case AVX:
2392    Builder.defineMacro("__AVX__");
2393  case SSE42:
2394    Builder.defineMacro("__SSE4_2__");
2395  case SSE41:
2396    Builder.defineMacro("__SSE4_1__");
2397  case SSSE3:
2398    Builder.defineMacro("__SSSE3__");
2399  case SSE3:
2400    Builder.defineMacro("__SSE3__");
2401  case SSE2:
2402    Builder.defineMacro("__SSE2__");
2403    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
2404  case SSE1:
2405    Builder.defineMacro("__SSE__");
2406    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
2407  case NoSSE:
2408    break;
2409  }
2410
2411  if (Opts.MicrosoftExt && getTriple().getArch() == llvm::Triple::x86) {
2412    switch (SSELevel) {
2413    case AVX2:
2414    case AVX:
2415    case SSE42:
2416    case SSE41:
2417    case SSSE3:
2418    case SSE3:
2419    case SSE2:
2420      Builder.defineMacro("_M_IX86_FP", Twine(2));
2421      break;
2422    case SSE1:
2423      Builder.defineMacro("_M_IX86_FP", Twine(1));
2424      break;
2425    default:
2426      Builder.defineMacro("_M_IX86_FP", Twine(0));
2427    }
2428  }
2429
2430  // Each case falls through to the previous one here.
2431  switch (MMX3DNowLevel) {
2432  case AMD3DNowAthlon:
2433    Builder.defineMacro("__3dNOW_A__");
2434  case AMD3DNow:
2435    Builder.defineMacro("__3dNOW__");
2436  case MMX:
2437    Builder.defineMacro("__MMX__");
2438  case NoMMX3DNow:
2439    break;
2440  }
2441}
2442
2443bool X86TargetInfo::hasFeature(StringRef Feature) const {
2444  return llvm::StringSwitch<bool>(Feature)
2445      .Case("aes", HasAES)
2446      .Case("avx", SSELevel >= AVX)
2447      .Case("avx2", SSELevel >= AVX2)
2448      .Case("bmi", HasBMI)
2449      .Case("bmi2", HasBMI2)
2450      .Case("fma", HasFMA)
2451      .Case("fma4", HasFMA4)
2452      .Case("lzcnt", HasLZCNT)
2453      .Case("rdrnd", HasRDRND)
2454      .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
2455      .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
2456      .Case("mmx", MMX3DNowLevel >= MMX)
2457      .Case("pclmul", HasPCLMUL)
2458      .Case("popcnt", HasPOPCNT)
2459      .Case("sse", SSELevel >= SSE1)
2460      .Case("sse2", SSELevel >= SSE2)
2461      .Case("sse3", SSELevel >= SSE3)
2462      .Case("ssse3", SSELevel >= SSSE3)
2463      .Case("sse41", SSELevel >= SSE41)
2464      .Case("sse42", SSELevel >= SSE42)
2465      .Case("sse4a", HasSSE4a)
2466      .Case("x86", true)
2467      .Case("x86_32", getTriple().getArch() == llvm::Triple::x86)
2468      .Case("x86_64", getTriple().getArch() == llvm::Triple::x86_64)
2469      .Case("xop", HasXOP)
2470      .Case("f16c", HasF16C)
2471      .Default(false);
2472}
2473
2474bool
2475X86TargetInfo::validateAsmConstraint(const char *&Name,
2476                                     TargetInfo::ConstraintInfo &Info) const {
2477  switch (*Name) {
2478  default: return false;
2479  case 'Y': // first letter of a pair:
2480    switch (*(Name+1)) {
2481    default: return false;
2482    case '0':  // First SSE register.
2483    case 't':  // Any SSE register, when SSE2 is enabled.
2484    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
2485    case 'm':  // any MMX register, when inter-unit moves enabled.
2486      break;   // falls through to setAllowsRegister.
2487  }
2488  case 'a': // eax.
2489  case 'b': // ebx.
2490  case 'c': // ecx.
2491  case 'd': // edx.
2492  case 'S': // esi.
2493  case 'D': // edi.
2494  case 'A': // edx:eax.
2495  case 'f': // any x87 floating point stack register.
2496  case 't': // top of floating point stack.
2497  case 'u': // second from top of floating point stack.
2498  case 'q': // Any register accessible as [r]l: a, b, c, and d.
2499  case 'y': // Any MMX register.
2500  case 'x': // Any SSE register.
2501  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2502  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2503  case 'l': // "Index" registers: any general register that can be used as an
2504            // index in a base+index memory access.
2505    Info.setAllowsRegister();
2506    return true;
2507  case 'C': // SSE floating point constant.
2508  case 'G': // x87 floating point constant.
2509  case 'e': // 32-bit signed integer constant for use with zero-extending
2510            // x86_64 instructions.
2511  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2512            // x86_64 instructions.
2513    return true;
2514  }
2515}
2516
2517
2518std::string
2519X86TargetInfo::convertConstraint(const char *&Constraint) const {
2520  switch (*Constraint) {
2521  case 'a': return std::string("{ax}");
2522  case 'b': return std::string("{bx}");
2523  case 'c': return std::string("{cx}");
2524  case 'd': return std::string("{dx}");
2525  case 'S': return std::string("{si}");
2526  case 'D': return std::string("{di}");
2527  case 'p': // address
2528    return std::string("im");
2529  case 't': // top of floating point stack.
2530    return std::string("{st}");
2531  case 'u': // second from top of floating point stack.
2532    return std::string("{st(1)}"); // second from top of floating point stack.
2533  default:
2534    return std::string(1, *Constraint);
2535  }
2536}
2537} // end anonymous namespace
2538
2539namespace {
2540// X86-32 generic target
2541class X86_32TargetInfo : public X86TargetInfo {
2542public:
2543  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2544    DoubleAlign = LongLongAlign = 32;
2545    LongDoubleWidth = 96;
2546    LongDoubleAlign = 32;
2547    SuitableAlign = 128;
2548    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2549                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2550                        "a0:0:64-f80:32:32-n8:16:32-S128";
2551    SizeType = UnsignedInt;
2552    PtrDiffType = SignedInt;
2553    IntPtrType = SignedInt;
2554    RegParmMax = 3;
2555
2556    // Use fpret for all types.
2557    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2558                             (1 << TargetInfo::Double) |
2559                             (1 << TargetInfo::LongDouble));
2560
2561    // x86-32 has atomics up to 8 bytes
2562    // FIXME: Check that we actually have cmpxchg8b before setting
2563    // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2564    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2565  }
2566  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2567    return TargetInfo::CharPtrBuiltinVaList;
2568  }
2569
2570  int getEHDataRegisterNumber(unsigned RegNo) const {
2571    if (RegNo == 0) return 0;
2572    if (RegNo == 1) return 2;
2573    return -1;
2574  }
2575};
2576} // end anonymous namespace
2577
2578namespace {
2579class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2580public:
2581  NetBSDI386TargetInfo(const std::string &triple) :
2582    NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2583  }
2584
2585  virtual unsigned getFloatEvalMethod() const {
2586    // NetBSD defaults to "double" rounding
2587    return 1;
2588  }
2589};
2590} // end anonymous namespace
2591
2592namespace {
2593class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2594public:
2595  OpenBSDI386TargetInfo(const std::string& triple) :
2596    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2597    SizeType = UnsignedLong;
2598    IntPtrType = SignedLong;
2599    PtrDiffType = SignedLong;
2600  }
2601};
2602} // end anonymous namespace
2603
2604namespace {
2605class BitrigI386TargetInfo : public BitrigTargetInfo<X86_32TargetInfo> {
2606public:
2607  BitrigI386TargetInfo(const std::string& triple) :
2608    BitrigTargetInfo<X86_32TargetInfo>(triple) {
2609    SizeType = UnsignedLong;
2610    IntPtrType = SignedLong;
2611    PtrDiffType = SignedLong;
2612  }
2613};
2614} // end anonymous namespace
2615
2616namespace {
2617class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2618public:
2619  DarwinI386TargetInfo(const std::string& triple) :
2620    DarwinTargetInfo<X86_32TargetInfo>(triple) {
2621    LongDoubleWidth = 128;
2622    LongDoubleAlign = 128;
2623    SuitableAlign = 128;
2624    MaxVectorAlign = 256;
2625    SizeType = UnsignedLong;
2626    IntPtrType = SignedLong;
2627    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2628                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2629                        "a0:0:64-f80:128:128-n8:16:32-S128";
2630    HasAlignMac68kSupport = true;
2631  }
2632
2633};
2634} // end anonymous namespace
2635
2636namespace {
2637// x86-32 Windows target
2638class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2639public:
2640  WindowsX86_32TargetInfo(const std::string& triple)
2641    : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2642    TLSSupported = false;
2643    WCharType = UnsignedShort;
2644    DoubleAlign = LongLongAlign = 64;
2645    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2646                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2647                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2648  }
2649  virtual void getTargetDefines(const LangOptions &Opts,
2650                                MacroBuilder &Builder) const {
2651    WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2652  }
2653};
2654} // end anonymous namespace
2655
2656namespace {
2657
2658// x86-32 Windows Visual Studio target
2659class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2660public:
2661  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2662    : WindowsX86_32TargetInfo(triple) {
2663    LongDoubleWidth = LongDoubleAlign = 64;
2664    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2665  }
2666  virtual void getTargetDefines(const LangOptions &Opts,
2667                                MacroBuilder &Builder) const {
2668    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2669    WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2670    // The value of the following reflects processor type.
2671    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2672    // We lost the original triple, so we use the default.
2673    Builder.defineMacro("_M_IX86", "600");
2674  }
2675};
2676} // end anonymous namespace
2677
2678namespace {
2679// x86-32 MinGW target
2680class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2681public:
2682  MinGWX86_32TargetInfo(const std::string& triple)
2683    : WindowsX86_32TargetInfo(triple) {
2684  }
2685  virtual void getTargetDefines(const LangOptions &Opts,
2686                                MacroBuilder &Builder) const {
2687    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2688    DefineStd(Builder, "WIN32", Opts);
2689    DefineStd(Builder, "WINNT", Opts);
2690    Builder.defineMacro("_X86_");
2691    Builder.defineMacro("__MSVCRT__");
2692    Builder.defineMacro("__MINGW32__");
2693
2694    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2695    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2696    if (Opts.MicrosoftExt)
2697      // Provide "as-is" __declspec.
2698      Builder.defineMacro("__declspec", "__declspec");
2699    else
2700      // Provide alias of __attribute__ like mingw32-gcc.
2701      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2702  }
2703};
2704} // end anonymous namespace
2705
2706namespace {
2707// x86-32 Cygwin target
2708class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2709public:
2710  CygwinX86_32TargetInfo(const std::string& triple)
2711    : X86_32TargetInfo(triple) {
2712    TLSSupported = false;
2713    WCharType = UnsignedShort;
2714    DoubleAlign = LongLongAlign = 64;
2715    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2716                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2717                        "a0:0:64-f80:32:32-n8:16:32-S32";
2718  }
2719  virtual void getTargetDefines(const LangOptions &Opts,
2720                                MacroBuilder &Builder) const {
2721    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2722    Builder.defineMacro("__CYGWIN__");
2723    Builder.defineMacro("__CYGWIN32__");
2724    DefineStd(Builder, "unix", Opts);
2725    if (Opts.CPlusPlus)
2726      Builder.defineMacro("_GNU_SOURCE");
2727  }
2728};
2729} // end anonymous namespace
2730
2731namespace {
2732// x86-32 Haiku target
2733class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2734public:
2735  HaikuX86_32TargetInfo(const std::string& triple)
2736    : X86_32TargetInfo(triple) {
2737    SizeType = UnsignedLong;
2738    IntPtrType = SignedLong;
2739    PtrDiffType = SignedLong;
2740    this->UserLabelPrefix = "";
2741  }
2742  virtual void getTargetDefines(const LangOptions &Opts,
2743                                MacroBuilder &Builder) const {
2744    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2745    Builder.defineMacro("__INTEL__");
2746    Builder.defineMacro("__HAIKU__");
2747  }
2748};
2749} // end anonymous namespace
2750
2751// RTEMS Target
2752template<typename Target>
2753class RTEMSTargetInfo : public OSTargetInfo<Target> {
2754protected:
2755  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2756                            MacroBuilder &Builder) const {
2757    // RTEMS defines; list based off of gcc output
2758
2759    Builder.defineMacro("__rtems__");
2760    Builder.defineMacro("__ELF__");
2761  }
2762public:
2763  RTEMSTargetInfo(const std::string &triple)
2764    : OSTargetInfo<Target>(triple) {
2765      this->UserLabelPrefix = "";
2766
2767      llvm::Triple Triple(triple);
2768      switch (Triple.getArch()) {
2769        default:
2770        case llvm::Triple::x86:
2771          // this->MCountName = ".mcount";
2772          break;
2773        case llvm::Triple::mips:
2774        case llvm::Triple::mipsel:
2775        case llvm::Triple::ppc:
2776        case llvm::Triple::ppc64:
2777          // this->MCountName = "_mcount";
2778          break;
2779        case llvm::Triple::arm:
2780          // this->MCountName = "__mcount";
2781          break;
2782      }
2783
2784    }
2785};
2786
2787namespace {
2788// x86-32 RTEMS target
2789class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2790public:
2791  RTEMSX86_32TargetInfo(const std::string& triple)
2792    : X86_32TargetInfo(triple) {
2793    SizeType = UnsignedLong;
2794    IntPtrType = SignedLong;
2795    PtrDiffType = SignedLong;
2796    this->UserLabelPrefix = "";
2797  }
2798  virtual void getTargetDefines(const LangOptions &Opts,
2799                                MacroBuilder &Builder) const {
2800    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2801    Builder.defineMacro("__INTEL__");
2802    Builder.defineMacro("__rtems__");
2803  }
2804};
2805} // end anonymous namespace
2806
2807namespace {
2808// x86-64 generic target
2809class X86_64TargetInfo : public X86TargetInfo {
2810public:
2811  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2812    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2813    LongDoubleWidth = 128;
2814    LongDoubleAlign = 128;
2815    LargeArrayMinWidth = 128;
2816    LargeArrayAlign = 128;
2817    SuitableAlign = 128;
2818    IntMaxType = SignedLong;
2819    UIntMaxType = UnsignedLong;
2820    Int64Type = SignedLong;
2821    RegParmMax = 6;
2822
2823    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2824                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2825                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2826
2827    // Use fpret only for long double.
2828    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2829
2830    // Use fp2ret for _Complex long double.
2831    ComplexLongDoubleUsesFP2Ret = true;
2832
2833    // x86-64 has atomics up to 16 bytes.
2834    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2835    // on CPUs with cmpxchg16b
2836    MaxAtomicPromoteWidth = 128;
2837    MaxAtomicInlineWidth = 64;
2838  }
2839  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2840    return TargetInfo::X86_64ABIBuiltinVaList;
2841  }
2842
2843  int getEHDataRegisterNumber(unsigned RegNo) const {
2844    if (RegNo == 0) return 0;
2845    if (RegNo == 1) return 1;
2846    return -1;
2847  }
2848
2849  virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
2850    return TargetInfo::checkCallingConvention(CC);
2851  }
2852
2853  virtual CallingConv getDefaultCallingConv() const {
2854    return CC_Default;
2855  }
2856
2857};
2858} // end anonymous namespace
2859
2860namespace {
2861// x86-64 Windows target
2862class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2863public:
2864  WindowsX86_64TargetInfo(const std::string& triple)
2865    : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2866    TLSSupported = false;
2867    WCharType = UnsignedShort;
2868    LongWidth = LongAlign = 32;
2869    DoubleAlign = LongLongAlign = 64;
2870    IntMaxType = SignedLongLong;
2871    UIntMaxType = UnsignedLongLong;
2872    Int64Type = SignedLongLong;
2873    SizeType = UnsignedLongLong;
2874    PtrDiffType = SignedLongLong;
2875    IntPtrType = SignedLongLong;
2876    this->UserLabelPrefix = "";
2877  }
2878  virtual void getTargetDefines(const LangOptions &Opts,
2879                                MacroBuilder &Builder) const {
2880    WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2881    Builder.defineMacro("_WIN64");
2882  }
2883  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2884    return TargetInfo::CharPtrBuiltinVaList;
2885  }
2886};
2887} // end anonymous namespace
2888
2889namespace {
2890// x86-64 Windows Visual Studio target
2891class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2892public:
2893  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2894    : WindowsX86_64TargetInfo(triple) {
2895    LongDoubleWidth = LongDoubleAlign = 64;
2896    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2897  }
2898  virtual void getTargetDefines(const LangOptions &Opts,
2899                                MacroBuilder &Builder) const {
2900    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2901    WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2902    Builder.defineMacro("_M_X64");
2903    Builder.defineMacro("_M_AMD64");
2904  }
2905};
2906} // end anonymous namespace
2907
2908namespace {
2909// x86-64 MinGW target
2910class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2911public:
2912  MinGWX86_64TargetInfo(const std::string& triple)
2913    : WindowsX86_64TargetInfo(triple) {
2914  }
2915  virtual void getTargetDefines(const LangOptions &Opts,
2916                                MacroBuilder &Builder) const {
2917    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2918    DefineStd(Builder, "WIN64", Opts);
2919    Builder.defineMacro("__MSVCRT__");
2920    Builder.defineMacro("__MINGW32__");
2921    Builder.defineMacro("__MINGW64__");
2922
2923    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2924    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2925    if (Opts.MicrosoftExt)
2926      // Provide "as-is" __declspec.
2927      Builder.defineMacro("__declspec", "__declspec");
2928    else
2929      // Provide alias of __attribute__ like mingw32-gcc.
2930      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2931  }
2932};
2933} // end anonymous namespace
2934
2935namespace {
2936class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2937public:
2938  DarwinX86_64TargetInfo(const std::string& triple)
2939      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2940    Int64Type = SignedLongLong;
2941    MaxVectorAlign = 256;
2942  }
2943};
2944} // end anonymous namespace
2945
2946namespace {
2947class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2948public:
2949  OpenBSDX86_64TargetInfo(const std::string& triple)
2950      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2951    IntMaxType = SignedLongLong;
2952    UIntMaxType = UnsignedLongLong;
2953    Int64Type = SignedLongLong;
2954  }
2955};
2956} // end anonymous namespace
2957
2958namespace {
2959class BitrigX86_64TargetInfo : public BitrigTargetInfo<X86_64TargetInfo> {
2960public:
2961  BitrigX86_64TargetInfo(const std::string& triple)
2962      : BitrigTargetInfo<X86_64TargetInfo>(triple) {
2963     IntMaxType = SignedLongLong;
2964     UIntMaxType = UnsignedLongLong;
2965     Int64Type = SignedLongLong;
2966  }
2967};
2968} // end anonymous namespace
2969
2970namespace {
2971class ARMTargetInfo : public TargetInfo {
2972  // Possible FPU choices.
2973  enum FPUMode {
2974    VFP2FPU = (1 << 0),
2975    VFP3FPU = (1 << 1),
2976    VFP4FPU = (1 << 2),
2977    NeonFPU = (1 << 3)
2978  };
2979
2980  static bool FPUModeIsVFP(FPUMode Mode) {
2981    return Mode & (VFP2FPU | VFP3FPU | VFP4FPU | NeonFPU);
2982  }
2983
2984  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2985  static const char * const GCCRegNames[];
2986
2987  std::string ABI, CPU;
2988
2989  unsigned FPU : 4;
2990
2991  unsigned IsAAPCS : 1;
2992  unsigned IsThumb : 1;
2993
2994  // Initialized via features.
2995  unsigned SoftFloat : 1;
2996  unsigned SoftFloatABI : 1;
2997
2998  static const Builtin::Info BuiltinInfo[];
2999
3000public:
3001  ARMTargetInfo(const std::string &TripleStr)
3002    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s"), IsAAPCS(true)
3003  {
3004    BigEndian = false;
3005    SizeType = UnsignedInt;
3006    PtrDiffType = SignedInt;
3007    // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
3008    WCharType = UnsignedInt;
3009
3010    // {} in inline assembly are neon specifiers, not assembly variant
3011    // specifiers.
3012    NoAsmVariants = true;
3013
3014    // FIXME: Should we just treat this as a feature?
3015    IsThumb = getTriple().getArchName().startswith("thumb");
3016    if (IsThumb) {
3017      // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
3018      // so set preferred for small types to 32.
3019      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
3020                           "i64:64:64-f32:32:32-f64:64:64-"
3021                           "v64:64:64-v128:64:128-a0:0:32-n32-S64");
3022    } else {
3023      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3024                           "i64:64:64-f32:32:32-f64:64:64-"
3025                           "v64:64:64-v128:64:128-a0:0:64-n32-S64");
3026    }
3027
3028    // ARM targets default to using the ARM C++ ABI.
3029    CXXABI = CXXABI_ARM;
3030
3031    // ARM has atomics up to 8 bytes
3032    // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
3033    MaxAtomicPromoteWidth = 64;
3034
3035    // Do force alignment of members that follow zero length bitfields.  If
3036    // the alignment of the zero-length bitfield is greater than the member
3037    // that follows it, `bar', `bar' will be aligned as the  type of the
3038    // zero length bitfield.
3039    UseZeroLengthBitfieldAlignment = true;
3040  }
3041  virtual const char *getABI() const { return ABI.c_str(); }
3042  virtual bool setABI(const std::string &Name) {
3043    ABI = Name;
3044
3045    // The defaults (above) are for AAPCS, check if we need to change them.
3046    //
3047    // FIXME: We need support for -meabi... we could just mangle it into the
3048    // name.
3049    if (Name == "apcs-gnu") {
3050      DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
3051      SizeType = UnsignedLong;
3052
3053      // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
3054      WCharType = SignedInt;
3055
3056      // Do not respect the alignment of bit-field types when laying out
3057      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
3058      UseBitFieldTypeAlignment = false;
3059
3060      /// gcc forces the alignment to 4 bytes, regardless of the type of the
3061      /// zero length bitfield.  This corresponds to EMPTY_FIELD_BOUNDARY in
3062      /// gcc.
3063      ZeroLengthBitfieldBoundary = 32;
3064
3065      IsAAPCS = false;
3066
3067      if (IsThumb) {
3068        // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
3069        // so set preferred for small types to 32.
3070        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
3071                             "i64:32:64-f32:32:32-f64:32:64-"
3072                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
3073      } else {
3074        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3075                             "i64:32:64-f32:32:32-f64:32:64-"
3076                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
3077      }
3078
3079      // FIXME: Override "preferred align" for double and long long.
3080    } else if (Name == "aapcs") {
3081      IsAAPCS = true;
3082      // FIXME: Enumerated types are variable width in straight AAPCS.
3083    } else if (Name == "aapcs-linux") {
3084      IsAAPCS = true;
3085    } else
3086      return false;
3087
3088    return true;
3089  }
3090
3091  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3092    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
3093      Features["vfp2"] = true;
3094    else if (CPU == "cortex-a8" || CPU == "cortex-a15" ||
3095             CPU == "cortex-a9" || CPU == "cortex-a9-mp")
3096      Features["neon"] = true;
3097    else if (CPU == "swift") {
3098      Features["vfp4"] = true;
3099      Features["neon"] = true;
3100    }
3101  }
3102
3103  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3104                                 StringRef Name,
3105                                 bool Enabled) const {
3106    if (Name == "soft-float" || Name == "soft-float-abi" ||
3107        Name == "vfp2" || Name == "vfp3" || Name == "vfp4" || Name == "neon" ||
3108        Name == "d16" || Name == "neonfp") {
3109      Features[Name] = Enabled;
3110    } else
3111      return false;
3112
3113    return true;
3114  }
3115
3116  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3117    FPU = 0;
3118    SoftFloat = SoftFloatABI = false;
3119    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
3120      if (Features[i] == "+soft-float")
3121        SoftFloat = true;
3122      else if (Features[i] == "+soft-float-abi")
3123        SoftFloatABI = true;
3124      else if (Features[i] == "+vfp2")
3125        FPU |= VFP2FPU;
3126      else if (Features[i] == "+vfp3")
3127        FPU |= VFP3FPU;
3128      else if (Features[i] == "+vfp4")
3129        FPU |= VFP4FPU;
3130      else if (Features[i] == "+neon")
3131        FPU |= NeonFPU;
3132    }
3133
3134    // Remove front-end specific options which the backend handles differently.
3135    std::vector<std::string>::iterator it;
3136    it = std::find(Features.begin(), Features.end(), "+soft-float");
3137    if (it != Features.end())
3138      Features.erase(it);
3139    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
3140    if (it != Features.end())
3141      Features.erase(it);
3142  }
3143
3144  virtual bool hasFeature(StringRef Feature) const {
3145    return llvm::StringSwitch<bool>(Feature)
3146        .Case("arm", true)
3147        .Case("softfloat", SoftFloat)
3148        .Case("thumb", IsThumb)
3149        .Case("neon", FPU == NeonFPU && !SoftFloat &&
3150              StringRef(getCPUDefineSuffix(CPU)).startswith("7"))
3151        .Default(false);
3152  }
3153  // FIXME: Should we actually have some table instead of these switches?
3154  static const char *getCPUDefineSuffix(StringRef Name) {
3155    return llvm::StringSwitch<const char*>(Name)
3156      .Cases("arm8", "arm810", "4")
3157      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
3158      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
3159      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
3160      .Case("ep9312", "4T")
3161      .Cases("arm10tdmi", "arm1020t", "5T")
3162      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
3163      .Case("arm926ej-s", "5TEJ")
3164      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
3165      .Cases("xscale", "iwmmxt", "5TE")
3166      .Case("arm1136j-s", "6J")
3167      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
3168      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
3169      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
3170      .Cases("cortex-a8", "cortex-a9", "cortex-a15", "7A")
3171      .Case("cortex-a9-mp", "7F")
3172      .Case("swift", "7S")
3173      .Cases("cortex-m3", "cortex-m4", "7M")
3174      .Case("cortex-m0", "6M")
3175      .Default(0);
3176  }
3177  static const char *getCPUProfile(StringRef Name) {
3178    return llvm::StringSwitch<const char*>(Name)
3179      .Cases("cortex-a8", "cortex-a9", "A")
3180      .Cases("cortex-m3", "cortex-m4", "cortex-m0", "M")
3181      .Default("");
3182  }
3183  virtual bool setCPU(const std::string &Name) {
3184    if (!getCPUDefineSuffix(Name))
3185      return false;
3186
3187    CPU = Name;
3188    return true;
3189  }
3190  virtual void getTargetDefines(const LangOptions &Opts,
3191                                MacroBuilder &Builder) const {
3192    // Target identification.
3193    Builder.defineMacro("__arm");
3194    Builder.defineMacro("__arm__");
3195
3196    // Target properties.
3197    Builder.defineMacro("__ARMEL__");
3198    Builder.defineMacro("__LITTLE_ENDIAN__");
3199    Builder.defineMacro("__REGISTER_PREFIX__", "");
3200
3201    StringRef CPUArch = getCPUDefineSuffix(CPU);
3202    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
3203    Builder.defineMacro("__ARM_ARCH", CPUArch.substr(0, 1));
3204    StringRef CPUProfile = getCPUProfile(CPU);
3205    if (!CPUProfile.empty())
3206      Builder.defineMacro("__ARM_ARCH_PROFILE", CPUProfile);
3207
3208    // Subtarget options.
3209
3210    // FIXME: It's more complicated than this and we don't really support
3211    // interworking.
3212    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
3213      Builder.defineMacro("__THUMB_INTERWORK__");
3214
3215    if (ABI == "aapcs" || ABI == "aapcs-linux") {
3216      // M-class CPUs on Darwin follow AAPCS, but not EABI.
3217      if (!(getTriple().isOSDarwin() == llvm::Triple::IOS && CPUProfile == "M"))
3218        Builder.defineMacro("__ARM_EABI__");
3219      Builder.defineMacro("__ARM_PCS", "1");
3220
3221      if (!SoftFloat && !SoftFloatABI)
3222        Builder.defineMacro("__ARM_PCS_VFP", "1");
3223    }
3224
3225    if (SoftFloat)
3226      Builder.defineMacro("__SOFTFP__");
3227
3228    if (CPU == "xscale")
3229      Builder.defineMacro("__XSCALE__");
3230
3231    bool IsARMv7 = CPUArch.startswith("7");
3232    if (IsThumb) {
3233      Builder.defineMacro("__THUMBEL__");
3234      Builder.defineMacro("__thumb__");
3235      if (CPUArch == "6T2" || IsARMv7)
3236        Builder.defineMacro("__thumb2__");
3237    }
3238
3239    // Note, this is always on in gcc, even though it doesn't make sense.
3240    Builder.defineMacro("__APCS_32__");
3241
3242    if (FPUModeIsVFP((FPUMode) FPU)) {
3243      Builder.defineMacro("__VFP_FP__");
3244      if (FPU & VFP2FPU)
3245        Builder.defineMacro("__ARM_VFPV2__");
3246      if (FPU & VFP3FPU)
3247        Builder.defineMacro("__ARM_VFPV3__");
3248      if (FPU & VFP4FPU)
3249        Builder.defineMacro("__ARM_VFPV4__");
3250    }
3251
3252    // This only gets set when Neon instructions are actually available, unlike
3253    // the VFP define, hence the soft float and arch check. This is subtly
3254    // different from gcc, we follow the intent which was that it should be set
3255    // when Neon instructions are actually available.
3256    if ((FPU & NeonFPU) && !SoftFloat && IsARMv7)
3257      Builder.defineMacro("__ARM_NEON__");
3258  }
3259  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3260                                 unsigned &NumRecords) const {
3261    Records = BuiltinInfo;
3262    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
3263  }
3264  virtual bool isCLZForZeroUndef() const { return false; }
3265  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3266    return IsAAPCS ? AAPCSABIBuiltinVaList : TargetInfo::VoidPtrBuiltinVaList;
3267  }
3268  virtual void getGCCRegNames(const char * const *&Names,
3269                              unsigned &NumNames) const;
3270  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3271                                unsigned &NumAliases) const;
3272  virtual bool validateAsmConstraint(const char *&Name,
3273                                     TargetInfo::ConstraintInfo &Info) const {
3274    switch (*Name) {
3275    default: break;
3276    case 'l': // r0-r7
3277    case 'h': // r8-r15
3278    case 'w': // VFP Floating point register single precision
3279    case 'P': // VFP Floating point register double precision
3280      Info.setAllowsRegister();
3281      return true;
3282    case 'Q': // A memory address that is a single base register.
3283      Info.setAllowsMemory();
3284      return true;
3285    case 'U': // a memory reference...
3286      switch (Name[1]) {
3287      case 'q': // ...ARMV4 ldrsb
3288      case 'v': // ...VFP load/store (reg+constant offset)
3289      case 'y': // ...iWMMXt load/store
3290      case 't': // address valid for load/store opaque types wider
3291	        // than 128-bits
3292      case 'n': // valid address for Neon doubleword vector load/store
3293      case 'm': // valid address for Neon element and structure load/store
3294      case 's': // valid address for non-offset loads/stores of quad-word
3295	        // values in four ARM registers
3296        Info.setAllowsMemory();
3297        Name++;
3298        return true;
3299      }
3300    }
3301    return false;
3302  }
3303  virtual std::string convertConstraint(const char *&Constraint) const {
3304    std::string R;
3305    switch (*Constraint) {
3306    case 'U':   // Two-character constraint; add "^" hint for later parsing.
3307      R = std::string("^") + std::string(Constraint, 2);
3308      Constraint++;
3309      break;
3310    case 'p': // 'p' should be translated to 'r' by default.
3311      R = std::string("r");
3312      break;
3313    default:
3314      return std::string(1, *Constraint);
3315    }
3316    return R;
3317  }
3318  virtual const char *getClobbers() const {
3319    // FIXME: Is this really right?
3320    return "";
3321  }
3322
3323  virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
3324    return (CC == CC_AAPCS || CC == CC_AAPCS_VFP) ? CCCR_OK : CCCR_Warning;
3325  }
3326};
3327
3328const char * const ARMTargetInfo::GCCRegNames[] = {
3329  // Integer registers
3330  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3331  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
3332
3333  // Float registers
3334  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
3335  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
3336  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
3337  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
3338
3339  // Double registers
3340  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
3341  "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
3342  "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
3343  "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
3344
3345  // Quad registers
3346  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
3347  "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
3348};
3349
3350void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
3351                                   unsigned &NumNames) const {
3352  Names = GCCRegNames;
3353  NumNames = llvm::array_lengthof(GCCRegNames);
3354}
3355
3356const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
3357  { { "a1" }, "r0" },
3358  { { "a2" }, "r1" },
3359  { { "a3" }, "r2" },
3360  { { "a4" }, "r3" },
3361  { { "v1" }, "r4" },
3362  { { "v2" }, "r5" },
3363  { { "v3" }, "r6" },
3364  { { "v4" }, "r7" },
3365  { { "v5" }, "r8" },
3366  { { "v6", "rfp" }, "r9" },
3367  { { "sl" }, "r10" },
3368  { { "fp" }, "r11" },
3369  { { "ip" }, "r12" },
3370  { { "r13" }, "sp" },
3371  { { "r14" }, "lr" },
3372  { { "r15" }, "pc" },
3373  // The S, D and Q registers overlap, but aren't really aliases; we
3374  // don't want to substitute one of these for a different-sized one.
3375};
3376
3377void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3378                                       unsigned &NumAliases) const {
3379  Aliases = GCCRegAliases;
3380  NumAliases = llvm::array_lengthof(GCCRegAliases);
3381}
3382
3383const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
3384#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3385#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3386                                              ALL_LANGUAGES },
3387#include "clang/Basic/BuiltinsARM.def"
3388};
3389} // end anonymous namespace.
3390
3391namespace {
3392class DarwinARMTargetInfo :
3393  public DarwinTargetInfo<ARMTargetInfo> {
3394protected:
3395  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
3396                            MacroBuilder &Builder) const {
3397    getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
3398  }
3399
3400public:
3401  DarwinARMTargetInfo(const std::string& triple)
3402    : DarwinTargetInfo<ARMTargetInfo>(triple) {
3403    HasAlignMac68kSupport = true;
3404    // iOS always has 64-bit atomic instructions.
3405    // FIXME: This should be based off of the target features in ARMTargetInfo.
3406    MaxAtomicInlineWidth = 64;
3407  }
3408};
3409} // end anonymous namespace.
3410
3411
3412namespace {
3413// Hexagon abstract base class
3414class HexagonTargetInfo : public TargetInfo {
3415  static const Builtin::Info BuiltinInfo[];
3416  static const char * const GCCRegNames[];
3417  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3418  std::string CPU;
3419public:
3420  HexagonTargetInfo(const std::string& triple) : TargetInfo(triple)  {
3421    BigEndian = false;
3422    DescriptionString = ("e-p:32:32:32-"
3423                         "i64:64:64-i32:32:32-i16:16:16-i1:32:32"
3424                         "f64:64:64-f32:32:32-a0:0-n32");
3425
3426    // {} in inline assembly are packet specifiers, not assembly variant
3427    // specifiers.
3428    NoAsmVariants = true;
3429  }
3430
3431  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3432                                 unsigned &NumRecords) const {
3433    Records = BuiltinInfo;
3434    NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
3435  }
3436
3437  virtual bool validateAsmConstraint(const char *&Name,
3438                                     TargetInfo::ConstraintInfo &Info) const {
3439    return true;
3440  }
3441
3442  virtual void getTargetDefines(const LangOptions &Opts,
3443                                MacroBuilder &Builder) const;
3444
3445  virtual bool hasFeature(StringRef Feature) const {
3446    return Feature == "hexagon";
3447  }
3448
3449  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3450    return TargetInfo::CharPtrBuiltinVaList;
3451  }
3452  virtual void getGCCRegNames(const char * const *&Names,
3453                              unsigned &NumNames) const;
3454  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3455                                unsigned &NumAliases) const;
3456  virtual const char *getClobbers() const {
3457    return "";
3458  }
3459
3460  static const char *getHexagonCPUSuffix(StringRef Name) {
3461    return llvm::StringSwitch<const char*>(Name)
3462      .Case("hexagonv2", "2")
3463      .Case("hexagonv3", "3")
3464      .Case("hexagonv4", "4")
3465      .Case("hexagonv5", "5")
3466      .Default(0);
3467  }
3468
3469  virtual bool setCPU(const std::string &Name) {
3470    if (!getHexagonCPUSuffix(Name))
3471      return false;
3472
3473    CPU = Name;
3474    return true;
3475  }
3476};
3477
3478void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
3479                                MacroBuilder &Builder) const {
3480  Builder.defineMacro("qdsp6");
3481  Builder.defineMacro("__qdsp6", "1");
3482  Builder.defineMacro("__qdsp6__", "1");
3483
3484  Builder.defineMacro("hexagon");
3485  Builder.defineMacro("__hexagon", "1");
3486  Builder.defineMacro("__hexagon__", "1");
3487
3488  if(CPU == "hexagonv1") {
3489    Builder.defineMacro("__HEXAGON_V1__");
3490    Builder.defineMacro("__HEXAGON_ARCH__", "1");
3491    if(Opts.HexagonQdsp6Compat) {
3492      Builder.defineMacro("__QDSP6_V1__");
3493      Builder.defineMacro("__QDSP6_ARCH__", "1");
3494    }
3495  }
3496  else if(CPU == "hexagonv2") {
3497    Builder.defineMacro("__HEXAGON_V2__");
3498    Builder.defineMacro("__HEXAGON_ARCH__", "2");
3499    if(Opts.HexagonQdsp6Compat) {
3500      Builder.defineMacro("__QDSP6_V2__");
3501      Builder.defineMacro("__QDSP6_ARCH__", "2");
3502    }
3503  }
3504  else if(CPU == "hexagonv3") {
3505    Builder.defineMacro("__HEXAGON_V3__");
3506    Builder.defineMacro("__HEXAGON_ARCH__", "3");
3507    if(Opts.HexagonQdsp6Compat) {
3508      Builder.defineMacro("__QDSP6_V3__");
3509      Builder.defineMacro("__QDSP6_ARCH__", "3");
3510    }
3511  }
3512  else if(CPU == "hexagonv4") {
3513    Builder.defineMacro("__HEXAGON_V4__");
3514    Builder.defineMacro("__HEXAGON_ARCH__", "4");
3515    if(Opts.HexagonQdsp6Compat) {
3516      Builder.defineMacro("__QDSP6_V4__");
3517      Builder.defineMacro("__QDSP6_ARCH__", "4");
3518    }
3519  }
3520  else if(CPU == "hexagonv5") {
3521    Builder.defineMacro("__HEXAGON_V5__");
3522    Builder.defineMacro("__HEXAGON_ARCH__", "5");
3523    if(Opts.HexagonQdsp6Compat) {
3524      Builder.defineMacro("__QDSP6_V5__");
3525      Builder.defineMacro("__QDSP6_ARCH__", "5");
3526    }
3527  }
3528}
3529
3530const char * const HexagonTargetInfo::GCCRegNames[] = {
3531  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3532  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3533  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3534  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3535  "p0", "p1", "p2", "p3",
3536  "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3537};
3538
3539void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3540                                   unsigned &NumNames) const {
3541  Names = GCCRegNames;
3542  NumNames = llvm::array_lengthof(GCCRegNames);
3543}
3544
3545
3546const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3547  { { "sp" }, "r29" },
3548  { { "fp" }, "r30" },
3549  { { "lr" }, "r31" },
3550 };
3551
3552void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3553                                     unsigned &NumAliases) const {
3554  Aliases = GCCRegAliases;
3555  NumAliases = llvm::array_lengthof(GCCRegAliases);
3556}
3557
3558
3559const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3560#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3561#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3562                                              ALL_LANGUAGES },
3563#include "clang/Basic/BuiltinsHexagon.def"
3564};
3565}
3566
3567
3568namespace {
3569class SparcV8TargetInfo : public TargetInfo {
3570  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3571  static const char * const GCCRegNames[];
3572  bool SoftFloat;
3573public:
3574  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3575    // FIXME: Support Sparc quad-precision long double?
3576    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3577                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3578  }
3579  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3580                                 StringRef Name,
3581                                 bool Enabled) const {
3582    if (Name == "soft-float")
3583      Features[Name] = Enabled;
3584    else
3585      return false;
3586
3587    return true;
3588  }
3589  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3590    SoftFloat = false;
3591    for (unsigned i = 0, e = Features.size(); i != e; ++i)
3592      if (Features[i] == "+soft-float")
3593        SoftFloat = true;
3594  }
3595  virtual void getTargetDefines(const LangOptions &Opts,
3596                                MacroBuilder &Builder) const {
3597    DefineStd(Builder, "sparc", Opts);
3598    Builder.defineMacro("__sparcv8");
3599    Builder.defineMacro("__REGISTER_PREFIX__", "");
3600
3601    if (SoftFloat)
3602      Builder.defineMacro("SOFT_FLOAT", "1");
3603  }
3604
3605  virtual bool hasFeature(StringRef Feature) const {
3606    return llvm::StringSwitch<bool>(Feature)
3607             .Case("softfloat", SoftFloat)
3608             .Case("sparc", true)
3609             .Default(false);
3610  }
3611
3612  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3613                                 unsigned &NumRecords) const {
3614    // FIXME: Implement!
3615  }
3616  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3617    return TargetInfo::VoidPtrBuiltinVaList;
3618  }
3619  virtual void getGCCRegNames(const char * const *&Names,
3620                              unsigned &NumNames) const;
3621  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3622                                unsigned &NumAliases) const;
3623  virtual bool validateAsmConstraint(const char *&Name,
3624                                     TargetInfo::ConstraintInfo &info) const {
3625    // FIXME: Implement!
3626    return false;
3627  }
3628  virtual const char *getClobbers() const {
3629    // FIXME: Implement!
3630    return "";
3631  }
3632};
3633
3634const char * const SparcV8TargetInfo::GCCRegNames[] = {
3635  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3636  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3637  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3638  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3639};
3640
3641void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3642                                       unsigned &NumNames) const {
3643  Names = GCCRegNames;
3644  NumNames = llvm::array_lengthof(GCCRegNames);
3645}
3646
3647const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3648  { { "g0" }, "r0" },
3649  { { "g1" }, "r1" },
3650  { { "g2" }, "r2" },
3651  { { "g3" }, "r3" },
3652  { { "g4" }, "r4" },
3653  { { "g5" }, "r5" },
3654  { { "g6" }, "r6" },
3655  { { "g7" }, "r7" },
3656  { { "o0" }, "r8" },
3657  { { "o1" }, "r9" },
3658  { { "o2" }, "r10" },
3659  { { "o3" }, "r11" },
3660  { { "o4" }, "r12" },
3661  { { "o5" }, "r13" },
3662  { { "o6", "sp" }, "r14" },
3663  { { "o7" }, "r15" },
3664  { { "l0" }, "r16" },
3665  { { "l1" }, "r17" },
3666  { { "l2" }, "r18" },
3667  { { "l3" }, "r19" },
3668  { { "l4" }, "r20" },
3669  { { "l5" }, "r21" },
3670  { { "l6" }, "r22" },
3671  { { "l7" }, "r23" },
3672  { { "i0" }, "r24" },
3673  { { "i1" }, "r25" },
3674  { { "i2" }, "r26" },
3675  { { "i3" }, "r27" },
3676  { { "i4" }, "r28" },
3677  { { "i5" }, "r29" },
3678  { { "i6", "fp" }, "r30" },
3679  { { "i7" }, "r31" },
3680};
3681
3682void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3683                                         unsigned &NumAliases) const {
3684  Aliases = GCCRegAliases;
3685  NumAliases = llvm::array_lengthof(GCCRegAliases);
3686}
3687} // end anonymous namespace.
3688
3689namespace {
3690class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3691public:
3692  AuroraUXSparcV8TargetInfo(const std::string& triple) :
3693      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3694    SizeType = UnsignedInt;
3695    PtrDiffType = SignedInt;
3696  }
3697};
3698class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3699public:
3700  SolarisSparcV8TargetInfo(const std::string& triple) :
3701      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3702    SizeType = UnsignedInt;
3703    PtrDiffType = SignedInt;
3704  }
3705};
3706} // end anonymous namespace.
3707
3708namespace {
3709  class MSP430TargetInfo : public TargetInfo {
3710    static const char * const GCCRegNames[];
3711  public:
3712    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3713      BigEndian = false;
3714      TLSSupported = false;
3715      IntWidth = 16; IntAlign = 16;
3716      LongWidth = 32; LongLongWidth = 64;
3717      LongAlign = LongLongAlign = 16;
3718      PointerWidth = 16; PointerAlign = 16;
3719      SuitableAlign = 16;
3720      SizeType = UnsignedInt;
3721      IntMaxType = SignedLong;
3722      UIntMaxType = UnsignedLong;
3723      IntPtrType = SignedShort;
3724      PtrDiffType = SignedInt;
3725      SigAtomicType = SignedLong;
3726      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3727   }
3728    virtual void getTargetDefines(const LangOptions &Opts,
3729                                  MacroBuilder &Builder) const {
3730      Builder.defineMacro("MSP430");
3731      Builder.defineMacro("__MSP430__");
3732      // FIXME: defines for different 'flavours' of MCU
3733    }
3734    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3735                                   unsigned &NumRecords) const {
3736     // FIXME: Implement.
3737      Records = 0;
3738      NumRecords = 0;
3739    }
3740    virtual bool hasFeature(StringRef Feature) const {
3741      return Feature == "msp430";
3742    }
3743    virtual void getGCCRegNames(const char * const *&Names,
3744                                unsigned &NumNames) const;
3745    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3746                                  unsigned &NumAliases) const {
3747      // No aliases.
3748      Aliases = 0;
3749      NumAliases = 0;
3750    }
3751    virtual bool validateAsmConstraint(const char *&Name,
3752                                       TargetInfo::ConstraintInfo &info) const {
3753      // No target constraints for now.
3754      return false;
3755    }
3756    virtual const char *getClobbers() const {
3757      // FIXME: Is this really right?
3758      return "";
3759    }
3760    virtual BuiltinVaListKind getBuiltinVaListKind() const {
3761      // FIXME: implement
3762      return TargetInfo::CharPtrBuiltinVaList;
3763   }
3764  };
3765
3766  const char * const MSP430TargetInfo::GCCRegNames[] = {
3767    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3768    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3769  };
3770
3771  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3772                                        unsigned &NumNames) const {
3773    Names = GCCRegNames;
3774    NumNames = llvm::array_lengthof(GCCRegNames);
3775  }
3776}
3777
3778namespace {
3779
3780  // LLVM and Clang cannot be used directly to output native binaries for
3781  // target, but is used to compile C code to llvm bitcode with correct
3782  // type and alignment information.
3783  //
3784  // TCE uses the llvm bitcode as input and uses it for generating customized
3785  // target processor and program binary. TCE co-design environment is
3786  // publicly available in http://tce.cs.tut.fi
3787
3788  static const unsigned TCEOpenCLAddrSpaceMap[] = {
3789      3, // opencl_global
3790      4, // opencl_local
3791      5, // opencl_constant
3792      0, // cuda_device
3793      0, // cuda_constant
3794      0  // cuda_shared
3795  };
3796
3797  class TCETargetInfo : public TargetInfo{
3798  public:
3799    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3800      TLSSupported = false;
3801      IntWidth = 32;
3802      LongWidth = LongLongWidth = 32;
3803      PointerWidth = 32;
3804      IntAlign = 32;
3805      LongAlign = LongLongAlign = 32;
3806      PointerAlign = 32;
3807      SuitableAlign = 32;
3808      SizeType = UnsignedInt;
3809      IntMaxType = SignedLong;
3810      UIntMaxType = UnsignedLong;
3811      IntPtrType = SignedInt;
3812      PtrDiffType = SignedInt;
3813      FloatWidth = 32;
3814      FloatAlign = 32;
3815      DoubleWidth = 32;
3816      DoubleAlign = 32;
3817      LongDoubleWidth = 32;
3818      LongDoubleAlign = 32;
3819      FloatFormat = &llvm::APFloat::IEEEsingle;
3820      DoubleFormat = &llvm::APFloat::IEEEsingle;
3821      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3822      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3823                          "i16:16:32-i32:32:32-i64:32:32-"
3824                          "f32:32:32-f64:32:32-v64:32:32-"
3825                          "v128:32:32-a0:0:32-n32";
3826      AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3827    }
3828
3829    virtual void getTargetDefines(const LangOptions &Opts,
3830                                  MacroBuilder &Builder) const {
3831      DefineStd(Builder, "tce", Opts);
3832      Builder.defineMacro("__TCE__");
3833      Builder.defineMacro("__TCE_V1__");
3834    }
3835    virtual bool hasFeature(StringRef Feature) const {
3836      return Feature == "tce";
3837    }
3838
3839    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3840                                   unsigned &NumRecords) const {}
3841    virtual const char *getClobbers() const {
3842      return "";
3843    }
3844    virtual BuiltinVaListKind getBuiltinVaListKind() const {
3845      return TargetInfo::VoidPtrBuiltinVaList;
3846    }
3847    virtual void getGCCRegNames(const char * const *&Names,
3848                                unsigned &NumNames) const {}
3849    virtual bool validateAsmConstraint(const char *&Name,
3850                                       TargetInfo::ConstraintInfo &info) const {
3851      return true;
3852    }
3853    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3854                                  unsigned &NumAliases) const {}
3855  };
3856}
3857
3858namespace {
3859class MipsTargetInfoBase : public TargetInfo {
3860  static const Builtin::Info BuiltinInfo[];
3861  std::string CPU;
3862  bool IsMips16;
3863  enum MipsFloatABI {
3864    HardFloat, SingleFloat, SoftFloat
3865  } FloatABI;
3866  enum DspRevEnum {
3867    NoDSP, DSP1, DSP2
3868  } DspRev;
3869
3870protected:
3871  std::string ABI;
3872
3873public:
3874  MipsTargetInfoBase(const std::string& triple,
3875                     const std::string& ABIStr,
3876                     const std::string& CPUStr)
3877    : TargetInfo(triple),
3878      CPU(CPUStr),
3879      IsMips16(false),
3880      FloatABI(HardFloat),
3881      DspRev(NoDSP),
3882      ABI(ABIStr)
3883  {}
3884
3885  virtual const char *getABI() const { return ABI.c_str(); }
3886  virtual bool setABI(const std::string &Name) = 0;
3887  virtual bool setCPU(const std::string &Name) {
3888    CPU = Name;
3889    return true;
3890  }
3891  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3892    Features[ABI] = true;
3893    Features[CPU] = true;
3894  }
3895
3896  virtual void getTargetDefines(const LangOptions &Opts,
3897                                MacroBuilder &Builder) const {
3898    DefineStd(Builder, "mips", Opts);
3899    Builder.defineMacro("_mips");
3900    Builder.defineMacro("__REGISTER_PREFIX__", "");
3901
3902    switch (FloatABI) {
3903    case HardFloat:
3904      Builder.defineMacro("__mips_hard_float", Twine(1));
3905      break;
3906    case SingleFloat:
3907      Builder.defineMacro("__mips_hard_float", Twine(1));
3908      Builder.defineMacro("__mips_single_float", Twine(1));
3909      break;
3910    case SoftFloat:
3911      Builder.defineMacro("__mips_soft_float", Twine(1));
3912      break;
3913    }
3914
3915    if (IsMips16)
3916      Builder.defineMacro("__mips16", Twine(1));
3917
3918    switch (DspRev) {
3919    default:
3920      break;
3921    case DSP1:
3922      Builder.defineMacro("__mips_dsp_rev", Twine(1));
3923      Builder.defineMacro("__mips_dsp", Twine(1));
3924      break;
3925    case DSP2:
3926      Builder.defineMacro("__mips_dsp_rev", Twine(2));
3927      Builder.defineMacro("__mips_dspr2", Twine(1));
3928      Builder.defineMacro("__mips_dsp", Twine(1));
3929      break;
3930    }
3931
3932    Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
3933    Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
3934    Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
3935
3936    Builder.defineMacro("_MIPS_ARCH", "\"" + CPU + "\"");
3937    Builder.defineMacro("_MIPS_ARCH_" + StringRef(CPU).upper());
3938  }
3939
3940  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3941                                 unsigned &NumRecords) const {
3942    Records = BuiltinInfo;
3943    NumRecords = clang::Mips::LastTSBuiltin - Builtin::FirstTSBuiltin;
3944  }
3945  virtual bool hasFeature(StringRef Feature) const {
3946    return Feature == "mips";
3947  }
3948  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3949    return TargetInfo::VoidPtrBuiltinVaList;
3950  }
3951  virtual void getGCCRegNames(const char * const *&Names,
3952                              unsigned &NumNames) const {
3953    static const char * const GCCRegNames[] = {
3954      // CPU register names
3955      // Must match second column of GCCRegAliases
3956      "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
3957      "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
3958      "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
3959      "$24",  "$25",  "$26",  "$27",  "$28",  "$29",  "$30",  "$31",
3960      // Floating point register names
3961      "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
3962      "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
3963      "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
3964      "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
3965      // Hi/lo and condition register names
3966      "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
3967      "$fcc5","$fcc6","$fcc7"
3968    };
3969    Names = GCCRegNames;
3970    NumNames = llvm::array_lengthof(GCCRegNames);
3971  }
3972  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3973                                unsigned &NumAliases) const = 0;
3974  virtual bool validateAsmConstraint(const char *&Name,
3975                                     TargetInfo::ConstraintInfo &Info) const {
3976    switch (*Name) {
3977    default:
3978      return false;
3979
3980    case 'r': // CPU registers.
3981    case 'd': // Equivalent to "r" unless generating MIPS16 code.
3982    case 'y': // Equivalent to "r", backwards compatibility only.
3983    case 'f': // floating-point registers.
3984    case 'c': // $25 for indirect jumps
3985    case 'l': // lo register
3986    case 'x': // hilo register pair
3987      Info.setAllowsRegister();
3988      return true;
3989    }
3990  }
3991
3992  virtual const char *getClobbers() const {
3993    // FIXME: Implement!
3994    return "";
3995  }
3996
3997  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3998                                 StringRef Name,
3999                                 bool Enabled) const {
4000    if (Name == "soft-float" || Name == "single-float" ||
4001        Name == "o32" || Name == "n32" || Name == "n64" || Name == "eabi" ||
4002        Name == "mips32" || Name == "mips32r2" ||
4003        Name == "mips64" || Name == "mips64r2" ||
4004        Name == "mips16" || Name == "dsp" || Name == "dspr2") {
4005      Features[Name] = Enabled;
4006      return true;
4007    }
4008    return false;
4009  }
4010
4011  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
4012    IsMips16 = false;
4013    FloatABI = HardFloat;
4014    DspRev = NoDSP;
4015
4016    for (std::vector<std::string>::iterator it = Features.begin(),
4017         ie = Features.end(); it != ie; ++it) {
4018      if (*it == "+single-float")
4019        FloatABI = SingleFloat;
4020      else if (*it == "+soft-float")
4021        FloatABI = SoftFloat;
4022      else if (*it == "+mips16")
4023        IsMips16 = true;
4024      else if (*it == "+dsp")
4025        DspRev = std::max(DspRev, DSP1);
4026      else if (*it == "+dspr2")
4027        DspRev = std::max(DspRev, DSP2);
4028    }
4029
4030    // Remove front-end specific option.
4031    std::vector<std::string>::iterator it =
4032      std::find(Features.begin(), Features.end(), "+soft-float");
4033    if (it != Features.end())
4034      Features.erase(it);
4035  }
4036};
4037
4038const Builtin::Info MipsTargetInfoBase::BuiltinInfo[] = {
4039#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
4040#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
4041                                              ALL_LANGUAGES },
4042#include "clang/Basic/BuiltinsMips.def"
4043};
4044
4045class Mips32TargetInfoBase : public MipsTargetInfoBase {
4046public:
4047  Mips32TargetInfoBase(const std::string& triple) :
4048    MipsTargetInfoBase(triple, "o32", "mips32") {
4049    SizeType = UnsignedInt;
4050    PtrDiffType = SignedInt;
4051  }
4052  virtual bool setABI(const std::string &Name) {
4053    if ((Name == "o32") || (Name == "eabi")) {
4054      ABI = Name;
4055      return true;
4056    } else
4057      return false;
4058  }
4059  virtual void getTargetDefines(const LangOptions &Opts,
4060                                MacroBuilder &Builder) const {
4061    MipsTargetInfoBase::getTargetDefines(Opts, Builder);
4062
4063    if (ABI == "o32") {
4064      Builder.defineMacro("__mips_o32");
4065      Builder.defineMacro("_ABIO32", "1");
4066      Builder.defineMacro("_MIPS_SIM", "_ABIO32");
4067    }
4068    else if (ABI == "eabi")
4069      Builder.defineMacro("__mips_eabi");
4070    else
4071      llvm_unreachable("Invalid ABI for Mips32.");
4072  }
4073  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4074                                unsigned &NumAliases) const {
4075    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
4076      { { "at" },  "$1" },
4077      { { "v0" },  "$2" },
4078      { { "v1" },  "$3" },
4079      { { "a0" },  "$4" },
4080      { { "a1" },  "$5" },
4081      { { "a2" },  "$6" },
4082      { { "a3" },  "$7" },
4083      { { "t0" },  "$8" },
4084      { { "t1" },  "$9" },
4085      { { "t2" }, "$10" },
4086      { { "t3" }, "$11" },
4087      { { "t4" }, "$12" },
4088      { { "t5" }, "$13" },
4089      { { "t6" }, "$14" },
4090      { { "t7" }, "$15" },
4091      { { "s0" }, "$16" },
4092      { { "s1" }, "$17" },
4093      { { "s2" }, "$18" },
4094      { { "s3" }, "$19" },
4095      { { "s4" }, "$20" },
4096      { { "s5" }, "$21" },
4097      { { "s6" }, "$22" },
4098      { { "s7" }, "$23" },
4099      { { "t8" }, "$24" },
4100      { { "t9" }, "$25" },
4101      { { "k0" }, "$26" },
4102      { { "k1" }, "$27" },
4103      { { "gp" }, "$28" },
4104      { { "sp","$sp" }, "$29" },
4105      { { "fp","$fp" }, "$30" },
4106      { { "ra" }, "$31" }
4107    };
4108    Aliases = GCCRegAliases;
4109    NumAliases = llvm::array_lengthof(GCCRegAliases);
4110  }
4111};
4112
4113class Mips32EBTargetInfo : public Mips32TargetInfoBase {
4114public:
4115  Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
4116    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4117                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
4118  }
4119  virtual void getTargetDefines(const LangOptions &Opts,
4120                                MacroBuilder &Builder) const {
4121    DefineStd(Builder, "MIPSEB", Opts);
4122    Builder.defineMacro("_MIPSEB");
4123    Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
4124  }
4125};
4126
4127class Mips32ELTargetInfo : public Mips32TargetInfoBase {
4128public:
4129  Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
4130    BigEndian = false;
4131    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4132                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
4133  }
4134  virtual void getTargetDefines(const LangOptions &Opts,
4135                                MacroBuilder &Builder) const {
4136    DefineStd(Builder, "MIPSEL", Opts);
4137    Builder.defineMacro("_MIPSEL");
4138    Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
4139  }
4140};
4141
4142class Mips64TargetInfoBase : public MipsTargetInfoBase {
4143  virtual void SetDescriptionString(const std::string &Name) = 0;
4144public:
4145  Mips64TargetInfoBase(const std::string& triple) :
4146    MipsTargetInfoBase(triple, "n64", "mips64") {
4147    LongWidth = LongAlign = 64;
4148    PointerWidth = PointerAlign = 64;
4149    LongDoubleWidth = LongDoubleAlign = 128;
4150    LongDoubleFormat = &llvm::APFloat::IEEEquad;
4151    SuitableAlign = 128;
4152  }
4153  virtual bool setABI(const std::string &Name) {
4154    SetDescriptionString(Name);
4155
4156    if (Name != "n32" && Name != "n64")
4157      return false;
4158
4159    ABI = Name;
4160
4161    if (Name == "n32") {
4162      LongWidth = LongAlign = 32;
4163      PointerWidth = PointerAlign = 32;
4164    }
4165
4166    return true;
4167  }
4168  virtual void getTargetDefines(const LangOptions &Opts,
4169                                MacroBuilder &Builder) const {
4170    MipsTargetInfoBase::getTargetDefines(Opts, Builder);
4171
4172    Builder.defineMacro("__mips64");
4173    Builder.defineMacro("__mips64__");
4174
4175    if (ABI == "n32") {
4176      Builder.defineMacro("__mips_n32");
4177      Builder.defineMacro("_ABIN32", "2");
4178      Builder.defineMacro("_MIPS_SIM", "_ABIN32");
4179    }
4180    else if (ABI == "n64") {
4181      Builder.defineMacro("__mips_n64");
4182      Builder.defineMacro("_ABI64", "3");
4183      Builder.defineMacro("_MIPS_SIM", "_ABI64");
4184    }
4185    else
4186      llvm_unreachable("Invalid ABI for Mips64.");
4187  }
4188  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4189                                unsigned &NumAliases) const {
4190    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
4191      { { "at" },  "$1" },
4192      { { "v0" },  "$2" },
4193      { { "v1" },  "$3" },
4194      { { "a0" },  "$4" },
4195      { { "a1" },  "$5" },
4196      { { "a2" },  "$6" },
4197      { { "a3" },  "$7" },
4198      { { "a4" },  "$8" },
4199      { { "a5" },  "$9" },
4200      { { "a6" }, "$10" },
4201      { { "a7" }, "$11" },
4202      { { "t0" }, "$12" },
4203      { { "t1" }, "$13" },
4204      { { "t2" }, "$14" },
4205      { { "t3" }, "$15" },
4206      { { "s0" }, "$16" },
4207      { { "s1" }, "$17" },
4208      { { "s2" }, "$18" },
4209      { { "s3" }, "$19" },
4210      { { "s4" }, "$20" },
4211      { { "s5" }, "$21" },
4212      { { "s6" }, "$22" },
4213      { { "s7" }, "$23" },
4214      { { "t8" }, "$24" },
4215      { { "t9" }, "$25" },
4216      { { "k0" }, "$26" },
4217      { { "k1" }, "$27" },
4218      { { "gp" }, "$28" },
4219      { { "sp","$sp" }, "$29" },
4220      { { "fp","$fp" }, "$30" },
4221      { { "ra" }, "$31" }
4222    };
4223    Aliases = GCCRegAliases;
4224    NumAliases = llvm::array_lengthof(GCCRegAliases);
4225  }
4226};
4227
4228class Mips64EBTargetInfo : public Mips64TargetInfoBase {
4229  virtual void SetDescriptionString(const std::string &Name) {
4230    // Change DescriptionString only if ABI is n32.
4231    if (Name == "n32")
4232      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4233                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4234                          "v64:64:64-n32";
4235  }
4236public:
4237  Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
4238    // Default ABI is n64.
4239    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4240                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4241                        "v64:64:64-n32";
4242  }
4243  virtual void getTargetDefines(const LangOptions &Opts,
4244                                MacroBuilder &Builder) const {
4245    DefineStd(Builder, "MIPSEB", Opts);
4246    Builder.defineMacro("_MIPSEB");
4247    Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
4248  }
4249};
4250
4251class Mips64ELTargetInfo : public Mips64TargetInfoBase {
4252  virtual void SetDescriptionString(const std::string &Name) {
4253    // Change DescriptionString only if ABI is n32.
4254    if (Name == "n32")
4255      DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4256                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
4257                          "-v64:64:64-n32";
4258  }
4259public:
4260  Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
4261    // Default ABI is n64.
4262    BigEndian = false;
4263    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4264                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4265                        "v64:64:64-n32";
4266  }
4267  virtual void getTargetDefines(const LangOptions &Opts,
4268                                MacroBuilder &Builder) const {
4269    DefineStd(Builder, "MIPSEL", Opts);
4270    Builder.defineMacro("_MIPSEL");
4271    Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
4272  }
4273};
4274} // end anonymous namespace.
4275
4276namespace {
4277class PNaClTargetInfo : public TargetInfo {
4278public:
4279  PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
4280    BigEndian = false;
4281    this->UserLabelPrefix = "";
4282    this->LongAlign = 32;
4283    this->LongWidth = 32;
4284    this->PointerAlign = 32;
4285    this->PointerWidth = 32;
4286    this->IntMaxType = TargetInfo::SignedLongLong;
4287    this->UIntMaxType = TargetInfo::UnsignedLongLong;
4288    this->Int64Type = TargetInfo::SignedLongLong;
4289    this->DoubleAlign = 64;
4290    this->LongDoubleWidth = 64;
4291    this->LongDoubleAlign = 64;
4292    this->SizeType = TargetInfo::UnsignedInt;
4293    this->PtrDiffType = TargetInfo::SignedInt;
4294    this->IntPtrType = TargetInfo::SignedInt;
4295    this->RegParmMax = 2;
4296    DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
4297                        "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
4298  }
4299
4300  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
4301  }
4302  virtual void getArchDefines(const LangOptions &Opts,
4303                              MacroBuilder &Builder) const {
4304    Builder.defineMacro("__le32__");
4305    Builder.defineMacro("__pnacl__");
4306  }
4307  virtual void getTargetDefines(const LangOptions &Opts,
4308                                MacroBuilder &Builder) const {
4309    Builder.defineMacro("__LITTLE_ENDIAN__");
4310    getArchDefines(Opts, Builder);
4311  }
4312  virtual bool hasFeature(StringRef Feature) const {
4313    return Feature == "pnacl";
4314  }
4315  virtual void getTargetBuiltins(const Builtin::Info *&Records,
4316                                 unsigned &NumRecords) const {
4317  }
4318  virtual BuiltinVaListKind getBuiltinVaListKind() const {
4319    return TargetInfo::PNaClABIBuiltinVaList;
4320  }
4321  virtual void getGCCRegNames(const char * const *&Names,
4322                              unsigned &NumNames) const;
4323  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4324                                unsigned &NumAliases) const;
4325  virtual bool validateAsmConstraint(const char *&Name,
4326                                     TargetInfo::ConstraintInfo &Info) const {
4327    return false;
4328  }
4329
4330  virtual const char *getClobbers() const {
4331    return "";
4332  }
4333};
4334
4335void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
4336                                     unsigned &NumNames) const {
4337  Names = NULL;
4338  NumNames = 0;
4339}
4340
4341void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
4342                                       unsigned &NumAliases) const {
4343  Aliases = NULL;
4344  NumAliases = 0;
4345}
4346} // end anonymous namespace.
4347
4348
4349//===----------------------------------------------------------------------===//
4350// Driver code
4351//===----------------------------------------------------------------------===//
4352
4353static TargetInfo *AllocateTarget(const std::string &T) {
4354  llvm::Triple Triple(T);
4355  llvm::Triple::OSType os = Triple.getOS();
4356
4357  switch (Triple.getArch()) {
4358  default:
4359    return NULL;
4360
4361  case llvm::Triple::hexagon:
4362    return new HexagonTargetInfo(T);
4363
4364  case llvm::Triple::arm:
4365  case llvm::Triple::thumb:
4366    if (Triple.isOSDarwin())
4367      return new DarwinARMTargetInfo(T);
4368
4369    switch (os) {
4370    case llvm::Triple::Linux:
4371      return new LinuxTargetInfo<ARMTargetInfo>(T);
4372    case llvm::Triple::FreeBSD:
4373      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
4374    case llvm::Triple::NetBSD:
4375      return new NetBSDTargetInfo<ARMTargetInfo>(T);
4376    case llvm::Triple::OpenBSD:
4377      return new OpenBSDTargetInfo<ARMTargetInfo>(T);
4378    case llvm::Triple::Bitrig:
4379      return new BitrigTargetInfo<ARMTargetInfo>(T);
4380    case llvm::Triple::RTEMS:
4381      return new RTEMSTargetInfo<ARMTargetInfo>(T);
4382    case llvm::Triple::NativeClient:
4383      return new NaClTargetInfo<ARMTargetInfo>(T);
4384    default:
4385      return new ARMTargetInfo(T);
4386    }
4387
4388  case llvm::Triple::msp430:
4389    return new MSP430TargetInfo(T);
4390
4391  case llvm::Triple::mips:
4392    switch (os) {
4393    case llvm::Triple::Linux:
4394      return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
4395    case llvm::Triple::RTEMS:
4396      return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
4397    case llvm::Triple::FreeBSD:
4398      return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
4399    case llvm::Triple::NetBSD:
4400      return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
4401    default:
4402      return new Mips32EBTargetInfo(T);
4403    }
4404
4405  case llvm::Triple::mipsel:
4406    switch (os) {
4407    case llvm::Triple::Linux:
4408      return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
4409    case llvm::Triple::RTEMS:
4410      return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
4411    case llvm::Triple::FreeBSD:
4412      return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
4413    case llvm::Triple::NetBSD:
4414      return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
4415    default:
4416      return new Mips32ELTargetInfo(T);
4417    }
4418
4419  case llvm::Triple::mips64:
4420    switch (os) {
4421    case llvm::Triple::Linux:
4422      return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
4423    case llvm::Triple::RTEMS:
4424      return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
4425    case llvm::Triple::FreeBSD:
4426      return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
4427    case llvm::Triple::NetBSD:
4428      return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
4429    case llvm::Triple::OpenBSD:
4430      return new OpenBSDTargetInfo<Mips64EBTargetInfo>(T);
4431    default:
4432      return new Mips64EBTargetInfo(T);
4433    }
4434
4435  case llvm::Triple::mips64el:
4436    switch (os) {
4437    case llvm::Triple::Linux:
4438      return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
4439    case llvm::Triple::RTEMS:
4440      return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
4441    case llvm::Triple::FreeBSD:
4442      return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
4443    case llvm::Triple::NetBSD:
4444      return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
4445    case llvm::Triple::OpenBSD:
4446      return new OpenBSDTargetInfo<Mips64ELTargetInfo>(T);
4447    default:
4448      return new Mips64ELTargetInfo(T);
4449    }
4450
4451  case llvm::Triple::le32:
4452    switch (os) {
4453      case llvm::Triple::NativeClient:
4454        return new NaClTargetInfo<PNaClTargetInfo>(T);
4455      default:
4456        return NULL;
4457    }
4458
4459  case llvm::Triple::ppc:
4460    if (Triple.isOSDarwin())
4461      return new DarwinPPC32TargetInfo(T);
4462    switch (os) {
4463    case llvm::Triple::Linux:
4464      return new LinuxTargetInfo<PPC32TargetInfo>(T);
4465    case llvm::Triple::FreeBSD:
4466      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
4467    case llvm::Triple::NetBSD:
4468      return new NetBSDTargetInfo<PPC32TargetInfo>(T);
4469    case llvm::Triple::OpenBSD:
4470      return new OpenBSDTargetInfo<PPC32TargetInfo>(T);
4471    case llvm::Triple::RTEMS:
4472      return new RTEMSTargetInfo<PPC32TargetInfo>(T);
4473    default:
4474      return new PPC32TargetInfo(T);
4475    }
4476
4477  case llvm::Triple::ppc64:
4478    if (Triple.isOSDarwin())
4479      return new DarwinPPC64TargetInfo(T);
4480    switch (os) {
4481    case llvm::Triple::Linux:
4482      return new LinuxTargetInfo<PPC64TargetInfo>(T);
4483    case llvm::Triple::Lv2:
4484      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
4485    case llvm::Triple::FreeBSD:
4486      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
4487    case llvm::Triple::NetBSD:
4488      return new NetBSDTargetInfo<PPC64TargetInfo>(T);
4489    default:
4490      return new PPC64TargetInfo(T);
4491    }
4492
4493  case llvm::Triple::nvptx:
4494    return new NVPTX32TargetInfo(T);
4495  case llvm::Triple::nvptx64:
4496    return new NVPTX64TargetInfo(T);
4497
4498  case llvm::Triple::mblaze:
4499    return new MBlazeTargetInfo(T);
4500
4501  case llvm::Triple::r600:
4502    return new R600TargetInfo(T);
4503
4504  case llvm::Triple::sparc:
4505    switch (os) {
4506    case llvm::Triple::Linux:
4507      return new LinuxTargetInfo<SparcV8TargetInfo>(T);
4508    case llvm::Triple::AuroraUX:
4509      return new AuroraUXSparcV8TargetInfo(T);
4510    case llvm::Triple::Solaris:
4511      return new SolarisSparcV8TargetInfo(T);
4512    case llvm::Triple::NetBSD:
4513      return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
4514    case llvm::Triple::OpenBSD:
4515      return new OpenBSDTargetInfo<SparcV8TargetInfo>(T);
4516    case llvm::Triple::RTEMS:
4517      return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
4518    default:
4519      return new SparcV8TargetInfo(T);
4520    }
4521
4522  // FIXME: Need a real SPU target.
4523  case llvm::Triple::cellspu:
4524    return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
4525
4526  case llvm::Triple::tce:
4527    return new TCETargetInfo(T);
4528
4529  case llvm::Triple::x86:
4530    if (Triple.isOSDarwin())
4531      return new DarwinI386TargetInfo(T);
4532
4533    switch (os) {
4534    case llvm::Triple::AuroraUX:
4535      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
4536    case llvm::Triple::Linux:
4537      return new LinuxTargetInfo<X86_32TargetInfo>(T);
4538    case llvm::Triple::DragonFly:
4539      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
4540    case llvm::Triple::NetBSD:
4541      return new NetBSDI386TargetInfo(T);
4542    case llvm::Triple::OpenBSD:
4543      return new OpenBSDI386TargetInfo(T);
4544    case llvm::Triple::Bitrig:
4545      return new BitrigI386TargetInfo(T);
4546    case llvm::Triple::FreeBSD:
4547      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
4548    case llvm::Triple::Minix:
4549      return new MinixTargetInfo<X86_32TargetInfo>(T);
4550    case llvm::Triple::Solaris:
4551      return new SolarisTargetInfo<X86_32TargetInfo>(T);
4552    case llvm::Triple::Cygwin:
4553      return new CygwinX86_32TargetInfo(T);
4554    case llvm::Triple::MinGW32:
4555      return new MinGWX86_32TargetInfo(T);
4556    case llvm::Triple::Win32:
4557      return new VisualStudioWindowsX86_32TargetInfo(T);
4558    case llvm::Triple::Haiku:
4559      return new HaikuX86_32TargetInfo(T);
4560    case llvm::Triple::RTEMS:
4561      return new RTEMSX86_32TargetInfo(T);
4562    case llvm::Triple::NativeClient:
4563      return new NaClTargetInfo<X86_32TargetInfo>(T);
4564    default:
4565      return new X86_32TargetInfo(T);
4566    }
4567
4568  case llvm::Triple::x86_64:
4569    if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
4570      return new DarwinX86_64TargetInfo(T);
4571
4572    switch (os) {
4573    case llvm::Triple::AuroraUX:
4574      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
4575    case llvm::Triple::Linux:
4576      return new LinuxTargetInfo<X86_64TargetInfo>(T);
4577    case llvm::Triple::DragonFly:
4578      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
4579    case llvm::Triple::NetBSD:
4580      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
4581    case llvm::Triple::OpenBSD:
4582      return new OpenBSDX86_64TargetInfo(T);
4583    case llvm::Triple::Bitrig:
4584      return new BitrigX86_64TargetInfo(T);
4585    case llvm::Triple::FreeBSD:
4586      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
4587    case llvm::Triple::Solaris:
4588      return new SolarisTargetInfo<X86_64TargetInfo>(T);
4589    case llvm::Triple::MinGW32:
4590      return new MinGWX86_64TargetInfo(T);
4591    case llvm::Triple::Win32:   // This is what Triple.h supports now.
4592      return new VisualStudioWindowsX86_64TargetInfo(T);
4593    case llvm::Triple::NativeClient:
4594      return new NaClTargetInfo<X86_64TargetInfo>(T);
4595    default:
4596      return new X86_64TargetInfo(T);
4597    }
4598  }
4599}
4600
4601/// CreateTargetInfo - Return the target info object for the specified target
4602/// triple.
4603TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
4604                                         TargetOptions &Opts) {
4605  llvm::Triple Triple(Opts.Triple);
4606
4607  // Construct the target
4608  OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
4609  if (!Target) {
4610    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
4611    return 0;
4612  }
4613  Target->setTargetOpts(Opts);
4614
4615  // Set the target CPU if specified.
4616  if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
4617    Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
4618    return 0;
4619  }
4620
4621  // Set the target ABI if specified.
4622  if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
4623    Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
4624    return 0;
4625  }
4626
4627  // Set the target C++ ABI.
4628  if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
4629    Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
4630    return 0;
4631  }
4632
4633  // Compute the default target features, we need the target to handle this
4634  // because features may have dependencies on one another.
4635  llvm::StringMap<bool> Features;
4636  Target->getDefaultFeatures(Features);
4637
4638  // Apply the user specified deltas.
4639  // First the enables.
4640  for (std::vector<std::string>::const_iterator
4641         it = Opts.FeaturesAsWritten.begin(),
4642         ie = Opts.FeaturesAsWritten.end();
4643       it != ie; ++it) {
4644    const char *Name = it->c_str();
4645
4646    if (Name[0] != '+')
4647      continue;
4648
4649    // Apply the feature via the target.
4650    if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
4651      Diags.Report(diag::err_target_invalid_feature) << Name;
4652      return 0;
4653    }
4654  }
4655
4656  // Then the disables.
4657  for (std::vector<std::string>::const_iterator
4658         it = Opts.FeaturesAsWritten.begin(),
4659         ie = Opts.FeaturesAsWritten.end();
4660       it != ie; ++it) {
4661    const char *Name = it->c_str();
4662
4663    if (Name[0] == '+')
4664      continue;
4665
4666    // Apply the feature via the target.
4667    if (Name[0] != '-' ||
4668        !Target->setFeatureEnabled(Features, Name + 1, false)) {
4669      Diags.Report(diag::err_target_invalid_feature) << Name;
4670      return 0;
4671    }
4672  }
4673
4674  // Add the features to the compile options.
4675  //
4676  // FIXME: If we are completely confident that we have the right set, we only
4677  // need to pass the minuses.
4678  Opts.Features.clear();
4679  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
4680         ie = Features.end(); it != ie; ++it)
4681    Opts.Features.push_back((it->second ? "+" : "-") + it->first().str());
4682  Target->HandleTargetFeatures(Opts.Features);
4683
4684  return Target.take();
4685}
4686