Targets.cpp revision 866ff8ad29edb97cebce13dbb1b4acfb69b2830b
1//===--- Targets.cpp - Implement -arch option and targets -----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements construction of a TargetInfo object from a 11// target triple. 12// 13//===----------------------------------------------------------------------===// 14 15#include "clang/Basic/TargetInfo.h" 16#include "clang/Basic/Builtins.h" 17#include "clang/Basic/Diagnostic.h" 18#include "clang/Basic/LangOptions.h" 19#include "clang/Basic/MacroBuilder.h" 20#include "clang/Basic/TargetBuiltins.h" 21#include "clang/Basic/TargetOptions.h" 22#include "llvm/ADT/APFloat.h" 23#include "llvm/ADT/OwningPtr.h" 24#include "llvm/ADT/STLExtras.h" 25#include "llvm/ADT/StringRef.h" 26#include "llvm/ADT/StringSwitch.h" 27#include "llvm/ADT/Triple.h" 28#include "llvm/MC/MCSectionMachO.h" 29#include <algorithm> 30using namespace clang; 31 32//===----------------------------------------------------------------------===// 33// Common code shared among targets. 34//===----------------------------------------------------------------------===// 35 36/// DefineStd - Define a macro name and standard variants. For example if 37/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 38/// when in GNU mode. 39static void DefineStd(MacroBuilder &Builder, llvm::StringRef MacroName, 40 const LangOptions &Opts) { 41 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 42 43 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 44 // in the user's namespace. 45 if (Opts.GNUMode) 46 Builder.defineMacro(MacroName); 47 48 // Define __unix. 49 Builder.defineMacro("__" + MacroName); 50 51 // Define __unix__. 52 Builder.defineMacro("__" + MacroName + "__"); 53} 54 55//===----------------------------------------------------------------------===// 56// Defines specific to certain operating systems. 57//===----------------------------------------------------------------------===// 58 59namespace { 60template<typename TgtInfo> 61class OSTargetInfo : public TgtInfo { 62protected: 63 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 64 MacroBuilder &Builder) const=0; 65public: 66 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 67 virtual void getTargetDefines(const LangOptions &Opts, 68 MacroBuilder &Builder) const { 69 TgtInfo::getTargetDefines(Opts, Builder); 70 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 71 } 72 73}; 74} // end anonymous namespace 75 76 77static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 78 const llvm::Triple &Triple) { 79 Builder.defineMacro("__APPLE_CC__", "5621"); 80 Builder.defineMacro("__APPLE__"); 81 Builder.defineMacro("__MACH__"); 82 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 83 84 // __weak is always defined, for use in blocks and with objc pointers. 85 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 86 87 // Darwin defines __strong even in C mode (just to nothing). 88 if (!Opts.ObjC1 || Opts.getGCMode() == LangOptions::NonGC) 89 Builder.defineMacro("__strong", ""); 90 else 91 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 92 93 if (Opts.Static) 94 Builder.defineMacro("__STATIC__"); 95 else 96 Builder.defineMacro("__DYNAMIC__"); 97 98 if (Opts.POSIXThreads) 99 Builder.defineMacro("_REENTRANT"); 100 101 // Get the OS version number from the triple. 102 unsigned Maj, Min, Rev; 103 104 // If no version was given, default to to 10.4.0, for simplifying tests. 105 if (Triple.getOSName() == "darwin") { 106 Min = Rev = 0; 107 Maj = 8; 108 } else 109 Triple.getDarwinNumber(Maj, Min, Rev); 110 111 // Set the appropriate OS version define. 112 if (Triple.getEnvironmentName() == "iphoneos") { 113 assert(Maj < 10 && Min < 99 && Rev < 99 && "Invalid version!"); 114 char Str[6]; 115 Str[0] = '0' + Maj; 116 Str[1] = '0' + (Min / 10); 117 Str[2] = '0' + (Min % 10); 118 Str[3] = '0' + (Rev / 10); 119 Str[4] = '0' + (Rev % 10); 120 Str[5] = '\0'; 121 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 122 } else { 123 // For historical reasons that make little sense, the version passed here is 124 // the "darwin" version, which drops the 10 and offsets by 4. 125 Rev = Min; 126 Min = Maj - 4; 127 Maj = 10; 128 129 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 130 assert(Maj < 99 && Min < 10 && Rev < 10 && "Invalid version!"); 131 char Str[5]; 132 Str[0] = '0' + (Maj / 10); 133 Str[1] = '0' + (Maj % 10); 134 Str[2] = '0' + Min; 135 Str[3] = '0' + Rev; 136 Str[4] = '\0'; 137 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 138 } 139} 140 141namespace { 142template<typename Target> 143class DarwinTargetInfo : public OSTargetInfo<Target> { 144protected: 145 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 146 MacroBuilder &Builder) const { 147 getDarwinDefines(Builder, Opts, Triple); 148 } 149 150public: 151 DarwinTargetInfo(const std::string& triple) : 152 OSTargetInfo<Target>(triple) { 153 this->TLSSupported = llvm::Triple(triple).getDarwinMajorNumber() > 10; 154 } 155 156 virtual std::string isValidSectionSpecifier(llvm::StringRef SR) const { 157 // Let MCSectionMachO validate this. 158 llvm::StringRef Segment, Section; 159 unsigned TAA, StubSize; 160 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 161 TAA, StubSize); 162 } 163 164 virtual const char *getStaticInitSectionSpecifier() const { 165 // FIXME: We should return 0 when building kexts. 166 return "__TEXT,__StaticInit,regular,pure_instructions"; 167 } 168 169}; 170 171 172// DragonFlyBSD Target 173template<typename Target> 174class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 175protected: 176 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 177 MacroBuilder &Builder) const { 178 // DragonFly defines; list based off of gcc output 179 Builder.defineMacro("__DragonFly__"); 180 Builder.defineMacro("__DragonFly_cc_version", "100001"); 181 Builder.defineMacro("__ELF__"); 182 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 183 Builder.defineMacro("__tune_i386__"); 184 DefineStd(Builder, "unix", Opts); 185 } 186public: 187 DragonFlyBSDTargetInfo(const std::string &triple) 188 : OSTargetInfo<Target>(triple) {} 189}; 190 191// FreeBSD Target 192template<typename Target> 193class FreeBSDTargetInfo : public OSTargetInfo<Target> { 194protected: 195 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 196 MacroBuilder &Builder) const { 197 // FreeBSD defines; list based off of gcc output 198 199 // FIXME: Move version number handling to llvm::Triple. 200 llvm::StringRef Release = Triple.getOSName().substr(strlen("freebsd"), 1); 201 202 Builder.defineMacro("__FreeBSD__", Release); 203 Builder.defineMacro("__FreeBSD_cc_version", Release + "00001"); 204 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 205 DefineStd(Builder, "unix", Opts); 206 Builder.defineMacro("__ELF__"); 207 } 208public: 209 FreeBSDTargetInfo(const std::string &triple) 210 : OSTargetInfo<Target>(triple) { 211 this->UserLabelPrefix = ""; 212 } 213}; 214 215// Minix Target 216template<typename Target> 217class MinixTargetInfo : public OSTargetInfo<Target> { 218protected: 219 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 220 MacroBuilder &Builder) const { 221 // Minix defines 222 223 Builder.defineMacro("__minix", "3"); 224 Builder.defineMacro("_EM_WSIZE", "4"); 225 Builder.defineMacro("_EM_PSIZE", "4"); 226 Builder.defineMacro("_EM_SSIZE", "2"); 227 Builder.defineMacro("_EM_LSIZE", "4"); 228 Builder.defineMacro("_EM_FSIZE", "4"); 229 Builder.defineMacro("_EM_DSIZE", "8"); 230 DefineStd(Builder, "unix", Opts); 231 } 232public: 233 MinixTargetInfo(const std::string &triple) 234 : OSTargetInfo<Target>(triple) { 235 this->UserLabelPrefix = ""; 236 } 237}; 238 239// Linux target 240template<typename Target> 241class LinuxTargetInfo : public OSTargetInfo<Target> { 242protected: 243 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 244 MacroBuilder &Builder) const { 245 // Linux defines; list based off of gcc output 246 DefineStd(Builder, "unix", Opts); 247 DefineStd(Builder, "linux", Opts); 248 Builder.defineMacro("__gnu_linux__"); 249 Builder.defineMacro("__ELF__"); 250 if (Opts.POSIXThreads) 251 Builder.defineMacro("_REENTRANT"); 252 if (Opts.CPlusPlus) 253 Builder.defineMacro("_GNU_SOURCE"); 254 } 255public: 256 LinuxTargetInfo(const std::string& triple) 257 : OSTargetInfo<Target>(triple) { 258 this->UserLabelPrefix = ""; 259 } 260}; 261 262// NetBSD Target 263template<typename Target> 264class NetBSDTargetInfo : public OSTargetInfo<Target> { 265protected: 266 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 267 MacroBuilder &Builder) const { 268 // NetBSD defines; list based off of gcc output 269 Builder.defineMacro("__NetBSD__"); 270 Builder.defineMacro("__unix__"); 271 Builder.defineMacro("__ELF__"); 272 if (Opts.POSIXThreads) 273 Builder.defineMacro("_POSIX_THREADS"); 274 } 275public: 276 NetBSDTargetInfo(const std::string &triple) 277 : OSTargetInfo<Target>(triple) { 278 this->UserLabelPrefix = ""; 279 } 280}; 281 282// OpenBSD Target 283template<typename Target> 284class OpenBSDTargetInfo : public OSTargetInfo<Target> { 285protected: 286 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 287 MacroBuilder &Builder) const { 288 // OpenBSD defines; list based off of gcc output 289 290 Builder.defineMacro("__OpenBSD__"); 291 DefineStd(Builder, "unix", Opts); 292 Builder.defineMacro("__ELF__"); 293 if (Opts.POSIXThreads) 294 Builder.defineMacro("_POSIX_THREADS"); 295 } 296public: 297 OpenBSDTargetInfo(const std::string &triple) 298 : OSTargetInfo<Target>(triple) {} 299}; 300 301// PSP Target 302template<typename Target> 303class PSPTargetInfo : public OSTargetInfo<Target> { 304protected: 305 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 306 MacroBuilder &Builder) const { 307 // PSP defines; list based on the output of the pspdev gcc toolchain. 308 Builder.defineMacro("PSP"); 309 Builder.defineMacro("_PSP"); 310 Builder.defineMacro("__psp__"); 311 Builder.defineMacro("__ELF__"); 312 } 313public: 314 PSPTargetInfo(const std::string& triple) 315 : OSTargetInfo<Target>(triple) { 316 this->UserLabelPrefix = ""; 317 } 318}; 319 320// PS3 PPU Target 321template<typename Target> 322class PS3PPUTargetInfo : public OSTargetInfo<Target> { 323protected: 324 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 325 MacroBuilder &Builder) const { 326 // PS3 PPU defines. 327 Builder.defineMacro("__PPC__"); 328 Builder.defineMacro("__PPU__"); 329 Builder.defineMacro("__CELLOS_LV2__"); 330 Builder.defineMacro("__ELF__"); 331 Builder.defineMacro("__LP32__"); 332 Builder.defineMacro("_ARCH_PPC64"); 333 Builder.defineMacro("__powerpc64__"); 334 } 335public: 336 PS3PPUTargetInfo(const std::string& triple) 337 : OSTargetInfo<Target>(triple) { 338 this->UserLabelPrefix = ""; 339 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32; 340 this->IntMaxType = TargetInfo::SignedLongLong; 341 this->UIntMaxType = TargetInfo::UnsignedLongLong; 342 this->Int64Type = TargetInfo::SignedLongLong; 343 this->SizeType = TargetInfo::UnsignedInt; 344 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 345 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 346 } 347}; 348 349// FIXME: Need a real SPU target. 350// PS3 SPU Target 351template<typename Target> 352class PS3SPUTargetInfo : public OSTargetInfo<Target> { 353protected: 354 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 355 MacroBuilder &Builder) const { 356 // PS3 PPU defines. 357 Builder.defineMacro("__SPU__"); 358 Builder.defineMacro("__ELF__"); 359 } 360public: 361 PS3SPUTargetInfo(const std::string& triple) 362 : OSTargetInfo<Target>(triple) { 363 this->UserLabelPrefix = ""; 364 } 365}; 366 367// AuroraUX target 368template<typename Target> 369class AuroraUXTargetInfo : public OSTargetInfo<Target> { 370protected: 371 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 372 MacroBuilder &Builder) const { 373 DefineStd(Builder, "sun", Opts); 374 DefineStd(Builder, "unix", Opts); 375 Builder.defineMacro("__ELF__"); 376 Builder.defineMacro("__svr4__"); 377 Builder.defineMacro("__SVR4"); 378 } 379public: 380 AuroraUXTargetInfo(const std::string& triple) 381 : OSTargetInfo<Target>(triple) { 382 this->UserLabelPrefix = ""; 383 this->WCharType = this->SignedLong; 384 // FIXME: WIntType should be SignedLong 385 } 386}; 387 388// Solaris target 389template<typename Target> 390class SolarisTargetInfo : public OSTargetInfo<Target> { 391protected: 392 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 393 MacroBuilder &Builder) const { 394 DefineStd(Builder, "sun", Opts); 395 DefineStd(Builder, "unix", Opts); 396 Builder.defineMacro("__ELF__"); 397 Builder.defineMacro("__svr4__"); 398 Builder.defineMacro("__SVR4"); 399 } 400public: 401 SolarisTargetInfo(const std::string& triple) 402 : OSTargetInfo<Target>(triple) { 403 this->UserLabelPrefix = ""; 404 this->WCharType = this->SignedLong; 405 // FIXME: WIntType should be SignedLong 406 } 407}; 408} // end anonymous namespace. 409 410//===----------------------------------------------------------------------===// 411// Specific target implementations. 412//===----------------------------------------------------------------------===// 413 414namespace { 415// PPC abstract base class 416class PPCTargetInfo : public TargetInfo { 417 static const Builtin::Info BuiltinInfo[]; 418 static const char * const GCCRegNames[]; 419 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 420 421public: 422 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {} 423 424 virtual void getTargetBuiltins(const Builtin::Info *&Records, 425 unsigned &NumRecords) const { 426 Records = BuiltinInfo; 427 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 428 } 429 430 virtual void getTargetDefines(const LangOptions &Opts, 431 MacroBuilder &Builder) const; 432 433 virtual const char *getVAListDeclaration() const { 434 return "typedef char* __builtin_va_list;"; 435 // This is the right definition for ABI/V4: System V.4/eabi. 436 /*return "typedef struct __va_list_tag {" 437 " unsigned char gpr;" 438 " unsigned char fpr;" 439 " unsigned short reserved;" 440 " void* overflow_arg_area;" 441 " void* reg_save_area;" 442 "} __builtin_va_list[1];";*/ 443 } 444 virtual void getGCCRegNames(const char * const *&Names, 445 unsigned &NumNames) const; 446 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 447 unsigned &NumAliases) const; 448 virtual bool validateAsmConstraint(const char *&Name, 449 TargetInfo::ConstraintInfo &Info) const { 450 switch (*Name) { 451 default: return false; 452 case 'O': // Zero 453 break; 454 case 'b': // Base register 455 case 'f': // Floating point register 456 Info.setAllowsRegister(); 457 break; 458 // FIXME: The following are added to allow parsing. 459 // I just took a guess at what the actions should be. 460 // Also, is more specific checking needed? I.e. specific registers? 461 case 'd': // Floating point register (containing 64-bit value) 462 case 'v': // Altivec vector register 463 Info.setAllowsRegister(); 464 break; 465 case 'w': 466 switch (Name[1]) { 467 case 'd':// VSX vector register to hold vector double data 468 case 'f':// VSX vector register to hold vector float data 469 case 's':// VSX vector register to hold scalar float data 470 case 'a':// Any VSX register 471 break; 472 default: 473 return false; 474 } 475 Info.setAllowsRegister(); 476 Name++; // Skip over 'w'. 477 break; 478 case 'h': // `MQ', `CTR', or `LINK' register 479 case 'q': // `MQ' register 480 case 'c': // `CTR' register 481 case 'l': // `LINK' register 482 case 'x': // `CR' register (condition register) number 0 483 case 'y': // `CR' register (condition register) 484 case 'z': // `XER[CA]' carry bit (part of the XER register) 485 Info.setAllowsRegister(); 486 break; 487 case 'I': // Signed 16-bit constant 488 case 'J': // Unsigned 16-bit constant shifted left 16 bits 489 // (use `L' instead for SImode constants) 490 case 'K': // Unsigned 16-bit constant 491 case 'L': // Signed 16-bit constant shifted left 16 bits 492 case 'M': // Constant larger than 31 493 case 'N': // Exact power of 2 494 case 'P': // Constant whose negation is a signed 16-bit constant 495 case 'G': // Floating point constant that can be loaded into a 496 // register with one instruction per word 497 case 'H': // Integer/Floating point constant that can be loaded 498 // into a register using three instructions 499 break; 500 case 'm': // Memory operand. Note that on PowerPC targets, m can 501 // include addresses that update the base register. It 502 // is therefore only safe to use `m' in an asm statement 503 // if that asm statement accesses the operand exactly once. 504 // The asm statement must also use `%U<opno>' as a 505 // placeholder for the �update� flag in the corresponding 506 // load or store instruction. For example: 507 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 508 // is correct but: 509 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 510 // is not. Use es rather than m if you don't want the base 511 // register to be updated. 512 case 'e': 513 if (Name[1] != 's') 514 return false; 515 // es: A �stable� memory operand; that is, one which does not 516 // include any automodification of the base register. Unlike 517 // `m', this constraint can be used in asm statements that 518 // might access the operand several times, or that might not 519 // access it at all. 520 Info.setAllowsMemory(); 521 Name++; // Skip over 'e'. 522 break; 523 case 'Q': // Memory operand that is an offset from a register (it is 524 // usually better to use `m' or `es' in asm statements) 525 case 'Z': // Memory operand that is an indexed or indirect from a 526 // register (it is usually better to use `m' or `es' in 527 // asm statements) 528 Info.setAllowsMemory(); 529 Info.setAllowsRegister(); 530 break; 531 case 'R': // AIX TOC entry 532 case 'a': // Address operand that is an indexed or indirect from a 533 // register (`p' is preferable for asm statements) 534 case 'S': // Constant suitable as a 64-bit mask operand 535 case 'T': // Constant suitable as a 32-bit mask operand 536 case 'U': // System V Release 4 small data area reference 537 case 't': // AND masks that can be performed by two rldic{l, r} 538 // instructions 539 case 'W': // Vector constant that does not require memory 540 case 'j': // Vector constant that is all zeros. 541 break; 542 // End FIXME. 543 } 544 return true; 545 } 546 virtual const char *getClobbers() const { 547 return ""; 548 } 549}; 550 551const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 552#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, false }, 553#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER, false }, 554#include "clang/Basic/BuiltinsPPC.def" 555}; 556 557 558/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 559/// #defines that are not tied to a specific subtarget. 560void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 561 MacroBuilder &Builder) const { 562 // Target identification. 563 Builder.defineMacro("__ppc__"); 564 Builder.defineMacro("_ARCH_PPC"); 565 Builder.defineMacro("__powerpc__"); 566 Builder.defineMacro("__POWERPC__"); 567 if (PointerWidth == 64) { 568 Builder.defineMacro("_ARCH_PPC64"); 569 Builder.defineMacro("_LP64"); 570 Builder.defineMacro("__LP64__"); 571 Builder.defineMacro("__powerpc64__"); 572 Builder.defineMacro("__ppc64__"); 573 } else { 574 Builder.defineMacro("__ppc__"); 575 } 576 577 // Target properties. 578 Builder.defineMacro("_BIG_ENDIAN"); 579 Builder.defineMacro("__BIG_ENDIAN__"); 580 581 // Subtarget options. 582 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 583 Builder.defineMacro("__REGISTER_PREFIX__", ""); 584 585 // FIXME: Should be controlled by command line option. 586 Builder.defineMacro("__LONG_DOUBLE_128__"); 587 588 if (Opts.AltiVec) { 589 Builder.defineMacro("__VEC__", "10206"); 590 Builder.defineMacro("__ALTIVEC__"); 591 } 592} 593 594 595const char * const PPCTargetInfo::GCCRegNames[] = { 596 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 597 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 598 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 599 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 600 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 601 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 602 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 603 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 604 "mq", "lr", "ctr", "ap", 605 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 606 "xer", 607 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 608 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 609 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 610 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 611 "vrsave", "vscr", 612 "spe_acc", "spefscr", 613 "sfp" 614}; 615 616void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 617 unsigned &NumNames) const { 618 Names = GCCRegNames; 619 NumNames = llvm::array_lengthof(GCCRegNames); 620} 621 622const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 623 // While some of these aliases do map to different registers 624 // they still share the same register name. 625 { { "0" }, "r0" }, 626 { { "1"}, "r1" }, 627 { { "2" }, "r2" }, 628 { { "3" }, "r3" }, 629 { { "4" }, "r4" }, 630 { { "5" }, "r5" }, 631 { { "6" }, "r6" }, 632 { { "7" }, "r7" }, 633 { { "8" }, "r8" }, 634 { { "9" }, "r9" }, 635 { { "10" }, "r10" }, 636 { { "11" }, "r11" }, 637 { { "12" }, "r12" }, 638 { { "13" }, "r13" }, 639 { { "14" }, "r14" }, 640 { { "15" }, "r15" }, 641 { { "16" }, "r16" }, 642 { { "17" }, "r17" }, 643 { { "18" }, "r18" }, 644 { { "19" }, "r19" }, 645 { { "20" }, "r20" }, 646 { { "21" }, "r21" }, 647 { { "22" }, "r22" }, 648 { { "23" }, "r23" }, 649 { { "24" }, "r24" }, 650 { { "25" }, "r25" }, 651 { { "26" }, "r26" }, 652 { { "27" }, "r27" }, 653 { { "28" }, "r28" }, 654 { { "29" }, "r29" }, 655 { { "30" }, "r30" }, 656 { { "31" }, "r31" }, 657 { { "fr0" }, "f0" }, 658 { { "fr1" }, "f1" }, 659 { { "fr2" }, "f2" }, 660 { { "fr3" }, "f3" }, 661 { { "fr4" }, "f4" }, 662 { { "fr5" }, "f5" }, 663 { { "fr6" }, "f6" }, 664 { { "fr7" }, "f7" }, 665 { { "fr8" }, "f8" }, 666 { { "fr9" }, "f9" }, 667 { { "fr10" }, "f10" }, 668 { { "fr11" }, "f11" }, 669 { { "fr12" }, "f12" }, 670 { { "fr13" }, "f13" }, 671 { { "fr14" }, "f14" }, 672 { { "fr15" }, "f15" }, 673 { { "fr16" }, "f16" }, 674 { { "fr17" }, "f17" }, 675 { { "fr18" }, "f18" }, 676 { { "fr19" }, "f19" }, 677 { { "fr20" }, "f20" }, 678 { { "fr21" }, "f21" }, 679 { { "fr22" }, "f22" }, 680 { { "fr23" }, "f23" }, 681 { { "fr24" }, "f24" }, 682 { { "fr25" }, "f25" }, 683 { { "fr26" }, "f26" }, 684 { { "fr27" }, "f27" }, 685 { { "fr28" }, "f28" }, 686 { { "fr29" }, "f29" }, 687 { { "fr30" }, "f30" }, 688 { { "fr31" }, "f31" }, 689 { { "cc" }, "cr0" }, 690}; 691 692void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 693 unsigned &NumAliases) const { 694 Aliases = GCCRegAliases; 695 NumAliases = llvm::array_lengthof(GCCRegAliases); 696} 697} // end anonymous namespace. 698 699namespace { 700class PPC32TargetInfo : public PPCTargetInfo { 701public: 702 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 703 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 704 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 705 706 if (getTriple().getOS() == llvm::Triple::FreeBSD) 707 this->SizeType = TargetInfo::UnsignedInt; 708 } 709}; 710} // end anonymous namespace. 711 712namespace { 713class PPC64TargetInfo : public PPCTargetInfo { 714public: 715 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 716 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 717 IntMaxType = SignedLong; 718 UIntMaxType = UnsignedLong; 719 Int64Type = SignedLong; 720 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 721 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 722 } 723}; 724} // end anonymous namespace. 725 726 727namespace { 728class DarwinPPCTargetInfo : 729 public DarwinTargetInfo<PPCTargetInfo> { 730public: 731 DarwinPPCTargetInfo(const std::string& triple) 732 : DarwinTargetInfo<PPCTargetInfo>(triple) { 733 HasAlignMac68kSupport = true; 734 } 735}; 736 737class DarwinPPC64TargetInfo : 738 public DarwinTargetInfo<PPC64TargetInfo> { 739public: 740 DarwinPPC64TargetInfo(const std::string& triple) 741 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 742 HasAlignMac68kSupport = true; 743 } 744}; 745} // end anonymous namespace. 746 747namespace { 748// MBlaze abstract base class 749class MBlazeTargetInfo : public TargetInfo { 750 static const char * const GCCRegNames[]; 751 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 752 753public: 754 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 755 DescriptionString = "E-p:32:32-i8:8:8-i16:16:16-i64:32:32-f64:32:32-" 756 "v64:32:32-v128:32:32-n32"; 757 } 758 759 virtual void getTargetBuiltins(const Builtin::Info *&Records, 760 unsigned &NumRecords) const { 761 // FIXME: Implement. 762 Records = 0; 763 NumRecords = 0; 764 } 765 766 virtual void getTargetDefines(const LangOptions &Opts, 767 MacroBuilder &Builder) const; 768 769 virtual const char *getVAListDeclaration() const { 770 return "typedef char* __builtin_va_list;"; 771 } 772 virtual const char *getTargetPrefix() const { 773 return "mblaze"; 774 } 775 virtual void getGCCRegNames(const char * const *&Names, 776 unsigned &NumNames) const; 777 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 778 unsigned &NumAliases) const; 779 virtual bool validateAsmConstraint(const char *&Name, 780 TargetInfo::ConstraintInfo &Info) const { 781 switch (*Name) { 782 default: return false; 783 case 'O': // Zero 784 return true; 785 case 'b': // Base register 786 case 'f': // Floating point register 787 Info.setAllowsRegister(); 788 return true; 789 } 790 } 791 virtual const char *getClobbers() const { 792 return ""; 793 } 794}; 795 796/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 797/// #defines that are not tied to a specific subtarget. 798void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 799 MacroBuilder &Builder) const { 800 // Target identification. 801 Builder.defineMacro("__microblaze__"); 802 Builder.defineMacro("_ARCH_MICROBLAZE"); 803 Builder.defineMacro("__MICROBLAZE__"); 804 805 // Target properties. 806 Builder.defineMacro("_BIG_ENDIAN"); 807 Builder.defineMacro("__BIG_ENDIAN__"); 808 809 // Subtarget options. 810 Builder.defineMacro("__REGISTER_PREFIX__", ""); 811} 812 813 814const char * const MBlazeTargetInfo::GCCRegNames[] = { 815 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 816 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 817 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 818 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 819 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 820 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 821 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 822 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 823 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 824 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 825}; 826 827void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 828 unsigned &NumNames) const { 829 Names = GCCRegNames; 830 NumNames = llvm::array_lengthof(GCCRegNames); 831} 832 833const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 834 { {"f0"}, "r0" }, 835 { {"f1"}, "r1" }, 836 { {"f2"}, "r2" }, 837 { {"f3"}, "r3" }, 838 { {"f4"}, "r4" }, 839 { {"f5"}, "r5" }, 840 { {"f6"}, "r6" }, 841 { {"f7"}, "r7" }, 842 { {"f8"}, "r8" }, 843 { {"f9"}, "r9" }, 844 { {"f10"}, "r10" }, 845 { {"f11"}, "r11" }, 846 { {"f12"}, "r12" }, 847 { {"f13"}, "r13" }, 848 { {"f14"}, "r14" }, 849 { {"f15"}, "r15" }, 850 { {"f16"}, "r16" }, 851 { {"f17"}, "r17" }, 852 { {"f18"}, "r18" }, 853 { {"f19"}, "r19" }, 854 { {"f20"}, "r20" }, 855 { {"f21"}, "r21" }, 856 { {"f22"}, "r22" }, 857 { {"f23"}, "r23" }, 858 { {"f24"}, "r24" }, 859 { {"f25"}, "r25" }, 860 { {"f26"}, "r26" }, 861 { {"f27"}, "r27" }, 862 { {"f28"}, "r28" }, 863 { {"f29"}, "r29" }, 864 { {"f30"}, "r30" }, 865 { {"f31"}, "r31" }, 866}; 867 868void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 869 unsigned &NumAliases) const { 870 Aliases = GCCRegAliases; 871 NumAliases = llvm::array_lengthof(GCCRegAliases); 872} 873} // end anonymous namespace. 874 875namespace { 876// Namespace for x86 abstract base class 877const Builtin::Info BuiltinInfo[] = { 878#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, false }, 879#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER, false }, 880#include "clang/Basic/BuiltinsX86.def" 881}; 882 883static const char* const GCCRegNames[] = { 884 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 885 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 886 "argp", "flags", "fspr", "dirflag", "frame", 887 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 888 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 889 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 890 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15" 891}; 892 893const TargetInfo::GCCRegAlias GCCRegAliases[] = { 894 { { "al", "ah", "eax", "rax" }, "ax" }, 895 { { "bl", "bh", "ebx", "rbx" }, "bx" }, 896 { { "cl", "ch", "ecx", "rcx" }, "cx" }, 897 { { "dl", "dh", "edx", "rdx" }, "dx" }, 898 { { "esi", "rsi" }, "si" }, 899 { { "edi", "rdi" }, "di" }, 900 { { "esp", "rsp" }, "sp" }, 901 { { "ebp", "rbp" }, "bp" }, 902}; 903 904// X86 target abstract base class; x86-32 and x86-64 are very close, so 905// most of the implementation can be shared. 906class X86TargetInfo : public TargetInfo { 907 enum X86SSEEnum { 908 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 909 } SSELevel; 910 enum AMD3DNowEnum { 911 NoAMD3DNow, AMD3DNow, AMD3DNowAthlon 912 } AMD3DNowLevel; 913 914 bool HasAES; 915 bool HasAVX; 916 917public: 918 X86TargetInfo(const std::string& triple) 919 : TargetInfo(triple), SSELevel(NoMMXSSE), AMD3DNowLevel(NoAMD3DNow), 920 HasAES(false), HasAVX(false) { 921 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 922 } 923 virtual void getTargetBuiltins(const Builtin::Info *&Records, 924 unsigned &NumRecords) const { 925 Records = BuiltinInfo; 926 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 927 } 928 virtual void getGCCRegNames(const char * const *&Names, 929 unsigned &NumNames) const { 930 Names = GCCRegNames; 931 NumNames = llvm::array_lengthof(GCCRegNames); 932 } 933 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 934 unsigned &NumAliases) const { 935 Aliases = GCCRegAliases; 936 NumAliases = llvm::array_lengthof(GCCRegAliases); 937 } 938 virtual bool validateAsmConstraint(const char *&Name, 939 TargetInfo::ConstraintInfo &info) const; 940 virtual std::string convertConstraint(const char Constraint) const; 941 virtual const char *getClobbers() const { 942 return "~{dirflag},~{fpsr},~{flags}"; 943 } 944 virtual void getTargetDefines(const LangOptions &Opts, 945 MacroBuilder &Builder) const; 946 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 947 const std::string &Name, 948 bool Enabled) const; 949 virtual void getDefaultFeatures(const std::string &CPU, 950 llvm::StringMap<bool> &Features) const; 951 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 952}; 953 954void X86TargetInfo::getDefaultFeatures(const std::string &CPU, 955 llvm::StringMap<bool> &Features) const { 956 // FIXME: This should not be here. 957 Features["3dnow"] = false; 958 Features["3dnowa"] = false; 959 Features["mmx"] = false; 960 Features["sse"] = false; 961 Features["sse2"] = false; 962 Features["sse3"] = false; 963 Features["ssse3"] = false; 964 Features["sse41"] = false; 965 Features["sse42"] = false; 966 Features["aes"] = false; 967 Features["avx"] = false; 968 969 // LLVM does not currently recognize this. 970 // Features["sse4a"] = false; 971 972 // FIXME: This *really* should not be here. 973 974 // X86_64 always has SSE2. 975 if (PointerWidth == 64) 976 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 977 978 if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" || 979 CPU == "pentium" || CPU == "i686" || CPU == "pentiumpro") 980 ; 981 else if (CPU == "pentium-mmx" || CPU == "pentium2") 982 setFeatureEnabled(Features, "mmx", true); 983 else if (CPU == "pentium3") 984 setFeatureEnabled(Features, "sse", true); 985 else if (CPU == "pentium-m" || CPU == "pentium4" || CPU == "x86-64") 986 setFeatureEnabled(Features, "sse2", true); 987 else if (CPU == "yonah" || CPU == "prescott" || CPU == "nocona") 988 setFeatureEnabled(Features, "sse3", true); 989 else if (CPU == "core2") 990 setFeatureEnabled(Features, "ssse3", true); 991 else if (CPU == "penryn") { 992 setFeatureEnabled(Features, "sse4", true); 993 Features["sse42"] = false; 994 } else if (CPU == "atom") 995 setFeatureEnabled(Features, "sse3", true); 996 else if (CPU == "corei7") { 997 setFeatureEnabled(Features, "sse4", true); 998 setFeatureEnabled(Features, "aes", true); 999 } 1000 else if (CPU == "k6" || CPU == "winchip-c6") 1001 setFeatureEnabled(Features, "mmx", true); 1002 else if (CPU == "k6-2" || CPU == "k6-3" || CPU == "athlon" || 1003 CPU == "athlon-tbird" || CPU == "winchip2" || CPU == "c3") { 1004 setFeatureEnabled(Features, "mmx", true); 1005 setFeatureEnabled(Features, "3dnow", true); 1006 } else if (CPU == "athlon-4" || CPU == "athlon-xp" || CPU == "athlon-mp") { 1007 setFeatureEnabled(Features, "sse", true); 1008 setFeatureEnabled(Features, "3dnowa", true); 1009 } else if (CPU == "k8" || CPU == "opteron" || CPU == "athlon64" || 1010 CPU == "athlon-fx") { 1011 setFeatureEnabled(Features, "sse2", true); 1012 setFeatureEnabled(Features, "3dnowa", true); 1013 } else if (CPU == "c3-2") 1014 setFeatureEnabled(Features, "sse", true); 1015} 1016 1017bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1018 const std::string &Name, 1019 bool Enabled) const { 1020 // FIXME: This *really* should not be here. We need some way of translating 1021 // options into llvm subtarget features. 1022 if (!Features.count(Name) && 1023 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1024 return false; 1025 1026 if (Enabled) { 1027 if (Name == "mmx") 1028 Features["mmx"] = true; 1029 else if (Name == "sse") 1030 Features["mmx"] = Features["sse"] = true; 1031 else if (Name == "sse2") 1032 Features["mmx"] = Features["sse"] = Features["sse2"] = true; 1033 else if (Name == "sse3") 1034 Features["mmx"] = Features["sse"] = Features["sse2"] = 1035 Features["sse3"] = true; 1036 else if (Name == "ssse3") 1037 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1038 Features["ssse3"] = true; 1039 else if (Name == "sse4" || Name == "sse4.2") 1040 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1041 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1042 else if (Name == "sse4.1") 1043 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1044 Features["ssse3"] = Features["sse41"] = true; 1045 else if (Name == "3dnow") 1046 Features["3dnowa"] = true; 1047 else if (Name == "3dnowa") 1048 Features["3dnow"] = Features["3dnowa"] = true; 1049 else if (Name == "aes") 1050 Features["aes"] = true; 1051 else if (Name == "avx") 1052 Features["avx"] = true; 1053 } else { 1054 if (Name == "mmx") 1055 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1056 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1057 else if (Name == "sse") 1058 Features["sse"] = Features["sse2"] = Features["sse3"] = 1059 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1060 else if (Name == "sse2") 1061 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1062 Features["sse41"] = Features["sse42"] = false; 1063 else if (Name == "sse3") 1064 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1065 Features["sse42"] = false; 1066 else if (Name == "ssse3") 1067 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1068 else if (Name == "sse4") 1069 Features["sse41"] = Features["sse42"] = false; 1070 else if (Name == "sse4.2") 1071 Features["sse42"] = false; 1072 else if (Name == "sse4.1") 1073 Features["sse41"] = Features["sse42"] = false; 1074 else if (Name == "3dnow") 1075 Features["3dnow"] = Features["3dnowa"] = false; 1076 else if (Name == "3dnowa") 1077 Features["3dnowa"] = false; 1078 else if (Name == "aes") 1079 Features["aes"] = false; 1080 else if (Name == "avx") 1081 Features["avx"] = false; 1082 } 1083 1084 return true; 1085} 1086 1087/// HandleTargetOptions - Perform initialization based on the user 1088/// configured set of features. 1089void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1090 // Remember the maximum enabled sselevel. 1091 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1092 // Ignore disabled features. 1093 if (Features[i][0] == '-') 1094 continue; 1095 1096 if (Features[i].substr(1) == "aes") { 1097 HasAES = true; 1098 continue; 1099 } 1100 1101 // FIXME: Not sure yet how to treat AVX in regard to SSE levels. 1102 // For now let it be enabled together with other SSE levels. 1103 if (Features[i].substr(1) == "avx") { 1104 HasAVX = true; 1105 continue; 1106 } 1107 1108 assert(Features[i][0] == '+' && "Invalid target feature!"); 1109 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1110 .Case("sse42", SSE42) 1111 .Case("sse41", SSE41) 1112 .Case("ssse3", SSSE3) 1113 .Case("sse3", SSE3) 1114 .Case("sse2", SSE2) 1115 .Case("sse", SSE1) 1116 .Case("mmx", MMX) 1117 .Default(NoMMXSSE); 1118 SSELevel = std::max(SSELevel, Level); 1119 1120 AMD3DNowEnum ThreeDNowLevel = 1121 llvm::StringSwitch<AMD3DNowEnum>(Features[i].substr(1)) 1122 .Case("3dnowa", AMD3DNowAthlon) 1123 .Case("3dnow", AMD3DNow) 1124 .Default(NoAMD3DNow); 1125 1126 AMD3DNowLevel = std::max(AMD3DNowLevel, ThreeDNowLevel); 1127 } 1128} 1129 1130/// X86TargetInfo::getTargetDefines - Return a set of the X86-specific #defines 1131/// that are not tied to a specific subtarget. 1132void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1133 MacroBuilder &Builder) const { 1134 // Target identification. 1135 if (PointerWidth == 64) { 1136 Builder.defineMacro("_LP64"); 1137 Builder.defineMacro("__LP64__"); 1138 Builder.defineMacro("__amd64__"); 1139 Builder.defineMacro("__amd64"); 1140 Builder.defineMacro("__x86_64"); 1141 Builder.defineMacro("__x86_64__"); 1142 } else { 1143 DefineStd(Builder, "i386", Opts); 1144 } 1145 1146 if (HasAES) 1147 Builder.defineMacro("__AES__"); 1148 1149 if (HasAVX) 1150 Builder.defineMacro("__AVX__"); 1151 1152 // Target properties. 1153 Builder.defineMacro("__LITTLE_ENDIAN__"); 1154 1155 // Subtarget options. 1156 Builder.defineMacro("__nocona"); 1157 Builder.defineMacro("__nocona__"); 1158 Builder.defineMacro("__tune_nocona__"); 1159 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1160 1161 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 1162 // functions in glibc header files that use FP Stack inline asm which the 1163 // backend can't deal with (PR879). 1164 Builder.defineMacro("__NO_MATH_INLINES"); 1165 1166 // Each case falls through to the previous one here. 1167 switch (SSELevel) { 1168 case SSE42: 1169 Builder.defineMacro("__SSE4_2__"); 1170 case SSE41: 1171 Builder.defineMacro("__SSE4_1__"); 1172 case SSSE3: 1173 Builder.defineMacro("__SSSE3__"); 1174 case SSE3: 1175 Builder.defineMacro("__SSE3__"); 1176 case SSE2: 1177 Builder.defineMacro("__SSE2__"); 1178 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 1179 case SSE1: 1180 Builder.defineMacro("__SSE__"); 1181 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 1182 case MMX: 1183 Builder.defineMacro("__MMX__"); 1184 case NoMMXSSE: 1185 break; 1186 } 1187 1188 // Each case falls through to the previous one here. 1189 switch (AMD3DNowLevel) { 1190 case AMD3DNowAthlon: 1191 Builder.defineMacro("__3dNOW_A__"); 1192 case AMD3DNow: 1193 Builder.defineMacro("__3dNOW__"); 1194 case NoAMD3DNow: 1195 break; 1196 } 1197} 1198 1199 1200bool 1201X86TargetInfo::validateAsmConstraint(const char *&Name, 1202 TargetInfo::ConstraintInfo &Info) const { 1203 switch (*Name) { 1204 default: return false; 1205 case 'a': // eax. 1206 case 'b': // ebx. 1207 case 'c': // ecx. 1208 case 'd': // edx. 1209 case 'S': // esi. 1210 case 'D': // edi. 1211 case 'A': // edx:eax. 1212 case 't': // top of floating point stack. 1213 case 'u': // second from top of floating point stack. 1214 case 'q': // Any register accessible as [r]l: a, b, c, and d. 1215 case 'y': // Any MMX register. 1216 case 'x': // Any SSE register. 1217 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 1218 case 'e': // 32-bit signed integer constant for use with zero-extending 1219 // x86_64 instructions. 1220 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 1221 // x86_64 instructions. 1222 case 'N': // unsigned 8-bit integer constant for use with in and out 1223 // instructions. 1224 case 'R': // "legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 1225 Info.setAllowsRegister(); 1226 return true; 1227 } 1228} 1229 1230std::string 1231X86TargetInfo::convertConstraint(const char Constraint) const { 1232 switch (Constraint) { 1233 case 'a': return std::string("{ax}"); 1234 case 'b': return std::string("{bx}"); 1235 case 'c': return std::string("{cx}"); 1236 case 'd': return std::string("{dx}"); 1237 case 'S': return std::string("{si}"); 1238 case 'D': return std::string("{di}"); 1239 case 't': // top of floating point stack. 1240 return std::string("{st}"); 1241 case 'u': // second from top of floating point stack. 1242 return std::string("{st(1)}"); // second from top of floating point stack. 1243 default: 1244 return std::string(1, Constraint); 1245 } 1246} 1247} // end anonymous namespace 1248 1249namespace { 1250// X86-32 generic target 1251class X86_32TargetInfo : public X86TargetInfo { 1252public: 1253 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 1254 DoubleAlign = LongLongAlign = 32; 1255 LongDoubleWidth = 96; 1256 LongDoubleAlign = 32; 1257 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1258 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 1259 "a0:0:64-f80:32:32-n8:16:32"; 1260 SizeType = UnsignedInt; 1261 PtrDiffType = SignedInt; 1262 IntPtrType = SignedInt; 1263 RegParmMax = 3; 1264 1265 // Use fpret for all types. 1266 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 1267 (1 << TargetInfo::Double) | 1268 (1 << TargetInfo::LongDouble)); 1269 } 1270 virtual const char *getVAListDeclaration() const { 1271 return "typedef char* __builtin_va_list;"; 1272 } 1273 1274 int getEHDataRegisterNumber(unsigned RegNo) const { 1275 if (RegNo == 0) return 0; 1276 if (RegNo == 1) return 2; 1277 return -1; 1278 } 1279}; 1280} // end anonymous namespace 1281 1282namespace { 1283class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 1284public: 1285 OpenBSDI386TargetInfo(const std::string& triple) : 1286 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 1287 SizeType = UnsignedLong; 1288 IntPtrType = SignedLong; 1289 PtrDiffType = SignedLong; 1290 } 1291}; 1292} // end anonymous namespace 1293 1294namespace { 1295class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 1296public: 1297 DarwinI386TargetInfo(const std::string& triple) : 1298 DarwinTargetInfo<X86_32TargetInfo>(triple) { 1299 LongDoubleWidth = 128; 1300 LongDoubleAlign = 128; 1301 SizeType = UnsignedLong; 1302 IntPtrType = SignedLong; 1303 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1304 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 1305 "a0:0:64-f80:128:128-n8:16:32"; 1306 HasAlignMac68kSupport = true; 1307 } 1308 1309}; 1310} // end anonymous namespace 1311 1312namespace { 1313// x86-32 Windows target 1314class WindowsX86_32TargetInfo : public X86_32TargetInfo { 1315public: 1316 WindowsX86_32TargetInfo(const std::string& triple) 1317 : X86_32TargetInfo(triple) { 1318 TLSSupported = false; 1319 WCharType = UnsignedShort; 1320 DoubleAlign = LongLongAlign = 64; 1321 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1322 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 1323 "v128:128:128-a0:0:64-f80:32:32-n8:16:32"; 1324 } 1325 virtual void getTargetDefines(const LangOptions &Opts, 1326 MacroBuilder &Builder) const { 1327 X86_32TargetInfo::getTargetDefines(Opts, Builder); 1328 // This list is based off of the the list of things MingW defines 1329 Builder.defineMacro("_WIN32"); 1330 DefineStd(Builder, "WIN32", Opts); 1331 DefineStd(Builder, "WINNT", Opts); 1332 Builder.defineMacro("_X86_"); 1333 } 1334}; 1335} // end anonymous namespace 1336 1337namespace { 1338 1339// x86-32 Windows Visual Studio target 1340class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 1341public: 1342 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 1343 : WindowsX86_32TargetInfo(triple) { 1344 } 1345 virtual void getTargetDefines(const LangOptions &Opts, 1346 MacroBuilder &Builder) const { 1347 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 1348 // The value of the following reflects processor type. 1349 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 1350 // We lost the original triple, so we use the default. 1351 Builder.defineMacro("_M_IX86", "600"); 1352 } 1353}; 1354} // end anonymous namespace 1355 1356namespace { 1357// x86-32 MinGW target 1358class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 1359public: 1360 MinGWX86_32TargetInfo(const std::string& triple) 1361 : WindowsX86_32TargetInfo(triple) { 1362 } 1363 virtual void getTargetDefines(const LangOptions &Opts, 1364 MacroBuilder &Builder) const { 1365 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 1366 Builder.defineMacro("__MSVCRT__"); 1367 Builder.defineMacro("__MINGW32__"); 1368 Builder.defineMacro("__declspec", "__declspec"); 1369 } 1370}; 1371} // end anonymous namespace 1372 1373namespace { 1374// x86-32 Cygwin target 1375class CygwinX86_32TargetInfo : public X86_32TargetInfo { 1376public: 1377 CygwinX86_32TargetInfo(const std::string& triple) 1378 : X86_32TargetInfo(triple) { 1379 TLSSupported = false; 1380 WCharType = UnsignedShort; 1381 DoubleAlign = LongLongAlign = 64; 1382 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1383 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 1384 "a0:0:64-f80:32:32-n8:16:32"; 1385 } 1386 virtual void getTargetDefines(const LangOptions &Opts, 1387 MacroBuilder &Builder) const { 1388 X86_32TargetInfo::getTargetDefines(Opts, Builder); 1389 Builder.defineMacro("__CYGWIN__"); 1390 Builder.defineMacro("__CYGWIN32__"); 1391 DefineStd(Builder, "unix", Opts); 1392 if (Opts.CPlusPlus) 1393 Builder.defineMacro("_GNU_SOURCE"); 1394 } 1395}; 1396} // end anonymous namespace 1397 1398namespace { 1399// x86-32 Haiku target 1400class HaikuX86_32TargetInfo : public X86_32TargetInfo { 1401public: 1402 HaikuX86_32TargetInfo(const std::string& triple) 1403 : X86_32TargetInfo(triple) { 1404 SizeType = UnsignedLong; 1405 IntPtrType = SignedLong; 1406 PtrDiffType = SignedLong; 1407 } 1408 virtual void getTargetDefines(const LangOptions &Opts, 1409 MacroBuilder &Builder) const { 1410 X86_32TargetInfo::getTargetDefines(Opts, Builder); 1411 Builder.defineMacro("__INTEL__"); 1412 Builder.defineMacro("__HAIKU__"); 1413 } 1414}; 1415} // end anonymous namespace 1416 1417namespace { 1418// x86-64 generic target 1419class X86_64TargetInfo : public X86TargetInfo { 1420public: 1421 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 1422 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 1423 LongDoubleWidth = 128; 1424 LongDoubleAlign = 128; 1425 LargeArrayMinWidth = 128; 1426 LargeArrayAlign = 128; 1427 IntMaxType = SignedLong; 1428 UIntMaxType = UnsignedLong; 1429 Int64Type = SignedLong; 1430 RegParmMax = 6; 1431 1432 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1433 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 1434 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"; 1435 1436 // Use fpret only for long double. 1437 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 1438 } 1439 virtual const char *getVAListDeclaration() const { 1440 return "typedef struct __va_list_tag {" 1441 " unsigned gp_offset;" 1442 " unsigned fp_offset;" 1443 " void* overflow_arg_area;" 1444 " void* reg_save_area;" 1445 "} __va_list_tag;" 1446 "typedef __va_list_tag __builtin_va_list[1];"; 1447 } 1448 1449 int getEHDataRegisterNumber(unsigned RegNo) const { 1450 if (RegNo == 0) return 0; 1451 if (RegNo == 1) return 1; 1452 return -1; 1453 } 1454}; 1455} // end anonymous namespace 1456 1457namespace { 1458// x86-64 Windows target 1459class WindowsX86_64TargetInfo : public X86_64TargetInfo { 1460public: 1461 WindowsX86_64TargetInfo(const std::string& triple) 1462 : X86_64TargetInfo(triple) { 1463 TLSSupported = false; 1464 WCharType = UnsignedShort; 1465 LongWidth = LongAlign = 32; 1466 DoubleAlign = LongLongAlign = 64; 1467 IntMaxType = SignedLongLong; 1468 UIntMaxType = UnsignedLongLong; 1469 Int64Type = SignedLongLong; 1470 } 1471 virtual void getTargetDefines(const LangOptions &Opts, 1472 MacroBuilder &Builder) const { 1473 X86_64TargetInfo::getTargetDefines(Opts, Builder); 1474 Builder.defineMacro("_WIN64"); 1475 DefineStd(Builder, "WIN64", Opts); 1476 } 1477}; 1478} // end anonymous namespace 1479 1480namespace { 1481// x86-64 Windows Visual Studio target 1482class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 1483public: 1484 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 1485 : WindowsX86_64TargetInfo(triple) { 1486 } 1487 virtual void getTargetDefines(const LangOptions &Opts, 1488 MacroBuilder &Builder) const { 1489 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 1490 Builder.defineMacro("_M_X64"); 1491 } 1492}; 1493} // end anonymous namespace 1494 1495namespace { 1496// x86-64 MinGW target 1497class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 1498public: 1499 MinGWX86_64TargetInfo(const std::string& triple) 1500 : WindowsX86_64TargetInfo(triple) { 1501 } 1502 virtual void getTargetDefines(const LangOptions &Opts, 1503 MacroBuilder &Builder) const { 1504 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 1505 Builder.defineMacro("__MSVCRT__"); 1506 Builder.defineMacro("__MINGW64__"); 1507 Builder.defineMacro("__declspec"); 1508 } 1509}; 1510} // end anonymous namespace 1511 1512namespace { 1513class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 1514public: 1515 DarwinX86_64TargetInfo(const std::string& triple) 1516 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 1517 Int64Type = SignedLongLong; 1518 } 1519}; 1520} // end anonymous namespace 1521 1522namespace { 1523class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 1524public: 1525 OpenBSDX86_64TargetInfo(const std::string& triple) 1526 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 1527 IntMaxType = SignedLongLong; 1528 UIntMaxType = UnsignedLongLong; 1529 Int64Type = SignedLongLong; 1530 } 1531}; 1532} // end anonymous namespace 1533 1534namespace { 1535class ARMTargetInfo : public TargetInfo { 1536 // Possible FPU choices. 1537 enum FPUMode { 1538 NoFPU, 1539 VFP2FPU, 1540 VFP3FPU, 1541 NeonFPU 1542 }; 1543 1544 static bool FPUModeIsVFP(FPUMode Mode) { 1545 return Mode >= VFP2FPU && Mode <= NeonFPU; 1546 } 1547 1548 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1549 static const char * const GCCRegNames[]; 1550 1551 std::string ABI, CPU; 1552 1553 unsigned FPU : 3; 1554 1555 unsigned IsThumb : 1; 1556 1557 // Initialized via features. 1558 unsigned SoftFloat : 1; 1559 unsigned SoftFloatABI : 1; 1560 1561 static const Builtin::Info BuiltinInfo[]; 1562 1563public: 1564 ARMTargetInfo(const std::string &TripleStr) 1565 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 1566 { 1567 SizeType = UnsignedInt; 1568 PtrDiffType = SignedInt; 1569 1570 // {} in inline assembly are neon specifiers, not assembly variant 1571 // specifiers. 1572 NoAsmVariants = true; 1573 1574 // FIXME: Should we just treat this as a feature? 1575 IsThumb = getTriple().getArchName().startswith("thumb"); 1576 if (IsThumb) { 1577 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 1578 "i64:64:64-f32:32:32-f64:64:64-" 1579 "v64:64:64-v128:128:128-a0:0:32-n32"); 1580 } else { 1581 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1582 "i64:64:64-f32:32:32-f64:64:64-" 1583 "v64:64:64-v128:128:128-a0:0:64-n32"); 1584 } 1585 } 1586 virtual const char *getABI() const { return ABI.c_str(); } 1587 virtual bool setABI(const std::string &Name) { 1588 ABI = Name; 1589 1590 // The defaults (above) are for AAPCS, check if we need to change them. 1591 // 1592 // FIXME: We need support for -meabi... we could just mangle it into the 1593 // name. 1594 if (Name == "apcs-gnu") { 1595 DoubleAlign = LongLongAlign = LongDoubleAlign = 32; 1596 SizeType = UnsignedLong; 1597 1598 // Do not respect the alignment of bit-field types when laying out 1599 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 1600 UseBitFieldTypeAlignment = false; 1601 1602 if (IsThumb) { 1603 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 1604 "i64:32:32-f32:32:32-f64:32:32-" 1605 "v64:64:64-v128:128:128-a0:0:32-n32"); 1606 } else { 1607 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1608 "i64:32:32-f32:32:32-f64:32:32-" 1609 "v64:64:64-v128:128:128-a0:0:64-n32"); 1610 } 1611 1612 // FIXME: Override "preferred align" for double and long long. 1613 } else if (Name == "aapcs") { 1614 // FIXME: Enumerated types are variable width in straight AAPCS. 1615 } else if (Name == "aapcs-linux") { 1616 ; 1617 } else 1618 return false; 1619 1620 return true; 1621 } 1622 1623 void getDefaultFeatures(const std::string &CPU, 1624 llvm::StringMap<bool> &Features) const { 1625 // FIXME: This should not be here. 1626 Features["vfp2"] = false; 1627 Features["vfp3"] = false; 1628 Features["neon"] = false; 1629 1630 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 1631 Features["vfp2"] = true; 1632 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 1633 Features["neon"] = true; 1634 } 1635 1636 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1637 const std::string &Name, 1638 bool Enabled) const { 1639 if (Name == "soft-float" || Name == "soft-float-abi") { 1640 Features[Name] = Enabled; 1641 } else if (Name == "vfp2" || Name == "vfp3" || Name == "neon") { 1642 // These effectively are a single option, reset them when any is enabled. 1643 if (Enabled) 1644 Features["vfp2"] = Features["vfp3"] = Features["neon"] = false; 1645 Features[Name] = Enabled; 1646 } else 1647 return false; 1648 1649 return true; 1650 } 1651 1652 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 1653 FPU = NoFPU; 1654 SoftFloat = SoftFloatABI = false; 1655 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 1656 if (Features[i] == "+soft-float") 1657 SoftFloat = true; 1658 else if (Features[i] == "+soft-float-abi") 1659 SoftFloatABI = true; 1660 else if (Features[i] == "+vfp2") 1661 FPU = VFP2FPU; 1662 else if (Features[i] == "+vfp3") 1663 FPU = VFP3FPU; 1664 else if (Features[i] == "+neon") 1665 FPU = NeonFPU; 1666 } 1667 1668 // Remove front-end specific options which the backend handles differently. 1669 std::vector<std::string>::iterator it; 1670 it = std::find(Features.begin(), Features.end(), "+soft-float"); 1671 if (it != Features.end()) 1672 Features.erase(it); 1673 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 1674 if (it != Features.end()) 1675 Features.erase(it); 1676 } 1677 1678 static const char *getCPUDefineSuffix(llvm::StringRef Name) { 1679 return llvm::StringSwitch<const char*>(Name) 1680 .Cases("arm8", "arm810", "4") 1681 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 1682 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 1683 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 1684 .Case("ep9312", "4T") 1685 .Cases("arm10tdmi", "arm1020t", "5T") 1686 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 1687 .Case("arm926ej-s", "5TEJ") 1688 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 1689 .Cases("xscale", "iwmmxt", "5TE") 1690 .Case("arm1136j-s", "6J") 1691 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 1692 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 1693 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 1694 .Cases("cortex-a8", "cortex-a9", "7A") 1695 .Default(0); 1696 } 1697 virtual bool setCPU(const std::string &Name) { 1698 if (!getCPUDefineSuffix(Name)) 1699 return false; 1700 1701 CPU = Name; 1702 return true; 1703 } 1704 virtual void getTargetDefines(const LangOptions &Opts, 1705 MacroBuilder &Builder) const { 1706 // Target identification. 1707 Builder.defineMacro("__arm"); 1708 Builder.defineMacro("__arm__"); 1709 1710 // Target properties. 1711 Builder.defineMacro("__ARMEL__"); 1712 Builder.defineMacro("__LITTLE_ENDIAN__"); 1713 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1714 1715 llvm::StringRef CPUArch = getCPUDefineSuffix(CPU); 1716 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 1717 1718 // Subtarget options. 1719 1720 // FIXME: It's more complicated than this and we don't really support 1721 // interworking. 1722 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 1723 Builder.defineMacro("__THUMB_INTERWORK__"); 1724 1725 if (ABI == "aapcs" || ABI == "aapcs-linux") 1726 Builder.defineMacro("__ARM_EABI__"); 1727 1728 if (SoftFloat) 1729 Builder.defineMacro("__SOFTFP__"); 1730 1731 if (CPU == "xscale") 1732 Builder.defineMacro("__XSCALE__"); 1733 1734 bool IsThumb2 = IsThumb && (CPUArch == "6T2" || CPUArch.startswith("7")); 1735 if (IsThumb) { 1736 Builder.defineMacro("__THUMBEL__"); 1737 Builder.defineMacro("__thumb__"); 1738 if (IsThumb2) 1739 Builder.defineMacro("__thumb2__"); 1740 } 1741 1742 // Note, this is always on in gcc, even though it doesn't make sense. 1743 Builder.defineMacro("__APCS_32__"); 1744 1745 if (FPUModeIsVFP((FPUMode) FPU)) 1746 Builder.defineMacro("__VFP_FP__"); 1747 1748 // This only gets set when Neon instructions are actually available, unlike 1749 // the VFP define, hence the soft float and arch check. This is subtly 1750 // different from gcc, we follow the intent which was that it should be set 1751 // when Neon instructions are actually available. 1752 if (FPU == NeonFPU && !SoftFloat && IsThumb2) 1753 Builder.defineMacro("__ARM_NEON__"); 1754 } 1755 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1756 unsigned &NumRecords) const { 1757 Records = BuiltinInfo; 1758 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 1759 } 1760 virtual const char *getVAListDeclaration() const { 1761 return "typedef char* __builtin_va_list;"; 1762 } 1763 virtual void getGCCRegNames(const char * const *&Names, 1764 unsigned &NumNames) const; 1765 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1766 unsigned &NumAliases) const; 1767 virtual bool validateAsmConstraint(const char *&Name, 1768 TargetInfo::ConstraintInfo &Info) const { 1769 // FIXME: Check if this is complete 1770 switch (*Name) { 1771 default: 1772 case 'l': // r0-r7 1773 case 'h': // r8-r15 1774 case 'w': // VFP Floating point register single precision 1775 case 'P': // VFP Floating point register double precision 1776 Info.setAllowsRegister(); 1777 return true; 1778 } 1779 return false; 1780 } 1781 virtual const char *getClobbers() const { 1782 // FIXME: Is this really right? 1783 return ""; 1784 } 1785}; 1786 1787const char * const ARMTargetInfo::GCCRegNames[] = { 1788 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1789 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 1790}; 1791 1792void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 1793 unsigned &NumNames) const { 1794 Names = GCCRegNames; 1795 NumNames = llvm::array_lengthof(GCCRegNames); 1796} 1797 1798const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 1799 1800 { { "a1" }, "r0" }, 1801 { { "a2" }, "r1" }, 1802 { { "a3" }, "r2" }, 1803 { { "a4" }, "r3" }, 1804 { { "v1" }, "r4" }, 1805 { { "v2" }, "r5" }, 1806 { { "v3" }, "r6" }, 1807 { { "v4" }, "r7" }, 1808 { { "v5" }, "r8" }, 1809 { { "v6", "rfp" }, "r9" }, 1810 { { "sl" }, "r10" }, 1811 { { "fp" }, "r11" }, 1812 { { "ip" }, "r12" }, 1813 { { "sp" }, "r13" }, 1814 { { "lr" }, "r14" }, 1815 { { "pc" }, "r15" }, 1816}; 1817 1818void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1819 unsigned &NumAliases) const { 1820 Aliases = GCCRegAliases; 1821 NumAliases = llvm::array_lengthof(GCCRegAliases); 1822} 1823 1824const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 1825#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, false }, 1826#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER, false }, 1827#include "clang/Basic/BuiltinsARM.def" 1828}; 1829} // end anonymous namespace. 1830 1831 1832namespace { 1833class DarwinARMTargetInfo : 1834 public DarwinTargetInfo<ARMTargetInfo> { 1835protected: 1836 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 1837 MacroBuilder &Builder) const { 1838 getDarwinDefines(Builder, Opts, Triple); 1839 } 1840 1841public: 1842 DarwinARMTargetInfo(const std::string& triple) 1843 : DarwinTargetInfo<ARMTargetInfo>(triple) { 1844 HasAlignMac68kSupport = true; 1845 } 1846}; 1847} // end anonymous namespace. 1848 1849namespace { 1850class SparcV8TargetInfo : public TargetInfo { 1851 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1852 static const char * const GCCRegNames[]; 1853public: 1854 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 1855 // FIXME: Support Sparc quad-precision long double? 1856 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1857 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 1858 } 1859 virtual void getTargetDefines(const LangOptions &Opts, 1860 MacroBuilder &Builder) const { 1861 DefineStd(Builder, "sparc", Opts); 1862 Builder.defineMacro("__sparcv8"); 1863 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1864 } 1865 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1866 unsigned &NumRecords) const { 1867 // FIXME: Implement! 1868 } 1869 virtual const char *getVAListDeclaration() const { 1870 return "typedef void* __builtin_va_list;"; 1871 } 1872 virtual void getGCCRegNames(const char * const *&Names, 1873 unsigned &NumNames) const; 1874 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1875 unsigned &NumAliases) const; 1876 virtual bool validateAsmConstraint(const char *&Name, 1877 TargetInfo::ConstraintInfo &info) const { 1878 // FIXME: Implement! 1879 return false; 1880 } 1881 virtual const char *getClobbers() const { 1882 // FIXME: Implement! 1883 return ""; 1884 } 1885}; 1886 1887const char * const SparcV8TargetInfo::GCCRegNames[] = { 1888 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1889 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1890 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1891 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 1892}; 1893 1894void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 1895 unsigned &NumNames) const { 1896 Names = GCCRegNames; 1897 NumNames = llvm::array_lengthof(GCCRegNames); 1898} 1899 1900const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 1901 { { "g0" }, "r0" }, 1902 { { "g1" }, "r1" }, 1903 { { "g2" }, "r2" }, 1904 { { "g3" }, "r3" }, 1905 { { "g4" }, "r4" }, 1906 { { "g5" }, "r5" }, 1907 { { "g6" }, "r6" }, 1908 { { "g7" }, "r7" }, 1909 { { "o0" }, "r8" }, 1910 { { "o1" }, "r9" }, 1911 { { "o2" }, "r10" }, 1912 { { "o3" }, "r11" }, 1913 { { "o4" }, "r12" }, 1914 { { "o5" }, "r13" }, 1915 { { "o6", "sp" }, "r14" }, 1916 { { "o7" }, "r15" }, 1917 { { "l0" }, "r16" }, 1918 { { "l1" }, "r17" }, 1919 { { "l2" }, "r18" }, 1920 { { "l3" }, "r19" }, 1921 { { "l4" }, "r20" }, 1922 { { "l5" }, "r21" }, 1923 { { "l6" }, "r22" }, 1924 { { "l7" }, "r23" }, 1925 { { "i0" }, "r24" }, 1926 { { "i1" }, "r25" }, 1927 { { "i2" }, "r26" }, 1928 { { "i3" }, "r27" }, 1929 { { "i4" }, "r28" }, 1930 { { "i5" }, "r29" }, 1931 { { "i6", "fp" }, "r30" }, 1932 { { "i7" }, "r31" }, 1933}; 1934 1935void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1936 unsigned &NumAliases) const { 1937 Aliases = GCCRegAliases; 1938 NumAliases = llvm::array_lengthof(GCCRegAliases); 1939} 1940} // end anonymous namespace. 1941 1942namespace { 1943class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 1944public: 1945 AuroraUXSparcV8TargetInfo(const std::string& triple) : 1946 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 1947 SizeType = UnsignedInt; 1948 PtrDiffType = SignedInt; 1949 } 1950}; 1951class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 1952public: 1953 SolarisSparcV8TargetInfo(const std::string& triple) : 1954 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 1955 SizeType = UnsignedInt; 1956 PtrDiffType = SignedInt; 1957 } 1958}; 1959} // end anonymous namespace. 1960 1961namespace { 1962 class PIC16TargetInfo : public TargetInfo{ 1963 public: 1964 PIC16TargetInfo(const std::string& triple) : TargetInfo(triple) { 1965 TLSSupported = false; 1966 IntWidth = 16; 1967 LongWidth = LongLongWidth = 32; 1968 PointerWidth = 16; 1969 IntAlign = 8; 1970 LongAlign = LongLongAlign = 8; 1971 PointerAlign = 8; 1972 SizeType = UnsignedInt; 1973 IntMaxType = SignedLong; 1974 UIntMaxType = UnsignedLong; 1975 IntPtrType = SignedShort; 1976 PtrDiffType = SignedInt; 1977 SigAtomicType = SignedLong; 1978 FloatWidth = 32; 1979 FloatAlign = 32; 1980 DoubleWidth = 32; 1981 DoubleAlign = 32; 1982 LongDoubleWidth = 32; 1983 LongDoubleAlign = 32; 1984 FloatFormat = &llvm::APFloat::IEEEsingle; 1985 DoubleFormat = &llvm::APFloat::IEEEsingle; 1986 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 1987 DescriptionString = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-f32:32:32-n8"; 1988 1989 } 1990 virtual uint64_t getPointerWidthV(unsigned AddrSpace) const { return 16; } 1991 virtual uint64_t getPointerAlignV(unsigned AddrSpace) const { return 8; } 1992 virtual void getTargetDefines(const LangOptions &Opts, 1993 MacroBuilder &Builder) const { 1994 Builder.defineMacro("__pic16"); 1995 Builder.defineMacro("__PIC16"); 1996 Builder.defineMacro("rom", "__attribute__((address_space(1)))"); 1997 Builder.defineMacro("ram", "__attribute__((address_space(0)))"); 1998 Builder.defineMacro("__section(SectName)", 1999 "__attribute__((section(SectName)))"); 2000 Builder.defineMacro("near", 2001 "__attribute__((section(\"Address=NEAR\")))"); 2002 Builder.defineMacro("__address(Addr)", 2003 "__attribute__((section(\"Address=\"#Addr)))"); 2004 Builder.defineMacro("__config(conf)", "asm(\"CONFIG \"#conf)"); 2005 Builder.defineMacro("__idlocs(value)", "asm(\"__IDLOCS \"#value)"); 2006 Builder.defineMacro("interrupt", 2007 "__attribute__((section(\"interrupt=0x4\"))) \ 2008 __attribute__((used))"); 2009 } 2010 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2011 unsigned &NumRecords) const {} 2012 virtual const char *getVAListDeclaration() const { 2013 return "typedef char* __builtin_va_list;"; 2014 } 2015 virtual const char *getClobbers() const { 2016 return ""; 2017 } 2018 virtual void getGCCRegNames(const char * const *&Names, 2019 unsigned &NumNames) const {} 2020 virtual bool validateAsmConstraint(const char *&Name, 2021 TargetInfo::ConstraintInfo &info) const { 2022 return true; 2023 } 2024 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2025 unsigned &NumAliases) const {} 2026 virtual bool useGlobalsForAutomaticVariables() const {return true;} 2027 }; 2028} 2029 2030namespace { 2031 class MSP430TargetInfo : public TargetInfo { 2032 static const char * const GCCRegNames[]; 2033 public: 2034 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 2035 TLSSupported = false; 2036 IntWidth = 16; IntAlign = 16; 2037 LongWidth = 32; LongLongWidth = 64; 2038 LongAlign = LongLongAlign = 16; 2039 PointerWidth = 16; PointerAlign = 16; 2040 SizeType = UnsignedInt; 2041 IntMaxType = SignedLong; 2042 UIntMaxType = UnsignedLong; 2043 IntPtrType = SignedShort; 2044 PtrDiffType = SignedInt; 2045 SigAtomicType = SignedLong; 2046 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 2047 } 2048 virtual void getTargetDefines(const LangOptions &Opts, 2049 MacroBuilder &Builder) const { 2050 Builder.defineMacro("MSP430"); 2051 Builder.defineMacro("__MSP430__"); 2052 // FIXME: defines for different 'flavours' of MCU 2053 } 2054 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2055 unsigned &NumRecords) const { 2056 // FIXME: Implement. 2057 Records = 0; 2058 NumRecords = 0; 2059 } 2060 virtual void getGCCRegNames(const char * const *&Names, 2061 unsigned &NumNames) const; 2062 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2063 unsigned &NumAliases) const { 2064 // No aliases. 2065 Aliases = 0; 2066 NumAliases = 0; 2067 } 2068 virtual bool validateAsmConstraint(const char *&Name, 2069 TargetInfo::ConstraintInfo &info) const { 2070 // No target constraints for now. 2071 return false; 2072 } 2073 virtual const char *getClobbers() const { 2074 // FIXME: Is this really right? 2075 return ""; 2076 } 2077 virtual const char *getVAListDeclaration() const { 2078 // FIXME: implement 2079 return "typedef char* __builtin_va_list;"; 2080 } 2081 }; 2082 2083 const char * const MSP430TargetInfo::GCCRegNames[] = { 2084 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2085 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2086 }; 2087 2088 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 2089 unsigned &NumNames) const { 2090 Names = GCCRegNames; 2091 NumNames = llvm::array_lengthof(GCCRegNames); 2092 } 2093} 2094 2095 2096namespace { 2097 class SystemZTargetInfo : public TargetInfo { 2098 static const char * const GCCRegNames[]; 2099 public: 2100 SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) { 2101 TLSSupported = false; 2102 IntWidth = IntAlign = 32; 2103 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64; 2104 PointerWidth = PointerAlign = 64; 2105 DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-" 2106 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64"; 2107 } 2108 virtual void getTargetDefines(const LangOptions &Opts, 2109 MacroBuilder &Builder) const { 2110 Builder.defineMacro("__s390__"); 2111 Builder.defineMacro("__s390x__"); 2112 } 2113 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2114 unsigned &NumRecords) const { 2115 // FIXME: Implement. 2116 Records = 0; 2117 NumRecords = 0; 2118 } 2119 2120 virtual void getGCCRegNames(const char * const *&Names, 2121 unsigned &NumNames) const; 2122 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2123 unsigned &NumAliases) const { 2124 // No aliases. 2125 Aliases = 0; 2126 NumAliases = 0; 2127 } 2128 virtual bool validateAsmConstraint(const char *&Name, 2129 TargetInfo::ConstraintInfo &info) const { 2130 // FIXME: implement 2131 return true; 2132 } 2133 virtual const char *getClobbers() const { 2134 // FIXME: Is this really right? 2135 return ""; 2136 } 2137 virtual const char *getVAListDeclaration() const { 2138 // FIXME: implement 2139 return "typedef char* __builtin_va_list;"; 2140 } 2141 }; 2142 2143 const char * const SystemZTargetInfo::GCCRegNames[] = { 2144 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2145 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2146 }; 2147 2148 void SystemZTargetInfo::getGCCRegNames(const char * const *&Names, 2149 unsigned &NumNames) const { 2150 Names = GCCRegNames; 2151 NumNames = llvm::array_lengthof(GCCRegNames); 2152 } 2153} 2154 2155namespace { 2156 class BlackfinTargetInfo : public TargetInfo { 2157 static const char * const GCCRegNames[]; 2158 public: 2159 BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) { 2160 TLSSupported = false; 2161 DoubleAlign = 32; 2162 LongLongAlign = 32; 2163 LongDoubleAlign = 32; 2164 DescriptionString = "e-p:32:32-i64:32-f64:32-n32"; 2165 } 2166 2167 virtual void getTargetDefines(const LangOptions &Opts, 2168 MacroBuilder &Builder) const { 2169 DefineStd(Builder, "bfin", Opts); 2170 DefineStd(Builder, "BFIN", Opts); 2171 Builder.defineMacro("__ADSPBLACKFIN__"); 2172 // FIXME: This one is really dependent on -mcpu 2173 Builder.defineMacro("__ADSPLPBLACKFIN__"); 2174 // FIXME: Add cpu-dependent defines and __SILICON_REVISION__ 2175 } 2176 2177 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2178 unsigned &NumRecords) const { 2179 // FIXME: Implement. 2180 Records = 0; 2181 NumRecords = 0; 2182 } 2183 2184 virtual void getGCCRegNames(const char * const *&Names, 2185 unsigned &NumNames) const; 2186 2187 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2188 unsigned &NumAliases) const { 2189 // No aliases. 2190 Aliases = 0; 2191 NumAliases = 0; 2192 } 2193 2194 virtual bool validateAsmConstraint(const char *&Name, 2195 TargetInfo::ConstraintInfo &Info) const { 2196 if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) { 2197 Info.setAllowsRegister(); 2198 return true; 2199 } 2200 return false; 2201 } 2202 2203 virtual const char *getClobbers() const { 2204 return ""; 2205 } 2206 2207 virtual const char *getVAListDeclaration() const { 2208 return "typedef char* __builtin_va_list;"; 2209 } 2210 }; 2211 2212 const char * const BlackfinTargetInfo::GCCRegNames[] = { 2213 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2214 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp", 2215 "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3", 2216 "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3", 2217 "a0", "a1", "cc", 2218 "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp", 2219 "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1" 2220 }; 2221 2222 void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names, 2223 unsigned &NumNames) const { 2224 Names = GCCRegNames; 2225 NumNames = llvm::array_lengthof(GCCRegNames); 2226 } 2227} 2228 2229namespace { 2230 2231 // LLVM and Clang cannot be used directly to output native binaries for 2232 // target, but is used to compile C code to llvm bitcode with correct 2233 // type and alignment information. 2234 // 2235 // TCE uses the llvm bitcode as input and uses it for generating customized 2236 // target processor and program binary. TCE co-design environment is 2237 // publicly available in http://tce.cs.tut.fi 2238 2239 class TCETargetInfo : public TargetInfo{ 2240 public: 2241 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 2242 TLSSupported = false; 2243 IntWidth = 32; 2244 LongWidth = LongLongWidth = 32; 2245 PointerWidth = 32; 2246 IntAlign = 32; 2247 LongAlign = LongLongAlign = 32; 2248 PointerAlign = 32; 2249 SizeType = UnsignedInt; 2250 IntMaxType = SignedLong; 2251 UIntMaxType = UnsignedLong; 2252 IntPtrType = SignedInt; 2253 PtrDiffType = SignedInt; 2254 FloatWidth = 32; 2255 FloatAlign = 32; 2256 DoubleWidth = 32; 2257 DoubleAlign = 32; 2258 LongDoubleWidth = 32; 2259 LongDoubleAlign = 32; 2260 FloatFormat = &llvm::APFloat::IEEEsingle; 2261 DoubleFormat = &llvm::APFloat::IEEEsingle; 2262 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 2263 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 2264 "i16:16:32-i32:32:32-i64:32:32-" 2265 "f32:32:32-f64:64:64-v64:64:64-" 2266 "v128:128:128-a0:0:64-n32"; 2267 } 2268 2269 virtual void getTargetDefines(const LangOptions &Opts, 2270 MacroBuilder &Builder) const { 2271 DefineStd(Builder, "tce", Opts); 2272 Builder.defineMacro("__TCE__"); 2273 Builder.defineMacro("__TCE_V1__"); 2274 } 2275 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2276 unsigned &NumRecords) const {} 2277 virtual const char *getClobbers() const { 2278 return ""; 2279 } 2280 virtual const char *getVAListDeclaration() const { 2281 return "typedef void* __builtin_va_list;"; 2282 } 2283 virtual void getGCCRegNames(const char * const *&Names, 2284 unsigned &NumNames) const {} 2285 virtual bool validateAsmConstraint(const char *&Name, 2286 TargetInfo::ConstraintInfo &info) const { 2287 return true; 2288 } 2289 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2290 unsigned &NumAliases) const {} 2291 }; 2292} 2293 2294namespace { 2295class MipsTargetInfo : public TargetInfo { 2296 std::string ABI, CPU; 2297 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2298 static const char * const GCCRegNames[]; 2299public: 2300 MipsTargetInfo(const std::string& triple) : TargetInfo(triple), ABI("o32") { 2301 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 2302 "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2303 } 2304 virtual const char *getABI() const { return ABI.c_str(); } 2305 virtual bool setABI(const std::string &Name) { 2306 2307 if ((Name == "o32") || (Name == "eabi")) { 2308 ABI = Name; 2309 return true; 2310 } else 2311 return false; 2312 } 2313 virtual bool setCPU(const std::string &Name) { 2314 CPU = Name; 2315 return true; 2316 } 2317 void getDefaultFeatures(const std::string &CPU, 2318 llvm::StringMap<bool> &Features) const { 2319 Features[ABI] = true; 2320 Features[CPU] = true; 2321 } 2322 virtual void getArchDefines(const LangOptions &Opts, 2323 MacroBuilder &Builder) const { 2324 if (ABI == "o32") 2325 Builder.defineMacro("__mips_o32"); 2326 else if (ABI == "eabi") 2327 Builder.defineMacro("__mips_eabi"); 2328 } 2329 virtual void getTargetDefines(const LangOptions &Opts, 2330 MacroBuilder &Builder) const { 2331 DefineStd(Builder, "mips", Opts); 2332 Builder.defineMacro("_mips"); 2333 DefineStd(Builder, "MIPSEB", Opts); 2334 Builder.defineMacro("_MIPSEB"); 2335 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2336 getArchDefines(Opts, Builder); 2337 } 2338 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2339 unsigned &NumRecords) const { 2340 // FIXME: Implement! 2341 } 2342 virtual const char *getVAListDeclaration() const { 2343 return "typedef void* __builtin_va_list;"; 2344 } 2345 virtual void getGCCRegNames(const char * const *&Names, 2346 unsigned &NumNames) const; 2347 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2348 unsigned &NumAliases) const; 2349 virtual bool validateAsmConstraint(const char *&Name, 2350 TargetInfo::ConstraintInfo &Info) const { 2351 switch (*Name) { 2352 default: 2353 case 'r': // CPU registers. 2354 case 'd': // Equivalent to "r" unless generating MIPS16 code. 2355 case 'y': // Equivalent to "r", backwards compatibility only. 2356 case 'f': // floating-point registers. 2357 Info.setAllowsRegister(); 2358 return true; 2359 } 2360 return false; 2361 } 2362 2363 virtual const char *getClobbers() const { 2364 // FIXME: Implement! 2365 return ""; 2366 } 2367}; 2368 2369const char * const MipsTargetInfo::GCCRegNames[] = { 2370 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 2371 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 2372 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 2373 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 2374 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 2375 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 2376 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 2377 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 2378 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 2379 "$fcc5","$fcc6","$fcc7" 2380}; 2381 2382void MipsTargetInfo::getGCCRegNames(const char * const *&Names, 2383 unsigned &NumNames) const { 2384 Names = GCCRegNames; 2385 NumNames = llvm::array_lengthof(GCCRegNames); 2386} 2387 2388const TargetInfo::GCCRegAlias MipsTargetInfo::GCCRegAliases[] = { 2389 { { "at" }, "$1" }, 2390 { { "v0" }, "$2" }, 2391 { { "v1" }, "$3" }, 2392 { { "a0" }, "$4" }, 2393 { { "a1" }, "$5" }, 2394 { { "a2" }, "$6" }, 2395 { { "a3" }, "$7" }, 2396 { { "t0" }, "$8" }, 2397 { { "t1" }, "$9" }, 2398 { { "t2" }, "$10" }, 2399 { { "t3" }, "$11" }, 2400 { { "t4" }, "$12" }, 2401 { { "t5" }, "$13" }, 2402 { { "t6" }, "$14" }, 2403 { { "t7" }, "$15" }, 2404 { { "s0" }, "$16" }, 2405 { { "s1" }, "$17" }, 2406 { { "s2" }, "$18" }, 2407 { { "s3" }, "$19" }, 2408 { { "s4" }, "$20" }, 2409 { { "s5" }, "$21" }, 2410 { { "s6" }, "$22" }, 2411 { { "s7" }, "$23" }, 2412 { { "t8" }, "$24" }, 2413 { { "t9" }, "$25" }, 2414 { { "k0" }, "$26" }, 2415 { { "k1" }, "$27" }, 2416 { { "gp" }, "$28" }, 2417 { { "sp" }, "$29" }, 2418 { { "fp" }, "$30" }, 2419 { { "ra" }, "$31" } 2420}; 2421 2422void MipsTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2423 unsigned &NumAliases) const { 2424 Aliases = GCCRegAliases; 2425 NumAliases = llvm::array_lengthof(GCCRegAliases); 2426} 2427} // end anonymous namespace. 2428 2429namespace { 2430class MipselTargetInfo : public MipsTargetInfo { 2431public: 2432 MipselTargetInfo(const std::string& triple) : MipsTargetInfo(triple) { 2433 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 2434 "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2435 } 2436 2437 virtual void getTargetDefines(const LangOptions &Opts, 2438 MacroBuilder &Builder) const; 2439}; 2440 2441void MipselTargetInfo::getTargetDefines(const LangOptions &Opts, 2442 MacroBuilder &Builder) const { 2443 DefineStd(Builder, "mips", Opts); 2444 Builder.defineMacro("_mips"); 2445 DefineStd(Builder, "MIPSEL", Opts); 2446 Builder.defineMacro("_MIPSEL"); 2447 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2448 getArchDefines(Opts, Builder); 2449} 2450} // end anonymous namespace. 2451 2452//===----------------------------------------------------------------------===// 2453// Driver code 2454//===----------------------------------------------------------------------===// 2455 2456static TargetInfo *AllocateTarget(const std::string &T) { 2457 llvm::Triple Triple(T); 2458 llvm::Triple::OSType os = Triple.getOS(); 2459 2460 switch (Triple.getArch()) { 2461 default: 2462 return NULL; 2463 2464 case llvm::Triple::arm: 2465 case llvm::Triple::thumb: 2466 switch (os) { 2467 case llvm::Triple::Linux: 2468 return new LinuxTargetInfo<ARMTargetInfo>(T); 2469 case llvm::Triple::Darwin: 2470 return new DarwinARMTargetInfo(T); 2471 case llvm::Triple::FreeBSD: 2472 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 2473 default: 2474 return new ARMTargetInfo(T); 2475 } 2476 2477 case llvm::Triple::bfin: 2478 return new BlackfinTargetInfo(T); 2479 2480 case llvm::Triple::msp430: 2481 return new MSP430TargetInfo(T); 2482 2483 case llvm::Triple::mips: 2484 if (os == llvm::Triple::Psp) 2485 return new PSPTargetInfo<MipsTargetInfo>(T); 2486 if (os == llvm::Triple::Linux) 2487 return new LinuxTargetInfo<MipsTargetInfo>(T); 2488 return new MipsTargetInfo(T); 2489 2490 case llvm::Triple::mipsel: 2491 if (os == llvm::Triple::Psp) 2492 return new PSPTargetInfo<MipselTargetInfo>(T); 2493 if (os == llvm::Triple::Linux) 2494 return new LinuxTargetInfo<MipselTargetInfo>(T); 2495 return new MipselTargetInfo(T); 2496 2497 case llvm::Triple::pic16: 2498 return new PIC16TargetInfo(T); 2499 2500 case llvm::Triple::ppc: 2501 if (os == llvm::Triple::Darwin) 2502 return new DarwinPPCTargetInfo(T); 2503 else if (os == llvm::Triple::FreeBSD) 2504 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 2505 return new PPC32TargetInfo(T); 2506 2507 case llvm::Triple::ppc64: 2508 if (os == llvm::Triple::Darwin) 2509 return new DarwinPPC64TargetInfo(T); 2510 else if (os == llvm::Triple::Lv2) 2511 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 2512 else if (os == llvm::Triple::FreeBSD) 2513 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 2514 return new PPC64TargetInfo(T); 2515 2516 case llvm::Triple::mblaze: 2517 return new MBlazeTargetInfo(T); 2518 2519 case llvm::Triple::sparc: 2520 if (os == llvm::Triple::AuroraUX) 2521 return new AuroraUXSparcV8TargetInfo(T); 2522 if (os == llvm::Triple::Solaris) 2523 return new SolarisSparcV8TargetInfo(T); 2524 return new SparcV8TargetInfo(T); 2525 2526 // FIXME: Need a real SPU target. 2527 case llvm::Triple::cellspu: 2528 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 2529 2530 case llvm::Triple::systemz: 2531 return new SystemZTargetInfo(T); 2532 2533 case llvm::Triple::tce: 2534 return new TCETargetInfo(T); 2535 2536 case llvm::Triple::x86: 2537 switch (os) { 2538 case llvm::Triple::AuroraUX: 2539 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 2540 case llvm::Triple::Darwin: 2541 return new DarwinI386TargetInfo(T); 2542 case llvm::Triple::Linux: 2543 return new LinuxTargetInfo<X86_32TargetInfo>(T); 2544 case llvm::Triple::DragonFly: 2545 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 2546 case llvm::Triple::NetBSD: 2547 return new NetBSDTargetInfo<X86_32TargetInfo>(T); 2548 case llvm::Triple::OpenBSD: 2549 return new OpenBSDI386TargetInfo(T); 2550 case llvm::Triple::FreeBSD: 2551 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 2552 case llvm::Triple::Minix: 2553 return new MinixTargetInfo<X86_32TargetInfo>(T); 2554 case llvm::Triple::Solaris: 2555 return new SolarisTargetInfo<X86_32TargetInfo>(T); 2556 case llvm::Triple::Cygwin: 2557 return new CygwinX86_32TargetInfo(T); 2558 case llvm::Triple::MinGW32: 2559 return new MinGWX86_32TargetInfo(T); 2560 case llvm::Triple::Win32: 2561 return new VisualStudioWindowsX86_32TargetInfo(T); 2562 case llvm::Triple::Haiku: 2563 return new HaikuX86_32TargetInfo(T); 2564 default: 2565 return new X86_32TargetInfo(T); 2566 } 2567 2568 case llvm::Triple::x86_64: 2569 switch (os) { 2570 case llvm::Triple::AuroraUX: 2571 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 2572 case llvm::Triple::Darwin: 2573 return new DarwinX86_64TargetInfo(T); 2574 case llvm::Triple::Linux: 2575 return new LinuxTargetInfo<X86_64TargetInfo>(T); 2576 case llvm::Triple::DragonFly: 2577 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 2578 case llvm::Triple::NetBSD: 2579 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 2580 case llvm::Triple::OpenBSD: 2581 return new OpenBSDX86_64TargetInfo(T); 2582 case llvm::Triple::FreeBSD: 2583 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 2584 case llvm::Triple::Solaris: 2585 return new SolarisTargetInfo<X86_64TargetInfo>(T); 2586 case llvm::Triple::MinGW64: 2587 return new MinGWX86_64TargetInfo(T); 2588 case llvm::Triple::Win32: // This is what Triple.h supports now. 2589 return new VisualStudioWindowsX86_64TargetInfo(T); 2590 default: 2591 return new X86_64TargetInfo(T); 2592 } 2593 } 2594} 2595 2596/// CreateTargetInfo - Return the target info object for the specified target 2597/// triple. 2598TargetInfo *TargetInfo::CreateTargetInfo(Diagnostic &Diags, 2599 TargetOptions &Opts) { 2600 llvm::Triple Triple(Opts.Triple); 2601 2602 // Construct the target 2603 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 2604 if (!Target) { 2605 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 2606 return 0; 2607 } 2608 2609 // Set the target CPU if specified. 2610 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 2611 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 2612 return 0; 2613 } 2614 2615 // Set the target ABI if specified. 2616 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 2617 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 2618 return 0; 2619 } 2620 2621 // Set the target C++ ABI. 2622 if (!Target->setCXXABI(Opts.CXXABI)) { 2623 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 2624 return 0; 2625 } 2626 2627 // Compute the default target features, we need the target to handle this 2628 // because features may have dependencies on one another. 2629 llvm::StringMap<bool> Features; 2630 Target->getDefaultFeatures(Opts.CPU, Features); 2631 2632 // Apply the user specified deltas. 2633 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 2634 ie = Opts.Features.end(); it != ie; ++it) { 2635 const char *Name = it->c_str(); 2636 2637 // Apply the feature via the target. 2638 if ((Name[0] != '-' && Name[0] != '+') || 2639 !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) { 2640 Diags.Report(diag::err_target_invalid_feature) << Name; 2641 return 0; 2642 } 2643 } 2644 2645 // Add the features to the compile options. 2646 // 2647 // FIXME: If we are completely confident that we have the right set, we only 2648 // need to pass the minuses. 2649 Opts.Features.clear(); 2650 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 2651 ie = Features.end(); it != ie; ++it) 2652 Opts.Features.push_back(std::string(it->second ? "+" : "-") + it->first()); 2653 Target->HandleTargetFeatures(Opts.Features); 2654 2655 return Target.take(); 2656} 2657