Targets.cpp revision 9f0b1324a5352713337c75ef4a5acffd96609c6c 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include "llvm/Support/ErrorHandling.h"
30#include "llvm/Type.h"
31#include <algorithm>
32using namespace clang;
33
34//===----------------------------------------------------------------------===//
35//  Common code shared among targets.
36//===----------------------------------------------------------------------===//
37
38/// DefineStd - Define a macro name and standard variants.  For example if
39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
40/// when in GNU mode.
41static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42                      const LangOptions &Opts) {
43  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44
45  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46  // in the user's namespace.
47  if (Opts.GNUMode)
48    Builder.defineMacro(MacroName);
49
50  // Define __unix.
51  Builder.defineMacro("__" + MacroName);
52
53  // Define __unix__.
54  Builder.defineMacro("__" + MacroName + "__");
55}
56
57static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName,
58                            bool Tuning = true) {
59  Builder.defineMacro("__" + CPUName);
60  Builder.defineMacro("__" + CPUName + "__");
61  if (Tuning)
62    Builder.defineMacro("__tune_" + CPUName + "__");
63}
64
65//===----------------------------------------------------------------------===//
66// Defines specific to certain operating systems.
67//===----------------------------------------------------------------------===//
68
69namespace {
70template<typename TgtInfo>
71class OSTargetInfo : public TgtInfo {
72protected:
73  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
74                            MacroBuilder &Builder) const=0;
75public:
76  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
77  virtual void getTargetDefines(const LangOptions &Opts,
78                                MacroBuilder &Builder) const {
79    TgtInfo::getTargetDefines(Opts, Builder);
80    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
81  }
82
83};
84} // end anonymous namespace
85
86
87static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
88                             const llvm::Triple &Triple,
89                             StringRef &PlatformName,
90                             VersionTuple &PlatformMinVersion) {
91  Builder.defineMacro("__APPLE_CC__", "5621");
92  Builder.defineMacro("__APPLE__");
93  Builder.defineMacro("__MACH__");
94  Builder.defineMacro("OBJC_NEW_PROPERTIES");
95
96  if (!Opts.ObjCAutoRefCount) {
97    // __weak is always defined, for use in blocks and with objc pointers.
98    Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
99
100    // Darwin defines __strong even in C mode (just to nothing).
101    if (Opts.getGC() != LangOptions::NonGC)
102      Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
103    else
104      Builder.defineMacro("__strong", "");
105
106    // __unsafe_unretained is defined to nothing in non-ARC mode. We even
107    // allow this in C, since one might have block pointers in structs that
108    // are used in pure C code and in Objective-C ARC.
109    Builder.defineMacro("__unsafe_unretained", "");
110  }
111
112  if (Opts.Static)
113    Builder.defineMacro("__STATIC__");
114  else
115    Builder.defineMacro("__DYNAMIC__");
116
117  if (Opts.POSIXThreads)
118    Builder.defineMacro("_REENTRANT");
119
120  // Get the platform type and version number from the triple.
121  unsigned Maj, Min, Rev;
122  if (Triple.isMacOSX()) {
123    Triple.getMacOSXVersion(Maj, Min, Rev);
124    PlatformName = "macosx";
125  } else {
126    Triple.getOSVersion(Maj, Min, Rev);
127    PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
128  }
129
130  // If -target arch-pc-win32-macho option specified, we're
131  // generating code for Win32 ABI. No need to emit
132  // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
133  if (PlatformName == "win32") {
134    PlatformMinVersion = VersionTuple(Maj, Min, Rev);
135    return;
136  }
137
138  // Set the appropriate OS version define.
139  if (Triple.getOS() == llvm::Triple::IOS) {
140    assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
141    char Str[6];
142    Str[0] = '0' + Maj;
143    Str[1] = '0' + (Min / 10);
144    Str[2] = '0' + (Min % 10);
145    Str[3] = '0' + (Rev / 10);
146    Str[4] = '0' + (Rev % 10);
147    Str[5] = '\0';
148    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
149  } else {
150    // Note that the Driver allows versions which aren't representable in the
151    // define (because we only get a single digit for the minor and micro
152    // revision numbers). So, we limit them to the maximum representable
153    // version.
154    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
155    assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
156    char Str[5];
157    Str[0] = '0' + (Maj / 10);
158    Str[1] = '0' + (Maj % 10);
159    Str[2] = '0' + std::min(Min, 9U);
160    Str[3] = '0' + std::min(Rev, 9U);
161    Str[4] = '\0';
162    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
163  }
164
165  PlatformMinVersion = VersionTuple(Maj, Min, Rev);
166}
167
168namespace {
169template<typename Target>
170class DarwinTargetInfo : public OSTargetInfo<Target> {
171protected:
172  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
173                            MacroBuilder &Builder) const {
174    getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
175                     this->PlatformMinVersion);
176  }
177
178public:
179  DarwinTargetInfo(const std::string& triple) :
180    OSTargetInfo<Target>(triple) {
181      llvm::Triple T = llvm::Triple(triple);
182      this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
183      this->MCountName = "\01mcount";
184    }
185
186  virtual std::string isValidSectionSpecifier(StringRef SR) const {
187    // Let MCSectionMachO validate this.
188    StringRef Segment, Section;
189    unsigned TAA, StubSize;
190    bool HasTAA;
191    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
192                                                       TAA, HasTAA, StubSize);
193  }
194
195  virtual const char *getStaticInitSectionSpecifier() const {
196    // FIXME: We should return 0 when building kexts.
197    return "__TEXT,__StaticInit,regular,pure_instructions";
198  }
199
200  /// Darwin does not support protected visibility.  Darwin's "default"
201  /// is very similar to ELF's "protected";  Darwin requires a "weak"
202  /// attribute on declarations that can be dynamically replaced.
203  virtual bool hasProtectedVisibility() const {
204    return false;
205  }
206};
207
208
209// DragonFlyBSD Target
210template<typename Target>
211class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
212protected:
213  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
214                            MacroBuilder &Builder) const {
215    // DragonFly defines; list based off of gcc output
216    Builder.defineMacro("__DragonFly__");
217    Builder.defineMacro("__DragonFly_cc_version", "100001");
218    Builder.defineMacro("__ELF__");
219    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
220    Builder.defineMacro("__tune_i386__");
221    DefineStd(Builder, "unix", Opts);
222  }
223public:
224  DragonFlyBSDTargetInfo(const std::string &triple)
225    : OSTargetInfo<Target>(triple) {
226      this->UserLabelPrefix = "";
227
228      llvm::Triple Triple(triple);
229      switch (Triple.getArch()) {
230        default:
231        case llvm::Triple::x86:
232        case llvm::Triple::x86_64:
233          this->MCountName = ".mcount";
234          break;
235      }
236  }
237};
238
239// FreeBSD Target
240template<typename Target>
241class FreeBSDTargetInfo : public OSTargetInfo<Target> {
242protected:
243  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
244                            MacroBuilder &Builder) const {
245    // FreeBSD defines; list based off of gcc output
246
247    unsigned Release = Triple.getOSMajorVersion();
248    if (Release == 0U)
249      Release = 8;
250
251    Builder.defineMacro("__FreeBSD__", Twine(Release));
252    Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
253    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
254    DefineStd(Builder, "unix", Opts);
255    Builder.defineMacro("__ELF__");
256  }
257public:
258  FreeBSDTargetInfo(const std::string &triple)
259    : OSTargetInfo<Target>(triple) {
260      this->UserLabelPrefix = "";
261
262      llvm::Triple Triple(triple);
263      switch (Triple.getArch()) {
264        default:
265        case llvm::Triple::x86:
266        case llvm::Triple::x86_64:
267          this->MCountName = ".mcount";
268          break;
269        case llvm::Triple::mips:
270        case llvm::Triple::mipsel:
271        case llvm::Triple::ppc:
272        case llvm::Triple::ppc64:
273          this->MCountName = "_mcount";
274          break;
275        case llvm::Triple::arm:
276          this->MCountName = "__mcount";
277          break;
278      }
279
280    }
281};
282
283// Minix Target
284template<typename Target>
285class MinixTargetInfo : public OSTargetInfo<Target> {
286protected:
287  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
288                            MacroBuilder &Builder) const {
289    // Minix defines
290
291    Builder.defineMacro("__minix", "3");
292    Builder.defineMacro("_EM_WSIZE", "4");
293    Builder.defineMacro("_EM_PSIZE", "4");
294    Builder.defineMacro("_EM_SSIZE", "2");
295    Builder.defineMacro("_EM_LSIZE", "4");
296    Builder.defineMacro("_EM_FSIZE", "4");
297    Builder.defineMacro("_EM_DSIZE", "8");
298    Builder.defineMacro("__ELF__");
299    DefineStd(Builder, "unix", Opts);
300  }
301public:
302  MinixTargetInfo(const std::string &triple)
303    : OSTargetInfo<Target>(triple) {
304      this->UserLabelPrefix = "";
305    }
306};
307
308// Linux target
309template<typename Target>
310class LinuxTargetInfo : public OSTargetInfo<Target> {
311protected:
312  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
313                            MacroBuilder &Builder) const {
314    // Linux defines; list based off of gcc output
315    DefineStd(Builder, "unix", Opts);
316    DefineStd(Builder, "linux", Opts);
317    Builder.defineMacro("__gnu_linux__");
318    Builder.defineMacro("__ELF__");
319    if (Triple.getEnvironment() == llvm::Triple::Android)
320      Builder.defineMacro("__ANDROID__", "1");
321    if (Opts.POSIXThreads)
322      Builder.defineMacro("_REENTRANT");
323    if (Opts.CPlusPlus)
324      Builder.defineMacro("_GNU_SOURCE");
325  }
326public:
327  LinuxTargetInfo(const std::string& triple)
328    : OSTargetInfo<Target>(triple) {
329    this->UserLabelPrefix = "";
330    this->WIntType = TargetInfo::UnsignedInt;
331  }
332
333  virtual const char *getStaticInitSectionSpecifier() const {
334    return ".text.startup";
335  }
336};
337
338// NetBSD Target
339template<typename Target>
340class NetBSDTargetInfo : public OSTargetInfo<Target> {
341protected:
342  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
343                            MacroBuilder &Builder) const {
344    // NetBSD defines; list based off of gcc output
345    Builder.defineMacro("__NetBSD__");
346    Builder.defineMacro("__unix__");
347    Builder.defineMacro("__ELF__");
348    if (Opts.POSIXThreads)
349      Builder.defineMacro("_POSIX_THREADS");
350  }
351public:
352  NetBSDTargetInfo(const std::string &triple)
353    : OSTargetInfo<Target>(triple) {
354      this->UserLabelPrefix = "";
355    }
356};
357
358// OpenBSD Target
359template<typename Target>
360class OpenBSDTargetInfo : public OSTargetInfo<Target> {
361protected:
362  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
363                            MacroBuilder &Builder) const {
364    // OpenBSD defines; list based off of gcc output
365
366    Builder.defineMacro("__OpenBSD__");
367    DefineStd(Builder, "unix", Opts);
368    Builder.defineMacro("__ELF__");
369    if (Opts.POSIXThreads)
370      Builder.defineMacro("_REENTRANT");
371  }
372public:
373  OpenBSDTargetInfo(const std::string &triple)
374    : OSTargetInfo<Target>(triple) {
375      this->UserLabelPrefix = "";
376      this->TLSSupported = false;
377
378      llvm::Triple Triple(triple);
379      switch (Triple.getArch()) {
380        default:
381        case llvm::Triple::x86:
382        case llvm::Triple::x86_64:
383        case llvm::Triple::arm:
384	case llvm::Triple::sparc:
385          this->MCountName = "__mcount";
386          break;
387        case llvm::Triple::mips64:
388        case llvm::Triple::mips64el:
389        case llvm::Triple::ppc:
390	case llvm::Triple::sparcv9:
391          this->MCountName = "_mcount";
392          break;
393      }
394  }
395};
396
397// Bitrig Target
398template<typename Target>
399class BitrigTargetInfo : public OSTargetInfo<Target> {
400protected:
401  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
402                            MacroBuilder &Builder) const {
403    // Bitrig defines; list based off of gcc output
404
405    Builder.defineMacro("__Bitrig__");
406    DefineStd(Builder, "unix", Opts);
407    Builder.defineMacro("__ELF__");
408    if (Opts.POSIXThreads)
409      Builder.defineMacro("_REENTRANT");
410  }
411public:
412  BitrigTargetInfo(const std::string &triple)
413    : OSTargetInfo<Target>(triple) {
414      this->UserLabelPrefix = "";
415      this->TLSSupported = false;
416      this->MCountName = "__mcount";
417  }
418};
419
420// PSP Target
421template<typename Target>
422class PSPTargetInfo : public OSTargetInfo<Target> {
423protected:
424  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
425                            MacroBuilder &Builder) const {
426    // PSP defines; list based on the output of the pspdev gcc toolchain.
427    Builder.defineMacro("PSP");
428    Builder.defineMacro("_PSP");
429    Builder.defineMacro("__psp__");
430    Builder.defineMacro("__ELF__");
431  }
432public:
433  PSPTargetInfo(const std::string& triple)
434    : OSTargetInfo<Target>(triple) {
435    this->UserLabelPrefix = "";
436  }
437};
438
439// PS3 PPU Target
440template<typename Target>
441class PS3PPUTargetInfo : public OSTargetInfo<Target> {
442protected:
443  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
444                            MacroBuilder &Builder) const {
445    // PS3 PPU defines.
446    Builder.defineMacro("__PPC__");
447    Builder.defineMacro("__PPU__");
448    Builder.defineMacro("__CELLOS_LV2__");
449    Builder.defineMacro("__ELF__");
450    Builder.defineMacro("__LP32__");
451    Builder.defineMacro("_ARCH_PPC64");
452    Builder.defineMacro("__powerpc64__");
453  }
454public:
455  PS3PPUTargetInfo(const std::string& triple)
456    : OSTargetInfo<Target>(triple) {
457    this->UserLabelPrefix = "";
458    this->LongWidth = this->LongAlign = 32;
459    this->PointerWidth = this->PointerAlign = 32;
460    this->IntMaxType = TargetInfo::SignedLongLong;
461    this->UIntMaxType = TargetInfo::UnsignedLongLong;
462    this->Int64Type = TargetInfo::SignedLongLong;
463    this->SizeType = TargetInfo::UnsignedInt;
464    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
465                              "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
466  }
467};
468
469// FIXME: Need a real SPU target.
470// PS3 SPU Target
471template<typename Target>
472class PS3SPUTargetInfo : public OSTargetInfo<Target> {
473protected:
474  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
475                            MacroBuilder &Builder) const {
476    // PS3 PPU defines.
477    Builder.defineMacro("__SPU__");
478    Builder.defineMacro("__ELF__");
479  }
480public:
481  PS3SPUTargetInfo(const std::string& triple)
482    : OSTargetInfo<Target>(triple) {
483    this->UserLabelPrefix = "";
484  }
485};
486
487// AuroraUX target
488template<typename Target>
489class AuroraUXTargetInfo : public OSTargetInfo<Target> {
490protected:
491  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
492                            MacroBuilder &Builder) const {
493    DefineStd(Builder, "sun", Opts);
494    DefineStd(Builder, "unix", Opts);
495    Builder.defineMacro("__ELF__");
496    Builder.defineMacro("__svr4__");
497    Builder.defineMacro("__SVR4");
498  }
499public:
500  AuroraUXTargetInfo(const std::string& triple)
501    : OSTargetInfo<Target>(triple) {
502    this->UserLabelPrefix = "";
503    this->WCharType = this->SignedLong;
504    // FIXME: WIntType should be SignedLong
505  }
506};
507
508// Solaris target
509template<typename Target>
510class SolarisTargetInfo : public OSTargetInfo<Target> {
511protected:
512  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
513                            MacroBuilder &Builder) const {
514    DefineStd(Builder, "sun", Opts);
515    DefineStd(Builder, "unix", Opts);
516    Builder.defineMacro("__ELF__");
517    Builder.defineMacro("__svr4__");
518    Builder.defineMacro("__SVR4");
519    // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and
520    // newer, but to 500 for everything else.  feature_test.h has a check to
521    // ensure that you are not using C99 with an old version of X/Open or C89
522    // with a new version.
523    if (Opts.C99 || Opts.C11)
524      Builder.defineMacro("_XOPEN_SOURCE", "600");
525    else
526      Builder.defineMacro("_XOPEN_SOURCE", "500");
527    if (Opts.CPlusPlus)
528      Builder.defineMacro("__C99FEATURES__");
529    Builder.defineMacro("_LARGEFILE_SOURCE");
530    Builder.defineMacro("_LARGEFILE64_SOURCE");
531    Builder.defineMacro("__EXTENSIONS__");
532    Builder.defineMacro("_REENTRANT");
533  }
534public:
535  SolarisTargetInfo(const std::string& triple)
536    : OSTargetInfo<Target>(triple) {
537    this->UserLabelPrefix = "";
538    this->WCharType = this->SignedInt;
539    // FIXME: WIntType should be SignedLong
540  }
541};
542
543// Windows target
544template<typename Target>
545class WindowsTargetInfo : public OSTargetInfo<Target> {
546protected:
547  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
548                            MacroBuilder &Builder) const {
549    Builder.defineMacro("_WIN32");
550  }
551  void getVisualStudioDefines(const LangOptions &Opts,
552                              MacroBuilder &Builder) const {
553    if (Opts.CPlusPlus) {
554      if (Opts.RTTI)
555        Builder.defineMacro("_CPPRTTI");
556
557      if (Opts.Exceptions)
558        Builder.defineMacro("_CPPUNWIND");
559    }
560
561    if (!Opts.CharIsSigned)
562      Builder.defineMacro("_CHAR_UNSIGNED");
563
564    // FIXME: POSIXThreads isn't exactly the option this should be defined for,
565    //        but it works for now.
566    if (Opts.POSIXThreads)
567      Builder.defineMacro("_MT");
568
569    if (Opts.MSCVersion != 0)
570      Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
571
572    if (Opts.MicrosoftExt) {
573      Builder.defineMacro("_MSC_EXTENSIONS");
574
575      if (Opts.CPlusPlus0x) {
576        Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
577        Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
578        Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
579      }
580    }
581
582    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
583  }
584
585public:
586  WindowsTargetInfo(const std::string &triple)
587    : OSTargetInfo<Target>(triple) {}
588};
589
590} // end anonymous namespace.
591
592//===----------------------------------------------------------------------===//
593// Specific target implementations.
594//===----------------------------------------------------------------------===//
595
596namespace {
597// PPC abstract base class
598class PPCTargetInfo : public TargetInfo {
599  static const Builtin::Info BuiltinInfo[];
600  static const char * const GCCRegNames[];
601  static const TargetInfo::GCCRegAlias GCCRegAliases[];
602  std::string CPU;
603public:
604  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {
605    LongDoubleWidth = LongDoubleAlign = 128;
606    LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
607  }
608
609  /// \brief Flags for architecture specific defines.
610  typedef enum {
611    ArchDefineNone  = 0,
612    ArchDefineName  = 1 << 0, // <name> is substituted for arch name.
613    ArchDefinePpcgr = 1 << 1,
614    ArchDefinePpcsq = 1 << 2,
615    ArchDefine440   = 1 << 3,
616    ArchDefine603   = 1 << 4,
617    ArchDefine604   = 1 << 5,
618    ArchDefinePwr4  = 1 << 6,
619    ArchDefinePwr6  = 1 << 7
620  } ArchDefineTypes;
621
622  virtual bool setCPU(const std::string &Name) {
623    bool CPUKnown = llvm::StringSwitch<bool>(Name)
624      .Case("generic", true)
625      .Case("440", true)
626      .Case("450", true)
627      .Case("601", true)
628      .Case("602", true)
629      .Case("603", true)
630      .Case("603e", true)
631      .Case("603ev", true)
632      .Case("604", true)
633      .Case("604e", true)
634      .Case("620", true)
635      .Case("g3", true)
636      .Case("7400", true)
637      .Case("g4", true)
638      .Case("7450", true)
639      .Case("g4+", true)
640      .Case("750", true)
641      .Case("970", true)
642      .Case("g5", true)
643      .Case("a2", true)
644      .Case("pwr6", true)
645      .Case("pwr7", true)
646      .Case("ppc", true)
647      .Case("ppc64", true)
648      .Default(false);
649
650    if (CPUKnown)
651      CPU = Name;
652
653    return CPUKnown;
654  }
655
656  virtual void getTargetBuiltins(const Builtin::Info *&Records,
657                                 unsigned &NumRecords) const {
658    Records = BuiltinInfo;
659    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
660  }
661
662  virtual bool isCLZForZeroUndef() const { return false; }
663
664  virtual void getTargetDefines(const LangOptions &Opts,
665                                MacroBuilder &Builder) const;
666
667  virtual bool hasFeature(StringRef Feature) const;
668
669  virtual void getGCCRegNames(const char * const *&Names,
670                              unsigned &NumNames) const;
671  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
672                                unsigned &NumAliases) const;
673  virtual bool validateAsmConstraint(const char *&Name,
674                                     TargetInfo::ConstraintInfo &Info) const {
675    switch (*Name) {
676    default: return false;
677    case 'O': // Zero
678      break;
679    case 'b': // Base register
680    case 'f': // Floating point register
681      Info.setAllowsRegister();
682      break;
683    // FIXME: The following are added to allow parsing.
684    // I just took a guess at what the actions should be.
685    // Also, is more specific checking needed?  I.e. specific registers?
686    case 'd': // Floating point register (containing 64-bit value)
687    case 'v': // Altivec vector register
688      Info.setAllowsRegister();
689      break;
690    case 'w':
691      switch (Name[1]) {
692        case 'd':// VSX vector register to hold vector double data
693        case 'f':// VSX vector register to hold vector float data
694        case 's':// VSX vector register to hold scalar float data
695        case 'a':// Any VSX register
696          break;
697        default:
698          return false;
699      }
700      Info.setAllowsRegister();
701      Name++; // Skip over 'w'.
702      break;
703    case 'h': // `MQ', `CTR', or `LINK' register
704    case 'q': // `MQ' register
705    case 'c': // `CTR' register
706    case 'l': // `LINK' register
707    case 'x': // `CR' register (condition register) number 0
708    case 'y': // `CR' register (condition register)
709    case 'z': // `XER[CA]' carry bit (part of the XER register)
710      Info.setAllowsRegister();
711      break;
712    case 'I': // Signed 16-bit constant
713    case 'J': // Unsigned 16-bit constant shifted left 16 bits
714              //  (use `L' instead for SImode constants)
715    case 'K': // Unsigned 16-bit constant
716    case 'L': // Signed 16-bit constant shifted left 16 bits
717    case 'M': // Constant larger than 31
718    case 'N': // Exact power of 2
719    case 'P': // Constant whose negation is a signed 16-bit constant
720    case 'G': // Floating point constant that can be loaded into a
721              // register with one instruction per word
722    case 'H': // Integer/Floating point constant that can be loaded
723              // into a register using three instructions
724      break;
725    case 'm': // Memory operand. Note that on PowerPC targets, m can
726              // include addresses that update the base register. It
727              // is therefore only safe to use `m' in an asm statement
728              // if that asm statement accesses the operand exactly once.
729              // The asm statement must also use `%U<opno>' as a
730              // placeholder for the "update" flag in the corresponding
731              // load or store instruction. For example:
732              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
733              // is correct but:
734              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
735              // is not. Use es rather than m if you don't want the base
736              // register to be updated.
737    case 'e':
738      if (Name[1] != 's')
739          return false;
740              // es: A "stable" memory operand; that is, one which does not
741              // include any automodification of the base register. Unlike
742              // `m', this constraint can be used in asm statements that
743              // might access the operand several times, or that might not
744              // access it at all.
745      Info.setAllowsMemory();
746      Name++; // Skip over 'e'.
747      break;
748    case 'Q': // Memory operand that is an offset from a register (it is
749              // usually better to use `m' or `es' in asm statements)
750    case 'Z': // Memory operand that is an indexed or indirect from a
751              // register (it is usually better to use `m' or `es' in
752              // asm statements)
753      Info.setAllowsMemory();
754      Info.setAllowsRegister();
755      break;
756    case 'R': // AIX TOC entry
757    case 'a': // Address operand that is an indexed or indirect from a
758              // register (`p' is preferable for asm statements)
759    case 'S': // Constant suitable as a 64-bit mask operand
760    case 'T': // Constant suitable as a 32-bit mask operand
761    case 'U': // System V Release 4 small data area reference
762    case 't': // AND masks that can be performed by two rldic{l, r}
763              // instructions
764    case 'W': // Vector constant that does not require memory
765    case 'j': // Vector constant that is all zeros.
766      break;
767    // End FIXME.
768    }
769    return true;
770  }
771  virtual const char *getClobbers() const {
772    return "";
773  }
774};
775
776const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
777#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
778#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
779                                              ALL_LANGUAGES },
780#include "clang/Basic/BuiltinsPPC.def"
781};
782
783
784/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
785/// #defines that are not tied to a specific subtarget.
786void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
787                                     MacroBuilder &Builder) const {
788  // Target identification.
789  Builder.defineMacro("__ppc__");
790  Builder.defineMacro("_ARCH_PPC");
791  Builder.defineMacro("__powerpc__");
792  Builder.defineMacro("__POWERPC__");
793  if (PointerWidth == 64) {
794    Builder.defineMacro("_ARCH_PPC64");
795    Builder.defineMacro("__powerpc64__");
796    Builder.defineMacro("__ppc64__");
797  } else {
798    Builder.defineMacro("__ppc__");
799  }
800
801  // Target properties.
802  if (getTriple().getOS() != llvm::Triple::NetBSD &&
803      getTriple().getOS() != llvm::Triple::OpenBSD)
804    Builder.defineMacro("_BIG_ENDIAN");
805  Builder.defineMacro("__BIG_ENDIAN__");
806
807  // Subtarget options.
808  Builder.defineMacro("__NATURAL_ALIGNMENT__");
809  Builder.defineMacro("__REGISTER_PREFIX__", "");
810
811  // FIXME: Should be controlled by command line option.
812  Builder.defineMacro("__LONG_DOUBLE_128__");
813
814  if (Opts.AltiVec) {
815    Builder.defineMacro("__VEC__", "10206");
816    Builder.defineMacro("__ALTIVEC__");
817  }
818
819  // CPU identification.
820  ArchDefineTypes defs = (ArchDefineTypes)llvm::StringSwitch<int>(CPU)
821    .Case("440",   ArchDefineName)
822    .Case("450",   ArchDefineName | ArchDefine440)
823    .Case("601",   ArchDefineName)
824    .Case("602",   ArchDefineName | ArchDefinePpcgr)
825    .Case("603",   ArchDefineName | ArchDefinePpcgr)
826    .Case("603e",  ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
827    .Case("603ev", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
828    .Case("604",   ArchDefineName | ArchDefinePpcgr)
829    .Case("604e",  ArchDefineName | ArchDefine604 | ArchDefinePpcgr)
830    .Case("620",   ArchDefineName | ArchDefinePpcgr)
831    .Case("7400",  ArchDefineName | ArchDefinePpcgr)
832    .Case("7450",  ArchDefineName | ArchDefinePpcgr)
833    .Case("750",   ArchDefineName | ArchDefinePpcgr)
834    .Case("970",   ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr
835                     | ArchDefinePpcsq)
836    .Case("pwr6",  ArchDefinePwr6 | ArchDefinePpcgr | ArchDefinePpcsq)
837    .Case("pwr7",  ArchDefineName | ArchDefinePwr6 | ArchDefinePpcgr
838                     | ArchDefinePpcsq)
839    .Default(ArchDefineNone);
840
841  if (defs & ArchDefineName)
842    Builder.defineMacro(Twine("_ARCH_", StringRef(CPU).upper()));
843  if (defs & ArchDefinePpcgr)
844    Builder.defineMacro("_ARCH_PPCGR");
845  if (defs & ArchDefinePpcsq)
846    Builder.defineMacro("_ARCH_PPCSQ");
847  if (defs & ArchDefine440)
848    Builder.defineMacro("_ARCH_440");
849  if (defs & ArchDefine603)
850    Builder.defineMacro("_ARCH_603");
851  if (defs & ArchDefine604)
852    Builder.defineMacro("_ARCH_604");
853  if (defs & (ArchDefinePwr4 | ArchDefinePwr6))
854    Builder.defineMacro("_ARCH_PWR4");
855  if (defs & ArchDefinePwr6) {
856    Builder.defineMacro("_ARCH_PWR5");
857    Builder.defineMacro("_ARCH_PWR6");
858  }
859}
860
861bool PPCTargetInfo::hasFeature(StringRef Feature) const {
862  return Feature == "powerpc";
863}
864
865
866const char * const PPCTargetInfo::GCCRegNames[] = {
867  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
868  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
869  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
870  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
871  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
872  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
873  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
874  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
875  "mq", "lr", "ctr", "ap",
876  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
877  "xer",
878  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
879  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
880  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
881  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
882  "vrsave", "vscr",
883  "spe_acc", "spefscr",
884  "sfp"
885};
886
887void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
888                                   unsigned &NumNames) const {
889  Names = GCCRegNames;
890  NumNames = llvm::array_lengthof(GCCRegNames);
891}
892
893const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
894  // While some of these aliases do map to different registers
895  // they still share the same register name.
896  { { "0" }, "r0" },
897  { { "1"}, "r1" },
898  { { "2" }, "r2" },
899  { { "3" }, "r3" },
900  { { "4" }, "r4" },
901  { { "5" }, "r5" },
902  { { "6" }, "r6" },
903  { { "7" }, "r7" },
904  { { "8" }, "r8" },
905  { { "9" }, "r9" },
906  { { "10" }, "r10" },
907  { { "11" }, "r11" },
908  { { "12" }, "r12" },
909  { { "13" }, "r13" },
910  { { "14" }, "r14" },
911  { { "15" }, "r15" },
912  { { "16" }, "r16" },
913  { { "17" }, "r17" },
914  { { "18" }, "r18" },
915  { { "19" }, "r19" },
916  { { "20" }, "r20" },
917  { { "21" }, "r21" },
918  { { "22" }, "r22" },
919  { { "23" }, "r23" },
920  { { "24" }, "r24" },
921  { { "25" }, "r25" },
922  { { "26" }, "r26" },
923  { { "27" }, "r27" },
924  { { "28" }, "r28" },
925  { { "29" }, "r29" },
926  { { "30" }, "r30" },
927  { { "31" }, "r31" },
928  { { "fr0" }, "f0" },
929  { { "fr1" }, "f1" },
930  { { "fr2" }, "f2" },
931  { { "fr3" }, "f3" },
932  { { "fr4" }, "f4" },
933  { { "fr5" }, "f5" },
934  { { "fr6" }, "f6" },
935  { { "fr7" }, "f7" },
936  { { "fr8" }, "f8" },
937  { { "fr9" }, "f9" },
938  { { "fr10" }, "f10" },
939  { { "fr11" }, "f11" },
940  { { "fr12" }, "f12" },
941  { { "fr13" }, "f13" },
942  { { "fr14" }, "f14" },
943  { { "fr15" }, "f15" },
944  { { "fr16" }, "f16" },
945  { { "fr17" }, "f17" },
946  { { "fr18" }, "f18" },
947  { { "fr19" }, "f19" },
948  { { "fr20" }, "f20" },
949  { { "fr21" }, "f21" },
950  { { "fr22" }, "f22" },
951  { { "fr23" }, "f23" },
952  { { "fr24" }, "f24" },
953  { { "fr25" }, "f25" },
954  { { "fr26" }, "f26" },
955  { { "fr27" }, "f27" },
956  { { "fr28" }, "f28" },
957  { { "fr29" }, "f29" },
958  { { "fr30" }, "f30" },
959  { { "fr31" }, "f31" },
960  { { "cc" }, "cr0" },
961};
962
963void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
964                                     unsigned &NumAliases) const {
965  Aliases = GCCRegAliases;
966  NumAliases = llvm::array_lengthof(GCCRegAliases);
967}
968} // end anonymous namespace.
969
970namespace {
971class PPC32TargetInfo : public PPCTargetInfo {
972public:
973  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
974    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
975                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
976
977    switch (getTriple().getOS()) {
978    case llvm::Triple::Linux:
979    case llvm::Triple::FreeBSD:
980    case llvm::Triple::NetBSD:
981      SizeType = UnsignedInt;
982      PtrDiffType = SignedInt;
983      IntPtrType = SignedInt;
984      break;
985    default:
986      break;
987    }
988
989    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
990      LongDoubleWidth = LongDoubleAlign = 64;
991      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
992    }
993  }
994
995  virtual BuiltinVaListKind getBuiltinVaListKind() const {
996    // This is the ELF definition, and is overridden by the Darwin sub-target
997    return TargetInfo::PowerABIBuiltinVaList;
998  }
999};
1000} // end anonymous namespace.
1001
1002namespace {
1003class PPC64TargetInfo : public PPCTargetInfo {
1004public:
1005  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
1006    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1007    IntMaxType = SignedLong;
1008    UIntMaxType = UnsignedLong;
1009    Int64Type = SignedLong;
1010    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1011                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
1012
1013    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1014      LongDoubleWidth = LongDoubleAlign = 64;
1015      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1016    }
1017  }
1018  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1019    return TargetInfo::CharPtrBuiltinVaList;
1020  }
1021};
1022} // end anonymous namespace.
1023
1024
1025namespace {
1026class DarwinPPC32TargetInfo :
1027  public DarwinTargetInfo<PPC32TargetInfo> {
1028public:
1029  DarwinPPC32TargetInfo(const std::string& triple)
1030    : DarwinTargetInfo<PPC32TargetInfo>(triple) {
1031    HasAlignMac68kSupport = true;
1032    BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
1033    LongLongAlign = 32;
1034    SuitableAlign = 128;
1035    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1036                        "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32";
1037  }
1038  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1039    return TargetInfo::CharPtrBuiltinVaList;
1040  }
1041};
1042
1043class DarwinPPC64TargetInfo :
1044  public DarwinTargetInfo<PPC64TargetInfo> {
1045public:
1046  DarwinPPC64TargetInfo(const std::string& triple)
1047    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
1048    HasAlignMac68kSupport = true;
1049    SuitableAlign = 128;
1050  }
1051};
1052} // end anonymous namespace.
1053
1054namespace {
1055  static const unsigned NVPTXAddrSpaceMap[] = {
1056    1,    // opencl_global
1057    3,    // opencl_local
1058    4,    // opencl_constant
1059    1,    // cuda_device
1060    4,    // cuda_constant
1061    3,    // cuda_shared
1062  };
1063  class NVPTXTargetInfo : public TargetInfo {
1064    static const char * const GCCRegNames[];
1065    static const Builtin::Info BuiltinInfo[];
1066    std::vector<llvm::StringRef> AvailableFeatures;
1067  public:
1068    NVPTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
1069      BigEndian = false;
1070      TLSSupported = false;
1071      LongWidth = LongAlign = 64;
1072      AddrSpaceMap = &NVPTXAddrSpaceMap;
1073      // Define available target features
1074      // These must be defined in sorted order!
1075      NoAsmVariants = true;
1076    }
1077    virtual void getTargetDefines(const LangOptions &Opts,
1078                                  MacroBuilder &Builder) const {
1079      Builder.defineMacro("__PTX__");
1080      Builder.defineMacro("__NVPTX__");
1081    }
1082    virtual void getTargetBuiltins(const Builtin::Info *&Records,
1083                                   unsigned &NumRecords) const {
1084      Records = BuiltinInfo;
1085      NumRecords = clang::NVPTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
1086    }
1087    virtual bool hasFeature(StringRef Feature) const {
1088      return Feature == "ptx" || Feature == "nvptx";
1089    }
1090
1091    virtual void getGCCRegNames(const char * const *&Names,
1092                                unsigned &NumNames) const;
1093    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1094                                  unsigned &NumAliases) const {
1095      // No aliases.
1096      Aliases = 0;
1097      NumAliases = 0;
1098    }
1099    virtual bool validateAsmConstraint(const char *&Name,
1100                                       TargetInfo::ConstraintInfo &info) const {
1101      // FIXME: implement
1102      return true;
1103    }
1104    virtual const char *getClobbers() const {
1105      // FIXME: Is this really right?
1106      return "";
1107    }
1108    virtual BuiltinVaListKind getBuiltinVaListKind() const {
1109      // FIXME: implement
1110      return TargetInfo::CharPtrBuiltinVaList;
1111    }
1112    virtual bool setCPU(const std::string &Name) {
1113      return Name == "sm_10" || Name == "sm_13" || Name == "sm_20";
1114    }
1115    virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1116                                   StringRef Name,
1117                                   bool Enabled) const;
1118  };
1119
1120  const Builtin::Info NVPTXTargetInfo::BuiltinInfo[] = {
1121#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1122#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1123                                              ALL_LANGUAGES },
1124#include "clang/Basic/BuiltinsNVPTX.def"
1125  };
1126
1127  const char * const NVPTXTargetInfo::GCCRegNames[] = {
1128    "r0"
1129  };
1130
1131  void NVPTXTargetInfo::getGCCRegNames(const char * const *&Names,
1132                                     unsigned &NumNames) const {
1133    Names = GCCRegNames;
1134    NumNames = llvm::array_lengthof(GCCRegNames);
1135  }
1136
1137  bool NVPTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1138                                          StringRef Name,
1139                                          bool Enabled) const {
1140    if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
1141                          Name)) {
1142      Features[Name] = Enabled;
1143      return true;
1144    } else {
1145      return false;
1146    }
1147  }
1148
1149  class NVPTX32TargetInfo : public NVPTXTargetInfo {
1150  public:
1151    NVPTX32TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1152      PointerWidth = PointerAlign = 32;
1153      SizeType     = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1154      DescriptionString
1155        = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1156          "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1157          "n16:32:64";
1158  }
1159  };
1160
1161  class NVPTX64TargetInfo : public NVPTXTargetInfo {
1162  public:
1163    NVPTX64TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1164      PointerWidth = PointerAlign = 64;
1165      SizeType     = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1166      DescriptionString
1167        = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1168          "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1169          "n16:32:64";
1170  }
1171  };
1172}
1173
1174namespace {
1175// MBlaze abstract base class
1176class MBlazeTargetInfo : public TargetInfo {
1177  static const char * const GCCRegNames[];
1178  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1179
1180public:
1181  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1182    DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1183  }
1184
1185  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1186                                 unsigned &NumRecords) const {
1187    // FIXME: Implement.
1188    Records = 0;
1189    NumRecords = 0;
1190  }
1191
1192  virtual void getTargetDefines(const LangOptions &Opts,
1193                                MacroBuilder &Builder) const;
1194
1195  virtual bool hasFeature(StringRef Feature) const {
1196    return Feature == "mblaze";
1197  }
1198
1199  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1200    return TargetInfo::CharPtrBuiltinVaList;
1201  }
1202  virtual const char *getTargetPrefix() const {
1203    return "mblaze";
1204  }
1205  virtual void getGCCRegNames(const char * const *&Names,
1206                              unsigned &NumNames) const;
1207  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1208                                unsigned &NumAliases) const;
1209  virtual bool validateAsmConstraint(const char *&Name,
1210                                     TargetInfo::ConstraintInfo &Info) const {
1211    switch (*Name) {
1212    default: return false;
1213    case 'O': // Zero
1214      return true;
1215    case 'b': // Base register
1216    case 'f': // Floating point register
1217      Info.setAllowsRegister();
1218      return true;
1219    }
1220  }
1221  virtual const char *getClobbers() const {
1222    return "";
1223  }
1224};
1225
1226/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1227/// #defines that are not tied to a specific subtarget.
1228void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1229                                     MacroBuilder &Builder) const {
1230  // Target identification.
1231  Builder.defineMacro("__microblaze__");
1232  Builder.defineMacro("_ARCH_MICROBLAZE");
1233  Builder.defineMacro("__MICROBLAZE__");
1234
1235  // Target properties.
1236  Builder.defineMacro("_BIG_ENDIAN");
1237  Builder.defineMacro("__BIG_ENDIAN__");
1238
1239  // Subtarget options.
1240  Builder.defineMacro("__REGISTER_PREFIX__", "");
1241}
1242
1243
1244const char * const MBlazeTargetInfo::GCCRegNames[] = {
1245  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
1246  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
1247  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
1248  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
1249  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
1250  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1251  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1252  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1253  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1254  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
1255};
1256
1257void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1258                                   unsigned &NumNames) const {
1259  Names = GCCRegNames;
1260  NumNames = llvm::array_lengthof(GCCRegNames);
1261}
1262
1263const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1264  { {"f0"},  "r0" },
1265  { {"f1"},  "r1" },
1266  { {"f2"},  "r2" },
1267  { {"f3"},  "r3" },
1268  { {"f4"},  "r4" },
1269  { {"f5"},  "r5" },
1270  { {"f6"},  "r6" },
1271  { {"f7"},  "r7" },
1272  { {"f8"},  "r8" },
1273  { {"f9"},  "r9" },
1274  { {"f10"}, "r10" },
1275  { {"f11"}, "r11" },
1276  { {"f12"}, "r12" },
1277  { {"f13"}, "r13" },
1278  { {"f14"}, "r14" },
1279  { {"f15"}, "r15" },
1280  { {"f16"}, "r16" },
1281  { {"f17"}, "r17" },
1282  { {"f18"}, "r18" },
1283  { {"f19"}, "r19" },
1284  { {"f20"}, "r20" },
1285  { {"f21"}, "r21" },
1286  { {"f22"}, "r22" },
1287  { {"f23"}, "r23" },
1288  { {"f24"}, "r24" },
1289  { {"f25"}, "r25" },
1290  { {"f26"}, "r26" },
1291  { {"f27"}, "r27" },
1292  { {"f28"}, "r28" },
1293  { {"f29"}, "r29" },
1294  { {"f30"}, "r30" },
1295  { {"f31"}, "r31" },
1296};
1297
1298void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1299                                     unsigned &NumAliases) const {
1300  Aliases = GCCRegAliases;
1301  NumAliases = llvm::array_lengthof(GCCRegAliases);
1302}
1303} // end anonymous namespace.
1304
1305namespace {
1306// Namespace for x86 abstract base class
1307const Builtin::Info BuiltinInfo[] = {
1308#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1309#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1310                                              ALL_LANGUAGES },
1311#include "clang/Basic/BuiltinsX86.def"
1312};
1313
1314static const char* const GCCRegNames[] = {
1315  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1316  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1317  "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1318  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1319  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1320  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1321  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1322  "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1323  "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1324};
1325
1326const TargetInfo::AddlRegName AddlRegNames[] = {
1327  { { "al", "ah", "eax", "rax" }, 0 },
1328  { { "bl", "bh", "ebx", "rbx" }, 3 },
1329  { { "cl", "ch", "ecx", "rcx" }, 2 },
1330  { { "dl", "dh", "edx", "rdx" }, 1 },
1331  { { "esi", "rsi" }, 4 },
1332  { { "edi", "rdi" }, 5 },
1333  { { "esp", "rsp" }, 7 },
1334  { { "ebp", "rbp" }, 6 },
1335};
1336
1337// X86 target abstract base class; x86-32 and x86-64 are very close, so
1338// most of the implementation can be shared.
1339class X86TargetInfo : public TargetInfo {
1340  enum X86SSEEnum {
1341    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1342  } SSELevel;
1343  enum MMX3DNowEnum {
1344    NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1345  } MMX3DNowLevel;
1346
1347  bool HasAES;
1348  bool HasPCLMUL;
1349  bool HasLZCNT;
1350  bool HasRDRND;
1351  bool HasBMI;
1352  bool HasBMI2;
1353  bool HasPOPCNT;
1354  bool HasSSE4a;
1355  bool HasFMA4;
1356  bool HasFMA;
1357  bool HasXOP;
1358
1359  /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1360  ///
1361  /// Each enumeration represents a particular CPU supported by Clang. These
1362  /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1363  enum CPUKind {
1364    CK_Generic,
1365
1366    /// \name i386
1367    /// i386-generation processors.
1368    //@{
1369    CK_i386,
1370    //@}
1371
1372    /// \name i486
1373    /// i486-generation processors.
1374    //@{
1375    CK_i486,
1376    CK_WinChipC6,
1377    CK_WinChip2,
1378    CK_C3,
1379    //@}
1380
1381    /// \name i586
1382    /// i586-generation processors, P5 microarchitecture based.
1383    //@{
1384    CK_i586,
1385    CK_Pentium,
1386    CK_PentiumMMX,
1387    //@}
1388
1389    /// \name i686
1390    /// i686-generation processors, P6 / Pentium M microarchitecture based.
1391    //@{
1392    CK_i686,
1393    CK_PentiumPro,
1394    CK_Pentium2,
1395    CK_Pentium3,
1396    CK_Pentium3M,
1397    CK_PentiumM,
1398    CK_C3_2,
1399
1400    /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1401    /// Clang however has some logic to suport this.
1402    // FIXME: Warn, deprecate, and potentially remove this.
1403    CK_Yonah,
1404    //@}
1405
1406    /// \name Netburst
1407    /// Netburst microarchitecture based processors.
1408    //@{
1409    CK_Pentium4,
1410    CK_Pentium4M,
1411    CK_Prescott,
1412    CK_Nocona,
1413    //@}
1414
1415    /// \name Core
1416    /// Core microarchitecture based processors.
1417    //@{
1418    CK_Core2,
1419
1420    /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1421    /// codename which GCC no longer accepts as an option to -march, but Clang
1422    /// has some logic for recognizing it.
1423    // FIXME: Warn, deprecate, and potentially remove this.
1424    CK_Penryn,
1425    //@}
1426
1427    /// \name Atom
1428    /// Atom processors
1429    //@{
1430    CK_Atom,
1431    //@}
1432
1433    /// \name Nehalem
1434    /// Nehalem microarchitecture based processors.
1435    //@{
1436    CK_Corei7,
1437    CK_Corei7AVX,
1438    CK_CoreAVXi,
1439    CK_CoreAVX2,
1440    //@}
1441
1442    /// \name K6
1443    /// K6 architecture processors.
1444    //@{
1445    CK_K6,
1446    CK_K6_2,
1447    CK_K6_3,
1448    //@}
1449
1450    /// \name K7
1451    /// K7 architecture processors.
1452    //@{
1453    CK_Athlon,
1454    CK_AthlonThunderbird,
1455    CK_Athlon4,
1456    CK_AthlonXP,
1457    CK_AthlonMP,
1458    //@}
1459
1460    /// \name K8
1461    /// K8 architecture processors.
1462    //@{
1463    CK_Athlon64,
1464    CK_Athlon64SSE3,
1465    CK_AthlonFX,
1466    CK_K8,
1467    CK_K8SSE3,
1468    CK_Opteron,
1469    CK_OpteronSSE3,
1470    CK_AMDFAM10,
1471    //@}
1472
1473    /// \name Bobcat
1474    /// Bobcat architecture processors.
1475    //@{
1476    CK_BTVER1,
1477    //@}
1478
1479    /// \name Bulldozer
1480    /// Bulldozer architecture processors.
1481    //@{
1482    CK_BDVER1,
1483    CK_BDVER2,
1484    //@}
1485
1486    /// This specification is deprecated and will be removed in the future.
1487    /// Users should prefer \see CK_K8.
1488    // FIXME: Warn on this when the CPU is set to it.
1489    CK_x86_64,
1490    //@}
1491
1492    /// \name Geode
1493    /// Geode processors.
1494    //@{
1495    CK_Geode
1496    //@}
1497  } CPU;
1498
1499public:
1500  X86TargetInfo(const std::string& triple)
1501    : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1502      HasAES(false), HasPCLMUL(false), HasLZCNT(false), HasRDRND(false),
1503      HasBMI(false), HasBMI2(false), HasPOPCNT(false), HasSSE4a(false),
1504      HasFMA4(false), HasFMA(false), HasXOP(false), CPU(CK_Generic) {
1505    BigEndian = false;
1506    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1507  }
1508  virtual unsigned getFloatEvalMethod() const {
1509    // X87 evaluates with 80 bits "long double" precision.
1510    return SSELevel == NoSSE ? 2 : 0;
1511  }
1512  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1513                                 unsigned &NumRecords) const {
1514    Records = BuiltinInfo;
1515    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1516  }
1517  virtual void getGCCRegNames(const char * const *&Names,
1518                              unsigned &NumNames) const {
1519    Names = GCCRegNames;
1520    NumNames = llvm::array_lengthof(GCCRegNames);
1521  }
1522  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1523                                unsigned &NumAliases) const {
1524    Aliases = 0;
1525    NumAliases = 0;
1526  }
1527  virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1528				  unsigned &NumNames) const {
1529    Names = AddlRegNames;
1530    NumNames = llvm::array_lengthof(AddlRegNames);
1531  }
1532  virtual bool validateAsmConstraint(const char *&Name,
1533                                     TargetInfo::ConstraintInfo &info) const;
1534  virtual std::string convertConstraint(const char *&Constraint) const;
1535  virtual const char *getClobbers() const {
1536    return "~{dirflag},~{fpsr},~{flags}";
1537  }
1538  virtual void getTargetDefines(const LangOptions &Opts,
1539                                MacroBuilder &Builder) const;
1540  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1541                                 StringRef Name,
1542                                 bool Enabled) const;
1543  virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1544  virtual bool hasFeature(StringRef Feature) const;
1545  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1546  virtual const char* getABI() const {
1547    if (PointerWidth == 64 && SSELevel >= AVX)
1548      return "avx";
1549    else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow)
1550      return "no-mmx";
1551    return "";
1552  }
1553  virtual bool setCPU(const std::string &Name) {
1554    CPU = llvm::StringSwitch<CPUKind>(Name)
1555      .Case("i386", CK_i386)
1556      .Case("i486", CK_i486)
1557      .Case("winchip-c6", CK_WinChipC6)
1558      .Case("winchip2", CK_WinChip2)
1559      .Case("c3", CK_C3)
1560      .Case("i586", CK_i586)
1561      .Case("pentium", CK_Pentium)
1562      .Case("pentium-mmx", CK_PentiumMMX)
1563      .Case("i686", CK_i686)
1564      .Case("pentiumpro", CK_PentiumPro)
1565      .Case("pentium2", CK_Pentium2)
1566      .Case("pentium3", CK_Pentium3)
1567      .Case("pentium3m", CK_Pentium3M)
1568      .Case("pentium-m", CK_PentiumM)
1569      .Case("c3-2", CK_C3_2)
1570      .Case("yonah", CK_Yonah)
1571      .Case("pentium4", CK_Pentium4)
1572      .Case("pentium4m", CK_Pentium4M)
1573      .Case("prescott", CK_Prescott)
1574      .Case("nocona", CK_Nocona)
1575      .Case("core2", CK_Core2)
1576      .Case("penryn", CK_Penryn)
1577      .Case("atom", CK_Atom)
1578      .Case("corei7", CK_Corei7)
1579      .Case("corei7-avx", CK_Corei7AVX)
1580      .Case("core-avx-i", CK_CoreAVXi)
1581      .Case("core-avx2", CK_CoreAVX2)
1582      .Case("k6", CK_K6)
1583      .Case("k6-2", CK_K6_2)
1584      .Case("k6-3", CK_K6_3)
1585      .Case("athlon", CK_Athlon)
1586      .Case("athlon-tbird", CK_AthlonThunderbird)
1587      .Case("athlon-4", CK_Athlon4)
1588      .Case("athlon-xp", CK_AthlonXP)
1589      .Case("athlon-mp", CK_AthlonMP)
1590      .Case("athlon64", CK_Athlon64)
1591      .Case("athlon64-sse3", CK_Athlon64SSE3)
1592      .Case("athlon-fx", CK_AthlonFX)
1593      .Case("k8", CK_K8)
1594      .Case("k8-sse3", CK_K8SSE3)
1595      .Case("opteron", CK_Opteron)
1596      .Case("opteron-sse3", CK_OpteronSSE3)
1597      .Case("amdfam10", CK_AMDFAM10)
1598      .Case("btver1", CK_BTVER1)
1599      .Case("bdver1", CK_BDVER1)
1600      .Case("bdver2", CK_BDVER2)
1601      .Case("x86-64", CK_x86_64)
1602      .Case("geode", CK_Geode)
1603      .Default(CK_Generic);
1604
1605    // Perform any per-CPU checks necessary to determine if this CPU is
1606    // acceptable.
1607    // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1608    // invalid without explaining *why*.
1609    switch (CPU) {
1610    case CK_Generic:
1611      // No processor selected!
1612      return false;
1613
1614    case CK_i386:
1615    case CK_i486:
1616    case CK_WinChipC6:
1617    case CK_WinChip2:
1618    case CK_C3:
1619    case CK_i586:
1620    case CK_Pentium:
1621    case CK_PentiumMMX:
1622    case CK_i686:
1623    case CK_PentiumPro:
1624    case CK_Pentium2:
1625    case CK_Pentium3:
1626    case CK_Pentium3M:
1627    case CK_PentiumM:
1628    case CK_Yonah:
1629    case CK_C3_2:
1630    case CK_Pentium4:
1631    case CK_Pentium4M:
1632    case CK_Prescott:
1633    case CK_K6:
1634    case CK_K6_2:
1635    case CK_K6_3:
1636    case CK_Athlon:
1637    case CK_AthlonThunderbird:
1638    case CK_Athlon4:
1639    case CK_AthlonXP:
1640    case CK_AthlonMP:
1641    case CK_Geode:
1642      // Only accept certain architectures when compiling in 32-bit mode.
1643      if (PointerWidth != 32)
1644        return false;
1645
1646      // Fallthrough
1647    case CK_Nocona:
1648    case CK_Core2:
1649    case CK_Penryn:
1650    case CK_Atom:
1651    case CK_Corei7:
1652    case CK_Corei7AVX:
1653    case CK_CoreAVXi:
1654    case CK_CoreAVX2:
1655    case CK_Athlon64:
1656    case CK_Athlon64SSE3:
1657    case CK_AthlonFX:
1658    case CK_K8:
1659    case CK_K8SSE3:
1660    case CK_Opteron:
1661    case CK_OpteronSSE3:
1662    case CK_AMDFAM10:
1663    case CK_BTVER1:
1664    case CK_BDVER1:
1665    case CK_BDVER2:
1666    case CK_x86_64:
1667      return true;
1668    }
1669    llvm_unreachable("Unhandled CPU kind");
1670  }
1671};
1672
1673void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1674  // FIXME: This should not be here.
1675  Features["3dnow"] = false;
1676  Features["3dnowa"] = false;
1677  Features["mmx"] = false;
1678  Features["sse"] = false;
1679  Features["sse2"] = false;
1680  Features["sse3"] = false;
1681  Features["ssse3"] = false;
1682  Features["sse41"] = false;
1683  Features["sse42"] = false;
1684  Features["sse4a"] = false;
1685  Features["aes"] = false;
1686  Features["pclmul"] = false;
1687  Features["avx"] = false;
1688  Features["avx2"] = false;
1689  Features["lzcnt"] = false;
1690  Features["rdrand"] = false;
1691  Features["bmi"] = false;
1692  Features["bmi2"] = false;
1693  Features["popcnt"] = false;
1694  Features["fma4"] = false;
1695  Features["fma"] = false;
1696  Features["xop"] = false;
1697
1698  // FIXME: This *really* should not be here.
1699
1700  // X86_64 always has SSE2.
1701  if (PointerWidth == 64)
1702    Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1703
1704  switch (CPU) {
1705  case CK_Generic:
1706  case CK_i386:
1707  case CK_i486:
1708  case CK_i586:
1709  case CK_Pentium:
1710  case CK_i686:
1711  case CK_PentiumPro:
1712    break;
1713  case CK_PentiumMMX:
1714  case CK_Pentium2:
1715    setFeatureEnabled(Features, "mmx", true);
1716    break;
1717  case CK_Pentium3:
1718  case CK_Pentium3M:
1719    setFeatureEnabled(Features, "mmx", true);
1720    setFeatureEnabled(Features, "sse", true);
1721    break;
1722  case CK_PentiumM:
1723  case CK_Pentium4:
1724  case CK_Pentium4M:
1725  case CK_x86_64:
1726    setFeatureEnabled(Features, "mmx", true);
1727    setFeatureEnabled(Features, "sse2", true);
1728    break;
1729  case CK_Yonah:
1730  case CK_Prescott:
1731  case CK_Nocona:
1732    setFeatureEnabled(Features, "mmx", true);
1733    setFeatureEnabled(Features, "sse3", true);
1734    break;
1735  case CK_Core2:
1736    setFeatureEnabled(Features, "mmx", true);
1737    setFeatureEnabled(Features, "ssse3", true);
1738    break;
1739  case CK_Penryn:
1740    setFeatureEnabled(Features, "mmx", true);
1741    setFeatureEnabled(Features, "sse4.1", true);
1742    break;
1743  case CK_Atom:
1744    setFeatureEnabled(Features, "mmx", true);
1745    setFeatureEnabled(Features, "ssse3", true);
1746    break;
1747  case CK_Corei7:
1748    setFeatureEnabled(Features, "mmx", true);
1749    setFeatureEnabled(Features, "sse4", true);
1750    break;
1751  case CK_Corei7AVX:
1752    setFeatureEnabled(Features, "mmx", true);
1753    setFeatureEnabled(Features, "avx", true);
1754    setFeatureEnabled(Features, "aes", true);
1755    setFeatureEnabled(Features, "pclmul", true);
1756    break;
1757  case CK_CoreAVXi:
1758    setFeatureEnabled(Features, "mmx", true);
1759    setFeatureEnabled(Features, "avx", true);
1760    setFeatureEnabled(Features, "aes", true);
1761    setFeatureEnabled(Features, "pclmul", true);
1762    setFeatureEnabled(Features, "rdrnd", true);
1763    break;
1764  case CK_CoreAVX2:
1765    setFeatureEnabled(Features, "mmx", true);
1766    setFeatureEnabled(Features, "avx2", true);
1767    setFeatureEnabled(Features, "aes", true);
1768    setFeatureEnabled(Features, "pclmul", true);
1769    setFeatureEnabled(Features, "lzcnt", true);
1770    setFeatureEnabled(Features, "rdrnd", true);
1771    setFeatureEnabled(Features, "bmi", true);
1772    setFeatureEnabled(Features, "bmi2", true);
1773    setFeatureEnabled(Features, "fma", true);
1774    break;
1775  case CK_K6:
1776  case CK_WinChipC6:
1777    setFeatureEnabled(Features, "mmx", true);
1778    break;
1779  case CK_K6_2:
1780  case CK_K6_3:
1781  case CK_WinChip2:
1782  case CK_C3:
1783    setFeatureEnabled(Features, "3dnow", true);
1784    break;
1785  case CK_Athlon:
1786  case CK_AthlonThunderbird:
1787  case CK_Geode:
1788    setFeatureEnabled(Features, "3dnowa", true);
1789    break;
1790  case CK_Athlon4:
1791  case CK_AthlonXP:
1792  case CK_AthlonMP:
1793    setFeatureEnabled(Features, "sse", true);
1794    setFeatureEnabled(Features, "3dnowa", true);
1795    break;
1796  case CK_K8:
1797  case CK_Opteron:
1798  case CK_Athlon64:
1799  case CK_AthlonFX:
1800    setFeatureEnabled(Features, "sse2", true);
1801    setFeatureEnabled(Features, "3dnowa", true);
1802    break;
1803  case CK_K8SSE3:
1804  case CK_OpteronSSE3:
1805  case CK_Athlon64SSE3:
1806    setFeatureEnabled(Features, "sse3", true);
1807    setFeatureEnabled(Features, "3dnowa", true);
1808    break;
1809  case CK_AMDFAM10:
1810    setFeatureEnabled(Features, "sse3", true);
1811    setFeatureEnabled(Features, "sse4a", true);
1812    setFeatureEnabled(Features, "3dnowa", true);
1813    break;
1814  case CK_BTVER1:
1815    setFeatureEnabled(Features, "ssse3", true);
1816    setFeatureEnabled(Features, "sse4a", true);
1817    break;
1818  case CK_BDVER1:
1819  case CK_BDVER2:
1820    setFeatureEnabled(Features, "avx", true);
1821    setFeatureEnabled(Features, "xop", true);
1822    setFeatureEnabled(Features, "aes", true);
1823    setFeatureEnabled(Features, "pclmul", true);
1824    break;
1825  case CK_C3_2:
1826    setFeatureEnabled(Features, "mmx", true);
1827    setFeatureEnabled(Features, "sse", true);
1828    break;
1829  }
1830}
1831
1832bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1833                                      StringRef Name,
1834                                      bool Enabled) const {
1835  // FIXME: This *really* should not be here.  We need some way of translating
1836  // options into llvm subtarget features.
1837  if (!Features.count(Name) &&
1838      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1" &&
1839       Name != "rdrnd"))
1840    return false;
1841
1842  // FIXME: this should probably use a switch with fall through.
1843
1844  if (Enabled) {
1845    if (Name == "mmx")
1846      Features["mmx"] = true;
1847    else if (Name == "sse")
1848      Features["mmx"] = Features["sse"] = true;
1849    else if (Name == "sse2")
1850      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1851    else if (Name == "sse3")
1852      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1853        true;
1854    else if (Name == "ssse3")
1855      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1856        Features["ssse3"] = true;
1857    else if (Name == "sse4" || Name == "sse4.2")
1858      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1859        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1860        Features["popcnt"] = true;
1861    else if (Name == "sse4.1")
1862      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1863        Features["ssse3"] = Features["sse41"] = true;
1864    else if (Name == "3dnow")
1865      Features["mmx"] = Features["3dnow"] = true;
1866    else if (Name == "3dnowa")
1867      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
1868    else if (Name == "aes")
1869      Features["sse"] = Features["sse2"] = Features["aes"] = true;
1870    else if (Name == "pclmul")
1871      Features["sse"] = Features["sse2"] = Features["pclmul"] = true;
1872    else if (Name == "avx")
1873      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1874        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1875        Features["popcnt"] = Features["avx"] = true;
1876    else if (Name == "avx2")
1877      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1878        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1879        Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
1880    else if (Name == "fma")
1881      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1882        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1883        Features["popcnt"] = Features["avx"] = Features["fma"] = true;
1884    else if (Name == "fma4")
1885        Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1886        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1887        Features["popcnt"] = Features["avx"] = Features["sse4a"] =
1888        Features["fma4"] = true;
1889    else if (Name == "xop")
1890        Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1891        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1892        Features["popcnt"] = Features["avx"] = Features["sse4a"] =
1893        Features["fma4"] = Features["xop"] = true;
1894    else if (Name == "sse4a")
1895      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1896        Features["sse4a"] = true;
1897    else if (Name == "lzcnt")
1898      Features["lzcnt"] = true;
1899    else if (Name == "rdrnd")
1900      Features["rdrand"] = true;
1901    else if (Name == "bmi")
1902      Features["bmi"] = true;
1903    else if (Name == "bmi2")
1904      Features["bmi2"] = true;
1905    else if (Name == "popcnt")
1906      Features["popcnt"] = true;
1907  } else {
1908    if (Name == "mmx")
1909      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
1910    else if (Name == "sse")
1911      Features["sse"] = Features["sse2"] = Features["sse3"] =
1912        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1913        Features["sse4a"] = Features["avx"] = Features["avx2"] =
1914        Features["fma"] = Features["fma4"] = Features["aes"] =
1915        Features["pclmul"] = Features["xop"] = false;
1916    else if (Name == "sse2")
1917      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1918        Features["sse41"] = Features["sse42"] = Features["sse4a"] =
1919        Features["avx"] = Features["avx2"] = Features["fma"] =
1920        Features["fma4"] = Features["aes"] = Features["pclmul"] =
1921        Features["xop"] = false;
1922    else if (Name == "sse3")
1923      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1924        Features["sse42"] = Features["sse4a"] = Features["avx"] =
1925        Features["avx2"] = Features["fma"] = Features["fma4"] =
1926        Features["xop"] = false;
1927    else if (Name == "ssse3")
1928      Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1929        Features["avx"] = Features["avx2"] = Features["fma"] = false;
1930    else if (Name == "sse4" || Name == "sse4.1")
1931      Features["sse41"] = Features["sse42"] = Features["avx"] =
1932        Features["avx2"] = Features["fma"] = false;
1933    else if (Name == "sse4.2")
1934      Features["sse42"] = Features["avx"] = Features["avx2"] =
1935        Features["fma"] = false;
1936    else if (Name == "3dnow")
1937      Features["3dnow"] = Features["3dnowa"] = false;
1938    else if (Name == "3dnowa")
1939      Features["3dnowa"] = false;
1940    else if (Name == "aes")
1941      Features["aes"] = false;
1942    else if (Name == "pclmul")
1943      Features["pclmul"] = false;
1944    else if (Name == "avx")
1945      Features["avx"] = Features["avx2"] = Features["fma"] =
1946        Features["fma4"] = Features["xop"] = false;
1947    else if (Name == "avx2")
1948      Features["avx2"] = false;
1949    else if (Name == "fma")
1950      Features["fma"] = false;
1951    else if (Name == "sse4a")
1952      Features["sse4a"] = Features["fma4"] = Features["xop"] = false;
1953    else if (Name == "lzcnt")
1954      Features["lzcnt"] = false;
1955    else if (Name == "rdrnd")
1956      Features["rdrand"] = false;
1957    else if (Name == "bmi")
1958      Features["bmi"] = false;
1959    else if (Name == "bmi2")
1960      Features["bmi2"] = false;
1961    else if (Name == "popcnt")
1962      Features["popcnt"] = false;
1963    else if (Name == "fma4")
1964      Features["fma4"] = Features["xop"] = false;
1965    else if (Name == "xop")
1966      Features["xop"] = false;
1967  }
1968
1969  return true;
1970}
1971
1972/// HandleTargetOptions - Perform initialization based on the user
1973/// configured set of features.
1974void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1975  // Remember the maximum enabled sselevel.
1976  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1977    // Ignore disabled features.
1978    if (Features[i][0] == '-')
1979      continue;
1980
1981    StringRef Feature = StringRef(Features[i]).substr(1);
1982
1983    if (Feature == "aes") {
1984      HasAES = true;
1985      continue;
1986    }
1987
1988    if (Feature == "pclmul") {
1989      HasPCLMUL = true;
1990      continue;
1991    }
1992
1993    if (Feature == "lzcnt") {
1994      HasLZCNT = true;
1995      continue;
1996    }
1997
1998    if (Feature == "rdrand") {
1999      HasRDRND = true;
2000      continue;
2001    }
2002
2003    if (Feature == "bmi") {
2004      HasBMI = true;
2005      continue;
2006    }
2007
2008    if (Feature == "bmi2") {
2009      HasBMI2 = true;
2010      continue;
2011    }
2012
2013    if (Feature == "popcnt") {
2014      HasPOPCNT = true;
2015      continue;
2016    }
2017
2018    if (Feature == "sse4a") {
2019      HasSSE4a = true;
2020      continue;
2021    }
2022
2023    if (Feature == "fma4") {
2024      HasFMA4 = true;
2025      continue;
2026    }
2027
2028    if (Feature == "fma") {
2029      HasFMA = true;
2030      continue;
2031    }
2032
2033    if (Feature == "xop") {
2034      HasXOP = true;
2035      continue;
2036    }
2037
2038    assert(Features[i][0] == '+' && "Invalid target feature!");
2039    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
2040      .Case("avx2", AVX2)
2041      .Case("avx", AVX)
2042      .Case("sse42", SSE42)
2043      .Case("sse41", SSE41)
2044      .Case("ssse3", SSSE3)
2045      .Case("sse3", SSE3)
2046      .Case("sse2", SSE2)
2047      .Case("sse", SSE1)
2048      .Default(NoSSE);
2049    SSELevel = std::max(SSELevel, Level);
2050
2051    MMX3DNowEnum ThreeDNowLevel =
2052      llvm::StringSwitch<MMX3DNowEnum>(Feature)
2053        .Case("3dnowa", AMD3DNowAthlon)
2054        .Case("3dnow", AMD3DNow)
2055        .Case("mmx", MMX)
2056        .Default(NoMMX3DNow);
2057
2058    MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
2059  }
2060
2061  // Don't tell the backend if we're turning off mmx; it will end up disabling
2062  // SSE, which we don't want.
2063  std::vector<std::string>::iterator it;
2064  it = std::find(Features.begin(), Features.end(), "-mmx");
2065  if (it != Features.end())
2066    Features.erase(it);
2067}
2068
2069/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
2070/// definitions for this particular subtarget.
2071void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
2072                                     MacroBuilder &Builder) const {
2073  // Target identification.
2074  if (PointerWidth == 64) {
2075    Builder.defineMacro("__amd64__");
2076    Builder.defineMacro("__amd64");
2077    Builder.defineMacro("__x86_64");
2078    Builder.defineMacro("__x86_64__");
2079  } else {
2080    DefineStd(Builder, "i386", Opts);
2081  }
2082
2083  // Subtarget options.
2084  // FIXME: We are hard-coding the tune parameters based on the CPU, but they
2085  // truly should be based on -mtune options.
2086  switch (CPU) {
2087  case CK_Generic:
2088    break;
2089  case CK_i386:
2090    // The rest are coming from the i386 define above.
2091    Builder.defineMacro("__tune_i386__");
2092    break;
2093  case CK_i486:
2094  case CK_WinChipC6:
2095  case CK_WinChip2:
2096  case CK_C3:
2097    defineCPUMacros(Builder, "i486");
2098    break;
2099  case CK_PentiumMMX:
2100    Builder.defineMacro("__pentium_mmx__");
2101    Builder.defineMacro("__tune_pentium_mmx__");
2102    // Fallthrough
2103  case CK_i586:
2104  case CK_Pentium:
2105    defineCPUMacros(Builder, "i586");
2106    defineCPUMacros(Builder, "pentium");
2107    break;
2108  case CK_Pentium3:
2109  case CK_Pentium3M:
2110  case CK_PentiumM:
2111    Builder.defineMacro("__tune_pentium3__");
2112    // Fallthrough
2113  case CK_Pentium2:
2114  case CK_C3_2:
2115    Builder.defineMacro("__tune_pentium2__");
2116    // Fallthrough
2117  case CK_PentiumPro:
2118    Builder.defineMacro("__tune_i686__");
2119    Builder.defineMacro("__tune_pentiumpro__");
2120    // Fallthrough
2121  case CK_i686:
2122    Builder.defineMacro("__i686");
2123    Builder.defineMacro("__i686__");
2124    // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
2125    Builder.defineMacro("__pentiumpro");
2126    Builder.defineMacro("__pentiumpro__");
2127    break;
2128  case CK_Pentium4:
2129  case CK_Pentium4M:
2130    defineCPUMacros(Builder, "pentium4");
2131    break;
2132  case CK_Yonah:
2133  case CK_Prescott:
2134  case CK_Nocona:
2135    defineCPUMacros(Builder, "nocona");
2136    break;
2137  case CK_Core2:
2138  case CK_Penryn:
2139    defineCPUMacros(Builder, "core2");
2140    break;
2141  case CK_Atom:
2142    defineCPUMacros(Builder, "atom");
2143    break;
2144  case CK_Corei7:
2145  case CK_Corei7AVX:
2146  case CK_CoreAVXi:
2147  case CK_CoreAVX2:
2148    defineCPUMacros(Builder, "corei7");
2149    break;
2150  case CK_K6_2:
2151    Builder.defineMacro("__k6_2__");
2152    Builder.defineMacro("__tune_k6_2__");
2153    // Fallthrough
2154  case CK_K6_3:
2155    if (CPU != CK_K6_2) {  // In case of fallthrough
2156      // FIXME: GCC may be enabling these in cases where some other k6
2157      // architecture is specified but -m3dnow is explicitly provided. The
2158      // exact semantics need to be determined and emulated here.
2159      Builder.defineMacro("__k6_3__");
2160      Builder.defineMacro("__tune_k6_3__");
2161    }
2162    // Fallthrough
2163  case CK_K6:
2164    defineCPUMacros(Builder, "k6");
2165    break;
2166  case CK_Athlon:
2167  case CK_AthlonThunderbird:
2168  case CK_Athlon4:
2169  case CK_AthlonXP:
2170  case CK_AthlonMP:
2171    defineCPUMacros(Builder, "athlon");
2172    if (SSELevel != NoSSE) {
2173      Builder.defineMacro("__athlon_sse__");
2174      Builder.defineMacro("__tune_athlon_sse__");
2175    }
2176    break;
2177  case CK_K8:
2178  case CK_K8SSE3:
2179  case CK_x86_64:
2180  case CK_Opteron:
2181  case CK_OpteronSSE3:
2182  case CK_Athlon64:
2183  case CK_Athlon64SSE3:
2184  case CK_AthlonFX:
2185    defineCPUMacros(Builder, "k8");
2186    break;
2187  case CK_AMDFAM10:
2188    defineCPUMacros(Builder, "amdfam10");
2189    break;
2190  case CK_BTVER1:
2191    defineCPUMacros(Builder, "btver1");
2192    break;
2193  case CK_BDVER1:
2194    defineCPUMacros(Builder, "bdver1");
2195    break;
2196  case CK_BDVER2:
2197    defineCPUMacros(Builder, "bdver2");
2198    break;
2199  case CK_Geode:
2200    defineCPUMacros(Builder, "geode");
2201    break;
2202  }
2203
2204  // Target properties.
2205  Builder.defineMacro("__LITTLE_ENDIAN__");
2206  Builder.defineMacro("__REGISTER_PREFIX__", "");
2207
2208  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
2209  // functions in glibc header files that use FP Stack inline asm which the
2210  // backend can't deal with (PR879).
2211  Builder.defineMacro("__NO_MATH_INLINES");
2212
2213  if (HasAES)
2214    Builder.defineMacro("__AES__");
2215
2216  if (HasPCLMUL)
2217    Builder.defineMacro("__PCLMUL__");
2218
2219  if (HasLZCNT)
2220    Builder.defineMacro("__LZCNT__");
2221
2222  if (HasRDRND)
2223    Builder.defineMacro("__RDRND__");
2224
2225  if (HasBMI)
2226    Builder.defineMacro("__BMI__");
2227
2228  if (HasBMI2)
2229    Builder.defineMacro("__BMI2__");
2230
2231  if (HasPOPCNT)
2232    Builder.defineMacro("__POPCNT__");
2233
2234  if (HasSSE4a)
2235    Builder.defineMacro("__SSE4A__");
2236
2237  if (HasFMA4)
2238    Builder.defineMacro("__FMA4__");
2239
2240  if (HasFMA)
2241    Builder.defineMacro("__FMA__");
2242
2243  if (HasXOP)
2244    Builder.defineMacro("__XOP__");
2245
2246  // Each case falls through to the previous one here.
2247  switch (SSELevel) {
2248  case AVX2:
2249    Builder.defineMacro("__AVX2__");
2250  case AVX:
2251    Builder.defineMacro("__AVX__");
2252  case SSE42:
2253    Builder.defineMacro("__SSE4_2__");
2254  case SSE41:
2255    Builder.defineMacro("__SSE4_1__");
2256  case SSSE3:
2257    Builder.defineMacro("__SSSE3__");
2258  case SSE3:
2259    Builder.defineMacro("__SSE3__");
2260  case SSE2:
2261    Builder.defineMacro("__SSE2__");
2262    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
2263  case SSE1:
2264    Builder.defineMacro("__SSE__");
2265    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
2266  case NoSSE:
2267    break;
2268  }
2269
2270  if (Opts.MicrosoftExt && PointerWidth == 32) {
2271    switch (SSELevel) {
2272    case AVX2:
2273    case AVX:
2274    case SSE42:
2275    case SSE41:
2276    case SSSE3:
2277    case SSE3:
2278    case SSE2:
2279      Builder.defineMacro("_M_IX86_FP", Twine(2));
2280      break;
2281    case SSE1:
2282      Builder.defineMacro("_M_IX86_FP", Twine(1));
2283      break;
2284    default:
2285      Builder.defineMacro("_M_IX86_FP", Twine(0));
2286    }
2287  }
2288
2289  // Each case falls through to the previous one here.
2290  switch (MMX3DNowLevel) {
2291  case AMD3DNowAthlon:
2292    Builder.defineMacro("__3dNOW_A__");
2293  case AMD3DNow:
2294    Builder.defineMacro("__3dNOW__");
2295  case MMX:
2296    Builder.defineMacro("__MMX__");
2297  case NoMMX3DNow:
2298    break;
2299  }
2300}
2301
2302bool X86TargetInfo::hasFeature(StringRef Feature) const {
2303  return llvm::StringSwitch<bool>(Feature)
2304      .Case("aes", HasAES)
2305      .Case("avx", SSELevel >= AVX)
2306      .Case("avx2", SSELevel >= AVX2)
2307      .Case("bmi", HasBMI)
2308      .Case("bmi2", HasBMI2)
2309      .Case("fma", HasFMA)
2310      .Case("fma4", HasFMA4)
2311      .Case("lzcnt", HasLZCNT)
2312      .Case("rdrnd", HasRDRND)
2313      .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
2314      .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
2315      .Case("mmx", MMX3DNowLevel >= MMX)
2316      .Case("pclmul", HasPCLMUL)
2317      .Case("popcnt", HasPOPCNT)
2318      .Case("sse", SSELevel >= SSE1)
2319      .Case("sse2", SSELevel >= SSE2)
2320      .Case("sse3", SSELevel >= SSE3)
2321      .Case("ssse3", SSELevel >= SSSE3)
2322      .Case("sse41", SSELevel >= SSE41)
2323      .Case("sse42", SSELevel >= SSE42)
2324      .Case("sse4a", HasSSE4a)
2325      .Case("x86", true)
2326      .Case("x86_32", PointerWidth == 32)
2327      .Case("x86_64", PointerWidth == 64)
2328      .Case("xop", HasXOP)
2329      .Default(false);
2330}
2331
2332bool
2333X86TargetInfo::validateAsmConstraint(const char *&Name,
2334                                     TargetInfo::ConstraintInfo &Info) const {
2335  switch (*Name) {
2336  default: return false;
2337  case 'Y': // first letter of a pair:
2338    switch (*(Name+1)) {
2339    default: return false;
2340    case '0':  // First SSE register.
2341    case 't':  // Any SSE register, when SSE2 is enabled.
2342    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
2343    case 'm':  // any MMX register, when inter-unit moves enabled.
2344      break;   // falls through to setAllowsRegister.
2345  }
2346  case 'a': // eax.
2347  case 'b': // ebx.
2348  case 'c': // ecx.
2349  case 'd': // edx.
2350  case 'S': // esi.
2351  case 'D': // edi.
2352  case 'A': // edx:eax.
2353  case 'f': // any x87 floating point stack register.
2354  case 't': // top of floating point stack.
2355  case 'u': // second from top of floating point stack.
2356  case 'q': // Any register accessible as [r]l: a, b, c, and d.
2357  case 'y': // Any MMX register.
2358  case 'x': // Any SSE register.
2359  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2360  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2361  case 'l': // "Index" registers: any general register that can be used as an
2362            // index in a base+index memory access.
2363    Info.setAllowsRegister();
2364    return true;
2365  case 'C': // SSE floating point constant.
2366  case 'G': // x87 floating point constant.
2367  case 'e': // 32-bit signed integer constant for use with zero-extending
2368            // x86_64 instructions.
2369  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2370            // x86_64 instructions.
2371    return true;
2372  }
2373}
2374
2375
2376std::string
2377X86TargetInfo::convertConstraint(const char *&Constraint) const {
2378  switch (*Constraint) {
2379  case 'a': return std::string("{ax}");
2380  case 'b': return std::string("{bx}");
2381  case 'c': return std::string("{cx}");
2382  case 'd': return std::string("{dx}");
2383  case 'S': return std::string("{si}");
2384  case 'D': return std::string("{di}");
2385  case 'p': // address
2386    return std::string("im");
2387  case 't': // top of floating point stack.
2388    return std::string("{st}");
2389  case 'u': // second from top of floating point stack.
2390    return std::string("{st(1)}"); // second from top of floating point stack.
2391  default:
2392    return std::string(1, *Constraint);
2393  }
2394}
2395} // end anonymous namespace
2396
2397namespace {
2398// X86-32 generic target
2399class X86_32TargetInfo : public X86TargetInfo {
2400public:
2401  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2402    DoubleAlign = LongLongAlign = 32;
2403    LongDoubleWidth = 96;
2404    LongDoubleAlign = 32;
2405    SuitableAlign = 128;
2406    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2407                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2408                        "a0:0:64-f80:32:32-n8:16:32-S128";
2409    SizeType = UnsignedInt;
2410    PtrDiffType = SignedInt;
2411    IntPtrType = SignedInt;
2412    RegParmMax = 3;
2413
2414    // Use fpret for all types.
2415    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2416                             (1 << TargetInfo::Double) |
2417                             (1 << TargetInfo::LongDouble));
2418
2419    // x86-32 has atomics up to 8 bytes
2420    // FIXME: Check that we actually have cmpxchg8b before setting
2421    // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2422    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2423  }
2424  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2425    return TargetInfo::CharPtrBuiltinVaList;
2426  }
2427
2428  int getEHDataRegisterNumber(unsigned RegNo) const {
2429    if (RegNo == 0) return 0;
2430    if (RegNo == 1) return 2;
2431    return -1;
2432  }
2433};
2434} // end anonymous namespace
2435
2436namespace {
2437class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2438public:
2439  NetBSDI386TargetInfo(const std::string &triple) :
2440    NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2441  }
2442
2443  virtual unsigned getFloatEvalMethod() const {
2444    // NetBSD defaults to "double" rounding
2445    return 1;
2446  }
2447};
2448} // end anonymous namespace
2449
2450namespace {
2451class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2452public:
2453  OpenBSDI386TargetInfo(const std::string& triple) :
2454    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2455    SizeType = UnsignedLong;
2456    IntPtrType = SignedLong;
2457    PtrDiffType = SignedLong;
2458  }
2459};
2460} // end anonymous namespace
2461
2462namespace {
2463class BitrigI386TargetInfo : public BitrigTargetInfo<X86_32TargetInfo> {
2464public:
2465  BitrigI386TargetInfo(const std::string& triple) :
2466    BitrigTargetInfo<X86_32TargetInfo>(triple) {
2467    SizeType = UnsignedLong;
2468    IntPtrType = SignedLong;
2469    PtrDiffType = SignedLong;
2470  }
2471};
2472} // end anonymous namespace
2473
2474namespace {
2475class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2476public:
2477  DarwinI386TargetInfo(const std::string& triple) :
2478    DarwinTargetInfo<X86_32TargetInfo>(triple) {
2479    LongDoubleWidth = 128;
2480    LongDoubleAlign = 128;
2481    SuitableAlign = 128;
2482    MaxVectorAlign = 256;
2483    SizeType = UnsignedLong;
2484    IntPtrType = SignedLong;
2485    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2486                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2487                        "a0:0:64-f80:128:128-n8:16:32-S128";
2488    HasAlignMac68kSupport = true;
2489  }
2490
2491};
2492} // end anonymous namespace
2493
2494namespace {
2495// x86-32 Windows target
2496class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2497public:
2498  WindowsX86_32TargetInfo(const std::string& triple)
2499    : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2500    TLSSupported = false;
2501    WCharType = UnsignedShort;
2502    DoubleAlign = LongLongAlign = 64;
2503    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2504                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2505                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2506  }
2507  virtual void getTargetDefines(const LangOptions &Opts,
2508                                MacroBuilder &Builder) const {
2509    WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2510  }
2511};
2512} // end anonymous namespace
2513
2514namespace {
2515
2516// x86-32 Windows Visual Studio target
2517class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2518public:
2519  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2520    : WindowsX86_32TargetInfo(triple) {
2521    LongDoubleWidth = LongDoubleAlign = 64;
2522    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2523  }
2524  virtual void getTargetDefines(const LangOptions &Opts,
2525                                MacroBuilder &Builder) const {
2526    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2527    WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2528    // The value of the following reflects processor type.
2529    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2530    // We lost the original triple, so we use the default.
2531    Builder.defineMacro("_M_IX86", "600");
2532  }
2533};
2534} // end anonymous namespace
2535
2536namespace {
2537// x86-32 MinGW target
2538class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2539public:
2540  MinGWX86_32TargetInfo(const std::string& triple)
2541    : WindowsX86_32TargetInfo(triple) {
2542  }
2543  virtual void getTargetDefines(const LangOptions &Opts,
2544                                MacroBuilder &Builder) const {
2545    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2546    DefineStd(Builder, "WIN32", Opts);
2547    DefineStd(Builder, "WINNT", Opts);
2548    Builder.defineMacro("_X86_");
2549    Builder.defineMacro("__MSVCRT__");
2550    Builder.defineMacro("__MINGW32__");
2551
2552    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2553    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2554    if (Opts.MicrosoftExt)
2555      // Provide "as-is" __declspec.
2556      Builder.defineMacro("__declspec", "__declspec");
2557    else
2558      // Provide alias of __attribute__ like mingw32-gcc.
2559      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2560  }
2561};
2562} // end anonymous namespace
2563
2564namespace {
2565// x86-32 Cygwin target
2566class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2567public:
2568  CygwinX86_32TargetInfo(const std::string& triple)
2569    : X86_32TargetInfo(triple) {
2570    TLSSupported = false;
2571    WCharType = UnsignedShort;
2572    DoubleAlign = LongLongAlign = 64;
2573    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2574                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2575                        "a0:0:64-f80:32:32-n8:16:32-S32";
2576  }
2577  virtual void getTargetDefines(const LangOptions &Opts,
2578                                MacroBuilder &Builder) const {
2579    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2580    Builder.defineMacro("__CYGWIN__");
2581    Builder.defineMacro("__CYGWIN32__");
2582    DefineStd(Builder, "unix", Opts);
2583    if (Opts.CPlusPlus)
2584      Builder.defineMacro("_GNU_SOURCE");
2585  }
2586};
2587} // end anonymous namespace
2588
2589namespace {
2590// x86-32 Haiku target
2591class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2592public:
2593  HaikuX86_32TargetInfo(const std::string& triple)
2594    : X86_32TargetInfo(triple) {
2595    SizeType = UnsignedLong;
2596    IntPtrType = SignedLong;
2597    PtrDiffType = SignedLong;
2598    this->UserLabelPrefix = "";
2599  }
2600  virtual void getTargetDefines(const LangOptions &Opts,
2601                                MacroBuilder &Builder) const {
2602    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2603    Builder.defineMacro("__INTEL__");
2604    Builder.defineMacro("__HAIKU__");
2605  }
2606};
2607} // end anonymous namespace
2608
2609// RTEMS Target
2610template<typename Target>
2611class RTEMSTargetInfo : public OSTargetInfo<Target> {
2612protected:
2613  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2614                            MacroBuilder &Builder) const {
2615    // RTEMS defines; list based off of gcc output
2616
2617    Builder.defineMacro("__rtems__");
2618    Builder.defineMacro("__ELF__");
2619  }
2620public:
2621  RTEMSTargetInfo(const std::string &triple)
2622    : OSTargetInfo<Target>(triple) {
2623      this->UserLabelPrefix = "";
2624
2625      llvm::Triple Triple(triple);
2626      switch (Triple.getArch()) {
2627        default:
2628        case llvm::Triple::x86:
2629          // this->MCountName = ".mcount";
2630          break;
2631        case llvm::Triple::mips:
2632        case llvm::Triple::mipsel:
2633        case llvm::Triple::ppc:
2634        case llvm::Triple::ppc64:
2635          // this->MCountName = "_mcount";
2636          break;
2637        case llvm::Triple::arm:
2638          // this->MCountName = "__mcount";
2639          break;
2640      }
2641
2642    }
2643};
2644
2645namespace {
2646// x86-32 RTEMS target
2647class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2648public:
2649  RTEMSX86_32TargetInfo(const std::string& triple)
2650    : X86_32TargetInfo(triple) {
2651    SizeType = UnsignedLong;
2652    IntPtrType = SignedLong;
2653    PtrDiffType = SignedLong;
2654    this->UserLabelPrefix = "";
2655  }
2656  virtual void getTargetDefines(const LangOptions &Opts,
2657                                MacroBuilder &Builder) const {
2658    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2659    Builder.defineMacro("__INTEL__");
2660    Builder.defineMacro("__rtems__");
2661  }
2662};
2663} // end anonymous namespace
2664
2665namespace {
2666// x86-64 generic target
2667class X86_64TargetInfo : public X86TargetInfo {
2668public:
2669  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2670    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2671    LongDoubleWidth = 128;
2672    LongDoubleAlign = 128;
2673    LargeArrayMinWidth = 128;
2674    LargeArrayAlign = 128;
2675    SuitableAlign = 128;
2676    IntMaxType = SignedLong;
2677    UIntMaxType = UnsignedLong;
2678    Int64Type = SignedLong;
2679    RegParmMax = 6;
2680
2681    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2682                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2683                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2684
2685    // Use fpret only for long double.
2686    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2687
2688    // Use fp2ret for _Complex long double.
2689    ComplexLongDoubleUsesFP2Ret = true;
2690
2691    // x86-64 has atomics up to 16 bytes.
2692    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2693    // on CPUs with cmpxchg16b
2694    MaxAtomicPromoteWidth = 128;
2695    MaxAtomicInlineWidth = 64;
2696  }
2697  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2698    return TargetInfo::X86_64ABIBuiltinVaList;
2699  }
2700
2701  int getEHDataRegisterNumber(unsigned RegNo) const {
2702    if (RegNo == 0) return 0;
2703    if (RegNo == 1) return 1;
2704    return -1;
2705  }
2706};
2707} // end anonymous namespace
2708
2709namespace {
2710// x86-64 Windows target
2711class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2712public:
2713  WindowsX86_64TargetInfo(const std::string& triple)
2714    : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2715    TLSSupported = false;
2716    WCharType = UnsignedShort;
2717    LongWidth = LongAlign = 32;
2718    DoubleAlign = LongLongAlign = 64;
2719    IntMaxType = SignedLongLong;
2720    UIntMaxType = UnsignedLongLong;
2721    Int64Type = SignedLongLong;
2722    SizeType = UnsignedLongLong;
2723    PtrDiffType = SignedLongLong;
2724    IntPtrType = SignedLongLong;
2725    this->UserLabelPrefix = "";
2726  }
2727  virtual void getTargetDefines(const LangOptions &Opts,
2728                                MacroBuilder &Builder) const {
2729    WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2730    Builder.defineMacro("_WIN64");
2731  }
2732  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2733    return TargetInfo::CharPtrBuiltinVaList;
2734  }
2735};
2736} // end anonymous namespace
2737
2738namespace {
2739// x86-64 Windows Visual Studio target
2740class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2741public:
2742  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2743    : WindowsX86_64TargetInfo(triple) {
2744    LongDoubleWidth = LongDoubleAlign = 64;
2745    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2746  }
2747  virtual void getTargetDefines(const LangOptions &Opts,
2748                                MacroBuilder &Builder) const {
2749    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2750    WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2751    Builder.defineMacro("_M_X64");
2752    Builder.defineMacro("_M_AMD64");
2753  }
2754};
2755} // end anonymous namespace
2756
2757namespace {
2758// x86-64 MinGW target
2759class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2760public:
2761  MinGWX86_64TargetInfo(const std::string& triple)
2762    : WindowsX86_64TargetInfo(triple) {
2763  }
2764  virtual void getTargetDefines(const LangOptions &Opts,
2765                                MacroBuilder &Builder) const {
2766    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2767    DefineStd(Builder, "WIN64", Opts);
2768    Builder.defineMacro("__MSVCRT__");
2769    Builder.defineMacro("__MINGW32__");
2770    Builder.defineMacro("__MINGW64__");
2771
2772    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2773    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2774    if (Opts.MicrosoftExt)
2775      // Provide "as-is" __declspec.
2776      Builder.defineMacro("__declspec", "__declspec");
2777    else
2778      // Provide alias of __attribute__ like mingw32-gcc.
2779      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2780  }
2781};
2782} // end anonymous namespace
2783
2784namespace {
2785class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2786public:
2787  DarwinX86_64TargetInfo(const std::string& triple)
2788      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2789    Int64Type = SignedLongLong;
2790    MaxVectorAlign = 256;
2791  }
2792};
2793} // end anonymous namespace
2794
2795namespace {
2796class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2797public:
2798  OpenBSDX86_64TargetInfo(const std::string& triple)
2799      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2800    IntMaxType = SignedLongLong;
2801    UIntMaxType = UnsignedLongLong;
2802    Int64Type = SignedLongLong;
2803  }
2804};
2805} // end anonymous namespace
2806
2807namespace {
2808class BitrigX86_64TargetInfo : public BitrigTargetInfo<X86_64TargetInfo> {
2809public:
2810  BitrigX86_64TargetInfo(const std::string& triple)
2811      : BitrigTargetInfo<X86_64TargetInfo>(triple) {
2812     IntMaxType = SignedLongLong;
2813     UIntMaxType = UnsignedLongLong;
2814     Int64Type = SignedLongLong;
2815  }
2816};
2817} // end anonymous namespace
2818
2819namespace {
2820class ARMTargetInfo : public TargetInfo {
2821  // Possible FPU choices.
2822  enum FPUMode {
2823    NoFPU,
2824    VFP2FPU,
2825    VFP3FPU,
2826    NeonFPU
2827  };
2828
2829  static bool FPUModeIsVFP(FPUMode Mode) {
2830    return Mode >= VFP2FPU && Mode <= NeonFPU;
2831  }
2832
2833  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2834  static const char * const GCCRegNames[];
2835
2836  std::string ABI, CPU;
2837
2838  unsigned FPU : 3;
2839
2840  unsigned IsThumb : 1;
2841
2842  // Initialized via features.
2843  unsigned SoftFloat : 1;
2844  unsigned SoftFloatABI : 1;
2845
2846  static const Builtin::Info BuiltinInfo[];
2847
2848public:
2849  ARMTargetInfo(const std::string &TripleStr)
2850    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
2851  {
2852    BigEndian = false;
2853    SizeType = UnsignedInt;
2854    PtrDiffType = SignedInt;
2855    // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
2856    WCharType = UnsignedInt;
2857
2858    // {} in inline assembly are neon specifiers, not assembly variant
2859    // specifiers.
2860    NoAsmVariants = true;
2861
2862    // FIXME: Should we just treat this as a feature?
2863    IsThumb = getTriple().getArchName().startswith("thumb");
2864    if (IsThumb) {
2865      // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2866      // so set preferred for small types to 32.
2867      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2868                           "i64:64:64-f32:32:32-f64:64:64-"
2869                           "v64:64:64-v128:64:128-a0:0:32-n32-S64");
2870    } else {
2871      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2872                           "i64:64:64-f32:32:32-f64:64:64-"
2873                           "v64:64:64-v128:64:128-a0:0:64-n32-S64");
2874    }
2875
2876    // ARM targets default to using the ARM C++ ABI.
2877    CXXABI = CXXABI_ARM;
2878
2879    // ARM has atomics up to 8 bytes
2880    // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
2881    MaxAtomicPromoteWidth = 64;
2882
2883    // Do force alignment of members that follow zero length bitfields.  If
2884    // the alignment of the zero-length bitfield is greater than the member
2885    // that follows it, `bar', `bar' will be aligned as the  type of the
2886    // zero length bitfield.
2887    UseZeroLengthBitfieldAlignment = true;
2888  }
2889  virtual const char *getABI() const { return ABI.c_str(); }
2890  virtual bool setABI(const std::string &Name) {
2891    ABI = Name;
2892
2893    // The defaults (above) are for AAPCS, check if we need to change them.
2894    //
2895    // FIXME: We need support for -meabi... we could just mangle it into the
2896    // name.
2897    if (Name == "apcs-gnu") {
2898      DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
2899      SizeType = UnsignedLong;
2900
2901      // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
2902      WCharType = SignedInt;
2903
2904      // Do not respect the alignment of bit-field types when laying out
2905      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
2906      UseBitFieldTypeAlignment = false;
2907
2908      /// gcc forces the alignment to 4 bytes, regardless of the type of the
2909      /// zero length bitfield.  This corresponds to EMPTY_FIELD_BOUNDARY in
2910      /// gcc.
2911      ZeroLengthBitfieldBoundary = 32;
2912
2913      if (IsThumb) {
2914        // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2915        // so set preferred for small types to 32.
2916        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2917                             "i64:32:64-f32:32:32-f64:32:64-"
2918                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2919      } else {
2920        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2921                             "i64:32:64-f32:32:32-f64:32:64-"
2922                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2923      }
2924
2925      // FIXME: Override "preferred align" for double and long long.
2926    } else if (Name == "aapcs") {
2927      // FIXME: Enumerated types are variable width in straight AAPCS.
2928    } else if (Name == "aapcs-linux") {
2929      ;
2930    } else
2931      return false;
2932
2933    return true;
2934  }
2935
2936  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
2937    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
2938      Features["vfp2"] = true;
2939    else if (CPU == "cortex-a8" || CPU == "cortex-a9")
2940      Features["neon"] = true;
2941  }
2942
2943  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2944                                 StringRef Name,
2945                                 bool Enabled) const {
2946    if (Name == "soft-float" || Name == "soft-float-abi" ||
2947        Name == "vfp2" || Name == "vfp3" || Name == "neon" || Name == "d16" ||
2948        Name == "neonfp" || Name == "long64") {
2949      Features[Name] = Enabled;
2950    } else
2951      return false;
2952
2953    return true;
2954  }
2955
2956  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2957    FPU = NoFPU;
2958    SoftFloat = SoftFloatABI = false;
2959    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
2960      if (Features[i] == "+soft-float")
2961        SoftFloat = true;
2962      else if (Features[i] == "+soft-float-abi")
2963        SoftFloatABI = true;
2964      else if (Features[i] == "+vfp2")
2965        FPU = VFP2FPU;
2966      else if (Features[i] == "+vfp3")
2967        FPU = VFP3FPU;
2968      else if (Features[i] == "+neon")
2969        FPU = NeonFPU;
2970      else if (Features[i] == "+long64")
2971        LongWidth = LongAlign = 64;  // RenderScript uses a 64-bit long type
2972    }
2973
2974    // Remove front-end specific options which the backend handles differently.
2975    std::vector<std::string>::iterator it;
2976    it = std::find(Features.begin(), Features.end(), "+soft-float");
2977    if (it != Features.end())
2978      Features.erase(it);
2979    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
2980    if (it != Features.end())
2981      Features.erase(it);
2982  }
2983
2984  virtual bool hasFeature(StringRef Feature) const {
2985    return llvm::StringSwitch<bool>(Feature)
2986        .Case("arm", true)
2987        .Case("softfloat", SoftFloat)
2988        .Case("thumb", IsThumb)
2989        .Case("neon", FPU == NeonFPU && !SoftFloat &&
2990              StringRef(getCPUDefineSuffix(CPU)).startswith("7"))
2991        .Default(false);
2992  }
2993  // FIXME: Should we actually have some table instead of these switches?
2994  static const char *getCPUDefineSuffix(StringRef Name) {
2995    return llvm::StringSwitch<const char*>(Name)
2996      .Cases("arm8", "arm810", "4")
2997      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
2998      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
2999      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
3000      .Case("ep9312", "4T")
3001      .Cases("arm10tdmi", "arm1020t", "5T")
3002      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
3003      .Case("arm926ej-s", "5TEJ")
3004      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
3005      .Cases("xscale", "iwmmxt", "5TE")
3006      .Case("arm1136j-s", "6J")
3007      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
3008      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
3009      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
3010      .Cases("cortex-a8", "cortex-a9", "7A")
3011      .Cases("cortex-m3", "cortex-m4", "7M")
3012      .Case("cortex-m0", "6M")
3013      .Default(0);
3014  }
3015  static const char *getCPUProfile(StringRef Name) {
3016    return llvm::StringSwitch<const char*>(Name)
3017      .Cases("cortex-a8", "cortex-a9", "A")
3018      .Cases("cortex-m3", "cortex-m4", "cortex-m0", "M")
3019      .Default("");
3020  }
3021  virtual bool setCPU(const std::string &Name) {
3022    if (!getCPUDefineSuffix(Name))
3023      return false;
3024
3025    CPU = Name;
3026    return true;
3027  }
3028  virtual void getTargetDefines(const LangOptions &Opts,
3029                                MacroBuilder &Builder) const {
3030    // Target identification.
3031    Builder.defineMacro("__arm");
3032    Builder.defineMacro("__arm__");
3033
3034    // Target properties.
3035    Builder.defineMacro("__ARMEL__");
3036    Builder.defineMacro("__LITTLE_ENDIAN__");
3037    Builder.defineMacro("__REGISTER_PREFIX__", "");
3038
3039    StringRef CPUArch = getCPUDefineSuffix(CPU);
3040    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
3041    Builder.defineMacro("__ARM_ARCH", CPUArch.substr(0, 1));
3042    StringRef CPUProfile = getCPUProfile(CPU);
3043    if (!CPUProfile.empty())
3044      Builder.defineMacro("__ARM_ARCH_PROFILE", CPUProfile);
3045
3046    // Subtarget options.
3047
3048    // FIXME: It's more complicated than this and we don't really support
3049    // interworking.
3050    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
3051      Builder.defineMacro("__THUMB_INTERWORK__");
3052
3053    if (ABI == "aapcs" || ABI == "aapcs-linux") {
3054      Builder.defineMacro("__ARM_EABI__");
3055      Builder.defineMacro("__ARM_PCS", "1");
3056
3057      if (!SoftFloat && !SoftFloatABI)
3058        Builder.defineMacro("__ARM_PCS_VFP", "1");
3059    }
3060
3061    if (SoftFloat)
3062      Builder.defineMacro("__SOFTFP__");
3063
3064    if (CPU == "xscale")
3065      Builder.defineMacro("__XSCALE__");
3066
3067    bool IsARMv7 = CPUArch.startswith("7");
3068    if (IsThumb) {
3069      Builder.defineMacro("__THUMBEL__");
3070      Builder.defineMacro("__thumb__");
3071      if (CPUArch == "6T2" || IsARMv7)
3072        Builder.defineMacro("__thumb2__");
3073    }
3074
3075    // Note, this is always on in gcc, even though it doesn't make sense.
3076    Builder.defineMacro("__APCS_32__");
3077
3078    if (FPUModeIsVFP((FPUMode) FPU))
3079      Builder.defineMacro("__VFP_FP__");
3080
3081    // This only gets set when Neon instructions are actually available, unlike
3082    // the VFP define, hence the soft float and arch check. This is subtly
3083    // different from gcc, we follow the intent which was that it should be set
3084    // when Neon instructions are actually available.
3085    if (FPU == NeonFPU && !SoftFloat && IsARMv7)
3086      Builder.defineMacro("__ARM_NEON__");
3087  }
3088  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3089                                 unsigned &NumRecords) const {
3090    Records = BuiltinInfo;
3091    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
3092  }
3093  virtual bool isCLZForZeroUndef() const { return false; }
3094  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3095    return TargetInfo::VoidPtrBuiltinVaList;
3096  }
3097  virtual void getGCCRegNames(const char * const *&Names,
3098                              unsigned &NumNames) const;
3099  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3100                                unsigned &NumAliases) const;
3101  virtual bool validateAsmConstraint(const char *&Name,
3102                                     TargetInfo::ConstraintInfo &Info) const {
3103    switch (*Name) {
3104    default: break;
3105    case 'l': // r0-r7
3106    case 'h': // r8-r15
3107    case 'w': // VFP Floating point register single precision
3108    case 'P': // VFP Floating point register double precision
3109      Info.setAllowsRegister();
3110      return true;
3111    case 'Q': // A memory address that is a single base register.
3112      Info.setAllowsMemory();
3113      return true;
3114    case 'U': // a memory reference...
3115      switch (Name[1]) {
3116      case 'q': // ...ARMV4 ldrsb
3117      case 'v': // ...VFP load/store (reg+constant offset)
3118      case 'y': // ...iWMMXt load/store
3119      case 't': // address valid for load/store opaque types wider
3120	        // than 128-bits
3121      case 'n': // valid address for Neon doubleword vector load/store
3122      case 'm': // valid address for Neon element and structure load/store
3123      case 's': // valid address for non-offset loads/stores of quad-word
3124	        // values in four ARM registers
3125        Info.setAllowsMemory();
3126        Name++;
3127        return true;
3128      }
3129    }
3130    return false;
3131  }
3132  virtual std::string convertConstraint(const char *&Constraint) const {
3133    std::string R;
3134    switch (*Constraint) {
3135    case 'U':   // Two-character constraint; add "^" hint for later parsing.
3136      R = std::string("^") + std::string(Constraint, 2);
3137      Constraint++;
3138      break;
3139    case 'p': // 'p' should be translated to 'r' by default.
3140      R = std::string("r");
3141      break;
3142    default:
3143      return std::string(1, *Constraint);
3144    }
3145    return R;
3146  }
3147  virtual const char *getClobbers() const {
3148    // FIXME: Is this really right?
3149    return "";
3150  }
3151};
3152
3153const char * const ARMTargetInfo::GCCRegNames[] = {
3154  // Integer registers
3155  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3156  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
3157
3158  // Float registers
3159  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
3160  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
3161  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
3162  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
3163
3164  // Double registers
3165  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
3166  "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
3167  "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
3168  "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
3169
3170  // Quad registers
3171  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
3172  "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
3173};
3174
3175void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
3176                                   unsigned &NumNames) const {
3177  Names = GCCRegNames;
3178  NumNames = llvm::array_lengthof(GCCRegNames);
3179}
3180
3181const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
3182  { { "a1" }, "r0" },
3183  { { "a2" }, "r1" },
3184  { { "a3" }, "r2" },
3185  { { "a4" }, "r3" },
3186  { { "v1" }, "r4" },
3187  { { "v2" }, "r5" },
3188  { { "v3" }, "r6" },
3189  { { "v4" }, "r7" },
3190  { { "v5" }, "r8" },
3191  { { "v6", "rfp" }, "r9" },
3192  { { "sl" }, "r10" },
3193  { { "fp" }, "r11" },
3194  { { "ip" }, "r12" },
3195  { { "r13" }, "sp" },
3196  { { "r14" }, "lr" },
3197  { { "r15" }, "pc" },
3198  // The S, D and Q registers overlap, but aren't really aliases; we
3199  // don't want to substitute one of these for a different-sized one.
3200};
3201
3202void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3203                                       unsigned &NumAliases) const {
3204  Aliases = GCCRegAliases;
3205  NumAliases = llvm::array_lengthof(GCCRegAliases);
3206}
3207
3208const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
3209#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3210#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3211                                              ALL_LANGUAGES },
3212#include "clang/Basic/BuiltinsARM.def"
3213};
3214} // end anonymous namespace.
3215
3216namespace {
3217class DarwinARMTargetInfo :
3218  public DarwinTargetInfo<ARMTargetInfo> {
3219protected:
3220  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
3221                            MacroBuilder &Builder) const {
3222    getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
3223  }
3224
3225public:
3226  DarwinARMTargetInfo(const std::string& triple)
3227    : DarwinTargetInfo<ARMTargetInfo>(triple) {
3228    HasAlignMac68kSupport = true;
3229    // iOS always has 64-bit atomic instructions.
3230    // FIXME: This should be based off of the target features in ARMTargetInfo.
3231    MaxAtomicInlineWidth = 64;
3232  }
3233};
3234} // end anonymous namespace.
3235
3236
3237namespace {
3238// Hexagon abstract base class
3239class HexagonTargetInfo : public TargetInfo {
3240  static const Builtin::Info BuiltinInfo[];
3241  static const char * const GCCRegNames[];
3242  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3243  std::string CPU;
3244public:
3245  HexagonTargetInfo(const std::string& triple) : TargetInfo(triple)  {
3246    BigEndian = false;
3247    DescriptionString = ("e-p:32:32:32-"
3248                         "i64:64:64-i32:32:32-i16:16:16-i1:32:32"
3249                         "f64:64:64-f32:32:32-a0:0-n32");
3250
3251    // {} in inline assembly are packet specifiers, not assembly variant
3252    // specifiers.
3253    NoAsmVariants = true;
3254  }
3255
3256  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3257                                 unsigned &NumRecords) const {
3258    Records = BuiltinInfo;
3259    NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
3260  }
3261
3262  virtual bool validateAsmConstraint(const char *&Name,
3263                                     TargetInfo::ConstraintInfo &Info) const {
3264    return true;
3265  }
3266
3267  virtual void getTargetDefines(const LangOptions &Opts,
3268                                MacroBuilder &Builder) const;
3269
3270  virtual bool hasFeature(StringRef Feature) const {
3271    return Feature == "hexagon";
3272  }
3273
3274  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3275    return TargetInfo::CharPtrBuiltinVaList;
3276  }
3277  virtual void getGCCRegNames(const char * const *&Names,
3278                              unsigned &NumNames) const;
3279  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3280                                unsigned &NumAliases) const;
3281  virtual const char *getClobbers() const {
3282    return "";
3283  }
3284
3285  static const char *getHexagonCPUSuffix(StringRef Name) {
3286    return llvm::StringSwitch<const char*>(Name)
3287      .Case("hexagonv2", "2")
3288      .Case("hexagonv3", "3")
3289      .Case("hexagonv4", "4")
3290      .Case("hexagonv5", "5")
3291      .Default(0);
3292  }
3293
3294  virtual bool setCPU(const std::string &Name) {
3295    if (!getHexagonCPUSuffix(Name))
3296      return false;
3297
3298    CPU = Name;
3299    return true;
3300  }
3301};
3302
3303void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
3304                                MacroBuilder &Builder) const {
3305  Builder.defineMacro("qdsp6");
3306  Builder.defineMacro("__qdsp6", "1");
3307  Builder.defineMacro("__qdsp6__", "1");
3308
3309  Builder.defineMacro("hexagon");
3310  Builder.defineMacro("__hexagon", "1");
3311  Builder.defineMacro("__hexagon__", "1");
3312
3313  if(CPU == "hexagonv1") {
3314    Builder.defineMacro("__HEXAGON_V1__");
3315    Builder.defineMacro("__HEXAGON_ARCH__", "1");
3316    if(Opts.HexagonQdsp6Compat) {
3317      Builder.defineMacro("__QDSP6_V1__");
3318      Builder.defineMacro("__QDSP6_ARCH__", "1");
3319    }
3320  }
3321  else if(CPU == "hexagonv2") {
3322    Builder.defineMacro("__HEXAGON_V2__");
3323    Builder.defineMacro("__HEXAGON_ARCH__", "2");
3324    if(Opts.HexagonQdsp6Compat) {
3325      Builder.defineMacro("__QDSP6_V2__");
3326      Builder.defineMacro("__QDSP6_ARCH__", "2");
3327    }
3328  }
3329  else if(CPU == "hexagonv3") {
3330    Builder.defineMacro("__HEXAGON_V3__");
3331    Builder.defineMacro("__HEXAGON_ARCH__", "3");
3332    if(Opts.HexagonQdsp6Compat) {
3333      Builder.defineMacro("__QDSP6_V3__");
3334      Builder.defineMacro("__QDSP6_ARCH__", "3");
3335    }
3336  }
3337  else if(CPU == "hexagonv4") {
3338    Builder.defineMacro("__HEXAGON_V4__");
3339    Builder.defineMacro("__HEXAGON_ARCH__", "4");
3340    if(Opts.HexagonQdsp6Compat) {
3341      Builder.defineMacro("__QDSP6_V4__");
3342      Builder.defineMacro("__QDSP6_ARCH__", "4");
3343    }
3344  }
3345  else if(CPU == "hexagonv5") {
3346    Builder.defineMacro("__HEXAGON_V5__");
3347    Builder.defineMacro("__HEXAGON_ARCH__", "5");
3348    if(Opts.HexagonQdsp6Compat) {
3349      Builder.defineMacro("__QDSP6_V5__");
3350      Builder.defineMacro("__QDSP6_ARCH__", "5");
3351    }
3352  }
3353}
3354
3355const char * const HexagonTargetInfo::GCCRegNames[] = {
3356  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3357  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3358  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3359  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3360  "p0", "p1", "p2", "p3",
3361  "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3362};
3363
3364void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3365                                   unsigned &NumNames) const {
3366  Names = GCCRegNames;
3367  NumNames = llvm::array_lengthof(GCCRegNames);
3368}
3369
3370
3371const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3372  { { "sp" }, "r29" },
3373  { { "fp" }, "r30" },
3374  { { "lr" }, "r31" },
3375 };
3376
3377void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3378                                     unsigned &NumAliases) const {
3379  Aliases = GCCRegAliases;
3380  NumAliases = llvm::array_lengthof(GCCRegAliases);
3381}
3382
3383
3384const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3385#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3386#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3387                                              ALL_LANGUAGES },
3388#include "clang/Basic/BuiltinsHexagon.def"
3389};
3390}
3391
3392
3393namespace {
3394class SparcV8TargetInfo : public TargetInfo {
3395  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3396  static const char * const GCCRegNames[];
3397  bool SoftFloat;
3398public:
3399  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3400    // FIXME: Support Sparc quad-precision long double?
3401    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3402                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3403  }
3404  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3405                                 StringRef Name,
3406                                 bool Enabled) const {
3407    if (Name == "soft-float")
3408      Features[Name] = Enabled;
3409    else
3410      return false;
3411
3412    return true;
3413  }
3414  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3415    SoftFloat = false;
3416    for (unsigned i = 0, e = Features.size(); i != e; ++i)
3417      if (Features[i] == "+soft-float")
3418        SoftFloat = true;
3419  }
3420  virtual void getTargetDefines(const LangOptions &Opts,
3421                                MacroBuilder &Builder) const {
3422    DefineStd(Builder, "sparc", Opts);
3423    Builder.defineMacro("__sparcv8");
3424    Builder.defineMacro("__REGISTER_PREFIX__", "");
3425
3426    if (SoftFloat)
3427      Builder.defineMacro("SOFT_FLOAT", "1");
3428  }
3429
3430  virtual bool hasFeature(StringRef Feature) const {
3431    return llvm::StringSwitch<bool>(Feature)
3432             .Case("softfloat", SoftFloat)
3433             .Case("sparc", true)
3434             .Default(false);
3435  }
3436
3437  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3438                                 unsigned &NumRecords) const {
3439    // FIXME: Implement!
3440  }
3441  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3442    return TargetInfo::VoidPtrBuiltinVaList;
3443  }
3444  virtual void getGCCRegNames(const char * const *&Names,
3445                              unsigned &NumNames) const;
3446  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3447                                unsigned &NumAliases) const;
3448  virtual bool validateAsmConstraint(const char *&Name,
3449                                     TargetInfo::ConstraintInfo &info) const {
3450    // FIXME: Implement!
3451    return false;
3452  }
3453  virtual const char *getClobbers() const {
3454    // FIXME: Implement!
3455    return "";
3456  }
3457};
3458
3459const char * const SparcV8TargetInfo::GCCRegNames[] = {
3460  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3461  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3462  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3463  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3464};
3465
3466void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3467                                       unsigned &NumNames) const {
3468  Names = GCCRegNames;
3469  NumNames = llvm::array_lengthof(GCCRegNames);
3470}
3471
3472const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3473  { { "g0" }, "r0" },
3474  { { "g1" }, "r1" },
3475  { { "g2" }, "r2" },
3476  { { "g3" }, "r3" },
3477  { { "g4" }, "r4" },
3478  { { "g5" }, "r5" },
3479  { { "g6" }, "r6" },
3480  { { "g7" }, "r7" },
3481  { { "o0" }, "r8" },
3482  { { "o1" }, "r9" },
3483  { { "o2" }, "r10" },
3484  { { "o3" }, "r11" },
3485  { { "o4" }, "r12" },
3486  { { "o5" }, "r13" },
3487  { { "o6", "sp" }, "r14" },
3488  { { "o7" }, "r15" },
3489  { { "l0" }, "r16" },
3490  { { "l1" }, "r17" },
3491  { { "l2" }, "r18" },
3492  { { "l3" }, "r19" },
3493  { { "l4" }, "r20" },
3494  { { "l5" }, "r21" },
3495  { { "l6" }, "r22" },
3496  { { "l7" }, "r23" },
3497  { { "i0" }, "r24" },
3498  { { "i1" }, "r25" },
3499  { { "i2" }, "r26" },
3500  { { "i3" }, "r27" },
3501  { { "i4" }, "r28" },
3502  { { "i5" }, "r29" },
3503  { { "i6", "fp" }, "r30" },
3504  { { "i7" }, "r31" },
3505};
3506
3507void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3508                                         unsigned &NumAliases) const {
3509  Aliases = GCCRegAliases;
3510  NumAliases = llvm::array_lengthof(GCCRegAliases);
3511}
3512} // end anonymous namespace.
3513
3514namespace {
3515class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3516public:
3517  AuroraUXSparcV8TargetInfo(const std::string& triple) :
3518      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3519    SizeType = UnsignedInt;
3520    PtrDiffType = SignedInt;
3521  }
3522};
3523class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3524public:
3525  SolarisSparcV8TargetInfo(const std::string& triple) :
3526      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3527    SizeType = UnsignedInt;
3528    PtrDiffType = SignedInt;
3529  }
3530};
3531} // end anonymous namespace.
3532
3533namespace {
3534  class MSP430TargetInfo : public TargetInfo {
3535    static const char * const GCCRegNames[];
3536  public:
3537    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3538      BigEndian = false;
3539      TLSSupported = false;
3540      IntWidth = 16; IntAlign = 16;
3541      LongWidth = 32; LongLongWidth = 64;
3542      LongAlign = LongLongAlign = 16;
3543      PointerWidth = 16; PointerAlign = 16;
3544      SuitableAlign = 16;
3545      SizeType = UnsignedInt;
3546      IntMaxType = SignedLong;
3547      UIntMaxType = UnsignedLong;
3548      IntPtrType = SignedShort;
3549      PtrDiffType = SignedInt;
3550      SigAtomicType = SignedLong;
3551      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3552   }
3553    virtual void getTargetDefines(const LangOptions &Opts,
3554                                  MacroBuilder &Builder) const {
3555      Builder.defineMacro("MSP430");
3556      Builder.defineMacro("__MSP430__");
3557      // FIXME: defines for different 'flavours' of MCU
3558    }
3559    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3560                                   unsigned &NumRecords) const {
3561     // FIXME: Implement.
3562      Records = 0;
3563      NumRecords = 0;
3564    }
3565    virtual bool hasFeature(StringRef Feature) const {
3566      return Feature == "msp430";
3567    }
3568    virtual void getGCCRegNames(const char * const *&Names,
3569                                unsigned &NumNames) const;
3570    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3571                                  unsigned &NumAliases) const {
3572      // No aliases.
3573      Aliases = 0;
3574      NumAliases = 0;
3575    }
3576    virtual bool validateAsmConstraint(const char *&Name,
3577                                       TargetInfo::ConstraintInfo &info) const {
3578      // No target constraints for now.
3579      return false;
3580    }
3581    virtual const char *getClobbers() const {
3582      // FIXME: Is this really right?
3583      return "";
3584    }
3585    virtual BuiltinVaListKind getBuiltinVaListKind() const {
3586      // FIXME: implement
3587      return TargetInfo::CharPtrBuiltinVaList;
3588   }
3589  };
3590
3591  const char * const MSP430TargetInfo::GCCRegNames[] = {
3592    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3593    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3594  };
3595
3596  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3597                                        unsigned &NumNames) const {
3598    Names = GCCRegNames;
3599    NumNames = llvm::array_lengthof(GCCRegNames);
3600  }
3601}
3602
3603namespace {
3604
3605  // LLVM and Clang cannot be used directly to output native binaries for
3606  // target, but is used to compile C code to llvm bitcode with correct
3607  // type and alignment information.
3608  //
3609  // TCE uses the llvm bitcode as input and uses it for generating customized
3610  // target processor and program binary. TCE co-design environment is
3611  // publicly available in http://tce.cs.tut.fi
3612
3613  static const unsigned TCEOpenCLAddrSpaceMap[] = {
3614      3, // opencl_global
3615      4, // opencl_local
3616      5, // opencl_constant
3617      0, // cuda_device
3618      0, // cuda_constant
3619      0  // cuda_shared
3620  };
3621
3622  class TCETargetInfo : public TargetInfo{
3623  public:
3624    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3625      TLSSupported = false;
3626      IntWidth = 32;
3627      LongWidth = LongLongWidth = 32;
3628      PointerWidth = 32;
3629      IntAlign = 32;
3630      LongAlign = LongLongAlign = 32;
3631      PointerAlign = 32;
3632      SuitableAlign = 32;
3633      SizeType = UnsignedInt;
3634      IntMaxType = SignedLong;
3635      UIntMaxType = UnsignedLong;
3636      IntPtrType = SignedInt;
3637      PtrDiffType = SignedInt;
3638      FloatWidth = 32;
3639      FloatAlign = 32;
3640      DoubleWidth = 32;
3641      DoubleAlign = 32;
3642      LongDoubleWidth = 32;
3643      LongDoubleAlign = 32;
3644      FloatFormat = &llvm::APFloat::IEEEsingle;
3645      DoubleFormat = &llvm::APFloat::IEEEsingle;
3646      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3647      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3648                          "i16:16:32-i32:32:32-i64:32:32-"
3649                          "f32:32:32-f64:32:32-v64:32:32-"
3650                          "v128:32:32-a0:0:32-n32";
3651      AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3652    }
3653
3654    virtual void getTargetDefines(const LangOptions &Opts,
3655                                  MacroBuilder &Builder) const {
3656      DefineStd(Builder, "tce", Opts);
3657      Builder.defineMacro("__TCE__");
3658      Builder.defineMacro("__TCE_V1__");
3659    }
3660    virtual bool hasFeature(StringRef Feature) const {
3661      return Feature == "tce";
3662    }
3663
3664    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3665                                   unsigned &NumRecords) const {}
3666    virtual const char *getClobbers() const {
3667      return "";
3668    }
3669    virtual BuiltinVaListKind getBuiltinVaListKind() const {
3670      return TargetInfo::VoidPtrBuiltinVaList;
3671    }
3672    virtual void getGCCRegNames(const char * const *&Names,
3673                                unsigned &NumNames) const {}
3674    virtual bool validateAsmConstraint(const char *&Name,
3675                                       TargetInfo::ConstraintInfo &info) const {
3676      return true;
3677    }
3678    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3679                                  unsigned &NumAliases) const {}
3680  };
3681}
3682
3683namespace {
3684class MipsTargetInfoBase : public TargetInfo {
3685  static const Builtin::Info BuiltinInfo[];
3686  std::string CPU;
3687  bool IsMips16;
3688  enum MipsFloatABI {
3689    HardFloat, SingleFloat, SoftFloat
3690  } FloatABI;
3691  enum DspRevEnum {
3692    NoDSP, DSP1, DSP2
3693  } DspRev;
3694
3695protected:
3696  std::string ABI;
3697
3698public:
3699  MipsTargetInfoBase(const std::string& triple,
3700                     const std::string& ABIStr,
3701                     const std::string& CPUStr)
3702    : TargetInfo(triple),
3703      CPU(CPUStr),
3704      IsMips16(false),
3705      FloatABI(HardFloat),
3706      DspRev(NoDSP),
3707      ABI(ABIStr)
3708  {}
3709
3710  virtual const char *getABI() const { return ABI.c_str(); }
3711  virtual bool setABI(const std::string &Name) = 0;
3712  virtual bool setCPU(const std::string &Name) {
3713    CPU = Name;
3714    return true;
3715  }
3716  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3717    Features[ABI] = true;
3718    Features[CPU] = true;
3719  }
3720
3721  virtual void getTargetDefines(const LangOptions &Opts,
3722                                MacroBuilder &Builder) const {
3723    DefineStd(Builder, "mips", Opts);
3724    Builder.defineMacro("_mips");
3725    Builder.defineMacro("__REGISTER_PREFIX__", "");
3726
3727    switch (FloatABI) {
3728    case HardFloat:
3729      Builder.defineMacro("__mips_hard_float", Twine(1));
3730      break;
3731    case SingleFloat:
3732      Builder.defineMacro("__mips_hard_float", Twine(1));
3733      Builder.defineMacro("__mips_single_float", Twine(1));
3734      break;
3735    case SoftFloat:
3736      Builder.defineMacro("__mips_soft_float", Twine(1));
3737      break;
3738    }
3739
3740    if (IsMips16)
3741      Builder.defineMacro("__mips16", Twine(1));
3742
3743    switch (DspRev) {
3744    default:
3745      break;
3746    case DSP1:
3747      Builder.defineMacro("__mips_dsp_rev", Twine(1));
3748      Builder.defineMacro("__mips_dsp", Twine(1));
3749      break;
3750    case DSP2:
3751      Builder.defineMacro("__mips_dsp_rev", Twine(2));
3752      Builder.defineMacro("__mips_dspr2", Twine(1));
3753      Builder.defineMacro("__mips_dsp", Twine(1));
3754      break;
3755    }
3756
3757    Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
3758    Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
3759    Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
3760
3761    Builder.defineMacro("_MIPS_ARCH", "\"" + CPU + "\"");
3762    Builder.defineMacro("_MIPS_ARCH_" + StringRef(CPU).upper());
3763  }
3764
3765  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3766                                 unsigned &NumRecords) const {
3767    Records = BuiltinInfo;
3768    NumRecords = clang::Mips::LastTSBuiltin - Builtin::FirstTSBuiltin;
3769  }
3770  virtual bool hasFeature(StringRef Feature) const {
3771    return Feature == "mips";
3772  }
3773  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3774    return TargetInfo::VoidPtrBuiltinVaList;
3775  }
3776  virtual void getGCCRegNames(const char * const *&Names,
3777                              unsigned &NumNames) const {
3778    static const char * const GCCRegNames[] = {
3779      // CPU register names
3780      // Must match second column of GCCRegAliases
3781      "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
3782      "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
3783      "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
3784      "$24",  "$25",  "$26",  "$27",  "$28",  "$29",  "$30",  "$31",
3785      // Floating point register names
3786      "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
3787      "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
3788      "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
3789      "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
3790      // Hi/lo and condition register names
3791      "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
3792      "$fcc5","$fcc6","$fcc7"
3793    };
3794    Names = GCCRegNames;
3795    NumNames = llvm::array_lengthof(GCCRegNames);
3796  }
3797  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3798                                unsigned &NumAliases) const = 0;
3799  virtual bool validateAsmConstraint(const char *&Name,
3800                                     TargetInfo::ConstraintInfo &Info) const {
3801    switch (*Name) {
3802    default:
3803      return false;
3804
3805    case 'r': // CPU registers.
3806    case 'd': // Equivalent to "r" unless generating MIPS16 code.
3807    case 'y': // Equivalent to "r", backwards compatibility only.
3808    case 'f': // floating-point registers.
3809    case 'c': // $25 for indirect jumps
3810    case 'l': // lo register
3811    case 'x': // hilo register pair
3812      Info.setAllowsRegister();
3813      return true;
3814    }
3815  }
3816
3817  virtual const char *getClobbers() const {
3818    // FIXME: Implement!
3819    return "";
3820  }
3821
3822  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3823                                 StringRef Name,
3824                                 bool Enabled) const {
3825    if (Name == "soft-float" || Name == "single-float" ||
3826        Name == "o32" || Name == "n32" || Name == "n64" || Name == "eabi" ||
3827        Name == "mips32" || Name == "mips32r2" ||
3828        Name == "mips64" || Name == "mips64r2" ||
3829        Name == "mips16" || Name == "dsp" || Name == "dspr2") {
3830      Features[Name] = Enabled;
3831      return true;
3832    }
3833    return false;
3834  }
3835
3836  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3837    IsMips16 = false;
3838    FloatABI = HardFloat;
3839    DspRev = NoDSP;
3840
3841    for (std::vector<std::string>::iterator it = Features.begin(),
3842         ie = Features.end(); it != ie; ++it) {
3843      if (*it == "+single-float")
3844        FloatABI = SingleFloat;
3845      else if (*it == "+soft-float")
3846        FloatABI = SoftFloat;
3847      else if (*it == "+mips16")
3848        IsMips16 = true;
3849      else if (*it == "+dsp")
3850        DspRev = std::max(DspRev, DSP1);
3851      else if (*it == "+dspr2")
3852        DspRev = std::max(DspRev, DSP2);
3853    }
3854
3855    // Remove front-end specific option.
3856    std::vector<std::string>::iterator it =
3857      std::find(Features.begin(), Features.end(), "+soft-float");
3858    if (it != Features.end())
3859      Features.erase(it);
3860  }
3861};
3862
3863const Builtin::Info MipsTargetInfoBase::BuiltinInfo[] = {
3864#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3865#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3866                                              ALL_LANGUAGES },
3867#include "clang/Basic/BuiltinsMips.def"
3868};
3869
3870class Mips32TargetInfoBase : public MipsTargetInfoBase {
3871public:
3872  Mips32TargetInfoBase(const std::string& triple) :
3873    MipsTargetInfoBase(triple, "o32", "mips32") {
3874    SizeType = UnsignedInt;
3875    PtrDiffType = SignedInt;
3876  }
3877  virtual bool setABI(const std::string &Name) {
3878    if ((Name == "o32") || (Name == "eabi")) {
3879      ABI = Name;
3880      return true;
3881    } else
3882      return false;
3883  }
3884  virtual void getTargetDefines(const LangOptions &Opts,
3885                                MacroBuilder &Builder) const {
3886    MipsTargetInfoBase::getTargetDefines(Opts, Builder);
3887
3888    if (ABI == "o32") {
3889      Builder.defineMacro("__mips_o32");
3890      Builder.defineMacro("_ABIO32", "1");
3891      Builder.defineMacro("_MIPS_SIM", "_ABIO32");
3892    }
3893    else if (ABI == "eabi")
3894      Builder.defineMacro("__mips_eabi");
3895    else
3896      llvm_unreachable("Invalid ABI for Mips32.");
3897  }
3898  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3899                                unsigned &NumAliases) const {
3900    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3901      { { "at" },  "$1" },
3902      { { "v0" },  "$2" },
3903      { { "v1" },  "$3" },
3904      { { "a0" },  "$4" },
3905      { { "a1" },  "$5" },
3906      { { "a2" },  "$6" },
3907      { { "a3" },  "$7" },
3908      { { "t0" },  "$8" },
3909      { { "t1" },  "$9" },
3910      { { "t2" }, "$10" },
3911      { { "t3" }, "$11" },
3912      { { "t4" }, "$12" },
3913      { { "t5" }, "$13" },
3914      { { "t6" }, "$14" },
3915      { { "t7" }, "$15" },
3916      { { "s0" }, "$16" },
3917      { { "s1" }, "$17" },
3918      { { "s2" }, "$18" },
3919      { { "s3" }, "$19" },
3920      { { "s4" }, "$20" },
3921      { { "s5" }, "$21" },
3922      { { "s6" }, "$22" },
3923      { { "s7" }, "$23" },
3924      { { "t8" }, "$24" },
3925      { { "t9" }, "$25" },
3926      { { "k0" }, "$26" },
3927      { { "k1" }, "$27" },
3928      { { "gp" }, "$28" },
3929      { { "sp","$sp" }, "$29" },
3930      { { "fp","$fp" }, "$30" },
3931      { { "ra" }, "$31" }
3932    };
3933    Aliases = GCCRegAliases;
3934    NumAliases = llvm::array_lengthof(GCCRegAliases);
3935  }
3936};
3937
3938class Mips32EBTargetInfo : public Mips32TargetInfoBase {
3939public:
3940  Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3941    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3942                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3943  }
3944  virtual void getTargetDefines(const LangOptions &Opts,
3945                                MacroBuilder &Builder) const {
3946    DefineStd(Builder, "MIPSEB", Opts);
3947    Builder.defineMacro("_MIPSEB");
3948    Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
3949  }
3950};
3951
3952class Mips32ELTargetInfo : public Mips32TargetInfoBase {
3953public:
3954  Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3955    BigEndian = false;
3956    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3957                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3958  }
3959  virtual void getTargetDefines(const LangOptions &Opts,
3960                                MacroBuilder &Builder) const {
3961    DefineStd(Builder, "MIPSEL", Opts);
3962    Builder.defineMacro("_MIPSEL");
3963    Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
3964  }
3965};
3966
3967class Mips64TargetInfoBase : public MipsTargetInfoBase {
3968  virtual void SetDescriptionString(const std::string &Name) = 0;
3969public:
3970  Mips64TargetInfoBase(const std::string& triple) :
3971    MipsTargetInfoBase(triple, "n64", "mips64") {
3972    LongWidth = LongAlign = 64;
3973    PointerWidth = PointerAlign = 64;
3974    LongDoubleWidth = LongDoubleAlign = 128;
3975    LongDoubleFormat = &llvm::APFloat::IEEEquad;
3976    SuitableAlign = 128;
3977  }
3978  virtual bool setABI(const std::string &Name) {
3979    SetDescriptionString(Name);
3980
3981    if (Name != "n32" && Name != "n64")
3982      return false;
3983
3984    ABI = Name;
3985
3986    if (Name == "n32") {
3987      LongWidth = LongAlign = 32;
3988      PointerWidth = PointerAlign = 32;
3989    }
3990
3991    return true;
3992  }
3993  virtual void getTargetDefines(const LangOptions &Opts,
3994                                MacroBuilder &Builder) const {
3995    MipsTargetInfoBase::getTargetDefines(Opts, Builder);
3996
3997    Builder.defineMacro("__mips64");
3998    Builder.defineMacro("__mips64__");
3999
4000    if (ABI == "n32") {
4001      Builder.defineMacro("__mips_n32");
4002      Builder.defineMacro("_ABIN32", "2");
4003      Builder.defineMacro("_MIPS_SIM", "_ABIN32");
4004    }
4005    else if (ABI == "n64") {
4006      Builder.defineMacro("__mips_n64");
4007      Builder.defineMacro("_ABI64", "3");
4008      Builder.defineMacro("_MIPS_SIM", "_ABI64");
4009    }
4010    else
4011      llvm_unreachable("Invalid ABI for Mips64.");
4012  }
4013  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4014                                unsigned &NumAliases) const {
4015    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
4016      { { "at" },  "$1" },
4017      { { "v0" },  "$2" },
4018      { { "v1" },  "$3" },
4019      { { "a0" },  "$4" },
4020      { { "a1" },  "$5" },
4021      { { "a2" },  "$6" },
4022      { { "a3" },  "$7" },
4023      { { "a4" },  "$8" },
4024      { { "a5" },  "$9" },
4025      { { "a6" }, "$10" },
4026      { { "a7" }, "$11" },
4027      { { "t0" }, "$12" },
4028      { { "t1" }, "$13" },
4029      { { "t2" }, "$14" },
4030      { { "t3" }, "$15" },
4031      { { "s0" }, "$16" },
4032      { { "s1" }, "$17" },
4033      { { "s2" }, "$18" },
4034      { { "s3" }, "$19" },
4035      { { "s4" }, "$20" },
4036      { { "s5" }, "$21" },
4037      { { "s6" }, "$22" },
4038      { { "s7" }, "$23" },
4039      { { "t8" }, "$24" },
4040      { { "t9" }, "$25" },
4041      { { "k0" }, "$26" },
4042      { { "k1" }, "$27" },
4043      { { "gp" }, "$28" },
4044      { { "sp","$sp" }, "$29" },
4045      { { "fp","$fp" }, "$30" },
4046      { { "ra" }, "$31" }
4047    };
4048    Aliases = GCCRegAliases;
4049    NumAliases = llvm::array_lengthof(GCCRegAliases);
4050  }
4051};
4052
4053class Mips64EBTargetInfo : public Mips64TargetInfoBase {
4054  virtual void SetDescriptionString(const std::string &Name) {
4055    // Change DescriptionString only if ABI is n32.
4056    if (Name == "n32")
4057      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4058                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4059                          "v64:64:64-n32";
4060  }
4061public:
4062  Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
4063    // Default ABI is n64.
4064    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4065                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4066                        "v64:64:64-n32";
4067  }
4068  virtual void getTargetDefines(const LangOptions &Opts,
4069                                MacroBuilder &Builder) const {
4070    DefineStd(Builder, "MIPSEB", Opts);
4071    Builder.defineMacro("_MIPSEB");
4072    Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
4073  }
4074};
4075
4076class Mips64ELTargetInfo : public Mips64TargetInfoBase {
4077  virtual void SetDescriptionString(const std::string &Name) {
4078    // Change DescriptionString only if ABI is n32.
4079    if (Name == "n32")
4080      DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4081                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
4082                          "-v64:64:64-n32";
4083  }
4084public:
4085  Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
4086    // Default ABI is n64.
4087    BigEndian = false;
4088    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4089                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4090                        "v64:64:64-n32";
4091  }
4092  virtual void getTargetDefines(const LangOptions &Opts,
4093                                MacroBuilder &Builder) const {
4094    DefineStd(Builder, "MIPSEL", Opts);
4095    Builder.defineMacro("_MIPSEL");
4096    Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
4097  }
4098};
4099} // end anonymous namespace.
4100
4101namespace {
4102class PNaClTargetInfo : public TargetInfo {
4103public:
4104  PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
4105    BigEndian = false;
4106    this->UserLabelPrefix = "";
4107    this->LongAlign = 32;
4108    this->LongWidth = 32;
4109    this->PointerAlign = 32;
4110    this->PointerWidth = 32;
4111    this->IntMaxType = TargetInfo::SignedLongLong;
4112    this->UIntMaxType = TargetInfo::UnsignedLongLong;
4113    this->Int64Type = TargetInfo::SignedLongLong;
4114    this->DoubleAlign = 64;
4115    this->LongDoubleWidth = 64;
4116    this->LongDoubleAlign = 64;
4117    this->SizeType = TargetInfo::UnsignedInt;
4118    this->PtrDiffType = TargetInfo::SignedInt;
4119    this->IntPtrType = TargetInfo::SignedInt;
4120    this->RegParmMax = 2;
4121    DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
4122                        "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
4123  }
4124
4125  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
4126  }
4127  virtual void getArchDefines(const LangOptions &Opts,
4128                              MacroBuilder &Builder) const {
4129    Builder.defineMacro("__le32__");
4130    Builder.defineMacro("__pnacl__");
4131  }
4132  virtual void getTargetDefines(const LangOptions &Opts,
4133                                MacroBuilder &Builder) const {
4134    DefineStd(Builder, "unix", Opts);
4135    Builder.defineMacro("__ELF__");
4136    if (Opts.POSIXThreads)
4137      Builder.defineMacro("_REENTRANT");
4138    if (Opts.CPlusPlus)
4139      Builder.defineMacro("_GNU_SOURCE");
4140
4141    Builder.defineMacro("__LITTLE_ENDIAN__");
4142    Builder.defineMacro("__native_client__");
4143    getArchDefines(Opts, Builder);
4144  }
4145  virtual bool hasFeature(StringRef Feature) const {
4146    return Feature == "pnacl";
4147  }
4148  virtual void getTargetBuiltins(const Builtin::Info *&Records,
4149                                 unsigned &NumRecords) const {
4150  }
4151  virtual BuiltinVaListKind getBuiltinVaListKind() const {
4152    return TargetInfo::PNaClABIBuiltinVaList;
4153  }
4154  virtual void getGCCRegNames(const char * const *&Names,
4155                              unsigned &NumNames) const;
4156  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4157                                unsigned &NumAliases) const;
4158  virtual bool validateAsmConstraint(const char *&Name,
4159                                     TargetInfo::ConstraintInfo &Info) const {
4160    return false;
4161  }
4162
4163  virtual const char *getClobbers() const {
4164    return "";
4165  }
4166};
4167
4168void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
4169                                     unsigned &NumNames) const {
4170  Names = NULL;
4171  NumNames = 0;
4172}
4173
4174void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
4175                                       unsigned &NumAliases) const {
4176  Aliases = NULL;
4177  NumAliases = 0;
4178}
4179} // end anonymous namespace.
4180
4181
4182//===----------------------------------------------------------------------===//
4183// Driver code
4184//===----------------------------------------------------------------------===//
4185
4186static TargetInfo *AllocateTarget(const std::string &T) {
4187  llvm::Triple Triple(T);
4188  llvm::Triple::OSType os = Triple.getOS();
4189
4190  switch (Triple.getArch()) {
4191  default:
4192    return NULL;
4193
4194  case llvm::Triple::hexagon:
4195    return new HexagonTargetInfo(T);
4196
4197  case llvm::Triple::arm:
4198  case llvm::Triple::thumb:
4199    if (Triple.isOSDarwin())
4200      return new DarwinARMTargetInfo(T);
4201
4202    switch (os) {
4203    case llvm::Triple::Linux:
4204      return new LinuxTargetInfo<ARMTargetInfo>(T);
4205    case llvm::Triple::FreeBSD:
4206      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
4207    case llvm::Triple::NetBSD:
4208      return new NetBSDTargetInfo<ARMTargetInfo>(T);
4209    case llvm::Triple::OpenBSD:
4210      return new OpenBSDTargetInfo<ARMTargetInfo>(T);
4211    case llvm::Triple::Bitrig:
4212      return new BitrigTargetInfo<ARMTargetInfo>(T);
4213    case llvm::Triple::RTEMS:
4214      return new RTEMSTargetInfo<ARMTargetInfo>(T);
4215    default:
4216      return new ARMTargetInfo(T);
4217    }
4218
4219  case llvm::Triple::msp430:
4220    return new MSP430TargetInfo(T);
4221
4222  case llvm::Triple::mips:
4223    switch (os) {
4224    case llvm::Triple::Linux:
4225      return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
4226    case llvm::Triple::RTEMS:
4227      return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
4228    case llvm::Triple::FreeBSD:
4229      return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
4230    case llvm::Triple::NetBSD:
4231      return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
4232    default:
4233      return new Mips32EBTargetInfo(T);
4234    }
4235
4236  case llvm::Triple::mipsel:
4237    switch (os) {
4238    case llvm::Triple::Linux:
4239      return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
4240    case llvm::Triple::RTEMS:
4241      return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
4242    case llvm::Triple::FreeBSD:
4243      return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
4244    case llvm::Triple::NetBSD:
4245      return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
4246    default:
4247      return new Mips32ELTargetInfo(T);
4248    }
4249
4250  case llvm::Triple::mips64:
4251    switch (os) {
4252    case llvm::Triple::Linux:
4253      return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
4254    case llvm::Triple::RTEMS:
4255      return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
4256    case llvm::Triple::FreeBSD:
4257      return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
4258    case llvm::Triple::NetBSD:
4259      return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
4260    case llvm::Triple::OpenBSD:
4261      return new OpenBSDTargetInfo<Mips64EBTargetInfo>(T);
4262    default:
4263      return new Mips64EBTargetInfo(T);
4264    }
4265
4266  case llvm::Triple::mips64el:
4267    switch (os) {
4268    case llvm::Triple::Linux:
4269      return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
4270    case llvm::Triple::RTEMS:
4271      return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
4272    case llvm::Triple::FreeBSD:
4273      return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
4274    case llvm::Triple::NetBSD:
4275      return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
4276    case llvm::Triple::OpenBSD:
4277      return new OpenBSDTargetInfo<Mips64ELTargetInfo>(T);
4278    default:
4279      return new Mips64ELTargetInfo(T);
4280    }
4281
4282  case llvm::Triple::le32:
4283    switch (os) {
4284      case llvm::Triple::NativeClient:
4285        return new PNaClTargetInfo(T);
4286      default:
4287        return NULL;
4288    }
4289
4290  case llvm::Triple::ppc:
4291    if (Triple.isOSDarwin())
4292      return new DarwinPPC32TargetInfo(T);
4293    switch (os) {
4294    case llvm::Triple::Linux:
4295      return new LinuxTargetInfo<PPC32TargetInfo>(T);
4296    case llvm::Triple::FreeBSD:
4297      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
4298    case llvm::Triple::NetBSD:
4299      return new NetBSDTargetInfo<PPC32TargetInfo>(T);
4300    case llvm::Triple::OpenBSD:
4301      return new OpenBSDTargetInfo<PPC32TargetInfo>(T);
4302    case llvm::Triple::RTEMS:
4303      return new RTEMSTargetInfo<PPC32TargetInfo>(T);
4304    default:
4305      return new PPC32TargetInfo(T);
4306    }
4307
4308  case llvm::Triple::ppc64:
4309    if (Triple.isOSDarwin())
4310      return new DarwinPPC64TargetInfo(T);
4311    switch (os) {
4312    case llvm::Triple::Linux:
4313      return new LinuxTargetInfo<PPC64TargetInfo>(T);
4314    case llvm::Triple::Lv2:
4315      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
4316    case llvm::Triple::FreeBSD:
4317      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
4318    case llvm::Triple::NetBSD:
4319      return new NetBSDTargetInfo<PPC64TargetInfo>(T);
4320    default:
4321      return new PPC64TargetInfo(T);
4322    }
4323
4324  case llvm::Triple::nvptx:
4325    return new NVPTX32TargetInfo(T);
4326  case llvm::Triple::nvptx64:
4327    return new NVPTX64TargetInfo(T);
4328
4329  case llvm::Triple::mblaze:
4330    return new MBlazeTargetInfo(T);
4331
4332  case llvm::Triple::sparc:
4333    switch (os) {
4334    case llvm::Triple::Linux:
4335      return new LinuxTargetInfo<SparcV8TargetInfo>(T);
4336    case llvm::Triple::AuroraUX:
4337      return new AuroraUXSparcV8TargetInfo(T);
4338    case llvm::Triple::Solaris:
4339      return new SolarisSparcV8TargetInfo(T);
4340    case llvm::Triple::NetBSD:
4341      return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
4342    case llvm::Triple::OpenBSD:
4343      return new OpenBSDTargetInfo<SparcV8TargetInfo>(T);
4344    case llvm::Triple::RTEMS:
4345      return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
4346    default:
4347      return new SparcV8TargetInfo(T);
4348    }
4349
4350  // FIXME: Need a real SPU target.
4351  case llvm::Triple::cellspu:
4352    return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
4353
4354  case llvm::Triple::tce:
4355    return new TCETargetInfo(T);
4356
4357  case llvm::Triple::x86:
4358    if (Triple.isOSDarwin())
4359      return new DarwinI386TargetInfo(T);
4360
4361    switch (os) {
4362    case llvm::Triple::AuroraUX:
4363      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
4364    case llvm::Triple::Linux:
4365      return new LinuxTargetInfo<X86_32TargetInfo>(T);
4366    case llvm::Triple::DragonFly:
4367      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
4368    case llvm::Triple::NetBSD:
4369      return new NetBSDI386TargetInfo(T);
4370    case llvm::Triple::OpenBSD:
4371      return new OpenBSDI386TargetInfo(T);
4372    case llvm::Triple::Bitrig:
4373      return new BitrigI386TargetInfo(T);
4374    case llvm::Triple::FreeBSD:
4375      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
4376    case llvm::Triple::Minix:
4377      return new MinixTargetInfo<X86_32TargetInfo>(T);
4378    case llvm::Triple::Solaris:
4379      return new SolarisTargetInfo<X86_32TargetInfo>(T);
4380    case llvm::Triple::Cygwin:
4381      return new CygwinX86_32TargetInfo(T);
4382    case llvm::Triple::MinGW32:
4383      return new MinGWX86_32TargetInfo(T);
4384    case llvm::Triple::Win32:
4385      return new VisualStudioWindowsX86_32TargetInfo(T);
4386    case llvm::Triple::Haiku:
4387      return new HaikuX86_32TargetInfo(T);
4388    case llvm::Triple::RTEMS:
4389      return new RTEMSX86_32TargetInfo(T);
4390    default:
4391      return new X86_32TargetInfo(T);
4392    }
4393
4394  case llvm::Triple::x86_64:
4395    if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
4396      return new DarwinX86_64TargetInfo(T);
4397
4398    switch (os) {
4399    case llvm::Triple::AuroraUX:
4400      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
4401    case llvm::Triple::Linux:
4402      return new LinuxTargetInfo<X86_64TargetInfo>(T);
4403    case llvm::Triple::DragonFly:
4404      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
4405    case llvm::Triple::NetBSD:
4406      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
4407    case llvm::Triple::OpenBSD:
4408      return new OpenBSDX86_64TargetInfo(T);
4409    case llvm::Triple::Bitrig:
4410      return new BitrigX86_64TargetInfo(T);
4411    case llvm::Triple::FreeBSD:
4412      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
4413    case llvm::Triple::Solaris:
4414      return new SolarisTargetInfo<X86_64TargetInfo>(T);
4415    case llvm::Triple::MinGW32:
4416      return new MinGWX86_64TargetInfo(T);
4417    case llvm::Triple::Win32:   // This is what Triple.h supports now.
4418      return new VisualStudioWindowsX86_64TargetInfo(T);
4419    default:
4420      return new X86_64TargetInfo(T);
4421    }
4422  }
4423}
4424
4425/// CreateTargetInfo - Return the target info object for the specified target
4426/// triple.
4427TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
4428                                         TargetOptions &Opts) {
4429  llvm::Triple Triple(Opts.Triple);
4430
4431  // Construct the target
4432  OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
4433  if (!Target) {
4434    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
4435    return 0;
4436  }
4437
4438  // Set the target CPU if specified.
4439  if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
4440    Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
4441    return 0;
4442  }
4443
4444  // Set the target ABI if specified.
4445  if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
4446    Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
4447    return 0;
4448  }
4449
4450  // Set the target C++ ABI.
4451  if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
4452    Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
4453    return 0;
4454  }
4455
4456  // Compute the default target features, we need the target to handle this
4457  // because features may have dependencies on one another.
4458  llvm::StringMap<bool> Features;
4459  Target->getDefaultFeatures(Features);
4460
4461  // Apply the user specified deltas.
4462  // First the enables.
4463  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4464         ie = Opts.Features.end(); it != ie; ++it) {
4465    const char *Name = it->c_str();
4466
4467    if (Name[0] != '+')
4468      continue;
4469
4470    // Apply the feature via the target.
4471    if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
4472      Diags.Report(diag::err_target_invalid_feature) << Name;
4473      return 0;
4474    }
4475  }
4476
4477  // Then the disables.
4478  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4479         ie = Opts.Features.end(); it != ie; ++it) {
4480    const char *Name = it->c_str();
4481
4482    if (Name[0] == '+')
4483      continue;
4484
4485    // Apply the feature via the target.
4486    if (Name[0] != '-' ||
4487        !Target->setFeatureEnabled(Features, Name + 1, false)) {
4488      Diags.Report(diag::err_target_invalid_feature) << Name;
4489      return 0;
4490    }
4491  }
4492
4493  // Add the features to the compile options.
4494  //
4495  // FIXME: If we are completely confident that we have the right set, we only
4496  // need to pass the minuses.
4497  Opts.Features.clear();
4498  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
4499         ie = Features.end(); it != ie; ++it)
4500    Opts.Features.push_back((it->second ? "+" : "-") + it->first().str());
4501  Target->HandleTargetFeatures(Opts.Features);
4502
4503  return Target.take();
4504}
4505