Targets.cpp revision b0fc94ceaf1462a56068bbe400e6f22ef96ac681 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/IR/Type.h"
29#include "llvm/MC/MCSectionMachO.h"
30#include "llvm/Support/ErrorHandling.h"
31#include <algorithm>
32using namespace clang;
33
34//===----------------------------------------------------------------------===//
35//  Common code shared among targets.
36//===----------------------------------------------------------------------===//
37
38/// DefineStd - Define a macro name and standard variants.  For example if
39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
40/// when in GNU mode.
41static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42                      const LangOptions &Opts) {
43  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44
45  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46  // in the user's namespace.
47  if (Opts.GNUMode)
48    Builder.defineMacro(MacroName);
49
50  // Define __unix.
51  Builder.defineMacro("__" + MacroName);
52
53  // Define __unix__.
54  Builder.defineMacro("__" + MacroName + "__");
55}
56
57static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName,
58                            bool Tuning = true) {
59  Builder.defineMacro("__" + CPUName);
60  Builder.defineMacro("__" + CPUName + "__");
61  if (Tuning)
62    Builder.defineMacro("__tune_" + CPUName + "__");
63}
64
65//===----------------------------------------------------------------------===//
66// Defines specific to certain operating systems.
67//===----------------------------------------------------------------------===//
68
69namespace {
70template<typename TgtInfo>
71class OSTargetInfo : public TgtInfo {
72protected:
73  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
74                            MacroBuilder &Builder) const=0;
75public:
76  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
77  virtual void getTargetDefines(const LangOptions &Opts,
78                                MacroBuilder &Builder) const {
79    TgtInfo::getTargetDefines(Opts, Builder);
80    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
81  }
82
83};
84} // end anonymous namespace
85
86
87static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
88                             const llvm::Triple &Triple,
89                             StringRef &PlatformName,
90                             VersionTuple &PlatformMinVersion) {
91  Builder.defineMacro("__APPLE_CC__", "5621");
92  Builder.defineMacro("__APPLE__");
93  Builder.defineMacro("__MACH__");
94  Builder.defineMacro("OBJC_NEW_PROPERTIES");
95  // AddressSanitizer doesn't play well with source fortification, which is on
96  // by default on Darwin.
97  if (Opts.Sanitize.Address) Builder.defineMacro("_FORTIFY_SOURCE", "0");
98
99  if (!Opts.ObjCAutoRefCount) {
100    // __weak is always defined, for use in blocks and with objc pointers.
101    Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
102
103    // Darwin defines __strong even in C mode (just to nothing).
104    if (Opts.getGC() != LangOptions::NonGC)
105      Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
106    else
107      Builder.defineMacro("__strong", "");
108
109    // __unsafe_unretained is defined to nothing in non-ARC mode. We even
110    // allow this in C, since one might have block pointers in structs that
111    // are used in pure C code and in Objective-C ARC.
112    Builder.defineMacro("__unsafe_unretained", "");
113  }
114
115  if (Opts.Static)
116    Builder.defineMacro("__STATIC__");
117  else
118    Builder.defineMacro("__DYNAMIC__");
119
120  if (Opts.POSIXThreads)
121    Builder.defineMacro("_REENTRANT");
122
123  // Get the platform type and version number from the triple.
124  unsigned Maj, Min, Rev;
125  if (Triple.isMacOSX()) {
126    Triple.getMacOSXVersion(Maj, Min, Rev);
127    PlatformName = "macosx";
128  } else {
129    Triple.getOSVersion(Maj, Min, Rev);
130    PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
131  }
132
133  // If -target arch-pc-win32-macho option specified, we're
134  // generating code for Win32 ABI. No need to emit
135  // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
136  if (PlatformName == "win32") {
137    PlatformMinVersion = VersionTuple(Maj, Min, Rev);
138    return;
139  }
140
141  // Set the appropriate OS version define.
142  if (Triple.getOS() == llvm::Triple::IOS) {
143    assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
144    char Str[6];
145    Str[0] = '0' + Maj;
146    Str[1] = '0' + (Min / 10);
147    Str[2] = '0' + (Min % 10);
148    Str[3] = '0' + (Rev / 10);
149    Str[4] = '0' + (Rev % 10);
150    Str[5] = '\0';
151    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
152  } else {
153    // Note that the Driver allows versions which aren't representable in the
154    // define (because we only get a single digit for the minor and micro
155    // revision numbers). So, we limit them to the maximum representable
156    // version.
157    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
158    assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
159    char Str[5];
160    Str[0] = '0' + (Maj / 10);
161    Str[1] = '0' + (Maj % 10);
162    Str[2] = '0' + std::min(Min, 9U);
163    Str[3] = '0' + std::min(Rev, 9U);
164    Str[4] = '\0';
165    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
166  }
167
168  PlatformMinVersion = VersionTuple(Maj, Min, Rev);
169}
170
171namespace {
172template<typename Target>
173class DarwinTargetInfo : public OSTargetInfo<Target> {
174protected:
175  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
176                            MacroBuilder &Builder) const {
177    getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
178                     this->PlatformMinVersion);
179  }
180
181public:
182  DarwinTargetInfo(const std::string& triple) :
183    OSTargetInfo<Target>(triple) {
184      llvm::Triple T = llvm::Triple(triple);
185      this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
186      this->MCountName = "\01mcount";
187    }
188
189  virtual std::string isValidSectionSpecifier(StringRef SR) const {
190    // Let MCSectionMachO validate this.
191    StringRef Segment, Section;
192    unsigned TAA, StubSize;
193    bool HasTAA;
194    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
195                                                       TAA, HasTAA, StubSize);
196  }
197
198  virtual const char *getStaticInitSectionSpecifier() const {
199    // FIXME: We should return 0 when building kexts.
200    return "__TEXT,__StaticInit,regular,pure_instructions";
201  }
202
203  /// Darwin does not support protected visibility.  Darwin's "default"
204  /// is very similar to ELF's "protected";  Darwin requires a "weak"
205  /// attribute on declarations that can be dynamically replaced.
206  virtual bool hasProtectedVisibility() const {
207    return false;
208  }
209};
210
211
212// DragonFlyBSD Target
213template<typename Target>
214class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
215protected:
216  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
217                            MacroBuilder &Builder) const {
218    // DragonFly defines; list based off of gcc output
219    Builder.defineMacro("__DragonFly__");
220    Builder.defineMacro("__DragonFly_cc_version", "100001");
221    Builder.defineMacro("__ELF__");
222    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
223    Builder.defineMacro("__tune_i386__");
224    DefineStd(Builder, "unix", Opts);
225  }
226public:
227  DragonFlyBSDTargetInfo(const std::string &triple)
228    : OSTargetInfo<Target>(triple) {
229      this->UserLabelPrefix = "";
230
231      llvm::Triple Triple(triple);
232      switch (Triple.getArch()) {
233        default:
234        case llvm::Triple::x86:
235        case llvm::Triple::x86_64:
236          this->MCountName = ".mcount";
237          break;
238      }
239  }
240};
241
242// FreeBSD Target
243template<typename Target>
244class FreeBSDTargetInfo : public OSTargetInfo<Target> {
245protected:
246  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
247                            MacroBuilder &Builder) const {
248    // FreeBSD defines; list based off of gcc output
249
250    unsigned Release = Triple.getOSMajorVersion();
251    if (Release == 0U)
252      Release = 8;
253
254    Builder.defineMacro("__FreeBSD__", Twine(Release));
255    Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
256    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
257    DefineStd(Builder, "unix", Opts);
258    Builder.defineMacro("__ELF__");
259  }
260public:
261  FreeBSDTargetInfo(const std::string &triple)
262    : OSTargetInfo<Target>(triple) {
263      this->UserLabelPrefix = "";
264
265      llvm::Triple Triple(triple);
266      switch (Triple.getArch()) {
267        default:
268        case llvm::Triple::x86:
269        case llvm::Triple::x86_64:
270          this->MCountName = ".mcount";
271          break;
272        case llvm::Triple::mips:
273        case llvm::Triple::mipsel:
274        case llvm::Triple::ppc:
275        case llvm::Triple::ppc64:
276          this->MCountName = "_mcount";
277          break;
278        case llvm::Triple::arm:
279          this->MCountName = "__mcount";
280          break;
281      }
282
283    }
284};
285
286// Minix Target
287template<typename Target>
288class MinixTargetInfo : public OSTargetInfo<Target> {
289protected:
290  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
291                            MacroBuilder &Builder) const {
292    // Minix defines
293
294    Builder.defineMacro("__minix", "3");
295    Builder.defineMacro("_EM_WSIZE", "4");
296    Builder.defineMacro("_EM_PSIZE", "4");
297    Builder.defineMacro("_EM_SSIZE", "2");
298    Builder.defineMacro("_EM_LSIZE", "4");
299    Builder.defineMacro("_EM_FSIZE", "4");
300    Builder.defineMacro("_EM_DSIZE", "8");
301    Builder.defineMacro("__ELF__");
302    DefineStd(Builder, "unix", Opts);
303  }
304public:
305  MinixTargetInfo(const std::string &triple)
306    : OSTargetInfo<Target>(triple) {
307      this->UserLabelPrefix = "";
308    }
309};
310
311// Linux target
312template<typename Target>
313class LinuxTargetInfo : public OSTargetInfo<Target> {
314protected:
315  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
316                            MacroBuilder &Builder) const {
317    // Linux defines; list based off of gcc output
318    DefineStd(Builder, "unix", Opts);
319    DefineStd(Builder, "linux", Opts);
320    Builder.defineMacro("__gnu_linux__");
321    Builder.defineMacro("__ELF__");
322    if (Triple.getEnvironment() == llvm::Triple::Android)
323      Builder.defineMacro("__ANDROID__", "1");
324    if (Opts.POSIXThreads)
325      Builder.defineMacro("_REENTRANT");
326    if (Opts.CPlusPlus)
327      Builder.defineMacro("_GNU_SOURCE");
328  }
329public:
330  LinuxTargetInfo(const std::string& triple)
331    : OSTargetInfo<Target>(triple) {
332    this->UserLabelPrefix = "";
333    this->WIntType = TargetInfo::UnsignedInt;
334  }
335
336  virtual const char *getStaticInitSectionSpecifier() const {
337    return ".text.startup";
338  }
339};
340
341// NetBSD Target
342template<typename Target>
343class NetBSDTargetInfo : public OSTargetInfo<Target> {
344protected:
345  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
346                            MacroBuilder &Builder) const {
347    // NetBSD defines; list based off of gcc output
348    Builder.defineMacro("__NetBSD__");
349    Builder.defineMacro("__unix__");
350    Builder.defineMacro("__ELF__");
351    if (Opts.POSIXThreads)
352      Builder.defineMacro("_POSIX_THREADS");
353  }
354public:
355  NetBSDTargetInfo(const std::string &triple)
356    : OSTargetInfo<Target>(triple) {
357      this->UserLabelPrefix = "";
358    }
359};
360
361// OpenBSD Target
362template<typename Target>
363class OpenBSDTargetInfo : public OSTargetInfo<Target> {
364protected:
365  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
366                            MacroBuilder &Builder) const {
367    // OpenBSD defines; list based off of gcc output
368
369    Builder.defineMacro("__OpenBSD__");
370    DefineStd(Builder, "unix", Opts);
371    Builder.defineMacro("__ELF__");
372    if (Opts.POSIXThreads)
373      Builder.defineMacro("_REENTRANT");
374  }
375public:
376  OpenBSDTargetInfo(const std::string &triple)
377    : OSTargetInfo<Target>(triple) {
378      this->UserLabelPrefix = "";
379      this->TLSSupported = false;
380
381      llvm::Triple Triple(triple);
382      switch (Triple.getArch()) {
383        default:
384        case llvm::Triple::x86:
385        case llvm::Triple::x86_64:
386        case llvm::Triple::arm:
387        case llvm::Triple::sparc:
388          this->MCountName = "__mcount";
389          break;
390        case llvm::Triple::mips64:
391        case llvm::Triple::mips64el:
392        case llvm::Triple::ppc:
393        case llvm::Triple::sparcv9:
394          this->MCountName = "_mcount";
395          break;
396      }
397  }
398};
399
400// Bitrig Target
401template<typename Target>
402class BitrigTargetInfo : public OSTargetInfo<Target> {
403protected:
404  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
405                            MacroBuilder &Builder) const {
406    // Bitrig defines; list based off of gcc output
407
408    Builder.defineMacro("__Bitrig__");
409    DefineStd(Builder, "unix", Opts);
410    Builder.defineMacro("__ELF__");
411    if (Opts.POSIXThreads)
412      Builder.defineMacro("_REENTRANT");
413  }
414public:
415  BitrigTargetInfo(const std::string &triple)
416    : OSTargetInfo<Target>(triple) {
417      this->UserLabelPrefix = "";
418      this->TLSSupported = false;
419      this->MCountName = "__mcount";
420  }
421};
422
423// PSP Target
424template<typename Target>
425class PSPTargetInfo : public OSTargetInfo<Target> {
426protected:
427  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
428                            MacroBuilder &Builder) const {
429    // PSP defines; list based on the output of the pspdev gcc toolchain.
430    Builder.defineMacro("PSP");
431    Builder.defineMacro("_PSP");
432    Builder.defineMacro("__psp__");
433    Builder.defineMacro("__ELF__");
434  }
435public:
436  PSPTargetInfo(const std::string& triple)
437    : OSTargetInfo<Target>(triple) {
438    this->UserLabelPrefix = "";
439  }
440};
441
442// PS3 PPU Target
443template<typename Target>
444class PS3PPUTargetInfo : public OSTargetInfo<Target> {
445protected:
446  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
447                            MacroBuilder &Builder) const {
448    // PS3 PPU defines.
449    Builder.defineMacro("__PPC__");
450    Builder.defineMacro("__PPU__");
451    Builder.defineMacro("__CELLOS_LV2__");
452    Builder.defineMacro("__ELF__");
453    Builder.defineMacro("__LP32__");
454    Builder.defineMacro("_ARCH_PPC64");
455    Builder.defineMacro("__powerpc64__");
456  }
457public:
458  PS3PPUTargetInfo(const std::string& triple)
459    : OSTargetInfo<Target>(triple) {
460    this->UserLabelPrefix = "";
461    this->LongWidth = this->LongAlign = 32;
462    this->PointerWidth = this->PointerAlign = 32;
463    this->IntMaxType = TargetInfo::SignedLongLong;
464    this->UIntMaxType = TargetInfo::UnsignedLongLong;
465    this->Int64Type = TargetInfo::SignedLongLong;
466    this->SizeType = TargetInfo::UnsignedInt;
467    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
468                              "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
469  }
470};
471
472// FIXME: Need a real SPU target.
473// PS3 SPU Target
474template<typename Target>
475class PS3SPUTargetInfo : public OSTargetInfo<Target> {
476protected:
477  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
478                            MacroBuilder &Builder) const {
479    // PS3 PPU defines.
480    Builder.defineMacro("__SPU__");
481    Builder.defineMacro("__ELF__");
482  }
483public:
484  PS3SPUTargetInfo(const std::string& triple)
485    : OSTargetInfo<Target>(triple) {
486    this->UserLabelPrefix = "";
487  }
488};
489
490// AuroraUX target
491template<typename Target>
492class AuroraUXTargetInfo : public OSTargetInfo<Target> {
493protected:
494  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
495                            MacroBuilder &Builder) const {
496    DefineStd(Builder, "sun", Opts);
497    DefineStd(Builder, "unix", Opts);
498    Builder.defineMacro("__ELF__");
499    Builder.defineMacro("__svr4__");
500    Builder.defineMacro("__SVR4");
501  }
502public:
503  AuroraUXTargetInfo(const std::string& triple)
504    : OSTargetInfo<Target>(triple) {
505    this->UserLabelPrefix = "";
506    this->WCharType = this->SignedLong;
507    // FIXME: WIntType should be SignedLong
508  }
509};
510
511// Solaris target
512template<typename Target>
513class SolarisTargetInfo : public OSTargetInfo<Target> {
514protected:
515  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
516                            MacroBuilder &Builder) const {
517    DefineStd(Builder, "sun", Opts);
518    DefineStd(Builder, "unix", Opts);
519    Builder.defineMacro("__ELF__");
520    Builder.defineMacro("__svr4__");
521    Builder.defineMacro("__SVR4");
522    // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and
523    // newer, but to 500 for everything else.  feature_test.h has a check to
524    // ensure that you are not using C99 with an old version of X/Open or C89
525    // with a new version.
526    if (Opts.C99 || Opts.C11)
527      Builder.defineMacro("_XOPEN_SOURCE", "600");
528    else
529      Builder.defineMacro("_XOPEN_SOURCE", "500");
530    if (Opts.CPlusPlus)
531      Builder.defineMacro("__C99FEATURES__");
532    Builder.defineMacro("_LARGEFILE_SOURCE");
533    Builder.defineMacro("_LARGEFILE64_SOURCE");
534    Builder.defineMacro("__EXTENSIONS__");
535    Builder.defineMacro("_REENTRANT");
536  }
537public:
538  SolarisTargetInfo(const std::string& triple)
539    : OSTargetInfo<Target>(triple) {
540    this->UserLabelPrefix = "";
541    this->WCharType = this->SignedInt;
542    // FIXME: WIntType should be SignedLong
543  }
544};
545
546// Windows target
547template<typename Target>
548class WindowsTargetInfo : public OSTargetInfo<Target> {
549protected:
550  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
551                            MacroBuilder &Builder) const {
552    Builder.defineMacro("_WIN32");
553  }
554  void getVisualStudioDefines(const LangOptions &Opts,
555                              MacroBuilder &Builder) const {
556    if (Opts.CPlusPlus) {
557      if (Opts.RTTI)
558        Builder.defineMacro("_CPPRTTI");
559
560      if (Opts.Exceptions)
561        Builder.defineMacro("_CPPUNWIND");
562    }
563
564    if (!Opts.CharIsSigned)
565      Builder.defineMacro("_CHAR_UNSIGNED");
566
567    // FIXME: POSIXThreads isn't exactly the option this should be defined for,
568    //        but it works for now.
569    if (Opts.POSIXThreads)
570      Builder.defineMacro("_MT");
571
572    if (Opts.MSCVersion != 0)
573      Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
574
575    if (Opts.MicrosoftExt) {
576      Builder.defineMacro("_MSC_EXTENSIONS");
577
578      if (Opts.CPlusPlus11) {
579        Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
580        Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
581        Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
582      }
583    }
584
585    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
586  }
587
588public:
589  WindowsTargetInfo(const std::string &triple)
590    : OSTargetInfo<Target>(triple) {}
591};
592
593template <typename Target>
594class NaClTargetInfo : public OSTargetInfo<Target> {
595 protected:
596  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
597                            MacroBuilder &Builder) const {
598    if (Opts.POSIXThreads)
599      Builder.defineMacro("_REENTRANT");
600    if (Opts.CPlusPlus)
601      Builder.defineMacro("_GNU_SOURCE");
602
603    DefineStd(Builder, "unix", Opts);
604    Builder.defineMacro("__ELF__");
605    Builder.defineMacro("__native_client__");
606  }
607 public:
608  NaClTargetInfo(const std::string &triple)
609    : OSTargetInfo<Target>(triple) {
610    this->UserLabelPrefix = "";
611    this->LongAlign = 32;
612    this->LongWidth = 32;
613    this->PointerAlign = 32;
614    this->PointerWidth = 32;
615    this->IntMaxType = TargetInfo::SignedLongLong;
616    this->UIntMaxType = TargetInfo::UnsignedLongLong;
617    this->Int64Type = TargetInfo::SignedLongLong;
618    this->DoubleAlign = 64;
619    this->LongDoubleWidth = 64;
620    this->LongDoubleAlign = 64;
621    this->SizeType = TargetInfo::UnsignedInt;
622    this->PtrDiffType = TargetInfo::SignedInt;
623    this->IntPtrType = TargetInfo::SignedInt;
624    this->RegParmMax = 2;
625    this->LongDoubleFormat = &llvm::APFloat::IEEEdouble;
626    this->DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
627                              "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
628  }
629  virtual typename Target::CallingConvCheckResult checkCallingConvention(
630      CallingConv CC) const {
631    return CC == CC_PnaclCall ? Target::CCCR_OK :
632        Target::checkCallingConvention(CC);
633  }
634};
635} // end anonymous namespace.
636
637//===----------------------------------------------------------------------===//
638// Specific target implementations.
639//===----------------------------------------------------------------------===//
640
641namespace {
642// PPC abstract base class
643class PPCTargetInfo : public TargetInfo {
644  static const Builtin::Info BuiltinInfo[];
645  static const char * const GCCRegNames[];
646  static const TargetInfo::GCCRegAlias GCCRegAliases[];
647  std::string CPU;
648public:
649  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {
650    LongDoubleWidth = LongDoubleAlign = 128;
651    LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
652  }
653
654  /// \brief Flags for architecture specific defines.
655  typedef enum {
656    ArchDefineNone  = 0,
657    ArchDefineName  = 1 << 0, // <name> is substituted for arch name.
658    ArchDefinePpcgr = 1 << 1,
659    ArchDefinePpcsq = 1 << 2,
660    ArchDefine440   = 1 << 3,
661    ArchDefine603   = 1 << 4,
662    ArchDefine604   = 1 << 5,
663    ArchDefinePwr4  = 1 << 6,
664    ArchDefinePwr6  = 1 << 7
665  } ArchDefineTypes;
666
667  virtual bool setCPU(const std::string &Name) {
668    bool CPUKnown = llvm::StringSwitch<bool>(Name)
669      .Case("generic", true)
670      .Case("440", true)
671      .Case("450", true)
672      .Case("601", true)
673      .Case("602", true)
674      .Case("603", true)
675      .Case("603e", true)
676      .Case("603ev", true)
677      .Case("604", true)
678      .Case("604e", true)
679      .Case("620", true)
680      .Case("g3", true)
681      .Case("7400", true)
682      .Case("g4", true)
683      .Case("7450", true)
684      .Case("g4+", true)
685      .Case("750", true)
686      .Case("970", true)
687      .Case("g5", true)
688      .Case("a2", true)
689      .Case("e500mc", true)
690      .Case("e5500", true)
691      .Case("pwr6", true)
692      .Case("pwr7", true)
693      .Case("ppc", true)
694      .Case("ppc64", true)
695      .Default(false);
696
697    if (CPUKnown)
698      CPU = Name;
699
700    return CPUKnown;
701  }
702
703  virtual void getTargetBuiltins(const Builtin::Info *&Records,
704                                 unsigned &NumRecords) const {
705    Records = BuiltinInfo;
706    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
707  }
708
709  virtual bool isCLZForZeroUndef() const { return false; }
710
711  virtual void getTargetDefines(const LangOptions &Opts,
712                                MacroBuilder &Builder) const;
713
714  virtual bool hasFeature(StringRef Feature) const;
715
716  virtual void getGCCRegNames(const char * const *&Names,
717                              unsigned &NumNames) const;
718  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
719                                unsigned &NumAliases) const;
720  virtual bool validateAsmConstraint(const char *&Name,
721                                     TargetInfo::ConstraintInfo &Info) const {
722    switch (*Name) {
723    default: return false;
724    case 'O': // Zero
725      break;
726    case 'b': // Base register
727    case 'f': // Floating point register
728      Info.setAllowsRegister();
729      break;
730    // FIXME: The following are added to allow parsing.
731    // I just took a guess at what the actions should be.
732    // Also, is more specific checking needed?  I.e. specific registers?
733    case 'd': // Floating point register (containing 64-bit value)
734    case 'v': // Altivec vector register
735      Info.setAllowsRegister();
736      break;
737    case 'w':
738      switch (Name[1]) {
739        case 'd':// VSX vector register to hold vector double data
740        case 'f':// VSX vector register to hold vector float data
741        case 's':// VSX vector register to hold scalar float data
742        case 'a':// Any VSX register
743          break;
744        default:
745          return false;
746      }
747      Info.setAllowsRegister();
748      Name++; // Skip over 'w'.
749      break;
750    case 'h': // `MQ', `CTR', or `LINK' register
751    case 'q': // `MQ' register
752    case 'c': // `CTR' register
753    case 'l': // `LINK' register
754    case 'x': // `CR' register (condition register) number 0
755    case 'y': // `CR' register (condition register)
756    case 'z': // `XER[CA]' carry bit (part of the XER register)
757      Info.setAllowsRegister();
758      break;
759    case 'I': // Signed 16-bit constant
760    case 'J': // Unsigned 16-bit constant shifted left 16 bits
761              //  (use `L' instead for SImode constants)
762    case 'K': // Unsigned 16-bit constant
763    case 'L': // Signed 16-bit constant shifted left 16 bits
764    case 'M': // Constant larger than 31
765    case 'N': // Exact power of 2
766    case 'P': // Constant whose negation is a signed 16-bit constant
767    case 'G': // Floating point constant that can be loaded into a
768              // register with one instruction per word
769    case 'H': // Integer/Floating point constant that can be loaded
770              // into a register using three instructions
771      break;
772    case 'm': // Memory operand. Note that on PowerPC targets, m can
773              // include addresses that update the base register. It
774              // is therefore only safe to use `m' in an asm statement
775              // if that asm statement accesses the operand exactly once.
776              // The asm statement must also use `%U<opno>' as a
777              // placeholder for the "update" flag in the corresponding
778              // load or store instruction. For example:
779              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
780              // is correct but:
781              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
782              // is not. Use es rather than m if you don't want the base
783              // register to be updated.
784    case 'e':
785      if (Name[1] != 's')
786          return false;
787              // es: A "stable" memory operand; that is, one which does not
788              // include any automodification of the base register. Unlike
789              // `m', this constraint can be used in asm statements that
790              // might access the operand several times, or that might not
791              // access it at all.
792      Info.setAllowsMemory();
793      Name++; // Skip over 'e'.
794      break;
795    case 'Q': // Memory operand that is an offset from a register (it is
796              // usually better to use `m' or `es' in asm statements)
797    case 'Z': // Memory operand that is an indexed or indirect from a
798              // register (it is usually better to use `m' or `es' in
799              // asm statements)
800      Info.setAllowsMemory();
801      Info.setAllowsRegister();
802      break;
803    case 'R': // AIX TOC entry
804    case 'a': // Address operand that is an indexed or indirect from a
805              // register (`p' is preferable for asm statements)
806    case 'S': // Constant suitable as a 64-bit mask operand
807    case 'T': // Constant suitable as a 32-bit mask operand
808    case 'U': // System V Release 4 small data area reference
809    case 't': // AND masks that can be performed by two rldic{l, r}
810              // instructions
811    case 'W': // Vector constant that does not require memory
812    case 'j': // Vector constant that is all zeros.
813      break;
814    // End FIXME.
815    }
816    return true;
817  }
818  virtual const char *getClobbers() const {
819    return "";
820  }
821  int getEHDataRegisterNumber(unsigned RegNo) const {
822    if (RegNo == 0) return 3;
823    if (RegNo == 1) return 4;
824    return -1;
825  }
826};
827
828const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
829#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
830#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
831                                              ALL_LANGUAGES },
832#include "clang/Basic/BuiltinsPPC.def"
833};
834
835
836/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
837/// #defines that are not tied to a specific subtarget.
838void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
839                                     MacroBuilder &Builder) const {
840  // Target identification.
841  Builder.defineMacro("__ppc__");
842  Builder.defineMacro("_ARCH_PPC");
843  Builder.defineMacro("__powerpc__");
844  Builder.defineMacro("__POWERPC__");
845  if (PointerWidth == 64) {
846    Builder.defineMacro("_ARCH_PPC64");
847    Builder.defineMacro("__powerpc64__");
848    Builder.defineMacro("__ppc64__");
849  } else {
850    Builder.defineMacro("__ppc__");
851  }
852
853  // Target properties.
854  if (getTriple().getOS() != llvm::Triple::NetBSD &&
855      getTriple().getOS() != llvm::Triple::OpenBSD)
856    Builder.defineMacro("_BIG_ENDIAN");
857  Builder.defineMacro("__BIG_ENDIAN__");
858
859  // Subtarget options.
860  Builder.defineMacro("__NATURAL_ALIGNMENT__");
861  Builder.defineMacro("__REGISTER_PREFIX__", "");
862
863  // FIXME: Should be controlled by command line option.
864  Builder.defineMacro("__LONG_DOUBLE_128__");
865
866  if (Opts.AltiVec) {
867    Builder.defineMacro("__VEC__", "10206");
868    Builder.defineMacro("__ALTIVEC__");
869  }
870
871  // CPU identification.
872  ArchDefineTypes defs = (ArchDefineTypes)llvm::StringSwitch<int>(CPU)
873    .Case("440",   ArchDefineName)
874    .Case("450",   ArchDefineName | ArchDefine440)
875    .Case("601",   ArchDefineName)
876    .Case("602",   ArchDefineName | ArchDefinePpcgr)
877    .Case("603",   ArchDefineName | ArchDefinePpcgr)
878    .Case("603e",  ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
879    .Case("603ev", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
880    .Case("604",   ArchDefineName | ArchDefinePpcgr)
881    .Case("604e",  ArchDefineName | ArchDefine604 | ArchDefinePpcgr)
882    .Case("620",   ArchDefineName | ArchDefinePpcgr)
883    .Case("7400",  ArchDefineName | ArchDefinePpcgr)
884    .Case("7450",  ArchDefineName | ArchDefinePpcgr)
885    .Case("750",   ArchDefineName | ArchDefinePpcgr)
886    .Case("970",   ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr
887                     | ArchDefinePpcsq)
888    .Case("pwr6",  ArchDefinePwr6 | ArchDefinePpcgr | ArchDefinePpcsq)
889    .Case("pwr7",  ArchDefineName | ArchDefinePwr6 | ArchDefinePpcgr
890                     | ArchDefinePpcsq)
891    .Default(ArchDefineNone);
892
893  if (defs & ArchDefineName)
894    Builder.defineMacro(Twine("_ARCH_", StringRef(CPU).upper()));
895  if (defs & ArchDefinePpcgr)
896    Builder.defineMacro("_ARCH_PPCGR");
897  if (defs & ArchDefinePpcsq)
898    Builder.defineMacro("_ARCH_PPCSQ");
899  if (defs & ArchDefine440)
900    Builder.defineMacro("_ARCH_440");
901  if (defs & ArchDefine603)
902    Builder.defineMacro("_ARCH_603");
903  if (defs & ArchDefine604)
904    Builder.defineMacro("_ARCH_604");
905  if (defs & (ArchDefinePwr4 | ArchDefinePwr6))
906    Builder.defineMacro("_ARCH_PWR4");
907  if (defs & ArchDefinePwr6) {
908    Builder.defineMacro("_ARCH_PWR5");
909    Builder.defineMacro("_ARCH_PWR6");
910  }
911}
912
913bool PPCTargetInfo::hasFeature(StringRef Feature) const {
914  return Feature == "powerpc";
915}
916
917
918const char * const PPCTargetInfo::GCCRegNames[] = {
919  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
920  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
921  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
922  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
923  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
924  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
925  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
926  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
927  "mq", "lr", "ctr", "ap",
928  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
929  "xer",
930  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
931  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
932  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
933  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
934  "vrsave", "vscr",
935  "spe_acc", "spefscr",
936  "sfp"
937};
938
939void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
940                                   unsigned &NumNames) const {
941  Names = GCCRegNames;
942  NumNames = llvm::array_lengthof(GCCRegNames);
943}
944
945const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
946  // While some of these aliases do map to different registers
947  // they still share the same register name.
948  { { "0" }, "r0" },
949  { { "1"}, "r1" },
950  { { "2" }, "r2" },
951  { { "3" }, "r3" },
952  { { "4" }, "r4" },
953  { { "5" }, "r5" },
954  { { "6" }, "r6" },
955  { { "7" }, "r7" },
956  { { "8" }, "r8" },
957  { { "9" }, "r9" },
958  { { "10" }, "r10" },
959  { { "11" }, "r11" },
960  { { "12" }, "r12" },
961  { { "13" }, "r13" },
962  { { "14" }, "r14" },
963  { { "15" }, "r15" },
964  { { "16" }, "r16" },
965  { { "17" }, "r17" },
966  { { "18" }, "r18" },
967  { { "19" }, "r19" },
968  { { "20" }, "r20" },
969  { { "21" }, "r21" },
970  { { "22" }, "r22" },
971  { { "23" }, "r23" },
972  { { "24" }, "r24" },
973  { { "25" }, "r25" },
974  { { "26" }, "r26" },
975  { { "27" }, "r27" },
976  { { "28" }, "r28" },
977  { { "29" }, "r29" },
978  { { "30" }, "r30" },
979  { { "31" }, "r31" },
980  { { "fr0" }, "f0" },
981  { { "fr1" }, "f1" },
982  { { "fr2" }, "f2" },
983  { { "fr3" }, "f3" },
984  { { "fr4" }, "f4" },
985  { { "fr5" }, "f5" },
986  { { "fr6" }, "f6" },
987  { { "fr7" }, "f7" },
988  { { "fr8" }, "f8" },
989  { { "fr9" }, "f9" },
990  { { "fr10" }, "f10" },
991  { { "fr11" }, "f11" },
992  { { "fr12" }, "f12" },
993  { { "fr13" }, "f13" },
994  { { "fr14" }, "f14" },
995  { { "fr15" }, "f15" },
996  { { "fr16" }, "f16" },
997  { { "fr17" }, "f17" },
998  { { "fr18" }, "f18" },
999  { { "fr19" }, "f19" },
1000  { { "fr20" }, "f20" },
1001  { { "fr21" }, "f21" },
1002  { { "fr22" }, "f22" },
1003  { { "fr23" }, "f23" },
1004  { { "fr24" }, "f24" },
1005  { { "fr25" }, "f25" },
1006  { { "fr26" }, "f26" },
1007  { { "fr27" }, "f27" },
1008  { { "fr28" }, "f28" },
1009  { { "fr29" }, "f29" },
1010  { { "fr30" }, "f30" },
1011  { { "fr31" }, "f31" },
1012  { { "cc" }, "cr0" },
1013};
1014
1015void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1016                                     unsigned &NumAliases) const {
1017  Aliases = GCCRegAliases;
1018  NumAliases = llvm::array_lengthof(GCCRegAliases);
1019}
1020} // end anonymous namespace.
1021
1022namespace {
1023class PPC32TargetInfo : public PPCTargetInfo {
1024public:
1025  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
1026    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1027                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
1028
1029    switch (getTriple().getOS()) {
1030    case llvm::Triple::Linux:
1031    case llvm::Triple::FreeBSD:
1032    case llvm::Triple::NetBSD:
1033      SizeType = UnsignedInt;
1034      PtrDiffType = SignedInt;
1035      IntPtrType = SignedInt;
1036      break;
1037    default:
1038      break;
1039    }
1040
1041    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1042      LongDoubleWidth = LongDoubleAlign = 64;
1043      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1044    }
1045
1046    // PPC32 supports atomics up to 4 bytes.
1047    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
1048  }
1049
1050  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1051    // This is the ELF definition, and is overridden by the Darwin sub-target
1052    return TargetInfo::PowerABIBuiltinVaList;
1053  }
1054};
1055} // end anonymous namespace.
1056
1057namespace {
1058class PPC64TargetInfo : public PPCTargetInfo {
1059public:
1060  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
1061    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1062    IntMaxType = SignedLong;
1063    UIntMaxType = UnsignedLong;
1064    Int64Type = SignedLong;
1065
1066    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1067      LongDoubleWidth = LongDoubleAlign = 64;
1068      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1069      DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1070                          "i64:64:64-f32:32:32-f64:64:64-f128:64:64-"
1071                          "v128:128:128-n32:64";
1072    } else
1073      DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1074                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
1075                          "v128:128:128-n32:64";
1076
1077    // PPC64 supports atomics up to 8 bytes.
1078    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
1079  }
1080  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1081    return TargetInfo::CharPtrBuiltinVaList;
1082  }
1083};
1084} // end anonymous namespace.
1085
1086
1087namespace {
1088class DarwinPPC32TargetInfo :
1089  public DarwinTargetInfo<PPC32TargetInfo> {
1090public:
1091  DarwinPPC32TargetInfo(const std::string& triple)
1092    : DarwinTargetInfo<PPC32TargetInfo>(triple) {
1093    HasAlignMac68kSupport = true;
1094    BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
1095    LongLongAlign = 32;
1096    SuitableAlign = 128;
1097    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1098                        "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32";
1099  }
1100  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1101    return TargetInfo::CharPtrBuiltinVaList;
1102  }
1103};
1104
1105class DarwinPPC64TargetInfo :
1106  public DarwinTargetInfo<PPC64TargetInfo> {
1107public:
1108  DarwinPPC64TargetInfo(const std::string& triple)
1109    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
1110    HasAlignMac68kSupport = true;
1111    SuitableAlign = 128;
1112    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1113                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
1114  }
1115};
1116} // end anonymous namespace.
1117
1118namespace {
1119  static const unsigned NVPTXAddrSpaceMap[] = {
1120    1,    // opencl_global
1121    3,    // opencl_local
1122    4,    // opencl_constant
1123    1,    // cuda_device
1124    4,    // cuda_constant
1125    3,    // cuda_shared
1126  };
1127  class NVPTXTargetInfo : public TargetInfo {
1128    static const char * const GCCRegNames[];
1129    static const Builtin::Info BuiltinInfo[];
1130    std::vector<StringRef> AvailableFeatures;
1131  public:
1132    NVPTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
1133      BigEndian = false;
1134      TLSSupported = false;
1135      LongWidth = LongAlign = 64;
1136      AddrSpaceMap = &NVPTXAddrSpaceMap;
1137      // Define available target features
1138      // These must be defined in sorted order!
1139      NoAsmVariants = true;
1140    }
1141    virtual void getTargetDefines(const LangOptions &Opts,
1142                                  MacroBuilder &Builder) const {
1143      Builder.defineMacro("__PTX__");
1144      Builder.defineMacro("__NVPTX__");
1145    }
1146    virtual void getTargetBuiltins(const Builtin::Info *&Records,
1147                                   unsigned &NumRecords) const {
1148      Records = BuiltinInfo;
1149      NumRecords = clang::NVPTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
1150    }
1151    virtual bool hasFeature(StringRef Feature) const {
1152      return Feature == "ptx" || Feature == "nvptx";
1153    }
1154
1155    virtual void getGCCRegNames(const char * const *&Names,
1156                                unsigned &NumNames) const;
1157    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1158                                  unsigned &NumAliases) const {
1159      // No aliases.
1160      Aliases = 0;
1161      NumAliases = 0;
1162    }
1163    virtual bool validateAsmConstraint(const char *&Name,
1164                                       TargetInfo::ConstraintInfo &info) const {
1165      // FIXME: implement
1166      return true;
1167    }
1168    virtual const char *getClobbers() const {
1169      // FIXME: Is this really right?
1170      return "";
1171    }
1172    virtual BuiltinVaListKind getBuiltinVaListKind() const {
1173      // FIXME: implement
1174      return TargetInfo::CharPtrBuiltinVaList;
1175    }
1176    virtual bool setCPU(const std::string &Name) {
1177      return Name == "sm_10" || Name == "sm_13" || Name == "sm_20";
1178    }
1179    virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1180                                   StringRef Name,
1181                                   bool Enabled) const;
1182  };
1183
1184  const Builtin::Info NVPTXTargetInfo::BuiltinInfo[] = {
1185#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1186#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1187                                              ALL_LANGUAGES },
1188#include "clang/Basic/BuiltinsNVPTX.def"
1189  };
1190
1191  const char * const NVPTXTargetInfo::GCCRegNames[] = {
1192    "r0"
1193  };
1194
1195  void NVPTXTargetInfo::getGCCRegNames(const char * const *&Names,
1196                                     unsigned &NumNames) const {
1197    Names = GCCRegNames;
1198    NumNames = llvm::array_lengthof(GCCRegNames);
1199  }
1200
1201  bool NVPTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1202                                          StringRef Name,
1203                                          bool Enabled) const {
1204    if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
1205                          Name)) {
1206      Features[Name] = Enabled;
1207      return true;
1208    } else {
1209      return false;
1210    }
1211  }
1212
1213  class NVPTX32TargetInfo : public NVPTXTargetInfo {
1214  public:
1215    NVPTX32TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1216      PointerWidth = PointerAlign = 32;
1217      SizeType     = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1218      DescriptionString
1219        = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1220          "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1221          "n16:32:64";
1222  }
1223  };
1224
1225  class NVPTX64TargetInfo : public NVPTXTargetInfo {
1226  public:
1227    NVPTX64TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1228      PointerWidth = PointerAlign = 64;
1229      SizeType     = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1230      DescriptionString
1231        = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1232          "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1233          "n16:32:64";
1234  }
1235  };
1236}
1237
1238namespace {
1239
1240static const unsigned R600AddrSpaceMap[] = {
1241  1,    // opencl_global
1242  3,    // opencl_local
1243  2,    // opencl_constant
1244  1,    // cuda_device
1245  2,    // cuda_constant
1246  3     // cuda_shared
1247};
1248
1249class R600TargetInfo : public TargetInfo {
1250public:
1251  R600TargetInfo(const std::string& triple) : TargetInfo(triple) {
1252    DescriptionString =
1253          "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16"
1254          "-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:32:32"
1255          "-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64"
1256          "-v96:128:128-v128:128:128-v192:256:256-v256:256:256"
1257          "-v512:512:512-v1024:1024:1024-v2048:2048:2048"
1258          "-n8:16:32:64";
1259    AddrSpaceMap = &R600AddrSpaceMap;
1260  }
1261
1262  virtual const char * getClobbers() const {
1263    return "";
1264  }
1265
1266  virtual void getGCCRegNames(const char * const *&Names,
1267                              unsigned &numNames) const  {
1268    Names = NULL;
1269    numNames = 0;
1270  }
1271
1272  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1273                                unsigned &NumAliases) const {
1274    Aliases = NULL;
1275    NumAliases = 0;
1276  }
1277
1278  virtual bool validateAsmConstraint(const char *&Name,
1279                                     TargetInfo::ConstraintInfo &info) const {
1280    return true;
1281  }
1282
1283  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1284                                 unsigned &NumRecords) const {
1285    Records = NULL;
1286    NumRecords = 0;
1287  }
1288
1289
1290  virtual void getTargetDefines(const LangOptions &Opts,
1291                                MacroBuilder &Builder) const {
1292    Builder.defineMacro("__R600__");
1293  }
1294
1295  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1296    return TargetInfo::CharPtrBuiltinVaList;
1297  }
1298
1299};
1300
1301} // end anonymous namespace
1302
1303namespace {
1304// MBlaze abstract base class
1305class MBlazeTargetInfo : public TargetInfo {
1306  static const char * const GCCRegNames[];
1307  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1308
1309public:
1310  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1311    DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1312  }
1313
1314  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1315                                 unsigned &NumRecords) const {
1316    // FIXME: Implement.
1317    Records = 0;
1318    NumRecords = 0;
1319  }
1320
1321  virtual void getTargetDefines(const LangOptions &Opts,
1322                                MacroBuilder &Builder) const;
1323
1324  virtual bool hasFeature(StringRef Feature) const {
1325    return Feature == "mblaze";
1326  }
1327
1328  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1329    return TargetInfo::CharPtrBuiltinVaList;
1330  }
1331  virtual const char *getTargetPrefix() const {
1332    return "mblaze";
1333  }
1334  virtual void getGCCRegNames(const char * const *&Names,
1335                              unsigned &NumNames) const;
1336  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1337                                unsigned &NumAliases) const;
1338  virtual bool validateAsmConstraint(const char *&Name,
1339                                     TargetInfo::ConstraintInfo &Info) const {
1340    switch (*Name) {
1341    default: return false;
1342    case 'O': // Zero
1343      return true;
1344    case 'b': // Base register
1345    case 'f': // Floating point register
1346      Info.setAllowsRegister();
1347      return true;
1348    }
1349  }
1350  virtual const char *getClobbers() const {
1351    return "";
1352  }
1353};
1354
1355/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1356/// #defines that are not tied to a specific subtarget.
1357void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1358                                     MacroBuilder &Builder) const {
1359  // Target identification.
1360  Builder.defineMacro("__microblaze__");
1361  Builder.defineMacro("_ARCH_MICROBLAZE");
1362  Builder.defineMacro("__MICROBLAZE__");
1363
1364  // Target properties.
1365  Builder.defineMacro("_BIG_ENDIAN");
1366  Builder.defineMacro("__BIG_ENDIAN__");
1367
1368  // Subtarget options.
1369  Builder.defineMacro("__REGISTER_PREFIX__", "");
1370}
1371
1372
1373const char * const MBlazeTargetInfo::GCCRegNames[] = {
1374  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
1375  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
1376  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
1377  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
1378  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
1379  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1380  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1381  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1382  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1383  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
1384};
1385
1386void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1387                                   unsigned &NumNames) const {
1388  Names = GCCRegNames;
1389  NumNames = llvm::array_lengthof(GCCRegNames);
1390}
1391
1392const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1393  { {"f0"},  "r0" },
1394  { {"f1"},  "r1" },
1395  { {"f2"},  "r2" },
1396  { {"f3"},  "r3" },
1397  { {"f4"},  "r4" },
1398  { {"f5"},  "r5" },
1399  { {"f6"},  "r6" },
1400  { {"f7"},  "r7" },
1401  { {"f8"},  "r8" },
1402  { {"f9"},  "r9" },
1403  { {"f10"}, "r10" },
1404  { {"f11"}, "r11" },
1405  { {"f12"}, "r12" },
1406  { {"f13"}, "r13" },
1407  { {"f14"}, "r14" },
1408  { {"f15"}, "r15" },
1409  { {"f16"}, "r16" },
1410  { {"f17"}, "r17" },
1411  { {"f18"}, "r18" },
1412  { {"f19"}, "r19" },
1413  { {"f20"}, "r20" },
1414  { {"f21"}, "r21" },
1415  { {"f22"}, "r22" },
1416  { {"f23"}, "r23" },
1417  { {"f24"}, "r24" },
1418  { {"f25"}, "r25" },
1419  { {"f26"}, "r26" },
1420  { {"f27"}, "r27" },
1421  { {"f28"}, "r28" },
1422  { {"f29"}, "r29" },
1423  { {"f30"}, "r30" },
1424  { {"f31"}, "r31" },
1425};
1426
1427void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1428                                     unsigned &NumAliases) const {
1429  Aliases = GCCRegAliases;
1430  NumAliases = llvm::array_lengthof(GCCRegAliases);
1431}
1432} // end anonymous namespace.
1433
1434namespace {
1435// Namespace for x86 abstract base class
1436const Builtin::Info BuiltinInfo[] = {
1437#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1438#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1439                                              ALL_LANGUAGES },
1440#include "clang/Basic/BuiltinsX86.def"
1441};
1442
1443static const char* const GCCRegNames[] = {
1444  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1445  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1446  "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1447  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1448  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1449  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1450  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1451  "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1452  "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1453};
1454
1455const TargetInfo::AddlRegName AddlRegNames[] = {
1456  { { "al", "ah", "eax", "rax" }, 0 },
1457  { { "bl", "bh", "ebx", "rbx" }, 3 },
1458  { { "cl", "ch", "ecx", "rcx" }, 2 },
1459  { { "dl", "dh", "edx", "rdx" }, 1 },
1460  { { "esi", "rsi" }, 4 },
1461  { { "edi", "rdi" }, 5 },
1462  { { "esp", "rsp" }, 7 },
1463  { { "ebp", "rbp" }, 6 },
1464};
1465
1466// X86 target abstract base class; x86-32 and x86-64 are very close, so
1467// most of the implementation can be shared.
1468class X86TargetInfo : public TargetInfo {
1469  enum X86SSEEnum {
1470    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1471  } SSELevel;
1472  enum MMX3DNowEnum {
1473    NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1474  } MMX3DNowLevel;
1475
1476  bool HasAES;
1477  bool HasPCLMUL;
1478  bool HasLZCNT;
1479  bool HasRDRND;
1480  bool HasBMI;
1481  bool HasBMI2;
1482  bool HasPOPCNT;
1483  bool HasRTM;
1484  bool HasSSE4a;
1485  bool HasFMA4;
1486  bool HasFMA;
1487  bool HasXOP;
1488  bool HasF16C;
1489
1490  /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1491  ///
1492  /// Each enumeration represents a particular CPU supported by Clang. These
1493  /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1494  enum CPUKind {
1495    CK_Generic,
1496
1497    /// \name i386
1498    /// i386-generation processors.
1499    //@{
1500    CK_i386,
1501    //@}
1502
1503    /// \name i486
1504    /// i486-generation processors.
1505    //@{
1506    CK_i486,
1507    CK_WinChipC6,
1508    CK_WinChip2,
1509    CK_C3,
1510    //@}
1511
1512    /// \name i586
1513    /// i586-generation processors, P5 microarchitecture based.
1514    //@{
1515    CK_i586,
1516    CK_Pentium,
1517    CK_PentiumMMX,
1518    //@}
1519
1520    /// \name i686
1521    /// i686-generation processors, P6 / Pentium M microarchitecture based.
1522    //@{
1523    CK_i686,
1524    CK_PentiumPro,
1525    CK_Pentium2,
1526    CK_Pentium3,
1527    CK_Pentium3M,
1528    CK_PentiumM,
1529    CK_C3_2,
1530
1531    /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1532    /// Clang however has some logic to suport this.
1533    // FIXME: Warn, deprecate, and potentially remove this.
1534    CK_Yonah,
1535    //@}
1536
1537    /// \name Netburst
1538    /// Netburst microarchitecture based processors.
1539    //@{
1540    CK_Pentium4,
1541    CK_Pentium4M,
1542    CK_Prescott,
1543    CK_Nocona,
1544    //@}
1545
1546    /// \name Core
1547    /// Core microarchitecture based processors.
1548    //@{
1549    CK_Core2,
1550
1551    /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1552    /// codename which GCC no longer accepts as an option to -march, but Clang
1553    /// has some logic for recognizing it.
1554    // FIXME: Warn, deprecate, and potentially remove this.
1555    CK_Penryn,
1556    //@}
1557
1558    /// \name Atom
1559    /// Atom processors
1560    //@{
1561    CK_Atom,
1562    //@}
1563
1564    /// \name Nehalem
1565    /// Nehalem microarchitecture based processors.
1566    //@{
1567    CK_Corei7,
1568    CK_Corei7AVX,
1569    CK_CoreAVXi,
1570    CK_CoreAVX2,
1571    //@}
1572
1573    /// \name K6
1574    /// K6 architecture processors.
1575    //@{
1576    CK_K6,
1577    CK_K6_2,
1578    CK_K6_3,
1579    //@}
1580
1581    /// \name K7
1582    /// K7 architecture processors.
1583    //@{
1584    CK_Athlon,
1585    CK_AthlonThunderbird,
1586    CK_Athlon4,
1587    CK_AthlonXP,
1588    CK_AthlonMP,
1589    //@}
1590
1591    /// \name K8
1592    /// K8 architecture processors.
1593    //@{
1594    CK_Athlon64,
1595    CK_Athlon64SSE3,
1596    CK_AthlonFX,
1597    CK_K8,
1598    CK_K8SSE3,
1599    CK_Opteron,
1600    CK_OpteronSSE3,
1601    CK_AMDFAM10,
1602    //@}
1603
1604    /// \name Bobcat
1605    /// Bobcat architecture processors.
1606    //@{
1607    CK_BTVER1,
1608    //@}
1609
1610    /// \name Bulldozer
1611    /// Bulldozer architecture processors.
1612    //@{
1613    CK_BDVER1,
1614    CK_BDVER2,
1615    //@}
1616
1617    /// This specification is deprecated and will be removed in the future.
1618    /// Users should prefer \see CK_K8.
1619    // FIXME: Warn on this when the CPU is set to it.
1620    CK_x86_64,
1621    //@}
1622
1623    /// \name Geode
1624    /// Geode processors.
1625    //@{
1626    CK_Geode
1627    //@}
1628  } CPU;
1629
1630public:
1631  X86TargetInfo(const std::string& triple)
1632    : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1633      HasAES(false), HasPCLMUL(false), HasLZCNT(false), HasRDRND(false),
1634      HasBMI(false), HasBMI2(false), HasPOPCNT(false), HasRTM(false),
1635      HasSSE4a(false), HasFMA4(false), HasFMA(false), HasXOP(false),
1636      HasF16C(false), CPU(CK_Generic) {
1637    BigEndian = false;
1638    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1639  }
1640  virtual unsigned getFloatEvalMethod() const {
1641    // X87 evaluates with 80 bits "long double" precision.
1642    return SSELevel == NoSSE ? 2 : 0;
1643  }
1644  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1645                                 unsigned &NumRecords) const {
1646    Records = BuiltinInfo;
1647    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1648  }
1649  virtual void getGCCRegNames(const char * const *&Names,
1650                              unsigned &NumNames) const {
1651    Names = GCCRegNames;
1652    NumNames = llvm::array_lengthof(GCCRegNames);
1653  }
1654  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1655                                unsigned &NumAliases) const {
1656    Aliases = 0;
1657    NumAliases = 0;
1658  }
1659  virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1660                                  unsigned &NumNames) const {
1661    Names = AddlRegNames;
1662    NumNames = llvm::array_lengthof(AddlRegNames);
1663  }
1664  virtual bool validateAsmConstraint(const char *&Name,
1665                                     TargetInfo::ConstraintInfo &info) const;
1666  virtual std::string convertConstraint(const char *&Constraint) const;
1667  virtual const char *getClobbers() const {
1668    return "~{dirflag},~{fpsr},~{flags}";
1669  }
1670  virtual void getTargetDefines(const LangOptions &Opts,
1671                                MacroBuilder &Builder) const;
1672  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1673                                 StringRef Name,
1674                                 bool Enabled) const;
1675  virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1676  virtual bool hasFeature(StringRef Feature) const;
1677  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1678  virtual const char* getABI() const {
1679    if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
1680      return "avx";
1681    else if (getTriple().getArch() == llvm::Triple::x86 &&
1682             MMX3DNowLevel == NoMMX3DNow)
1683      return "no-mmx";
1684    return "";
1685  }
1686  virtual bool setCPU(const std::string &Name) {
1687    CPU = llvm::StringSwitch<CPUKind>(Name)
1688      .Case("i386", CK_i386)
1689      .Case("i486", CK_i486)
1690      .Case("winchip-c6", CK_WinChipC6)
1691      .Case("winchip2", CK_WinChip2)
1692      .Case("c3", CK_C3)
1693      .Case("i586", CK_i586)
1694      .Case("pentium", CK_Pentium)
1695      .Case("pentium-mmx", CK_PentiumMMX)
1696      .Case("i686", CK_i686)
1697      .Case("pentiumpro", CK_PentiumPro)
1698      .Case("pentium2", CK_Pentium2)
1699      .Case("pentium3", CK_Pentium3)
1700      .Case("pentium3m", CK_Pentium3M)
1701      .Case("pentium-m", CK_PentiumM)
1702      .Case("c3-2", CK_C3_2)
1703      .Case("yonah", CK_Yonah)
1704      .Case("pentium4", CK_Pentium4)
1705      .Case("pentium4m", CK_Pentium4M)
1706      .Case("prescott", CK_Prescott)
1707      .Case("nocona", CK_Nocona)
1708      .Case("core2", CK_Core2)
1709      .Case("penryn", CK_Penryn)
1710      .Case("atom", CK_Atom)
1711      .Case("corei7", CK_Corei7)
1712      .Case("corei7-avx", CK_Corei7AVX)
1713      .Case("core-avx-i", CK_CoreAVXi)
1714      .Case("core-avx2", CK_CoreAVX2)
1715      .Case("k6", CK_K6)
1716      .Case("k6-2", CK_K6_2)
1717      .Case("k6-3", CK_K6_3)
1718      .Case("athlon", CK_Athlon)
1719      .Case("athlon-tbird", CK_AthlonThunderbird)
1720      .Case("athlon-4", CK_Athlon4)
1721      .Case("athlon-xp", CK_AthlonXP)
1722      .Case("athlon-mp", CK_AthlonMP)
1723      .Case("athlon64", CK_Athlon64)
1724      .Case("athlon64-sse3", CK_Athlon64SSE3)
1725      .Case("athlon-fx", CK_AthlonFX)
1726      .Case("k8", CK_K8)
1727      .Case("k8-sse3", CK_K8SSE3)
1728      .Case("opteron", CK_Opteron)
1729      .Case("opteron-sse3", CK_OpteronSSE3)
1730      .Case("amdfam10", CK_AMDFAM10)
1731      .Case("btver1", CK_BTVER1)
1732      .Case("bdver1", CK_BDVER1)
1733      .Case("bdver2", CK_BDVER2)
1734      .Case("x86-64", CK_x86_64)
1735      .Case("geode", CK_Geode)
1736      .Default(CK_Generic);
1737
1738    // Perform any per-CPU checks necessary to determine if this CPU is
1739    // acceptable.
1740    // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1741    // invalid without explaining *why*.
1742    switch (CPU) {
1743    case CK_Generic:
1744      // No processor selected!
1745      return false;
1746
1747    case CK_i386:
1748    case CK_i486:
1749    case CK_WinChipC6:
1750    case CK_WinChip2:
1751    case CK_C3:
1752    case CK_i586:
1753    case CK_Pentium:
1754    case CK_PentiumMMX:
1755    case CK_i686:
1756    case CK_PentiumPro:
1757    case CK_Pentium2:
1758    case CK_Pentium3:
1759    case CK_Pentium3M:
1760    case CK_PentiumM:
1761    case CK_Yonah:
1762    case CK_C3_2:
1763    case CK_Pentium4:
1764    case CK_Pentium4M:
1765    case CK_Prescott:
1766    case CK_K6:
1767    case CK_K6_2:
1768    case CK_K6_3:
1769    case CK_Athlon:
1770    case CK_AthlonThunderbird:
1771    case CK_Athlon4:
1772    case CK_AthlonXP:
1773    case CK_AthlonMP:
1774    case CK_Geode:
1775      // Only accept certain architectures when compiling in 32-bit mode.
1776      if (getTriple().getArch() != llvm::Triple::x86)
1777        return false;
1778
1779      // Fallthrough
1780    case CK_Nocona:
1781    case CK_Core2:
1782    case CK_Penryn:
1783    case CK_Atom:
1784    case CK_Corei7:
1785    case CK_Corei7AVX:
1786    case CK_CoreAVXi:
1787    case CK_CoreAVX2:
1788    case CK_Athlon64:
1789    case CK_Athlon64SSE3:
1790    case CK_AthlonFX:
1791    case CK_K8:
1792    case CK_K8SSE3:
1793    case CK_Opteron:
1794    case CK_OpteronSSE3:
1795    case CK_AMDFAM10:
1796    case CK_BTVER1:
1797    case CK_BDVER1:
1798    case CK_BDVER2:
1799    case CK_x86_64:
1800      return true;
1801    }
1802    llvm_unreachable("Unhandled CPU kind");
1803  }
1804
1805  virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
1806    // We accept all non-ARM calling conventions
1807    return (CC == CC_X86ThisCall ||
1808            CC == CC_X86FastCall ||
1809            CC == CC_X86StdCall ||
1810            CC == CC_C ||
1811            CC == CC_X86Pascal ||
1812            CC == CC_IntelOclBicc) ? CCCR_OK : CCCR_Warning;
1813  }
1814
1815  virtual CallingConv getDefaultCallingConv(CallingConvMethodType MT) const {
1816    return MT == CCMT_Member ? CC_X86ThisCall : CC_C;
1817  }
1818};
1819
1820void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1821  // FIXME: This should not be here.
1822  Features["3dnow"] = false;
1823  Features["3dnowa"] = false;
1824  Features["mmx"] = false;
1825  Features["sse"] = false;
1826  Features["sse2"] = false;
1827  Features["sse3"] = false;
1828  Features["ssse3"] = false;
1829  Features["sse41"] = false;
1830  Features["sse42"] = false;
1831  Features["sse4a"] = false;
1832  Features["aes"] = false;
1833  Features["pclmul"] = false;
1834  Features["avx"] = false;
1835  Features["avx2"] = false;
1836  Features["lzcnt"] = false;
1837  Features["rdrand"] = false;
1838  Features["bmi"] = false;
1839  Features["bmi2"] = false;
1840  Features["popcnt"] = false;
1841  Features["rtm"] = false;
1842  Features["fma4"] = false;
1843  Features["fma"] = false;
1844  Features["xop"] = false;
1845  Features["f16c"] = false;
1846
1847  // FIXME: This *really* should not be here.
1848
1849  // X86_64 always has SSE2.
1850  if (getTriple().getArch() == llvm::Triple::x86_64)
1851    setFeatureEnabled(Features, "sse2", true);
1852
1853  switch (CPU) {
1854  case CK_Generic:
1855  case CK_i386:
1856  case CK_i486:
1857  case CK_i586:
1858  case CK_Pentium:
1859  case CK_i686:
1860  case CK_PentiumPro:
1861    break;
1862  case CK_PentiumMMX:
1863  case CK_Pentium2:
1864    setFeatureEnabled(Features, "mmx", true);
1865    break;
1866  case CK_Pentium3:
1867  case CK_Pentium3M:
1868    setFeatureEnabled(Features, "sse", true);
1869    break;
1870  case CK_PentiumM:
1871  case CK_Pentium4:
1872  case CK_Pentium4M:
1873  case CK_x86_64:
1874    setFeatureEnabled(Features, "sse2", true);
1875    break;
1876  case CK_Yonah:
1877  case CK_Prescott:
1878  case CK_Nocona:
1879    setFeatureEnabled(Features, "sse3", true);
1880    break;
1881  case CK_Core2:
1882    setFeatureEnabled(Features, "ssse3", true);
1883    break;
1884  case CK_Penryn:
1885    setFeatureEnabled(Features, "sse4.1", true);
1886    break;
1887  case CK_Atom:
1888    setFeatureEnabled(Features, "ssse3", true);
1889    break;
1890  case CK_Corei7:
1891    setFeatureEnabled(Features, "sse4", true);
1892    break;
1893  case CK_Corei7AVX:
1894    setFeatureEnabled(Features, "avx", true);
1895    setFeatureEnabled(Features, "aes", true);
1896    setFeatureEnabled(Features, "pclmul", true);
1897    break;
1898  case CK_CoreAVXi:
1899    setFeatureEnabled(Features, "avx", true);
1900    setFeatureEnabled(Features, "aes", true);
1901    setFeatureEnabled(Features, "pclmul", true);
1902    setFeatureEnabled(Features, "rdrnd", true);
1903    setFeatureEnabled(Features, "f16c", true);
1904    break;
1905  case CK_CoreAVX2:
1906    setFeatureEnabled(Features, "avx2", true);
1907    setFeatureEnabled(Features, "aes", true);
1908    setFeatureEnabled(Features, "pclmul", true);
1909    setFeatureEnabled(Features, "lzcnt", true);
1910    setFeatureEnabled(Features, "rdrnd", true);
1911    setFeatureEnabled(Features, "f16c", true);
1912    setFeatureEnabled(Features, "bmi", true);
1913    setFeatureEnabled(Features, "bmi2", true);
1914    setFeatureEnabled(Features, "rtm", true);
1915    setFeatureEnabled(Features, "fma", true);
1916    break;
1917  case CK_K6:
1918  case CK_WinChipC6:
1919    setFeatureEnabled(Features, "mmx", true);
1920    break;
1921  case CK_K6_2:
1922  case CK_K6_3:
1923  case CK_WinChip2:
1924  case CK_C3:
1925    setFeatureEnabled(Features, "3dnow", true);
1926    break;
1927  case CK_Athlon:
1928  case CK_AthlonThunderbird:
1929  case CK_Geode:
1930    setFeatureEnabled(Features, "3dnowa", true);
1931    break;
1932  case CK_Athlon4:
1933  case CK_AthlonXP:
1934  case CK_AthlonMP:
1935    setFeatureEnabled(Features, "sse", true);
1936    setFeatureEnabled(Features, "3dnowa", true);
1937    break;
1938  case CK_K8:
1939  case CK_Opteron:
1940  case CK_Athlon64:
1941  case CK_AthlonFX:
1942    setFeatureEnabled(Features, "sse2", true);
1943    setFeatureEnabled(Features, "3dnowa", true);
1944    break;
1945  case CK_K8SSE3:
1946  case CK_OpteronSSE3:
1947  case CK_Athlon64SSE3:
1948    setFeatureEnabled(Features, "sse3", true);
1949    setFeatureEnabled(Features, "3dnowa", true);
1950    break;
1951  case CK_AMDFAM10:
1952    setFeatureEnabled(Features, "sse3", true);
1953    setFeatureEnabled(Features, "sse4a", true);
1954    setFeatureEnabled(Features, "3dnowa", true);
1955    setFeatureEnabled(Features, "lzcnt", true);
1956    setFeatureEnabled(Features, "popcnt", true);
1957    break;
1958  case CK_BTVER1:
1959    setFeatureEnabled(Features, "ssse3", true);
1960    setFeatureEnabled(Features, "sse4a", true);
1961    setFeatureEnabled(Features, "lzcnt", true);
1962    setFeatureEnabled(Features, "popcnt", true);
1963    break;
1964  case CK_BDVER1:
1965    setFeatureEnabled(Features, "xop", true);
1966    setFeatureEnabled(Features, "lzcnt", true);
1967    setFeatureEnabled(Features, "aes", true);
1968    setFeatureEnabled(Features, "pclmul", true);
1969    break;
1970  case CK_BDVER2:
1971    setFeatureEnabled(Features, "xop", true);
1972    setFeatureEnabled(Features, "lzcnt", true);
1973    setFeatureEnabled(Features, "aes", true);
1974    setFeatureEnabled(Features, "pclmul", true);
1975    setFeatureEnabled(Features, "bmi", true);
1976    setFeatureEnabled(Features, "fma", true);
1977    setFeatureEnabled(Features, "f16c", true);
1978    break;
1979  case CK_C3_2:
1980    setFeatureEnabled(Features, "sse", true);
1981    break;
1982  }
1983}
1984
1985bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1986                                      StringRef Name,
1987                                      bool Enabled) const {
1988  // FIXME: This *really* should not be here.  We need some way of translating
1989  // options into llvm subtarget features.
1990  if (!Features.count(Name) &&
1991      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1" &&
1992       Name != "rdrnd"))
1993    return false;
1994
1995  // FIXME: this should probably use a switch with fall through.
1996
1997  if (Enabled) {
1998    if (Name == "mmx")
1999      Features["mmx"] = true;
2000    else if (Name == "sse")
2001      Features["mmx"] = Features["sse"] = true;
2002    else if (Name == "sse2")
2003      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
2004    else if (Name == "sse3")
2005      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2006        true;
2007    else if (Name == "ssse3")
2008      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2009        Features["ssse3"] = true;
2010    else if (Name == "sse4" || Name == "sse4.2")
2011      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2012        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2013        Features["popcnt"] = true;
2014    else if (Name == "sse4.1")
2015      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2016        Features["ssse3"] = Features["sse41"] = true;
2017    else if (Name == "3dnow")
2018      Features["mmx"] = Features["3dnow"] = true;
2019    else if (Name == "3dnowa")
2020      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
2021    else if (Name == "aes")
2022      Features["sse"] = Features["sse2"] = Features["aes"] = true;
2023    else if (Name == "pclmul")
2024      Features["sse"] = Features["sse2"] = Features["pclmul"] = true;
2025    else if (Name == "avx")
2026      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2027        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2028        Features["popcnt"] = Features["avx"] = true;
2029    else if (Name == "avx2")
2030      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2031        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2032        Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
2033    else if (Name == "fma")
2034      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2035        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2036        Features["popcnt"] = Features["avx"] = Features["fma"] = true;
2037    else if (Name == "fma4")
2038      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2039        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2040        Features["popcnt"] = Features["avx"] = Features["sse4a"] =
2041        Features["fma4"] = true;
2042    else if (Name == "xop")
2043      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2044        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2045        Features["popcnt"] = Features["avx"] = Features["sse4a"] =
2046        Features["fma4"] = Features["xop"] = true;
2047    else if (Name == "sse4a")
2048      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2049        Features["sse4a"] = true;
2050    else if (Name == "lzcnt")
2051      Features["lzcnt"] = true;
2052    else if (Name == "rdrnd")
2053      Features["rdrand"] = true;
2054    else if (Name == "bmi")
2055      Features["bmi"] = true;
2056    else if (Name == "bmi2")
2057      Features["bmi2"] = true;
2058    else if (Name == "popcnt")
2059      Features["popcnt"] = true;
2060    else if (Name == "f16c")
2061      Features["f16c"] = true;
2062    else if (Name == "rtm")
2063      Features["rtm"] = true;
2064  } else {
2065    if (Name == "mmx")
2066      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
2067    else if (Name == "sse")
2068      Features["sse"] = Features["sse2"] = Features["sse3"] =
2069        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2070        Features["sse4a"] = Features["avx"] = Features["avx2"] =
2071        Features["fma"] = Features["fma4"] = Features["aes"] =
2072        Features["pclmul"] = Features["xop"] = false;
2073    else if (Name == "sse2")
2074      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
2075        Features["sse41"] = Features["sse42"] = Features["sse4a"] =
2076        Features["avx"] = Features["avx2"] = Features["fma"] =
2077        Features["fma4"] = Features["aes"] = Features["pclmul"] =
2078        Features["xop"] = false;
2079    else if (Name == "sse3")
2080      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
2081        Features["sse42"] = Features["sse4a"] = Features["avx"] =
2082        Features["avx2"] = Features["fma"] = Features["fma4"] =
2083        Features["xop"] = false;
2084    else if (Name == "ssse3")
2085      Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2086        Features["avx"] = Features["avx2"] = Features["fma"] = false;
2087    else if (Name == "sse4" || Name == "sse4.1")
2088      Features["sse41"] = Features["sse42"] = Features["avx"] =
2089        Features["avx2"] = Features["fma"] = false;
2090    else if (Name == "sse4.2")
2091      Features["sse42"] = Features["avx"] = Features["avx2"] =
2092        Features["fma"] = false;
2093    else if (Name == "3dnow")
2094      Features["3dnow"] = Features["3dnowa"] = false;
2095    else if (Name == "3dnowa")
2096      Features["3dnowa"] = false;
2097    else if (Name == "aes")
2098      Features["aes"] = false;
2099    else if (Name == "pclmul")
2100      Features["pclmul"] = false;
2101    else if (Name == "avx")
2102      Features["avx"] = Features["avx2"] = Features["fma"] =
2103        Features["fma4"] = Features["xop"] = false;
2104    else if (Name == "avx2")
2105      Features["avx2"] = false;
2106    else if (Name == "fma")
2107      Features["fma"] = false;
2108    else if (Name == "sse4a")
2109      Features["sse4a"] = Features["fma4"] = Features["xop"] = false;
2110    else if (Name == "lzcnt")
2111      Features["lzcnt"] = false;
2112    else if (Name == "rdrnd")
2113      Features["rdrand"] = false;
2114    else if (Name == "bmi")
2115      Features["bmi"] = false;
2116    else if (Name == "bmi2")
2117      Features["bmi2"] = false;
2118    else if (Name == "popcnt")
2119      Features["popcnt"] = false;
2120    else if (Name == "fma4")
2121      Features["fma4"] = Features["xop"] = false;
2122    else if (Name == "xop")
2123      Features["xop"] = false;
2124    else if (Name == "f16c")
2125      Features["f16c"] = false;
2126    else if (Name == "rtm")
2127      Features["rtm"] = false;
2128  }
2129
2130  return true;
2131}
2132
2133/// HandleTargetOptions - Perform initialization based on the user
2134/// configured set of features.
2135void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
2136  // Remember the maximum enabled sselevel.
2137  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
2138    // Ignore disabled features.
2139    if (Features[i][0] == '-')
2140      continue;
2141
2142    StringRef Feature = StringRef(Features[i]).substr(1);
2143
2144    if (Feature == "aes") {
2145      HasAES = true;
2146      continue;
2147    }
2148
2149    if (Feature == "pclmul") {
2150      HasPCLMUL = true;
2151      continue;
2152    }
2153
2154    if (Feature == "lzcnt") {
2155      HasLZCNT = true;
2156      continue;
2157    }
2158
2159    if (Feature == "rdrand") {
2160      HasRDRND = true;
2161      continue;
2162    }
2163
2164    if (Feature == "bmi") {
2165      HasBMI = true;
2166      continue;
2167    }
2168
2169    if (Feature == "bmi2") {
2170      HasBMI2 = true;
2171      continue;
2172    }
2173
2174    if (Feature == "popcnt") {
2175      HasPOPCNT = true;
2176      continue;
2177    }
2178
2179    if (Feature == "rtm") {
2180      HasRTM = true;
2181      continue;
2182    }
2183
2184    if (Feature == "sse4a") {
2185      HasSSE4a = true;
2186      continue;
2187    }
2188
2189    if (Feature == "fma4") {
2190      HasFMA4 = true;
2191      continue;
2192    }
2193
2194    if (Feature == "fma") {
2195      HasFMA = true;
2196      continue;
2197    }
2198
2199    if (Feature == "xop") {
2200      HasXOP = true;
2201      continue;
2202    }
2203
2204    if (Feature == "f16c") {
2205      HasF16C = true;
2206      continue;
2207    }
2208
2209    assert(Features[i][0] == '+' && "Invalid target feature!");
2210    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
2211      .Case("avx2", AVX2)
2212      .Case("avx", AVX)
2213      .Case("sse42", SSE42)
2214      .Case("sse41", SSE41)
2215      .Case("ssse3", SSSE3)
2216      .Case("sse3", SSE3)
2217      .Case("sse2", SSE2)
2218      .Case("sse", SSE1)
2219      .Default(NoSSE);
2220    SSELevel = std::max(SSELevel, Level);
2221
2222    MMX3DNowEnum ThreeDNowLevel =
2223      llvm::StringSwitch<MMX3DNowEnum>(Feature)
2224        .Case("3dnowa", AMD3DNowAthlon)
2225        .Case("3dnow", AMD3DNow)
2226        .Case("mmx", MMX)
2227        .Default(NoMMX3DNow);
2228
2229    MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
2230  }
2231
2232  // Don't tell the backend if we're turning off mmx; it will end up disabling
2233  // SSE, which we don't want.
2234  std::vector<std::string>::iterator it;
2235  it = std::find(Features.begin(), Features.end(), "-mmx");
2236  if (it != Features.end())
2237    Features.erase(it);
2238}
2239
2240/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
2241/// definitions for this particular subtarget.
2242void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
2243                                     MacroBuilder &Builder) const {
2244  // Target identification.
2245  if (getTriple().getArch() == llvm::Triple::x86_64) {
2246    Builder.defineMacro("__amd64__");
2247    Builder.defineMacro("__amd64");
2248    Builder.defineMacro("__x86_64");
2249    Builder.defineMacro("__x86_64__");
2250  } else {
2251    DefineStd(Builder, "i386", Opts);
2252  }
2253
2254  // Subtarget options.
2255  // FIXME: We are hard-coding the tune parameters based on the CPU, but they
2256  // truly should be based on -mtune options.
2257  switch (CPU) {
2258  case CK_Generic:
2259    break;
2260  case CK_i386:
2261    // The rest are coming from the i386 define above.
2262    Builder.defineMacro("__tune_i386__");
2263    break;
2264  case CK_i486:
2265  case CK_WinChipC6:
2266  case CK_WinChip2:
2267  case CK_C3:
2268    defineCPUMacros(Builder, "i486");
2269    break;
2270  case CK_PentiumMMX:
2271    Builder.defineMacro("__pentium_mmx__");
2272    Builder.defineMacro("__tune_pentium_mmx__");
2273    // Fallthrough
2274  case CK_i586:
2275  case CK_Pentium:
2276    defineCPUMacros(Builder, "i586");
2277    defineCPUMacros(Builder, "pentium");
2278    break;
2279  case CK_Pentium3:
2280  case CK_Pentium3M:
2281  case CK_PentiumM:
2282    Builder.defineMacro("__tune_pentium3__");
2283    // Fallthrough
2284  case CK_Pentium2:
2285  case CK_C3_2:
2286    Builder.defineMacro("__tune_pentium2__");
2287    // Fallthrough
2288  case CK_PentiumPro:
2289    Builder.defineMacro("__tune_i686__");
2290    Builder.defineMacro("__tune_pentiumpro__");
2291    // Fallthrough
2292  case CK_i686:
2293    Builder.defineMacro("__i686");
2294    Builder.defineMacro("__i686__");
2295    // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
2296    Builder.defineMacro("__pentiumpro");
2297    Builder.defineMacro("__pentiumpro__");
2298    break;
2299  case CK_Pentium4:
2300  case CK_Pentium4M:
2301    defineCPUMacros(Builder, "pentium4");
2302    break;
2303  case CK_Yonah:
2304  case CK_Prescott:
2305  case CK_Nocona:
2306    defineCPUMacros(Builder, "nocona");
2307    break;
2308  case CK_Core2:
2309  case CK_Penryn:
2310    defineCPUMacros(Builder, "core2");
2311    break;
2312  case CK_Atom:
2313    defineCPUMacros(Builder, "atom");
2314    break;
2315  case CK_Corei7:
2316  case CK_Corei7AVX:
2317  case CK_CoreAVXi:
2318  case CK_CoreAVX2:
2319    defineCPUMacros(Builder, "corei7");
2320    break;
2321  case CK_K6_2:
2322    Builder.defineMacro("__k6_2__");
2323    Builder.defineMacro("__tune_k6_2__");
2324    // Fallthrough
2325  case CK_K6_3:
2326    if (CPU != CK_K6_2) {  // In case of fallthrough
2327      // FIXME: GCC may be enabling these in cases where some other k6
2328      // architecture is specified but -m3dnow is explicitly provided. The
2329      // exact semantics need to be determined and emulated here.
2330      Builder.defineMacro("__k6_3__");
2331      Builder.defineMacro("__tune_k6_3__");
2332    }
2333    // Fallthrough
2334  case CK_K6:
2335    defineCPUMacros(Builder, "k6");
2336    break;
2337  case CK_Athlon:
2338  case CK_AthlonThunderbird:
2339  case CK_Athlon4:
2340  case CK_AthlonXP:
2341  case CK_AthlonMP:
2342    defineCPUMacros(Builder, "athlon");
2343    if (SSELevel != NoSSE) {
2344      Builder.defineMacro("__athlon_sse__");
2345      Builder.defineMacro("__tune_athlon_sse__");
2346    }
2347    break;
2348  case CK_K8:
2349  case CK_K8SSE3:
2350  case CK_x86_64:
2351  case CK_Opteron:
2352  case CK_OpteronSSE3:
2353  case CK_Athlon64:
2354  case CK_Athlon64SSE3:
2355  case CK_AthlonFX:
2356    defineCPUMacros(Builder, "k8");
2357    break;
2358  case CK_AMDFAM10:
2359    defineCPUMacros(Builder, "amdfam10");
2360    break;
2361  case CK_BTVER1:
2362    defineCPUMacros(Builder, "btver1");
2363    break;
2364  case CK_BDVER1:
2365    defineCPUMacros(Builder, "bdver1");
2366    break;
2367  case CK_BDVER2:
2368    defineCPUMacros(Builder, "bdver2");
2369    break;
2370  case CK_Geode:
2371    defineCPUMacros(Builder, "geode");
2372    break;
2373  }
2374
2375  // Target properties.
2376  Builder.defineMacro("__LITTLE_ENDIAN__");
2377  Builder.defineMacro("__REGISTER_PREFIX__", "");
2378
2379  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
2380  // functions in glibc header files that use FP Stack inline asm which the
2381  // backend can't deal with (PR879).
2382  Builder.defineMacro("__NO_MATH_INLINES");
2383
2384  if (HasAES)
2385    Builder.defineMacro("__AES__");
2386
2387  if (HasPCLMUL)
2388    Builder.defineMacro("__PCLMUL__");
2389
2390  if (HasLZCNT)
2391    Builder.defineMacro("__LZCNT__");
2392
2393  if (HasRDRND)
2394    Builder.defineMacro("__RDRND__");
2395
2396  if (HasBMI)
2397    Builder.defineMacro("__BMI__");
2398
2399  if (HasBMI2)
2400    Builder.defineMacro("__BMI2__");
2401
2402  if (HasPOPCNT)
2403    Builder.defineMacro("__POPCNT__");
2404
2405  if (HasRTM)
2406    Builder.defineMacro("__RTM__");
2407
2408  if (HasSSE4a)
2409    Builder.defineMacro("__SSE4A__");
2410
2411  if (HasFMA4)
2412    Builder.defineMacro("__FMA4__");
2413
2414  if (HasFMA)
2415    Builder.defineMacro("__FMA__");
2416
2417  if (HasXOP)
2418    Builder.defineMacro("__XOP__");
2419
2420  if (HasF16C)
2421    Builder.defineMacro("__F16C__");
2422
2423  // Each case falls through to the previous one here.
2424  switch (SSELevel) {
2425  case AVX2:
2426    Builder.defineMacro("__AVX2__");
2427  case AVX:
2428    Builder.defineMacro("__AVX__");
2429  case SSE42:
2430    Builder.defineMacro("__SSE4_2__");
2431  case SSE41:
2432    Builder.defineMacro("__SSE4_1__");
2433  case SSSE3:
2434    Builder.defineMacro("__SSSE3__");
2435  case SSE3:
2436    Builder.defineMacro("__SSE3__");
2437  case SSE2:
2438    Builder.defineMacro("__SSE2__");
2439    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
2440  case SSE1:
2441    Builder.defineMacro("__SSE__");
2442    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
2443  case NoSSE:
2444    break;
2445  }
2446
2447  if (Opts.MicrosoftExt && getTriple().getArch() == llvm::Triple::x86) {
2448    switch (SSELevel) {
2449    case AVX2:
2450    case AVX:
2451    case SSE42:
2452    case SSE41:
2453    case SSSE3:
2454    case SSE3:
2455    case SSE2:
2456      Builder.defineMacro("_M_IX86_FP", Twine(2));
2457      break;
2458    case SSE1:
2459      Builder.defineMacro("_M_IX86_FP", Twine(1));
2460      break;
2461    default:
2462      Builder.defineMacro("_M_IX86_FP", Twine(0));
2463    }
2464  }
2465
2466  // Each case falls through to the previous one here.
2467  switch (MMX3DNowLevel) {
2468  case AMD3DNowAthlon:
2469    Builder.defineMacro("__3dNOW_A__");
2470  case AMD3DNow:
2471    Builder.defineMacro("__3dNOW__");
2472  case MMX:
2473    Builder.defineMacro("__MMX__");
2474  case NoMMX3DNow:
2475    break;
2476  }
2477}
2478
2479bool X86TargetInfo::hasFeature(StringRef Feature) const {
2480  return llvm::StringSwitch<bool>(Feature)
2481      .Case("aes", HasAES)
2482      .Case("avx", SSELevel >= AVX)
2483      .Case("avx2", SSELevel >= AVX2)
2484      .Case("bmi", HasBMI)
2485      .Case("bmi2", HasBMI2)
2486      .Case("fma", HasFMA)
2487      .Case("fma4", HasFMA4)
2488      .Case("lzcnt", HasLZCNT)
2489      .Case("rdrnd", HasRDRND)
2490      .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
2491      .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
2492      .Case("mmx", MMX3DNowLevel >= MMX)
2493      .Case("pclmul", HasPCLMUL)
2494      .Case("popcnt", HasPOPCNT)
2495      .Case("rtm", HasRTM)
2496      .Case("sse", SSELevel >= SSE1)
2497      .Case("sse2", SSELevel >= SSE2)
2498      .Case("sse3", SSELevel >= SSE3)
2499      .Case("ssse3", SSELevel >= SSSE3)
2500      .Case("sse41", SSELevel >= SSE41)
2501      .Case("sse42", SSELevel >= SSE42)
2502      .Case("sse4a", HasSSE4a)
2503      .Case("x86", true)
2504      .Case("x86_32", getTriple().getArch() == llvm::Triple::x86)
2505      .Case("x86_64", getTriple().getArch() == llvm::Triple::x86_64)
2506      .Case("xop", HasXOP)
2507      .Case("f16c", HasF16C)
2508      .Default(false);
2509}
2510
2511bool
2512X86TargetInfo::validateAsmConstraint(const char *&Name,
2513                                     TargetInfo::ConstraintInfo &Info) const {
2514  switch (*Name) {
2515  default: return false;
2516  case 'Y': // first letter of a pair:
2517    switch (*(Name+1)) {
2518    default: return false;
2519    case '0':  // First SSE register.
2520    case 't':  // Any SSE register, when SSE2 is enabled.
2521    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
2522    case 'm':  // any MMX register, when inter-unit moves enabled.
2523      break;   // falls through to setAllowsRegister.
2524  }
2525  case 'a': // eax.
2526  case 'b': // ebx.
2527  case 'c': // ecx.
2528  case 'd': // edx.
2529  case 'S': // esi.
2530  case 'D': // edi.
2531  case 'A': // edx:eax.
2532  case 'f': // any x87 floating point stack register.
2533  case 't': // top of floating point stack.
2534  case 'u': // second from top of floating point stack.
2535  case 'q': // Any register accessible as [r]l: a, b, c, and d.
2536  case 'y': // Any MMX register.
2537  case 'x': // Any SSE register.
2538  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2539  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2540  case 'l': // "Index" registers: any general register that can be used as an
2541            // index in a base+index memory access.
2542    Info.setAllowsRegister();
2543    return true;
2544  case 'C': // SSE floating point constant.
2545  case 'G': // x87 floating point constant.
2546  case 'e': // 32-bit signed integer constant for use with zero-extending
2547            // x86_64 instructions.
2548  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2549            // x86_64 instructions.
2550    return true;
2551  }
2552}
2553
2554
2555std::string
2556X86TargetInfo::convertConstraint(const char *&Constraint) const {
2557  switch (*Constraint) {
2558  case 'a': return std::string("{ax}");
2559  case 'b': return std::string("{bx}");
2560  case 'c': return std::string("{cx}");
2561  case 'd': return std::string("{dx}");
2562  case 'S': return std::string("{si}");
2563  case 'D': return std::string("{di}");
2564  case 'p': // address
2565    return std::string("im");
2566  case 't': // top of floating point stack.
2567    return std::string("{st}");
2568  case 'u': // second from top of floating point stack.
2569    return std::string("{st(1)}"); // second from top of floating point stack.
2570  default:
2571    return std::string(1, *Constraint);
2572  }
2573}
2574} // end anonymous namespace
2575
2576namespace {
2577// X86-32 generic target
2578class X86_32TargetInfo : public X86TargetInfo {
2579public:
2580  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2581    DoubleAlign = LongLongAlign = 32;
2582    LongDoubleWidth = 96;
2583    LongDoubleAlign = 32;
2584    SuitableAlign = 128;
2585    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2586                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2587                        "a0:0:64-f80:32:32-n8:16:32-S128";
2588    SizeType = UnsignedInt;
2589    PtrDiffType = SignedInt;
2590    IntPtrType = SignedInt;
2591    RegParmMax = 3;
2592
2593    // Use fpret for all types.
2594    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2595                             (1 << TargetInfo::Double) |
2596                             (1 << TargetInfo::LongDouble));
2597
2598    // x86-32 has atomics up to 8 bytes
2599    // FIXME: Check that we actually have cmpxchg8b before setting
2600    // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2601    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2602  }
2603  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2604    return TargetInfo::CharPtrBuiltinVaList;
2605  }
2606
2607  int getEHDataRegisterNumber(unsigned RegNo) const {
2608    if (RegNo == 0) return 0;
2609    if (RegNo == 1) return 2;
2610    return -1;
2611  }
2612  virtual bool validateInputSize(StringRef Constraint,
2613                                 unsigned Size) const {
2614    switch (Constraint[0]) {
2615    default: break;
2616    case 'a':
2617    case 'b':
2618    case 'c':
2619    case 'd':
2620      return Size <= 32;
2621    }
2622
2623    return true;
2624  }
2625};
2626} // end anonymous namespace
2627
2628namespace {
2629class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2630public:
2631  NetBSDI386TargetInfo(const std::string &triple) :
2632    NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2633  }
2634
2635  virtual unsigned getFloatEvalMethod() const {
2636    // NetBSD defaults to "double" rounding
2637    return 1;
2638  }
2639};
2640} // end anonymous namespace
2641
2642namespace {
2643class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2644public:
2645  OpenBSDI386TargetInfo(const std::string& triple) :
2646    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2647    SizeType = UnsignedLong;
2648    IntPtrType = SignedLong;
2649    PtrDiffType = SignedLong;
2650  }
2651};
2652} // end anonymous namespace
2653
2654namespace {
2655class BitrigI386TargetInfo : public BitrigTargetInfo<X86_32TargetInfo> {
2656public:
2657  BitrigI386TargetInfo(const std::string& triple) :
2658    BitrigTargetInfo<X86_32TargetInfo>(triple) {
2659    SizeType = UnsignedLong;
2660    IntPtrType = SignedLong;
2661    PtrDiffType = SignedLong;
2662  }
2663};
2664} // end anonymous namespace
2665
2666namespace {
2667class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2668public:
2669  DarwinI386TargetInfo(const std::string& triple) :
2670    DarwinTargetInfo<X86_32TargetInfo>(triple) {
2671    LongDoubleWidth = 128;
2672    LongDoubleAlign = 128;
2673    SuitableAlign = 128;
2674    MaxVectorAlign = 256;
2675    SizeType = UnsignedLong;
2676    IntPtrType = SignedLong;
2677    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2678                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2679                        "a0:0:64-f80:128:128-n8:16:32-S128";
2680    HasAlignMac68kSupport = true;
2681  }
2682
2683};
2684} // end anonymous namespace
2685
2686namespace {
2687// x86-32 Windows target
2688class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2689public:
2690  WindowsX86_32TargetInfo(const std::string& triple)
2691    : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2692    TLSSupported = false;
2693    WCharType = UnsignedShort;
2694    DoubleAlign = LongLongAlign = 64;
2695    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2696                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2697                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2698  }
2699  virtual void getTargetDefines(const LangOptions &Opts,
2700                                MacroBuilder &Builder) const {
2701    WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2702  }
2703};
2704} // end anonymous namespace
2705
2706namespace {
2707
2708// x86-32 Windows Visual Studio target
2709class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2710public:
2711  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2712    : WindowsX86_32TargetInfo(triple) {
2713    LongDoubleWidth = LongDoubleAlign = 64;
2714    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2715  }
2716  virtual void getTargetDefines(const LangOptions &Opts,
2717                                MacroBuilder &Builder) const {
2718    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2719    WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2720    // The value of the following reflects processor type.
2721    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2722    // We lost the original triple, so we use the default.
2723    Builder.defineMacro("_M_IX86", "600");
2724  }
2725};
2726} // end anonymous namespace
2727
2728namespace {
2729// x86-32 MinGW target
2730class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2731public:
2732  MinGWX86_32TargetInfo(const std::string& triple)
2733    : WindowsX86_32TargetInfo(triple) {
2734  }
2735  virtual void getTargetDefines(const LangOptions &Opts,
2736                                MacroBuilder &Builder) const {
2737    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2738    DefineStd(Builder, "WIN32", Opts);
2739    DefineStd(Builder, "WINNT", Opts);
2740    Builder.defineMacro("_X86_");
2741    Builder.defineMacro("__MSVCRT__");
2742    Builder.defineMacro("__MINGW32__");
2743
2744    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2745    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2746    if (Opts.MicrosoftExt)
2747      // Provide "as-is" __declspec.
2748      Builder.defineMacro("__declspec", "__declspec");
2749    else
2750      // Provide alias of __attribute__ like mingw32-gcc.
2751      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2752  }
2753};
2754} // end anonymous namespace
2755
2756namespace {
2757// x86-32 Cygwin target
2758class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2759public:
2760  CygwinX86_32TargetInfo(const std::string& triple)
2761    : X86_32TargetInfo(triple) {
2762    TLSSupported = false;
2763    WCharType = UnsignedShort;
2764    DoubleAlign = LongLongAlign = 64;
2765    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2766                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2767                        "a0:0:64-f80:32:32-n8:16:32-S32";
2768  }
2769  virtual void getTargetDefines(const LangOptions &Opts,
2770                                MacroBuilder &Builder) const {
2771    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2772    Builder.defineMacro("_X86_");
2773    Builder.defineMacro("__CYGWIN__");
2774    Builder.defineMacro("__CYGWIN32__");
2775    DefineStd(Builder, "unix", Opts);
2776    if (Opts.CPlusPlus)
2777      Builder.defineMacro("_GNU_SOURCE");
2778  }
2779};
2780} // end anonymous namespace
2781
2782namespace {
2783// x86-32 Haiku target
2784class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2785public:
2786  HaikuX86_32TargetInfo(const std::string& triple)
2787    : X86_32TargetInfo(triple) {
2788    SizeType = UnsignedLong;
2789    IntPtrType = SignedLong;
2790    PtrDiffType = SignedLong;
2791    ProcessIDType = SignedLong;
2792    this->UserLabelPrefix = "";
2793    this->TLSSupported = false;
2794  }
2795  virtual void getTargetDefines(const LangOptions &Opts,
2796                                MacroBuilder &Builder) const {
2797    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2798    Builder.defineMacro("__INTEL__");
2799    Builder.defineMacro("__HAIKU__");
2800  }
2801};
2802} // end anonymous namespace
2803
2804// RTEMS Target
2805template<typename Target>
2806class RTEMSTargetInfo : public OSTargetInfo<Target> {
2807protected:
2808  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2809                            MacroBuilder &Builder) const {
2810    // RTEMS defines; list based off of gcc output
2811
2812    Builder.defineMacro("__rtems__");
2813    Builder.defineMacro("__ELF__");
2814  }
2815public:
2816  RTEMSTargetInfo(const std::string &triple)
2817    : OSTargetInfo<Target>(triple) {
2818      this->UserLabelPrefix = "";
2819
2820      llvm::Triple Triple(triple);
2821      switch (Triple.getArch()) {
2822        default:
2823        case llvm::Triple::x86:
2824          // this->MCountName = ".mcount";
2825          break;
2826        case llvm::Triple::mips:
2827        case llvm::Triple::mipsel:
2828        case llvm::Triple::ppc:
2829        case llvm::Triple::ppc64:
2830          // this->MCountName = "_mcount";
2831          break;
2832        case llvm::Triple::arm:
2833          // this->MCountName = "__mcount";
2834          break;
2835      }
2836
2837    }
2838};
2839
2840namespace {
2841// x86-32 RTEMS target
2842class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2843public:
2844  RTEMSX86_32TargetInfo(const std::string& triple)
2845    : X86_32TargetInfo(triple) {
2846    SizeType = UnsignedLong;
2847    IntPtrType = SignedLong;
2848    PtrDiffType = SignedLong;
2849    this->UserLabelPrefix = "";
2850  }
2851  virtual void getTargetDefines(const LangOptions &Opts,
2852                                MacroBuilder &Builder) const {
2853    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2854    Builder.defineMacro("__INTEL__");
2855    Builder.defineMacro("__rtems__");
2856  }
2857};
2858} // end anonymous namespace
2859
2860namespace {
2861// x86-64 generic target
2862class X86_64TargetInfo : public X86TargetInfo {
2863public:
2864  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2865    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2866    LongDoubleWidth = 128;
2867    LongDoubleAlign = 128;
2868    LargeArrayMinWidth = 128;
2869    LargeArrayAlign = 128;
2870    SuitableAlign = 128;
2871    IntMaxType = SignedLong;
2872    UIntMaxType = UnsignedLong;
2873    Int64Type = SignedLong;
2874    RegParmMax = 6;
2875
2876    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2877                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2878                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2879
2880    // Use fpret only for long double.
2881    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2882
2883    // Use fp2ret for _Complex long double.
2884    ComplexLongDoubleUsesFP2Ret = true;
2885
2886    // x86-64 has atomics up to 16 bytes.
2887    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2888    // on CPUs with cmpxchg16b
2889    MaxAtomicPromoteWidth = 128;
2890    MaxAtomicInlineWidth = 64;
2891  }
2892  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2893    return TargetInfo::X86_64ABIBuiltinVaList;
2894  }
2895
2896  int getEHDataRegisterNumber(unsigned RegNo) const {
2897    if (RegNo == 0) return 0;
2898    if (RegNo == 1) return 1;
2899    return -1;
2900  }
2901
2902  virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
2903    return (CC == CC_Default ||
2904            CC == CC_C ||
2905            CC == CC_IntelOclBicc) ? CCCR_OK : CCCR_Warning;
2906  }
2907
2908  virtual CallingConv getDefaultCallingConv(CallingConvMethodType MT) const {
2909    return CC_C;
2910  }
2911
2912};
2913} // end anonymous namespace
2914
2915namespace {
2916// x86-64 Windows target
2917class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2918public:
2919  WindowsX86_64TargetInfo(const std::string& triple)
2920    : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2921    TLSSupported = false;
2922    WCharType = UnsignedShort;
2923    LongWidth = LongAlign = 32;
2924    DoubleAlign = LongLongAlign = 64;
2925    IntMaxType = SignedLongLong;
2926    UIntMaxType = UnsignedLongLong;
2927    Int64Type = SignedLongLong;
2928    SizeType = UnsignedLongLong;
2929    PtrDiffType = SignedLongLong;
2930    IntPtrType = SignedLongLong;
2931    this->UserLabelPrefix = "";
2932  }
2933  virtual void getTargetDefines(const LangOptions &Opts,
2934                                MacroBuilder &Builder) const {
2935    WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2936    Builder.defineMacro("_WIN64");
2937  }
2938  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2939    return TargetInfo::CharPtrBuiltinVaList;
2940  }
2941};
2942} // end anonymous namespace
2943
2944namespace {
2945// x86-64 Windows Visual Studio target
2946class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2947public:
2948  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2949    : WindowsX86_64TargetInfo(triple) {
2950    LongDoubleWidth = LongDoubleAlign = 64;
2951    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2952  }
2953  virtual void getTargetDefines(const LangOptions &Opts,
2954                                MacroBuilder &Builder) const {
2955    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2956    WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2957    Builder.defineMacro("_M_X64");
2958    Builder.defineMacro("_M_AMD64");
2959  }
2960};
2961} // end anonymous namespace
2962
2963namespace {
2964// x86-64 MinGW target
2965class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2966public:
2967  MinGWX86_64TargetInfo(const std::string& triple)
2968    : WindowsX86_64TargetInfo(triple) {
2969  }
2970  virtual void getTargetDefines(const LangOptions &Opts,
2971                                MacroBuilder &Builder) const {
2972    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2973    DefineStd(Builder, "WIN64", Opts);
2974    Builder.defineMacro("__MSVCRT__");
2975    Builder.defineMacro("__MINGW32__");
2976    Builder.defineMacro("__MINGW64__");
2977
2978    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2979    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2980    if (Opts.MicrosoftExt)
2981      // Provide "as-is" __declspec.
2982      Builder.defineMacro("__declspec", "__declspec");
2983    else
2984      // Provide alias of __attribute__ like mingw32-gcc.
2985      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2986  }
2987};
2988} // end anonymous namespace
2989
2990namespace {
2991class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2992public:
2993  DarwinX86_64TargetInfo(const std::string& triple)
2994      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2995    Int64Type = SignedLongLong;
2996    MaxVectorAlign = 256;
2997  }
2998};
2999} // end anonymous namespace
3000
3001namespace {
3002class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
3003public:
3004  OpenBSDX86_64TargetInfo(const std::string& triple)
3005      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
3006    IntMaxType = SignedLongLong;
3007    UIntMaxType = UnsignedLongLong;
3008    Int64Type = SignedLongLong;
3009  }
3010};
3011} // end anonymous namespace
3012
3013namespace {
3014class BitrigX86_64TargetInfo : public BitrigTargetInfo<X86_64TargetInfo> {
3015public:
3016  BitrigX86_64TargetInfo(const std::string& triple)
3017      : BitrigTargetInfo<X86_64TargetInfo>(triple) {
3018     IntMaxType = SignedLongLong;
3019     UIntMaxType = UnsignedLongLong;
3020     Int64Type = SignedLongLong;
3021  }
3022};
3023} // end anonymous namespace
3024
3025namespace {
3026class ARMTargetInfo : public TargetInfo {
3027  // Possible FPU choices.
3028  enum FPUMode {
3029    VFP2FPU = (1 << 0),
3030    VFP3FPU = (1 << 1),
3031    VFP4FPU = (1 << 2),
3032    NeonFPU = (1 << 3)
3033  };
3034
3035  static bool FPUModeIsVFP(FPUMode Mode) {
3036    return Mode & (VFP2FPU | VFP3FPU | VFP4FPU | NeonFPU);
3037  }
3038
3039  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3040  static const char * const GCCRegNames[];
3041
3042  std::string ABI, CPU;
3043
3044  unsigned FPU : 4;
3045
3046  unsigned IsAAPCS : 1;
3047  unsigned IsThumb : 1;
3048
3049  // Initialized via features.
3050  unsigned SoftFloat : 1;
3051  unsigned SoftFloatABI : 1;
3052
3053  static const Builtin::Info BuiltinInfo[];
3054
3055public:
3056  ARMTargetInfo(const std::string &TripleStr)
3057    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s"), IsAAPCS(true)
3058  {
3059    BigEndian = false;
3060    SizeType = UnsignedInt;
3061    PtrDiffType = SignedInt;
3062    // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
3063    WCharType = UnsignedInt;
3064
3065    // {} in inline assembly are neon specifiers, not assembly variant
3066    // specifiers.
3067    NoAsmVariants = true;
3068
3069    // FIXME: Should we just treat this as a feature?
3070    IsThumb = getTriple().getArchName().startswith("thumb");
3071    if (IsThumb) {
3072      // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
3073      // so set preferred for small types to 32.
3074      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
3075                           "i64:64:64-f32:32:32-f64:64:64-"
3076                           "v64:64:64-v128:64:128-a0:0:32-n32-S64");
3077    } else {
3078      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3079                           "i64:64:64-f32:32:32-f64:64:64-"
3080                           "v64:64:64-v128:64:128-a0:0:64-n32-S64");
3081    }
3082
3083    // ARM targets default to using the ARM C++ ABI.
3084    CXXABI = CXXABI_ARM;
3085
3086    // ARM has atomics up to 8 bytes
3087    // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
3088    MaxAtomicPromoteWidth = 64;
3089
3090    // Do force alignment of members that follow zero length bitfields.  If
3091    // the alignment of the zero-length bitfield is greater than the member
3092    // that follows it, `bar', `bar' will be aligned as the  type of the
3093    // zero length bitfield.
3094    UseZeroLengthBitfieldAlignment = true;
3095  }
3096  virtual const char *getABI() const { return ABI.c_str(); }
3097  virtual bool setABI(const std::string &Name) {
3098    ABI = Name;
3099
3100    // The defaults (above) are for AAPCS, check if we need to change them.
3101    //
3102    // FIXME: We need support for -meabi... we could just mangle it into the
3103    // name.
3104    if (Name == "apcs-gnu") {
3105      DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
3106      // size_t is unsigned int on FreeBSD.
3107      if (getTriple().getOS() != llvm::Triple::FreeBSD)
3108        SizeType = UnsignedLong;
3109
3110      // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
3111      WCharType = SignedInt;
3112
3113      // Do not respect the alignment of bit-field types when laying out
3114      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
3115      UseBitFieldTypeAlignment = false;
3116
3117      /// gcc forces the alignment to 4 bytes, regardless of the type of the
3118      /// zero length bitfield.  This corresponds to EMPTY_FIELD_BOUNDARY in
3119      /// gcc.
3120      ZeroLengthBitfieldBoundary = 32;
3121
3122      IsAAPCS = false;
3123
3124      if (IsThumb) {
3125        // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
3126        // so set preferred for small types to 32.
3127        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
3128                             "i64:32:64-f32:32:32-f64:32:64-"
3129                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
3130      } else {
3131        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3132                             "i64:32:64-f32:32:32-f64:32:64-"
3133                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
3134      }
3135
3136      // FIXME: Override "preferred align" for double and long long.
3137    } else if (Name == "aapcs" || Name == "aapcs-vfp") {
3138      IsAAPCS = true;
3139      // FIXME: Enumerated types are variable width in straight AAPCS.
3140    } else if (Name == "aapcs-linux") {
3141      IsAAPCS = true;
3142    } else
3143      return false;
3144
3145    return true;
3146  }
3147
3148  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3149    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
3150      Features["vfp2"] = true;
3151    else if (CPU == "cortex-a8" || CPU == "cortex-a15" ||
3152             CPU == "cortex-a9" || CPU == "cortex-a9-mp")
3153      Features["neon"] = true;
3154    else if (CPU == "swift") {
3155      Features["vfp4"] = true;
3156      Features["neon"] = true;
3157    }
3158  }
3159
3160  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3161                                 StringRef Name,
3162                                 bool Enabled) const {
3163    if (Name == "soft-float" || Name == "soft-float-abi" ||
3164        Name == "vfp2" || Name == "vfp3" || Name == "vfp4" || Name == "neon" ||
3165        Name == "d16" || Name == "neonfp") {
3166      Features[Name] = Enabled;
3167    } else
3168      return false;
3169
3170    return true;
3171  }
3172
3173  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3174    FPU = 0;
3175    SoftFloat = SoftFloatABI = false;
3176    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
3177      if (Features[i] == "+soft-float")
3178        SoftFloat = true;
3179      else if (Features[i] == "+soft-float-abi")
3180        SoftFloatABI = true;
3181      else if (Features[i] == "+vfp2")
3182        FPU |= VFP2FPU;
3183      else if (Features[i] == "+vfp3")
3184        FPU |= VFP3FPU;
3185      else if (Features[i] == "+vfp4")
3186        FPU |= VFP4FPU;
3187      else if (Features[i] == "+neon")
3188        FPU |= NeonFPU;
3189    }
3190
3191    // Remove front-end specific options which the backend handles differently.
3192    std::vector<std::string>::iterator it;
3193    it = std::find(Features.begin(), Features.end(), "+soft-float");
3194    if (it != Features.end())
3195      Features.erase(it);
3196    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
3197    if (it != Features.end())
3198      Features.erase(it);
3199  }
3200
3201  virtual bool hasFeature(StringRef Feature) const {
3202    return llvm::StringSwitch<bool>(Feature)
3203        .Case("arm", true)
3204        .Case("softfloat", SoftFloat)
3205        .Case("thumb", IsThumb)
3206        .Case("neon", FPU == NeonFPU && !SoftFloat &&
3207              StringRef(getCPUDefineSuffix(CPU)).startswith("7"))
3208        .Default(false);
3209  }
3210  // FIXME: Should we actually have some table instead of these switches?
3211  static const char *getCPUDefineSuffix(StringRef Name) {
3212    return llvm::StringSwitch<const char*>(Name)
3213      .Cases("arm8", "arm810", "4")
3214      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
3215      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
3216      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
3217      .Case("ep9312", "4T")
3218      .Cases("arm10tdmi", "arm1020t", "5T")
3219      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
3220      .Case("arm926ej-s", "5TEJ")
3221      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
3222      .Cases("xscale", "iwmmxt", "5TE")
3223      .Case("arm1136j-s", "6J")
3224      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
3225      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
3226      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
3227      .Cases("cortex-a5", "cortex-a8", "cortex-a9", "cortex-a15", "7A")
3228      .Case("cortex-r5", "7R")
3229      .Case("cortex-a9-mp", "7F")
3230      .Case("swift", "7S")
3231      .Cases("cortex-m3", "cortex-m4", "7M")
3232      .Case("cortex-m0", "6M")
3233      .Default(0);
3234  }
3235  static const char *getCPUProfile(StringRef Name) {
3236    return llvm::StringSwitch<const char*>(Name)
3237      .Cases("cortex-a8", "cortex-a9", "A")
3238      .Cases("cortex-m3", "cortex-m4", "cortex-m0", "M")
3239      .Case("cortex-r5", "R")
3240      .Default("");
3241  }
3242  virtual bool setCPU(const std::string &Name) {
3243    if (!getCPUDefineSuffix(Name))
3244      return false;
3245
3246    CPU = Name;
3247    return true;
3248  }
3249  virtual void getTargetDefines(const LangOptions &Opts,
3250                                MacroBuilder &Builder) const {
3251    // Target identification.
3252    Builder.defineMacro("__arm");
3253    Builder.defineMacro("__arm__");
3254
3255    // Target properties.
3256    Builder.defineMacro("__ARMEL__");
3257    Builder.defineMacro("__LITTLE_ENDIAN__");
3258    Builder.defineMacro("__REGISTER_PREFIX__", "");
3259
3260    StringRef CPUArch = getCPUDefineSuffix(CPU);
3261    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
3262    Builder.defineMacro("__ARM_ARCH", CPUArch.substr(0, 1));
3263    StringRef CPUProfile = getCPUProfile(CPU);
3264    if (!CPUProfile.empty())
3265      Builder.defineMacro("__ARM_ARCH_PROFILE", CPUProfile);
3266
3267    // Subtarget options.
3268
3269    // FIXME: It's more complicated than this and we don't really support
3270    // interworking.
3271    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
3272      Builder.defineMacro("__THUMB_INTERWORK__");
3273
3274    if (ABI == "aapcs" || ABI == "aapcs-linux" || ABI == "aapcs-vfp") {
3275      // M-class CPUs on Darwin follow AAPCS, but not EABI.
3276      if (!(getTriple().isOSDarwin() && CPUProfile == "M"))
3277        Builder.defineMacro("__ARM_EABI__");
3278      Builder.defineMacro("__ARM_PCS", "1");
3279
3280      if ((!SoftFloat && !SoftFloatABI) || ABI == "aapcs-vfp")
3281        Builder.defineMacro("__ARM_PCS_VFP", "1");
3282    }
3283
3284    if (SoftFloat)
3285      Builder.defineMacro("__SOFTFP__");
3286
3287    if (CPU == "xscale")
3288      Builder.defineMacro("__XSCALE__");
3289
3290    bool IsARMv7 = CPUArch.startswith("7");
3291    if (IsThumb) {
3292      Builder.defineMacro("__THUMBEL__");
3293      Builder.defineMacro("__thumb__");
3294      if (CPUArch == "6T2" || IsARMv7)
3295        Builder.defineMacro("__thumb2__");
3296    }
3297
3298    // Note, this is always on in gcc, even though it doesn't make sense.
3299    Builder.defineMacro("__APCS_32__");
3300
3301    if (FPUModeIsVFP((FPUMode) FPU)) {
3302      Builder.defineMacro("__VFP_FP__");
3303      if (FPU & VFP2FPU)
3304        Builder.defineMacro("__ARM_VFPV2__");
3305      if (FPU & VFP3FPU)
3306        Builder.defineMacro("__ARM_VFPV3__");
3307      if (FPU & VFP4FPU)
3308        Builder.defineMacro("__ARM_VFPV4__");
3309    }
3310
3311    // This only gets set when Neon instructions are actually available, unlike
3312    // the VFP define, hence the soft float and arch check. This is subtly
3313    // different from gcc, we follow the intent which was that it should be set
3314    // when Neon instructions are actually available.
3315    if ((FPU & NeonFPU) && !SoftFloat && IsARMv7)
3316      Builder.defineMacro("__ARM_NEON__");
3317  }
3318  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3319                                 unsigned &NumRecords) const {
3320    Records = BuiltinInfo;
3321    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
3322  }
3323  virtual bool isCLZForZeroUndef() const { return false; }
3324  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3325    return IsAAPCS ? AAPCSABIBuiltinVaList : TargetInfo::VoidPtrBuiltinVaList;
3326  }
3327  virtual void getGCCRegNames(const char * const *&Names,
3328                              unsigned &NumNames) const;
3329  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3330                                unsigned &NumAliases) const;
3331  virtual bool validateAsmConstraint(const char *&Name,
3332                                     TargetInfo::ConstraintInfo &Info) const {
3333    switch (*Name) {
3334    default: break;
3335    case 'l': // r0-r7
3336    case 'h': // r8-r15
3337    case 'w': // VFP Floating point register single precision
3338    case 'P': // VFP Floating point register double precision
3339      Info.setAllowsRegister();
3340      return true;
3341    case 'Q': // A memory address that is a single base register.
3342      Info.setAllowsMemory();
3343      return true;
3344    case 'U': // a memory reference...
3345      switch (Name[1]) {
3346      case 'q': // ...ARMV4 ldrsb
3347      case 'v': // ...VFP load/store (reg+constant offset)
3348      case 'y': // ...iWMMXt load/store
3349      case 't': // address valid for load/store opaque types wider
3350                // than 128-bits
3351      case 'n': // valid address for Neon doubleword vector load/store
3352      case 'm': // valid address for Neon element and structure load/store
3353      case 's': // valid address for non-offset loads/stores of quad-word
3354                // values in four ARM registers
3355        Info.setAllowsMemory();
3356        Name++;
3357        return true;
3358      }
3359    }
3360    return false;
3361  }
3362  virtual std::string convertConstraint(const char *&Constraint) const {
3363    std::string R;
3364    switch (*Constraint) {
3365    case 'U':   // Two-character constraint; add "^" hint for later parsing.
3366      R = std::string("^") + std::string(Constraint, 2);
3367      Constraint++;
3368      break;
3369    case 'p': // 'p' should be translated to 'r' by default.
3370      R = std::string("r");
3371      break;
3372    default:
3373      return std::string(1, *Constraint);
3374    }
3375    return R;
3376  }
3377  virtual bool validateConstraintModifier(StringRef Constraint,
3378                                          const char Modifier,
3379                                          unsigned Size) const {
3380    bool isOutput = (Constraint[0] == '=');
3381    bool isInOut = (Constraint[0] == '+');
3382
3383    // Strip off constraint modifiers.
3384    while (Constraint[0] == '=' ||
3385           Constraint[0] == '+' ||
3386           Constraint[0] == '&')
3387      Constraint = Constraint.substr(1);
3388
3389    switch (Constraint[0]) {
3390    default: break;
3391    case 'r': {
3392      switch (Modifier) {
3393      default:
3394        return isInOut || (isOutput && Size >= 32) ||
3395          (!isOutput && !isInOut && Size <= 32);
3396      case 'q':
3397        // A register of size 32 cannot fit a vector type.
3398        return false;
3399      }
3400    }
3401    }
3402
3403    return true;
3404  }
3405  virtual const char *getClobbers() const {
3406    // FIXME: Is this really right?
3407    return "";
3408  }
3409
3410  virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
3411    return (CC == CC_AAPCS || CC == CC_AAPCS_VFP) ? CCCR_OK : CCCR_Warning;
3412  }
3413};
3414
3415const char * const ARMTargetInfo::GCCRegNames[] = {
3416  // Integer registers
3417  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3418  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
3419
3420  // Float registers
3421  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
3422  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
3423  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
3424  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
3425
3426  // Double registers
3427  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
3428  "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
3429  "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
3430  "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
3431
3432  // Quad registers
3433  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
3434  "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
3435};
3436
3437void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
3438                                   unsigned &NumNames) const {
3439  Names = GCCRegNames;
3440  NumNames = llvm::array_lengthof(GCCRegNames);
3441}
3442
3443const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
3444  { { "a1" }, "r0" },
3445  { { "a2" }, "r1" },
3446  { { "a3" }, "r2" },
3447  { { "a4" }, "r3" },
3448  { { "v1" }, "r4" },
3449  { { "v2" }, "r5" },
3450  { { "v3" }, "r6" },
3451  { { "v4" }, "r7" },
3452  { { "v5" }, "r8" },
3453  { { "v6", "rfp" }, "r9" },
3454  { { "sl" }, "r10" },
3455  { { "fp" }, "r11" },
3456  { { "ip" }, "r12" },
3457  { { "r13" }, "sp" },
3458  { { "r14" }, "lr" },
3459  { { "r15" }, "pc" },
3460  // The S, D and Q registers overlap, but aren't really aliases; we
3461  // don't want to substitute one of these for a different-sized one.
3462};
3463
3464void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3465                                       unsigned &NumAliases) const {
3466  Aliases = GCCRegAliases;
3467  NumAliases = llvm::array_lengthof(GCCRegAliases);
3468}
3469
3470const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
3471#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3472#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3473                                              ALL_LANGUAGES },
3474#include "clang/Basic/BuiltinsARM.def"
3475};
3476} // end anonymous namespace.
3477
3478namespace {
3479class DarwinARMTargetInfo :
3480  public DarwinTargetInfo<ARMTargetInfo> {
3481protected:
3482  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
3483                            MacroBuilder &Builder) const {
3484    getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
3485  }
3486
3487public:
3488  DarwinARMTargetInfo(const std::string& triple)
3489    : DarwinTargetInfo<ARMTargetInfo>(triple) {
3490    HasAlignMac68kSupport = true;
3491    // iOS always has 64-bit atomic instructions.
3492    // FIXME: This should be based off of the target features in ARMTargetInfo.
3493    MaxAtomicInlineWidth = 64;
3494  }
3495};
3496} // end anonymous namespace.
3497
3498
3499namespace {
3500// Hexagon abstract base class
3501class HexagonTargetInfo : public TargetInfo {
3502  static const Builtin::Info BuiltinInfo[];
3503  static const char * const GCCRegNames[];
3504  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3505  std::string CPU;
3506public:
3507  HexagonTargetInfo(const std::string& triple) : TargetInfo(triple)  {
3508    BigEndian = false;
3509    DescriptionString = ("e-p:32:32:32-"
3510                         "i64:64:64-i32:32:32-i16:16:16-i1:32:32-"
3511                         "f64:64:64-f32:32:32-a0:0-n32");
3512
3513    // {} in inline assembly are packet specifiers, not assembly variant
3514    // specifiers.
3515    NoAsmVariants = true;
3516  }
3517
3518  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3519                                 unsigned &NumRecords) const {
3520    Records = BuiltinInfo;
3521    NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
3522  }
3523
3524  virtual bool validateAsmConstraint(const char *&Name,
3525                                     TargetInfo::ConstraintInfo &Info) const {
3526    return true;
3527  }
3528
3529  virtual void getTargetDefines(const LangOptions &Opts,
3530                                MacroBuilder &Builder) const;
3531
3532  virtual bool hasFeature(StringRef Feature) const {
3533    return Feature == "hexagon";
3534  }
3535
3536  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3537    return TargetInfo::CharPtrBuiltinVaList;
3538  }
3539  virtual void getGCCRegNames(const char * const *&Names,
3540                              unsigned &NumNames) const;
3541  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3542                                unsigned &NumAliases) const;
3543  virtual const char *getClobbers() const {
3544    return "";
3545  }
3546
3547  static const char *getHexagonCPUSuffix(StringRef Name) {
3548    return llvm::StringSwitch<const char*>(Name)
3549      .Case("hexagonv2", "2")
3550      .Case("hexagonv3", "3")
3551      .Case("hexagonv4", "4")
3552      .Case("hexagonv5", "5")
3553      .Default(0);
3554  }
3555
3556  virtual bool setCPU(const std::string &Name) {
3557    if (!getHexagonCPUSuffix(Name))
3558      return false;
3559
3560    CPU = Name;
3561    return true;
3562  }
3563};
3564
3565void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
3566                                MacroBuilder &Builder) const {
3567  Builder.defineMacro("qdsp6");
3568  Builder.defineMacro("__qdsp6", "1");
3569  Builder.defineMacro("__qdsp6__", "1");
3570
3571  Builder.defineMacro("hexagon");
3572  Builder.defineMacro("__hexagon", "1");
3573  Builder.defineMacro("__hexagon__", "1");
3574
3575  if(CPU == "hexagonv1") {
3576    Builder.defineMacro("__HEXAGON_V1__");
3577    Builder.defineMacro("__HEXAGON_ARCH__", "1");
3578    if(Opts.HexagonQdsp6Compat) {
3579      Builder.defineMacro("__QDSP6_V1__");
3580      Builder.defineMacro("__QDSP6_ARCH__", "1");
3581    }
3582  }
3583  else if(CPU == "hexagonv2") {
3584    Builder.defineMacro("__HEXAGON_V2__");
3585    Builder.defineMacro("__HEXAGON_ARCH__", "2");
3586    if(Opts.HexagonQdsp6Compat) {
3587      Builder.defineMacro("__QDSP6_V2__");
3588      Builder.defineMacro("__QDSP6_ARCH__", "2");
3589    }
3590  }
3591  else if(CPU == "hexagonv3") {
3592    Builder.defineMacro("__HEXAGON_V3__");
3593    Builder.defineMacro("__HEXAGON_ARCH__", "3");
3594    if(Opts.HexagonQdsp6Compat) {
3595      Builder.defineMacro("__QDSP6_V3__");
3596      Builder.defineMacro("__QDSP6_ARCH__", "3");
3597    }
3598  }
3599  else if(CPU == "hexagonv4") {
3600    Builder.defineMacro("__HEXAGON_V4__");
3601    Builder.defineMacro("__HEXAGON_ARCH__", "4");
3602    if(Opts.HexagonQdsp6Compat) {
3603      Builder.defineMacro("__QDSP6_V4__");
3604      Builder.defineMacro("__QDSP6_ARCH__", "4");
3605    }
3606  }
3607  else if(CPU == "hexagonv5") {
3608    Builder.defineMacro("__HEXAGON_V5__");
3609    Builder.defineMacro("__HEXAGON_ARCH__", "5");
3610    if(Opts.HexagonQdsp6Compat) {
3611      Builder.defineMacro("__QDSP6_V5__");
3612      Builder.defineMacro("__QDSP6_ARCH__", "5");
3613    }
3614  }
3615}
3616
3617const char * const HexagonTargetInfo::GCCRegNames[] = {
3618  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3619  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3620  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3621  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3622  "p0", "p1", "p2", "p3",
3623  "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3624};
3625
3626void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3627                                   unsigned &NumNames) const {
3628  Names = GCCRegNames;
3629  NumNames = llvm::array_lengthof(GCCRegNames);
3630}
3631
3632
3633const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3634  { { "sp" }, "r29" },
3635  { { "fp" }, "r30" },
3636  { { "lr" }, "r31" },
3637 };
3638
3639void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3640                                     unsigned &NumAliases) const {
3641  Aliases = GCCRegAliases;
3642  NumAliases = llvm::array_lengthof(GCCRegAliases);
3643}
3644
3645
3646const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3647#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3648#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3649                                              ALL_LANGUAGES },
3650#include "clang/Basic/BuiltinsHexagon.def"
3651};
3652}
3653
3654
3655namespace {
3656class SparcV8TargetInfo : public TargetInfo {
3657  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3658  static const char * const GCCRegNames[];
3659  bool SoftFloat;
3660public:
3661  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3662    // FIXME: Support Sparc quad-precision long double?
3663    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3664                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3665  }
3666  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3667                                 StringRef Name,
3668                                 bool Enabled) const {
3669    if (Name == "soft-float")
3670      Features[Name] = Enabled;
3671    else
3672      return false;
3673
3674    return true;
3675  }
3676  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3677    SoftFloat = false;
3678    for (unsigned i = 0, e = Features.size(); i != e; ++i)
3679      if (Features[i] == "+soft-float")
3680        SoftFloat = true;
3681  }
3682  virtual void getTargetDefines(const LangOptions &Opts,
3683                                MacroBuilder &Builder) const {
3684    DefineStd(Builder, "sparc", Opts);
3685    Builder.defineMacro("__sparcv8");
3686    Builder.defineMacro("__REGISTER_PREFIX__", "");
3687
3688    if (SoftFloat)
3689      Builder.defineMacro("SOFT_FLOAT", "1");
3690  }
3691
3692  virtual bool hasFeature(StringRef Feature) const {
3693    return llvm::StringSwitch<bool>(Feature)
3694             .Case("softfloat", SoftFloat)
3695             .Case("sparc", true)
3696             .Default(false);
3697  }
3698
3699  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3700                                 unsigned &NumRecords) const {
3701    // FIXME: Implement!
3702  }
3703  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3704    return TargetInfo::VoidPtrBuiltinVaList;
3705  }
3706  virtual void getGCCRegNames(const char * const *&Names,
3707                              unsigned &NumNames) const;
3708  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3709                                unsigned &NumAliases) const;
3710  virtual bool validateAsmConstraint(const char *&Name,
3711                                     TargetInfo::ConstraintInfo &info) const {
3712    // FIXME: Implement!
3713    return false;
3714  }
3715  virtual const char *getClobbers() const {
3716    // FIXME: Implement!
3717    return "";
3718  }
3719};
3720
3721const char * const SparcV8TargetInfo::GCCRegNames[] = {
3722  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3723  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3724  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3725  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3726};
3727
3728void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3729                                       unsigned &NumNames) const {
3730  Names = GCCRegNames;
3731  NumNames = llvm::array_lengthof(GCCRegNames);
3732}
3733
3734const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3735  { { "g0" }, "r0" },
3736  { { "g1" }, "r1" },
3737  { { "g2" }, "r2" },
3738  { { "g3" }, "r3" },
3739  { { "g4" }, "r4" },
3740  { { "g5" }, "r5" },
3741  { { "g6" }, "r6" },
3742  { { "g7" }, "r7" },
3743  { { "o0" }, "r8" },
3744  { { "o1" }, "r9" },
3745  { { "o2" }, "r10" },
3746  { { "o3" }, "r11" },
3747  { { "o4" }, "r12" },
3748  { { "o5" }, "r13" },
3749  { { "o6", "sp" }, "r14" },
3750  { { "o7" }, "r15" },
3751  { { "l0" }, "r16" },
3752  { { "l1" }, "r17" },
3753  { { "l2" }, "r18" },
3754  { { "l3" }, "r19" },
3755  { { "l4" }, "r20" },
3756  { { "l5" }, "r21" },
3757  { { "l6" }, "r22" },
3758  { { "l7" }, "r23" },
3759  { { "i0" }, "r24" },
3760  { { "i1" }, "r25" },
3761  { { "i2" }, "r26" },
3762  { { "i3" }, "r27" },
3763  { { "i4" }, "r28" },
3764  { { "i5" }, "r29" },
3765  { { "i6", "fp" }, "r30" },
3766  { { "i7" }, "r31" },
3767};
3768
3769void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3770                                         unsigned &NumAliases) const {
3771  Aliases = GCCRegAliases;
3772  NumAliases = llvm::array_lengthof(GCCRegAliases);
3773}
3774} // end anonymous namespace.
3775
3776namespace {
3777class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3778public:
3779  AuroraUXSparcV8TargetInfo(const std::string& triple) :
3780      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3781    SizeType = UnsignedInt;
3782    PtrDiffType = SignedInt;
3783  }
3784};
3785class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3786public:
3787  SolarisSparcV8TargetInfo(const std::string& triple) :
3788      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3789    SizeType = UnsignedInt;
3790    PtrDiffType = SignedInt;
3791  }
3792};
3793} // end anonymous namespace.
3794
3795namespace {
3796  class MSP430TargetInfo : public TargetInfo {
3797    static const char * const GCCRegNames[];
3798  public:
3799    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3800      BigEndian = false;
3801      TLSSupported = false;
3802      IntWidth = 16; IntAlign = 16;
3803      LongWidth = 32; LongLongWidth = 64;
3804      LongAlign = LongLongAlign = 16;
3805      PointerWidth = 16; PointerAlign = 16;
3806      SuitableAlign = 16;
3807      SizeType = UnsignedInt;
3808      IntMaxType = SignedLong;
3809      UIntMaxType = UnsignedLong;
3810      IntPtrType = SignedShort;
3811      PtrDiffType = SignedInt;
3812      SigAtomicType = SignedLong;
3813      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3814   }
3815    virtual void getTargetDefines(const LangOptions &Opts,
3816                                  MacroBuilder &Builder) const {
3817      Builder.defineMacro("MSP430");
3818      Builder.defineMacro("__MSP430__");
3819      // FIXME: defines for different 'flavours' of MCU
3820    }
3821    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3822                                   unsigned &NumRecords) const {
3823     // FIXME: Implement.
3824      Records = 0;
3825      NumRecords = 0;
3826    }
3827    virtual bool hasFeature(StringRef Feature) const {
3828      return Feature == "msp430";
3829    }
3830    virtual void getGCCRegNames(const char * const *&Names,
3831                                unsigned &NumNames) const;
3832    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3833                                  unsigned &NumAliases) const {
3834      // No aliases.
3835      Aliases = 0;
3836      NumAliases = 0;
3837    }
3838    virtual bool validateAsmConstraint(const char *&Name,
3839                                       TargetInfo::ConstraintInfo &info) const {
3840      // No target constraints for now.
3841      return false;
3842    }
3843    virtual const char *getClobbers() const {
3844      // FIXME: Is this really right?
3845      return "";
3846    }
3847    virtual BuiltinVaListKind getBuiltinVaListKind() const {
3848      // FIXME: implement
3849      return TargetInfo::CharPtrBuiltinVaList;
3850   }
3851  };
3852
3853  const char * const MSP430TargetInfo::GCCRegNames[] = {
3854    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3855    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3856  };
3857
3858  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3859                                        unsigned &NumNames) const {
3860    Names = GCCRegNames;
3861    NumNames = llvm::array_lengthof(GCCRegNames);
3862  }
3863}
3864
3865namespace {
3866
3867  // LLVM and Clang cannot be used directly to output native binaries for
3868  // target, but is used to compile C code to llvm bitcode with correct
3869  // type and alignment information.
3870  //
3871  // TCE uses the llvm bitcode as input and uses it for generating customized
3872  // target processor and program binary. TCE co-design environment is
3873  // publicly available in http://tce.cs.tut.fi
3874
3875  static const unsigned TCEOpenCLAddrSpaceMap[] = {
3876      3, // opencl_global
3877      4, // opencl_local
3878      5, // opencl_constant
3879      0, // cuda_device
3880      0, // cuda_constant
3881      0  // cuda_shared
3882  };
3883
3884  class TCETargetInfo : public TargetInfo{
3885  public:
3886    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3887      TLSSupported = false;
3888      IntWidth = 32;
3889      LongWidth = LongLongWidth = 32;
3890      PointerWidth = 32;
3891      IntAlign = 32;
3892      LongAlign = LongLongAlign = 32;
3893      PointerAlign = 32;
3894      SuitableAlign = 32;
3895      SizeType = UnsignedInt;
3896      IntMaxType = SignedLong;
3897      UIntMaxType = UnsignedLong;
3898      IntPtrType = SignedInt;
3899      PtrDiffType = SignedInt;
3900      FloatWidth = 32;
3901      FloatAlign = 32;
3902      DoubleWidth = 32;
3903      DoubleAlign = 32;
3904      LongDoubleWidth = 32;
3905      LongDoubleAlign = 32;
3906      FloatFormat = &llvm::APFloat::IEEEsingle;
3907      DoubleFormat = &llvm::APFloat::IEEEsingle;
3908      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3909      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3910                          "i16:16:32-i32:32:32-i64:32:32-"
3911                          "f32:32:32-f64:32:32-v64:32:32-"
3912                          "v128:32:32-a0:0:32-n32";
3913      AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3914    }
3915
3916    virtual void getTargetDefines(const LangOptions &Opts,
3917                                  MacroBuilder &Builder) const {
3918      DefineStd(Builder, "tce", Opts);
3919      Builder.defineMacro("__TCE__");
3920      Builder.defineMacro("__TCE_V1__");
3921    }
3922    virtual bool hasFeature(StringRef Feature) const {
3923      return Feature == "tce";
3924    }
3925
3926    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3927                                   unsigned &NumRecords) const {}
3928    virtual const char *getClobbers() const {
3929      return "";
3930    }
3931    virtual BuiltinVaListKind getBuiltinVaListKind() const {
3932      return TargetInfo::VoidPtrBuiltinVaList;
3933    }
3934    virtual void getGCCRegNames(const char * const *&Names,
3935                                unsigned &NumNames) const {}
3936    virtual bool validateAsmConstraint(const char *&Name,
3937                                       TargetInfo::ConstraintInfo &info) const {
3938      return true;
3939    }
3940    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3941                                  unsigned &NumAliases) const {}
3942  };
3943}
3944
3945namespace {
3946class MipsTargetInfoBase : public TargetInfo {
3947  static const Builtin::Info BuiltinInfo[];
3948  std::string CPU;
3949  bool IsMips16;
3950  enum MipsFloatABI {
3951    HardFloat, SingleFloat, SoftFloat
3952  } FloatABI;
3953  enum DspRevEnum {
3954    NoDSP, DSP1, DSP2
3955  } DspRev;
3956
3957protected:
3958  std::string ABI;
3959
3960public:
3961  MipsTargetInfoBase(const std::string& triple,
3962                     const std::string& ABIStr,
3963                     const std::string& CPUStr)
3964    : TargetInfo(triple),
3965      CPU(CPUStr),
3966      IsMips16(false),
3967      FloatABI(HardFloat),
3968      DspRev(NoDSP),
3969      ABI(ABIStr)
3970  {}
3971
3972  virtual const char *getABI() const { return ABI.c_str(); }
3973  virtual bool setABI(const std::string &Name) = 0;
3974  virtual bool setCPU(const std::string &Name) {
3975    CPU = Name;
3976    return true;
3977  }
3978  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3979    Features[ABI] = true;
3980    Features[CPU] = true;
3981  }
3982
3983  virtual void getTargetDefines(const LangOptions &Opts,
3984                                MacroBuilder &Builder) const {
3985    DefineStd(Builder, "mips", Opts);
3986    Builder.defineMacro("_mips");
3987    Builder.defineMacro("__REGISTER_PREFIX__", "");
3988
3989    switch (FloatABI) {
3990    case HardFloat:
3991      Builder.defineMacro("__mips_hard_float", Twine(1));
3992      break;
3993    case SingleFloat:
3994      Builder.defineMacro("__mips_hard_float", Twine(1));
3995      Builder.defineMacro("__mips_single_float", Twine(1));
3996      break;
3997    case SoftFloat:
3998      Builder.defineMacro("__mips_soft_float", Twine(1));
3999      break;
4000    }
4001
4002    if (IsMips16)
4003      Builder.defineMacro("__mips16", Twine(1));
4004
4005    switch (DspRev) {
4006    default:
4007      break;
4008    case DSP1:
4009      Builder.defineMacro("__mips_dsp_rev", Twine(1));
4010      Builder.defineMacro("__mips_dsp", Twine(1));
4011      break;
4012    case DSP2:
4013      Builder.defineMacro("__mips_dsp_rev", Twine(2));
4014      Builder.defineMacro("__mips_dspr2", Twine(1));
4015      Builder.defineMacro("__mips_dsp", Twine(1));
4016      break;
4017    }
4018
4019    Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
4020    Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
4021    Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
4022
4023    Builder.defineMacro("_MIPS_ARCH", "\"" + CPU + "\"");
4024    Builder.defineMacro("_MIPS_ARCH_" + StringRef(CPU).upper());
4025  }
4026
4027  virtual void getTargetBuiltins(const Builtin::Info *&Records,
4028                                 unsigned &NumRecords) const {
4029    Records = BuiltinInfo;
4030    NumRecords = clang::Mips::LastTSBuiltin - Builtin::FirstTSBuiltin;
4031  }
4032  virtual bool hasFeature(StringRef Feature) const {
4033    return Feature == "mips";
4034  }
4035  virtual BuiltinVaListKind getBuiltinVaListKind() const {
4036    return TargetInfo::VoidPtrBuiltinVaList;
4037  }
4038  virtual void getGCCRegNames(const char * const *&Names,
4039                              unsigned &NumNames) const {
4040    static const char * const GCCRegNames[] = {
4041      // CPU register names
4042      // Must match second column of GCCRegAliases
4043      "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
4044      "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
4045      "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
4046      "$24",  "$25",  "$26",  "$27",  "$28",  "$29",  "$30",  "$31",
4047      // Floating point register names
4048      "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
4049      "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
4050      "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
4051      "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
4052      // Hi/lo and condition register names
4053      "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
4054      "$fcc5","$fcc6","$fcc7"
4055    };
4056    Names = GCCRegNames;
4057    NumNames = llvm::array_lengthof(GCCRegNames);
4058  }
4059  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4060                                unsigned &NumAliases) const = 0;
4061  virtual bool validateAsmConstraint(const char *&Name,
4062                                     TargetInfo::ConstraintInfo &Info) const {
4063    switch (*Name) {
4064    default:
4065      return false;
4066
4067    case 'r': // CPU registers.
4068    case 'd': // Equivalent to "r" unless generating MIPS16 code.
4069    case 'y': // Equivalent to "r", backwards compatibility only.
4070    case 'f': // floating-point registers.
4071    case 'c': // $25 for indirect jumps
4072    case 'l': // lo register
4073    case 'x': // hilo register pair
4074      Info.setAllowsRegister();
4075      return true;
4076    }
4077  }
4078
4079  virtual const char *getClobbers() const {
4080    // FIXME: Implement!
4081    return "";
4082  }
4083
4084  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
4085                                 StringRef Name,
4086                                 bool Enabled) const {
4087    if (Name == "soft-float" || Name == "single-float" ||
4088        Name == "o32" || Name == "n32" || Name == "n64" || Name == "eabi" ||
4089        Name == "mips32" || Name == "mips32r2" ||
4090        Name == "mips64" || Name == "mips64r2" ||
4091        Name == "mips16" || Name == "dsp" || Name == "dspr2") {
4092      Features[Name] = Enabled;
4093      return true;
4094    }
4095    return false;
4096  }
4097
4098  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
4099    IsMips16 = false;
4100    FloatABI = HardFloat;
4101    DspRev = NoDSP;
4102
4103    for (std::vector<std::string>::iterator it = Features.begin(),
4104         ie = Features.end(); it != ie; ++it) {
4105      if (*it == "+single-float")
4106        FloatABI = SingleFloat;
4107      else if (*it == "+soft-float")
4108        FloatABI = SoftFloat;
4109      else if (*it == "+mips16")
4110        IsMips16 = true;
4111      else if (*it == "+dsp")
4112        DspRev = std::max(DspRev, DSP1);
4113      else if (*it == "+dspr2")
4114        DspRev = std::max(DspRev, DSP2);
4115    }
4116
4117    // Remove front-end specific option.
4118    std::vector<std::string>::iterator it =
4119      std::find(Features.begin(), Features.end(), "+soft-float");
4120    if (it != Features.end())
4121      Features.erase(it);
4122  }
4123};
4124
4125const Builtin::Info MipsTargetInfoBase::BuiltinInfo[] = {
4126#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
4127#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
4128                                              ALL_LANGUAGES },
4129#include "clang/Basic/BuiltinsMips.def"
4130};
4131
4132class Mips32TargetInfoBase : public MipsTargetInfoBase {
4133public:
4134  Mips32TargetInfoBase(const std::string& triple) :
4135    MipsTargetInfoBase(triple, "o32", "mips32") {
4136    SizeType = UnsignedInt;
4137    PtrDiffType = SignedInt;
4138    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
4139  }
4140  virtual bool setABI(const std::string &Name) {
4141    if ((Name == "o32") || (Name == "eabi")) {
4142      ABI = Name;
4143      return true;
4144    } else
4145      return false;
4146  }
4147  virtual void getTargetDefines(const LangOptions &Opts,
4148                                MacroBuilder &Builder) const {
4149    MipsTargetInfoBase::getTargetDefines(Opts, Builder);
4150
4151    if (ABI == "o32") {
4152      Builder.defineMacro("__mips_o32");
4153      Builder.defineMacro("_ABIO32", "1");
4154      Builder.defineMacro("_MIPS_SIM", "_ABIO32");
4155    }
4156    else if (ABI == "eabi")
4157      Builder.defineMacro("__mips_eabi");
4158    else
4159      llvm_unreachable("Invalid ABI for Mips32.");
4160  }
4161  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4162                                unsigned &NumAliases) const {
4163    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
4164      { { "at" },  "$1" },
4165      { { "v0" },  "$2" },
4166      { { "v1" },  "$3" },
4167      { { "a0" },  "$4" },
4168      { { "a1" },  "$5" },
4169      { { "a2" },  "$6" },
4170      { { "a3" },  "$7" },
4171      { { "t0" },  "$8" },
4172      { { "t1" },  "$9" },
4173      { { "t2" }, "$10" },
4174      { { "t3" }, "$11" },
4175      { { "t4" }, "$12" },
4176      { { "t5" }, "$13" },
4177      { { "t6" }, "$14" },
4178      { { "t7" }, "$15" },
4179      { { "s0" }, "$16" },
4180      { { "s1" }, "$17" },
4181      { { "s2" }, "$18" },
4182      { { "s3" }, "$19" },
4183      { { "s4" }, "$20" },
4184      { { "s5" }, "$21" },
4185      { { "s6" }, "$22" },
4186      { { "s7" }, "$23" },
4187      { { "t8" }, "$24" },
4188      { { "t9" }, "$25" },
4189      { { "k0" }, "$26" },
4190      { { "k1" }, "$27" },
4191      { { "gp" }, "$28" },
4192      { { "sp","$sp" }, "$29" },
4193      { { "fp","$fp" }, "$30" },
4194      { { "ra" }, "$31" }
4195    };
4196    Aliases = GCCRegAliases;
4197    NumAliases = llvm::array_lengthof(GCCRegAliases);
4198  }
4199};
4200
4201class Mips32EBTargetInfo : public Mips32TargetInfoBase {
4202public:
4203  Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
4204    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4205                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32-S64";
4206  }
4207  virtual void getTargetDefines(const LangOptions &Opts,
4208                                MacroBuilder &Builder) const {
4209    DefineStd(Builder, "MIPSEB", Opts);
4210    Builder.defineMacro("_MIPSEB");
4211    Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
4212  }
4213};
4214
4215class Mips32ELTargetInfo : public Mips32TargetInfoBase {
4216public:
4217  Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
4218    BigEndian = false;
4219    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4220                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32-S64";
4221  }
4222  virtual void getTargetDefines(const LangOptions &Opts,
4223                                MacroBuilder &Builder) const {
4224    DefineStd(Builder, "MIPSEL", Opts);
4225    Builder.defineMacro("_MIPSEL");
4226    Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
4227  }
4228};
4229
4230class Mips64TargetInfoBase : public MipsTargetInfoBase {
4231  virtual void SetDescriptionString(const std::string &Name) = 0;
4232public:
4233  Mips64TargetInfoBase(const std::string& triple) :
4234    MipsTargetInfoBase(triple, "n64", "mips64") {
4235    LongWidth = LongAlign = 64;
4236    PointerWidth = PointerAlign = 64;
4237    LongDoubleWidth = LongDoubleAlign = 128;
4238    LongDoubleFormat = &llvm::APFloat::IEEEquad;
4239    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
4240      LongDoubleWidth = LongDoubleAlign = 64;
4241      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
4242    }
4243    SuitableAlign = 128;
4244    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
4245  }
4246  virtual bool setABI(const std::string &Name) {
4247    SetDescriptionString(Name);
4248
4249    if (Name != "n32" && Name != "n64")
4250      return false;
4251
4252    ABI = Name;
4253
4254    if (Name == "n32") {
4255      LongWidth = LongAlign = 32;
4256      PointerWidth = PointerAlign = 32;
4257    }
4258
4259    return true;
4260  }
4261  virtual void getTargetDefines(const LangOptions &Opts,
4262                                MacroBuilder &Builder) const {
4263    MipsTargetInfoBase::getTargetDefines(Opts, Builder);
4264
4265    Builder.defineMacro("__mips64");
4266    Builder.defineMacro("__mips64__");
4267
4268    if (ABI == "n32") {
4269      Builder.defineMacro("__mips_n32");
4270      Builder.defineMacro("_ABIN32", "2");
4271      Builder.defineMacro("_MIPS_SIM", "_ABIN32");
4272    }
4273    else if (ABI == "n64") {
4274      Builder.defineMacro("__mips_n64");
4275      Builder.defineMacro("_ABI64", "3");
4276      Builder.defineMacro("_MIPS_SIM", "_ABI64");
4277    }
4278    else
4279      llvm_unreachable("Invalid ABI for Mips64.");
4280  }
4281  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4282                                unsigned &NumAliases) const {
4283    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
4284      { { "at" },  "$1" },
4285      { { "v0" },  "$2" },
4286      { { "v1" },  "$3" },
4287      { { "a0" },  "$4" },
4288      { { "a1" },  "$5" },
4289      { { "a2" },  "$6" },
4290      { { "a3" },  "$7" },
4291      { { "a4" },  "$8" },
4292      { { "a5" },  "$9" },
4293      { { "a6" }, "$10" },
4294      { { "a7" }, "$11" },
4295      { { "t0" }, "$12" },
4296      { { "t1" }, "$13" },
4297      { { "t2" }, "$14" },
4298      { { "t3" }, "$15" },
4299      { { "s0" }, "$16" },
4300      { { "s1" }, "$17" },
4301      { { "s2" }, "$18" },
4302      { { "s3" }, "$19" },
4303      { { "s4" }, "$20" },
4304      { { "s5" }, "$21" },
4305      { { "s6" }, "$22" },
4306      { { "s7" }, "$23" },
4307      { { "t8" }, "$24" },
4308      { { "t9" }, "$25" },
4309      { { "k0" }, "$26" },
4310      { { "k1" }, "$27" },
4311      { { "gp" }, "$28" },
4312      { { "sp","$sp" }, "$29" },
4313      { { "fp","$fp" }, "$30" },
4314      { { "ra" }, "$31" }
4315    };
4316    Aliases = GCCRegAliases;
4317    NumAliases = llvm::array_lengthof(GCCRegAliases);
4318  }
4319};
4320
4321class Mips64EBTargetInfo : public Mips64TargetInfoBase {
4322  virtual void SetDescriptionString(const std::string &Name) {
4323    // Change DescriptionString only if ABI is n32.
4324    if (Name == "n32")
4325      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4326                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4327                          "v64:64:64-n32:64-S128";
4328  }
4329public:
4330  Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
4331    // Default ABI is n64.
4332    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4333                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4334                        "v64:64:64-n32:64-S128";
4335  }
4336  virtual void getTargetDefines(const LangOptions &Opts,
4337                                MacroBuilder &Builder) const {
4338    DefineStd(Builder, "MIPSEB", Opts);
4339    Builder.defineMacro("_MIPSEB");
4340    Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
4341  }
4342};
4343
4344class Mips64ELTargetInfo : public Mips64TargetInfoBase {
4345  virtual void SetDescriptionString(const std::string &Name) {
4346    // Change DescriptionString only if ABI is n32.
4347    if (Name == "n32")
4348      DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4349                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
4350                          "-v64:64:64-n32:64-S128";
4351  }
4352public:
4353  Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
4354    // Default ABI is n64.
4355    BigEndian = false;
4356    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4357                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4358                        "v64:64:64-n32:64-S128";
4359  }
4360  virtual void getTargetDefines(const LangOptions &Opts,
4361                                MacroBuilder &Builder) const {
4362    DefineStd(Builder, "MIPSEL", Opts);
4363    Builder.defineMacro("_MIPSEL");
4364    Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
4365  }
4366};
4367} // end anonymous namespace.
4368
4369namespace {
4370class PNaClTargetInfo : public TargetInfo {
4371public:
4372  PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
4373    BigEndian = false;
4374    this->UserLabelPrefix = "";
4375    this->LongAlign = 32;
4376    this->LongWidth = 32;
4377    this->PointerAlign = 32;
4378    this->PointerWidth = 32;
4379    this->IntMaxType = TargetInfo::SignedLongLong;
4380    this->UIntMaxType = TargetInfo::UnsignedLongLong;
4381    this->Int64Type = TargetInfo::SignedLongLong;
4382    this->DoubleAlign = 64;
4383    this->LongDoubleWidth = 64;
4384    this->LongDoubleAlign = 64;
4385    this->SizeType = TargetInfo::UnsignedInt;
4386    this->PtrDiffType = TargetInfo::SignedInt;
4387    this->IntPtrType = TargetInfo::SignedInt;
4388    this->RegParmMax = 2;
4389    DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
4390                        "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
4391  }
4392
4393  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
4394  }
4395  virtual void getArchDefines(const LangOptions &Opts,
4396                              MacroBuilder &Builder) const {
4397    Builder.defineMacro("__le32__");
4398    Builder.defineMacro("__pnacl__");
4399  }
4400  virtual void getTargetDefines(const LangOptions &Opts,
4401                                MacroBuilder &Builder) const {
4402    Builder.defineMacro("__LITTLE_ENDIAN__");
4403    getArchDefines(Opts, Builder);
4404  }
4405  virtual bool hasFeature(StringRef Feature) const {
4406    return Feature == "pnacl";
4407  }
4408  virtual void getTargetBuiltins(const Builtin::Info *&Records,
4409                                 unsigned &NumRecords) const {
4410  }
4411  virtual BuiltinVaListKind getBuiltinVaListKind() const {
4412    return TargetInfo::PNaClABIBuiltinVaList;
4413  }
4414  virtual void getGCCRegNames(const char * const *&Names,
4415                              unsigned &NumNames) const;
4416  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4417                                unsigned &NumAliases) const;
4418  virtual bool validateAsmConstraint(const char *&Name,
4419                                     TargetInfo::ConstraintInfo &Info) const {
4420    return false;
4421  }
4422
4423  virtual const char *getClobbers() const {
4424    return "";
4425  }
4426};
4427
4428void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
4429                                     unsigned &NumNames) const {
4430  Names = NULL;
4431  NumNames = 0;
4432}
4433
4434void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
4435                                       unsigned &NumAliases) const {
4436  Aliases = NULL;
4437  NumAliases = 0;
4438}
4439} // end anonymous namespace.
4440
4441namespace {
4442  static const unsigned SPIRAddrSpaceMap[] = {
4443    1,    // opencl_global
4444    3,    // opencl_local
4445    2,    // opencl_constant
4446    0,    // cuda_device
4447    0,    // cuda_constant
4448    0     // cuda_shared
4449  };
4450  class SPIRTargetInfo : public TargetInfo {
4451    static const char * const GCCRegNames[];
4452    static const Builtin::Info BuiltinInfo[];
4453    std::vector<StringRef> AvailableFeatures;
4454  public:
4455    SPIRTargetInfo(const std::string& triple) : TargetInfo(triple) {
4456      assert(getTriple().getOS() == llvm::Triple::UnknownOS &&
4457        "SPIR target must use unknown OS");
4458      assert(getTriple().getEnvironment() == llvm::Triple::UnknownEnvironment &&
4459        "SPIR target must use unknown environment type");
4460      BigEndian = false;
4461      TLSSupported = false;
4462      LongWidth = LongAlign = 64;
4463      AddrSpaceMap = &SPIRAddrSpaceMap;
4464      // Define available target features
4465      // These must be defined in sorted order!
4466      NoAsmVariants = true;
4467    }
4468    virtual void getTargetDefines(const LangOptions &Opts,
4469                                  MacroBuilder &Builder) const {
4470      DefineStd(Builder, "SPIR", Opts);
4471    }
4472    virtual bool hasFeature(StringRef Feature) const {
4473      return Feature == "spir";
4474    }
4475
4476    virtual void getTargetBuiltins(const Builtin::Info *&Records,
4477                                   unsigned &NumRecords) const {}
4478    virtual const char *getClobbers() const {
4479      return "";
4480    }
4481    virtual void getGCCRegNames(const char * const *&Names,
4482                                unsigned &NumNames) const {}
4483    virtual bool validateAsmConstraint(const char *&Name,
4484                                       TargetInfo::ConstraintInfo &info) const {
4485      return true;
4486    }
4487    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4488                                  unsigned &NumAliases) const {}
4489    virtual BuiltinVaListKind getBuiltinVaListKind() const {
4490      return TargetInfo::VoidPtrBuiltinVaList;
4491    }
4492  };
4493
4494
4495  class SPIR32TargetInfo : public SPIRTargetInfo {
4496  public:
4497    SPIR32TargetInfo(const std::string& triple) : SPIRTargetInfo(triple) {
4498      PointerWidth = PointerAlign = 32;
4499      SizeType     = TargetInfo::UnsignedInt;
4500      PtrDiffType = IntPtrType = TargetInfo::SignedInt;
4501      DescriptionString
4502        = "p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
4503          "f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-"
4504          "v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-"
4505          "v512:512:512-v1024:1024:1024";
4506  }
4507  };
4508
4509  class SPIR64TargetInfo : public SPIRTargetInfo {
4510  public:
4511    SPIR64TargetInfo(const std::string& triple) : SPIRTargetInfo(triple) {
4512      PointerWidth = PointerAlign = 64;
4513      SizeType     = TargetInfo::UnsignedLong;
4514      PtrDiffType = IntPtrType = TargetInfo::SignedLong;
4515      DescriptionString
4516        = "p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
4517          "f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-"
4518          "v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-"
4519          "v512:512:512-v1024:1024:1024";
4520  }
4521  };
4522}
4523
4524
4525//===----------------------------------------------------------------------===//
4526// Driver code
4527//===----------------------------------------------------------------------===//
4528
4529static TargetInfo *AllocateTarget(const std::string &T) {
4530  llvm::Triple Triple(T);
4531  llvm::Triple::OSType os = Triple.getOS();
4532
4533  switch (Triple.getArch()) {
4534  default:
4535    return NULL;
4536
4537  case llvm::Triple::hexagon:
4538    return new HexagonTargetInfo(T);
4539
4540  case llvm::Triple::arm:
4541  case llvm::Triple::thumb:
4542    if (Triple.isOSDarwin())
4543      return new DarwinARMTargetInfo(T);
4544
4545    switch (os) {
4546    case llvm::Triple::Linux:
4547      return new LinuxTargetInfo<ARMTargetInfo>(T);
4548    case llvm::Triple::FreeBSD:
4549      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
4550    case llvm::Triple::NetBSD:
4551      return new NetBSDTargetInfo<ARMTargetInfo>(T);
4552    case llvm::Triple::OpenBSD:
4553      return new OpenBSDTargetInfo<ARMTargetInfo>(T);
4554    case llvm::Triple::Bitrig:
4555      return new BitrigTargetInfo<ARMTargetInfo>(T);
4556    case llvm::Triple::RTEMS:
4557      return new RTEMSTargetInfo<ARMTargetInfo>(T);
4558    case llvm::Triple::NaCl:
4559      return new NaClTargetInfo<ARMTargetInfo>(T);
4560    default:
4561      return new ARMTargetInfo(T);
4562    }
4563
4564  case llvm::Triple::msp430:
4565    return new MSP430TargetInfo(T);
4566
4567  case llvm::Triple::mips:
4568    switch (os) {
4569    case llvm::Triple::Linux:
4570      return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
4571    case llvm::Triple::RTEMS:
4572      return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
4573    case llvm::Triple::FreeBSD:
4574      return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
4575    case llvm::Triple::NetBSD:
4576      return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
4577    default:
4578      return new Mips32EBTargetInfo(T);
4579    }
4580
4581  case llvm::Triple::mipsel:
4582    switch (os) {
4583    case llvm::Triple::Linux:
4584      return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
4585    case llvm::Triple::RTEMS:
4586      return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
4587    case llvm::Triple::FreeBSD:
4588      return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
4589    case llvm::Triple::NetBSD:
4590      return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
4591    default:
4592      return new Mips32ELTargetInfo(T);
4593    }
4594
4595  case llvm::Triple::mips64:
4596    switch (os) {
4597    case llvm::Triple::Linux:
4598      return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
4599    case llvm::Triple::RTEMS:
4600      return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
4601    case llvm::Triple::FreeBSD:
4602      return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
4603    case llvm::Triple::NetBSD:
4604      return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
4605    case llvm::Triple::OpenBSD:
4606      return new OpenBSDTargetInfo<Mips64EBTargetInfo>(T);
4607    default:
4608      return new Mips64EBTargetInfo(T);
4609    }
4610
4611  case llvm::Triple::mips64el:
4612    switch (os) {
4613    case llvm::Triple::Linux:
4614      return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
4615    case llvm::Triple::RTEMS:
4616      return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
4617    case llvm::Triple::FreeBSD:
4618      return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
4619    case llvm::Triple::NetBSD:
4620      return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
4621    case llvm::Triple::OpenBSD:
4622      return new OpenBSDTargetInfo<Mips64ELTargetInfo>(T);
4623    default:
4624      return new Mips64ELTargetInfo(T);
4625    }
4626
4627  case llvm::Triple::le32:
4628    switch (os) {
4629      case llvm::Triple::NaCl:
4630        return new NaClTargetInfo<PNaClTargetInfo>(T);
4631      default:
4632        return NULL;
4633    }
4634
4635  case llvm::Triple::ppc:
4636    if (Triple.isOSDarwin())
4637      return new DarwinPPC32TargetInfo(T);
4638    switch (os) {
4639    case llvm::Triple::Linux:
4640      return new LinuxTargetInfo<PPC32TargetInfo>(T);
4641    case llvm::Triple::FreeBSD:
4642      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
4643    case llvm::Triple::NetBSD:
4644      return new NetBSDTargetInfo<PPC32TargetInfo>(T);
4645    case llvm::Triple::OpenBSD:
4646      return new OpenBSDTargetInfo<PPC32TargetInfo>(T);
4647    case llvm::Triple::RTEMS:
4648      return new RTEMSTargetInfo<PPC32TargetInfo>(T);
4649    default:
4650      return new PPC32TargetInfo(T);
4651    }
4652
4653  case llvm::Triple::ppc64:
4654    if (Triple.isOSDarwin())
4655      return new DarwinPPC64TargetInfo(T);
4656    switch (os) {
4657    case llvm::Triple::Linux:
4658      return new LinuxTargetInfo<PPC64TargetInfo>(T);
4659    case llvm::Triple::Lv2:
4660      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
4661    case llvm::Triple::FreeBSD:
4662      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
4663    case llvm::Triple::NetBSD:
4664      return new NetBSDTargetInfo<PPC64TargetInfo>(T);
4665    default:
4666      return new PPC64TargetInfo(T);
4667    }
4668
4669  case llvm::Triple::nvptx:
4670    return new NVPTX32TargetInfo(T);
4671  case llvm::Triple::nvptx64:
4672    return new NVPTX64TargetInfo(T);
4673
4674  case llvm::Triple::mblaze:
4675    return new MBlazeTargetInfo(T);
4676
4677  case llvm::Triple::r600:
4678    return new R600TargetInfo(T);
4679
4680  case llvm::Triple::sparc:
4681    switch (os) {
4682    case llvm::Triple::Linux:
4683      return new LinuxTargetInfo<SparcV8TargetInfo>(T);
4684    case llvm::Triple::AuroraUX:
4685      return new AuroraUXSparcV8TargetInfo(T);
4686    case llvm::Triple::Solaris:
4687      return new SolarisSparcV8TargetInfo(T);
4688    case llvm::Triple::NetBSD:
4689      return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
4690    case llvm::Triple::OpenBSD:
4691      return new OpenBSDTargetInfo<SparcV8TargetInfo>(T);
4692    case llvm::Triple::RTEMS:
4693      return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
4694    default:
4695      return new SparcV8TargetInfo(T);
4696    }
4697
4698  case llvm::Triple::tce:
4699    return new TCETargetInfo(T);
4700
4701  case llvm::Triple::x86:
4702    if (Triple.isOSDarwin())
4703      return new DarwinI386TargetInfo(T);
4704
4705    switch (os) {
4706    case llvm::Triple::AuroraUX:
4707      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
4708    case llvm::Triple::Linux:
4709      return new LinuxTargetInfo<X86_32TargetInfo>(T);
4710    case llvm::Triple::DragonFly:
4711      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
4712    case llvm::Triple::NetBSD:
4713      return new NetBSDI386TargetInfo(T);
4714    case llvm::Triple::OpenBSD:
4715      return new OpenBSDI386TargetInfo(T);
4716    case llvm::Triple::Bitrig:
4717      return new BitrigI386TargetInfo(T);
4718    case llvm::Triple::FreeBSD:
4719      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
4720    case llvm::Triple::Minix:
4721      return new MinixTargetInfo<X86_32TargetInfo>(T);
4722    case llvm::Triple::Solaris:
4723      return new SolarisTargetInfo<X86_32TargetInfo>(T);
4724    case llvm::Triple::Cygwin:
4725      return new CygwinX86_32TargetInfo(T);
4726    case llvm::Triple::MinGW32:
4727      return new MinGWX86_32TargetInfo(T);
4728    case llvm::Triple::Win32:
4729      return new VisualStudioWindowsX86_32TargetInfo(T);
4730    case llvm::Triple::Haiku:
4731      return new HaikuX86_32TargetInfo(T);
4732    case llvm::Triple::RTEMS:
4733      return new RTEMSX86_32TargetInfo(T);
4734    case llvm::Triple::NaCl:
4735      return new NaClTargetInfo<X86_32TargetInfo>(T);
4736    default:
4737      return new X86_32TargetInfo(T);
4738    }
4739
4740  case llvm::Triple::x86_64:
4741    if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
4742      return new DarwinX86_64TargetInfo(T);
4743
4744    switch (os) {
4745    case llvm::Triple::AuroraUX:
4746      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
4747    case llvm::Triple::Linux:
4748      return new LinuxTargetInfo<X86_64TargetInfo>(T);
4749    case llvm::Triple::DragonFly:
4750      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
4751    case llvm::Triple::NetBSD:
4752      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
4753    case llvm::Triple::OpenBSD:
4754      return new OpenBSDX86_64TargetInfo(T);
4755    case llvm::Triple::Bitrig:
4756      return new BitrigX86_64TargetInfo(T);
4757    case llvm::Triple::FreeBSD:
4758      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
4759    case llvm::Triple::Solaris:
4760      return new SolarisTargetInfo<X86_64TargetInfo>(T);
4761    case llvm::Triple::MinGW32:
4762      return new MinGWX86_64TargetInfo(T);
4763    case llvm::Triple::Win32:   // This is what Triple.h supports now.
4764      return new VisualStudioWindowsX86_64TargetInfo(T);
4765    case llvm::Triple::NaCl:
4766      return new NaClTargetInfo<X86_64TargetInfo>(T);
4767    default:
4768      return new X86_64TargetInfo(T);
4769    }
4770
4771    case llvm::Triple::spir: {
4772      llvm::Triple Triple(T);
4773      if (Triple.getOS() != llvm::Triple::UnknownOS ||
4774        Triple.getEnvironment() != llvm::Triple::UnknownEnvironment)
4775        return NULL;
4776      return new SPIR32TargetInfo(T);
4777    }
4778    case llvm::Triple::spir64: {
4779      llvm::Triple Triple(T);
4780      if (Triple.getOS() != llvm::Triple::UnknownOS ||
4781        Triple.getEnvironment() != llvm::Triple::UnknownEnvironment)
4782        return NULL;
4783      return new SPIR64TargetInfo(T);
4784    }
4785  }
4786}
4787
4788/// CreateTargetInfo - Return the target info object for the specified target
4789/// triple.
4790TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
4791                                         TargetOptions *Opts) {
4792  llvm::Triple Triple(Opts->Triple);
4793
4794  // Construct the target
4795  OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
4796  if (!Target) {
4797    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
4798    return 0;
4799  }
4800  Target->setTargetOpts(Opts);
4801
4802  // Set the target CPU if specified.
4803  if (!Opts->CPU.empty() && !Target->setCPU(Opts->CPU)) {
4804    Diags.Report(diag::err_target_unknown_cpu) << Opts->CPU;
4805    return 0;
4806  }
4807
4808  // Set the target ABI if specified.
4809  if (!Opts->ABI.empty() && !Target->setABI(Opts->ABI)) {
4810    Diags.Report(diag::err_target_unknown_abi) << Opts->ABI;
4811    return 0;
4812  }
4813
4814  // Set the target C++ ABI.
4815  if (!Opts->CXXABI.empty() && !Target->setCXXABI(Opts->CXXABI)) {
4816    Diags.Report(diag::err_target_unknown_cxxabi) << Opts->CXXABI;
4817    return 0;
4818  }
4819
4820  // Compute the default target features, we need the target to handle this
4821  // because features may have dependencies on one another.
4822  llvm::StringMap<bool> Features;
4823  Target->getDefaultFeatures(Features);
4824
4825  // Apply the user specified deltas.
4826  // First the enables.
4827  for (std::vector<std::string>::const_iterator
4828         it = Opts->FeaturesAsWritten.begin(),
4829         ie = Opts->FeaturesAsWritten.end();
4830       it != ie; ++it) {
4831    const char *Name = it->c_str();
4832
4833    if (Name[0] != '+')
4834      continue;
4835
4836    // Apply the feature via the target.
4837    if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
4838      Diags.Report(diag::err_target_invalid_feature) << Name;
4839      return 0;
4840    }
4841  }
4842
4843  // Then the disables.
4844  for (std::vector<std::string>::const_iterator
4845         it = Opts->FeaturesAsWritten.begin(),
4846         ie = Opts->FeaturesAsWritten.end();
4847       it != ie; ++it) {
4848    const char *Name = it->c_str();
4849
4850    if (Name[0] == '+')
4851      continue;
4852
4853    // Apply the feature via the target.
4854    if (Name[0] != '-' ||
4855        !Target->setFeatureEnabled(Features, Name + 1, false)) {
4856      Diags.Report(diag::err_target_invalid_feature) << Name;
4857      return 0;
4858    }
4859  }
4860
4861  // Add the features to the compile options.
4862  //
4863  // FIXME: If we are completely confident that we have the right set, we only
4864  // need to pass the minuses.
4865  Opts->Features.clear();
4866  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
4867         ie = Features.end(); it != ie; ++it)
4868    Opts->Features.push_back((it->second ? "+" : "-") + it->first().str());
4869  Target->HandleTargetFeatures(Opts->Features);
4870
4871  return Target.take();
4872}
4873