Targets.cpp revision dd53ec9524cff66dfd7d4ea45ed651bf682a3254 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include <algorithm>
30using namespace clang;
31
32//===----------------------------------------------------------------------===//
33//  Common code shared among targets.
34//===----------------------------------------------------------------------===//
35
36/// DefineStd - Define a macro name and standard variants.  For example if
37/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
38/// when in GNU mode.
39static void DefineStd(MacroBuilder &Builder, llvm::StringRef MacroName,
40                      const LangOptions &Opts) {
41  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
42
43  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
44  // in the user's namespace.
45  if (Opts.GNUMode)
46    Builder.defineMacro(MacroName);
47
48  // Define __unix.
49  Builder.defineMacro("__" + MacroName);
50
51  // Define __unix__.
52  Builder.defineMacro("__" + MacroName + "__");
53}
54
55//===----------------------------------------------------------------------===//
56// Defines specific to certain operating systems.
57//===----------------------------------------------------------------------===//
58
59namespace {
60template<typename TgtInfo>
61class OSTargetInfo : public TgtInfo {
62protected:
63  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
64                            MacroBuilder &Builder) const=0;
65public:
66  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
67  virtual void getTargetDefines(const LangOptions &Opts,
68                                MacroBuilder &Builder) const {
69    TgtInfo::getTargetDefines(Opts, Builder);
70    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
71  }
72
73};
74} // end anonymous namespace
75
76
77static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
78                             const llvm::Triple &Triple) {
79  Builder.defineMacro("__APPLE_CC__", "5621");
80  Builder.defineMacro("__APPLE__");
81  Builder.defineMacro("__MACH__");
82  Builder.defineMacro("OBJC_NEW_PROPERTIES");
83
84  // __weak is always defined, for use in blocks and with objc pointers.
85  Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
86
87  // Darwin defines __strong even in C mode (just to nothing).
88  if (!Opts.ObjC1 || Opts.getGCMode() == LangOptions::NonGC)
89    Builder.defineMacro("__strong", "");
90  else
91    Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
92
93  if (Opts.Static)
94    Builder.defineMacro("__STATIC__");
95  else
96    Builder.defineMacro("__DYNAMIC__");
97
98  if (Opts.POSIXThreads)
99    Builder.defineMacro("_REENTRANT");
100
101  // Get the OS version number from the triple.
102  unsigned Maj, Min, Rev;
103
104  // If no version was given, default to to 10.4.0, for simplifying tests.
105  if (Triple.getOSName() == "darwin") {
106    Min = Rev = 0;
107    Maj = 8;
108  } else
109    Triple.getDarwinNumber(Maj, Min, Rev);
110
111  // Set the appropriate OS version define.
112  if (Triple.getEnvironmentName() == "iphoneos") {
113    assert(Maj < 10 && Min < 99 && Rev < 99 && "Invalid version!");
114    char Str[6];
115    Str[0] = '0' + Maj;
116    Str[1] = '0' + (Min / 10);
117    Str[2] = '0' + (Min % 10);
118    Str[3] = '0' + (Rev / 10);
119    Str[4] = '0' + (Rev % 10);
120    Str[5] = '\0';
121    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
122  } else {
123    // For historical reasons that make little sense, the version passed here is
124    // the "darwin" version, which drops the 10 and offsets by 4.
125    Rev = Min;
126    Min = Maj - 4;
127    Maj = 10;
128
129    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
130    assert(Maj < 99 && Min < 10 && Rev < 10 && "Invalid version!");
131    char Str[5];
132    Str[0] = '0' + (Maj / 10);
133    Str[1] = '0' + (Maj % 10);
134    Str[2] = '0' + Min;
135    Str[3] = '0' + Rev;
136    Str[4] = '\0';
137    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
138  }
139}
140
141namespace {
142template<typename Target>
143class DarwinTargetInfo : public OSTargetInfo<Target> {
144protected:
145  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
146                            MacroBuilder &Builder) const {
147    getDarwinDefines(Builder, Opts, Triple);
148  }
149
150public:
151  DarwinTargetInfo(const std::string& triple) :
152    OSTargetInfo<Target>(triple) {
153      this->TLSSupported = llvm::Triple(triple).getDarwinMajorNumber() > 10;
154    }
155
156  virtual std::string isValidSectionSpecifier(llvm::StringRef SR) const {
157    // Let MCSectionMachO validate this.
158    llvm::StringRef Segment, Section;
159    unsigned TAA, StubSize;
160    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
161                                                       TAA, StubSize);
162  }
163
164  virtual const char *getStaticInitSectionSpecifier() const {
165    // FIXME: We should return 0 when building kexts.
166    return "__TEXT,__StaticInit,regular,pure_instructions";
167  }
168
169};
170
171
172// DragonFlyBSD Target
173template<typename Target>
174class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
175protected:
176  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
177                            MacroBuilder &Builder) const {
178    // DragonFly defines; list based off of gcc output
179    Builder.defineMacro("__DragonFly__");
180    Builder.defineMacro("__DragonFly_cc_version", "100001");
181    Builder.defineMacro("__ELF__");
182    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
183    Builder.defineMacro("__tune_i386__");
184    DefineStd(Builder, "unix", Opts);
185  }
186public:
187  DragonFlyBSDTargetInfo(const std::string &triple)
188    : OSTargetInfo<Target>(triple) {}
189};
190
191// FreeBSD Target
192template<typename Target>
193class FreeBSDTargetInfo : public OSTargetInfo<Target> {
194protected:
195  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
196                            MacroBuilder &Builder) const {
197    // FreeBSD defines; list based off of gcc output
198
199    // FIXME: Move version number handling to llvm::Triple.
200    llvm::StringRef Release = Triple.getOSName().substr(strlen("freebsd"), 1);
201
202    Builder.defineMacro("__FreeBSD__", Release);
203    Builder.defineMacro("__FreeBSD_cc_version", Release + "00001");
204    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
205    DefineStd(Builder, "unix", Opts);
206    Builder.defineMacro("__ELF__");
207  }
208public:
209  FreeBSDTargetInfo(const std::string &triple)
210    : OSTargetInfo<Target>(triple) {
211      this->UserLabelPrefix = "";
212    }
213};
214
215// Linux target
216template<typename Target>
217class LinuxTargetInfo : public OSTargetInfo<Target> {
218protected:
219  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
220                            MacroBuilder &Builder) const {
221    // Linux defines; list based off of gcc output
222    DefineStd(Builder, "unix", Opts);
223    DefineStd(Builder, "linux", Opts);
224    Builder.defineMacro("__gnu_linux__");
225    Builder.defineMacro("__ELF__");
226    if (Opts.POSIXThreads)
227      Builder.defineMacro("_REENTRANT");
228    if (Opts.CPlusPlus)
229      Builder.defineMacro("_GNU_SOURCE");
230  }
231public:
232  LinuxTargetInfo(const std::string& triple)
233    : OSTargetInfo<Target>(triple) {
234    this->UserLabelPrefix = "";
235  }
236};
237
238// NetBSD Target
239template<typename Target>
240class NetBSDTargetInfo : public OSTargetInfo<Target> {
241protected:
242  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
243                            MacroBuilder &Builder) const {
244    // NetBSD defines; list based off of gcc output
245    Builder.defineMacro("__NetBSD__");
246    Builder.defineMacro("__unix__");
247    Builder.defineMacro("__ELF__");
248    if (Opts.POSIXThreads)
249      Builder.defineMacro("_POSIX_THREADS");
250  }
251public:
252  NetBSDTargetInfo(const std::string &triple)
253    : OSTargetInfo<Target>(triple) {
254      this->UserLabelPrefix = "";
255    }
256};
257
258// OpenBSD Target
259template<typename Target>
260class OpenBSDTargetInfo : public OSTargetInfo<Target> {
261protected:
262  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
263                            MacroBuilder &Builder) const {
264    // OpenBSD defines; list based off of gcc output
265
266    Builder.defineMacro("__OpenBSD__");
267    DefineStd(Builder, "unix", Opts);
268    Builder.defineMacro("__ELF__");
269    if (Opts.POSIXThreads)
270      Builder.defineMacro("_POSIX_THREADS");
271  }
272public:
273  OpenBSDTargetInfo(const std::string &triple)
274    : OSTargetInfo<Target>(triple) {}
275};
276
277// PSP Target
278template<typename Target>
279class PSPTargetInfo : public OSTargetInfo<Target> {
280protected:
281  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
282                            MacroBuilder &Builder) const {
283    // PSP defines; list based on the output of the pspdev gcc toolchain.
284    Builder.defineMacro("PSP");
285    Builder.defineMacro("_PSP");
286    Builder.defineMacro("__psp__");
287    Builder.defineMacro("__ELF__");
288  }
289public:
290  PSPTargetInfo(const std::string& triple)
291    : OSTargetInfo<Target>(triple) {
292    this->UserLabelPrefix = "";
293  }
294};
295
296// PS3 PPU Target
297template<typename Target>
298class PS3PPUTargetInfo : public OSTargetInfo<Target> {
299protected:
300  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
301                            MacroBuilder &Builder) const {
302    // PS3 PPU defines.
303    Builder.defineMacro("__PPC__");
304    Builder.defineMacro("__PPU__");
305    Builder.defineMacro("__CELLOS_LV2__");
306    Builder.defineMacro("__ELF__");
307    Builder.defineMacro("__LP32__");
308    Builder.defineMacro("_ARCH_PPC64");
309    Builder.defineMacro("__powerpc64__");
310  }
311public:
312  PS3PPUTargetInfo(const std::string& triple)
313    : OSTargetInfo<Target>(triple) {
314    this->UserLabelPrefix = "";
315    this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32;
316    this->IntMaxType = TargetInfo::SignedLongLong;
317    this->UIntMaxType = TargetInfo::UnsignedLongLong;
318    this->Int64Type = TargetInfo::SignedLongLong;
319    this->SizeType = TargetInfo::UnsignedInt;
320    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
321                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
322  }
323};
324
325// FIXME: Need a real SPU target.
326// PS3 SPU Target
327template<typename Target>
328class PS3SPUTargetInfo : public OSTargetInfo<Target> {
329protected:
330  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
331                            MacroBuilder &Builder) const {
332    // PS3 PPU defines.
333    Builder.defineMacro("__SPU__");
334    Builder.defineMacro("__ELF__");
335  }
336public:
337  PS3SPUTargetInfo(const std::string& triple)
338    : OSTargetInfo<Target>(triple) {
339    this->UserLabelPrefix = "";
340  }
341};
342
343// AuroraUX target
344template<typename Target>
345class AuroraUXTargetInfo : public OSTargetInfo<Target> {
346protected:
347  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
348                            MacroBuilder &Builder) const {
349    DefineStd(Builder, "sun", Opts);
350    DefineStd(Builder, "unix", Opts);
351    Builder.defineMacro("__ELF__");
352    Builder.defineMacro("__svr4__");
353    Builder.defineMacro("__SVR4");
354  }
355public:
356  AuroraUXTargetInfo(const std::string& triple)
357    : OSTargetInfo<Target>(triple) {
358    this->UserLabelPrefix = "";
359    this->WCharType = this->SignedLong;
360    // FIXME: WIntType should be SignedLong
361  }
362};
363
364// Solaris target
365template<typename Target>
366class SolarisTargetInfo : public OSTargetInfo<Target> {
367protected:
368  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
369                            MacroBuilder &Builder) const {
370    DefineStd(Builder, "sun", Opts);
371    DefineStd(Builder, "unix", Opts);
372    Builder.defineMacro("__ELF__");
373    Builder.defineMacro("__svr4__");
374    Builder.defineMacro("__SVR4");
375  }
376public:
377  SolarisTargetInfo(const std::string& triple)
378    : OSTargetInfo<Target>(triple) {
379    this->UserLabelPrefix = "";
380    this->WCharType = this->SignedLong;
381    // FIXME: WIntType should be SignedLong
382  }
383};
384} // end anonymous namespace.
385
386//===----------------------------------------------------------------------===//
387// Specific target implementations.
388//===----------------------------------------------------------------------===//
389
390namespace {
391// PPC abstract base class
392class PPCTargetInfo : public TargetInfo {
393  static const Builtin::Info BuiltinInfo[];
394  static const char * const GCCRegNames[];
395  static const TargetInfo::GCCRegAlias GCCRegAliases[];
396
397public:
398  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {}
399
400  virtual void getTargetBuiltins(const Builtin::Info *&Records,
401                                 unsigned &NumRecords) const {
402    Records = BuiltinInfo;
403    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
404  }
405
406  virtual void getTargetDefines(const LangOptions &Opts,
407                                MacroBuilder &Builder) const;
408
409  virtual const char *getVAListDeclaration() const {
410    return "typedef char* __builtin_va_list;";
411    // This is the right definition for ABI/V4: System V.4/eabi.
412    /*return "typedef struct __va_list_tag {"
413           "  unsigned char gpr;"
414           "  unsigned char fpr;"
415           "  unsigned short reserved;"
416           "  void* overflow_arg_area;"
417           "  void* reg_save_area;"
418           "} __builtin_va_list[1];";*/
419  }
420  virtual void getGCCRegNames(const char * const *&Names,
421                              unsigned &NumNames) const;
422  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
423                                unsigned &NumAliases) const;
424  virtual bool validateAsmConstraint(const char *&Name,
425                                     TargetInfo::ConstraintInfo &Info) const {
426    switch (*Name) {
427    default: return false;
428    case 'O': // Zero
429      break;
430    case 'b': // Base register
431    case 'f': // Floating point register
432      Info.setAllowsRegister();
433      break;
434    // FIXME: The following are added to allow parsing.
435    // I just took a guess at what the actions should be.
436    // Also, is more specific checking needed?  I.e. specific registers?
437    case 'd': // Floating point register (containing 64-bit value)
438    case 'v': // Altivec vector register
439      Info.setAllowsRegister();
440      break;
441    case 'w':
442      switch (Name[1]) {
443        case 'd':// VSX vector register to hold vector double data
444        case 'f':// VSX vector register to hold vector float data
445        case 's':// VSX vector register to hold scalar float data
446        case 'a':// Any VSX register
447          break;
448        default:
449          return false;
450      }
451      Info.setAllowsRegister();
452      Name++; // Skip over 'w'.
453      break;
454    case 'h': // `MQ', `CTR', or `LINK' register
455    case 'q': // `MQ' register
456    case 'c': // `CTR' register
457    case 'l': // `LINK' register
458    case 'x': // `CR' register (condition register) number 0
459    case 'y': // `CR' register (condition register)
460    case 'z': // `XER[CA]' carry bit (part of the XER register)
461      Info.setAllowsRegister();
462      break;
463    case 'I': // Signed 16-bit constant
464    case 'J': // Unsigned 16-bit constant shifted left 16 bits
465              //  (use `L' instead for SImode constants)
466    case 'K': // Unsigned 16-bit constant
467    case 'L': // Signed 16-bit constant shifted left 16 bits
468    case 'M': // Constant larger than 31
469    case 'N': // Exact power of 2
470    case 'P': // Constant whose negation is a signed 16-bit constant
471    case 'G': // Floating point constant that can be loaded into a
472              // register with one instruction per word
473    case 'H': // Integer/Floating point constant that can be loaded
474              // into a register using three instructions
475      break;
476    case 'm': // Memory operand. Note that on PowerPC targets, m can
477              // include addresses that update the base register. It
478              // is therefore only safe to use `m' in an asm statement
479              // if that asm statement accesses the operand exactly once.
480              // The asm statement must also use `%U<opno>' as a
481              // placeholder for the �update� flag in the corresponding
482              // load or store instruction. For example:
483              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
484              // is correct but:
485              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
486              // is not. Use es rather than m if you don't want the base
487              // register to be updated.
488    case 'e':
489      if (Name[1] != 's')
490          return false;
491              // es: A �stable� memory operand; that is, one which does not
492              // include any automodification of the base register. Unlike
493              // `m', this constraint can be used in asm statements that
494              // might access the operand several times, or that might not
495              // access it at all.
496      Info.setAllowsMemory();
497      Name++; // Skip over 'e'.
498      break;
499    case 'Q': // Memory operand that is an offset from a register (it is
500              // usually better to use `m' or `es' in asm statements)
501    case 'Z': // Memory operand that is an indexed or indirect from a
502              // register (it is usually better to use `m' or `es' in
503              // asm statements)
504      Info.setAllowsMemory();
505      Info.setAllowsRegister();
506      break;
507    case 'R': // AIX TOC entry
508    case 'a': // Address operand that is an indexed or indirect from a
509              // register (`p' is preferable for asm statements)
510    case 'S': // Constant suitable as a 64-bit mask operand
511    case 'T': // Constant suitable as a 32-bit mask operand
512    case 'U': // System V Release 4 small data area reference
513    case 't': // AND masks that can be performed by two rldic{l, r}
514              // instructions
515    case 'W': // Vector constant that does not require memory
516    case 'j': // Vector constant that is all zeros.
517      break;
518    // End FIXME.
519    }
520    return true;
521  }
522  virtual const char *getClobbers() const {
523    return "";
524  }
525};
526
527const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
528#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, false },
529#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER, false },
530#include "clang/Basic/BuiltinsPPC.def"
531};
532
533
534/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
535/// #defines that are not tied to a specific subtarget.
536void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
537                                     MacroBuilder &Builder) const {
538  // Target identification.
539  Builder.defineMacro("__ppc__");
540  Builder.defineMacro("_ARCH_PPC");
541  Builder.defineMacro("__powerpc__");
542  Builder.defineMacro("__POWERPC__");
543  if (PointerWidth == 64) {
544    Builder.defineMacro("_ARCH_PPC64");
545    Builder.defineMacro("_LP64");
546    Builder.defineMacro("__LP64__");
547    Builder.defineMacro("__powerpc64__");
548    Builder.defineMacro("__ppc64__");
549  } else {
550    Builder.defineMacro("__ppc__");
551  }
552
553  // Target properties.
554  Builder.defineMacro("_BIG_ENDIAN");
555  Builder.defineMacro("__BIG_ENDIAN__");
556
557  // Subtarget options.
558  Builder.defineMacro("__NATURAL_ALIGNMENT__");
559  Builder.defineMacro("__REGISTER_PREFIX__", "");
560
561  // FIXME: Should be controlled by command line option.
562  Builder.defineMacro("__LONG_DOUBLE_128__");
563
564  if (Opts.AltiVec) {
565    Builder.defineMacro("__VEC__", "10206");
566    Builder.defineMacro("__ALTIVEC__");
567  }
568}
569
570
571const char * const PPCTargetInfo::GCCRegNames[] = {
572  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
573  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
574  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
575  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
576  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
577  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
578  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
579  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
580  "mq", "lr", "ctr", "ap",
581  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
582  "xer",
583  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
584  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
585  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
586  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
587  "vrsave", "vscr",
588  "spe_acc", "spefscr",
589  "sfp"
590};
591
592void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
593                                   unsigned &NumNames) const {
594  Names = GCCRegNames;
595  NumNames = llvm::array_lengthof(GCCRegNames);
596}
597
598const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
599  // While some of these aliases do map to different registers
600  // they still share the same register name.
601  { { "0" }, "r0" },
602  { { "1"}, "r1" },
603  { { "2" }, "r2" },
604  { { "3" }, "r3" },
605  { { "4" }, "r4" },
606  { { "5" }, "r5" },
607  { { "6" }, "r6" },
608  { { "7" }, "r7" },
609  { { "8" }, "r8" },
610  { { "9" }, "r9" },
611  { { "10" }, "r10" },
612  { { "11" }, "r11" },
613  { { "12" }, "r12" },
614  { { "13" }, "r13" },
615  { { "14" }, "r14" },
616  { { "15" }, "r15" },
617  { { "16" }, "r16" },
618  { { "17" }, "r17" },
619  { { "18" }, "r18" },
620  { { "19" }, "r19" },
621  { { "20" }, "r20" },
622  { { "21" }, "r21" },
623  { { "22" }, "r22" },
624  { { "23" }, "r23" },
625  { { "24" }, "r24" },
626  { { "25" }, "r25" },
627  { { "26" }, "r26" },
628  { { "27" }, "r27" },
629  { { "28" }, "r28" },
630  { { "29" }, "r29" },
631  { { "30" }, "r30" },
632  { { "31" }, "r31" },
633  { { "fr0" }, "f0" },
634  { { "fr1" }, "f1" },
635  { { "fr2" }, "f2" },
636  { { "fr3" }, "f3" },
637  { { "fr4" }, "f4" },
638  { { "fr5" }, "f5" },
639  { { "fr6" }, "f6" },
640  { { "fr7" }, "f7" },
641  { { "fr8" }, "f8" },
642  { { "fr9" }, "f9" },
643  { { "fr10" }, "f10" },
644  { { "fr11" }, "f11" },
645  { { "fr12" }, "f12" },
646  { { "fr13" }, "f13" },
647  { { "fr14" }, "f14" },
648  { { "fr15" }, "f15" },
649  { { "fr16" }, "f16" },
650  { { "fr17" }, "f17" },
651  { { "fr18" }, "f18" },
652  { { "fr19" }, "f19" },
653  { { "fr20" }, "f20" },
654  { { "fr21" }, "f21" },
655  { { "fr22" }, "f22" },
656  { { "fr23" }, "f23" },
657  { { "fr24" }, "f24" },
658  { { "fr25" }, "f25" },
659  { { "fr26" }, "f26" },
660  { { "fr27" }, "f27" },
661  { { "fr28" }, "f28" },
662  { { "fr29" }, "f29" },
663  { { "fr30" }, "f30" },
664  { { "fr31" }, "f31" },
665  { { "cc" }, "cr0" },
666};
667
668void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
669                                     unsigned &NumAliases) const {
670  Aliases = GCCRegAliases;
671  NumAliases = llvm::array_lengthof(GCCRegAliases);
672}
673} // end anonymous namespace.
674
675namespace {
676class PPC32TargetInfo : public PPCTargetInfo {
677public:
678  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
679    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
680                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
681
682    if (getTriple().getOS() == llvm::Triple::FreeBSD)
683        this->SizeType = TargetInfo::UnsignedInt;
684  }
685};
686} // end anonymous namespace.
687
688namespace {
689class PPC64TargetInfo : public PPCTargetInfo {
690public:
691  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
692    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
693    IntMaxType = SignedLong;
694    UIntMaxType = UnsignedLong;
695    Int64Type = SignedLong;
696    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
697                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
698  }
699};
700} // end anonymous namespace.
701
702
703namespace {
704class DarwinPPCTargetInfo :
705  public DarwinTargetInfo<PPCTargetInfo> {
706public:
707  DarwinPPCTargetInfo(const std::string& triple)
708    : DarwinTargetInfo<PPCTargetInfo>(triple) {
709    HasAlignMac68kSupport = true;
710  }
711};
712
713class DarwinPPC64TargetInfo :
714  public DarwinTargetInfo<PPC64TargetInfo> {
715public:
716  DarwinPPC64TargetInfo(const std::string& triple)
717    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
718    HasAlignMac68kSupport = true;
719  }
720};
721} // end anonymous namespace.
722
723namespace {
724// MBlaze abstract base class
725class MBlazeTargetInfo : public TargetInfo {
726  static const char * const GCCRegNames[];
727  static const TargetInfo::GCCRegAlias GCCRegAliases[];
728
729public:
730  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
731    DescriptionString = "E-p:32:32-i8:8:8-i16:16:16-i64:32:32-f64:32:32-"
732                        "v64:32:32-v128:32:32-n32";
733  }
734
735  virtual void getTargetBuiltins(const Builtin::Info *&Records,
736                                 unsigned &NumRecords) const {
737    // FIXME: Implement.
738    Records = 0;
739    NumRecords = 0;
740  }
741
742  virtual void getTargetDefines(const LangOptions &Opts,
743                                MacroBuilder &Builder) const;
744
745  virtual const char *getVAListDeclaration() const {
746    return "typedef char* __builtin_va_list;";
747  }
748  virtual const char *getTargetPrefix() const {
749    return "mblaze";
750  }
751  virtual void getGCCRegNames(const char * const *&Names,
752                              unsigned &NumNames) const;
753  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
754                                unsigned &NumAliases) const;
755  virtual bool validateAsmConstraint(const char *&Name,
756                                     TargetInfo::ConstraintInfo &Info) const {
757    switch (*Name) {
758    default: return false;
759    case 'O': // Zero
760      return true;
761    case 'b': // Base register
762    case 'f': // Floating point register
763      Info.setAllowsRegister();
764      return true;
765    }
766  }
767  virtual const char *getClobbers() const {
768    return "";
769  }
770};
771
772/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
773/// #defines that are not tied to a specific subtarget.
774void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
775                                     MacroBuilder &Builder) const {
776  // Target identification.
777  Builder.defineMacro("__microblaze__");
778  Builder.defineMacro("_ARCH_MICROBLAZE");
779  Builder.defineMacro("__MICROBLAZE__");
780
781  // Target properties.
782  Builder.defineMacro("_BIG_ENDIAN");
783  Builder.defineMacro("__BIG_ENDIAN__");
784
785  // Subtarget options.
786  Builder.defineMacro("__REGISTER_PREFIX__", "");
787}
788
789
790const char * const MBlazeTargetInfo::GCCRegNames[] = {
791  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
792  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
793  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
794  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
795  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
796  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
797  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
798  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
799  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
800  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
801};
802
803void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
804                                   unsigned &NumNames) const {
805  Names = GCCRegNames;
806  NumNames = llvm::array_lengthof(GCCRegNames);
807}
808
809const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
810  { {"f0"},  "r0" },
811  { {"f1"},  "r1" },
812  { {"f2"},  "r2" },
813  { {"f3"},  "r3" },
814  { {"f4"},  "r4" },
815  { {"f5"},  "r5" },
816  { {"f6"},  "r6" },
817  { {"f7"},  "r7" },
818  { {"f8"},  "r8" },
819  { {"f9"},  "r9" },
820  { {"f10"}, "r10" },
821  { {"f11"}, "r11" },
822  { {"f12"}, "r12" },
823  { {"f13"}, "r13" },
824  { {"f14"}, "r14" },
825  { {"f15"}, "r15" },
826  { {"f16"}, "r16" },
827  { {"f17"}, "r17" },
828  { {"f18"}, "r18" },
829  { {"f19"}, "r19" },
830  { {"f20"}, "r20" },
831  { {"f21"}, "r21" },
832  { {"f22"}, "r22" },
833  { {"f23"}, "r23" },
834  { {"f24"}, "r24" },
835  { {"f25"}, "r25" },
836  { {"f26"}, "r26" },
837  { {"f27"}, "r27" },
838  { {"f28"}, "r28" },
839  { {"f29"}, "r29" },
840  { {"f30"}, "r30" },
841  { {"f31"}, "r31" },
842};
843
844void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
845                                     unsigned &NumAliases) const {
846  Aliases = GCCRegAliases;
847  NumAliases = llvm::array_lengthof(GCCRegAliases);
848}
849} // end anonymous namespace.
850
851namespace {
852// Namespace for x86 abstract base class
853const Builtin::Info BuiltinInfo[] = {
854#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, false },
855#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER, false },
856#include "clang/Basic/BuiltinsX86.def"
857};
858
859static const char* const GCCRegNames[] = {
860  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
861  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
862  "argp", "flags", "fspr", "dirflag", "frame",
863  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
864  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
865  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
866  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"
867};
868
869const TargetInfo::GCCRegAlias GCCRegAliases[] = {
870  { { "al", "ah", "eax", "rax" }, "ax" },
871  { { "bl", "bh", "ebx", "rbx" }, "bx" },
872  { { "cl", "ch", "ecx", "rcx" }, "cx" },
873  { { "dl", "dh", "edx", "rdx" }, "dx" },
874  { { "esi", "rsi" }, "si" },
875  { { "edi", "rdi" }, "di" },
876  { { "esp", "rsp" }, "sp" },
877  { { "ebp", "rbp" }, "bp" },
878};
879
880// X86 target abstract base class; x86-32 and x86-64 are very close, so
881// most of the implementation can be shared.
882class X86TargetInfo : public TargetInfo {
883  enum X86SSEEnum {
884    NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
885  } SSELevel;
886  enum AMD3DNowEnum {
887    NoAMD3DNow, AMD3DNow, AMD3DNowAthlon
888  } AMD3DNowLevel;
889
890  bool HasAES;
891
892public:
893  X86TargetInfo(const std::string& triple)
894    : TargetInfo(triple), SSELevel(NoMMXSSE), AMD3DNowLevel(NoAMD3DNow),
895      HasAES(false) {
896    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
897  }
898  virtual void getTargetBuiltins(const Builtin::Info *&Records,
899                                 unsigned &NumRecords) const {
900    Records = BuiltinInfo;
901    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
902  }
903  virtual void getGCCRegNames(const char * const *&Names,
904                              unsigned &NumNames) const {
905    Names = GCCRegNames;
906    NumNames = llvm::array_lengthof(GCCRegNames);
907  }
908  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
909                                unsigned &NumAliases) const {
910    Aliases = GCCRegAliases;
911    NumAliases = llvm::array_lengthof(GCCRegAliases);
912  }
913  virtual bool validateAsmConstraint(const char *&Name,
914                                     TargetInfo::ConstraintInfo &info) const;
915  virtual std::string convertConstraint(const char Constraint) const;
916  virtual const char *getClobbers() const {
917    return "~{dirflag},~{fpsr},~{flags}";
918  }
919  virtual void getTargetDefines(const LangOptions &Opts,
920                                MacroBuilder &Builder) const;
921  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
922                                 const std::string &Name,
923                                 bool Enabled) const;
924  virtual void getDefaultFeatures(const std::string &CPU,
925                                  llvm::StringMap<bool> &Features) const;
926  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
927};
928
929void X86TargetInfo::getDefaultFeatures(const std::string &CPU,
930                                       llvm::StringMap<bool> &Features) const {
931  // FIXME: This should not be here.
932  Features["3dnow"] = false;
933  Features["3dnowa"] = false;
934  Features["mmx"] = false;
935  Features["sse"] = false;
936  Features["sse2"] = false;
937  Features["sse3"] = false;
938  Features["ssse3"] = false;
939  Features["sse41"] = false;
940  Features["sse42"] = false;
941  Features["aes"] = false;
942
943  // LLVM does not currently recognize this.
944  // Features["sse4a"] = false;
945
946  // FIXME: This *really* should not be here.
947
948  // X86_64 always has SSE2.
949  if (PointerWidth == 64)
950    Features["sse2"] = Features["sse"] = Features["mmx"] = true;
951
952  if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" ||
953      CPU == "pentium" || CPU == "i686" || CPU == "pentiumpro")
954    ;
955  else if (CPU == "pentium-mmx" || CPU == "pentium2")
956    setFeatureEnabled(Features, "mmx", true);
957  else if (CPU == "pentium3")
958    setFeatureEnabled(Features, "sse", true);
959  else if (CPU == "pentium-m" || CPU == "pentium4" || CPU == "x86-64")
960    setFeatureEnabled(Features, "sse2", true);
961  else if (CPU == "yonah" || CPU == "prescott" || CPU == "nocona")
962    setFeatureEnabled(Features, "sse3", true);
963  else if (CPU == "core2")
964    setFeatureEnabled(Features, "ssse3", true);
965  else if (CPU == "penryn") {
966    setFeatureEnabled(Features, "sse4", true);
967    Features["sse42"] = false;
968  } else if (CPU == "atom")
969    setFeatureEnabled(Features, "sse3", true);
970  else if (CPU == "corei7") {
971    setFeatureEnabled(Features, "sse4", true);
972    setFeatureEnabled(Features, "aes", true);
973  }
974  else if (CPU == "k6" || CPU == "winchip-c6")
975    setFeatureEnabled(Features, "mmx", true);
976  else if (CPU == "k6-2" || CPU == "k6-3" || CPU == "athlon" ||
977           CPU == "athlon-tbird" || CPU == "winchip2" || CPU == "c3") {
978    setFeatureEnabled(Features, "mmx", true);
979    setFeatureEnabled(Features, "3dnow", true);
980  } else if (CPU == "athlon-4" || CPU == "athlon-xp" || CPU == "athlon-mp") {
981    setFeatureEnabled(Features, "sse", true);
982    setFeatureEnabled(Features, "3dnowa", true);
983  } else if (CPU == "k8" || CPU == "opteron" || CPU == "athlon64" ||
984           CPU == "athlon-fx") {
985    setFeatureEnabled(Features, "sse2", true);
986    setFeatureEnabled(Features, "3dnowa", true);
987  } else if (CPU == "c3-2")
988    setFeatureEnabled(Features, "sse", true);
989}
990
991bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
992                                      const std::string &Name,
993                                      bool Enabled) const {
994  // FIXME: This *really* should not be here.  We need some way of translating
995  // options into llvm subtarget features.
996  if (!Features.count(Name) &&
997      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
998    return false;
999
1000  if (Enabled) {
1001    if (Name == "mmx")
1002      Features["mmx"] = true;
1003    else if (Name == "sse")
1004      Features["mmx"] = Features["sse"] = true;
1005    else if (Name == "sse2")
1006      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1007    else if (Name == "sse3")
1008      Features["mmx"] = Features["sse"] = Features["sse2"] =
1009        Features["sse3"] = true;
1010    else if (Name == "ssse3")
1011      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1012        Features["ssse3"] = true;
1013    else if (Name == "sse4" || Name == "sse4.2")
1014      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1015        Features["ssse3"] = Features["sse41"] = Features["sse42"] = true;
1016    else if (Name == "sse4.1")
1017      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1018        Features["ssse3"] = Features["sse41"] = true;
1019    else if (Name == "3dnow")
1020      Features["3dnowa"] = true;
1021    else if (Name == "3dnowa")
1022      Features["3dnow"] = Features["3dnowa"] = true;
1023    else if (Name == "aes")
1024      Features["aes"] = true;
1025  } else {
1026    if (Name == "mmx")
1027      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1028        Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1029    else if (Name == "sse")
1030      Features["sse"] = Features["sse2"] = Features["sse3"] =
1031        Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1032    else if (Name == "sse2")
1033      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1034        Features["sse41"] = Features["sse42"] = false;
1035    else if (Name == "sse3")
1036      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1037        Features["sse42"] = false;
1038    else if (Name == "ssse3")
1039      Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1040    else if (Name == "sse4")
1041      Features["sse41"] = Features["sse42"] = false;
1042    else if (Name == "sse4.2")
1043      Features["sse42"] = false;
1044    else if (Name == "sse4.1")
1045      Features["sse41"] = Features["sse42"] = false;
1046    else if (Name == "3dnow")
1047      Features["3dnow"] = Features["3dnowa"] = false;
1048    else if (Name == "3dnowa")
1049      Features["3dnowa"] = false;
1050    else if (Name == "aes")
1051      Features["aes"] = false;
1052  }
1053
1054  return true;
1055}
1056
1057/// HandleTargetOptions - Perform initialization based on the user
1058/// configured set of features.
1059void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1060  // Remember the maximum enabled sselevel.
1061  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1062    // Ignore disabled features.
1063    if (Features[i][0] == '-')
1064      continue;
1065
1066    if (Features[i].substr(1) == "aes") {
1067      HasAES = true;
1068      continue;
1069    }
1070
1071    assert(Features[i][0] == '+' && "Invalid target feature!");
1072    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
1073      .Case("sse42", SSE42)
1074      .Case("sse41", SSE41)
1075      .Case("ssse3", SSSE3)
1076      .Case("sse3", SSE3)
1077      .Case("sse2", SSE2)
1078      .Case("sse", SSE1)
1079      .Case("mmx", MMX)
1080      .Default(NoMMXSSE);
1081    SSELevel = std::max(SSELevel, Level);
1082
1083    AMD3DNowEnum ThreeDNowLevel =
1084      llvm::StringSwitch<AMD3DNowEnum>(Features[i].substr(1))
1085        .Case("3dnowa", AMD3DNowAthlon)
1086        .Case("3dnow", AMD3DNow)
1087        .Default(NoAMD3DNow);
1088
1089    AMD3DNowLevel = std::max(AMD3DNowLevel, ThreeDNowLevel);
1090  }
1091}
1092
1093/// X86TargetInfo::getTargetDefines - Return a set of the X86-specific #defines
1094/// that are not tied to a specific subtarget.
1095void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1096                                     MacroBuilder &Builder) const {
1097  // Target identification.
1098  if (PointerWidth == 64) {
1099    Builder.defineMacro("_LP64");
1100    Builder.defineMacro("__LP64__");
1101    Builder.defineMacro("__amd64__");
1102    Builder.defineMacro("__amd64");
1103    Builder.defineMacro("__x86_64");
1104    Builder.defineMacro("__x86_64__");
1105  } else {
1106    DefineStd(Builder, "i386", Opts);
1107  }
1108
1109  if (HasAES)
1110    Builder.defineMacro("__AES__");
1111
1112  // Target properties.
1113  Builder.defineMacro("__LITTLE_ENDIAN__");
1114
1115  // Subtarget options.
1116  Builder.defineMacro("__nocona");
1117  Builder.defineMacro("__nocona__");
1118  Builder.defineMacro("__tune_nocona__");
1119  Builder.defineMacro("__REGISTER_PREFIX__", "");
1120
1121  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
1122  // functions in glibc header files that use FP Stack inline asm which the
1123  // backend can't deal with (PR879).
1124  Builder.defineMacro("__NO_MATH_INLINES");
1125
1126  // Each case falls through to the previous one here.
1127  switch (SSELevel) {
1128  case SSE42:
1129    Builder.defineMacro("__SSE4_2__");
1130  case SSE41:
1131    Builder.defineMacro("__SSE4_1__");
1132  case SSSE3:
1133    Builder.defineMacro("__SSSE3__");
1134  case SSE3:
1135    Builder.defineMacro("__SSE3__");
1136  case SSE2:
1137    Builder.defineMacro("__SSE2__");
1138    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
1139  case SSE1:
1140    Builder.defineMacro("__SSE__");
1141    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
1142  case MMX:
1143    Builder.defineMacro("__MMX__");
1144  case NoMMXSSE:
1145    break;
1146  }
1147
1148  // Each case falls through to the previous one here.
1149  switch (AMD3DNowLevel) {
1150  case AMD3DNowAthlon:
1151    Builder.defineMacro("__3dNOW_A__");
1152  case AMD3DNow:
1153    Builder.defineMacro("__3dNOW__");
1154  case NoAMD3DNow:
1155    break;
1156  }
1157}
1158
1159
1160bool
1161X86TargetInfo::validateAsmConstraint(const char *&Name,
1162                                     TargetInfo::ConstraintInfo &Info) const {
1163  switch (*Name) {
1164  default: return false;
1165  case 'a': // eax.
1166  case 'b': // ebx.
1167  case 'c': // ecx.
1168  case 'd': // edx.
1169  case 'S': // esi.
1170  case 'D': // edi.
1171  case 'A': // edx:eax.
1172  case 't': // top of floating point stack.
1173  case 'u': // second from top of floating point stack.
1174  case 'q': // Any register accessible as [r]l: a, b, c, and d.
1175  case 'y': // Any MMX register.
1176  case 'x': // Any SSE register.
1177  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
1178  case 'e': // 32-bit signed integer constant for use with zero-extending
1179            // x86_64 instructions.
1180  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
1181            // x86_64 instructions.
1182  case 'N': // unsigned 8-bit integer constant for use with in and out
1183            // instructions.
1184  case 'R': // "legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
1185    Info.setAllowsRegister();
1186    return true;
1187  }
1188}
1189
1190std::string
1191X86TargetInfo::convertConstraint(const char Constraint) const {
1192  switch (Constraint) {
1193  case 'a': return std::string("{ax}");
1194  case 'b': return std::string("{bx}");
1195  case 'c': return std::string("{cx}");
1196  case 'd': return std::string("{dx}");
1197  case 'S': return std::string("{si}");
1198  case 'D': return std::string("{di}");
1199  case 't': // top of floating point stack.
1200    return std::string("{st}");
1201  case 'u': // second from top of floating point stack.
1202    return std::string("{st(1)}"); // second from top of floating point stack.
1203  default:
1204    return std::string(1, Constraint);
1205  }
1206}
1207} // end anonymous namespace
1208
1209namespace {
1210// X86-32 generic target
1211class X86_32TargetInfo : public X86TargetInfo {
1212public:
1213  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
1214    DoubleAlign = LongLongAlign = 32;
1215    LongDoubleWidth = 96;
1216    LongDoubleAlign = 32;
1217    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1218                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1219                        "a0:0:64-f80:32:32-n8:16:32";
1220    SizeType = UnsignedInt;
1221    PtrDiffType = SignedInt;
1222    IntPtrType = SignedInt;
1223    RegParmMax = 3;
1224  }
1225  virtual const char *getVAListDeclaration() const {
1226    return "typedef char* __builtin_va_list;";
1227  }
1228
1229  int getEHDataRegisterNumber(unsigned RegNo) const {
1230    if (RegNo == 0) return 0;
1231    if (RegNo == 1) return 2;
1232    return -1;
1233  }
1234};
1235} // end anonymous namespace
1236
1237namespace {
1238class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
1239public:
1240  OpenBSDI386TargetInfo(const std::string& triple) :
1241    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
1242    SizeType = UnsignedLong;
1243    IntPtrType = SignedLong;
1244    PtrDiffType = SignedLong;
1245  }
1246};
1247} // end anonymous namespace
1248
1249namespace {
1250class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
1251public:
1252  DarwinI386TargetInfo(const std::string& triple) :
1253    DarwinTargetInfo<X86_32TargetInfo>(triple) {
1254    LongDoubleWidth = 128;
1255    LongDoubleAlign = 128;
1256    SizeType = UnsignedLong;
1257    IntPtrType = SignedLong;
1258    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1259                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1260                        "a0:0:64-f80:128:128-n8:16:32";
1261    HasAlignMac68kSupport = true;
1262  }
1263
1264};
1265} // end anonymous namespace
1266
1267namespace {
1268// x86-32 Windows target
1269class WindowsX86_32TargetInfo : public X86_32TargetInfo {
1270public:
1271  WindowsX86_32TargetInfo(const std::string& triple)
1272    : X86_32TargetInfo(triple) {
1273    TLSSupported = false;
1274    WCharType = UnsignedShort;
1275    DoubleAlign = LongLongAlign = 64;
1276    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1277                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
1278                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32";
1279  }
1280  virtual void getTargetDefines(const LangOptions &Opts,
1281                                MacroBuilder &Builder) const {
1282    X86_32TargetInfo::getTargetDefines(Opts, Builder);
1283    // This list is based off of the the list of things MingW defines
1284    Builder.defineMacro("_WIN32");
1285    DefineStd(Builder, "WIN32", Opts);
1286    DefineStd(Builder, "WINNT", Opts);
1287    Builder.defineMacro("_X86_");
1288  }
1289};
1290} // end anonymous namespace
1291
1292namespace {
1293
1294// x86-32 Windows Visual Studio target
1295class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
1296public:
1297  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
1298    : WindowsX86_32TargetInfo(triple) {
1299  }
1300  virtual void getTargetDefines(const LangOptions &Opts,
1301                                MacroBuilder &Builder) const {
1302    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
1303    // The value of the following reflects processor type.
1304    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
1305    // We lost the original triple, so we use the default.
1306    Builder.defineMacro("_M_IX86", "600");
1307  }
1308};
1309} // end anonymous namespace
1310
1311namespace {
1312// x86-32 MinGW target
1313class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
1314public:
1315  MinGWX86_32TargetInfo(const std::string& triple)
1316    : WindowsX86_32TargetInfo(triple) {
1317  }
1318  virtual void getTargetDefines(const LangOptions &Opts,
1319                                MacroBuilder &Builder) const {
1320    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
1321    Builder.defineMacro("__MSVCRT__");
1322    Builder.defineMacro("__MINGW32__");
1323    Builder.defineMacro("__declspec", "__declspec");
1324  }
1325};
1326} // end anonymous namespace
1327
1328namespace {
1329// x86-32 Cygwin target
1330class CygwinX86_32TargetInfo : public X86_32TargetInfo {
1331public:
1332  CygwinX86_32TargetInfo(const std::string& triple)
1333    : X86_32TargetInfo(triple) {
1334    TLSSupported = false;
1335    WCharType = UnsignedShort;
1336    DoubleAlign = LongLongAlign = 64;
1337    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1338                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
1339                        "a0:0:64-f80:32:32-n8:16:32";
1340  }
1341  virtual void getTargetDefines(const LangOptions &Opts,
1342                                MacroBuilder &Builder) const {
1343    X86_32TargetInfo::getTargetDefines(Opts, Builder);
1344    Builder.defineMacro("__CYGWIN__");
1345    Builder.defineMacro("__CYGWIN32__");
1346    DefineStd(Builder, "unix", Opts);
1347    if (Opts.CPlusPlus)
1348      Builder.defineMacro("_GNU_SOURCE");
1349  }
1350};
1351} // end anonymous namespace
1352
1353namespace {
1354// x86-32 Haiku target
1355class HaikuX86_32TargetInfo : public X86_32TargetInfo {
1356public:
1357  HaikuX86_32TargetInfo(const std::string& triple)
1358    : X86_32TargetInfo(triple) {
1359    SizeType = UnsignedLong;
1360    IntPtrType = SignedLong;
1361    PtrDiffType = SignedLong;
1362  }
1363  virtual void getTargetDefines(const LangOptions &Opts,
1364                                MacroBuilder &Builder) const {
1365    X86_32TargetInfo::getTargetDefines(Opts, Builder);
1366    Builder.defineMacro("__INTEL__");
1367    Builder.defineMacro("__HAIKU__");
1368  }
1369};
1370} // end anonymous namespace
1371
1372namespace {
1373// x86-64 generic target
1374class X86_64TargetInfo : public X86TargetInfo {
1375public:
1376  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
1377    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1378    LongDoubleWidth = 128;
1379    LongDoubleAlign = 128;
1380    LargeArrayMinWidth = 128;
1381    LargeArrayAlign = 128;
1382    IntMaxType = SignedLong;
1383    UIntMaxType = UnsignedLong;
1384    Int64Type = SignedLong;
1385    RegParmMax = 6;
1386
1387    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1388                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
1389                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64";
1390  }
1391  virtual const char *getVAListDeclaration() const {
1392    return "typedef struct __va_list_tag {"
1393           "  unsigned gp_offset;"
1394           "  unsigned fp_offset;"
1395           "  void* overflow_arg_area;"
1396           "  void* reg_save_area;"
1397           "} __va_list_tag;"
1398           "typedef __va_list_tag __builtin_va_list[1];";
1399  }
1400
1401  int getEHDataRegisterNumber(unsigned RegNo) const {
1402    if (RegNo == 0) return 0;
1403    if (RegNo == 1) return 1;
1404    return -1;
1405  }
1406};
1407} // end anonymous namespace
1408
1409namespace {
1410// x86-64 Windows target
1411class WindowsX86_64TargetInfo : public X86_64TargetInfo {
1412public:
1413  WindowsX86_64TargetInfo(const std::string& triple)
1414    : X86_64TargetInfo(triple) {
1415    TLSSupported = false;
1416    WCharType = UnsignedShort;
1417    LongWidth = LongAlign = 32;
1418    DoubleAlign = LongLongAlign = 64;
1419  }
1420  virtual void getTargetDefines(const LangOptions &Opts,
1421                                MacroBuilder &Builder) const {
1422    X86_64TargetInfo::getTargetDefines(Opts, Builder);
1423    Builder.defineMacro("_WIN64");
1424    DefineStd(Builder, "WIN64", Opts);
1425  }
1426};
1427} // end anonymous namespace
1428
1429namespace {
1430// x86-64 Windows Visual Studio target
1431class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
1432public:
1433  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
1434    : WindowsX86_64TargetInfo(triple) {
1435  }
1436  virtual void getTargetDefines(const LangOptions &Opts,
1437                                MacroBuilder &Builder) const {
1438    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
1439    Builder.defineMacro("_M_X64");
1440  }
1441  virtual const char *getVAListDeclaration() const {
1442    return "typedef char* va_list;";
1443  }
1444};
1445} // end anonymous namespace
1446
1447namespace {
1448// x86-64 MinGW target
1449class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
1450public:
1451  MinGWX86_64TargetInfo(const std::string& triple)
1452    : WindowsX86_64TargetInfo(triple) {
1453  }
1454  virtual void getTargetDefines(const LangOptions &Opts,
1455                                MacroBuilder &Builder) const {
1456    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
1457    Builder.defineMacro("__MSVCRT__");
1458    Builder.defineMacro("__MINGW64__");
1459    Builder.defineMacro("__declspec");
1460  }
1461};
1462} // end anonymous namespace
1463
1464namespace {
1465class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
1466public:
1467  DarwinX86_64TargetInfo(const std::string& triple)
1468      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
1469    Int64Type = SignedLongLong;
1470  }
1471};
1472} // end anonymous namespace
1473
1474namespace {
1475class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
1476public:
1477  OpenBSDX86_64TargetInfo(const std::string& triple)
1478      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
1479    IntMaxType = SignedLongLong;
1480    UIntMaxType = UnsignedLongLong;
1481    Int64Type = SignedLongLong;
1482  }
1483};
1484} // end anonymous namespace
1485
1486namespace {
1487class ARMTargetInfo : public TargetInfo {
1488  // Possible FPU choices.
1489  enum FPUMode {
1490    NoFPU,
1491    VFP2FPU,
1492    VFP3FPU,
1493    NeonFPU
1494  };
1495
1496  static bool FPUModeIsVFP(FPUMode Mode) {
1497    return Mode >= VFP2FPU && Mode <= NeonFPU;
1498  }
1499
1500  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1501  static const char * const GCCRegNames[];
1502
1503  std::string ABI, CPU;
1504
1505  unsigned FPU : 3;
1506
1507  unsigned IsThumb : 1;
1508
1509  // Initialized via features.
1510  unsigned SoftFloat : 1;
1511  unsigned SoftFloatABI : 1;
1512
1513  static const Builtin::Info BuiltinInfo[];
1514
1515public:
1516  ARMTargetInfo(const std::string &TripleStr)
1517    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
1518  {
1519    SizeType = UnsignedInt;
1520    PtrDiffType = SignedInt;
1521
1522    // {} in inline assembly are neon specifiers, not assembly variant
1523    // specifiers.
1524    NoAsmVariants = true;
1525
1526    // FIXME: Should we just treat this as a feature?
1527    IsThumb = getTriple().getArchName().startswith("thumb");
1528    if (IsThumb) {
1529      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
1530                           "i64:64:64-f32:32:32-f64:64:64-"
1531                           "v64:64:64-v128:128:128-a0:0:32-n32");
1532    } else {
1533      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1534                           "i64:64:64-f32:32:32-f64:64:64-"
1535                           "v64:64:64-v128:128:128-a0:0:64-n32");
1536    }
1537  }
1538  virtual const char *getABI() const { return ABI.c_str(); }
1539  virtual bool setABI(const std::string &Name) {
1540    ABI = Name;
1541
1542    // The defaults (above) are for AAPCS, check if we need to change them.
1543    //
1544    // FIXME: We need support for -meabi... we could just mangle it into the
1545    // name.
1546    if (Name == "apcs-gnu") {
1547      DoubleAlign = LongLongAlign = LongDoubleAlign = 32;
1548      SizeType = UnsignedLong;
1549
1550      // Do not respect the alignment of bit-field types when laying out
1551      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
1552      UseBitFieldTypeAlignment = false;
1553
1554      if (IsThumb) {
1555        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
1556                             "i64:32:32-f32:32:32-f64:32:32-"
1557                             "v64:64:64-v128:128:128-a0:0:32-n32");
1558      } else {
1559        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1560                             "i64:32:32-f32:32:32-f64:32:32-"
1561                             "v64:64:64-v128:128:128-a0:0:64-n32");
1562      }
1563
1564      // FIXME: Override "preferred align" for double and long long.
1565    } else if (Name == "aapcs") {
1566      // FIXME: Enumerated types are variable width in straight AAPCS.
1567    } else if (Name == "aapcs-linux") {
1568      ;
1569    } else
1570      return false;
1571
1572    return true;
1573  }
1574
1575  void getDefaultFeatures(const std::string &CPU,
1576                          llvm::StringMap<bool> &Features) const {
1577    // FIXME: This should not be here.
1578    Features["vfp2"] = false;
1579    Features["vfp3"] = false;
1580    Features["neon"] = false;
1581
1582    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
1583      Features["vfp2"] = true;
1584    else if (CPU == "cortex-a8" || CPU == "cortex-a9")
1585      Features["neon"] = true;
1586  }
1587
1588  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1589                                 const std::string &Name,
1590                                 bool Enabled) const {
1591    if (Name == "soft-float" || Name == "soft-float-abi") {
1592      Features[Name] = Enabled;
1593    } else if (Name == "vfp2" || Name == "vfp3" || Name == "neon") {
1594      // These effectively are a single option, reset them when any is enabled.
1595      if (Enabled)
1596        Features["vfp2"] = Features["vfp3"] = Features["neon"] = false;
1597      Features[Name] = Enabled;
1598    } else
1599      return false;
1600
1601    return true;
1602  }
1603
1604  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
1605    FPU = NoFPU;
1606    SoftFloat = SoftFloatABI = false;
1607    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
1608      if (Features[i] == "+soft-float")
1609        SoftFloat = true;
1610      else if (Features[i] == "+soft-float-abi")
1611        SoftFloatABI = true;
1612      else if (Features[i] == "+vfp2")
1613        FPU = VFP2FPU;
1614      else if (Features[i] == "+vfp3")
1615        FPU = VFP3FPU;
1616      else if (Features[i] == "+neon")
1617        FPU = NeonFPU;
1618    }
1619
1620    // Remove front-end specific options which the backend handles differently.
1621    std::vector<std::string>::iterator it;
1622    it = std::find(Features.begin(), Features.end(), "+soft-float");
1623    if (it != Features.end())
1624      Features.erase(it);
1625    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
1626    if (it != Features.end())
1627      Features.erase(it);
1628  }
1629
1630  static const char *getCPUDefineSuffix(llvm::StringRef Name) {
1631    return llvm::StringSwitch<const char*>(Name)
1632      .Cases("arm8", "arm810", "4")
1633      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
1634      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
1635      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
1636      .Case("ep9312", "4T")
1637      .Cases("arm10tdmi", "arm1020t", "5T")
1638      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
1639      .Case("arm926ej-s", "5TEJ")
1640      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
1641      .Cases("xscale", "iwmmxt", "5TE")
1642      .Case("arm1136j-s", "6J")
1643      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
1644      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
1645      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
1646      .Cases("cortex-a8", "cortex-a9", "7A")
1647      .Default(0);
1648  }
1649  virtual bool setCPU(const std::string &Name) {
1650    if (!getCPUDefineSuffix(Name))
1651      return false;
1652
1653    CPU = Name;
1654    return true;
1655  }
1656  virtual void getTargetDefines(const LangOptions &Opts,
1657                                MacroBuilder &Builder) const {
1658    // Target identification.
1659    Builder.defineMacro("__arm");
1660    Builder.defineMacro("__arm__");
1661
1662    // Target properties.
1663    Builder.defineMacro("__ARMEL__");
1664    Builder.defineMacro("__LITTLE_ENDIAN__");
1665    Builder.defineMacro("__REGISTER_PREFIX__", "");
1666
1667    llvm::StringRef CPUArch = getCPUDefineSuffix(CPU);
1668    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
1669
1670    // Subtarget options.
1671
1672    // FIXME: It's more complicated than this and we don't really support
1673    // interworking.
1674    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
1675      Builder.defineMacro("__THUMB_INTERWORK__");
1676
1677    if (ABI == "aapcs" || ABI == "aapcs-linux")
1678      Builder.defineMacro("__ARM_EABI__");
1679
1680    if (SoftFloat)
1681      Builder.defineMacro("__SOFTFP__");
1682
1683    if (CPU == "xscale")
1684      Builder.defineMacro("__XSCALE__");
1685
1686    bool IsThumb2 = IsThumb && (CPUArch == "6T2" || CPUArch.startswith("7"));
1687    if (IsThumb) {
1688      Builder.defineMacro("__THUMBEL__");
1689      Builder.defineMacro("__thumb__");
1690      if (IsThumb2)
1691        Builder.defineMacro("__thumb2__");
1692    }
1693
1694    // Note, this is always on in gcc, even though it doesn't make sense.
1695    Builder.defineMacro("__APCS_32__");
1696
1697    if (FPUModeIsVFP((FPUMode) FPU))
1698      Builder.defineMacro("__VFP_FP__");
1699
1700    // This only gets set when Neon instructions are actually available, unlike
1701    // the VFP define, hence the soft float and arch check. This is subtly
1702    // different from gcc, we follow the intent which was that it should be set
1703    // when Neon instructions are actually available.
1704    if (FPU == NeonFPU && !SoftFloat && IsThumb2)
1705      Builder.defineMacro("__ARM_NEON__");
1706  }
1707  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1708                                 unsigned &NumRecords) const {
1709    Records = BuiltinInfo;
1710    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
1711  }
1712  virtual const char *getVAListDeclaration() const {
1713    return "typedef char* __builtin_va_list;";
1714  }
1715  virtual void getGCCRegNames(const char * const *&Names,
1716                              unsigned &NumNames) const;
1717  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1718                                unsigned &NumAliases) const;
1719  virtual bool validateAsmConstraint(const char *&Name,
1720                                     TargetInfo::ConstraintInfo &Info) const {
1721    // FIXME: Check if this is complete
1722    switch (*Name) {
1723    default:
1724    case 'l': // r0-r7
1725    case 'h': // r8-r15
1726    case 'w': // VFP Floating point register single precision
1727    case 'P': // VFP Floating point register double precision
1728      Info.setAllowsRegister();
1729      return true;
1730    }
1731    return false;
1732  }
1733  virtual const char *getClobbers() const {
1734    // FIXME: Is this really right?
1735    return "";
1736  }
1737};
1738
1739const char * const ARMTargetInfo::GCCRegNames[] = {
1740  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1741  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1742};
1743
1744void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
1745                                       unsigned &NumNames) const {
1746  Names = GCCRegNames;
1747  NumNames = llvm::array_lengthof(GCCRegNames);
1748}
1749
1750const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
1751
1752  { { "a1" }, "r0" },
1753  { { "a2" }, "r1" },
1754  { { "a3" }, "r2" },
1755  { { "a4" }, "r3" },
1756  { { "v1" }, "r4" },
1757  { { "v2" }, "r5" },
1758  { { "v3" }, "r6" },
1759  { { "v4" }, "r7" },
1760  { { "v5" }, "r8" },
1761  { { "v6", "rfp" }, "r9" },
1762  { { "sl" }, "r10" },
1763  { { "fp" }, "r11" },
1764  { { "ip" }, "r12" },
1765  { { "sp" }, "r13" },
1766  { { "lr" }, "r14" },
1767  { { "pc" }, "r15" },
1768};
1769
1770void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1771                                       unsigned &NumAliases) const {
1772  Aliases = GCCRegAliases;
1773  NumAliases = llvm::array_lengthof(GCCRegAliases);
1774}
1775
1776const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
1777#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, false },
1778#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER, false },
1779#include "clang/Basic/BuiltinsARM.def"
1780};
1781} // end anonymous namespace.
1782
1783
1784namespace {
1785class DarwinARMTargetInfo :
1786  public DarwinTargetInfo<ARMTargetInfo> {
1787protected:
1788  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
1789                            MacroBuilder &Builder) const {
1790    getDarwinDefines(Builder, Opts, Triple);
1791  }
1792
1793public:
1794  DarwinARMTargetInfo(const std::string& triple)
1795    : DarwinTargetInfo<ARMTargetInfo>(triple) {
1796    HasAlignMac68kSupport = true;
1797  }
1798};
1799} // end anonymous namespace.
1800
1801namespace {
1802class SparcV8TargetInfo : public TargetInfo {
1803  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1804  static const char * const GCCRegNames[];
1805public:
1806  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
1807    // FIXME: Support Sparc quad-precision long double?
1808    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1809                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
1810  }
1811  virtual void getTargetDefines(const LangOptions &Opts,
1812                                MacroBuilder &Builder) const {
1813    DefineStd(Builder, "sparc", Opts);
1814    Builder.defineMacro("__sparcv8");
1815    Builder.defineMacro("__REGISTER_PREFIX__", "");
1816  }
1817  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1818                                 unsigned &NumRecords) const {
1819    // FIXME: Implement!
1820  }
1821  virtual const char *getVAListDeclaration() const {
1822    return "typedef void* __builtin_va_list;";
1823  }
1824  virtual void getGCCRegNames(const char * const *&Names,
1825                              unsigned &NumNames) const;
1826  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1827                                unsigned &NumAliases) const;
1828  virtual bool validateAsmConstraint(const char *&Name,
1829                                     TargetInfo::ConstraintInfo &info) const {
1830    // FIXME: Implement!
1831    return false;
1832  }
1833  virtual const char *getClobbers() const {
1834    // FIXME: Implement!
1835    return "";
1836  }
1837};
1838
1839const char * const SparcV8TargetInfo::GCCRegNames[] = {
1840  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1841  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1842  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
1843  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
1844};
1845
1846void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
1847                                       unsigned &NumNames) const {
1848  Names = GCCRegNames;
1849  NumNames = llvm::array_lengthof(GCCRegNames);
1850}
1851
1852const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
1853  { { "g0" }, "r0" },
1854  { { "g1" }, "r1" },
1855  { { "g2" }, "r2" },
1856  { { "g3" }, "r3" },
1857  { { "g4" }, "r4" },
1858  { { "g5" }, "r5" },
1859  { { "g6" }, "r6" },
1860  { { "g7" }, "r7" },
1861  { { "o0" }, "r8" },
1862  { { "o1" }, "r9" },
1863  { { "o2" }, "r10" },
1864  { { "o3" }, "r11" },
1865  { { "o4" }, "r12" },
1866  { { "o5" }, "r13" },
1867  { { "o6", "sp" }, "r14" },
1868  { { "o7" }, "r15" },
1869  { { "l0" }, "r16" },
1870  { { "l1" }, "r17" },
1871  { { "l2" }, "r18" },
1872  { { "l3" }, "r19" },
1873  { { "l4" }, "r20" },
1874  { { "l5" }, "r21" },
1875  { { "l6" }, "r22" },
1876  { { "l7" }, "r23" },
1877  { { "i0" }, "r24" },
1878  { { "i1" }, "r25" },
1879  { { "i2" }, "r26" },
1880  { { "i3" }, "r27" },
1881  { { "i4" }, "r28" },
1882  { { "i5" }, "r29" },
1883  { { "i6", "fp" }, "r30" },
1884  { { "i7" }, "r31" },
1885};
1886
1887void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1888                                         unsigned &NumAliases) const {
1889  Aliases = GCCRegAliases;
1890  NumAliases = llvm::array_lengthof(GCCRegAliases);
1891}
1892} // end anonymous namespace.
1893
1894namespace {
1895class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
1896public:
1897  AuroraUXSparcV8TargetInfo(const std::string& triple) :
1898      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
1899    SizeType = UnsignedInt;
1900    PtrDiffType = SignedInt;
1901  }
1902};
1903class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
1904public:
1905  SolarisSparcV8TargetInfo(const std::string& triple) :
1906      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
1907    SizeType = UnsignedInt;
1908    PtrDiffType = SignedInt;
1909  }
1910};
1911} // end anonymous namespace.
1912
1913namespace {
1914  class PIC16TargetInfo : public TargetInfo{
1915  public:
1916    PIC16TargetInfo(const std::string& triple) : TargetInfo(triple) {
1917      TLSSupported = false;
1918      IntWidth = 16;
1919      LongWidth = LongLongWidth = 32;
1920      PointerWidth = 16;
1921      IntAlign = 8;
1922      LongAlign = LongLongAlign = 8;
1923      PointerAlign = 8;
1924      SizeType = UnsignedInt;
1925      IntMaxType = SignedLong;
1926      UIntMaxType = UnsignedLong;
1927      IntPtrType = SignedShort;
1928      PtrDiffType = SignedInt;
1929      SigAtomicType = SignedLong;
1930      FloatWidth = 32;
1931      FloatAlign = 32;
1932      DoubleWidth = 32;
1933      DoubleAlign = 32;
1934      LongDoubleWidth = 32;
1935      LongDoubleAlign = 32;
1936      FloatFormat = &llvm::APFloat::IEEEsingle;
1937      DoubleFormat = &llvm::APFloat::IEEEsingle;
1938      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
1939      DescriptionString = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-f32:32:32-n8";
1940
1941    }
1942    virtual uint64_t getPointerWidthV(unsigned AddrSpace) const { return 16; }
1943    virtual uint64_t getPointerAlignV(unsigned AddrSpace) const { return 8; }
1944    virtual void getTargetDefines(const LangOptions &Opts,
1945                                MacroBuilder &Builder) const {
1946      Builder.defineMacro("__pic16");
1947      Builder.defineMacro("__PIC16");
1948      Builder.defineMacro("rom", "__attribute__((address_space(1)))");
1949      Builder.defineMacro("ram", "__attribute__((address_space(0)))");
1950      Builder.defineMacro("__section(SectName)",
1951             "__attribute__((section(SectName)))");
1952      Builder.defineMacro("near",
1953             "__attribute__((section(\"Address=NEAR\")))");
1954      Builder.defineMacro("__address(Addr)",
1955             "__attribute__((section(\"Address=\"#Addr)))");
1956      Builder.defineMacro("__config(conf)", "asm(\"CONFIG \"#conf)");
1957      Builder.defineMacro("__idlocs(value)", "asm(\"__IDLOCS \"#value)");
1958      Builder.defineMacro("interrupt",
1959             "__attribute__((section(\"interrupt=0x4\"))) \
1960             __attribute__((used))");
1961    }
1962    virtual void getTargetBuiltins(const Builtin::Info *&Records,
1963                                   unsigned &NumRecords) const {}
1964    virtual const char *getVAListDeclaration() const {
1965      return "typedef char* __builtin_va_list;";
1966    }
1967    virtual const char *getClobbers() const {
1968      return "";
1969    }
1970    virtual void getGCCRegNames(const char * const *&Names,
1971                                unsigned &NumNames) const {}
1972    virtual bool validateAsmConstraint(const char *&Name,
1973                                       TargetInfo::ConstraintInfo &info) const {
1974      return true;
1975    }
1976    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1977                                  unsigned &NumAliases) const {}
1978    virtual bool useGlobalsForAutomaticVariables() const {return true;}
1979  };
1980}
1981
1982namespace {
1983  class MSP430TargetInfo : public TargetInfo {
1984    static const char * const GCCRegNames[];
1985  public:
1986    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
1987      TLSSupported = false;
1988      IntWidth = 16; IntAlign = 16;
1989      LongWidth = 32; LongLongWidth = 64;
1990      LongAlign = LongLongAlign = 16;
1991      PointerWidth = 16; PointerAlign = 16;
1992      SizeType = UnsignedInt;
1993      IntMaxType = SignedLong;
1994      UIntMaxType = UnsignedLong;
1995      IntPtrType = SignedShort;
1996      PtrDiffType = SignedInt;
1997      SigAtomicType = SignedLong;
1998      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
1999   }
2000    virtual void getTargetDefines(const LangOptions &Opts,
2001                                  MacroBuilder &Builder) const {
2002      Builder.defineMacro("MSP430");
2003      Builder.defineMacro("__MSP430__");
2004      // FIXME: defines for different 'flavours' of MCU
2005    }
2006    virtual void getTargetBuiltins(const Builtin::Info *&Records,
2007                                   unsigned &NumRecords) const {
2008     // FIXME: Implement.
2009      Records = 0;
2010      NumRecords = 0;
2011    }
2012    virtual void getGCCRegNames(const char * const *&Names,
2013                                unsigned &NumNames) const;
2014    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2015                                  unsigned &NumAliases) const {
2016      // No aliases.
2017      Aliases = 0;
2018      NumAliases = 0;
2019    }
2020    virtual bool validateAsmConstraint(const char *&Name,
2021                                       TargetInfo::ConstraintInfo &info) const {
2022      // No target constraints for now.
2023      return false;
2024    }
2025    virtual const char *getClobbers() const {
2026      // FIXME: Is this really right?
2027      return "";
2028    }
2029    virtual const char *getVAListDeclaration() const {
2030      // FIXME: implement
2031      return "typedef char* __builtin_va_list;";
2032   }
2033  };
2034
2035  const char * const MSP430TargetInfo::GCCRegNames[] = {
2036    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2037    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2038  };
2039
2040  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
2041                                        unsigned &NumNames) const {
2042    Names = GCCRegNames;
2043    NumNames = llvm::array_lengthof(GCCRegNames);
2044  }
2045}
2046
2047
2048namespace {
2049  class SystemZTargetInfo : public TargetInfo {
2050    static const char * const GCCRegNames[];
2051  public:
2052    SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) {
2053      TLSSupported = false;
2054      IntWidth = IntAlign = 32;
2055      LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
2056      PointerWidth = PointerAlign = 64;
2057      DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-"
2058      "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64";
2059   }
2060    virtual void getTargetDefines(const LangOptions &Opts,
2061                                  MacroBuilder &Builder) const {
2062      Builder.defineMacro("__s390__");
2063      Builder.defineMacro("__s390x__");
2064    }
2065    virtual void getTargetBuiltins(const Builtin::Info *&Records,
2066                                   unsigned &NumRecords) const {
2067      // FIXME: Implement.
2068      Records = 0;
2069      NumRecords = 0;
2070    }
2071
2072    virtual void getGCCRegNames(const char * const *&Names,
2073                                unsigned &NumNames) const;
2074    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2075                                  unsigned &NumAliases) const {
2076      // No aliases.
2077      Aliases = 0;
2078      NumAliases = 0;
2079    }
2080    virtual bool validateAsmConstraint(const char *&Name,
2081                                       TargetInfo::ConstraintInfo &info) const {
2082      // FIXME: implement
2083      return true;
2084    }
2085    virtual const char *getClobbers() const {
2086      // FIXME: Is this really right?
2087      return "";
2088    }
2089    virtual const char *getVAListDeclaration() const {
2090      // FIXME: implement
2091      return "typedef char* __builtin_va_list;";
2092   }
2093  };
2094
2095  const char * const SystemZTargetInfo::GCCRegNames[] = {
2096    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2097    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2098  };
2099
2100  void SystemZTargetInfo::getGCCRegNames(const char * const *&Names,
2101                                         unsigned &NumNames) const {
2102    Names = GCCRegNames;
2103    NumNames = llvm::array_lengthof(GCCRegNames);
2104  }
2105}
2106
2107namespace {
2108  class BlackfinTargetInfo : public TargetInfo {
2109    static const char * const GCCRegNames[];
2110  public:
2111    BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) {
2112      TLSSupported = false;
2113      DoubleAlign = 32;
2114      LongLongAlign = 32;
2115      LongDoubleAlign = 32;
2116      DescriptionString = "e-p:32:32-i64:32-f64:32-n32";
2117    }
2118
2119    virtual void getTargetDefines(const LangOptions &Opts,
2120                                  MacroBuilder &Builder) const {
2121      DefineStd(Builder, "bfin", Opts);
2122      DefineStd(Builder, "BFIN", Opts);
2123      Builder.defineMacro("__ADSPBLACKFIN__");
2124      // FIXME: This one is really dependent on -mcpu
2125      Builder.defineMacro("__ADSPLPBLACKFIN__");
2126      // FIXME: Add cpu-dependent defines and __SILICON_REVISION__
2127    }
2128
2129    virtual void getTargetBuiltins(const Builtin::Info *&Records,
2130                                   unsigned &NumRecords) const {
2131      // FIXME: Implement.
2132      Records = 0;
2133      NumRecords = 0;
2134    }
2135
2136    virtual void getGCCRegNames(const char * const *&Names,
2137                                unsigned &NumNames) const;
2138
2139    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2140                                  unsigned &NumAliases) const {
2141      // No aliases.
2142      Aliases = 0;
2143      NumAliases = 0;
2144    }
2145
2146    virtual bool validateAsmConstraint(const char *&Name,
2147                                       TargetInfo::ConstraintInfo &Info) const {
2148      if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) {
2149        Info.setAllowsRegister();
2150        return true;
2151      }
2152      return false;
2153    }
2154
2155    virtual const char *getClobbers() const {
2156      return "";
2157    }
2158
2159    virtual const char *getVAListDeclaration() const {
2160      return "typedef char* __builtin_va_list;";
2161    }
2162  };
2163
2164  const char * const BlackfinTargetInfo::GCCRegNames[] = {
2165    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2166    "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
2167    "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3",
2168    "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3",
2169    "a0", "a1", "cc",
2170    "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp",
2171    "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1"
2172  };
2173
2174  void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names,
2175                                          unsigned &NumNames) const {
2176    Names = GCCRegNames;
2177    NumNames = llvm::array_lengthof(GCCRegNames);
2178  }
2179}
2180
2181namespace {
2182
2183  // LLVM and Clang cannot be used directly to output native binaries for
2184  // target, but is used to compile C code to llvm bitcode with correct
2185  // type and alignment information.
2186  //
2187  // TCE uses the llvm bitcode as input and uses it for generating customized
2188  // target processor and program binary. TCE co-design environment is
2189  // publicly available in http://tce.cs.tut.fi
2190
2191  class TCETargetInfo : public TargetInfo{
2192  public:
2193    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
2194      TLSSupported = false;
2195      IntWidth = 32;
2196      LongWidth = LongLongWidth = 32;
2197      PointerWidth = 32;
2198      IntAlign = 32;
2199      LongAlign = LongLongAlign = 32;
2200      PointerAlign = 32;
2201      SizeType = UnsignedInt;
2202      IntMaxType = SignedLong;
2203      UIntMaxType = UnsignedLong;
2204      IntPtrType = SignedInt;
2205      PtrDiffType = SignedInt;
2206      FloatWidth = 32;
2207      FloatAlign = 32;
2208      DoubleWidth = 32;
2209      DoubleAlign = 32;
2210      LongDoubleWidth = 32;
2211      LongDoubleAlign = 32;
2212      FloatFormat = &llvm::APFloat::IEEEsingle;
2213      DoubleFormat = &llvm::APFloat::IEEEsingle;
2214      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
2215      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
2216                          "i16:16:32-i32:32:32-i64:32:32-"
2217                          "f32:32:32-f64:64:64-v64:64:64-"
2218                          "v128:128:128-a0:0:64-n32";
2219    }
2220
2221    virtual void getTargetDefines(const LangOptions &Opts,
2222                                  MacroBuilder &Builder) const {
2223      DefineStd(Builder, "tce", Opts);
2224      Builder.defineMacro("__TCE__");
2225      Builder.defineMacro("__TCE_V1__");
2226    }
2227    virtual void getTargetBuiltins(const Builtin::Info *&Records,
2228                                   unsigned &NumRecords) const {}
2229    virtual const char *getClobbers() const {
2230      return "";
2231    }
2232    virtual const char *getVAListDeclaration() const {
2233      return "typedef void* __builtin_va_list;";
2234    }
2235    virtual void getGCCRegNames(const char * const *&Names,
2236                                unsigned &NumNames) const {}
2237    virtual bool validateAsmConstraint(const char *&Name,
2238                                       TargetInfo::ConstraintInfo &info) const {
2239      return true;
2240    }
2241    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2242                                  unsigned &NumAliases) const {}
2243  };
2244}
2245
2246namespace {
2247class MipsTargetInfo : public TargetInfo {
2248  std::string ABI, CPU;
2249  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2250  static const char * const GCCRegNames[];
2251public:
2252  MipsTargetInfo(const std::string& triple) : TargetInfo(triple), ABI("o32") {
2253    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
2254                        "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32";
2255  }
2256  virtual const char *getABI() const { return ABI.c_str(); }
2257  virtual bool setABI(const std::string &Name) {
2258
2259    if ((Name == "o32") || (Name == "eabi")) {
2260      ABI = Name;
2261      return true;
2262    } else
2263      return false;
2264  }
2265  virtual bool setCPU(const std::string &Name) {
2266    CPU = Name;
2267    return true;
2268  }
2269  void getDefaultFeatures(const std::string &CPU,
2270                          llvm::StringMap<bool> &Features) const {
2271    Features[ABI] = true;
2272    Features[CPU] = true;
2273  }
2274  virtual void getArchDefines(const LangOptions &Opts,
2275                                MacroBuilder &Builder) const {
2276    if (ABI == "o32")
2277      Builder.defineMacro("__mips_o32");
2278    else if (ABI == "eabi")
2279      Builder.defineMacro("__mips_eabi");
2280  }
2281  virtual void getTargetDefines(const LangOptions &Opts,
2282                                MacroBuilder &Builder) const {
2283    DefineStd(Builder, "mips", Opts);
2284    Builder.defineMacro("_mips");
2285    DefineStd(Builder, "MIPSEB", Opts);
2286    Builder.defineMacro("_MIPSEB");
2287    Builder.defineMacro("__REGISTER_PREFIX__", "");
2288    getArchDefines(Opts, Builder);
2289  }
2290  virtual void getTargetBuiltins(const Builtin::Info *&Records,
2291                                 unsigned &NumRecords) const {
2292    // FIXME: Implement!
2293  }
2294  virtual const char *getVAListDeclaration() const {
2295    return "typedef void* __builtin_va_list;";
2296  }
2297  virtual void getGCCRegNames(const char * const *&Names,
2298                              unsigned &NumNames) const;
2299  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2300                                unsigned &NumAliases) const;
2301  virtual bool validateAsmConstraint(const char *&Name,
2302                                     TargetInfo::ConstraintInfo &Info) const {
2303    switch (*Name) {
2304    default:
2305    case 'r': // CPU registers.
2306    case 'd': // Equivalent to "r" unless generating MIPS16 code.
2307    case 'y': // Equivalent to "r", backwards compatibility only.
2308    case 'f': // floating-point registers.
2309      Info.setAllowsRegister();
2310      return true;
2311    }
2312    return false;
2313  }
2314
2315  virtual const char *getClobbers() const {
2316    // FIXME: Implement!
2317    return "";
2318  }
2319};
2320
2321const char * const MipsTargetInfo::GCCRegNames[] = {
2322  "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
2323  "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
2324  "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
2325  "$24",  "$25",  "$26",  "$27",  "$28",  "$sp",  "$fp",  "$31",
2326  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
2327  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
2328  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
2329  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
2330  "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
2331  "$fcc5","$fcc6","$fcc7"
2332};
2333
2334void MipsTargetInfo::getGCCRegNames(const char * const *&Names,
2335                                       unsigned &NumNames) const {
2336  Names = GCCRegNames;
2337  NumNames = llvm::array_lengthof(GCCRegNames);
2338}
2339
2340const TargetInfo::GCCRegAlias MipsTargetInfo::GCCRegAliases[] = {
2341  { { "at" },  "$1" },
2342  { { "v0" },  "$2" },
2343  { { "v1" },  "$3" },
2344  { { "a0" },  "$4" },
2345  { { "a1" },  "$5" },
2346  { { "a2" },  "$6" },
2347  { { "a3" },  "$7" },
2348  { { "t0" },  "$8" },
2349  { { "t1" },  "$9" },
2350  { { "t2" }, "$10" },
2351  { { "t3" }, "$11" },
2352  { { "t4" }, "$12" },
2353  { { "t5" }, "$13" },
2354  { { "t6" }, "$14" },
2355  { { "t7" }, "$15" },
2356  { { "s0" }, "$16" },
2357  { { "s1" }, "$17" },
2358  { { "s2" }, "$18" },
2359  { { "s3" }, "$19" },
2360  { { "s4" }, "$20" },
2361  { { "s5" }, "$21" },
2362  { { "s6" }, "$22" },
2363  { { "s7" }, "$23" },
2364  { { "t8" }, "$24" },
2365  { { "t9" }, "$25" },
2366  { { "k0" }, "$26" },
2367  { { "k1" }, "$27" },
2368  { { "gp" }, "$28" },
2369  { { "sp" }, "$29" },
2370  { { "fp" }, "$30" },
2371  { { "ra" }, "$31" }
2372};
2373
2374void MipsTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2375                                         unsigned &NumAliases) const {
2376  Aliases = GCCRegAliases;
2377  NumAliases = llvm::array_lengthof(GCCRegAliases);
2378}
2379} // end anonymous namespace.
2380
2381namespace {
2382class MipselTargetInfo : public MipsTargetInfo {
2383public:
2384  MipselTargetInfo(const std::string& triple) : MipsTargetInfo(triple) {
2385    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
2386                        "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32";
2387  }
2388
2389  virtual void getTargetDefines(const LangOptions &Opts,
2390                                MacroBuilder &Builder) const;
2391};
2392
2393void MipselTargetInfo::getTargetDefines(const LangOptions &Opts,
2394                                        MacroBuilder &Builder) const {
2395  DefineStd(Builder, "mips", Opts);
2396  Builder.defineMacro("_mips");
2397  DefineStd(Builder, "MIPSEL", Opts);
2398  Builder.defineMacro("_MIPSEL");
2399  Builder.defineMacro("__REGISTER_PREFIX__", "");
2400  getArchDefines(Opts, Builder);
2401}
2402} // end anonymous namespace.
2403
2404//===----------------------------------------------------------------------===//
2405// Driver code
2406//===----------------------------------------------------------------------===//
2407
2408static TargetInfo *AllocateTarget(const std::string &T) {
2409  llvm::Triple Triple(T);
2410  llvm::Triple::OSType os = Triple.getOS();
2411
2412  switch (Triple.getArch()) {
2413  default:
2414    return NULL;
2415
2416  case llvm::Triple::arm:
2417  case llvm::Triple::thumb:
2418    switch (os) {
2419    case llvm::Triple::Linux:
2420      return new LinuxTargetInfo<ARMTargetInfo>(T);
2421    case llvm::Triple::Darwin:
2422      return new DarwinARMTargetInfo(T);
2423    case llvm::Triple::FreeBSD:
2424      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
2425    default:
2426      return new ARMTargetInfo(T);
2427    }
2428
2429  case llvm::Triple::bfin:
2430    return new BlackfinTargetInfo(T);
2431
2432  case llvm::Triple::msp430:
2433    return new MSP430TargetInfo(T);
2434
2435  case llvm::Triple::mips:
2436    if (os == llvm::Triple::Psp)
2437      return new PSPTargetInfo<MipsTargetInfo>(T);
2438    if (os == llvm::Triple::Linux)
2439      return new LinuxTargetInfo<MipsTargetInfo>(T);
2440    return new MipsTargetInfo(T);
2441
2442  case llvm::Triple::mipsel:
2443    if (os == llvm::Triple::Psp)
2444      return new PSPTargetInfo<MipselTargetInfo>(T);
2445    if (os == llvm::Triple::Linux)
2446      return new LinuxTargetInfo<MipselTargetInfo>(T);
2447    return new MipselTargetInfo(T);
2448
2449  case llvm::Triple::pic16:
2450    return new PIC16TargetInfo(T);
2451
2452  case llvm::Triple::ppc:
2453    if (os == llvm::Triple::Darwin)
2454      return new DarwinPPCTargetInfo(T);
2455    else if (os == llvm::Triple::FreeBSD)
2456      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
2457    return new PPC32TargetInfo(T);
2458
2459  case llvm::Triple::ppc64:
2460    if (os == llvm::Triple::Darwin)
2461      return new DarwinPPC64TargetInfo(T);
2462    else if (os == llvm::Triple::Lv2)
2463      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
2464    else if (os == llvm::Triple::FreeBSD)
2465      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
2466    return new PPC64TargetInfo(T);
2467
2468  case llvm::Triple::mblaze:
2469    return new MBlazeTargetInfo(T);
2470
2471  case llvm::Triple::sparc:
2472    if (os == llvm::Triple::AuroraUX)
2473      return new AuroraUXSparcV8TargetInfo(T);
2474    if (os == llvm::Triple::Solaris)
2475      return new SolarisSparcV8TargetInfo(T);
2476    return new SparcV8TargetInfo(T);
2477
2478  // FIXME: Need a real SPU target.
2479  case llvm::Triple::cellspu:
2480    return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
2481
2482  case llvm::Triple::systemz:
2483    return new SystemZTargetInfo(T);
2484
2485  case llvm::Triple::tce:
2486    return new TCETargetInfo(T);
2487
2488  case llvm::Triple::x86:
2489    switch (os) {
2490    case llvm::Triple::AuroraUX:
2491      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
2492    case llvm::Triple::Darwin:
2493      return new DarwinI386TargetInfo(T);
2494    case llvm::Triple::Linux:
2495      return new LinuxTargetInfo<X86_32TargetInfo>(T);
2496    case llvm::Triple::DragonFly:
2497      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
2498    case llvm::Triple::NetBSD:
2499      return new NetBSDTargetInfo<X86_32TargetInfo>(T);
2500    case llvm::Triple::OpenBSD:
2501      return new OpenBSDI386TargetInfo(T);
2502    case llvm::Triple::FreeBSD:
2503      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
2504    case llvm::Triple::Solaris:
2505      return new SolarisTargetInfo<X86_32TargetInfo>(T);
2506    case llvm::Triple::Cygwin:
2507      return new CygwinX86_32TargetInfo(T);
2508    case llvm::Triple::MinGW32:
2509      return new MinGWX86_32TargetInfo(T);
2510    case llvm::Triple::Win32:
2511      return new VisualStudioWindowsX86_32TargetInfo(T);
2512    case llvm::Triple::Haiku:
2513      return new HaikuX86_32TargetInfo(T);
2514    default:
2515      return new X86_32TargetInfo(T);
2516    }
2517
2518  case llvm::Triple::x86_64:
2519    switch (os) {
2520    case llvm::Triple::AuroraUX:
2521      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
2522    case llvm::Triple::Darwin:
2523      return new DarwinX86_64TargetInfo(T);
2524    case llvm::Triple::Linux:
2525      return new LinuxTargetInfo<X86_64TargetInfo>(T);
2526    case llvm::Triple::DragonFly:
2527      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
2528    case llvm::Triple::NetBSD:
2529      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
2530    case llvm::Triple::OpenBSD:
2531      return new OpenBSDX86_64TargetInfo(T);
2532    case llvm::Triple::FreeBSD:
2533      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
2534    case llvm::Triple::Solaris:
2535      return new SolarisTargetInfo<X86_64TargetInfo>(T);
2536    case llvm::Triple::MinGW64:
2537      return new MinGWX86_64TargetInfo(T);
2538    case llvm::Triple::Win32:   // This is what Triple.h supports now.
2539      return new VisualStudioWindowsX86_64TargetInfo(T);
2540    default:
2541      return new X86_64TargetInfo(T);
2542    }
2543  }
2544}
2545
2546/// CreateTargetInfo - Return the target info object for the specified target
2547/// triple.
2548TargetInfo *TargetInfo::CreateTargetInfo(Diagnostic &Diags,
2549                                         TargetOptions &Opts) {
2550  llvm::Triple Triple(Opts.Triple);
2551
2552  // Construct the target
2553  llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
2554  if (!Target) {
2555    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
2556    return 0;
2557  }
2558
2559  // Set the target CPU if specified.
2560  if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
2561    Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
2562    return 0;
2563  }
2564
2565  // Set the target ABI if specified.
2566  if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
2567    Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
2568    return 0;
2569  }
2570
2571  // Set the target C++ ABI.
2572  if (!Target->setCXXABI(Opts.CXXABI)) {
2573    Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
2574    return 0;
2575  }
2576
2577  // Compute the default target features, we need the target to handle this
2578  // because features may have dependencies on one another.
2579  llvm::StringMap<bool> Features;
2580  Target->getDefaultFeatures(Opts.CPU, Features);
2581
2582  // Apply the user specified deltas.
2583  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
2584         ie = Opts.Features.end(); it != ie; ++it) {
2585    const char *Name = it->c_str();
2586
2587    // Apply the feature via the target.
2588    if ((Name[0] != '-' && Name[0] != '+') ||
2589        !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) {
2590      Diags.Report(diag::err_target_invalid_feature) << Name;
2591      return 0;
2592    }
2593  }
2594
2595  // Add the features to the compile options.
2596  //
2597  // FIXME: If we are completely confident that we have the right set, we only
2598  // need to pass the minuses.
2599  Opts.Features.clear();
2600  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
2601         ie = Features.end(); it != ie; ++it)
2602    Opts.Features.push_back(std::string(it->second ? "+" : "-") + it->first());
2603  Target->HandleTargetFeatures(Opts.Features);
2604
2605  return Target.take();
2606}
2607