Targets.cpp revision e727d21d3fd5f6f68d9e7a260bbf84dc2fc8ae3a 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include "llvm/Support/ErrorHandling.h"
30#include "llvm/Type.h"
31#include <algorithm>
32using namespace clang;
33
34//===----------------------------------------------------------------------===//
35//  Common code shared among targets.
36//===----------------------------------------------------------------------===//
37
38/// DefineStd - Define a macro name and standard variants.  For example if
39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
40/// when in GNU mode.
41static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42                      const LangOptions &Opts) {
43  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44
45  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46  // in the user's namespace.
47  if (Opts.GNUMode)
48    Builder.defineMacro(MacroName);
49
50  // Define __unix.
51  Builder.defineMacro("__" + MacroName);
52
53  // Define __unix__.
54  Builder.defineMacro("__" + MacroName + "__");
55}
56
57static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName,
58                            bool Tuning = true) {
59  Builder.defineMacro("__" + CPUName);
60  Builder.defineMacro("__" + CPUName + "__");
61  if (Tuning)
62    Builder.defineMacro("__tune_" + CPUName + "__");
63}
64
65//===----------------------------------------------------------------------===//
66// Defines specific to certain operating systems.
67//===----------------------------------------------------------------------===//
68
69namespace {
70template<typename TgtInfo>
71class OSTargetInfo : public TgtInfo {
72protected:
73  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
74                            MacroBuilder &Builder) const=0;
75public:
76  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
77  virtual void getTargetDefines(const LangOptions &Opts,
78                                MacroBuilder &Builder) const {
79    TgtInfo::getTargetDefines(Opts, Builder);
80    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
81  }
82
83};
84} // end anonymous namespace
85
86
87static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
88                             const llvm::Triple &Triple,
89                             StringRef &PlatformName,
90                             VersionTuple &PlatformMinVersion) {
91  Builder.defineMacro("__APPLE_CC__", "5621");
92  Builder.defineMacro("__APPLE__");
93  Builder.defineMacro("__MACH__");
94  Builder.defineMacro("OBJC_NEW_PROPERTIES");
95
96  if (!Opts.ObjCAutoRefCount) {
97    // __weak is always defined, for use in blocks and with objc pointers.
98    Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
99
100    // Darwin defines __strong even in C mode (just to nothing).
101    if (Opts.getGC() != LangOptions::NonGC)
102      Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
103    else
104      Builder.defineMacro("__strong", "");
105
106    // __unsafe_unretained is defined to nothing in non-ARC mode. We even
107    // allow this in C, since one might have block pointers in structs that
108    // are used in pure C code and in Objective-C ARC.
109    Builder.defineMacro("__unsafe_unretained", "");
110  }
111
112  if (Opts.Static)
113    Builder.defineMacro("__STATIC__");
114  else
115    Builder.defineMacro("__DYNAMIC__");
116
117  if (Opts.POSIXThreads)
118    Builder.defineMacro("_REENTRANT");
119
120  // Get the platform type and version number from the triple.
121  unsigned Maj, Min, Rev;
122
123  // If no version was given, default to to 10.4.0, for simplifying tests.
124  if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") {
125    PlatformName = "macosx";
126    Min = Rev = 0;
127    Maj = 8;
128  } else {
129    // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]",
130    // "-osxNNN", and "-iosNNN").
131
132    if (Triple.getOS() == llvm::Triple::Darwin) {
133      // For historical reasons that make little sense, the version passed here
134      // is the "darwin" version, which drops the 10 and offsets by 4.
135      Triple.getOSVersion(Maj, Min, Rev);
136
137      if (Triple.getEnvironmentName() == "iphoneos") {
138        PlatformName = "ios";
139      } else {
140        PlatformName = "macosx";
141        Rev = Min;
142        Min = Maj - 4;
143        Maj = 10;
144      }
145    } else {
146      Triple.getOSVersion(Maj, Min, Rev);
147      PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
148    }
149  }
150
151  // If -target arch-pc-win32-macho option specified, we're
152  // generating code for Win32 ABI. No need to emit
153  // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
154  if (PlatformName == "win32") {
155    PlatformMinVersion = VersionTuple(Maj, Min, Rev);
156    return;
157  }
158
159  // Set the appropriate OS version define.
160  if (PlatformName == "ios") {
161    assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
162    char Str[6];
163    Str[0] = '0' + Maj;
164    Str[1] = '0' + (Min / 10);
165    Str[2] = '0' + (Min % 10);
166    Str[3] = '0' + (Rev / 10);
167    Str[4] = '0' + (Rev % 10);
168    Str[5] = '\0';
169    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
170  } else {
171    // Note that the Driver allows versions which aren't representable in the
172    // define (because we only get a single digit for the minor and micro
173    // revision numbers). So, we limit them to the maximum representable
174    // version.
175    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
176    assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
177    char Str[5];
178    Str[0] = '0' + (Maj / 10);
179    Str[1] = '0' + (Maj % 10);
180    Str[2] = '0' + std::min(Min, 9U);
181    Str[3] = '0' + std::min(Rev, 9U);
182    Str[4] = '\0';
183    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
184  }
185
186  PlatformMinVersion = VersionTuple(Maj, Min, Rev);
187}
188
189namespace {
190template<typename Target>
191class DarwinTargetInfo : public OSTargetInfo<Target> {
192protected:
193  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
194                            MacroBuilder &Builder) const {
195    getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
196                     this->PlatformMinVersion);
197  }
198
199public:
200  DarwinTargetInfo(const std::string& triple) :
201    OSTargetInfo<Target>(triple) {
202      llvm::Triple T = llvm::Triple(triple);
203      this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
204      this->MCountName = "\01mcount";
205    }
206
207  virtual std::string isValidSectionSpecifier(StringRef SR) const {
208    // Let MCSectionMachO validate this.
209    StringRef Segment, Section;
210    unsigned TAA, StubSize;
211    bool HasTAA;
212    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
213                                                       TAA, HasTAA, StubSize);
214  }
215
216  virtual const char *getStaticInitSectionSpecifier() const {
217    // FIXME: We should return 0 when building kexts.
218    return "__TEXT,__StaticInit,regular,pure_instructions";
219  }
220
221  /// Darwin does not support protected visibility.  Darwin's "default"
222  /// is very similar to ELF's "protected";  Darwin requires a "weak"
223  /// attribute on declarations that can be dynamically replaced.
224  virtual bool hasProtectedVisibility() const {
225    return false;
226  }
227};
228
229
230// DragonFlyBSD Target
231template<typename Target>
232class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
233protected:
234  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
235                            MacroBuilder &Builder) const {
236    // DragonFly defines; list based off of gcc output
237    Builder.defineMacro("__DragonFly__");
238    Builder.defineMacro("__DragonFly_cc_version", "100001");
239    Builder.defineMacro("__ELF__");
240    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
241    Builder.defineMacro("__tune_i386__");
242    DefineStd(Builder, "unix", Opts);
243  }
244public:
245  DragonFlyBSDTargetInfo(const std::string &triple)
246    : OSTargetInfo<Target>(triple) {}
247};
248
249// FreeBSD Target
250template<typename Target>
251class FreeBSDTargetInfo : public OSTargetInfo<Target> {
252protected:
253  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
254                            MacroBuilder &Builder) const {
255    // FreeBSD defines; list based off of gcc output
256
257    unsigned Release = Triple.getOSMajorVersion();
258    if (Release == 0U)
259      Release = 8;
260
261    Builder.defineMacro("__FreeBSD__", Twine(Release));
262    Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
263    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
264    DefineStd(Builder, "unix", Opts);
265    Builder.defineMacro("__ELF__");
266  }
267public:
268  FreeBSDTargetInfo(const std::string &triple)
269    : OSTargetInfo<Target>(triple) {
270      this->UserLabelPrefix = "";
271
272      llvm::Triple Triple(triple);
273      switch (Triple.getArch()) {
274        default:
275        case llvm::Triple::x86:
276        case llvm::Triple::x86_64:
277          this->MCountName = ".mcount";
278          break;
279        case llvm::Triple::mips:
280        case llvm::Triple::mipsel:
281        case llvm::Triple::ppc:
282        case llvm::Triple::ppc64:
283          this->MCountName = "_mcount";
284          break;
285        case llvm::Triple::arm:
286          this->MCountName = "__mcount";
287          break;
288      }
289
290    }
291};
292
293// Minix Target
294template<typename Target>
295class MinixTargetInfo : public OSTargetInfo<Target> {
296protected:
297  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
298                            MacroBuilder &Builder) const {
299    // Minix defines
300
301    Builder.defineMacro("__minix", "3");
302    Builder.defineMacro("_EM_WSIZE", "4");
303    Builder.defineMacro("_EM_PSIZE", "4");
304    Builder.defineMacro("_EM_SSIZE", "2");
305    Builder.defineMacro("_EM_LSIZE", "4");
306    Builder.defineMacro("_EM_FSIZE", "4");
307    Builder.defineMacro("_EM_DSIZE", "8");
308    Builder.defineMacro("__ELF__");
309    DefineStd(Builder, "unix", Opts);
310  }
311public:
312  MinixTargetInfo(const std::string &triple)
313    : OSTargetInfo<Target>(triple) {
314      this->UserLabelPrefix = "";
315    }
316};
317
318// Linux target
319template<typename Target>
320class LinuxTargetInfo : public OSTargetInfo<Target> {
321protected:
322  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
323                            MacroBuilder &Builder) const {
324    // Linux defines; list based off of gcc output
325    DefineStd(Builder, "unix", Opts);
326    DefineStd(Builder, "linux", Opts);
327    Builder.defineMacro("__gnu_linux__");
328    Builder.defineMacro("__ELF__");
329    if (Opts.POSIXThreads)
330      Builder.defineMacro("_REENTRANT");
331    if (Opts.CPlusPlus)
332      Builder.defineMacro("_GNU_SOURCE");
333  }
334public:
335  LinuxTargetInfo(const std::string& triple)
336    : OSTargetInfo<Target>(triple) {
337    this->UserLabelPrefix = "";
338    this->WIntType = TargetInfo::UnsignedInt;
339  }
340
341  virtual const char *getStaticInitSectionSpecifier() const {
342    return ".text.startup";
343  }
344};
345
346// NetBSD Target
347template<typename Target>
348class NetBSDTargetInfo : public OSTargetInfo<Target> {
349protected:
350  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
351                            MacroBuilder &Builder) const {
352    // NetBSD defines; list based off of gcc output
353    Builder.defineMacro("__NetBSD__");
354    Builder.defineMacro("__unix__");
355    Builder.defineMacro("__ELF__");
356    if (Opts.POSIXThreads)
357      Builder.defineMacro("_POSIX_THREADS");
358  }
359public:
360  NetBSDTargetInfo(const std::string &triple)
361    : OSTargetInfo<Target>(triple) {
362      this->UserLabelPrefix = "";
363    }
364};
365
366// OpenBSD Target
367template<typename Target>
368class OpenBSDTargetInfo : public OSTargetInfo<Target> {
369protected:
370  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
371                            MacroBuilder &Builder) const {
372    // OpenBSD defines; list based off of gcc output
373
374    Builder.defineMacro("__OpenBSD__");
375    DefineStd(Builder, "unix", Opts);
376    Builder.defineMacro("__ELF__");
377    if (Opts.POSIXThreads)
378      Builder.defineMacro("_POSIX_THREADS");
379  }
380public:
381  OpenBSDTargetInfo(const std::string &triple)
382    : OSTargetInfo<Target>(triple) {
383      this->UserLabelPrefix = "";
384
385      llvm::Triple Triple(triple);
386      switch (Triple.getArch()) {
387        default:
388        case llvm::Triple::x86:
389        case llvm::Triple::x86_64:
390        case llvm::Triple::arm:
391	case llvm::Triple::sparc:
392          this->MCountName = "__mcount";
393          break;
394        case llvm::Triple::mips64:
395        case llvm::Triple::mips64el:
396        case llvm::Triple::ppc:
397	case llvm::Triple::sparcv9:
398          this->MCountName = "_mcount";
399          break;
400      }
401  }
402};
403
404// PSP Target
405template<typename Target>
406class PSPTargetInfo : public OSTargetInfo<Target> {
407protected:
408  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
409                            MacroBuilder &Builder) const {
410    // PSP defines; list based on the output of the pspdev gcc toolchain.
411    Builder.defineMacro("PSP");
412    Builder.defineMacro("_PSP");
413    Builder.defineMacro("__psp__");
414    Builder.defineMacro("__ELF__");
415  }
416public:
417  PSPTargetInfo(const std::string& triple)
418    : OSTargetInfo<Target>(triple) {
419    this->UserLabelPrefix = "";
420  }
421};
422
423// PS3 PPU Target
424template<typename Target>
425class PS3PPUTargetInfo : public OSTargetInfo<Target> {
426protected:
427  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
428                            MacroBuilder &Builder) const {
429    // PS3 PPU defines.
430    Builder.defineMacro("__PPC__");
431    Builder.defineMacro("__PPU__");
432    Builder.defineMacro("__CELLOS_LV2__");
433    Builder.defineMacro("__ELF__");
434    Builder.defineMacro("__LP32__");
435    Builder.defineMacro("_ARCH_PPC64");
436    Builder.defineMacro("__powerpc64__");
437  }
438public:
439  PS3PPUTargetInfo(const std::string& triple)
440    : OSTargetInfo<Target>(triple) {
441    this->UserLabelPrefix = "";
442    this->LongWidth = this->LongAlign = 32;
443    this->PointerWidth = this->PointerAlign = 32;
444    this->IntMaxType = TargetInfo::SignedLongLong;
445    this->UIntMaxType = TargetInfo::UnsignedLongLong;
446    this->Int64Type = TargetInfo::SignedLongLong;
447    this->SizeType = TargetInfo::UnsignedInt;
448    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
449                              "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
450  }
451};
452
453// FIXME: Need a real SPU target.
454// PS3 SPU Target
455template<typename Target>
456class PS3SPUTargetInfo : public OSTargetInfo<Target> {
457protected:
458  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
459                            MacroBuilder &Builder) const {
460    // PS3 PPU defines.
461    Builder.defineMacro("__SPU__");
462    Builder.defineMacro("__ELF__");
463  }
464public:
465  PS3SPUTargetInfo(const std::string& triple)
466    : OSTargetInfo<Target>(triple) {
467    this->UserLabelPrefix = "";
468  }
469};
470
471// AuroraUX target
472template<typename Target>
473class AuroraUXTargetInfo : public OSTargetInfo<Target> {
474protected:
475  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
476                            MacroBuilder &Builder) const {
477    DefineStd(Builder, "sun", Opts);
478    DefineStd(Builder, "unix", Opts);
479    Builder.defineMacro("__ELF__");
480    Builder.defineMacro("__svr4__");
481    Builder.defineMacro("__SVR4");
482  }
483public:
484  AuroraUXTargetInfo(const std::string& triple)
485    : OSTargetInfo<Target>(triple) {
486    this->UserLabelPrefix = "";
487    this->WCharType = this->SignedLong;
488    // FIXME: WIntType should be SignedLong
489  }
490};
491
492// Solaris target
493template<typename Target>
494class SolarisTargetInfo : public OSTargetInfo<Target> {
495protected:
496  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
497                            MacroBuilder &Builder) const {
498    DefineStd(Builder, "sun", Opts);
499    DefineStd(Builder, "unix", Opts);
500    Builder.defineMacro("__ELF__");
501    Builder.defineMacro("__svr4__");
502    Builder.defineMacro("__SVR4");
503  }
504public:
505  SolarisTargetInfo(const std::string& triple)
506    : OSTargetInfo<Target>(triple) {
507    this->UserLabelPrefix = "";
508    this->WCharType = this->SignedLong;
509    // FIXME: WIntType should be SignedLong
510  }
511};
512
513// Windows target
514template<typename Target>
515class WindowsTargetInfo : public OSTargetInfo<Target> {
516protected:
517  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
518                            MacroBuilder &Builder) const {
519    Builder.defineMacro("_WIN32");
520  }
521  void getVisualStudioDefines(const LangOptions &Opts,
522                              MacroBuilder &Builder) const {
523    if (Opts.CPlusPlus) {
524      if (Opts.RTTI)
525        Builder.defineMacro("_CPPRTTI");
526
527      if (Opts.Exceptions)
528        Builder.defineMacro("_CPPUNWIND");
529    }
530
531    if (!Opts.CharIsSigned)
532      Builder.defineMacro("_CHAR_UNSIGNED");
533
534    // FIXME: POSIXThreads isn't exactly the option this should be defined for,
535    //        but it works for now.
536    if (Opts.POSIXThreads)
537      Builder.defineMacro("_MT");
538
539    if (Opts.MSCVersion != 0)
540      Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
541
542    if (Opts.MicrosoftExt) {
543      Builder.defineMacro("_MSC_EXTENSIONS");
544
545      if (Opts.CPlusPlus0x) {
546        Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
547        Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
548        Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
549      }
550    }
551
552    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
553  }
554
555public:
556  WindowsTargetInfo(const std::string &triple)
557    : OSTargetInfo<Target>(triple) {}
558};
559
560} // end anonymous namespace.
561
562//===----------------------------------------------------------------------===//
563// Specific target implementations.
564//===----------------------------------------------------------------------===//
565
566namespace {
567// PPC abstract base class
568class PPCTargetInfo : public TargetInfo {
569  static const Builtin::Info BuiltinInfo[];
570  static const char * const GCCRegNames[];
571  static const TargetInfo::GCCRegAlias GCCRegAliases[];
572public:
573  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {}
574
575  virtual void getTargetBuiltins(const Builtin::Info *&Records,
576                                 unsigned &NumRecords) const {
577    Records = BuiltinInfo;
578    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
579  }
580
581  virtual bool isCLZForZeroUndef() const { return false; }
582
583  virtual void getTargetDefines(const LangOptions &Opts,
584                                MacroBuilder &Builder) const;
585
586  virtual bool hasFeature(StringRef Feature) const;
587
588  virtual void getGCCRegNames(const char * const *&Names,
589                              unsigned &NumNames) const;
590  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
591                                unsigned &NumAliases) const;
592  virtual bool validateAsmConstraint(const char *&Name,
593                                     TargetInfo::ConstraintInfo &Info) const {
594    switch (*Name) {
595    default: return false;
596    case 'O': // Zero
597      break;
598    case 'b': // Base register
599    case 'f': // Floating point register
600      Info.setAllowsRegister();
601      break;
602    // FIXME: The following are added to allow parsing.
603    // I just took a guess at what the actions should be.
604    // Also, is more specific checking needed?  I.e. specific registers?
605    case 'd': // Floating point register (containing 64-bit value)
606    case 'v': // Altivec vector register
607      Info.setAllowsRegister();
608      break;
609    case 'w':
610      switch (Name[1]) {
611        case 'd':// VSX vector register to hold vector double data
612        case 'f':// VSX vector register to hold vector float data
613        case 's':// VSX vector register to hold scalar float data
614        case 'a':// Any VSX register
615          break;
616        default:
617          return false;
618      }
619      Info.setAllowsRegister();
620      Name++; // Skip over 'w'.
621      break;
622    case 'h': // `MQ', `CTR', or `LINK' register
623    case 'q': // `MQ' register
624    case 'c': // `CTR' register
625    case 'l': // `LINK' register
626    case 'x': // `CR' register (condition register) number 0
627    case 'y': // `CR' register (condition register)
628    case 'z': // `XER[CA]' carry bit (part of the XER register)
629      Info.setAllowsRegister();
630      break;
631    case 'I': // Signed 16-bit constant
632    case 'J': // Unsigned 16-bit constant shifted left 16 bits
633              //  (use `L' instead for SImode constants)
634    case 'K': // Unsigned 16-bit constant
635    case 'L': // Signed 16-bit constant shifted left 16 bits
636    case 'M': // Constant larger than 31
637    case 'N': // Exact power of 2
638    case 'P': // Constant whose negation is a signed 16-bit constant
639    case 'G': // Floating point constant that can be loaded into a
640              // register with one instruction per word
641    case 'H': // Integer/Floating point constant that can be loaded
642              // into a register using three instructions
643      break;
644    case 'm': // Memory operand. Note that on PowerPC targets, m can
645              // include addresses that update the base register. It
646              // is therefore only safe to use `m' in an asm statement
647              // if that asm statement accesses the operand exactly once.
648              // The asm statement must also use `%U<opno>' as a
649              // placeholder for the "update" flag in the corresponding
650              // load or store instruction. For example:
651              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
652              // is correct but:
653              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
654              // is not. Use es rather than m if you don't want the base
655              // register to be updated.
656    case 'e':
657      if (Name[1] != 's')
658          return false;
659              // es: A "stable" memory operand; that is, one which does not
660              // include any automodification of the base register. Unlike
661              // `m', this constraint can be used in asm statements that
662              // might access the operand several times, or that might not
663              // access it at all.
664      Info.setAllowsMemory();
665      Name++; // Skip over 'e'.
666      break;
667    case 'Q': // Memory operand that is an offset from a register (it is
668              // usually better to use `m' or `es' in asm statements)
669    case 'Z': // Memory operand that is an indexed or indirect from a
670              // register (it is usually better to use `m' or `es' in
671              // asm statements)
672      Info.setAllowsMemory();
673      Info.setAllowsRegister();
674      break;
675    case 'R': // AIX TOC entry
676    case 'a': // Address operand that is an indexed or indirect from a
677              // register (`p' is preferable for asm statements)
678    case 'S': // Constant suitable as a 64-bit mask operand
679    case 'T': // Constant suitable as a 32-bit mask operand
680    case 'U': // System V Release 4 small data area reference
681    case 't': // AND masks that can be performed by two rldic{l, r}
682              // instructions
683    case 'W': // Vector constant that does not require memory
684    case 'j': // Vector constant that is all zeros.
685      break;
686    // End FIXME.
687    }
688    return true;
689  }
690  virtual const char *getClobbers() const {
691    return "";
692  }
693};
694
695const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
696#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
697#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
698                                              ALL_LANGUAGES },
699#include "clang/Basic/BuiltinsPPC.def"
700};
701
702
703/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
704/// #defines that are not tied to a specific subtarget.
705void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
706                                     MacroBuilder &Builder) const {
707  // Target identification.
708  Builder.defineMacro("__ppc__");
709  Builder.defineMacro("_ARCH_PPC");
710  Builder.defineMacro("__powerpc__");
711  Builder.defineMacro("__POWERPC__");
712  if (PointerWidth == 64) {
713    Builder.defineMacro("_ARCH_PPC64");
714    Builder.defineMacro("_LP64");
715    Builder.defineMacro("__LP64__");
716    Builder.defineMacro("__powerpc64__");
717    Builder.defineMacro("__ppc64__");
718  } else {
719    Builder.defineMacro("__ppc__");
720  }
721
722  // Target properties.
723  if (getTriple().getOS() != llvm::Triple::NetBSD)
724    Builder.defineMacro("_BIG_ENDIAN");
725  Builder.defineMacro("__BIG_ENDIAN__");
726
727  // Subtarget options.
728  Builder.defineMacro("__NATURAL_ALIGNMENT__");
729  Builder.defineMacro("__REGISTER_PREFIX__", "");
730
731  // FIXME: Should be controlled by command line option.
732  Builder.defineMacro("__LONG_DOUBLE_128__");
733
734  if (Opts.AltiVec) {
735    Builder.defineMacro("__VEC__", "10206");
736    Builder.defineMacro("__ALTIVEC__");
737  }
738}
739
740bool PPCTargetInfo::hasFeature(StringRef Feature) const {
741  return Feature == "powerpc";
742}
743
744
745const char * const PPCTargetInfo::GCCRegNames[] = {
746  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
747  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
748  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
749  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
750  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
751  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
752  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
753  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
754  "mq", "lr", "ctr", "ap",
755  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
756  "xer",
757  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
758  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
759  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
760  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
761  "vrsave", "vscr",
762  "spe_acc", "spefscr",
763  "sfp"
764};
765
766void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
767                                   unsigned &NumNames) const {
768  Names = GCCRegNames;
769  NumNames = llvm::array_lengthof(GCCRegNames);
770}
771
772const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
773  // While some of these aliases do map to different registers
774  // they still share the same register name.
775  { { "0" }, "r0" },
776  { { "1"}, "r1" },
777  { { "2" }, "r2" },
778  { { "3" }, "r3" },
779  { { "4" }, "r4" },
780  { { "5" }, "r5" },
781  { { "6" }, "r6" },
782  { { "7" }, "r7" },
783  { { "8" }, "r8" },
784  { { "9" }, "r9" },
785  { { "10" }, "r10" },
786  { { "11" }, "r11" },
787  { { "12" }, "r12" },
788  { { "13" }, "r13" },
789  { { "14" }, "r14" },
790  { { "15" }, "r15" },
791  { { "16" }, "r16" },
792  { { "17" }, "r17" },
793  { { "18" }, "r18" },
794  { { "19" }, "r19" },
795  { { "20" }, "r20" },
796  { { "21" }, "r21" },
797  { { "22" }, "r22" },
798  { { "23" }, "r23" },
799  { { "24" }, "r24" },
800  { { "25" }, "r25" },
801  { { "26" }, "r26" },
802  { { "27" }, "r27" },
803  { { "28" }, "r28" },
804  { { "29" }, "r29" },
805  { { "30" }, "r30" },
806  { { "31" }, "r31" },
807  { { "fr0" }, "f0" },
808  { { "fr1" }, "f1" },
809  { { "fr2" }, "f2" },
810  { { "fr3" }, "f3" },
811  { { "fr4" }, "f4" },
812  { { "fr5" }, "f5" },
813  { { "fr6" }, "f6" },
814  { { "fr7" }, "f7" },
815  { { "fr8" }, "f8" },
816  { { "fr9" }, "f9" },
817  { { "fr10" }, "f10" },
818  { { "fr11" }, "f11" },
819  { { "fr12" }, "f12" },
820  { { "fr13" }, "f13" },
821  { { "fr14" }, "f14" },
822  { { "fr15" }, "f15" },
823  { { "fr16" }, "f16" },
824  { { "fr17" }, "f17" },
825  { { "fr18" }, "f18" },
826  { { "fr19" }, "f19" },
827  { { "fr20" }, "f20" },
828  { { "fr21" }, "f21" },
829  { { "fr22" }, "f22" },
830  { { "fr23" }, "f23" },
831  { { "fr24" }, "f24" },
832  { { "fr25" }, "f25" },
833  { { "fr26" }, "f26" },
834  { { "fr27" }, "f27" },
835  { { "fr28" }, "f28" },
836  { { "fr29" }, "f29" },
837  { { "fr30" }, "f30" },
838  { { "fr31" }, "f31" },
839  { { "cc" }, "cr0" },
840};
841
842void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
843                                     unsigned &NumAliases) const {
844  Aliases = GCCRegAliases;
845  NumAliases = llvm::array_lengthof(GCCRegAliases);
846}
847} // end anonymous namespace.
848
849namespace {
850class PPC32TargetInfo : public PPCTargetInfo {
851public:
852  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
853    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
854                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
855
856    switch (getTriple().getOS()) {
857    case llvm::Triple::FreeBSD:
858    case llvm::Triple::NetBSD:
859      SizeType = UnsignedInt;
860      break;
861    default:
862      break;
863    }
864  }
865
866  virtual const char *getVAListDeclaration() const {
867    // This is the ELF definition, and is overridden by the Darwin sub-target
868    return "typedef struct __va_list_tag {"
869           "  unsigned char gpr;"
870           "  unsigned char fpr;"
871           "  unsigned short reserved;"
872           "  void* overflow_arg_area;"
873           "  void* reg_save_area;"
874           "} __builtin_va_list[1];";
875  }
876};
877} // end anonymous namespace.
878
879namespace {
880class PPC64TargetInfo : public PPCTargetInfo {
881public:
882  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
883    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
884    IntMaxType = SignedLong;
885    UIntMaxType = UnsignedLong;
886    Int64Type = SignedLong;
887    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
888                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
889  }
890  virtual const char *getVAListDeclaration() const {
891    return "typedef char* __builtin_va_list;";
892  }
893};
894} // end anonymous namespace.
895
896
897namespace {
898class DarwinPPC32TargetInfo :
899  public DarwinTargetInfo<PPC32TargetInfo> {
900public:
901  DarwinPPC32TargetInfo(const std::string& triple)
902    : DarwinTargetInfo<PPC32TargetInfo>(triple) {
903    HasAlignMac68kSupport = true;
904    BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
905    LongLongAlign = 32;
906    SuitableAlign = 128;
907    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
908                        "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32";
909  }
910  virtual const char *getVAListDeclaration() const {
911    return "typedef char* __builtin_va_list;";
912  }
913};
914
915class DarwinPPC64TargetInfo :
916  public DarwinTargetInfo<PPC64TargetInfo> {
917public:
918  DarwinPPC64TargetInfo(const std::string& triple)
919    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
920    HasAlignMac68kSupport = true;
921    SuitableAlign = 128;
922  }
923};
924} // end anonymous namespace.
925
926namespace {
927  static const unsigned PTXAddrSpaceMap[] = {
928    0,    // opencl_global
929    4,    // opencl_local
930    1     // opencl_constant
931  };
932  class PTXTargetInfo : public TargetInfo {
933    static const char * const GCCRegNames[];
934    static const Builtin::Info BuiltinInfo[];
935    std::vector<llvm::StringRef> AvailableFeatures;
936  public:
937    PTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
938      BigEndian = false;
939      TLSSupported = false;
940      LongWidth = LongAlign = 64;
941      AddrSpaceMap = &PTXAddrSpaceMap;
942      // Define available target features
943      // These must be defined in sorted order!
944      AvailableFeatures.push_back("compute10");
945      AvailableFeatures.push_back("compute11");
946      AvailableFeatures.push_back("compute12");
947      AvailableFeatures.push_back("compute13");
948      AvailableFeatures.push_back("compute20");
949      AvailableFeatures.push_back("double");
950      AvailableFeatures.push_back("no-fma");
951      AvailableFeatures.push_back("ptx20");
952      AvailableFeatures.push_back("ptx21");
953      AvailableFeatures.push_back("ptx22");
954      AvailableFeatures.push_back("ptx23");
955      AvailableFeatures.push_back("sm10");
956      AvailableFeatures.push_back("sm11");
957      AvailableFeatures.push_back("sm12");
958      AvailableFeatures.push_back("sm13");
959      AvailableFeatures.push_back("sm20");
960      AvailableFeatures.push_back("sm21");
961      AvailableFeatures.push_back("sm22");
962      AvailableFeatures.push_back("sm23");
963    }
964    virtual void getTargetDefines(const LangOptions &Opts,
965                                  MacroBuilder &Builder) const {
966      Builder.defineMacro("__PTX__");
967    }
968    virtual void getTargetBuiltins(const Builtin::Info *&Records,
969                                   unsigned &NumRecords) const {
970      Records = BuiltinInfo;
971      NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
972    }
973    virtual bool hasFeature(StringRef Feature) const {
974      return Feature == "ptx";
975    }
976
977    virtual void getGCCRegNames(const char * const *&Names,
978                                unsigned &NumNames) const;
979    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
980                                  unsigned &NumAliases) const {
981      // No aliases.
982      Aliases = 0;
983      NumAliases = 0;
984    }
985    virtual bool validateAsmConstraint(const char *&Name,
986                                       TargetInfo::ConstraintInfo &info) const {
987      // FIXME: implement
988      return true;
989    }
990    virtual const char *getClobbers() const {
991      // FIXME: Is this really right?
992      return "";
993    }
994    virtual const char *getVAListDeclaration() const {
995      // FIXME: implement
996      return "typedef char* __builtin_va_list;";
997    }
998
999    virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1000                                   const std::string &Name,
1001                                   bool Enabled) const;
1002  };
1003
1004  const Builtin::Info PTXTargetInfo::BuiltinInfo[] = {
1005#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1006#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1007                                              ALL_LANGUAGES },
1008#include "clang/Basic/BuiltinsPTX.def"
1009  };
1010
1011  const char * const PTXTargetInfo::GCCRegNames[] = {
1012    "r0"
1013  };
1014
1015  void PTXTargetInfo::getGCCRegNames(const char * const *&Names,
1016                                     unsigned &NumNames) const {
1017    Names = GCCRegNames;
1018    NumNames = llvm::array_lengthof(GCCRegNames);
1019  }
1020
1021  bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1022                                        const std::string &Name,
1023                                        bool Enabled) const {
1024    if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
1025                          Name)) {
1026      Features[Name] = Enabled;
1027      return true;
1028    } else {
1029      return false;
1030    }
1031  }
1032
1033  class PTX32TargetInfo : public PTXTargetInfo {
1034  public:
1035  PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
1036      PointerWidth = PointerAlign = 32;
1037      SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1038      DescriptionString
1039        = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64";
1040    }
1041  };
1042
1043  class PTX64TargetInfo : public PTXTargetInfo {
1044  public:
1045  PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
1046      PointerWidth = PointerAlign = 64;
1047      SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1048      DescriptionString
1049        = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64";
1050    }
1051  };
1052}
1053
1054namespace {
1055// MBlaze abstract base class
1056class MBlazeTargetInfo : public TargetInfo {
1057  static const char * const GCCRegNames[];
1058  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1059
1060public:
1061  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1062    DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1063  }
1064
1065  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1066                                 unsigned &NumRecords) const {
1067    // FIXME: Implement.
1068    Records = 0;
1069    NumRecords = 0;
1070  }
1071
1072  virtual void getTargetDefines(const LangOptions &Opts,
1073                                MacroBuilder &Builder) const;
1074
1075  virtual bool hasFeature(StringRef Feature) const {
1076    return Feature == "mblaze";
1077  }
1078
1079  virtual const char *getVAListDeclaration() const {
1080    return "typedef char* __builtin_va_list;";
1081  }
1082  virtual const char *getTargetPrefix() const {
1083    return "mblaze";
1084  }
1085  virtual void getGCCRegNames(const char * const *&Names,
1086                              unsigned &NumNames) const;
1087  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1088                                unsigned &NumAliases) const;
1089  virtual bool validateAsmConstraint(const char *&Name,
1090                                     TargetInfo::ConstraintInfo &Info) const {
1091    switch (*Name) {
1092    default: return false;
1093    case 'O': // Zero
1094      return true;
1095    case 'b': // Base register
1096    case 'f': // Floating point register
1097      Info.setAllowsRegister();
1098      return true;
1099    }
1100  }
1101  virtual const char *getClobbers() const {
1102    return "";
1103  }
1104};
1105
1106/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1107/// #defines that are not tied to a specific subtarget.
1108void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1109                                     MacroBuilder &Builder) const {
1110  // Target identification.
1111  Builder.defineMacro("__microblaze__");
1112  Builder.defineMacro("_ARCH_MICROBLAZE");
1113  Builder.defineMacro("__MICROBLAZE__");
1114
1115  // Target properties.
1116  Builder.defineMacro("_BIG_ENDIAN");
1117  Builder.defineMacro("__BIG_ENDIAN__");
1118
1119  // Subtarget options.
1120  Builder.defineMacro("__REGISTER_PREFIX__", "");
1121}
1122
1123
1124const char * const MBlazeTargetInfo::GCCRegNames[] = {
1125  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
1126  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
1127  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
1128  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
1129  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
1130  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1131  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1132  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1133  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1134  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
1135};
1136
1137void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1138                                   unsigned &NumNames) const {
1139  Names = GCCRegNames;
1140  NumNames = llvm::array_lengthof(GCCRegNames);
1141}
1142
1143const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1144  { {"f0"},  "r0" },
1145  { {"f1"},  "r1" },
1146  { {"f2"},  "r2" },
1147  { {"f3"},  "r3" },
1148  { {"f4"},  "r4" },
1149  { {"f5"},  "r5" },
1150  { {"f6"},  "r6" },
1151  { {"f7"},  "r7" },
1152  { {"f8"},  "r8" },
1153  { {"f9"},  "r9" },
1154  { {"f10"}, "r10" },
1155  { {"f11"}, "r11" },
1156  { {"f12"}, "r12" },
1157  { {"f13"}, "r13" },
1158  { {"f14"}, "r14" },
1159  { {"f15"}, "r15" },
1160  { {"f16"}, "r16" },
1161  { {"f17"}, "r17" },
1162  { {"f18"}, "r18" },
1163  { {"f19"}, "r19" },
1164  { {"f20"}, "r20" },
1165  { {"f21"}, "r21" },
1166  { {"f22"}, "r22" },
1167  { {"f23"}, "r23" },
1168  { {"f24"}, "r24" },
1169  { {"f25"}, "r25" },
1170  { {"f26"}, "r26" },
1171  { {"f27"}, "r27" },
1172  { {"f28"}, "r28" },
1173  { {"f29"}, "r29" },
1174  { {"f30"}, "r30" },
1175  { {"f31"}, "r31" },
1176};
1177
1178void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1179                                     unsigned &NumAliases) const {
1180  Aliases = GCCRegAliases;
1181  NumAliases = llvm::array_lengthof(GCCRegAliases);
1182}
1183} // end anonymous namespace.
1184
1185namespace {
1186// Namespace for x86 abstract base class
1187const Builtin::Info BuiltinInfo[] = {
1188#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1189#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1190                                              ALL_LANGUAGES },
1191#include "clang/Basic/BuiltinsX86.def"
1192};
1193
1194static const char* const GCCRegNames[] = {
1195  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1196  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1197  "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1198  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1199  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1200  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1201  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1202  "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1203  "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1204};
1205
1206const TargetInfo::AddlRegName AddlRegNames[] = {
1207  { { "al", "ah", "eax", "rax" }, 0 },
1208  { { "bl", "bh", "ebx", "rbx" }, 3 },
1209  { { "cl", "ch", "ecx", "rcx" }, 2 },
1210  { { "dl", "dh", "edx", "rdx" }, 1 },
1211  { { "esi", "rsi" }, 4 },
1212  { { "edi", "rdi" }, 5 },
1213  { { "esp", "rsp" }, 7 },
1214  { { "ebp", "rbp" }, 6 },
1215};
1216
1217// X86 target abstract base class; x86-32 and x86-64 are very close, so
1218// most of the implementation can be shared.
1219class X86TargetInfo : public TargetInfo {
1220  enum X86SSEEnum {
1221    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1222  } SSELevel;
1223  enum MMX3DNowEnum {
1224    NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1225  } MMX3DNowLevel;
1226
1227  bool HasAES;
1228  bool HasLZCNT;
1229  bool HasBMI;
1230  bool HasBMI2;
1231  bool HasPOPCNT;
1232  bool HasFMA4;
1233
1234  /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1235  ///
1236  /// Each enumeration represents a particular CPU supported by Clang. These
1237  /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1238  enum CPUKind {
1239    CK_Generic,
1240
1241    /// \name i386
1242    /// i386-generation processors.
1243    //@{
1244    CK_i386,
1245    //@}
1246
1247    /// \name i486
1248    /// i486-generation processors.
1249    //@{
1250    CK_i486,
1251    CK_WinChipC6,
1252    CK_WinChip2,
1253    CK_C3,
1254    //@}
1255
1256    /// \name i586
1257    /// i586-generation processors, P5 microarchitecture based.
1258    //@{
1259    CK_i586,
1260    CK_Pentium,
1261    CK_PentiumMMX,
1262    //@}
1263
1264    /// \name i686
1265    /// i686-generation processors, P6 / Pentium M microarchitecture based.
1266    //@{
1267    CK_i686,
1268    CK_PentiumPro,
1269    CK_Pentium2,
1270    CK_Pentium3,
1271    CK_Pentium3M,
1272    CK_PentiumM,
1273    CK_C3_2,
1274
1275    /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1276    /// Clang however has some logic to suport this.
1277    // FIXME: Warn, deprecate, and potentially remove this.
1278    CK_Yonah,
1279    //@}
1280
1281    /// \name Netburst
1282    /// Netburst microarchitecture based processors.
1283    //@{
1284    CK_Pentium4,
1285    CK_Pentium4M,
1286    CK_Prescott,
1287    CK_Nocona,
1288    //@}
1289
1290    /// \name Core
1291    /// Core microarchitecture based processors.
1292    //@{
1293    CK_Core2,
1294
1295    /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1296    /// codename which GCC no longer accepts as an option to -march, but Clang
1297    /// has some logic for recognizing it.
1298    // FIXME: Warn, deprecate, and potentially remove this.
1299    CK_Penryn,
1300    //@}
1301
1302    /// \name Atom
1303    /// Atom processors
1304    //@{
1305    CK_Atom,
1306    //@}
1307
1308    /// \name Nehalem
1309    /// Nehalem microarchitecture based processors.
1310    //@{
1311    CK_Corei7,
1312    CK_Corei7AVX,
1313    CK_CoreAVXi,
1314    CK_CoreAVX2,
1315    //@}
1316
1317    /// \name K6
1318    /// K6 architecture processors.
1319    //@{
1320    CK_K6,
1321    CK_K6_2,
1322    CK_K6_3,
1323    //@}
1324
1325    /// \name K7
1326    /// K7 architecture processors.
1327    //@{
1328    CK_Athlon,
1329    CK_AthlonThunderbird,
1330    CK_Athlon4,
1331    CK_AthlonXP,
1332    CK_AthlonMP,
1333    //@}
1334
1335    /// \name K8
1336    /// K8 architecture processors.
1337    //@{
1338    CK_Athlon64,
1339    CK_Athlon64SSE3,
1340    CK_AthlonFX,
1341    CK_K8,
1342    CK_K8SSE3,
1343    CK_Opteron,
1344    CK_OpteronSSE3,
1345    CK_AMDFAM10,
1346    //@}
1347
1348    /// \name Bobcat
1349    /// Bobcat architecture processors.
1350    //@{
1351    CK_BTVER1,
1352    //@}
1353
1354    /// \name Bulldozer
1355    /// Bulldozer architecture processors.
1356    //@{
1357    CK_BDVER1,
1358    CK_BDVER2,
1359    //@}
1360
1361    /// This specification is deprecated and will be removed in the future.
1362    /// Users should prefer \see CK_K8.
1363    // FIXME: Warn on this when the CPU is set to it.
1364    CK_x86_64,
1365    //@}
1366
1367    /// \name Geode
1368    /// Geode processors.
1369    //@{
1370    CK_Geode
1371    //@}
1372  } CPU;
1373
1374public:
1375  X86TargetInfo(const std::string& triple)
1376    : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1377      HasAES(false), HasLZCNT(false), HasBMI(false), HasBMI2(false),
1378      HasPOPCNT(false), HasFMA4(false), CPU(CK_Generic) {
1379    BigEndian = false;
1380    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1381  }
1382  virtual unsigned getFloatEvalMethod() const {
1383    // X87 evaluates with 80 bits "long double" precision.
1384    return SSELevel == NoSSE ? 2 : 0;
1385  }
1386  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1387                                 unsigned &NumRecords) const {
1388    Records = BuiltinInfo;
1389    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1390  }
1391  virtual void getGCCRegNames(const char * const *&Names,
1392                              unsigned &NumNames) const {
1393    Names = GCCRegNames;
1394    NumNames = llvm::array_lengthof(GCCRegNames);
1395  }
1396  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1397                                unsigned &NumAliases) const {
1398    Aliases = 0;
1399    NumAliases = 0;
1400  }
1401  virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1402				  unsigned &NumNames) const {
1403    Names = AddlRegNames;
1404    NumNames = llvm::array_lengthof(AddlRegNames);
1405  }
1406  virtual bool validateAsmConstraint(const char *&Name,
1407                                     TargetInfo::ConstraintInfo &info) const;
1408  virtual std::string convertConstraint(const char *&Constraint) const;
1409  virtual const char *getClobbers() const {
1410    return "~{dirflag},~{fpsr},~{flags}";
1411  }
1412  virtual void getTargetDefines(const LangOptions &Opts,
1413                                MacroBuilder &Builder) const;
1414  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1415                                 const std::string &Name,
1416                                 bool Enabled) const;
1417  virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1418  virtual bool hasFeature(StringRef Feature) const;
1419  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1420  virtual const char* getABI() const {
1421    if (PointerWidth == 64 && SSELevel >= AVX)
1422      return "avx";
1423    else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow)
1424      return "no-mmx";
1425    return "";
1426  }
1427  virtual bool setCPU(const std::string &Name) {
1428    CPU = llvm::StringSwitch<CPUKind>(Name)
1429      .Case("i386", CK_i386)
1430      .Case("i486", CK_i486)
1431      .Case("winchip-c6", CK_WinChipC6)
1432      .Case("winchip2", CK_WinChip2)
1433      .Case("c3", CK_C3)
1434      .Case("i586", CK_i586)
1435      .Case("pentium", CK_Pentium)
1436      .Case("pentium-mmx", CK_PentiumMMX)
1437      .Case("i686", CK_i686)
1438      .Case("pentiumpro", CK_PentiumPro)
1439      .Case("pentium2", CK_Pentium2)
1440      .Case("pentium3", CK_Pentium3)
1441      .Case("pentium3m", CK_Pentium3M)
1442      .Case("pentium-m", CK_PentiumM)
1443      .Case("c3-2", CK_C3_2)
1444      .Case("yonah", CK_Yonah)
1445      .Case("pentium4", CK_Pentium4)
1446      .Case("pentium4m", CK_Pentium4M)
1447      .Case("prescott", CK_Prescott)
1448      .Case("nocona", CK_Nocona)
1449      .Case("core2", CK_Core2)
1450      .Case("penryn", CK_Penryn)
1451      .Case("atom", CK_Atom)
1452      .Case("corei7", CK_Corei7)
1453      .Case("corei7-avx", CK_Corei7AVX)
1454      .Case("core-avx-i", CK_CoreAVXi)
1455      .Case("core-avx2", CK_CoreAVX2)
1456      .Case("k6", CK_K6)
1457      .Case("k6-2", CK_K6_2)
1458      .Case("k6-3", CK_K6_3)
1459      .Case("athlon", CK_Athlon)
1460      .Case("athlon-tbird", CK_AthlonThunderbird)
1461      .Case("athlon-4", CK_Athlon4)
1462      .Case("athlon-xp", CK_AthlonXP)
1463      .Case("athlon-mp", CK_AthlonMP)
1464      .Case("athlon64", CK_Athlon64)
1465      .Case("athlon64-sse3", CK_Athlon64SSE3)
1466      .Case("athlon-fx", CK_AthlonFX)
1467      .Case("k8", CK_K8)
1468      .Case("k8-sse3", CK_K8SSE3)
1469      .Case("opteron", CK_Opteron)
1470      .Case("opteron-sse3", CK_OpteronSSE3)
1471      .Case("amdfam10", CK_AMDFAM10)
1472      .Case("btver1", CK_BTVER1)
1473      .Case("bdver1", CK_BDVER1)
1474      .Case("bdver2", CK_BDVER2)
1475      .Case("x86-64", CK_x86_64)
1476      .Case("geode", CK_Geode)
1477      .Default(CK_Generic);
1478
1479    // Perform any per-CPU checks necessary to determine if this CPU is
1480    // acceptable.
1481    // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1482    // invalid without explaining *why*.
1483    switch (CPU) {
1484    case CK_Generic:
1485      // No processor selected!
1486      return false;
1487
1488    case CK_i386:
1489    case CK_i486:
1490    case CK_WinChipC6:
1491    case CK_WinChip2:
1492    case CK_C3:
1493    case CK_i586:
1494    case CK_Pentium:
1495    case CK_PentiumMMX:
1496    case CK_i686:
1497    case CK_PentiumPro:
1498    case CK_Pentium2:
1499    case CK_Pentium3:
1500    case CK_Pentium3M:
1501    case CK_PentiumM:
1502    case CK_Yonah:
1503    case CK_C3_2:
1504    case CK_Pentium4:
1505    case CK_Pentium4M:
1506    case CK_Prescott:
1507    case CK_K6:
1508    case CK_K6_2:
1509    case CK_K6_3:
1510    case CK_Athlon:
1511    case CK_AthlonThunderbird:
1512    case CK_Athlon4:
1513    case CK_AthlonXP:
1514    case CK_AthlonMP:
1515    case CK_Geode:
1516      // Only accept certain architectures when compiling in 32-bit mode.
1517      if (PointerWidth != 32)
1518        return false;
1519
1520      // Fallthrough
1521    case CK_Nocona:
1522    case CK_Core2:
1523    case CK_Penryn:
1524    case CK_Atom:
1525    case CK_Corei7:
1526    case CK_Corei7AVX:
1527    case CK_CoreAVXi:
1528    case CK_CoreAVX2:
1529    case CK_Athlon64:
1530    case CK_Athlon64SSE3:
1531    case CK_AthlonFX:
1532    case CK_K8:
1533    case CK_K8SSE3:
1534    case CK_Opteron:
1535    case CK_OpteronSSE3:
1536    case CK_AMDFAM10:
1537    case CK_BTVER1:
1538    case CK_BDVER1:
1539    case CK_BDVER2:
1540    case CK_x86_64:
1541      return true;
1542    }
1543    llvm_unreachable("Unhandled CPU kind");
1544  }
1545};
1546
1547void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1548  // FIXME: This should not be here.
1549  Features["3dnow"] = false;
1550  Features["3dnowa"] = false;
1551  Features["mmx"] = false;
1552  Features["sse"] = false;
1553  Features["sse2"] = false;
1554  Features["sse3"] = false;
1555  Features["ssse3"] = false;
1556  Features["sse41"] = false;
1557  Features["sse42"] = false;
1558  Features["sse4a"] = false;
1559  Features["aes"] = false;
1560  Features["avx"] = false;
1561  Features["avx2"] = false;
1562  Features["lzcnt"] = false;
1563  Features["bmi"] = false;
1564  Features["bmi2"] = false;
1565  Features["popcnt"] = false;
1566  Features["fma4"] = false;
1567
1568  // FIXME: This *really* should not be here.
1569
1570  // X86_64 always has SSE2.
1571  if (PointerWidth == 64)
1572    Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1573
1574  switch (CPU) {
1575  case CK_Generic:
1576  case CK_i386:
1577  case CK_i486:
1578  case CK_i586:
1579  case CK_Pentium:
1580  case CK_i686:
1581  case CK_PentiumPro:
1582    break;
1583  case CK_PentiumMMX:
1584  case CK_Pentium2:
1585    setFeatureEnabled(Features, "mmx", true);
1586    break;
1587  case CK_Pentium3:
1588  case CK_Pentium3M:
1589    setFeatureEnabled(Features, "mmx", true);
1590    setFeatureEnabled(Features, "sse", true);
1591    break;
1592  case CK_PentiumM:
1593  case CK_Pentium4:
1594  case CK_Pentium4M:
1595  case CK_x86_64:
1596    setFeatureEnabled(Features, "mmx", true);
1597    setFeatureEnabled(Features, "sse2", true);
1598    break;
1599  case CK_Yonah:
1600  case CK_Prescott:
1601  case CK_Nocona:
1602    setFeatureEnabled(Features, "mmx", true);
1603    setFeatureEnabled(Features, "sse3", true);
1604    break;
1605  case CK_Core2:
1606    setFeatureEnabled(Features, "mmx", true);
1607    setFeatureEnabled(Features, "ssse3", true);
1608    break;
1609  case CK_Penryn:
1610    setFeatureEnabled(Features, "mmx", true);
1611    setFeatureEnabled(Features, "sse4.1", true);
1612    break;
1613  case CK_Atom:
1614    setFeatureEnabled(Features, "mmx", true);
1615    setFeatureEnabled(Features, "ssse3", true);
1616    break;
1617  case CK_Corei7:
1618    setFeatureEnabled(Features, "mmx", true);
1619    setFeatureEnabled(Features, "sse4", true);
1620    setFeatureEnabled(Features, "aes", true);
1621    break;
1622  case CK_Corei7AVX:
1623  case CK_CoreAVXi:
1624    setFeatureEnabled(Features, "mmx", true);
1625    setFeatureEnabled(Features, "sse4", true);
1626    setFeatureEnabled(Features, "aes", true);
1627    //setFeatureEnabled(Features, "avx", true);
1628    break;
1629  case CK_CoreAVX2:
1630    setFeatureEnabled(Features, "mmx", true);
1631    setFeatureEnabled(Features, "sse4", true);
1632    setFeatureEnabled(Features, "aes", true);
1633    setFeatureEnabled(Features, "lzcnt", true);
1634    setFeatureEnabled(Features, "bmi", true);
1635    setFeatureEnabled(Features, "bmi2", true);
1636    //setFeatureEnabled(Features, "avx2", true);
1637    break;
1638  case CK_K6:
1639  case CK_WinChipC6:
1640    setFeatureEnabled(Features, "mmx", true);
1641    break;
1642  case CK_K6_2:
1643  case CK_K6_3:
1644  case CK_WinChip2:
1645  case CK_C3:
1646    setFeatureEnabled(Features, "3dnow", true);
1647    break;
1648  case CK_Athlon:
1649  case CK_AthlonThunderbird:
1650  case CK_Geode:
1651    setFeatureEnabled(Features, "3dnowa", true);
1652    break;
1653  case CK_Athlon4:
1654  case CK_AthlonXP:
1655  case CK_AthlonMP:
1656    setFeatureEnabled(Features, "sse", true);
1657    setFeatureEnabled(Features, "3dnowa", true);
1658    break;
1659  case CK_K8:
1660  case CK_Opteron:
1661  case CK_Athlon64:
1662  case CK_AthlonFX:
1663    setFeatureEnabled(Features, "sse2", true);
1664    setFeatureEnabled(Features, "3dnowa", true);
1665    break;
1666  case CK_K8SSE3:
1667  case CK_OpteronSSE3:
1668  case CK_Athlon64SSE3:
1669    setFeatureEnabled(Features, "sse3", true);
1670    setFeatureEnabled(Features, "3dnowa", true);
1671    break;
1672  case CK_AMDFAM10:
1673    setFeatureEnabled(Features, "sse3", true);
1674    setFeatureEnabled(Features, "sse4a", true);
1675    setFeatureEnabled(Features, "3dnowa", true);
1676    break;
1677  case CK_BTVER1:
1678    setFeatureEnabled(Features, "ssse3", true);
1679    setFeatureEnabled(Features, "sse4a", true);
1680  case CK_BDVER1:
1681  case CK_BDVER2:
1682    setFeatureEnabled(Features, "sse4", true);
1683    setFeatureEnabled(Features, "sse4a", true);
1684    setFeatureEnabled(Features, "aes", true);
1685    break;
1686  case CK_C3_2:
1687    setFeatureEnabled(Features, "mmx", true);
1688    setFeatureEnabled(Features, "sse", true);
1689    break;
1690  }
1691}
1692
1693bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1694                                      const std::string &Name,
1695                                      bool Enabled) const {
1696  // FIXME: This *really* should not be here.  We need some way of translating
1697  // options into llvm subtarget features.
1698  if (!Features.count(Name) &&
1699      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1700    return false;
1701
1702  // FIXME: this should probably use a switch with fall through.
1703
1704  if (Enabled) {
1705    if (Name == "mmx")
1706      Features["mmx"] = true;
1707    else if (Name == "sse")
1708      Features["mmx"] = Features["sse"] = true;
1709    else if (Name == "sse2")
1710      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1711    else if (Name == "sse3")
1712      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1713        true;
1714    else if (Name == "ssse3")
1715      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1716        Features["ssse3"] = true;
1717    else if (Name == "sse4" || Name == "sse4.2")
1718      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1719        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1720        Features["popcnt"] = true;
1721    else if (Name == "sse4.1")
1722      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1723        Features["ssse3"] = Features["sse41"] = true;
1724    else if (Name == "3dnow")
1725      Features["mmx"] = Features["3dnow"] = true;
1726    else if (Name == "3dnowa")
1727      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
1728    else if (Name == "aes")
1729      Features["aes"] = true;
1730    else if (Name == "avx")
1731      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1732        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1733        Features["popcnt"] = Features["avx"] = true;
1734    else if (Name == "avx2")
1735      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1736        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1737        Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
1738    else if (Name == "fma4")
1739        Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1740        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1741        Features["popcnt"] = Features["avx"] = Features["fma4"] = true;
1742    else if (Name == "sse4a")
1743      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1744        Features["lzcnt"] = Features["popcnt"] = Features["sse4a"] = true;
1745    else if (Name == "lzcnt")
1746      Features["lzcnt"] = true;
1747    else if (Name == "bmi")
1748      Features["bmi"] = true;
1749    else if (Name == "bmi2")
1750      Features["bmi2"] = true;
1751    else if (Name == "popcnt")
1752      Features["popcnt"] = true;
1753  } else {
1754    if (Name == "mmx")
1755      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
1756    else if (Name == "sse")
1757      Features["sse"] = Features["sse2"] = Features["sse3"] =
1758        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1759        Features["sse4a"] = false;
1760    else if (Name == "sse2")
1761      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1762        Features["sse41"] = Features["sse42"] = Features["sse4a"] = false;
1763    else if (Name == "sse3")
1764      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1765        Features["sse42"] = Features["sse4a"] = false;
1766    else if (Name == "ssse3")
1767      Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1768    else if (Name == "sse4" || Name == "sse4.1")
1769      Features["sse41"] = Features["sse42"] = false;
1770    else if (Name == "sse4.2")
1771      Features["sse42"] = false;
1772    else if (Name == "3dnow")
1773      Features["3dnow"] = Features["3dnowa"] = false;
1774    else if (Name == "3dnowa")
1775      Features["3dnowa"] = false;
1776    else if (Name == "aes")
1777      Features["aes"] = false;
1778    else if (Name == "avx")
1779      Features["avx"] = Features["avx2"] = Features["fma4"] = false;
1780    else if (Name == "avx2")
1781      Features["avx2"] = false;
1782    else if (Name == "sse4a")
1783      Features["sse4a"] = false;
1784    else if (Name == "lzcnt")
1785      Features["lzcnt"] = false;
1786    else if (Name == "bmi")
1787      Features["bmi"] = false;
1788    else if (Name == "bmi2")
1789      Features["bmi2"] = false;
1790    else if (Name == "popcnt")
1791      Features["popcnt"] = false;
1792    else if (Name == "fma4")
1793      Features["fma4"] = false;
1794  }
1795
1796  return true;
1797}
1798
1799/// HandleTargetOptions - Perform initialization based on the user
1800/// configured set of features.
1801void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1802  // Remember the maximum enabled sselevel.
1803  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1804    // Ignore disabled features.
1805    if (Features[i][0] == '-')
1806      continue;
1807
1808    if (Features[i].substr(1) == "aes") {
1809      HasAES = true;
1810      continue;
1811    }
1812
1813    if (Features[i].substr(1) == "lzcnt") {
1814      HasLZCNT = true;
1815      continue;
1816    }
1817
1818    if (Features[i].substr(1) == "bmi") {
1819      HasBMI = true;
1820      continue;
1821    }
1822
1823    if (Features[i].substr(1) == "bmi2") {
1824      HasBMI2 = true;
1825      continue;
1826    }
1827
1828    if (Features[i].substr(1) == "popcnt") {
1829      HasPOPCNT = true;
1830      continue;
1831    }
1832
1833    if (Features[i].substr(1) == "fma4") {
1834      HasFMA4 = true;
1835      continue;
1836    }
1837
1838    assert(Features[i][0] == '+' && "Invalid target feature!");
1839    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
1840      .Case("avx2", AVX2)
1841      .Case("avx", AVX)
1842      .Case("sse42", SSE42)
1843      .Case("sse41", SSE41)
1844      .Case("ssse3", SSSE3)
1845      .Case("sse3", SSE3)
1846      .Case("sse2", SSE2)
1847      .Case("sse", SSE1)
1848      .Default(NoSSE);
1849    SSELevel = std::max(SSELevel, Level);
1850
1851    MMX3DNowEnum ThreeDNowLevel =
1852      llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1))
1853        .Case("3dnowa", AMD3DNowAthlon)
1854        .Case("3dnow", AMD3DNow)
1855        .Case("mmx", MMX)
1856        .Default(NoMMX3DNow);
1857
1858    MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
1859  }
1860
1861  // Don't tell the backend if we're turning off mmx; it will end up disabling
1862  // SSE, which we don't want.
1863  std::vector<std::string>::iterator it;
1864  it = std::find(Features.begin(), Features.end(), "-mmx");
1865  if (it != Features.end())
1866    Features.erase(it);
1867}
1868
1869/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
1870/// definitions for this particular subtarget.
1871void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1872                                     MacroBuilder &Builder) const {
1873  // Target identification.
1874  if (PointerWidth == 64) {
1875    Builder.defineMacro("_LP64");
1876    Builder.defineMacro("__LP64__");
1877    Builder.defineMacro("__amd64__");
1878    Builder.defineMacro("__amd64");
1879    Builder.defineMacro("__x86_64");
1880    Builder.defineMacro("__x86_64__");
1881  } else {
1882    DefineStd(Builder, "i386", Opts);
1883  }
1884
1885  // Subtarget options.
1886  // FIXME: We are hard-coding the tune parameters based on the CPU, but they
1887  // truly should be based on -mtune options.
1888  switch (CPU) {
1889  case CK_Generic:
1890    break;
1891  case CK_i386:
1892    // The rest are coming from the i386 define above.
1893    Builder.defineMacro("__tune_i386__");
1894    break;
1895  case CK_i486:
1896  case CK_WinChipC6:
1897  case CK_WinChip2:
1898  case CK_C3:
1899    defineCPUMacros(Builder, "i486");
1900    break;
1901  case CK_PentiumMMX:
1902    Builder.defineMacro("__pentium_mmx__");
1903    Builder.defineMacro("__tune_pentium_mmx__");
1904    // Fallthrough
1905  case CK_i586:
1906  case CK_Pentium:
1907    defineCPUMacros(Builder, "i586");
1908    defineCPUMacros(Builder, "pentium");
1909    break;
1910  case CK_Pentium3:
1911  case CK_Pentium3M:
1912  case CK_PentiumM:
1913    Builder.defineMacro("__tune_pentium3__");
1914    // Fallthrough
1915  case CK_Pentium2:
1916  case CK_C3_2:
1917    Builder.defineMacro("__tune_pentium2__");
1918    // Fallthrough
1919  case CK_PentiumPro:
1920    Builder.defineMacro("__tune_i686__");
1921    Builder.defineMacro("__tune_pentiumpro__");
1922    // Fallthrough
1923  case CK_i686:
1924    Builder.defineMacro("__i686");
1925    Builder.defineMacro("__i686__");
1926    // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
1927    Builder.defineMacro("__pentiumpro");
1928    Builder.defineMacro("__pentiumpro__");
1929    break;
1930  case CK_Pentium4:
1931  case CK_Pentium4M:
1932    defineCPUMacros(Builder, "pentium4");
1933    break;
1934  case CK_Yonah:
1935  case CK_Prescott:
1936  case CK_Nocona:
1937    defineCPUMacros(Builder, "nocona");
1938    break;
1939  case CK_Core2:
1940  case CK_Penryn:
1941    defineCPUMacros(Builder, "core2");
1942    break;
1943  case CK_Atom:
1944    defineCPUMacros(Builder, "atom");
1945    break;
1946  case CK_Corei7:
1947  case CK_Corei7AVX:
1948  case CK_CoreAVXi:
1949  case CK_CoreAVX2:
1950    defineCPUMacros(Builder, "corei7");
1951    break;
1952  case CK_K6_2:
1953    Builder.defineMacro("__k6_2__");
1954    Builder.defineMacro("__tune_k6_2__");
1955    // Fallthrough
1956  case CK_K6_3:
1957    if (CPU != CK_K6_2) {  // In case of fallthrough
1958      // FIXME: GCC may be enabling these in cases where some other k6
1959      // architecture is specified but -m3dnow is explicitly provided. The
1960      // exact semantics need to be determined and emulated here.
1961      Builder.defineMacro("__k6_3__");
1962      Builder.defineMacro("__tune_k6_3__");
1963    }
1964    // Fallthrough
1965  case CK_K6:
1966    defineCPUMacros(Builder, "k6");
1967    break;
1968  case CK_Athlon:
1969  case CK_AthlonThunderbird:
1970  case CK_Athlon4:
1971  case CK_AthlonXP:
1972  case CK_AthlonMP:
1973    defineCPUMacros(Builder, "athlon");
1974    if (SSELevel != NoSSE) {
1975      Builder.defineMacro("__athlon_sse__");
1976      Builder.defineMacro("__tune_athlon_sse__");
1977    }
1978    break;
1979  case CK_K8:
1980  case CK_K8SSE3:
1981  case CK_x86_64:
1982  case CK_Opteron:
1983  case CK_OpteronSSE3:
1984  case CK_Athlon64:
1985  case CK_Athlon64SSE3:
1986  case CK_AthlonFX:
1987    defineCPUMacros(Builder, "k8");
1988    break;
1989  case CK_AMDFAM10:
1990    defineCPUMacros(Builder, "amdfam10");
1991    break;
1992  case CK_BTVER1:
1993    defineCPUMacros(Builder, "btver1");
1994    break;
1995  case CK_BDVER1:
1996    defineCPUMacros(Builder, "bdver1");
1997    break;
1998  case CK_BDVER2:
1999    defineCPUMacros(Builder, "bdver2");
2000    break;
2001  case CK_Geode:
2002    defineCPUMacros(Builder, "geode");
2003    break;
2004  }
2005
2006  // Target properties.
2007  Builder.defineMacro("__LITTLE_ENDIAN__");
2008  Builder.defineMacro("__REGISTER_PREFIX__", "");
2009
2010  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
2011  // functions in glibc header files that use FP Stack inline asm which the
2012  // backend can't deal with (PR879).
2013  Builder.defineMacro("__NO_MATH_INLINES");
2014
2015  if (HasAES)
2016    Builder.defineMacro("__AES__");
2017
2018  if (HasLZCNT)
2019    Builder.defineMacro("__LZCNT__");
2020
2021  if (HasBMI)
2022    Builder.defineMacro("__BMI__");
2023
2024  if (HasBMI2)
2025    Builder.defineMacro("__BMI2__");
2026
2027  if (HasPOPCNT)
2028    Builder.defineMacro("__POPCNT__");
2029
2030  if (HasFMA4)
2031    Builder.defineMacro("__FMA4__");
2032
2033  // Each case falls through to the previous one here.
2034  switch (SSELevel) {
2035  case AVX2:
2036    Builder.defineMacro("__AVX2__");
2037  case AVX:
2038    Builder.defineMacro("__AVX__");
2039  case SSE42:
2040    Builder.defineMacro("__SSE4_2__");
2041  case SSE41:
2042    Builder.defineMacro("__SSE4_1__");
2043  case SSSE3:
2044    Builder.defineMacro("__SSSE3__");
2045  case SSE3:
2046    Builder.defineMacro("__SSE3__");
2047  case SSE2:
2048    Builder.defineMacro("__SSE2__");
2049    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
2050  case SSE1:
2051    Builder.defineMacro("__SSE__");
2052    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
2053  case NoSSE:
2054    break;
2055  }
2056
2057  if (Opts.MicrosoftExt && PointerWidth == 32) {
2058    switch (SSELevel) {
2059    case AVX2:
2060    case AVX:
2061    case SSE42:
2062    case SSE41:
2063    case SSSE3:
2064    case SSE3:
2065    case SSE2:
2066      Builder.defineMacro("_M_IX86_FP", Twine(2));
2067      break;
2068    case SSE1:
2069      Builder.defineMacro("_M_IX86_FP", Twine(1));
2070      break;
2071    default:
2072      Builder.defineMacro("_M_IX86_FP", Twine(0));
2073    }
2074  }
2075
2076  // Each case falls through to the previous one here.
2077  switch (MMX3DNowLevel) {
2078  case AMD3DNowAthlon:
2079    Builder.defineMacro("__3dNOW_A__");
2080  case AMD3DNow:
2081    Builder.defineMacro("__3dNOW__");
2082  case MMX:
2083    Builder.defineMacro("__MMX__");
2084  case NoMMX3DNow:
2085    break;
2086  }
2087}
2088
2089bool X86TargetInfo::hasFeature(StringRef Feature) const {
2090  return llvm::StringSwitch<bool>(Feature)
2091      .Case("aes", HasAES)
2092      .Case("avx", SSELevel >= AVX)
2093      .Case("avx2", SSELevel >= AVX2)
2094      .Case("bmi", HasBMI)
2095      .Case("bmi2", HasBMI2)
2096      .Case("fma4", HasFMA4)
2097      .Case("lzcnt", HasLZCNT)
2098      .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
2099      .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
2100      .Case("mmx", MMX3DNowLevel >= MMX)
2101      .Case("popcnt", HasPOPCNT)
2102      .Case("sse", SSELevel >= SSE1)
2103      .Case("sse2", SSELevel >= SSE2)
2104      .Case("sse3", SSELevel >= SSE3)
2105      .Case("ssse3", SSELevel >= SSSE3)
2106      .Case("sse41", SSELevel >= SSE41)
2107      .Case("sse42", SSELevel >= SSE42)
2108      .Case("x86", true)
2109      .Case("x86_32", PointerWidth == 32)
2110      .Case("x86_64", PointerWidth == 64)
2111      .Default(false);
2112}
2113
2114bool
2115X86TargetInfo::validateAsmConstraint(const char *&Name,
2116                                     TargetInfo::ConstraintInfo &Info) const {
2117  switch (*Name) {
2118  default: return false;
2119  case 'Y': // first letter of a pair:
2120    switch (*(Name+1)) {
2121    default: return false;
2122    case '0':  // First SSE register.
2123    case 't':  // Any SSE register, when SSE2 is enabled.
2124    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
2125    case 'm':  // any MMX register, when inter-unit moves enabled.
2126      break;   // falls through to setAllowsRegister.
2127  }
2128  case 'a': // eax.
2129  case 'b': // ebx.
2130  case 'c': // ecx.
2131  case 'd': // edx.
2132  case 'S': // esi.
2133  case 'D': // edi.
2134  case 'A': // edx:eax.
2135  case 'f': // any x87 floating point stack register.
2136  case 't': // top of floating point stack.
2137  case 'u': // second from top of floating point stack.
2138  case 'q': // Any register accessible as [r]l: a, b, c, and d.
2139  case 'y': // Any MMX register.
2140  case 'x': // Any SSE register.
2141  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2142  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2143  case 'l': // "Index" registers: any general register that can be used as an
2144            // index in a base+index memory access.
2145    Info.setAllowsRegister();
2146    return true;
2147  case 'C': // SSE floating point constant.
2148  case 'G': // x87 floating point constant.
2149  case 'e': // 32-bit signed integer constant for use with zero-extending
2150            // x86_64 instructions.
2151  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2152            // x86_64 instructions.
2153    return true;
2154  }
2155}
2156
2157
2158std::string
2159X86TargetInfo::convertConstraint(const char *&Constraint) const {
2160  switch (*Constraint) {
2161  case 'a': return std::string("{ax}");
2162  case 'b': return std::string("{bx}");
2163  case 'c': return std::string("{cx}");
2164  case 'd': return std::string("{dx}");
2165  case 'S': return std::string("{si}");
2166  case 'D': return std::string("{di}");
2167  case 'p': // address
2168    return std::string("im");
2169  case 't': // top of floating point stack.
2170    return std::string("{st}");
2171  case 'u': // second from top of floating point stack.
2172    return std::string("{st(1)}"); // second from top of floating point stack.
2173  default:
2174    return std::string(1, *Constraint);
2175  }
2176}
2177} // end anonymous namespace
2178
2179namespace {
2180// X86-32 generic target
2181class X86_32TargetInfo : public X86TargetInfo {
2182public:
2183  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2184    DoubleAlign = LongLongAlign = 32;
2185    LongDoubleWidth = 96;
2186    LongDoubleAlign = 32;
2187    SuitableAlign = 128;
2188    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2189                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2190                        "a0:0:64-f80:32:32-n8:16:32-S128";
2191    SizeType = UnsignedInt;
2192    PtrDiffType = SignedInt;
2193    IntPtrType = SignedInt;
2194    RegParmMax = 3;
2195
2196    // Use fpret for all types.
2197    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2198                             (1 << TargetInfo::Double) |
2199                             (1 << TargetInfo::LongDouble));
2200
2201    // x86-32 has atomics up to 8 bytes
2202    // FIXME: Check that we actually have cmpxchg8b before setting
2203    // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2204    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2205  }
2206  virtual const char *getVAListDeclaration() const {
2207    return "typedef char* __builtin_va_list;";
2208  }
2209
2210  int getEHDataRegisterNumber(unsigned RegNo) const {
2211    if (RegNo == 0) return 0;
2212    if (RegNo == 1) return 2;
2213    return -1;
2214  }
2215};
2216} // end anonymous namespace
2217
2218namespace {
2219class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2220public:
2221  NetBSDI386TargetInfo(const std::string &triple) :
2222    NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2223  }
2224
2225  virtual unsigned getFloatEvalMethod() const {
2226    // NetBSD defaults to "double" rounding
2227    return 1;
2228  }
2229};
2230} // end anonymous namespace
2231
2232namespace {
2233class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2234public:
2235  OpenBSDI386TargetInfo(const std::string& triple) :
2236    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2237    SizeType = UnsignedLong;
2238    IntPtrType = SignedLong;
2239    PtrDiffType = SignedLong;
2240  }
2241};
2242} // end anonymous namespace
2243
2244namespace {
2245class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2246public:
2247  DarwinI386TargetInfo(const std::string& triple) :
2248    DarwinTargetInfo<X86_32TargetInfo>(triple) {
2249    LongDoubleWidth = 128;
2250    LongDoubleAlign = 128;
2251    SuitableAlign = 128;
2252    SizeType = UnsignedLong;
2253    IntPtrType = SignedLong;
2254    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2255                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2256                        "a0:0:64-f80:128:128-n8:16:32-S128";
2257    HasAlignMac68kSupport = true;
2258  }
2259
2260};
2261} // end anonymous namespace
2262
2263namespace {
2264// x86-32 Windows target
2265class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2266public:
2267  WindowsX86_32TargetInfo(const std::string& triple)
2268    : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2269    TLSSupported = false;
2270    WCharType = UnsignedShort;
2271    DoubleAlign = LongLongAlign = 64;
2272    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2273                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2274                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2275  }
2276  virtual void getTargetDefines(const LangOptions &Opts,
2277                                MacroBuilder &Builder) const {
2278    WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2279  }
2280};
2281} // end anonymous namespace
2282
2283namespace {
2284
2285// x86-32 Windows Visual Studio target
2286class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2287public:
2288  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2289    : WindowsX86_32TargetInfo(triple) {
2290    LongDoubleWidth = LongDoubleAlign = 64;
2291    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2292  }
2293  virtual void getTargetDefines(const LangOptions &Opts,
2294                                MacroBuilder &Builder) const {
2295    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2296    WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2297    // The value of the following reflects processor type.
2298    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2299    // We lost the original triple, so we use the default.
2300    Builder.defineMacro("_M_IX86", "600");
2301  }
2302};
2303} // end anonymous namespace
2304
2305namespace {
2306// x86-32 MinGW target
2307class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2308public:
2309  MinGWX86_32TargetInfo(const std::string& triple)
2310    : WindowsX86_32TargetInfo(triple) {
2311  }
2312  virtual void getTargetDefines(const LangOptions &Opts,
2313                                MacroBuilder &Builder) const {
2314    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2315    DefineStd(Builder, "WIN32", Opts);
2316    DefineStd(Builder, "WINNT", Opts);
2317    Builder.defineMacro("_X86_");
2318    Builder.defineMacro("__MSVCRT__");
2319    Builder.defineMacro("__MINGW32__");
2320
2321    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2322    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2323    if (Opts.MicrosoftExt)
2324      // Provide "as-is" __declspec.
2325      Builder.defineMacro("__declspec", "__declspec");
2326    else
2327      // Provide alias of __attribute__ like mingw32-gcc.
2328      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2329  }
2330};
2331} // end anonymous namespace
2332
2333namespace {
2334// x86-32 Cygwin target
2335class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2336public:
2337  CygwinX86_32TargetInfo(const std::string& triple)
2338    : X86_32TargetInfo(triple) {
2339    TLSSupported = false;
2340    WCharType = UnsignedShort;
2341    DoubleAlign = LongLongAlign = 64;
2342    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2343                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2344                        "a0:0:64-f80:32:32-n8:16:32-S32";
2345  }
2346  virtual void getTargetDefines(const LangOptions &Opts,
2347                                MacroBuilder &Builder) const {
2348    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2349    Builder.defineMacro("__CYGWIN__");
2350    Builder.defineMacro("__CYGWIN32__");
2351    DefineStd(Builder, "unix", Opts);
2352    if (Opts.CPlusPlus)
2353      Builder.defineMacro("_GNU_SOURCE");
2354  }
2355};
2356} // end anonymous namespace
2357
2358namespace {
2359// x86-32 Haiku target
2360class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2361public:
2362  HaikuX86_32TargetInfo(const std::string& triple)
2363    : X86_32TargetInfo(triple) {
2364    SizeType = UnsignedLong;
2365    IntPtrType = SignedLong;
2366    PtrDiffType = SignedLong;
2367    this->UserLabelPrefix = "";
2368  }
2369  virtual void getTargetDefines(const LangOptions &Opts,
2370                                MacroBuilder &Builder) const {
2371    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2372    Builder.defineMacro("__INTEL__");
2373    Builder.defineMacro("__HAIKU__");
2374  }
2375};
2376} // end anonymous namespace
2377
2378// RTEMS Target
2379template<typename Target>
2380class RTEMSTargetInfo : public OSTargetInfo<Target> {
2381protected:
2382  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2383                            MacroBuilder &Builder) const {
2384    // RTEMS defines; list based off of gcc output
2385
2386    Builder.defineMacro("__rtems__");
2387    Builder.defineMacro("__ELF__");
2388  }
2389public:
2390  RTEMSTargetInfo(const std::string &triple)
2391    : OSTargetInfo<Target>(triple) {
2392      this->UserLabelPrefix = "";
2393
2394      llvm::Triple Triple(triple);
2395      switch (Triple.getArch()) {
2396        default:
2397        case llvm::Triple::x86:
2398          // this->MCountName = ".mcount";
2399          break;
2400        case llvm::Triple::mips:
2401        case llvm::Triple::mipsel:
2402        case llvm::Triple::ppc:
2403        case llvm::Triple::ppc64:
2404          // this->MCountName = "_mcount";
2405          break;
2406        case llvm::Triple::arm:
2407          // this->MCountName = "__mcount";
2408          break;
2409      }
2410
2411    }
2412};
2413
2414namespace {
2415// x86-32 RTEMS target
2416class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2417public:
2418  RTEMSX86_32TargetInfo(const std::string& triple)
2419    : X86_32TargetInfo(triple) {
2420    SizeType = UnsignedLong;
2421    IntPtrType = SignedLong;
2422    PtrDiffType = SignedLong;
2423    this->UserLabelPrefix = "";
2424  }
2425  virtual void getTargetDefines(const LangOptions &Opts,
2426                                MacroBuilder &Builder) const {
2427    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2428    Builder.defineMacro("__INTEL__");
2429    Builder.defineMacro("__rtems__");
2430  }
2431};
2432} // end anonymous namespace
2433
2434namespace {
2435// x86-64 generic target
2436class X86_64TargetInfo : public X86TargetInfo {
2437public:
2438  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2439    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2440    LongDoubleWidth = 128;
2441    LongDoubleAlign = 128;
2442    LargeArrayMinWidth = 128;
2443    LargeArrayAlign = 128;
2444    SuitableAlign = 128;
2445    IntMaxType = SignedLong;
2446    UIntMaxType = UnsignedLong;
2447    Int64Type = SignedLong;
2448    RegParmMax = 6;
2449
2450    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2451                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2452                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2453
2454    // Use fpret only for long double.
2455    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2456
2457    // Use fp2ret for _Complex long double.
2458    ComplexLongDoubleUsesFP2Ret = true;
2459
2460    // x86-64 has atomics up to 16 bytes.
2461    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2462    // on CPUs with cmpxchg16b
2463    MaxAtomicPromoteWidth = 128;
2464    MaxAtomicInlineWidth = 64;
2465  }
2466  virtual const char *getVAListDeclaration() const {
2467    return "typedef struct __va_list_tag {"
2468           "  unsigned gp_offset;"
2469           "  unsigned fp_offset;"
2470           "  void* overflow_arg_area;"
2471           "  void* reg_save_area;"
2472           "} __va_list_tag;"
2473           "typedef __va_list_tag __builtin_va_list[1];";
2474  }
2475
2476  int getEHDataRegisterNumber(unsigned RegNo) const {
2477    if (RegNo == 0) return 0;
2478    if (RegNo == 1) return 1;
2479    return -1;
2480  }
2481};
2482} // end anonymous namespace
2483
2484namespace {
2485// x86-64 Windows target
2486class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2487public:
2488  WindowsX86_64TargetInfo(const std::string& triple)
2489    : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2490    TLSSupported = false;
2491    WCharType = UnsignedShort;
2492    LongWidth = LongAlign = 32;
2493    DoubleAlign = LongLongAlign = 64;
2494    IntMaxType = SignedLongLong;
2495    UIntMaxType = UnsignedLongLong;
2496    Int64Type = SignedLongLong;
2497    SizeType = UnsignedLongLong;
2498    PtrDiffType = SignedLongLong;
2499    IntPtrType = SignedLongLong;
2500    this->UserLabelPrefix = "";
2501  }
2502  virtual void getTargetDefines(const LangOptions &Opts,
2503                                MacroBuilder &Builder) const {
2504    WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2505    Builder.defineMacro("_WIN64");
2506  }
2507  virtual const char *getVAListDeclaration() const {
2508    return "typedef char* __builtin_va_list;";
2509  }
2510};
2511} // end anonymous namespace
2512
2513namespace {
2514// x86-64 Windows Visual Studio target
2515class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2516public:
2517  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2518    : WindowsX86_64TargetInfo(triple) {
2519    LongDoubleWidth = LongDoubleAlign = 64;
2520    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2521  }
2522  virtual void getTargetDefines(const LangOptions &Opts,
2523                                MacroBuilder &Builder) const {
2524    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2525    WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2526    Builder.defineMacro("_M_X64");
2527    Builder.defineMacro("_M_AMD64");
2528  }
2529};
2530} // end anonymous namespace
2531
2532namespace {
2533// x86-64 MinGW target
2534class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2535public:
2536  MinGWX86_64TargetInfo(const std::string& triple)
2537    : WindowsX86_64TargetInfo(triple) {
2538  }
2539  virtual void getTargetDefines(const LangOptions &Opts,
2540                                MacroBuilder &Builder) const {
2541    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2542    DefineStd(Builder, "WIN64", Opts);
2543    Builder.defineMacro("__MSVCRT__");
2544    Builder.defineMacro("__MINGW32__");
2545    Builder.defineMacro("__MINGW64__");
2546
2547    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2548    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2549    if (Opts.MicrosoftExt)
2550      // Provide "as-is" __declspec.
2551      Builder.defineMacro("__declspec", "__declspec");
2552    else
2553      // Provide alias of __attribute__ like mingw32-gcc.
2554      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2555  }
2556};
2557} // end anonymous namespace
2558
2559namespace {
2560class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2561public:
2562  DarwinX86_64TargetInfo(const std::string& triple)
2563      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2564    Int64Type = SignedLongLong;
2565  }
2566};
2567} // end anonymous namespace
2568
2569namespace {
2570class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2571public:
2572  OpenBSDX86_64TargetInfo(const std::string& triple)
2573      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2574    IntMaxType = SignedLongLong;
2575    UIntMaxType = UnsignedLongLong;
2576    Int64Type = SignedLongLong;
2577  }
2578};
2579} // end anonymous namespace
2580
2581namespace {
2582class ARMTargetInfo : public TargetInfo {
2583  // Possible FPU choices.
2584  enum FPUMode {
2585    NoFPU,
2586    VFP2FPU,
2587    VFP3FPU,
2588    NeonFPU
2589  };
2590
2591  static bool FPUModeIsVFP(FPUMode Mode) {
2592    return Mode >= VFP2FPU && Mode <= NeonFPU;
2593  }
2594
2595  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2596  static const char * const GCCRegNames[];
2597
2598  std::string ABI, CPU;
2599
2600  unsigned FPU : 3;
2601
2602  unsigned IsThumb : 1;
2603
2604  // Initialized via features.
2605  unsigned SoftFloat : 1;
2606  unsigned SoftFloatABI : 1;
2607
2608  static const Builtin::Info BuiltinInfo[];
2609
2610public:
2611  ARMTargetInfo(const std::string &TripleStr)
2612    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
2613  {
2614    BigEndian = false;
2615    SizeType = UnsignedInt;
2616    PtrDiffType = SignedInt;
2617    // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
2618    WCharType = UnsignedInt;
2619
2620    // {} in inline assembly are neon specifiers, not assembly variant
2621    // specifiers.
2622    NoAsmVariants = true;
2623
2624    // FIXME: Should we just treat this as a feature?
2625    IsThumb = getTriple().getArchName().startswith("thumb");
2626    if (IsThumb) {
2627      // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2628      // so set preferred for small types to 32.
2629      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2630                           "i64:64:64-f32:32:32-f64:64:64-"
2631                           "v64:64:64-v128:64:128-a0:0:32-n32-S64");
2632    } else {
2633      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2634                           "i64:64:64-f32:32:32-f64:64:64-"
2635                           "v64:64:64-v128:64:128-a0:0:64-n32-S64");
2636    }
2637
2638    // ARM targets default to using the ARM C++ ABI.
2639    CXXABI = CXXABI_ARM;
2640
2641    // ARM has atomics up to 8 bytes
2642    // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
2643    MaxAtomicPromoteWidth = 64;
2644  }
2645  virtual const char *getABI() const { return ABI.c_str(); }
2646  virtual bool setABI(const std::string &Name) {
2647    ABI = Name;
2648
2649    // The defaults (above) are for AAPCS, check if we need to change them.
2650    //
2651    // FIXME: We need support for -meabi... we could just mangle it into the
2652    // name.
2653    if (Name == "apcs-gnu") {
2654      DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
2655      SizeType = UnsignedLong;
2656
2657      // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
2658      WCharType = SignedInt;
2659
2660      // Do not respect the alignment of bit-field types when laying out
2661      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
2662      UseBitFieldTypeAlignment = false;
2663
2664      /// Do force alignment of members that follow zero length bitfields.  If
2665      /// the alignment of the zero-length bitfield is greater than the member
2666      /// that follows it, `bar', `bar' will be aligned as the  type of the
2667      /// zero length bitfield.
2668      UseZeroLengthBitfieldAlignment = true;
2669
2670      /// gcc forces the alignment to 4 bytes, regardless of the type of the
2671      /// zero length bitfield.  This corresponds to EMPTY_FIELD_BOUNDARY in
2672      /// gcc.
2673      ZeroLengthBitfieldBoundary = 32;
2674
2675      if (IsThumb) {
2676        // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2677        // so set preferred for small types to 32.
2678        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2679                             "i64:32:64-f32:32:32-f64:32:64-"
2680                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2681      } else {
2682        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2683                             "i64:32:64-f32:32:32-f64:32:64-"
2684                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2685      }
2686
2687      // FIXME: Override "preferred align" for double and long long.
2688    } else if (Name == "aapcs") {
2689      // FIXME: Enumerated types are variable width in straight AAPCS.
2690    } else if (Name == "aapcs-linux") {
2691      ;
2692    } else
2693      return false;
2694
2695    return true;
2696  }
2697
2698  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
2699    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
2700      Features["vfp2"] = true;
2701    else if (CPU == "cortex-a8" || CPU == "cortex-a9")
2702      Features["neon"] = true;
2703  }
2704
2705  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2706                                 const std::string &Name,
2707                                 bool Enabled) const {
2708    if (Name == "soft-float" || Name == "soft-float-abi" ||
2709        Name == "vfp2" || Name == "vfp3" || Name == "neon" || Name == "d16") {
2710      Features[Name] = Enabled;
2711    } else
2712      return false;
2713
2714    return true;
2715  }
2716
2717  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2718    FPU = NoFPU;
2719    SoftFloat = SoftFloatABI = false;
2720    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
2721      if (Features[i] == "+soft-float")
2722        SoftFloat = true;
2723      else if (Features[i] == "+soft-float-abi")
2724        SoftFloatABI = true;
2725      else if (Features[i] == "+vfp2")
2726        FPU = VFP2FPU;
2727      else if (Features[i] == "+vfp3")
2728        FPU = VFP3FPU;
2729      else if (Features[i] == "+neon")
2730        FPU = NeonFPU;
2731    }
2732
2733    // Remove front-end specific options which the backend handles differently.
2734    std::vector<std::string>::iterator it;
2735    it = std::find(Features.begin(), Features.end(), "+soft-float");
2736    if (it != Features.end())
2737      Features.erase(it);
2738    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
2739    if (it != Features.end())
2740      Features.erase(it);
2741  }
2742
2743  virtual bool hasFeature(StringRef Feature) const {
2744    return llvm::StringSwitch<bool>(Feature)
2745        .Case("arm", true)
2746        .Case("softfloat", SoftFloat)
2747        .Case("thumb", IsThumb)
2748        .Case("neon", FPU == NeonFPU && !SoftFloat &&
2749              StringRef(getCPUDefineSuffix(CPU)).startswith("7"))
2750        .Default(false);
2751  }
2752  static const char *getCPUDefineSuffix(StringRef Name) {
2753    return llvm::StringSwitch<const char*>(Name)
2754      .Cases("arm8", "arm810", "4")
2755      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
2756      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
2757      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
2758      .Case("ep9312", "4T")
2759      .Cases("arm10tdmi", "arm1020t", "5T")
2760      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
2761      .Case("arm926ej-s", "5TEJ")
2762      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
2763      .Cases("xscale", "iwmmxt", "5TE")
2764      .Case("arm1136j-s", "6J")
2765      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
2766      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
2767      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
2768      .Cases("cortex-a8", "cortex-a9", "7A")
2769      .Case("cortex-m3", "7M")
2770      .Case("cortex-m0", "6M")
2771      .Default(0);
2772  }
2773  virtual bool setCPU(const std::string &Name) {
2774    if (!getCPUDefineSuffix(Name))
2775      return false;
2776
2777    CPU = Name;
2778    return true;
2779  }
2780  virtual void getTargetDefines(const LangOptions &Opts,
2781                                MacroBuilder &Builder) const {
2782    // Target identification.
2783    Builder.defineMacro("__arm");
2784    Builder.defineMacro("__arm__");
2785
2786    // Target properties.
2787    Builder.defineMacro("__ARMEL__");
2788    Builder.defineMacro("__LITTLE_ENDIAN__");
2789    Builder.defineMacro("__REGISTER_PREFIX__", "");
2790
2791    StringRef CPUArch = getCPUDefineSuffix(CPU);
2792    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
2793
2794    // Subtarget options.
2795
2796    // FIXME: It's more complicated than this and we don't really support
2797    // interworking.
2798    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
2799      Builder.defineMacro("__THUMB_INTERWORK__");
2800
2801    if (ABI == "aapcs" || ABI == "aapcs-linux")
2802      Builder.defineMacro("__ARM_EABI__");
2803
2804    if (SoftFloat)
2805      Builder.defineMacro("__SOFTFP__");
2806
2807    if (CPU == "xscale")
2808      Builder.defineMacro("__XSCALE__");
2809
2810    bool IsARMv7 = CPUArch.startswith("7");
2811    if (IsThumb) {
2812      Builder.defineMacro("__THUMBEL__");
2813      Builder.defineMacro("__thumb__");
2814      if (CPUArch == "6T2" || IsARMv7)
2815        Builder.defineMacro("__thumb2__");
2816    }
2817
2818    // Note, this is always on in gcc, even though it doesn't make sense.
2819    Builder.defineMacro("__APCS_32__");
2820
2821    if (FPUModeIsVFP((FPUMode) FPU))
2822      Builder.defineMacro("__VFP_FP__");
2823
2824    // This only gets set when Neon instructions are actually available, unlike
2825    // the VFP define, hence the soft float and arch check. This is subtly
2826    // different from gcc, we follow the intent which was that it should be set
2827    // when Neon instructions are actually available.
2828    if (FPU == NeonFPU && !SoftFloat && IsARMv7)
2829      Builder.defineMacro("__ARM_NEON__");
2830  }
2831  virtual void getTargetBuiltins(const Builtin::Info *&Records,
2832                                 unsigned &NumRecords) const {
2833    Records = BuiltinInfo;
2834    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
2835  }
2836  virtual bool isCLZForZeroUndef() const { return false; }
2837  virtual const char *getVAListDeclaration() const {
2838    return "typedef void* __builtin_va_list;";
2839  }
2840  virtual void getGCCRegNames(const char * const *&Names,
2841                              unsigned &NumNames) const;
2842  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2843                                unsigned &NumAliases) const;
2844  virtual bool validateAsmConstraint(const char *&Name,
2845                                     TargetInfo::ConstraintInfo &Info) const {
2846    // FIXME: Check if this is complete
2847    switch (*Name) {
2848    default:
2849    case 'l': // r0-r7
2850    case 'h': // r8-r15
2851    case 'w': // VFP Floating point register single precision
2852    case 'P': // VFP Floating point register double precision
2853      Info.setAllowsRegister();
2854      return true;
2855    case 'Q': // A memory address that is a single base register.
2856      Info.setAllowsMemory();
2857      return true;
2858    case 'U': // a memory reference...
2859      switch (Name[1]) {
2860      case 'q': // ...ARMV4 ldrsb
2861      case 'v': // ...VFP load/store (reg+constant offset)
2862      case 'y': // ...iWMMXt load/store
2863      case 't': // address valid for load/store opaque types wider
2864	        // than 128-bits
2865      case 'n': // valid address for Neon doubleword vector load/store
2866      case 'm': // valid address for Neon element and structure load/store
2867      case 's': // valid address for non-offset loads/stores of quad-word
2868	        // values in four ARM registers
2869        Info.setAllowsMemory();
2870        Name++;
2871        return true;
2872      }
2873    }
2874    return false;
2875  }
2876  virtual std::string convertConstraint(const char *&Constraint) const {
2877    std::string R;
2878    switch (*Constraint) {
2879    case 'U':   // Two-character constraint; add "^" hint for later parsing.
2880      R = std::string("^") + std::string(Constraint, 2);
2881      Constraint++;
2882      break;
2883    case 'p': // 'p' should be translated to 'r' by default.
2884      R = std::string("r");
2885      break;
2886    default:
2887      return std::string(1, *Constraint);
2888    }
2889    return R;
2890  }
2891  virtual const char *getClobbers() const {
2892    // FIXME: Is this really right?
2893    return "";
2894  }
2895};
2896
2897const char * const ARMTargetInfo::GCCRegNames[] = {
2898  // Integer registers
2899  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2900  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
2901
2902  // Float registers
2903  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
2904  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
2905  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
2906  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
2907
2908  // Double registers
2909  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
2910  "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
2911  "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
2912  "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
2913
2914  // Quad registers
2915  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
2916  "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
2917};
2918
2919void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
2920                                   unsigned &NumNames) const {
2921  Names = GCCRegNames;
2922  NumNames = llvm::array_lengthof(GCCRegNames);
2923}
2924
2925const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
2926  { { "a1" }, "r0" },
2927  { { "a2" }, "r1" },
2928  { { "a3" }, "r2" },
2929  { { "a4" }, "r3" },
2930  { { "v1" }, "r4" },
2931  { { "v2" }, "r5" },
2932  { { "v3" }, "r6" },
2933  { { "v4" }, "r7" },
2934  { { "v5" }, "r8" },
2935  { { "v6", "rfp" }, "r9" },
2936  { { "sl" }, "r10" },
2937  { { "fp" }, "r11" },
2938  { { "ip" }, "r12" },
2939  { { "r13" }, "sp" },
2940  { { "r14" }, "lr" },
2941  { { "r15" }, "pc" },
2942  // The S, D and Q registers overlap, but aren't really aliases; we
2943  // don't want to substitute one of these for a different-sized one.
2944};
2945
2946void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2947                                       unsigned &NumAliases) const {
2948  Aliases = GCCRegAliases;
2949  NumAliases = llvm::array_lengthof(GCCRegAliases);
2950}
2951
2952const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
2953#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
2954#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
2955                                              ALL_LANGUAGES },
2956#include "clang/Basic/BuiltinsARM.def"
2957};
2958} // end anonymous namespace.
2959
2960namespace {
2961class DarwinARMTargetInfo :
2962  public DarwinTargetInfo<ARMTargetInfo> {
2963protected:
2964  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2965                            MacroBuilder &Builder) const {
2966    getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
2967  }
2968
2969public:
2970  DarwinARMTargetInfo(const std::string& triple)
2971    : DarwinTargetInfo<ARMTargetInfo>(triple) {
2972    HasAlignMac68kSupport = true;
2973    // iOS always has 64-bit atomic instructions.
2974    // FIXME: This should be based off of the target features in ARMTargetInfo.
2975    MaxAtomicInlineWidth = 64;
2976  }
2977};
2978} // end anonymous namespace.
2979
2980
2981namespace {
2982// Hexagon abstract base class
2983class HexagonTargetInfo : public TargetInfo {
2984  static const Builtin::Info BuiltinInfo[];
2985  static const char * const GCCRegNames[];
2986  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2987  std::string CPU;
2988public:
2989  HexagonTargetInfo(const std::string& triple) : TargetInfo(triple)  {
2990    BigEndian = false;
2991    DescriptionString = ("e-p:32:32:32-"
2992                         "i64:64:64-i32:32:32-"
2993                         "i16:16:16-i1:32:32-a:0:0");
2994
2995    // {} in inline assembly are packet specifiers, not assembly variant
2996    // specifiers.
2997    NoAsmVariants = true;
2998  }
2999
3000  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3001                                 unsigned &NumRecords) const {
3002    Records = BuiltinInfo;
3003    NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
3004  }
3005
3006  virtual bool validateAsmConstraint(const char *&Name,
3007                                     TargetInfo::ConstraintInfo &Info) const {
3008    return true;
3009  }
3010
3011  virtual void getTargetDefines(const LangOptions &Opts,
3012                                MacroBuilder &Builder) const;
3013
3014  virtual bool hasFeature(StringRef Feature) const {
3015    return Feature == "hexagon";
3016  }
3017
3018  virtual const char *getVAListDeclaration() const {
3019    return "typedef char* __builtin_va_list;";
3020  }
3021  virtual void getGCCRegNames(const char * const *&Names,
3022                              unsigned &NumNames) const;
3023  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3024                                unsigned &NumAliases) const;
3025  virtual const char *getClobbers() const {
3026    return "";
3027  }
3028
3029  static const char *getHexagonCPUSuffix(StringRef Name) {
3030    return llvm::StringSwitch<const char*>(Name)
3031      .Case("hexagonv2", "2")
3032      .Case("hexagonv3", "3")
3033      .Case("hexagonv4", "4")
3034      .Default(0);
3035  }
3036
3037  virtual bool setCPU(const std::string &Name) {
3038    if (!getHexagonCPUSuffix(Name))
3039      return false;
3040
3041    CPU = Name;
3042    return true;
3043  }
3044};
3045
3046void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
3047                                MacroBuilder &Builder) const {
3048  Builder.defineMacro("qdsp6");
3049  Builder.defineMacro("__qdsp6", "1");
3050  Builder.defineMacro("__qdsp6__", "1");
3051
3052  Builder.defineMacro("hexagon");
3053  Builder.defineMacro("__hexagon", "1");
3054  Builder.defineMacro("__hexagon__", "1");
3055
3056  if(CPU == "hexagonv1") {
3057    Builder.defineMacro("__HEXAGON_V1__");
3058    Builder.defineMacro("__HEXAGON_ARCH__", "1");
3059    if(Opts.HexagonQdsp6Compat) {
3060      Builder.defineMacro("__QDSP6_V1__");
3061      Builder.defineMacro("__QDSP6_ARCH__", "1");
3062    }
3063  }
3064  else if(CPU == "hexagonv2") {
3065    Builder.defineMacro("__HEXAGON_V2__");
3066    Builder.defineMacro("__HEXAGON_ARCH__", "2");
3067    if(Opts.HexagonQdsp6Compat) {
3068      Builder.defineMacro("__QDSP6_V2__");
3069      Builder.defineMacro("__QDSP6_ARCH__", "2");
3070    }
3071  }
3072  else if(CPU == "hexagonv3") {
3073    Builder.defineMacro("__HEXAGON_V3__");
3074    Builder.defineMacro("__HEXAGON_ARCH__", "3");
3075    if(Opts.HexagonQdsp6Compat) {
3076      Builder.defineMacro("__QDSP6_V3__");
3077      Builder.defineMacro("__QDSP6_ARCH__", "3");
3078    }
3079  }
3080  else if(CPU == "hexagonv4") {
3081    Builder.defineMacro("__HEXAGON_V4__");
3082    Builder.defineMacro("__HEXAGON_ARCH__", "4");
3083    if(Opts.HexagonQdsp6Compat) {
3084      Builder.defineMacro("__QDSP6_V4__");
3085      Builder.defineMacro("__QDSP6_ARCH__", "4");
3086    }
3087  }
3088}
3089
3090const char * const HexagonTargetInfo::GCCRegNames[] = {
3091  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3092  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3093  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3094  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3095  "p0", "p1", "p2", "p3",
3096  "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3097};
3098
3099void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3100                                   unsigned &NumNames) const {
3101  Names = GCCRegNames;
3102  NumNames = llvm::array_lengthof(GCCRegNames);
3103}
3104
3105
3106const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3107  { { "sp" }, "r29" },
3108  { { "fp" }, "r30" },
3109  { { "lr" }, "r31" },
3110 };
3111
3112void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3113                                     unsigned &NumAliases) const {
3114  Aliases = GCCRegAliases;
3115  NumAliases = llvm::array_lengthof(GCCRegAliases);
3116}
3117
3118
3119const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3120#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3121#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3122                                              ALL_LANGUAGES },
3123#include "clang/Basic/BuiltinsHexagon.def"
3124};
3125}
3126
3127
3128namespace {
3129class SparcV8TargetInfo : public TargetInfo {
3130  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3131  static const char * const GCCRegNames[];
3132  bool SoftFloat;
3133public:
3134  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3135    // FIXME: Support Sparc quad-precision long double?
3136    BigEndian = false;
3137    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3138                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3139  }
3140  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3141                                 const std::string &Name,
3142                                 bool Enabled) const {
3143    if (Name == "soft-float")
3144      Features[Name] = Enabled;
3145    else
3146      return false;
3147
3148    return true;
3149  }
3150  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3151    SoftFloat = false;
3152    for (unsigned i = 0, e = Features.size(); i != e; ++i)
3153      if (Features[i] == "+soft-float")
3154        SoftFloat = true;
3155  }
3156  virtual void getTargetDefines(const LangOptions &Opts,
3157                                MacroBuilder &Builder) const {
3158    DefineStd(Builder, "sparc", Opts);
3159    Builder.defineMacro("__sparcv8");
3160    Builder.defineMacro("__REGISTER_PREFIX__", "");
3161
3162    if (SoftFloat)
3163      Builder.defineMacro("SOFT_FLOAT", "1");
3164  }
3165
3166  virtual bool hasFeature(StringRef Feature) const {
3167    return llvm::StringSwitch<bool>(Feature)
3168             .Case("softfloat", SoftFloat)
3169             .Case("sparc", true)
3170             .Default(false);
3171  }
3172
3173  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3174                                 unsigned &NumRecords) const {
3175    // FIXME: Implement!
3176  }
3177  virtual const char *getVAListDeclaration() const {
3178    return "typedef void* __builtin_va_list;";
3179  }
3180  virtual void getGCCRegNames(const char * const *&Names,
3181                              unsigned &NumNames) const;
3182  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3183                                unsigned &NumAliases) const;
3184  virtual bool validateAsmConstraint(const char *&Name,
3185                                     TargetInfo::ConstraintInfo &info) const {
3186    // FIXME: Implement!
3187    return false;
3188  }
3189  virtual const char *getClobbers() const {
3190    // FIXME: Implement!
3191    return "";
3192  }
3193};
3194
3195const char * const SparcV8TargetInfo::GCCRegNames[] = {
3196  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3197  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3198  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3199  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3200};
3201
3202void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3203                                       unsigned &NumNames) const {
3204  Names = GCCRegNames;
3205  NumNames = llvm::array_lengthof(GCCRegNames);
3206}
3207
3208const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3209  { { "g0" }, "r0" },
3210  { { "g1" }, "r1" },
3211  { { "g2" }, "r2" },
3212  { { "g3" }, "r3" },
3213  { { "g4" }, "r4" },
3214  { { "g5" }, "r5" },
3215  { { "g6" }, "r6" },
3216  { { "g7" }, "r7" },
3217  { { "o0" }, "r8" },
3218  { { "o1" }, "r9" },
3219  { { "o2" }, "r10" },
3220  { { "o3" }, "r11" },
3221  { { "o4" }, "r12" },
3222  { { "o5" }, "r13" },
3223  { { "o6", "sp" }, "r14" },
3224  { { "o7" }, "r15" },
3225  { { "l0" }, "r16" },
3226  { { "l1" }, "r17" },
3227  { { "l2" }, "r18" },
3228  { { "l3" }, "r19" },
3229  { { "l4" }, "r20" },
3230  { { "l5" }, "r21" },
3231  { { "l6" }, "r22" },
3232  { { "l7" }, "r23" },
3233  { { "i0" }, "r24" },
3234  { { "i1" }, "r25" },
3235  { { "i2" }, "r26" },
3236  { { "i3" }, "r27" },
3237  { { "i4" }, "r28" },
3238  { { "i5" }, "r29" },
3239  { { "i6", "fp" }, "r30" },
3240  { { "i7" }, "r31" },
3241};
3242
3243void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3244                                         unsigned &NumAliases) const {
3245  Aliases = GCCRegAliases;
3246  NumAliases = llvm::array_lengthof(GCCRegAliases);
3247}
3248} // end anonymous namespace.
3249
3250namespace {
3251class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3252public:
3253  AuroraUXSparcV8TargetInfo(const std::string& triple) :
3254      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3255    SizeType = UnsignedInt;
3256    PtrDiffType = SignedInt;
3257  }
3258};
3259class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3260public:
3261  SolarisSparcV8TargetInfo(const std::string& triple) :
3262      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3263    SizeType = UnsignedInt;
3264    PtrDiffType = SignedInt;
3265  }
3266};
3267} // end anonymous namespace.
3268
3269namespace {
3270  class MSP430TargetInfo : public TargetInfo {
3271    static const char * const GCCRegNames[];
3272  public:
3273    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3274      BigEndian = false;
3275      TLSSupported = false;
3276      IntWidth = 16; IntAlign = 16;
3277      LongWidth = 32; LongLongWidth = 64;
3278      LongAlign = LongLongAlign = 16;
3279      PointerWidth = 16; PointerAlign = 16;
3280      SuitableAlign = 16;
3281      SizeType = UnsignedInt;
3282      IntMaxType = SignedLong;
3283      UIntMaxType = UnsignedLong;
3284      IntPtrType = SignedShort;
3285      PtrDiffType = SignedInt;
3286      SigAtomicType = SignedLong;
3287      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3288   }
3289    virtual void getTargetDefines(const LangOptions &Opts,
3290                                  MacroBuilder &Builder) const {
3291      Builder.defineMacro("MSP430");
3292      Builder.defineMacro("__MSP430__");
3293      // FIXME: defines for different 'flavours' of MCU
3294    }
3295    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3296                                   unsigned &NumRecords) const {
3297     // FIXME: Implement.
3298      Records = 0;
3299      NumRecords = 0;
3300    }
3301    virtual bool hasFeature(StringRef Feature) const {
3302      return Feature == "msp430";
3303    }
3304    virtual void getGCCRegNames(const char * const *&Names,
3305                                unsigned &NumNames) const;
3306    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3307                                  unsigned &NumAliases) const {
3308      // No aliases.
3309      Aliases = 0;
3310      NumAliases = 0;
3311    }
3312    virtual bool validateAsmConstraint(const char *&Name,
3313                                       TargetInfo::ConstraintInfo &info) const {
3314      // No target constraints for now.
3315      return false;
3316    }
3317    virtual const char *getClobbers() const {
3318      // FIXME: Is this really right?
3319      return "";
3320    }
3321    virtual const char *getVAListDeclaration() const {
3322      // FIXME: implement
3323      return "typedef char* __builtin_va_list;";
3324   }
3325  };
3326
3327  const char * const MSP430TargetInfo::GCCRegNames[] = {
3328    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3329    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3330  };
3331
3332  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3333                                        unsigned &NumNames) const {
3334    Names = GCCRegNames;
3335    NumNames = llvm::array_lengthof(GCCRegNames);
3336  }
3337}
3338
3339namespace {
3340
3341  // LLVM and Clang cannot be used directly to output native binaries for
3342  // target, but is used to compile C code to llvm bitcode with correct
3343  // type and alignment information.
3344  //
3345  // TCE uses the llvm bitcode as input and uses it for generating customized
3346  // target processor and program binary. TCE co-design environment is
3347  // publicly available in http://tce.cs.tut.fi
3348
3349  static const unsigned TCEOpenCLAddrSpaceMap[] = {
3350      3, // opencl_global
3351      4, // opencl_local
3352      5  // opencl_constant
3353  };
3354
3355  class TCETargetInfo : public TargetInfo{
3356  public:
3357    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3358      TLSSupported = false;
3359      IntWidth = 32;
3360      LongWidth = LongLongWidth = 32;
3361      PointerWidth = 32;
3362      IntAlign = 32;
3363      LongAlign = LongLongAlign = 32;
3364      PointerAlign = 32;
3365      SuitableAlign = 32;
3366      SizeType = UnsignedInt;
3367      IntMaxType = SignedLong;
3368      UIntMaxType = UnsignedLong;
3369      IntPtrType = SignedInt;
3370      PtrDiffType = SignedInt;
3371      FloatWidth = 32;
3372      FloatAlign = 32;
3373      DoubleWidth = 32;
3374      DoubleAlign = 32;
3375      LongDoubleWidth = 32;
3376      LongDoubleAlign = 32;
3377      FloatFormat = &llvm::APFloat::IEEEsingle;
3378      DoubleFormat = &llvm::APFloat::IEEEsingle;
3379      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3380      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3381                          "i16:16:32-i32:32:32-i64:32:32-"
3382                          "f32:32:32-f64:32:32-v64:32:32-"
3383                          "v128:32:32-a0:0:32-n32";
3384      AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3385    }
3386
3387    virtual void getTargetDefines(const LangOptions &Opts,
3388                                  MacroBuilder &Builder) const {
3389      DefineStd(Builder, "tce", Opts);
3390      Builder.defineMacro("__TCE__");
3391      Builder.defineMacro("__TCE_V1__");
3392    }
3393    virtual bool hasFeature(StringRef Feature) const {
3394      return Feature == "tce";
3395    }
3396
3397    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3398                                   unsigned &NumRecords) const {}
3399    virtual const char *getClobbers() const {
3400      return "";
3401    }
3402    virtual const char *getVAListDeclaration() const {
3403      return "typedef void* __builtin_va_list;";
3404    }
3405    virtual void getGCCRegNames(const char * const *&Names,
3406                                unsigned &NumNames) const {}
3407    virtual bool validateAsmConstraint(const char *&Name,
3408                                       TargetInfo::ConstraintInfo &info) const {
3409      return true;
3410    }
3411    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3412                                  unsigned &NumAliases) const {}
3413  };
3414}
3415
3416namespace {
3417class MipsTargetInfoBase : public TargetInfo {
3418  std::string CPU;
3419protected:
3420  std::string ABI;
3421public:
3422  MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr)
3423    : TargetInfo(triple), ABI(ABIStr) {}
3424  virtual const char *getABI() const { return ABI.c_str(); }
3425  virtual bool setABI(const std::string &Name) = 0;
3426  virtual bool setCPU(const std::string &Name) {
3427    CPU = Name;
3428    return true;
3429  }
3430  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3431    Features[ABI] = true;
3432    Features[CPU] = true;
3433  }
3434  virtual void getArchDefines(const LangOptions &Opts,
3435                              MacroBuilder &Builder) const = 0;
3436  virtual void getTargetDefines(const LangOptions &Opts,
3437                                MacroBuilder &Builder) const = 0;
3438  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3439                                 unsigned &NumRecords) const {
3440    // FIXME: Implement!
3441  }
3442  virtual bool hasFeature(StringRef Feature) const {
3443    return Feature == "mips";
3444  }
3445  virtual const char *getVAListDeclaration() const {
3446    return "typedef void* __builtin_va_list;";
3447  }
3448  virtual void getGCCRegNames(const char * const *&Names,
3449                              unsigned &NumNames) const {
3450    static const char * const GCCRegNames[] = {
3451      "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
3452      "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
3453      "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
3454      "$24",  "$25",  "$26",  "$27",  "$28",  "$sp",  "$fp",  "$31",
3455      "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
3456      "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
3457      "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
3458      "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
3459      "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
3460      "$fcc5","$fcc6","$fcc7"
3461    };
3462    Names = GCCRegNames;
3463    NumNames = llvm::array_lengthof(GCCRegNames);
3464  }
3465  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3466                                unsigned &NumAliases) const = 0;
3467  virtual bool validateAsmConstraint(const char *&Name,
3468                                     TargetInfo::ConstraintInfo &Info) const {
3469    switch (*Name) {
3470    default:
3471      return false;
3472
3473    case 'r': // CPU registers.
3474    case 'd': // Equivalent to "r" unless generating MIPS16 code.
3475    case 'y': // Equivalent to "r", backwards compatibility only.
3476    case 'f': // floating-point registers.
3477      Info.setAllowsRegister();
3478      return true;
3479    }
3480  }
3481
3482  virtual const char *getClobbers() const {
3483    // FIXME: Implement!
3484    return "";
3485  }
3486};
3487
3488class Mips32TargetInfoBase : public MipsTargetInfoBase {
3489public:
3490  Mips32TargetInfoBase(const std::string& triple) :
3491    MipsTargetInfoBase(triple, "o32") {
3492    SizeType = UnsignedInt;
3493    PtrDiffType = SignedInt;
3494  }
3495  virtual bool setABI(const std::string &Name) {
3496    if ((Name == "o32") || (Name == "eabi")) {
3497      ABI = Name;
3498      return true;
3499    } else
3500      return false;
3501  }
3502  virtual void getArchDefines(const LangOptions &Opts,
3503                              MacroBuilder &Builder) const {
3504    Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
3505    Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
3506    Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
3507
3508    if (ABI == "o32") {
3509      Builder.defineMacro("__mips_o32");
3510      Builder.defineMacro("_ABIO32", "1");
3511      Builder.defineMacro("_MIPS_SIM", "_ABIO32");
3512    }
3513    else if (ABI == "eabi")
3514      Builder.defineMacro("__mips_eabi");
3515    else
3516      llvm_unreachable("Invalid ABI for Mips32.");
3517  }
3518  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3519                                unsigned &NumAliases) const {
3520    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3521      { { "at" },  "$1" },
3522      { { "v0" },  "$2" },
3523      { { "v1" },  "$3" },
3524      { { "a0" },  "$4" },
3525      { { "a1" },  "$5" },
3526      { { "a2" },  "$6" },
3527      { { "a3" },  "$7" },
3528      { { "t0" },  "$8" },
3529      { { "t1" },  "$9" },
3530      { { "t2" }, "$10" },
3531      { { "t3" }, "$11" },
3532      { { "t4" }, "$12" },
3533      { { "t5" }, "$13" },
3534      { { "t6" }, "$14" },
3535      { { "t7" }, "$15" },
3536      { { "s0" }, "$16" },
3537      { { "s1" }, "$17" },
3538      { { "s2" }, "$18" },
3539      { { "s3" }, "$19" },
3540      { { "s4" }, "$20" },
3541      { { "s5" }, "$21" },
3542      { { "s6" }, "$22" },
3543      { { "s7" }, "$23" },
3544      { { "t8" }, "$24" },
3545      { { "t9" }, "$25" },
3546      { { "k0" }, "$26" },
3547      { { "k1" }, "$27" },
3548      { { "gp" }, "$28" },
3549      { { "sp" }, "$29" },
3550      { { "fp" }, "$30" },
3551      { { "ra" }, "$31" }
3552    };
3553    Aliases = GCCRegAliases;
3554    NumAliases = llvm::array_lengthof(GCCRegAliases);
3555  }
3556};
3557
3558class Mips32EBTargetInfo : public Mips32TargetInfoBase {
3559public:
3560  Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3561    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3562                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3563  }
3564  virtual void getTargetDefines(const LangOptions &Opts,
3565                                MacroBuilder &Builder) const {
3566    DefineStd(Builder, "mips", Opts);
3567    Builder.defineMacro("_mips");
3568    DefineStd(Builder, "MIPSEB", Opts);
3569    Builder.defineMacro("_MIPSEB");
3570    Builder.defineMacro("__REGISTER_PREFIX__", "");
3571    getArchDefines(Opts, Builder);
3572  }
3573};
3574
3575class Mips32ELTargetInfo : public Mips32TargetInfoBase {
3576public:
3577  Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3578    BigEndian = false;
3579    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3580                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3581  }
3582  virtual void getTargetDefines(const LangOptions &Opts,
3583                                MacroBuilder &Builder) const {
3584    DefineStd(Builder, "mips", Opts);
3585    Builder.defineMacro("_mips");
3586    DefineStd(Builder, "MIPSEL", Opts);
3587    Builder.defineMacro("_MIPSEL");
3588    Builder.defineMacro("__REGISTER_PREFIX__", "");
3589    getArchDefines(Opts, Builder);
3590  }
3591};
3592
3593class Mips64TargetInfoBase : public MipsTargetInfoBase {
3594  virtual void SetDescriptionString(const std::string &Name) = 0;
3595public:
3596  Mips64TargetInfoBase(const std::string& triple) :
3597    MipsTargetInfoBase(triple, "n64") {
3598    LongWidth = LongAlign = 64;
3599    PointerWidth = PointerAlign = 64;
3600    LongDoubleWidth = LongDoubleAlign = 128;
3601    LongDoubleFormat = &llvm::APFloat::IEEEquad;
3602    SuitableAlign = 128;
3603  }
3604  virtual bool setABI(const std::string &Name) {
3605    SetDescriptionString(Name);
3606
3607    if (Name != "n32" && Name != "n64")
3608      return false;
3609
3610    ABI = Name;
3611
3612    if (Name == "n32") {
3613      LongWidth = LongAlign = 32;
3614      PointerWidth = PointerAlign = 32;
3615    }
3616
3617    return true;
3618  }
3619  virtual void getArchDefines(const LangOptions &Opts,
3620                              MacroBuilder &Builder) const {
3621    if (ABI == "n32") {
3622      Builder.defineMacro("__mips_n32");
3623      Builder.defineMacro("_ABIN32", "2");
3624      Builder.defineMacro("_MIPS_SIM", "_ABIN32");
3625    }
3626    else if (ABI == "n64") {
3627      Builder.defineMacro("__mips_n64");
3628      Builder.defineMacro("_ABI64", "3");
3629      Builder.defineMacro("_MIPS_SIM", "_ABI64");
3630    }
3631    else
3632      llvm_unreachable("Invalid ABI for Mips64.");
3633  }
3634  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3635                                unsigned &NumAliases) const {
3636    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3637      { { "at" },  "$1" },
3638      { { "v0" },  "$2" },
3639      { { "v1" },  "$3" },
3640      { { "a0" },  "$4" },
3641      { { "a1" },  "$5" },
3642      { { "a2" },  "$6" },
3643      { { "a3" },  "$7" },
3644      { { "a4" },  "$8" },
3645      { { "a5" },  "$9" },
3646      { { "a6" }, "$10" },
3647      { { "a7" }, "$11" },
3648      { { "t0" }, "$12" },
3649      { { "t1" }, "$13" },
3650      { { "t2" }, "$14" },
3651      { { "t3" }, "$15" },
3652      { { "s0" }, "$16" },
3653      { { "s1" }, "$17" },
3654      { { "s2" }, "$18" },
3655      { { "s3" }, "$19" },
3656      { { "s4" }, "$20" },
3657      { { "s5" }, "$21" },
3658      { { "s6" }, "$22" },
3659      { { "s7" }, "$23" },
3660      { { "t8" }, "$24" },
3661      { { "t9" }, "$25" },
3662      { { "k0" }, "$26" },
3663      { { "k1" }, "$27" },
3664      { { "gp" }, "$28" },
3665      { { "sp" }, "$29" },
3666      { { "fp" }, "$30" },
3667      { { "ra" }, "$31" }
3668    };
3669    Aliases = GCCRegAliases;
3670    NumAliases = llvm::array_lengthof(GCCRegAliases);
3671  }
3672};
3673
3674class Mips64EBTargetInfo : public Mips64TargetInfoBase {
3675  virtual void SetDescriptionString(const std::string &Name) {
3676    // Change DescriptionString only if ABI is n32.
3677    if (Name == "n32")
3678      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3679                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3680                          "v64:64:64-n32";
3681  }
3682public:
3683  Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3684    // Default ABI is n64.
3685    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3686                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3687                        "v64:64:64-n32";
3688  }
3689  virtual void getTargetDefines(const LangOptions &Opts,
3690                                MacroBuilder &Builder) const {
3691    DefineStd(Builder, "mips", Opts);
3692    Builder.defineMacro("_mips");
3693    DefineStd(Builder, "MIPSEB", Opts);
3694    Builder.defineMacro("_MIPSEB");
3695    Builder.defineMacro("__REGISTER_PREFIX__", "");
3696    getArchDefines(Opts, Builder);
3697  }
3698};
3699
3700class Mips64ELTargetInfo : public Mips64TargetInfoBase {
3701  virtual void SetDescriptionString(const std::string &Name) {
3702    // Change DescriptionString only if ABI is n32.
3703    if (Name == "n32")
3704      DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3705                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
3706                          "-v64:64:64-n32";
3707  }
3708public:
3709  Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3710    // Default ABI is n64.
3711    BigEndian = false;
3712    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3713                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3714                        "v64:64:64-n32";
3715  }
3716  virtual void getTargetDefines(const LangOptions &Opts,
3717                                MacroBuilder &Builder) const {
3718    DefineStd(Builder, "mips", Opts);
3719    Builder.defineMacro("_mips");
3720    DefineStd(Builder, "MIPSEL", Opts);
3721    Builder.defineMacro("_MIPSEL");
3722    Builder.defineMacro("__REGISTER_PREFIX__", "");
3723    getArchDefines(Opts, Builder);
3724  }
3725};
3726} // end anonymous namespace.
3727
3728namespace {
3729class PNaClTargetInfo : public TargetInfo {
3730public:
3731  PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
3732    BigEndian = false;
3733    this->UserLabelPrefix = "";
3734    this->LongAlign = 32;
3735    this->LongWidth = 32;
3736    this->PointerAlign = 32;
3737    this->PointerWidth = 32;
3738    this->IntMaxType = TargetInfo::SignedLongLong;
3739    this->UIntMaxType = TargetInfo::UnsignedLongLong;
3740    this->Int64Type = TargetInfo::SignedLongLong;
3741    this->DoubleAlign = 64;
3742    this->LongDoubleWidth = 64;
3743    this->LongDoubleAlign = 64;
3744    this->SizeType = TargetInfo::UnsignedInt;
3745    this->PtrDiffType = TargetInfo::SignedInt;
3746    this->IntPtrType = TargetInfo::SignedInt;
3747    this->RegParmMax = 2;
3748    DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
3749                        "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
3750  }
3751
3752  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3753  }
3754  virtual void getArchDefines(const LangOptions &Opts,
3755                              MacroBuilder &Builder) const {
3756    Builder.defineMacro("__le32__");
3757    Builder.defineMacro("__pnacl__");
3758  }
3759  virtual void getTargetDefines(const LangOptions &Opts,
3760                                MacroBuilder &Builder) const {
3761    DefineStd(Builder, "unix", Opts);
3762    Builder.defineMacro("__ELF__");
3763    if (Opts.POSIXThreads)
3764      Builder.defineMacro("_REENTRANT");
3765    if (Opts.CPlusPlus)
3766      Builder.defineMacro("_GNU_SOURCE");
3767
3768    Builder.defineMacro("__native_client__");
3769    getArchDefines(Opts, Builder);
3770  }
3771  virtual bool hasFeature(StringRef Feature) const {
3772    return Feature == "pnacl";
3773  }
3774  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3775                                 unsigned &NumRecords) const {
3776  }
3777  virtual const char *getVAListDeclaration() const {
3778    return "typedef int __builtin_va_list[4];";
3779  }
3780  virtual void getGCCRegNames(const char * const *&Names,
3781                              unsigned &NumNames) const;
3782  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3783                                unsigned &NumAliases) const;
3784  virtual bool validateAsmConstraint(const char *&Name,
3785                                     TargetInfo::ConstraintInfo &Info) const {
3786    return false;
3787  }
3788
3789  virtual const char *getClobbers() const {
3790    return "";
3791  }
3792};
3793
3794void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
3795                                     unsigned &NumNames) const {
3796  Names = NULL;
3797  NumNames = 0;
3798}
3799
3800void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3801                                       unsigned &NumAliases) const {
3802  Aliases = NULL;
3803  NumAliases = 0;
3804}
3805} // end anonymous namespace.
3806
3807
3808//===----------------------------------------------------------------------===//
3809// Driver code
3810//===----------------------------------------------------------------------===//
3811
3812static TargetInfo *AllocateTarget(const std::string &T) {
3813  llvm::Triple Triple(T);
3814  llvm::Triple::OSType os = Triple.getOS();
3815
3816  switch (Triple.getArch()) {
3817  default:
3818    return NULL;
3819
3820  case llvm::Triple::hexagon:
3821    return new HexagonTargetInfo(T);
3822
3823  case llvm::Triple::arm:
3824  case llvm::Triple::thumb:
3825    if (Triple.isOSDarwin())
3826      return new DarwinARMTargetInfo(T);
3827
3828    switch (os) {
3829    case llvm::Triple::Linux:
3830      return new LinuxTargetInfo<ARMTargetInfo>(T);
3831    case llvm::Triple::FreeBSD:
3832      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
3833    case llvm::Triple::NetBSD:
3834      return new NetBSDTargetInfo<ARMTargetInfo>(T);
3835    case llvm::Triple::RTEMS:
3836      return new RTEMSTargetInfo<ARMTargetInfo>(T);
3837    default:
3838      return new ARMTargetInfo(T);
3839    }
3840
3841  case llvm::Triple::msp430:
3842    return new MSP430TargetInfo(T);
3843
3844  case llvm::Triple::mips:
3845    switch (os) {
3846    case llvm::Triple::Linux:
3847      return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
3848    case llvm::Triple::RTEMS:
3849      return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
3850    case llvm::Triple::FreeBSD:
3851      return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
3852    case llvm::Triple::NetBSD:
3853      return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
3854    default:
3855      return new Mips32EBTargetInfo(T);
3856    }
3857
3858  case llvm::Triple::mipsel:
3859    switch (os) {
3860    case llvm::Triple::Linux:
3861      return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
3862    case llvm::Triple::RTEMS:
3863      return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
3864    case llvm::Triple::FreeBSD:
3865      return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
3866    case llvm::Triple::NetBSD:
3867      return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
3868    default:
3869      return new Mips32ELTargetInfo(T);
3870    }
3871
3872  case llvm::Triple::mips64:
3873    switch (os) {
3874    case llvm::Triple::Linux:
3875      return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
3876    case llvm::Triple::RTEMS:
3877      return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
3878    case llvm::Triple::FreeBSD:
3879      return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
3880    case llvm::Triple::NetBSD:
3881      return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
3882    default:
3883      return new Mips64EBTargetInfo(T);
3884    }
3885
3886  case llvm::Triple::mips64el:
3887    switch (os) {
3888    case llvm::Triple::Linux:
3889      return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
3890    case llvm::Triple::RTEMS:
3891      return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
3892    case llvm::Triple::FreeBSD:
3893      return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
3894    case llvm::Triple::NetBSD:
3895      return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
3896    default:
3897      return new Mips64ELTargetInfo(T);
3898    }
3899
3900  case llvm::Triple::le32:
3901    switch (os) {
3902      case llvm::Triple::NativeClient:
3903        return new PNaClTargetInfo(T);
3904      default:
3905        return NULL;
3906    }
3907
3908  case llvm::Triple::ppc:
3909    if (Triple.isOSDarwin())
3910      return new DarwinPPC32TargetInfo(T);
3911    switch (os) {
3912    case llvm::Triple::Linux:
3913      return new LinuxTargetInfo<PPC32TargetInfo>(T);
3914    case llvm::Triple::FreeBSD:
3915      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
3916    case llvm::Triple::NetBSD:
3917      return new NetBSDTargetInfo<PPC32TargetInfo>(T);
3918    case llvm::Triple::RTEMS:
3919      return new RTEMSTargetInfo<PPC32TargetInfo>(T);
3920    default:
3921      return new PPC32TargetInfo(T);
3922    }
3923
3924  case llvm::Triple::ppc64:
3925    if (Triple.isOSDarwin())
3926      return new DarwinPPC64TargetInfo(T);
3927    switch (os) {
3928    case llvm::Triple::Linux:
3929      return new LinuxTargetInfo<PPC64TargetInfo>(T);
3930    case llvm::Triple::Lv2:
3931      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
3932    case llvm::Triple::FreeBSD:
3933      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
3934    case llvm::Triple::NetBSD:
3935      return new NetBSDTargetInfo<PPC64TargetInfo>(T);
3936    default:
3937      return new PPC64TargetInfo(T);
3938    }
3939
3940  case llvm::Triple::ptx32:
3941    return new PTX32TargetInfo(T);
3942  case llvm::Triple::ptx64:
3943    return new PTX64TargetInfo(T);
3944
3945  case llvm::Triple::mblaze:
3946    return new MBlazeTargetInfo(T);
3947
3948  case llvm::Triple::sparc:
3949    switch (os) {
3950    case llvm::Triple::Linux:
3951      return new LinuxTargetInfo<SparcV8TargetInfo>(T);
3952    case llvm::Triple::AuroraUX:
3953      return new AuroraUXSparcV8TargetInfo(T);
3954    case llvm::Triple::Solaris:
3955      return new SolarisSparcV8TargetInfo(T);
3956    case llvm::Triple::NetBSD:
3957      return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
3958    case llvm::Triple::RTEMS:
3959      return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
3960    default:
3961      return new SparcV8TargetInfo(T);
3962    }
3963
3964  // FIXME: Need a real SPU target.
3965  case llvm::Triple::cellspu:
3966    return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
3967
3968  case llvm::Triple::tce:
3969    return new TCETargetInfo(T);
3970
3971  case llvm::Triple::x86:
3972    if (Triple.isOSDarwin())
3973      return new DarwinI386TargetInfo(T);
3974
3975    switch (os) {
3976    case llvm::Triple::AuroraUX:
3977      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
3978    case llvm::Triple::Linux:
3979      return new LinuxTargetInfo<X86_32TargetInfo>(T);
3980    case llvm::Triple::DragonFly:
3981      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
3982    case llvm::Triple::NetBSD:
3983      return new NetBSDI386TargetInfo(T);
3984    case llvm::Triple::OpenBSD:
3985      return new OpenBSDI386TargetInfo(T);
3986    case llvm::Triple::FreeBSD:
3987      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
3988    case llvm::Triple::Minix:
3989      return new MinixTargetInfo<X86_32TargetInfo>(T);
3990    case llvm::Triple::Solaris:
3991      return new SolarisTargetInfo<X86_32TargetInfo>(T);
3992    case llvm::Triple::Cygwin:
3993      return new CygwinX86_32TargetInfo(T);
3994    case llvm::Triple::MinGW32:
3995      return new MinGWX86_32TargetInfo(T);
3996    case llvm::Triple::Win32:
3997      return new VisualStudioWindowsX86_32TargetInfo(T);
3998    case llvm::Triple::Haiku:
3999      return new HaikuX86_32TargetInfo(T);
4000    case llvm::Triple::RTEMS:
4001      return new RTEMSX86_32TargetInfo(T);
4002    default:
4003      return new X86_32TargetInfo(T);
4004    }
4005
4006  case llvm::Triple::x86_64:
4007    if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
4008      return new DarwinX86_64TargetInfo(T);
4009
4010    switch (os) {
4011    case llvm::Triple::AuroraUX:
4012      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
4013    case llvm::Triple::Linux:
4014      return new LinuxTargetInfo<X86_64TargetInfo>(T);
4015    case llvm::Triple::DragonFly:
4016      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
4017    case llvm::Triple::NetBSD:
4018      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
4019    case llvm::Triple::OpenBSD:
4020      return new OpenBSDX86_64TargetInfo(T);
4021    case llvm::Triple::FreeBSD:
4022      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
4023    case llvm::Triple::Solaris:
4024      return new SolarisTargetInfo<X86_64TargetInfo>(T);
4025    case llvm::Triple::MinGW32:
4026      return new MinGWX86_64TargetInfo(T);
4027    case llvm::Triple::Win32:   // This is what Triple.h supports now.
4028      return new VisualStudioWindowsX86_64TargetInfo(T);
4029    default:
4030      return new X86_64TargetInfo(T);
4031    }
4032  }
4033}
4034
4035/// CreateTargetInfo - Return the target info object for the specified target
4036/// triple.
4037TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
4038                                         TargetOptions &Opts) {
4039  llvm::Triple Triple(Opts.Triple);
4040
4041  // Construct the target
4042  llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
4043  if (!Target) {
4044    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
4045    return 0;
4046  }
4047
4048  // Set the target CPU if specified.
4049  if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
4050    Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
4051    return 0;
4052  }
4053
4054  // Set the target ABI if specified.
4055  if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
4056    Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
4057    return 0;
4058  }
4059
4060  // Set the target C++ ABI.
4061  if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
4062    Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
4063    return 0;
4064  }
4065
4066  // Compute the default target features, we need the target to handle this
4067  // because features may have dependencies on one another.
4068  llvm::StringMap<bool> Features;
4069  Target->getDefaultFeatures(Features);
4070
4071  // Apply the user specified deltas.
4072  // First the enables.
4073  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4074         ie = Opts.Features.end(); it != ie; ++it) {
4075    const char *Name = it->c_str();
4076
4077    if (Name[0] != '+')
4078      continue;
4079
4080    // Apply the feature via the target.
4081    if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
4082      Diags.Report(diag::err_target_invalid_feature) << Name;
4083      return 0;
4084    }
4085  }
4086
4087  // Then the disables.
4088  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4089         ie = Opts.Features.end(); it != ie; ++it) {
4090    const char *Name = it->c_str();
4091
4092    if (Name[0] == '+')
4093      continue;
4094
4095    // Apply the feature via the target.
4096    if (Name[0] != '-' ||
4097        !Target->setFeatureEnabled(Features, Name + 1, false)) {
4098      Diags.Report(diag::err_target_invalid_feature) << Name;
4099      return 0;
4100    }
4101  }
4102
4103  // Add the features to the compile options.
4104  //
4105  // FIXME: If we are completely confident that we have the right set, we only
4106  // need to pass the minuses.
4107  Opts.Features.clear();
4108  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
4109         ie = Features.end(); it != ie; ++it)
4110    Opts.Features.push_back(std::string(it->second ? "+" : "-") +
4111                            it->first().str());
4112  Target->HandleTargetFeatures(Opts.Features);
4113
4114  return Target.take();
4115}
4116