Targets.cpp revision f634bdfbf42758f7d49b468df09efa3686f7b699 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include "llvm/Support/ErrorHandling.h"
30#include "llvm/Type.h"
31#include <algorithm>
32using namespace clang;
33
34//===----------------------------------------------------------------------===//
35//  Common code shared among targets.
36//===----------------------------------------------------------------------===//
37
38/// DefineStd - Define a macro name and standard variants.  For example if
39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
40/// when in GNU mode.
41static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42                      const LangOptions &Opts) {
43  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44
45  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46  // in the user's namespace.
47  if (Opts.GNUMode)
48    Builder.defineMacro(MacroName);
49
50  // Define __unix.
51  Builder.defineMacro("__" + MacroName);
52
53  // Define __unix__.
54  Builder.defineMacro("__" + MacroName + "__");
55}
56
57static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName,
58                            bool Tuning = true) {
59  Builder.defineMacro("__" + CPUName);
60  Builder.defineMacro("__" + CPUName + "__");
61  if (Tuning)
62    Builder.defineMacro("__tune_" + CPUName + "__");
63}
64
65//===----------------------------------------------------------------------===//
66// Defines specific to certain operating systems.
67//===----------------------------------------------------------------------===//
68
69namespace {
70template<typename TgtInfo>
71class OSTargetInfo : public TgtInfo {
72protected:
73  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
74                            MacroBuilder &Builder) const=0;
75public:
76  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
77  virtual void getTargetDefines(const LangOptions &Opts,
78                                MacroBuilder &Builder) const {
79    TgtInfo::getTargetDefines(Opts, Builder);
80    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
81  }
82
83};
84} // end anonymous namespace
85
86
87static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
88                             const llvm::Triple &Triple,
89                             StringRef &PlatformName,
90                             VersionTuple &PlatformMinVersion) {
91  Builder.defineMacro("__APPLE_CC__", "5621");
92  Builder.defineMacro("__APPLE__");
93  Builder.defineMacro("__MACH__");
94  Builder.defineMacro("OBJC_NEW_PROPERTIES");
95  // AddressSanitizer doesn't play well with source fortification, which is on
96  // by default on Darwin.
97  if (Opts.SanitizeAddress) Builder.defineMacro("_FORTIFY_SOURCE", "0");
98
99  if (!Opts.ObjCAutoRefCount) {
100    // __weak is always defined, for use in blocks and with objc pointers.
101    Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
102
103    // Darwin defines __strong even in C mode (just to nothing).
104    if (Opts.getGC() != LangOptions::NonGC)
105      Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
106    else
107      Builder.defineMacro("__strong", "");
108
109    // __unsafe_unretained is defined to nothing in non-ARC mode. We even
110    // allow this in C, since one might have block pointers in structs that
111    // are used in pure C code and in Objective-C ARC.
112    Builder.defineMacro("__unsafe_unretained", "");
113  }
114
115  if (Opts.Static)
116    Builder.defineMacro("__STATIC__");
117  else
118    Builder.defineMacro("__DYNAMIC__");
119
120  if (Opts.POSIXThreads)
121    Builder.defineMacro("_REENTRANT");
122
123  // Get the platform type and version number from the triple.
124  unsigned Maj, Min, Rev;
125  if (Triple.isMacOSX()) {
126    Triple.getMacOSXVersion(Maj, Min, Rev);
127    PlatformName = "macosx";
128  } else {
129    Triple.getOSVersion(Maj, Min, Rev);
130    PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
131  }
132
133  // If -target arch-pc-win32-macho option specified, we're
134  // generating code for Win32 ABI. No need to emit
135  // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
136  if (PlatformName == "win32") {
137    PlatformMinVersion = VersionTuple(Maj, Min, Rev);
138    return;
139  }
140
141  // Set the appropriate OS version define.
142  if (Triple.getOS() == llvm::Triple::IOS) {
143    assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
144    char Str[6];
145    Str[0] = '0' + Maj;
146    Str[1] = '0' + (Min / 10);
147    Str[2] = '0' + (Min % 10);
148    Str[3] = '0' + (Rev / 10);
149    Str[4] = '0' + (Rev % 10);
150    Str[5] = '\0';
151    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
152  } else {
153    // Note that the Driver allows versions which aren't representable in the
154    // define (because we only get a single digit for the minor and micro
155    // revision numbers). So, we limit them to the maximum representable
156    // version.
157    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
158    assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
159    char Str[5];
160    Str[0] = '0' + (Maj / 10);
161    Str[1] = '0' + (Maj % 10);
162    Str[2] = '0' + std::min(Min, 9U);
163    Str[3] = '0' + std::min(Rev, 9U);
164    Str[4] = '\0';
165    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
166  }
167
168  PlatformMinVersion = VersionTuple(Maj, Min, Rev);
169}
170
171namespace {
172template<typename Target>
173class DarwinTargetInfo : public OSTargetInfo<Target> {
174protected:
175  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
176                            MacroBuilder &Builder) const {
177    getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
178                     this->PlatformMinVersion);
179  }
180
181public:
182  DarwinTargetInfo(const std::string& triple) :
183    OSTargetInfo<Target>(triple) {
184      llvm::Triple T = llvm::Triple(triple);
185      this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
186      this->MCountName = "\01mcount";
187    }
188
189  virtual std::string isValidSectionSpecifier(StringRef SR) const {
190    // Let MCSectionMachO validate this.
191    StringRef Segment, Section;
192    unsigned TAA, StubSize;
193    bool HasTAA;
194    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
195                                                       TAA, HasTAA, StubSize);
196  }
197
198  virtual const char *getStaticInitSectionSpecifier() const {
199    // FIXME: We should return 0 when building kexts.
200    return "__TEXT,__StaticInit,regular,pure_instructions";
201  }
202
203  /// Darwin does not support protected visibility.  Darwin's "default"
204  /// is very similar to ELF's "protected";  Darwin requires a "weak"
205  /// attribute on declarations that can be dynamically replaced.
206  virtual bool hasProtectedVisibility() const {
207    return false;
208  }
209};
210
211
212// DragonFlyBSD Target
213template<typename Target>
214class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
215protected:
216  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
217                            MacroBuilder &Builder) const {
218    // DragonFly defines; list based off of gcc output
219    Builder.defineMacro("__DragonFly__");
220    Builder.defineMacro("__DragonFly_cc_version", "100001");
221    Builder.defineMacro("__ELF__");
222    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
223    Builder.defineMacro("__tune_i386__");
224    DefineStd(Builder, "unix", Opts);
225  }
226public:
227  DragonFlyBSDTargetInfo(const std::string &triple)
228    : OSTargetInfo<Target>(triple) {
229      this->UserLabelPrefix = "";
230
231      llvm::Triple Triple(triple);
232      switch (Triple.getArch()) {
233        default:
234        case llvm::Triple::x86:
235        case llvm::Triple::x86_64:
236          this->MCountName = ".mcount";
237          break;
238      }
239  }
240};
241
242// FreeBSD Target
243template<typename Target>
244class FreeBSDTargetInfo : public OSTargetInfo<Target> {
245protected:
246  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
247                            MacroBuilder &Builder) const {
248    // FreeBSD defines; list based off of gcc output
249
250    unsigned Release = Triple.getOSMajorVersion();
251    if (Release == 0U)
252      Release = 8;
253
254    Builder.defineMacro("__FreeBSD__", Twine(Release));
255    Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
256    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
257    DefineStd(Builder, "unix", Opts);
258    Builder.defineMacro("__ELF__");
259  }
260public:
261  FreeBSDTargetInfo(const std::string &triple)
262    : OSTargetInfo<Target>(triple) {
263      this->UserLabelPrefix = "";
264
265      llvm::Triple Triple(triple);
266      switch (Triple.getArch()) {
267        default:
268        case llvm::Triple::x86:
269        case llvm::Triple::x86_64:
270          this->MCountName = ".mcount";
271          break;
272        case llvm::Triple::mips:
273        case llvm::Triple::mipsel:
274        case llvm::Triple::ppc:
275        case llvm::Triple::ppc64:
276          this->MCountName = "_mcount";
277          break;
278        case llvm::Triple::arm:
279          this->MCountName = "__mcount";
280          break;
281      }
282
283    }
284};
285
286// Minix Target
287template<typename Target>
288class MinixTargetInfo : public OSTargetInfo<Target> {
289protected:
290  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
291                            MacroBuilder &Builder) const {
292    // Minix defines
293
294    Builder.defineMacro("__minix", "3");
295    Builder.defineMacro("_EM_WSIZE", "4");
296    Builder.defineMacro("_EM_PSIZE", "4");
297    Builder.defineMacro("_EM_SSIZE", "2");
298    Builder.defineMacro("_EM_LSIZE", "4");
299    Builder.defineMacro("_EM_FSIZE", "4");
300    Builder.defineMacro("_EM_DSIZE", "8");
301    Builder.defineMacro("__ELF__");
302    DefineStd(Builder, "unix", Opts);
303  }
304public:
305  MinixTargetInfo(const std::string &triple)
306    : OSTargetInfo<Target>(triple) {
307      this->UserLabelPrefix = "";
308    }
309};
310
311// Linux target
312template<typename Target>
313class LinuxTargetInfo : public OSTargetInfo<Target> {
314protected:
315  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
316                            MacroBuilder &Builder) const {
317    // Linux defines; list based off of gcc output
318    DefineStd(Builder, "unix", Opts);
319    DefineStd(Builder, "linux", Opts);
320    Builder.defineMacro("__gnu_linux__");
321    Builder.defineMacro("__ELF__");
322    if (Triple.getEnvironment() == llvm::Triple::Android)
323      Builder.defineMacro("__ANDROID__", "1");
324    if (Opts.POSIXThreads)
325      Builder.defineMacro("_REENTRANT");
326    if (Opts.CPlusPlus)
327      Builder.defineMacro("_GNU_SOURCE");
328  }
329public:
330  LinuxTargetInfo(const std::string& triple)
331    : OSTargetInfo<Target>(triple) {
332    this->UserLabelPrefix = "";
333    this->WIntType = TargetInfo::UnsignedInt;
334  }
335
336  virtual const char *getStaticInitSectionSpecifier() const {
337    return ".text.startup";
338  }
339};
340
341// NetBSD Target
342template<typename Target>
343class NetBSDTargetInfo : public OSTargetInfo<Target> {
344protected:
345  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
346                            MacroBuilder &Builder) const {
347    // NetBSD defines; list based off of gcc output
348    Builder.defineMacro("__NetBSD__");
349    Builder.defineMacro("__unix__");
350    Builder.defineMacro("__ELF__");
351    if (Opts.POSIXThreads)
352      Builder.defineMacro("_POSIX_THREADS");
353  }
354public:
355  NetBSDTargetInfo(const std::string &triple)
356    : OSTargetInfo<Target>(triple) {
357      this->UserLabelPrefix = "";
358    }
359};
360
361// OpenBSD Target
362template<typename Target>
363class OpenBSDTargetInfo : public OSTargetInfo<Target> {
364protected:
365  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
366                            MacroBuilder &Builder) const {
367    // OpenBSD defines; list based off of gcc output
368
369    Builder.defineMacro("__OpenBSD__");
370    DefineStd(Builder, "unix", Opts);
371    Builder.defineMacro("__ELF__");
372    if (Opts.POSIXThreads)
373      Builder.defineMacro("_REENTRANT");
374  }
375public:
376  OpenBSDTargetInfo(const std::string &triple)
377    : OSTargetInfo<Target>(triple) {
378      this->UserLabelPrefix = "";
379      this->TLSSupported = false;
380
381      llvm::Triple Triple(triple);
382      switch (Triple.getArch()) {
383        default:
384        case llvm::Triple::x86:
385        case llvm::Triple::x86_64:
386        case llvm::Triple::arm:
387	case llvm::Triple::sparc:
388          this->MCountName = "__mcount";
389          break;
390        case llvm::Triple::mips64:
391        case llvm::Triple::mips64el:
392        case llvm::Triple::ppc:
393	case llvm::Triple::sparcv9:
394          this->MCountName = "_mcount";
395          break;
396      }
397  }
398};
399
400// Bitrig Target
401template<typename Target>
402class BitrigTargetInfo : public OSTargetInfo<Target> {
403protected:
404  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
405                            MacroBuilder &Builder) const {
406    // Bitrig defines; list based off of gcc output
407
408    Builder.defineMacro("__Bitrig__");
409    DefineStd(Builder, "unix", Opts);
410    Builder.defineMacro("__ELF__");
411    if (Opts.POSIXThreads)
412      Builder.defineMacro("_REENTRANT");
413  }
414public:
415  BitrigTargetInfo(const std::string &triple)
416    : OSTargetInfo<Target>(triple) {
417      this->UserLabelPrefix = "";
418      this->TLSSupported = false;
419      this->MCountName = "__mcount";
420  }
421};
422
423// PSP Target
424template<typename Target>
425class PSPTargetInfo : public OSTargetInfo<Target> {
426protected:
427  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
428                            MacroBuilder &Builder) const {
429    // PSP defines; list based on the output of the pspdev gcc toolchain.
430    Builder.defineMacro("PSP");
431    Builder.defineMacro("_PSP");
432    Builder.defineMacro("__psp__");
433    Builder.defineMacro("__ELF__");
434  }
435public:
436  PSPTargetInfo(const std::string& triple)
437    : OSTargetInfo<Target>(triple) {
438    this->UserLabelPrefix = "";
439  }
440};
441
442// PS3 PPU Target
443template<typename Target>
444class PS3PPUTargetInfo : public OSTargetInfo<Target> {
445protected:
446  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
447                            MacroBuilder &Builder) const {
448    // PS3 PPU defines.
449    Builder.defineMacro("__PPC__");
450    Builder.defineMacro("__PPU__");
451    Builder.defineMacro("__CELLOS_LV2__");
452    Builder.defineMacro("__ELF__");
453    Builder.defineMacro("__LP32__");
454    Builder.defineMacro("_ARCH_PPC64");
455    Builder.defineMacro("__powerpc64__");
456  }
457public:
458  PS3PPUTargetInfo(const std::string& triple)
459    : OSTargetInfo<Target>(triple) {
460    this->UserLabelPrefix = "";
461    this->LongWidth = this->LongAlign = 32;
462    this->PointerWidth = this->PointerAlign = 32;
463    this->IntMaxType = TargetInfo::SignedLongLong;
464    this->UIntMaxType = TargetInfo::UnsignedLongLong;
465    this->Int64Type = TargetInfo::SignedLongLong;
466    this->SizeType = TargetInfo::UnsignedInt;
467    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
468                              "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
469  }
470};
471
472// FIXME: Need a real SPU target.
473// PS3 SPU Target
474template<typename Target>
475class PS3SPUTargetInfo : public OSTargetInfo<Target> {
476protected:
477  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
478                            MacroBuilder &Builder) const {
479    // PS3 PPU defines.
480    Builder.defineMacro("__SPU__");
481    Builder.defineMacro("__ELF__");
482  }
483public:
484  PS3SPUTargetInfo(const std::string& triple)
485    : OSTargetInfo<Target>(triple) {
486    this->UserLabelPrefix = "";
487  }
488};
489
490// AuroraUX target
491template<typename Target>
492class AuroraUXTargetInfo : public OSTargetInfo<Target> {
493protected:
494  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
495                            MacroBuilder &Builder) const {
496    DefineStd(Builder, "sun", Opts);
497    DefineStd(Builder, "unix", Opts);
498    Builder.defineMacro("__ELF__");
499    Builder.defineMacro("__svr4__");
500    Builder.defineMacro("__SVR4");
501  }
502public:
503  AuroraUXTargetInfo(const std::string& triple)
504    : OSTargetInfo<Target>(triple) {
505    this->UserLabelPrefix = "";
506    this->WCharType = this->SignedLong;
507    // FIXME: WIntType should be SignedLong
508  }
509};
510
511// Solaris target
512template<typename Target>
513class SolarisTargetInfo : public OSTargetInfo<Target> {
514protected:
515  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
516                            MacroBuilder &Builder) const {
517    DefineStd(Builder, "sun", Opts);
518    DefineStd(Builder, "unix", Opts);
519    Builder.defineMacro("__ELF__");
520    Builder.defineMacro("__svr4__");
521    Builder.defineMacro("__SVR4");
522    // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and
523    // newer, but to 500 for everything else.  feature_test.h has a check to
524    // ensure that you are not using C99 with an old version of X/Open or C89
525    // with a new version.
526    if (Opts.C99 || Opts.C11)
527      Builder.defineMacro("_XOPEN_SOURCE", "600");
528    else
529      Builder.defineMacro("_XOPEN_SOURCE", "500");
530    if (Opts.CPlusPlus)
531      Builder.defineMacro("__C99FEATURES__");
532    Builder.defineMacro("_LARGEFILE_SOURCE");
533    Builder.defineMacro("_LARGEFILE64_SOURCE");
534    Builder.defineMacro("__EXTENSIONS__");
535    Builder.defineMacro("_REENTRANT");
536  }
537public:
538  SolarisTargetInfo(const std::string& triple)
539    : OSTargetInfo<Target>(triple) {
540    this->UserLabelPrefix = "";
541    this->WCharType = this->SignedInt;
542    // FIXME: WIntType should be SignedLong
543  }
544};
545
546// Windows target
547template<typename Target>
548class WindowsTargetInfo : public OSTargetInfo<Target> {
549protected:
550  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
551                            MacroBuilder &Builder) const {
552    Builder.defineMacro("_WIN32");
553  }
554  void getVisualStudioDefines(const LangOptions &Opts,
555                              MacroBuilder &Builder) const {
556    if (Opts.CPlusPlus) {
557      if (Opts.RTTI)
558        Builder.defineMacro("_CPPRTTI");
559
560      if (Opts.Exceptions)
561        Builder.defineMacro("_CPPUNWIND");
562    }
563
564    if (!Opts.CharIsSigned)
565      Builder.defineMacro("_CHAR_UNSIGNED");
566
567    // FIXME: POSIXThreads isn't exactly the option this should be defined for,
568    //        but it works for now.
569    if (Opts.POSIXThreads)
570      Builder.defineMacro("_MT");
571
572    if (Opts.MSCVersion != 0)
573      Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
574
575    if (Opts.MicrosoftExt) {
576      Builder.defineMacro("_MSC_EXTENSIONS");
577
578      if (Opts.CPlusPlus0x) {
579        Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
580        Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
581        Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
582      }
583    }
584
585    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
586  }
587
588public:
589  WindowsTargetInfo(const std::string &triple)
590    : OSTargetInfo<Target>(triple) {}
591};
592
593template <typename Target>
594class NaClTargetInfo : public OSTargetInfo<Target> {
595 protected:
596  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
597                            MacroBuilder &Builder) const {
598    if (Opts.POSIXThreads)
599      Builder.defineMacro("_REENTRANT");
600    if (Opts.CPlusPlus)
601      Builder.defineMacro("_GNU_SOURCE");
602
603    DefineStd(Builder, "unix", Opts);
604    Builder.defineMacro("__ELF__");
605    Builder.defineMacro("__native_client__");
606  }
607 public:
608  NaClTargetInfo(const std::string &triple)
609    : OSTargetInfo<Target>(triple) {
610    this->UserLabelPrefix = "";
611    this->LongAlign = 32;
612    this->LongWidth = 32;
613    this->PointerAlign = 32;
614    this->PointerWidth = 32;
615    this->IntMaxType = TargetInfo::SignedLongLong;
616    this->UIntMaxType = TargetInfo::UnsignedLongLong;
617    this->Int64Type = TargetInfo::SignedLongLong;
618    this->DoubleAlign = 64;
619    this->LongDoubleWidth = 64;
620    this->LongDoubleAlign = 64;
621    this->SizeType = TargetInfo::UnsignedInt;
622    this->PtrDiffType = TargetInfo::SignedInt;
623    this->IntPtrType = TargetInfo::SignedInt;
624    this->RegParmMax = 2;
625    this->LongDoubleFormat = &llvm::APFloat::IEEEdouble;
626    this->DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
627                              "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
628  }
629  virtual typename Target::CallingConvCheckResult checkCallingConvention(
630      CallingConv CC) const {
631    return CC == CC_PnaclCall ? Target::CCCR_OK :
632        Target::checkCallingConvention(CC);
633  }
634};
635} // end anonymous namespace.
636
637//===----------------------------------------------------------------------===//
638// Specific target implementations.
639//===----------------------------------------------------------------------===//
640
641namespace {
642// PPC abstract base class
643class PPCTargetInfo : public TargetInfo {
644  static const Builtin::Info BuiltinInfo[];
645  static const char * const GCCRegNames[];
646  static const TargetInfo::GCCRegAlias GCCRegAliases[];
647  std::string CPU;
648public:
649  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {
650    LongDoubleWidth = LongDoubleAlign = 128;
651    LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
652  }
653
654  /// \brief Flags for architecture specific defines.
655  typedef enum {
656    ArchDefineNone  = 0,
657    ArchDefineName  = 1 << 0, // <name> is substituted for arch name.
658    ArchDefinePpcgr = 1 << 1,
659    ArchDefinePpcsq = 1 << 2,
660    ArchDefine440   = 1 << 3,
661    ArchDefine603   = 1 << 4,
662    ArchDefine604   = 1 << 5,
663    ArchDefinePwr4  = 1 << 6,
664    ArchDefinePwr6  = 1 << 7
665  } ArchDefineTypes;
666
667  virtual bool setCPU(const std::string &Name) {
668    bool CPUKnown = llvm::StringSwitch<bool>(Name)
669      .Case("generic", true)
670      .Case("440", true)
671      .Case("450", true)
672      .Case("601", true)
673      .Case("602", true)
674      .Case("603", true)
675      .Case("603e", true)
676      .Case("603ev", true)
677      .Case("604", true)
678      .Case("604e", true)
679      .Case("620", true)
680      .Case("g3", true)
681      .Case("7400", true)
682      .Case("g4", true)
683      .Case("7450", true)
684      .Case("g4+", true)
685      .Case("750", true)
686      .Case("970", true)
687      .Case("g5", true)
688      .Case("a2", true)
689      .Case("e500mc", true)
690      .Case("e5500", true)
691      .Case("pwr6", true)
692      .Case("pwr7", true)
693      .Case("ppc", true)
694      .Case("ppc64", true)
695      .Default(false);
696
697    if (CPUKnown)
698      CPU = Name;
699
700    return CPUKnown;
701  }
702
703  virtual void getTargetBuiltins(const Builtin::Info *&Records,
704                                 unsigned &NumRecords) const {
705    Records = BuiltinInfo;
706    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
707  }
708
709  virtual bool isCLZForZeroUndef() const { return false; }
710
711  virtual void getTargetDefines(const LangOptions &Opts,
712                                MacroBuilder &Builder) const;
713
714  virtual bool hasFeature(StringRef Feature) const;
715
716  virtual void getGCCRegNames(const char * const *&Names,
717                              unsigned &NumNames) const;
718  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
719                                unsigned &NumAliases) const;
720  virtual bool validateAsmConstraint(const char *&Name,
721                                     TargetInfo::ConstraintInfo &Info) const {
722    switch (*Name) {
723    default: return false;
724    case 'O': // Zero
725      break;
726    case 'b': // Base register
727    case 'f': // Floating point register
728      Info.setAllowsRegister();
729      break;
730    // FIXME: The following are added to allow parsing.
731    // I just took a guess at what the actions should be.
732    // Also, is more specific checking needed?  I.e. specific registers?
733    case 'd': // Floating point register (containing 64-bit value)
734    case 'v': // Altivec vector register
735      Info.setAllowsRegister();
736      break;
737    case 'w':
738      switch (Name[1]) {
739        case 'd':// VSX vector register to hold vector double data
740        case 'f':// VSX vector register to hold vector float data
741        case 's':// VSX vector register to hold scalar float data
742        case 'a':// Any VSX register
743          break;
744        default:
745          return false;
746      }
747      Info.setAllowsRegister();
748      Name++; // Skip over 'w'.
749      break;
750    case 'h': // `MQ', `CTR', or `LINK' register
751    case 'q': // `MQ' register
752    case 'c': // `CTR' register
753    case 'l': // `LINK' register
754    case 'x': // `CR' register (condition register) number 0
755    case 'y': // `CR' register (condition register)
756    case 'z': // `XER[CA]' carry bit (part of the XER register)
757      Info.setAllowsRegister();
758      break;
759    case 'I': // Signed 16-bit constant
760    case 'J': // Unsigned 16-bit constant shifted left 16 bits
761              //  (use `L' instead for SImode constants)
762    case 'K': // Unsigned 16-bit constant
763    case 'L': // Signed 16-bit constant shifted left 16 bits
764    case 'M': // Constant larger than 31
765    case 'N': // Exact power of 2
766    case 'P': // Constant whose negation is a signed 16-bit constant
767    case 'G': // Floating point constant that can be loaded into a
768              // register with one instruction per word
769    case 'H': // Integer/Floating point constant that can be loaded
770              // into a register using three instructions
771      break;
772    case 'm': // Memory operand. Note that on PowerPC targets, m can
773              // include addresses that update the base register. It
774              // is therefore only safe to use `m' in an asm statement
775              // if that asm statement accesses the operand exactly once.
776              // The asm statement must also use `%U<opno>' as a
777              // placeholder for the "update" flag in the corresponding
778              // load or store instruction. For example:
779              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
780              // is correct but:
781              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
782              // is not. Use es rather than m if you don't want the base
783              // register to be updated.
784    case 'e':
785      if (Name[1] != 's')
786          return false;
787              // es: A "stable" memory operand; that is, one which does not
788              // include any automodification of the base register. Unlike
789              // `m', this constraint can be used in asm statements that
790              // might access the operand several times, or that might not
791              // access it at all.
792      Info.setAllowsMemory();
793      Name++; // Skip over 'e'.
794      break;
795    case 'Q': // Memory operand that is an offset from a register (it is
796              // usually better to use `m' or `es' in asm statements)
797    case 'Z': // Memory operand that is an indexed or indirect from a
798              // register (it is usually better to use `m' or `es' in
799              // asm statements)
800      Info.setAllowsMemory();
801      Info.setAllowsRegister();
802      break;
803    case 'R': // AIX TOC entry
804    case 'a': // Address operand that is an indexed or indirect from a
805              // register (`p' is preferable for asm statements)
806    case 'S': // Constant suitable as a 64-bit mask operand
807    case 'T': // Constant suitable as a 32-bit mask operand
808    case 'U': // System V Release 4 small data area reference
809    case 't': // AND masks that can be performed by two rldic{l, r}
810              // instructions
811    case 'W': // Vector constant that does not require memory
812    case 'j': // Vector constant that is all zeros.
813      break;
814    // End FIXME.
815    }
816    return true;
817  }
818  virtual const char *getClobbers() const {
819    return "";
820  }
821};
822
823const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
824#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
825#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
826                                              ALL_LANGUAGES },
827#include "clang/Basic/BuiltinsPPC.def"
828};
829
830
831/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
832/// #defines that are not tied to a specific subtarget.
833void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
834                                     MacroBuilder &Builder) const {
835  // Target identification.
836  Builder.defineMacro("__ppc__");
837  Builder.defineMacro("_ARCH_PPC");
838  Builder.defineMacro("__powerpc__");
839  Builder.defineMacro("__POWERPC__");
840  if (PointerWidth == 64) {
841    Builder.defineMacro("_ARCH_PPC64");
842    Builder.defineMacro("__powerpc64__");
843    Builder.defineMacro("__ppc64__");
844  } else {
845    Builder.defineMacro("__ppc__");
846  }
847
848  // Target properties.
849  if (getTriple().getOS() != llvm::Triple::NetBSD &&
850      getTriple().getOS() != llvm::Triple::OpenBSD)
851    Builder.defineMacro("_BIG_ENDIAN");
852  Builder.defineMacro("__BIG_ENDIAN__");
853
854  // Subtarget options.
855  Builder.defineMacro("__NATURAL_ALIGNMENT__");
856  Builder.defineMacro("__REGISTER_PREFIX__", "");
857
858  // FIXME: Should be controlled by command line option.
859  Builder.defineMacro("__LONG_DOUBLE_128__");
860
861  if (Opts.AltiVec) {
862    Builder.defineMacro("__VEC__", "10206");
863    Builder.defineMacro("__ALTIVEC__");
864  }
865
866  // CPU identification.
867  ArchDefineTypes defs = (ArchDefineTypes)llvm::StringSwitch<int>(CPU)
868    .Case("440",   ArchDefineName)
869    .Case("450",   ArchDefineName | ArchDefine440)
870    .Case("601",   ArchDefineName)
871    .Case("602",   ArchDefineName | ArchDefinePpcgr)
872    .Case("603",   ArchDefineName | ArchDefinePpcgr)
873    .Case("603e",  ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
874    .Case("603ev", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
875    .Case("604",   ArchDefineName | ArchDefinePpcgr)
876    .Case("604e",  ArchDefineName | ArchDefine604 | ArchDefinePpcgr)
877    .Case("620",   ArchDefineName | ArchDefinePpcgr)
878    .Case("7400",  ArchDefineName | ArchDefinePpcgr)
879    .Case("7450",  ArchDefineName | ArchDefinePpcgr)
880    .Case("750",   ArchDefineName | ArchDefinePpcgr)
881    .Case("970",   ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr
882                     | ArchDefinePpcsq)
883    .Case("pwr6",  ArchDefinePwr6 | ArchDefinePpcgr | ArchDefinePpcsq)
884    .Case("pwr7",  ArchDefineName | ArchDefinePwr6 | ArchDefinePpcgr
885                     | ArchDefinePpcsq)
886    .Default(ArchDefineNone);
887
888  if (defs & ArchDefineName)
889    Builder.defineMacro(Twine("_ARCH_", StringRef(CPU).upper()));
890  if (defs & ArchDefinePpcgr)
891    Builder.defineMacro("_ARCH_PPCGR");
892  if (defs & ArchDefinePpcsq)
893    Builder.defineMacro("_ARCH_PPCSQ");
894  if (defs & ArchDefine440)
895    Builder.defineMacro("_ARCH_440");
896  if (defs & ArchDefine603)
897    Builder.defineMacro("_ARCH_603");
898  if (defs & ArchDefine604)
899    Builder.defineMacro("_ARCH_604");
900  if (defs & (ArchDefinePwr4 | ArchDefinePwr6))
901    Builder.defineMacro("_ARCH_PWR4");
902  if (defs & ArchDefinePwr6) {
903    Builder.defineMacro("_ARCH_PWR5");
904    Builder.defineMacro("_ARCH_PWR6");
905  }
906}
907
908bool PPCTargetInfo::hasFeature(StringRef Feature) const {
909  return Feature == "powerpc";
910}
911
912
913const char * const PPCTargetInfo::GCCRegNames[] = {
914  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
915  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
916  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
917  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
918  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
919  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
920  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
921  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
922  "mq", "lr", "ctr", "ap",
923  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
924  "xer",
925  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
926  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
927  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
928  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
929  "vrsave", "vscr",
930  "spe_acc", "spefscr",
931  "sfp"
932};
933
934void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
935                                   unsigned &NumNames) const {
936  Names = GCCRegNames;
937  NumNames = llvm::array_lengthof(GCCRegNames);
938}
939
940const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
941  // While some of these aliases do map to different registers
942  // they still share the same register name.
943  { { "0" }, "r0" },
944  { { "1"}, "r1" },
945  { { "2" }, "r2" },
946  { { "3" }, "r3" },
947  { { "4" }, "r4" },
948  { { "5" }, "r5" },
949  { { "6" }, "r6" },
950  { { "7" }, "r7" },
951  { { "8" }, "r8" },
952  { { "9" }, "r9" },
953  { { "10" }, "r10" },
954  { { "11" }, "r11" },
955  { { "12" }, "r12" },
956  { { "13" }, "r13" },
957  { { "14" }, "r14" },
958  { { "15" }, "r15" },
959  { { "16" }, "r16" },
960  { { "17" }, "r17" },
961  { { "18" }, "r18" },
962  { { "19" }, "r19" },
963  { { "20" }, "r20" },
964  { { "21" }, "r21" },
965  { { "22" }, "r22" },
966  { { "23" }, "r23" },
967  { { "24" }, "r24" },
968  { { "25" }, "r25" },
969  { { "26" }, "r26" },
970  { { "27" }, "r27" },
971  { { "28" }, "r28" },
972  { { "29" }, "r29" },
973  { { "30" }, "r30" },
974  { { "31" }, "r31" },
975  { { "fr0" }, "f0" },
976  { { "fr1" }, "f1" },
977  { { "fr2" }, "f2" },
978  { { "fr3" }, "f3" },
979  { { "fr4" }, "f4" },
980  { { "fr5" }, "f5" },
981  { { "fr6" }, "f6" },
982  { { "fr7" }, "f7" },
983  { { "fr8" }, "f8" },
984  { { "fr9" }, "f9" },
985  { { "fr10" }, "f10" },
986  { { "fr11" }, "f11" },
987  { { "fr12" }, "f12" },
988  { { "fr13" }, "f13" },
989  { { "fr14" }, "f14" },
990  { { "fr15" }, "f15" },
991  { { "fr16" }, "f16" },
992  { { "fr17" }, "f17" },
993  { { "fr18" }, "f18" },
994  { { "fr19" }, "f19" },
995  { { "fr20" }, "f20" },
996  { { "fr21" }, "f21" },
997  { { "fr22" }, "f22" },
998  { { "fr23" }, "f23" },
999  { { "fr24" }, "f24" },
1000  { { "fr25" }, "f25" },
1001  { { "fr26" }, "f26" },
1002  { { "fr27" }, "f27" },
1003  { { "fr28" }, "f28" },
1004  { { "fr29" }, "f29" },
1005  { { "fr30" }, "f30" },
1006  { { "fr31" }, "f31" },
1007  { { "cc" }, "cr0" },
1008};
1009
1010void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1011                                     unsigned &NumAliases) const {
1012  Aliases = GCCRegAliases;
1013  NumAliases = llvm::array_lengthof(GCCRegAliases);
1014}
1015} // end anonymous namespace.
1016
1017namespace {
1018class PPC32TargetInfo : public PPCTargetInfo {
1019public:
1020  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
1021    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1022                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
1023
1024    switch (getTriple().getOS()) {
1025    case llvm::Triple::Linux:
1026    case llvm::Triple::FreeBSD:
1027    case llvm::Triple::NetBSD:
1028      SizeType = UnsignedInt;
1029      PtrDiffType = SignedInt;
1030      IntPtrType = SignedInt;
1031      break;
1032    default:
1033      break;
1034    }
1035
1036    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1037      LongDoubleWidth = LongDoubleAlign = 64;
1038      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1039    }
1040  }
1041
1042  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1043    // This is the ELF definition, and is overridden by the Darwin sub-target
1044    return TargetInfo::PowerABIBuiltinVaList;
1045  }
1046};
1047} // end anonymous namespace.
1048
1049namespace {
1050class PPC64TargetInfo : public PPCTargetInfo {
1051public:
1052  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
1053    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1054    IntMaxType = SignedLong;
1055    UIntMaxType = UnsignedLong;
1056    Int64Type = SignedLong;
1057
1058    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1059      LongDoubleWidth = LongDoubleAlign = 64;
1060      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1061      DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1062                          "i64:64:64-f32:32:32-f64:64:64-f128:64:64-"
1063                          "v128:128:128-n32:64";
1064    } else
1065      DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1066                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
1067                          "v128:128:128-n32:64";
1068
1069  }
1070  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1071    return TargetInfo::CharPtrBuiltinVaList;
1072  }
1073};
1074} // end anonymous namespace.
1075
1076
1077namespace {
1078class DarwinPPC32TargetInfo :
1079  public DarwinTargetInfo<PPC32TargetInfo> {
1080public:
1081  DarwinPPC32TargetInfo(const std::string& triple)
1082    : DarwinTargetInfo<PPC32TargetInfo>(triple) {
1083    HasAlignMac68kSupport = true;
1084    BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
1085    LongLongAlign = 32;
1086    SuitableAlign = 128;
1087    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1088                        "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32";
1089  }
1090  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1091    return TargetInfo::CharPtrBuiltinVaList;
1092  }
1093};
1094
1095class DarwinPPC64TargetInfo :
1096  public DarwinTargetInfo<PPC64TargetInfo> {
1097public:
1098  DarwinPPC64TargetInfo(const std::string& triple)
1099    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
1100    HasAlignMac68kSupport = true;
1101    SuitableAlign = 128;
1102    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1103                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
1104  }
1105};
1106} // end anonymous namespace.
1107
1108namespace {
1109  static const unsigned NVPTXAddrSpaceMap[] = {
1110    1,    // opencl_global
1111    3,    // opencl_local
1112    4,    // opencl_constant
1113    1,    // cuda_device
1114    4,    // cuda_constant
1115    3,    // cuda_shared
1116  };
1117  class NVPTXTargetInfo : public TargetInfo {
1118    static const char * const GCCRegNames[];
1119    static const Builtin::Info BuiltinInfo[];
1120    std::vector<llvm::StringRef> AvailableFeatures;
1121  public:
1122    NVPTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
1123      BigEndian = false;
1124      TLSSupported = false;
1125      LongWidth = LongAlign = 64;
1126      AddrSpaceMap = &NVPTXAddrSpaceMap;
1127      // Define available target features
1128      // These must be defined in sorted order!
1129      NoAsmVariants = true;
1130    }
1131    virtual void getTargetDefines(const LangOptions &Opts,
1132                                  MacroBuilder &Builder) const {
1133      Builder.defineMacro("__PTX__");
1134      Builder.defineMacro("__NVPTX__");
1135    }
1136    virtual void getTargetBuiltins(const Builtin::Info *&Records,
1137                                   unsigned &NumRecords) const {
1138      Records = BuiltinInfo;
1139      NumRecords = clang::NVPTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
1140    }
1141    virtual bool hasFeature(StringRef Feature) const {
1142      return Feature == "ptx" || Feature == "nvptx";
1143    }
1144
1145    virtual void getGCCRegNames(const char * const *&Names,
1146                                unsigned &NumNames) const;
1147    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1148                                  unsigned &NumAliases) const {
1149      // No aliases.
1150      Aliases = 0;
1151      NumAliases = 0;
1152    }
1153    virtual bool validateAsmConstraint(const char *&Name,
1154                                       TargetInfo::ConstraintInfo &info) const {
1155      // FIXME: implement
1156      return true;
1157    }
1158    virtual const char *getClobbers() const {
1159      // FIXME: Is this really right?
1160      return "";
1161    }
1162    virtual BuiltinVaListKind getBuiltinVaListKind() const {
1163      // FIXME: implement
1164      return TargetInfo::CharPtrBuiltinVaList;
1165    }
1166    virtual bool setCPU(const std::string &Name) {
1167      return Name == "sm_10" || Name == "sm_13" || Name == "sm_20";
1168    }
1169    virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1170                                   StringRef Name,
1171                                   bool Enabled) const;
1172  };
1173
1174  const Builtin::Info NVPTXTargetInfo::BuiltinInfo[] = {
1175#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1176#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1177                                              ALL_LANGUAGES },
1178#include "clang/Basic/BuiltinsNVPTX.def"
1179  };
1180
1181  const char * const NVPTXTargetInfo::GCCRegNames[] = {
1182    "r0"
1183  };
1184
1185  void NVPTXTargetInfo::getGCCRegNames(const char * const *&Names,
1186                                     unsigned &NumNames) const {
1187    Names = GCCRegNames;
1188    NumNames = llvm::array_lengthof(GCCRegNames);
1189  }
1190
1191  bool NVPTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1192                                          StringRef Name,
1193                                          bool Enabled) const {
1194    if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
1195                          Name)) {
1196      Features[Name] = Enabled;
1197      return true;
1198    } else {
1199      return false;
1200    }
1201  }
1202
1203  class NVPTX32TargetInfo : public NVPTXTargetInfo {
1204  public:
1205    NVPTX32TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1206      PointerWidth = PointerAlign = 32;
1207      SizeType     = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1208      DescriptionString
1209        = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1210          "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1211          "n16:32:64";
1212  }
1213  };
1214
1215  class NVPTX64TargetInfo : public NVPTXTargetInfo {
1216  public:
1217    NVPTX64TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1218      PointerWidth = PointerAlign = 64;
1219      SizeType     = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1220      DescriptionString
1221        = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1222          "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1223          "n16:32:64";
1224  }
1225  };
1226}
1227
1228namespace {
1229
1230static const unsigned R600AddrSpaceMap[] = {
1231  1,    // opencl_global
1232  3,    // opencl_local
1233  2,    // opencl_constant
1234  1,    // cuda_device
1235  2,    // cuda_constant
1236  3     // cuda_shared
1237};
1238
1239class R600TargetInfo : public TargetInfo {
1240public:
1241  R600TargetInfo(const std::string& triple) : TargetInfo(triple) {
1242    DescriptionString =
1243          "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16"
1244          "-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:32:32"
1245          "-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64"
1246          "-v96:128:128-v128:128:128-v192:256:256-v256:256:256"
1247          "-v512:512:512-v1024:1024:1024-v2048:2048:2048"
1248          "-n8:16:32:64";
1249    AddrSpaceMap = &R600AddrSpaceMap;
1250  }
1251
1252  virtual const char * getClobbers() const {
1253    return "";
1254  }
1255
1256  virtual void getGCCRegNames(const char * const *&Names,
1257                              unsigned &numNames) const  {
1258    Names = NULL;
1259    numNames = 0;
1260  }
1261
1262  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1263                                unsigned &NumAliases) const {
1264    Aliases = NULL;
1265    NumAliases = 0;
1266  }
1267
1268  virtual bool validateAsmConstraint(const char *&Name,
1269                                     TargetInfo::ConstraintInfo &info) const {
1270    return true;
1271  }
1272
1273  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1274                                 unsigned &NumRecords) const {
1275    Records = NULL;
1276    NumRecords = 0;
1277  }
1278
1279
1280  virtual void getTargetDefines(const LangOptions &Opts,
1281                                MacroBuilder &Builder) const {
1282    Builder.defineMacro("__R600__");
1283  }
1284
1285  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1286    return TargetInfo::CharPtrBuiltinVaList;
1287  }
1288
1289};
1290
1291} // end anonymous namespace
1292
1293namespace {
1294// MBlaze abstract base class
1295class MBlazeTargetInfo : public TargetInfo {
1296  static const char * const GCCRegNames[];
1297  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1298
1299public:
1300  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1301    DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1302  }
1303
1304  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1305                                 unsigned &NumRecords) const {
1306    // FIXME: Implement.
1307    Records = 0;
1308    NumRecords = 0;
1309  }
1310
1311  virtual void getTargetDefines(const LangOptions &Opts,
1312                                MacroBuilder &Builder) const;
1313
1314  virtual bool hasFeature(StringRef Feature) const {
1315    return Feature == "mblaze";
1316  }
1317
1318  virtual BuiltinVaListKind getBuiltinVaListKind() const {
1319    return TargetInfo::CharPtrBuiltinVaList;
1320  }
1321  virtual const char *getTargetPrefix() const {
1322    return "mblaze";
1323  }
1324  virtual void getGCCRegNames(const char * const *&Names,
1325                              unsigned &NumNames) const;
1326  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1327                                unsigned &NumAliases) const;
1328  virtual bool validateAsmConstraint(const char *&Name,
1329                                     TargetInfo::ConstraintInfo &Info) const {
1330    switch (*Name) {
1331    default: return false;
1332    case 'O': // Zero
1333      return true;
1334    case 'b': // Base register
1335    case 'f': // Floating point register
1336      Info.setAllowsRegister();
1337      return true;
1338    }
1339  }
1340  virtual const char *getClobbers() const {
1341    return "";
1342  }
1343};
1344
1345/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1346/// #defines that are not tied to a specific subtarget.
1347void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1348                                     MacroBuilder &Builder) const {
1349  // Target identification.
1350  Builder.defineMacro("__microblaze__");
1351  Builder.defineMacro("_ARCH_MICROBLAZE");
1352  Builder.defineMacro("__MICROBLAZE__");
1353
1354  // Target properties.
1355  Builder.defineMacro("_BIG_ENDIAN");
1356  Builder.defineMacro("__BIG_ENDIAN__");
1357
1358  // Subtarget options.
1359  Builder.defineMacro("__REGISTER_PREFIX__", "");
1360}
1361
1362
1363const char * const MBlazeTargetInfo::GCCRegNames[] = {
1364  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
1365  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
1366  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
1367  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
1368  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
1369  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1370  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1371  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1372  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1373  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
1374};
1375
1376void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1377                                   unsigned &NumNames) const {
1378  Names = GCCRegNames;
1379  NumNames = llvm::array_lengthof(GCCRegNames);
1380}
1381
1382const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1383  { {"f0"},  "r0" },
1384  { {"f1"},  "r1" },
1385  { {"f2"},  "r2" },
1386  { {"f3"},  "r3" },
1387  { {"f4"},  "r4" },
1388  { {"f5"},  "r5" },
1389  { {"f6"},  "r6" },
1390  { {"f7"},  "r7" },
1391  { {"f8"},  "r8" },
1392  { {"f9"},  "r9" },
1393  { {"f10"}, "r10" },
1394  { {"f11"}, "r11" },
1395  { {"f12"}, "r12" },
1396  { {"f13"}, "r13" },
1397  { {"f14"}, "r14" },
1398  { {"f15"}, "r15" },
1399  { {"f16"}, "r16" },
1400  { {"f17"}, "r17" },
1401  { {"f18"}, "r18" },
1402  { {"f19"}, "r19" },
1403  { {"f20"}, "r20" },
1404  { {"f21"}, "r21" },
1405  { {"f22"}, "r22" },
1406  { {"f23"}, "r23" },
1407  { {"f24"}, "r24" },
1408  { {"f25"}, "r25" },
1409  { {"f26"}, "r26" },
1410  { {"f27"}, "r27" },
1411  { {"f28"}, "r28" },
1412  { {"f29"}, "r29" },
1413  { {"f30"}, "r30" },
1414  { {"f31"}, "r31" },
1415};
1416
1417void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1418                                     unsigned &NumAliases) const {
1419  Aliases = GCCRegAliases;
1420  NumAliases = llvm::array_lengthof(GCCRegAliases);
1421}
1422} // end anonymous namespace.
1423
1424namespace {
1425// Namespace for x86 abstract base class
1426const Builtin::Info BuiltinInfo[] = {
1427#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1428#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1429                                              ALL_LANGUAGES },
1430#include "clang/Basic/BuiltinsX86.def"
1431};
1432
1433static const char* const GCCRegNames[] = {
1434  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1435  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1436  "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1437  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1438  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1439  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1440  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1441  "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1442  "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1443};
1444
1445const TargetInfo::AddlRegName AddlRegNames[] = {
1446  { { "al", "ah", "eax", "rax" }, 0 },
1447  { { "bl", "bh", "ebx", "rbx" }, 3 },
1448  { { "cl", "ch", "ecx", "rcx" }, 2 },
1449  { { "dl", "dh", "edx", "rdx" }, 1 },
1450  { { "esi", "rsi" }, 4 },
1451  { { "edi", "rdi" }, 5 },
1452  { { "esp", "rsp" }, 7 },
1453  { { "ebp", "rbp" }, 6 },
1454};
1455
1456// X86 target abstract base class; x86-32 and x86-64 are very close, so
1457// most of the implementation can be shared.
1458class X86TargetInfo : public TargetInfo {
1459  enum X86SSEEnum {
1460    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1461  } SSELevel;
1462  enum MMX3DNowEnum {
1463    NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1464  } MMX3DNowLevel;
1465
1466  bool HasAES;
1467  bool HasPCLMUL;
1468  bool HasLZCNT;
1469  bool HasRDRND;
1470  bool HasBMI;
1471  bool HasBMI2;
1472  bool HasPOPCNT;
1473  bool HasRTM;
1474  bool HasSSE4a;
1475  bool HasFMA4;
1476  bool HasFMA;
1477  bool HasXOP;
1478  bool HasF16C;
1479
1480  /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1481  ///
1482  /// Each enumeration represents a particular CPU supported by Clang. These
1483  /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1484  enum CPUKind {
1485    CK_Generic,
1486
1487    /// \name i386
1488    /// i386-generation processors.
1489    //@{
1490    CK_i386,
1491    //@}
1492
1493    /// \name i486
1494    /// i486-generation processors.
1495    //@{
1496    CK_i486,
1497    CK_WinChipC6,
1498    CK_WinChip2,
1499    CK_C3,
1500    //@}
1501
1502    /// \name i586
1503    /// i586-generation processors, P5 microarchitecture based.
1504    //@{
1505    CK_i586,
1506    CK_Pentium,
1507    CK_PentiumMMX,
1508    //@}
1509
1510    /// \name i686
1511    /// i686-generation processors, P6 / Pentium M microarchitecture based.
1512    //@{
1513    CK_i686,
1514    CK_PentiumPro,
1515    CK_Pentium2,
1516    CK_Pentium3,
1517    CK_Pentium3M,
1518    CK_PentiumM,
1519    CK_C3_2,
1520
1521    /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1522    /// Clang however has some logic to suport this.
1523    // FIXME: Warn, deprecate, and potentially remove this.
1524    CK_Yonah,
1525    //@}
1526
1527    /// \name Netburst
1528    /// Netburst microarchitecture based processors.
1529    //@{
1530    CK_Pentium4,
1531    CK_Pentium4M,
1532    CK_Prescott,
1533    CK_Nocona,
1534    //@}
1535
1536    /// \name Core
1537    /// Core microarchitecture based processors.
1538    //@{
1539    CK_Core2,
1540
1541    /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1542    /// codename which GCC no longer accepts as an option to -march, but Clang
1543    /// has some logic for recognizing it.
1544    // FIXME: Warn, deprecate, and potentially remove this.
1545    CK_Penryn,
1546    //@}
1547
1548    /// \name Atom
1549    /// Atom processors
1550    //@{
1551    CK_Atom,
1552    //@}
1553
1554    /// \name Nehalem
1555    /// Nehalem microarchitecture based processors.
1556    //@{
1557    CK_Corei7,
1558    CK_Corei7AVX,
1559    CK_CoreAVXi,
1560    CK_CoreAVX2,
1561    //@}
1562
1563    /// \name K6
1564    /// K6 architecture processors.
1565    //@{
1566    CK_K6,
1567    CK_K6_2,
1568    CK_K6_3,
1569    //@}
1570
1571    /// \name K7
1572    /// K7 architecture processors.
1573    //@{
1574    CK_Athlon,
1575    CK_AthlonThunderbird,
1576    CK_Athlon4,
1577    CK_AthlonXP,
1578    CK_AthlonMP,
1579    //@}
1580
1581    /// \name K8
1582    /// K8 architecture processors.
1583    //@{
1584    CK_Athlon64,
1585    CK_Athlon64SSE3,
1586    CK_AthlonFX,
1587    CK_K8,
1588    CK_K8SSE3,
1589    CK_Opteron,
1590    CK_OpteronSSE3,
1591    CK_AMDFAM10,
1592    //@}
1593
1594    /// \name Bobcat
1595    /// Bobcat architecture processors.
1596    //@{
1597    CK_BTVER1,
1598    //@}
1599
1600    /// \name Bulldozer
1601    /// Bulldozer architecture processors.
1602    //@{
1603    CK_BDVER1,
1604    CK_BDVER2,
1605    //@}
1606
1607    /// This specification is deprecated and will be removed in the future.
1608    /// Users should prefer \see CK_K8.
1609    // FIXME: Warn on this when the CPU is set to it.
1610    CK_x86_64,
1611    //@}
1612
1613    /// \name Geode
1614    /// Geode processors.
1615    //@{
1616    CK_Geode
1617    //@}
1618  } CPU;
1619
1620public:
1621  X86TargetInfo(const std::string& triple)
1622    : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1623      HasAES(false), HasPCLMUL(false), HasLZCNT(false), HasRDRND(false),
1624      HasBMI(false), HasBMI2(false), HasPOPCNT(false), HasRTM(false),
1625      HasSSE4a(false), HasFMA4(false), HasFMA(false), HasXOP(false),
1626      HasF16C(false), CPU(CK_Generic) {
1627    BigEndian = false;
1628    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1629  }
1630  virtual unsigned getFloatEvalMethod() const {
1631    // X87 evaluates with 80 bits "long double" precision.
1632    return SSELevel == NoSSE ? 2 : 0;
1633  }
1634  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1635                                 unsigned &NumRecords) const {
1636    Records = BuiltinInfo;
1637    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1638  }
1639  virtual void getGCCRegNames(const char * const *&Names,
1640                              unsigned &NumNames) const {
1641    Names = GCCRegNames;
1642    NumNames = llvm::array_lengthof(GCCRegNames);
1643  }
1644  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1645                                unsigned &NumAliases) const {
1646    Aliases = 0;
1647    NumAliases = 0;
1648  }
1649  virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1650				  unsigned &NumNames) const {
1651    Names = AddlRegNames;
1652    NumNames = llvm::array_lengthof(AddlRegNames);
1653  }
1654  virtual bool validateAsmConstraint(const char *&Name,
1655                                     TargetInfo::ConstraintInfo &info) const;
1656  virtual std::string convertConstraint(const char *&Constraint) const;
1657  virtual const char *getClobbers() const {
1658    return "~{dirflag},~{fpsr},~{flags}";
1659  }
1660  virtual void getTargetDefines(const LangOptions &Opts,
1661                                MacroBuilder &Builder) const;
1662  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1663                                 StringRef Name,
1664                                 bool Enabled) const;
1665  virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1666  virtual bool hasFeature(StringRef Feature) const;
1667  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1668  virtual const char* getABI() const {
1669    if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
1670      return "avx";
1671    else if (getTriple().getArch() == llvm::Triple::x86 &&
1672             MMX3DNowLevel == NoMMX3DNow)
1673      return "no-mmx";
1674    return "";
1675  }
1676  virtual bool setCPU(const std::string &Name) {
1677    CPU = llvm::StringSwitch<CPUKind>(Name)
1678      .Case("i386", CK_i386)
1679      .Case("i486", CK_i486)
1680      .Case("winchip-c6", CK_WinChipC6)
1681      .Case("winchip2", CK_WinChip2)
1682      .Case("c3", CK_C3)
1683      .Case("i586", CK_i586)
1684      .Case("pentium", CK_Pentium)
1685      .Case("pentium-mmx", CK_PentiumMMX)
1686      .Case("i686", CK_i686)
1687      .Case("pentiumpro", CK_PentiumPro)
1688      .Case("pentium2", CK_Pentium2)
1689      .Case("pentium3", CK_Pentium3)
1690      .Case("pentium3m", CK_Pentium3M)
1691      .Case("pentium-m", CK_PentiumM)
1692      .Case("c3-2", CK_C3_2)
1693      .Case("yonah", CK_Yonah)
1694      .Case("pentium4", CK_Pentium4)
1695      .Case("pentium4m", CK_Pentium4M)
1696      .Case("prescott", CK_Prescott)
1697      .Case("nocona", CK_Nocona)
1698      .Case("core2", CK_Core2)
1699      .Case("penryn", CK_Penryn)
1700      .Case("atom", CK_Atom)
1701      .Case("corei7", CK_Corei7)
1702      .Case("corei7-avx", CK_Corei7AVX)
1703      .Case("core-avx-i", CK_CoreAVXi)
1704      .Case("core-avx2", CK_CoreAVX2)
1705      .Case("k6", CK_K6)
1706      .Case("k6-2", CK_K6_2)
1707      .Case("k6-3", CK_K6_3)
1708      .Case("athlon", CK_Athlon)
1709      .Case("athlon-tbird", CK_AthlonThunderbird)
1710      .Case("athlon-4", CK_Athlon4)
1711      .Case("athlon-xp", CK_AthlonXP)
1712      .Case("athlon-mp", CK_AthlonMP)
1713      .Case("athlon64", CK_Athlon64)
1714      .Case("athlon64-sse3", CK_Athlon64SSE3)
1715      .Case("athlon-fx", CK_AthlonFX)
1716      .Case("k8", CK_K8)
1717      .Case("k8-sse3", CK_K8SSE3)
1718      .Case("opteron", CK_Opteron)
1719      .Case("opteron-sse3", CK_OpteronSSE3)
1720      .Case("amdfam10", CK_AMDFAM10)
1721      .Case("btver1", CK_BTVER1)
1722      .Case("bdver1", CK_BDVER1)
1723      .Case("bdver2", CK_BDVER2)
1724      .Case("x86-64", CK_x86_64)
1725      .Case("geode", CK_Geode)
1726      .Default(CK_Generic);
1727
1728    // Perform any per-CPU checks necessary to determine if this CPU is
1729    // acceptable.
1730    // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1731    // invalid without explaining *why*.
1732    switch (CPU) {
1733    case CK_Generic:
1734      // No processor selected!
1735      return false;
1736
1737    case CK_i386:
1738    case CK_i486:
1739    case CK_WinChipC6:
1740    case CK_WinChip2:
1741    case CK_C3:
1742    case CK_i586:
1743    case CK_Pentium:
1744    case CK_PentiumMMX:
1745    case CK_i686:
1746    case CK_PentiumPro:
1747    case CK_Pentium2:
1748    case CK_Pentium3:
1749    case CK_Pentium3M:
1750    case CK_PentiumM:
1751    case CK_Yonah:
1752    case CK_C3_2:
1753    case CK_Pentium4:
1754    case CK_Pentium4M:
1755    case CK_Prescott:
1756    case CK_K6:
1757    case CK_K6_2:
1758    case CK_K6_3:
1759    case CK_Athlon:
1760    case CK_AthlonThunderbird:
1761    case CK_Athlon4:
1762    case CK_AthlonXP:
1763    case CK_AthlonMP:
1764    case CK_Geode:
1765      // Only accept certain architectures when compiling in 32-bit mode.
1766      if (getTriple().getArch() != llvm::Triple::x86)
1767        return false;
1768
1769      // Fallthrough
1770    case CK_Nocona:
1771    case CK_Core2:
1772    case CK_Penryn:
1773    case CK_Atom:
1774    case CK_Corei7:
1775    case CK_Corei7AVX:
1776    case CK_CoreAVXi:
1777    case CK_CoreAVX2:
1778    case CK_Athlon64:
1779    case CK_Athlon64SSE3:
1780    case CK_AthlonFX:
1781    case CK_K8:
1782    case CK_K8SSE3:
1783    case CK_Opteron:
1784    case CK_OpteronSSE3:
1785    case CK_AMDFAM10:
1786    case CK_BTVER1:
1787    case CK_BDVER1:
1788    case CK_BDVER2:
1789    case CK_x86_64:
1790      return true;
1791    }
1792    llvm_unreachable("Unhandled CPU kind");
1793  }
1794
1795  virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
1796    // We accept all non-ARM calling conventions
1797    return (CC == CC_X86ThisCall ||
1798            CC == CC_X86FastCall ||
1799            CC == CC_X86StdCall ||
1800            CC == CC_C ||
1801            CC == CC_X86Pascal) ? CCCR_OK : CCCR_Warning;
1802  }
1803
1804  virtual CallingConv getDefaultCallingConv() const {
1805    return CC_C;
1806  }
1807};
1808
1809void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1810  // FIXME: This should not be here.
1811  Features["3dnow"] = false;
1812  Features["3dnowa"] = false;
1813  Features["mmx"] = false;
1814  Features["sse"] = false;
1815  Features["sse2"] = false;
1816  Features["sse3"] = false;
1817  Features["ssse3"] = false;
1818  Features["sse41"] = false;
1819  Features["sse42"] = false;
1820  Features["sse4a"] = false;
1821  Features["aes"] = false;
1822  Features["pclmul"] = false;
1823  Features["avx"] = false;
1824  Features["avx2"] = false;
1825  Features["lzcnt"] = false;
1826  Features["rdrand"] = false;
1827  Features["bmi"] = false;
1828  Features["bmi2"] = false;
1829  Features["popcnt"] = false;
1830  Features["rtm"] = false;
1831  Features["fma4"] = false;
1832  Features["fma"] = false;
1833  Features["xop"] = false;
1834  Features["f16c"] = false;
1835
1836  // FIXME: This *really* should not be here.
1837
1838  // X86_64 always has SSE2.
1839  if (getTriple().getArch() == llvm::Triple::x86_64)
1840    Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1841
1842  switch (CPU) {
1843  case CK_Generic:
1844  case CK_i386:
1845  case CK_i486:
1846  case CK_i586:
1847  case CK_Pentium:
1848  case CK_i686:
1849  case CK_PentiumPro:
1850    break;
1851  case CK_PentiumMMX:
1852  case CK_Pentium2:
1853    setFeatureEnabled(Features, "mmx", true);
1854    break;
1855  case CK_Pentium3:
1856  case CK_Pentium3M:
1857    setFeatureEnabled(Features, "mmx", true);
1858    setFeatureEnabled(Features, "sse", true);
1859    break;
1860  case CK_PentiumM:
1861  case CK_Pentium4:
1862  case CK_Pentium4M:
1863  case CK_x86_64:
1864    setFeatureEnabled(Features, "mmx", true);
1865    setFeatureEnabled(Features, "sse2", true);
1866    break;
1867  case CK_Yonah:
1868  case CK_Prescott:
1869  case CK_Nocona:
1870    setFeatureEnabled(Features, "mmx", true);
1871    setFeatureEnabled(Features, "sse3", true);
1872    break;
1873  case CK_Core2:
1874    setFeatureEnabled(Features, "mmx", true);
1875    setFeatureEnabled(Features, "ssse3", true);
1876    break;
1877  case CK_Penryn:
1878    setFeatureEnabled(Features, "mmx", true);
1879    setFeatureEnabled(Features, "sse4.1", true);
1880    break;
1881  case CK_Atom:
1882    setFeatureEnabled(Features, "mmx", true);
1883    setFeatureEnabled(Features, "ssse3", true);
1884    break;
1885  case CK_Corei7:
1886    setFeatureEnabled(Features, "mmx", true);
1887    setFeatureEnabled(Features, "sse4", true);
1888    break;
1889  case CK_Corei7AVX:
1890    setFeatureEnabled(Features, "mmx", true);
1891    setFeatureEnabled(Features, "avx", true);
1892    setFeatureEnabled(Features, "aes", true);
1893    setFeatureEnabled(Features, "pclmul", true);
1894    break;
1895  case CK_CoreAVXi:
1896    setFeatureEnabled(Features, "mmx", true);
1897    setFeatureEnabled(Features, "avx", true);
1898    setFeatureEnabled(Features, "aes", true);
1899    setFeatureEnabled(Features, "pclmul", true);
1900    setFeatureEnabled(Features, "rdrnd", true);
1901    break;
1902  case CK_CoreAVX2:
1903    setFeatureEnabled(Features, "mmx", true);
1904    setFeatureEnabled(Features, "avx2", true);
1905    setFeatureEnabled(Features, "aes", true);
1906    setFeatureEnabled(Features, "pclmul", true);
1907    setFeatureEnabled(Features, "lzcnt", true);
1908    setFeatureEnabled(Features, "rdrnd", true);
1909    setFeatureEnabled(Features, "bmi", true);
1910    setFeatureEnabled(Features, "bmi2", true);
1911    setFeatureEnabled(Features, "rtm", true);
1912    setFeatureEnabled(Features, "fma", true);
1913    break;
1914  case CK_K6:
1915  case CK_WinChipC6:
1916    setFeatureEnabled(Features, "mmx", true);
1917    break;
1918  case CK_K6_2:
1919  case CK_K6_3:
1920  case CK_WinChip2:
1921  case CK_C3:
1922    setFeatureEnabled(Features, "3dnow", true);
1923    break;
1924  case CK_Athlon:
1925  case CK_AthlonThunderbird:
1926  case CK_Geode:
1927    setFeatureEnabled(Features, "3dnowa", true);
1928    break;
1929  case CK_Athlon4:
1930  case CK_AthlonXP:
1931  case CK_AthlonMP:
1932    setFeatureEnabled(Features, "sse", true);
1933    setFeatureEnabled(Features, "3dnowa", true);
1934    break;
1935  case CK_K8:
1936  case CK_Opteron:
1937  case CK_Athlon64:
1938  case CK_AthlonFX:
1939    setFeatureEnabled(Features, "sse2", true);
1940    setFeatureEnabled(Features, "3dnowa", true);
1941    break;
1942  case CK_K8SSE3:
1943  case CK_OpteronSSE3:
1944  case CK_Athlon64SSE3:
1945    setFeatureEnabled(Features, "sse3", true);
1946    setFeatureEnabled(Features, "3dnowa", true);
1947    break;
1948  case CK_AMDFAM10:
1949    setFeatureEnabled(Features, "sse3", true);
1950    setFeatureEnabled(Features, "sse4a", true);
1951    setFeatureEnabled(Features, "3dnowa", true);
1952    break;
1953  case CK_BTVER1:
1954    setFeatureEnabled(Features, "ssse3", true);
1955    setFeatureEnabled(Features, "sse4a", true);
1956    break;
1957  case CK_BDVER1:
1958  case CK_BDVER2:
1959    setFeatureEnabled(Features, "avx", true);
1960    setFeatureEnabled(Features, "xop", true);
1961    setFeatureEnabled(Features, "aes", true);
1962    setFeatureEnabled(Features, "pclmul", true);
1963    break;
1964  case CK_C3_2:
1965    setFeatureEnabled(Features, "mmx", true);
1966    setFeatureEnabled(Features, "sse", true);
1967    break;
1968  }
1969}
1970
1971bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1972                                      StringRef Name,
1973                                      bool Enabled) const {
1974  // FIXME: This *really* should not be here.  We need some way of translating
1975  // options into llvm subtarget features.
1976  if (!Features.count(Name) &&
1977      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1" &&
1978       Name != "rdrnd"))
1979    return false;
1980
1981  // FIXME: this should probably use a switch with fall through.
1982
1983  if (Enabled) {
1984    if (Name == "mmx")
1985      Features["mmx"] = true;
1986    else if (Name == "sse")
1987      Features["mmx"] = Features["sse"] = true;
1988    else if (Name == "sse2")
1989      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1990    else if (Name == "sse3")
1991      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1992        true;
1993    else if (Name == "ssse3")
1994      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1995        Features["ssse3"] = true;
1996    else if (Name == "sse4" || Name == "sse4.2")
1997      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1998        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1999        Features["popcnt"] = true;
2000    else if (Name == "sse4.1")
2001      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2002        Features["ssse3"] = Features["sse41"] = true;
2003    else if (Name == "3dnow")
2004      Features["mmx"] = Features["3dnow"] = true;
2005    else if (Name == "3dnowa")
2006      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
2007    else if (Name == "aes")
2008      Features["sse"] = Features["sse2"] = Features["aes"] = true;
2009    else if (Name == "pclmul")
2010      Features["sse"] = Features["sse2"] = Features["pclmul"] = true;
2011    else if (Name == "avx")
2012      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2013        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2014        Features["popcnt"] = Features["avx"] = true;
2015    else if (Name == "avx2")
2016      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2017        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2018        Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
2019    else if (Name == "fma")
2020      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2021        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2022        Features["popcnt"] = Features["avx"] = Features["fma"] = true;
2023    else if (Name == "fma4")
2024        Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2025        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2026        Features["popcnt"] = Features["avx"] = Features["sse4a"] =
2027        Features["fma4"] = true;
2028    else if (Name == "xop")
2029        Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2030        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2031        Features["popcnt"] = Features["avx"] = Features["sse4a"] =
2032        Features["fma4"] = Features["xop"] = true;
2033    else if (Name == "sse4a")
2034      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2035        Features["sse4a"] = true;
2036    else if (Name == "lzcnt")
2037      Features["lzcnt"] = true;
2038    else if (Name == "rdrnd")
2039      Features["rdrand"] = true;
2040    else if (Name == "bmi")
2041      Features["bmi"] = true;
2042    else if (Name == "bmi2")
2043      Features["bmi2"] = true;
2044    else if (Name == "popcnt")
2045      Features["popcnt"] = true;
2046    else if (Name == "f16c")
2047      Features["f16c"] = true;
2048    else if (Name == "rtm")
2049      Features["rtm"] = true;
2050  } else {
2051    if (Name == "mmx")
2052      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
2053    else if (Name == "sse")
2054      Features["sse"] = Features["sse2"] = Features["sse3"] =
2055        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2056        Features["sse4a"] = Features["avx"] = Features["avx2"] =
2057        Features["fma"] = Features["fma4"] = Features["aes"] =
2058        Features["pclmul"] = Features["xop"] = false;
2059    else if (Name == "sse2")
2060      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
2061        Features["sse41"] = Features["sse42"] = Features["sse4a"] =
2062        Features["avx"] = Features["avx2"] = Features["fma"] =
2063        Features["fma4"] = Features["aes"] = Features["pclmul"] =
2064        Features["xop"] = false;
2065    else if (Name == "sse3")
2066      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
2067        Features["sse42"] = Features["sse4a"] = Features["avx"] =
2068        Features["avx2"] = Features["fma"] = Features["fma4"] =
2069        Features["xop"] = false;
2070    else if (Name == "ssse3")
2071      Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2072        Features["avx"] = Features["avx2"] = Features["fma"] = false;
2073    else if (Name == "sse4" || Name == "sse4.1")
2074      Features["sse41"] = Features["sse42"] = Features["avx"] =
2075        Features["avx2"] = Features["fma"] = false;
2076    else if (Name == "sse4.2")
2077      Features["sse42"] = Features["avx"] = Features["avx2"] =
2078        Features["fma"] = false;
2079    else if (Name == "3dnow")
2080      Features["3dnow"] = Features["3dnowa"] = false;
2081    else if (Name == "3dnowa")
2082      Features["3dnowa"] = false;
2083    else if (Name == "aes")
2084      Features["aes"] = false;
2085    else if (Name == "pclmul")
2086      Features["pclmul"] = false;
2087    else if (Name == "avx")
2088      Features["avx"] = Features["avx2"] = Features["fma"] =
2089        Features["fma4"] = Features["xop"] = false;
2090    else if (Name == "avx2")
2091      Features["avx2"] = false;
2092    else if (Name == "fma")
2093      Features["fma"] = false;
2094    else if (Name == "sse4a")
2095      Features["sse4a"] = Features["fma4"] = Features["xop"] = false;
2096    else if (Name == "lzcnt")
2097      Features["lzcnt"] = false;
2098    else if (Name == "rdrnd")
2099      Features["rdrand"] = false;
2100    else if (Name == "bmi")
2101      Features["bmi"] = false;
2102    else if (Name == "bmi2")
2103      Features["bmi2"] = false;
2104    else if (Name == "popcnt")
2105      Features["popcnt"] = false;
2106    else if (Name == "fma4")
2107      Features["fma4"] = Features["xop"] = false;
2108    else if (Name == "xop")
2109      Features["xop"] = false;
2110    else if (Name == "f16c")
2111      Features["f16c"] = false;
2112    else if (Name == "rtm")
2113      Features["rtm"] = false;
2114  }
2115
2116  return true;
2117}
2118
2119/// HandleTargetOptions - Perform initialization based on the user
2120/// configured set of features.
2121void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
2122  // Remember the maximum enabled sselevel.
2123  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
2124    // Ignore disabled features.
2125    if (Features[i][0] == '-')
2126      continue;
2127
2128    StringRef Feature = StringRef(Features[i]).substr(1);
2129
2130    if (Feature == "aes") {
2131      HasAES = true;
2132      continue;
2133    }
2134
2135    if (Feature == "pclmul") {
2136      HasPCLMUL = true;
2137      continue;
2138    }
2139
2140    if (Feature == "lzcnt") {
2141      HasLZCNT = true;
2142      continue;
2143    }
2144
2145    if (Feature == "rdrand") {
2146      HasRDRND = true;
2147      continue;
2148    }
2149
2150    if (Feature == "bmi") {
2151      HasBMI = true;
2152      continue;
2153    }
2154
2155    if (Feature == "bmi2") {
2156      HasBMI2 = true;
2157      continue;
2158    }
2159
2160    if (Feature == "popcnt") {
2161      HasPOPCNT = true;
2162      continue;
2163    }
2164
2165    if (Feature == "rtm") {
2166      HasRTM = true;
2167      continue;
2168    }
2169
2170    if (Feature == "sse4a") {
2171      HasSSE4a = true;
2172      continue;
2173    }
2174
2175    if (Feature == "fma4") {
2176      HasFMA4 = true;
2177      continue;
2178    }
2179
2180    if (Feature == "fma") {
2181      HasFMA = true;
2182      continue;
2183    }
2184
2185    if (Feature == "xop") {
2186      HasXOP = true;
2187      continue;
2188    }
2189
2190    if (Feature == "f16c") {
2191      HasF16C = true;
2192      continue;
2193    }
2194
2195    assert(Features[i][0] == '+' && "Invalid target feature!");
2196    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
2197      .Case("avx2", AVX2)
2198      .Case("avx", AVX)
2199      .Case("sse42", SSE42)
2200      .Case("sse41", SSE41)
2201      .Case("ssse3", SSSE3)
2202      .Case("sse3", SSE3)
2203      .Case("sse2", SSE2)
2204      .Case("sse", SSE1)
2205      .Default(NoSSE);
2206    SSELevel = std::max(SSELevel, Level);
2207
2208    MMX3DNowEnum ThreeDNowLevel =
2209      llvm::StringSwitch<MMX3DNowEnum>(Feature)
2210        .Case("3dnowa", AMD3DNowAthlon)
2211        .Case("3dnow", AMD3DNow)
2212        .Case("mmx", MMX)
2213        .Default(NoMMX3DNow);
2214
2215    MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
2216  }
2217
2218  // Don't tell the backend if we're turning off mmx; it will end up disabling
2219  // SSE, which we don't want.
2220  std::vector<std::string>::iterator it;
2221  it = std::find(Features.begin(), Features.end(), "-mmx");
2222  if (it != Features.end())
2223    Features.erase(it);
2224}
2225
2226/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
2227/// definitions for this particular subtarget.
2228void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
2229                                     MacroBuilder &Builder) const {
2230  // Target identification.
2231  if (getTriple().getArch() == llvm::Triple::x86_64) {
2232    Builder.defineMacro("__amd64__");
2233    Builder.defineMacro("__amd64");
2234    Builder.defineMacro("__x86_64");
2235    Builder.defineMacro("__x86_64__");
2236  } else {
2237    DefineStd(Builder, "i386", Opts);
2238  }
2239
2240  // Subtarget options.
2241  // FIXME: We are hard-coding the tune parameters based on the CPU, but they
2242  // truly should be based on -mtune options.
2243  switch (CPU) {
2244  case CK_Generic:
2245    break;
2246  case CK_i386:
2247    // The rest are coming from the i386 define above.
2248    Builder.defineMacro("__tune_i386__");
2249    break;
2250  case CK_i486:
2251  case CK_WinChipC6:
2252  case CK_WinChip2:
2253  case CK_C3:
2254    defineCPUMacros(Builder, "i486");
2255    break;
2256  case CK_PentiumMMX:
2257    Builder.defineMacro("__pentium_mmx__");
2258    Builder.defineMacro("__tune_pentium_mmx__");
2259    // Fallthrough
2260  case CK_i586:
2261  case CK_Pentium:
2262    defineCPUMacros(Builder, "i586");
2263    defineCPUMacros(Builder, "pentium");
2264    break;
2265  case CK_Pentium3:
2266  case CK_Pentium3M:
2267  case CK_PentiumM:
2268    Builder.defineMacro("__tune_pentium3__");
2269    // Fallthrough
2270  case CK_Pentium2:
2271  case CK_C3_2:
2272    Builder.defineMacro("__tune_pentium2__");
2273    // Fallthrough
2274  case CK_PentiumPro:
2275    Builder.defineMacro("__tune_i686__");
2276    Builder.defineMacro("__tune_pentiumpro__");
2277    // Fallthrough
2278  case CK_i686:
2279    Builder.defineMacro("__i686");
2280    Builder.defineMacro("__i686__");
2281    // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
2282    Builder.defineMacro("__pentiumpro");
2283    Builder.defineMacro("__pentiumpro__");
2284    break;
2285  case CK_Pentium4:
2286  case CK_Pentium4M:
2287    defineCPUMacros(Builder, "pentium4");
2288    break;
2289  case CK_Yonah:
2290  case CK_Prescott:
2291  case CK_Nocona:
2292    defineCPUMacros(Builder, "nocona");
2293    break;
2294  case CK_Core2:
2295  case CK_Penryn:
2296    defineCPUMacros(Builder, "core2");
2297    break;
2298  case CK_Atom:
2299    defineCPUMacros(Builder, "atom");
2300    break;
2301  case CK_Corei7:
2302  case CK_Corei7AVX:
2303  case CK_CoreAVXi:
2304  case CK_CoreAVX2:
2305    defineCPUMacros(Builder, "corei7");
2306    break;
2307  case CK_K6_2:
2308    Builder.defineMacro("__k6_2__");
2309    Builder.defineMacro("__tune_k6_2__");
2310    // Fallthrough
2311  case CK_K6_3:
2312    if (CPU != CK_K6_2) {  // In case of fallthrough
2313      // FIXME: GCC may be enabling these in cases where some other k6
2314      // architecture is specified but -m3dnow is explicitly provided. The
2315      // exact semantics need to be determined and emulated here.
2316      Builder.defineMacro("__k6_3__");
2317      Builder.defineMacro("__tune_k6_3__");
2318    }
2319    // Fallthrough
2320  case CK_K6:
2321    defineCPUMacros(Builder, "k6");
2322    break;
2323  case CK_Athlon:
2324  case CK_AthlonThunderbird:
2325  case CK_Athlon4:
2326  case CK_AthlonXP:
2327  case CK_AthlonMP:
2328    defineCPUMacros(Builder, "athlon");
2329    if (SSELevel != NoSSE) {
2330      Builder.defineMacro("__athlon_sse__");
2331      Builder.defineMacro("__tune_athlon_sse__");
2332    }
2333    break;
2334  case CK_K8:
2335  case CK_K8SSE3:
2336  case CK_x86_64:
2337  case CK_Opteron:
2338  case CK_OpteronSSE3:
2339  case CK_Athlon64:
2340  case CK_Athlon64SSE3:
2341  case CK_AthlonFX:
2342    defineCPUMacros(Builder, "k8");
2343    break;
2344  case CK_AMDFAM10:
2345    defineCPUMacros(Builder, "amdfam10");
2346    break;
2347  case CK_BTVER1:
2348    defineCPUMacros(Builder, "btver1");
2349    break;
2350  case CK_BDVER1:
2351    defineCPUMacros(Builder, "bdver1");
2352    break;
2353  case CK_BDVER2:
2354    defineCPUMacros(Builder, "bdver2");
2355    break;
2356  case CK_Geode:
2357    defineCPUMacros(Builder, "geode");
2358    break;
2359  }
2360
2361  // Target properties.
2362  Builder.defineMacro("__LITTLE_ENDIAN__");
2363  Builder.defineMacro("__REGISTER_PREFIX__", "");
2364
2365  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
2366  // functions in glibc header files that use FP Stack inline asm which the
2367  // backend can't deal with (PR879).
2368  Builder.defineMacro("__NO_MATH_INLINES");
2369
2370  if (HasAES)
2371    Builder.defineMacro("__AES__");
2372
2373  if (HasPCLMUL)
2374    Builder.defineMacro("__PCLMUL__");
2375
2376  if (HasLZCNT)
2377    Builder.defineMacro("__LZCNT__");
2378
2379  if (HasRDRND)
2380    Builder.defineMacro("__RDRND__");
2381
2382  if (HasBMI)
2383    Builder.defineMacro("__BMI__");
2384
2385  if (HasBMI2)
2386    Builder.defineMacro("__BMI2__");
2387
2388  if (HasPOPCNT)
2389    Builder.defineMacro("__POPCNT__");
2390
2391  if (HasRTM)
2392    Builder.defineMacro("__RTM__");
2393
2394  if (HasSSE4a)
2395    Builder.defineMacro("__SSE4A__");
2396
2397  if (HasFMA4)
2398    Builder.defineMacro("__FMA4__");
2399
2400  if (HasFMA)
2401    Builder.defineMacro("__FMA__");
2402
2403  if (HasXOP)
2404    Builder.defineMacro("__XOP__");
2405
2406  if (HasF16C)
2407    Builder.defineMacro("__F16C__");
2408
2409  // Each case falls through to the previous one here.
2410  switch (SSELevel) {
2411  case AVX2:
2412    Builder.defineMacro("__AVX2__");
2413  case AVX:
2414    Builder.defineMacro("__AVX__");
2415  case SSE42:
2416    Builder.defineMacro("__SSE4_2__");
2417  case SSE41:
2418    Builder.defineMacro("__SSE4_1__");
2419  case SSSE3:
2420    Builder.defineMacro("__SSSE3__");
2421  case SSE3:
2422    Builder.defineMacro("__SSE3__");
2423  case SSE2:
2424    Builder.defineMacro("__SSE2__");
2425    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
2426  case SSE1:
2427    Builder.defineMacro("__SSE__");
2428    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
2429  case NoSSE:
2430    break;
2431  }
2432
2433  if (Opts.MicrosoftExt && getTriple().getArch() == llvm::Triple::x86) {
2434    switch (SSELevel) {
2435    case AVX2:
2436    case AVX:
2437    case SSE42:
2438    case SSE41:
2439    case SSSE3:
2440    case SSE3:
2441    case SSE2:
2442      Builder.defineMacro("_M_IX86_FP", Twine(2));
2443      break;
2444    case SSE1:
2445      Builder.defineMacro("_M_IX86_FP", Twine(1));
2446      break;
2447    default:
2448      Builder.defineMacro("_M_IX86_FP", Twine(0));
2449    }
2450  }
2451
2452  // Each case falls through to the previous one here.
2453  switch (MMX3DNowLevel) {
2454  case AMD3DNowAthlon:
2455    Builder.defineMacro("__3dNOW_A__");
2456  case AMD3DNow:
2457    Builder.defineMacro("__3dNOW__");
2458  case MMX:
2459    Builder.defineMacro("__MMX__");
2460  case NoMMX3DNow:
2461    break;
2462  }
2463}
2464
2465bool X86TargetInfo::hasFeature(StringRef Feature) const {
2466  return llvm::StringSwitch<bool>(Feature)
2467      .Case("aes", HasAES)
2468      .Case("avx", SSELevel >= AVX)
2469      .Case("avx2", SSELevel >= AVX2)
2470      .Case("bmi", HasBMI)
2471      .Case("bmi2", HasBMI2)
2472      .Case("fma", HasFMA)
2473      .Case("fma4", HasFMA4)
2474      .Case("lzcnt", HasLZCNT)
2475      .Case("rdrnd", HasRDRND)
2476      .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
2477      .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
2478      .Case("mmx", MMX3DNowLevel >= MMX)
2479      .Case("pclmul", HasPCLMUL)
2480      .Case("popcnt", HasPOPCNT)
2481      .Case("rtm", HasRTM)
2482      .Case("sse", SSELevel >= SSE1)
2483      .Case("sse2", SSELevel >= SSE2)
2484      .Case("sse3", SSELevel >= SSE3)
2485      .Case("ssse3", SSELevel >= SSSE3)
2486      .Case("sse41", SSELevel >= SSE41)
2487      .Case("sse42", SSELevel >= SSE42)
2488      .Case("sse4a", HasSSE4a)
2489      .Case("x86", true)
2490      .Case("x86_32", getTriple().getArch() == llvm::Triple::x86)
2491      .Case("x86_64", getTriple().getArch() == llvm::Triple::x86_64)
2492      .Case("xop", HasXOP)
2493      .Case("f16c", HasF16C)
2494      .Default(false);
2495}
2496
2497bool
2498X86TargetInfo::validateAsmConstraint(const char *&Name,
2499                                     TargetInfo::ConstraintInfo &Info) const {
2500  switch (*Name) {
2501  default: return false;
2502  case 'Y': // first letter of a pair:
2503    switch (*(Name+1)) {
2504    default: return false;
2505    case '0':  // First SSE register.
2506    case 't':  // Any SSE register, when SSE2 is enabled.
2507    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
2508    case 'm':  // any MMX register, when inter-unit moves enabled.
2509      break;   // falls through to setAllowsRegister.
2510  }
2511  case 'a': // eax.
2512  case 'b': // ebx.
2513  case 'c': // ecx.
2514  case 'd': // edx.
2515  case 'S': // esi.
2516  case 'D': // edi.
2517  case 'A': // edx:eax.
2518  case 'f': // any x87 floating point stack register.
2519  case 't': // top of floating point stack.
2520  case 'u': // second from top of floating point stack.
2521  case 'q': // Any register accessible as [r]l: a, b, c, and d.
2522  case 'y': // Any MMX register.
2523  case 'x': // Any SSE register.
2524  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2525  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2526  case 'l': // "Index" registers: any general register that can be used as an
2527            // index in a base+index memory access.
2528    Info.setAllowsRegister();
2529    return true;
2530  case 'C': // SSE floating point constant.
2531  case 'G': // x87 floating point constant.
2532  case 'e': // 32-bit signed integer constant for use with zero-extending
2533            // x86_64 instructions.
2534  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2535            // x86_64 instructions.
2536    return true;
2537  }
2538}
2539
2540
2541std::string
2542X86TargetInfo::convertConstraint(const char *&Constraint) const {
2543  switch (*Constraint) {
2544  case 'a': return std::string("{ax}");
2545  case 'b': return std::string("{bx}");
2546  case 'c': return std::string("{cx}");
2547  case 'd': return std::string("{dx}");
2548  case 'S': return std::string("{si}");
2549  case 'D': return std::string("{di}");
2550  case 'p': // address
2551    return std::string("im");
2552  case 't': // top of floating point stack.
2553    return std::string("{st}");
2554  case 'u': // second from top of floating point stack.
2555    return std::string("{st(1)}"); // second from top of floating point stack.
2556  default:
2557    return std::string(1, *Constraint);
2558  }
2559}
2560} // end anonymous namespace
2561
2562namespace {
2563// X86-32 generic target
2564class X86_32TargetInfo : public X86TargetInfo {
2565public:
2566  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2567    DoubleAlign = LongLongAlign = 32;
2568    LongDoubleWidth = 96;
2569    LongDoubleAlign = 32;
2570    SuitableAlign = 128;
2571    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2572                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2573                        "a0:0:64-f80:32:32-n8:16:32-S128";
2574    SizeType = UnsignedInt;
2575    PtrDiffType = SignedInt;
2576    IntPtrType = SignedInt;
2577    RegParmMax = 3;
2578
2579    // Use fpret for all types.
2580    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2581                             (1 << TargetInfo::Double) |
2582                             (1 << TargetInfo::LongDouble));
2583
2584    // x86-32 has atomics up to 8 bytes
2585    // FIXME: Check that we actually have cmpxchg8b before setting
2586    // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2587    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2588  }
2589  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2590    return TargetInfo::CharPtrBuiltinVaList;
2591  }
2592
2593  int getEHDataRegisterNumber(unsigned RegNo) const {
2594    if (RegNo == 0) return 0;
2595    if (RegNo == 1) return 2;
2596    return -1;
2597  }
2598  virtual bool validateInputSize(StringRef Constraint,
2599                                 unsigned Size) const {
2600    switch (Constraint[0]) {
2601    default: break;
2602    case 'a':
2603    case 'b':
2604    case 'c':
2605    case 'd':
2606      return Size <= 32;
2607    }
2608
2609    return true;
2610  }
2611};
2612} // end anonymous namespace
2613
2614namespace {
2615class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2616public:
2617  NetBSDI386TargetInfo(const std::string &triple) :
2618    NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2619  }
2620
2621  virtual unsigned getFloatEvalMethod() const {
2622    // NetBSD defaults to "double" rounding
2623    return 1;
2624  }
2625};
2626} // end anonymous namespace
2627
2628namespace {
2629class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2630public:
2631  OpenBSDI386TargetInfo(const std::string& triple) :
2632    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2633    SizeType = UnsignedLong;
2634    IntPtrType = SignedLong;
2635    PtrDiffType = SignedLong;
2636  }
2637};
2638} // end anonymous namespace
2639
2640namespace {
2641class BitrigI386TargetInfo : public BitrigTargetInfo<X86_32TargetInfo> {
2642public:
2643  BitrigI386TargetInfo(const std::string& triple) :
2644    BitrigTargetInfo<X86_32TargetInfo>(triple) {
2645    SizeType = UnsignedLong;
2646    IntPtrType = SignedLong;
2647    PtrDiffType = SignedLong;
2648  }
2649};
2650} // end anonymous namespace
2651
2652namespace {
2653class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2654public:
2655  DarwinI386TargetInfo(const std::string& triple) :
2656    DarwinTargetInfo<X86_32TargetInfo>(triple) {
2657    LongDoubleWidth = 128;
2658    LongDoubleAlign = 128;
2659    SuitableAlign = 128;
2660    MaxVectorAlign = 256;
2661    SizeType = UnsignedLong;
2662    IntPtrType = SignedLong;
2663    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2664                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2665                        "a0:0:64-f80:128:128-n8:16:32-S128";
2666    HasAlignMac68kSupport = true;
2667  }
2668
2669};
2670} // end anonymous namespace
2671
2672namespace {
2673// x86-32 Windows target
2674class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2675public:
2676  WindowsX86_32TargetInfo(const std::string& triple)
2677    : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2678    TLSSupported = false;
2679    WCharType = UnsignedShort;
2680    DoubleAlign = LongLongAlign = 64;
2681    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2682                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2683                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2684  }
2685  virtual void getTargetDefines(const LangOptions &Opts,
2686                                MacroBuilder &Builder) const {
2687    WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2688  }
2689};
2690} // end anonymous namespace
2691
2692namespace {
2693
2694// x86-32 Windows Visual Studio target
2695class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2696public:
2697  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2698    : WindowsX86_32TargetInfo(triple) {
2699    LongDoubleWidth = LongDoubleAlign = 64;
2700    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2701  }
2702  virtual void getTargetDefines(const LangOptions &Opts,
2703                                MacroBuilder &Builder) const {
2704    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2705    WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2706    // The value of the following reflects processor type.
2707    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2708    // We lost the original triple, so we use the default.
2709    Builder.defineMacro("_M_IX86", "600");
2710  }
2711};
2712} // end anonymous namespace
2713
2714namespace {
2715// x86-32 MinGW target
2716class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2717public:
2718  MinGWX86_32TargetInfo(const std::string& triple)
2719    : WindowsX86_32TargetInfo(triple) {
2720  }
2721  virtual void getTargetDefines(const LangOptions &Opts,
2722                                MacroBuilder &Builder) const {
2723    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2724    DefineStd(Builder, "WIN32", Opts);
2725    DefineStd(Builder, "WINNT", Opts);
2726    Builder.defineMacro("_X86_");
2727    Builder.defineMacro("__MSVCRT__");
2728    Builder.defineMacro("__MINGW32__");
2729
2730    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2731    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2732    if (Opts.MicrosoftExt)
2733      // Provide "as-is" __declspec.
2734      Builder.defineMacro("__declspec", "__declspec");
2735    else
2736      // Provide alias of __attribute__ like mingw32-gcc.
2737      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2738  }
2739};
2740} // end anonymous namespace
2741
2742namespace {
2743// x86-32 Cygwin target
2744class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2745public:
2746  CygwinX86_32TargetInfo(const std::string& triple)
2747    : X86_32TargetInfo(triple) {
2748    TLSSupported = false;
2749    WCharType = UnsignedShort;
2750    DoubleAlign = LongLongAlign = 64;
2751    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2752                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2753                        "a0:0:64-f80:32:32-n8:16:32-S32";
2754  }
2755  virtual void getTargetDefines(const LangOptions &Opts,
2756                                MacroBuilder &Builder) const {
2757    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2758    Builder.defineMacro("__CYGWIN__");
2759    Builder.defineMacro("__CYGWIN32__");
2760    DefineStd(Builder, "unix", Opts);
2761    if (Opts.CPlusPlus)
2762      Builder.defineMacro("_GNU_SOURCE");
2763  }
2764};
2765} // end anonymous namespace
2766
2767namespace {
2768// x86-32 Haiku target
2769class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2770public:
2771  HaikuX86_32TargetInfo(const std::string& triple)
2772    : X86_32TargetInfo(triple) {
2773    SizeType = UnsignedLong;
2774    IntPtrType = SignedLong;
2775    PtrDiffType = SignedLong;
2776    this->UserLabelPrefix = "";
2777    this->TLSSupported = false;
2778  }
2779  virtual void getTargetDefines(const LangOptions &Opts,
2780                                MacroBuilder &Builder) const {
2781    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2782    Builder.defineMacro("__INTEL__");
2783    Builder.defineMacro("__HAIKU__");
2784  }
2785};
2786} // end anonymous namespace
2787
2788// RTEMS Target
2789template<typename Target>
2790class RTEMSTargetInfo : public OSTargetInfo<Target> {
2791protected:
2792  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2793                            MacroBuilder &Builder) const {
2794    // RTEMS defines; list based off of gcc output
2795
2796    Builder.defineMacro("__rtems__");
2797    Builder.defineMacro("__ELF__");
2798  }
2799public:
2800  RTEMSTargetInfo(const std::string &triple)
2801    : OSTargetInfo<Target>(triple) {
2802      this->UserLabelPrefix = "";
2803
2804      llvm::Triple Triple(triple);
2805      switch (Triple.getArch()) {
2806        default:
2807        case llvm::Triple::x86:
2808          // this->MCountName = ".mcount";
2809          break;
2810        case llvm::Triple::mips:
2811        case llvm::Triple::mipsel:
2812        case llvm::Triple::ppc:
2813        case llvm::Triple::ppc64:
2814          // this->MCountName = "_mcount";
2815          break;
2816        case llvm::Triple::arm:
2817          // this->MCountName = "__mcount";
2818          break;
2819      }
2820
2821    }
2822};
2823
2824namespace {
2825// x86-32 RTEMS target
2826class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2827public:
2828  RTEMSX86_32TargetInfo(const std::string& triple)
2829    : X86_32TargetInfo(triple) {
2830    SizeType = UnsignedLong;
2831    IntPtrType = SignedLong;
2832    PtrDiffType = SignedLong;
2833    this->UserLabelPrefix = "";
2834  }
2835  virtual void getTargetDefines(const LangOptions &Opts,
2836                                MacroBuilder &Builder) const {
2837    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2838    Builder.defineMacro("__INTEL__");
2839    Builder.defineMacro("__rtems__");
2840  }
2841};
2842} // end anonymous namespace
2843
2844namespace {
2845// x86-64 generic target
2846class X86_64TargetInfo : public X86TargetInfo {
2847public:
2848  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2849    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2850    LongDoubleWidth = 128;
2851    LongDoubleAlign = 128;
2852    LargeArrayMinWidth = 128;
2853    LargeArrayAlign = 128;
2854    SuitableAlign = 128;
2855    IntMaxType = SignedLong;
2856    UIntMaxType = UnsignedLong;
2857    Int64Type = SignedLong;
2858    RegParmMax = 6;
2859
2860    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2861                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2862                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2863
2864    // Use fpret only for long double.
2865    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2866
2867    // Use fp2ret for _Complex long double.
2868    ComplexLongDoubleUsesFP2Ret = true;
2869
2870    // x86-64 has atomics up to 16 bytes.
2871    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2872    // on CPUs with cmpxchg16b
2873    MaxAtomicPromoteWidth = 128;
2874    MaxAtomicInlineWidth = 64;
2875  }
2876  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2877    return TargetInfo::X86_64ABIBuiltinVaList;
2878  }
2879
2880  int getEHDataRegisterNumber(unsigned RegNo) const {
2881    if (RegNo == 0) return 0;
2882    if (RegNo == 1) return 1;
2883    return -1;
2884  }
2885
2886  virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
2887    return TargetInfo::checkCallingConvention(CC);
2888  }
2889
2890  virtual CallingConv getDefaultCallingConv() const {
2891    return CC_Default;
2892  }
2893
2894};
2895} // end anonymous namespace
2896
2897namespace {
2898// x86-64 Windows target
2899class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2900public:
2901  WindowsX86_64TargetInfo(const std::string& triple)
2902    : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2903    TLSSupported = false;
2904    WCharType = UnsignedShort;
2905    LongWidth = LongAlign = 32;
2906    DoubleAlign = LongLongAlign = 64;
2907    IntMaxType = SignedLongLong;
2908    UIntMaxType = UnsignedLongLong;
2909    Int64Type = SignedLongLong;
2910    SizeType = UnsignedLongLong;
2911    PtrDiffType = SignedLongLong;
2912    IntPtrType = SignedLongLong;
2913    this->UserLabelPrefix = "";
2914  }
2915  virtual void getTargetDefines(const LangOptions &Opts,
2916                                MacroBuilder &Builder) const {
2917    WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2918    Builder.defineMacro("_WIN64");
2919  }
2920  virtual BuiltinVaListKind getBuiltinVaListKind() const {
2921    return TargetInfo::CharPtrBuiltinVaList;
2922  }
2923};
2924} // end anonymous namespace
2925
2926namespace {
2927// x86-64 Windows Visual Studio target
2928class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2929public:
2930  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2931    : WindowsX86_64TargetInfo(triple) {
2932    LongDoubleWidth = LongDoubleAlign = 64;
2933    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2934  }
2935  virtual void getTargetDefines(const LangOptions &Opts,
2936                                MacroBuilder &Builder) const {
2937    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2938    WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2939    Builder.defineMacro("_M_X64");
2940    Builder.defineMacro("_M_AMD64");
2941  }
2942};
2943} // end anonymous namespace
2944
2945namespace {
2946// x86-64 MinGW target
2947class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2948public:
2949  MinGWX86_64TargetInfo(const std::string& triple)
2950    : WindowsX86_64TargetInfo(triple) {
2951  }
2952  virtual void getTargetDefines(const LangOptions &Opts,
2953                                MacroBuilder &Builder) const {
2954    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2955    DefineStd(Builder, "WIN64", Opts);
2956    Builder.defineMacro("__MSVCRT__");
2957    Builder.defineMacro("__MINGW32__");
2958    Builder.defineMacro("__MINGW64__");
2959
2960    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2961    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2962    if (Opts.MicrosoftExt)
2963      // Provide "as-is" __declspec.
2964      Builder.defineMacro("__declspec", "__declspec");
2965    else
2966      // Provide alias of __attribute__ like mingw32-gcc.
2967      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2968  }
2969};
2970} // end anonymous namespace
2971
2972namespace {
2973class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2974public:
2975  DarwinX86_64TargetInfo(const std::string& triple)
2976      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2977    Int64Type = SignedLongLong;
2978    MaxVectorAlign = 256;
2979  }
2980};
2981} // end anonymous namespace
2982
2983namespace {
2984class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2985public:
2986  OpenBSDX86_64TargetInfo(const std::string& triple)
2987      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2988    IntMaxType = SignedLongLong;
2989    UIntMaxType = UnsignedLongLong;
2990    Int64Type = SignedLongLong;
2991  }
2992};
2993} // end anonymous namespace
2994
2995namespace {
2996class BitrigX86_64TargetInfo : public BitrigTargetInfo<X86_64TargetInfo> {
2997public:
2998  BitrigX86_64TargetInfo(const std::string& triple)
2999      : BitrigTargetInfo<X86_64TargetInfo>(triple) {
3000     IntMaxType = SignedLongLong;
3001     UIntMaxType = UnsignedLongLong;
3002     Int64Type = SignedLongLong;
3003  }
3004};
3005} // end anonymous namespace
3006
3007namespace {
3008class ARMTargetInfo : public TargetInfo {
3009  // Possible FPU choices.
3010  enum FPUMode {
3011    VFP2FPU = (1 << 0),
3012    VFP3FPU = (1 << 1),
3013    VFP4FPU = (1 << 2),
3014    NeonFPU = (1 << 3)
3015  };
3016
3017  static bool FPUModeIsVFP(FPUMode Mode) {
3018    return Mode & (VFP2FPU | VFP3FPU | VFP4FPU | NeonFPU);
3019  }
3020
3021  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3022  static const char * const GCCRegNames[];
3023
3024  std::string ABI, CPU;
3025
3026  unsigned FPU : 4;
3027
3028  unsigned IsAAPCS : 1;
3029  unsigned IsThumb : 1;
3030
3031  // Initialized via features.
3032  unsigned SoftFloat : 1;
3033  unsigned SoftFloatABI : 1;
3034
3035  static const Builtin::Info BuiltinInfo[];
3036
3037public:
3038  ARMTargetInfo(const std::string &TripleStr)
3039    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s"), IsAAPCS(true)
3040  {
3041    BigEndian = false;
3042    SizeType = UnsignedInt;
3043    PtrDiffType = SignedInt;
3044    // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
3045    WCharType = UnsignedInt;
3046
3047    // {} in inline assembly are neon specifiers, not assembly variant
3048    // specifiers.
3049    NoAsmVariants = true;
3050
3051    // FIXME: Should we just treat this as a feature?
3052    IsThumb = getTriple().getArchName().startswith("thumb");
3053    if (IsThumb) {
3054      // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
3055      // so set preferred for small types to 32.
3056      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
3057                           "i64:64:64-f32:32:32-f64:64:64-"
3058                           "v64:64:64-v128:64:128-a0:0:32-n32-S64");
3059    } else {
3060      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3061                           "i64:64:64-f32:32:32-f64:64:64-"
3062                           "v64:64:64-v128:64:128-a0:0:64-n32-S64");
3063    }
3064
3065    // ARM targets default to using the ARM C++ ABI.
3066    CXXABI = CXXABI_ARM;
3067
3068    // ARM has atomics up to 8 bytes
3069    // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
3070    MaxAtomicPromoteWidth = 64;
3071
3072    // Do force alignment of members that follow zero length bitfields.  If
3073    // the alignment of the zero-length bitfield is greater than the member
3074    // that follows it, `bar', `bar' will be aligned as the  type of the
3075    // zero length bitfield.
3076    UseZeroLengthBitfieldAlignment = true;
3077  }
3078  virtual const char *getABI() const { return ABI.c_str(); }
3079  virtual bool setABI(const std::string &Name) {
3080    ABI = Name;
3081
3082    // The defaults (above) are for AAPCS, check if we need to change them.
3083    //
3084    // FIXME: We need support for -meabi... we could just mangle it into the
3085    // name.
3086    if (Name == "apcs-gnu") {
3087      DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
3088      SizeType = UnsignedLong;
3089
3090      // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
3091      WCharType = SignedInt;
3092
3093      // Do not respect the alignment of bit-field types when laying out
3094      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
3095      UseBitFieldTypeAlignment = false;
3096
3097      /// gcc forces the alignment to 4 bytes, regardless of the type of the
3098      /// zero length bitfield.  This corresponds to EMPTY_FIELD_BOUNDARY in
3099      /// gcc.
3100      ZeroLengthBitfieldBoundary = 32;
3101
3102      IsAAPCS = false;
3103
3104      if (IsThumb) {
3105        // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
3106        // so set preferred for small types to 32.
3107        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
3108                             "i64:32:64-f32:32:32-f64:32:64-"
3109                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
3110      } else {
3111        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3112                             "i64:32:64-f32:32:32-f64:32:64-"
3113                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
3114      }
3115
3116      // FIXME: Override "preferred align" for double and long long.
3117    } else if (Name == "aapcs" || Name == "aapcs-vfp") {
3118      IsAAPCS = true;
3119      // FIXME: Enumerated types are variable width in straight AAPCS.
3120    } else if (Name == "aapcs-linux") {
3121      IsAAPCS = true;
3122    } else
3123      return false;
3124
3125    return true;
3126  }
3127
3128  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3129    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
3130      Features["vfp2"] = true;
3131    else if (CPU == "cortex-a8" || CPU == "cortex-a15" ||
3132             CPU == "cortex-a9" || CPU == "cortex-a9-mp")
3133      Features["neon"] = true;
3134    else if (CPU == "swift") {
3135      Features["vfp4"] = true;
3136      Features["neon"] = true;
3137    }
3138  }
3139
3140  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3141                                 StringRef Name,
3142                                 bool Enabled) const {
3143    if (Name == "soft-float" || Name == "soft-float-abi" ||
3144        Name == "vfp2" || Name == "vfp3" || Name == "vfp4" || Name == "neon" ||
3145        Name == "d16" || Name == "neonfp") {
3146      Features[Name] = Enabled;
3147    } else
3148      return false;
3149
3150    return true;
3151  }
3152
3153  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3154    FPU = 0;
3155    SoftFloat = SoftFloatABI = false;
3156    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
3157      if (Features[i] == "+soft-float")
3158        SoftFloat = true;
3159      else if (Features[i] == "+soft-float-abi")
3160        SoftFloatABI = true;
3161      else if (Features[i] == "+vfp2")
3162        FPU |= VFP2FPU;
3163      else if (Features[i] == "+vfp3")
3164        FPU |= VFP3FPU;
3165      else if (Features[i] == "+vfp4")
3166        FPU |= VFP4FPU;
3167      else if (Features[i] == "+neon")
3168        FPU |= NeonFPU;
3169    }
3170
3171    // Remove front-end specific options which the backend handles differently.
3172    std::vector<std::string>::iterator it;
3173    it = std::find(Features.begin(), Features.end(), "+soft-float");
3174    if (it != Features.end())
3175      Features.erase(it);
3176    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
3177    if (it != Features.end())
3178      Features.erase(it);
3179  }
3180
3181  virtual bool hasFeature(StringRef Feature) const {
3182    return llvm::StringSwitch<bool>(Feature)
3183        .Case("arm", true)
3184        .Case("softfloat", SoftFloat)
3185        .Case("thumb", IsThumb)
3186        .Case("neon", FPU == NeonFPU && !SoftFloat &&
3187              StringRef(getCPUDefineSuffix(CPU)).startswith("7"))
3188        .Default(false);
3189  }
3190  // FIXME: Should we actually have some table instead of these switches?
3191  static const char *getCPUDefineSuffix(StringRef Name) {
3192    return llvm::StringSwitch<const char*>(Name)
3193      .Cases("arm8", "arm810", "4")
3194      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
3195      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
3196      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
3197      .Case("ep9312", "4T")
3198      .Cases("arm10tdmi", "arm1020t", "5T")
3199      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
3200      .Case("arm926ej-s", "5TEJ")
3201      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
3202      .Cases("xscale", "iwmmxt", "5TE")
3203      .Case("arm1136j-s", "6J")
3204      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
3205      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
3206      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
3207      .Cases("cortex-a8", "cortex-a9", "cortex-a15", "7A")
3208      .Case("cortex-a9-mp", "7F")
3209      .Case("swift", "7S")
3210      .Cases("cortex-m3", "cortex-m4", "7M")
3211      .Case("cortex-m0", "6M")
3212      .Default(0);
3213  }
3214  static const char *getCPUProfile(StringRef Name) {
3215    return llvm::StringSwitch<const char*>(Name)
3216      .Cases("cortex-a8", "cortex-a9", "A")
3217      .Cases("cortex-m3", "cortex-m4", "cortex-m0", "M")
3218      .Default("");
3219  }
3220  virtual bool setCPU(const std::string &Name) {
3221    if (!getCPUDefineSuffix(Name))
3222      return false;
3223
3224    CPU = Name;
3225    return true;
3226  }
3227  virtual void getTargetDefines(const LangOptions &Opts,
3228                                MacroBuilder &Builder) const {
3229    // Target identification.
3230    Builder.defineMacro("__arm");
3231    Builder.defineMacro("__arm__");
3232
3233    // Target properties.
3234    Builder.defineMacro("__ARMEL__");
3235    Builder.defineMacro("__LITTLE_ENDIAN__");
3236    Builder.defineMacro("__REGISTER_PREFIX__", "");
3237
3238    StringRef CPUArch = getCPUDefineSuffix(CPU);
3239    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
3240    Builder.defineMacro("__ARM_ARCH", CPUArch.substr(0, 1));
3241    StringRef CPUProfile = getCPUProfile(CPU);
3242    if (!CPUProfile.empty())
3243      Builder.defineMacro("__ARM_ARCH_PROFILE", CPUProfile);
3244
3245    // Subtarget options.
3246
3247    // FIXME: It's more complicated than this and we don't really support
3248    // interworking.
3249    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
3250      Builder.defineMacro("__THUMB_INTERWORK__");
3251
3252    if (ABI == "aapcs" || ABI == "aapcs-linux" || ABI == "aapcs-vfp") {
3253      // M-class CPUs on Darwin follow AAPCS, but not EABI.
3254      if (!(getTriple().isOSDarwin() && CPUProfile == "M"))
3255        Builder.defineMacro("__ARM_EABI__");
3256      Builder.defineMacro("__ARM_PCS", "1");
3257
3258      if ((!SoftFloat && !SoftFloatABI) || ABI == "aapcs-vfp")
3259        Builder.defineMacro("__ARM_PCS_VFP", "1");
3260    }
3261
3262    if (SoftFloat)
3263      Builder.defineMacro("__SOFTFP__");
3264
3265    if (CPU == "xscale")
3266      Builder.defineMacro("__XSCALE__");
3267
3268    bool IsARMv7 = CPUArch.startswith("7");
3269    if (IsThumb) {
3270      Builder.defineMacro("__THUMBEL__");
3271      Builder.defineMacro("__thumb__");
3272      if (CPUArch == "6T2" || IsARMv7)
3273        Builder.defineMacro("__thumb2__");
3274    }
3275
3276    // Note, this is always on in gcc, even though it doesn't make sense.
3277    Builder.defineMacro("__APCS_32__");
3278
3279    if (FPUModeIsVFP((FPUMode) FPU)) {
3280      Builder.defineMacro("__VFP_FP__");
3281      if (FPU & VFP2FPU)
3282        Builder.defineMacro("__ARM_VFPV2__");
3283      if (FPU & VFP3FPU)
3284        Builder.defineMacro("__ARM_VFPV3__");
3285      if (FPU & VFP4FPU)
3286        Builder.defineMacro("__ARM_VFPV4__");
3287    }
3288
3289    // This only gets set when Neon instructions are actually available, unlike
3290    // the VFP define, hence the soft float and arch check. This is subtly
3291    // different from gcc, we follow the intent which was that it should be set
3292    // when Neon instructions are actually available.
3293    if ((FPU & NeonFPU) && !SoftFloat && IsARMv7)
3294      Builder.defineMacro("__ARM_NEON__");
3295  }
3296  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3297                                 unsigned &NumRecords) const {
3298    Records = BuiltinInfo;
3299    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
3300  }
3301  virtual bool isCLZForZeroUndef() const { return false; }
3302  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3303    return IsAAPCS ? AAPCSABIBuiltinVaList : TargetInfo::VoidPtrBuiltinVaList;
3304  }
3305  virtual void getGCCRegNames(const char * const *&Names,
3306                              unsigned &NumNames) const;
3307  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3308                                unsigned &NumAliases) const;
3309  virtual bool validateAsmConstraint(const char *&Name,
3310                                     TargetInfo::ConstraintInfo &Info) const {
3311    switch (*Name) {
3312    default: break;
3313    case 'l': // r0-r7
3314    case 'h': // r8-r15
3315    case 'w': // VFP Floating point register single precision
3316    case 'P': // VFP Floating point register double precision
3317      Info.setAllowsRegister();
3318      return true;
3319    case 'Q': // A memory address that is a single base register.
3320      Info.setAllowsMemory();
3321      return true;
3322    case 'U': // a memory reference...
3323      switch (Name[1]) {
3324      case 'q': // ...ARMV4 ldrsb
3325      case 'v': // ...VFP load/store (reg+constant offset)
3326      case 'y': // ...iWMMXt load/store
3327      case 't': // address valid for load/store opaque types wider
3328	        // than 128-bits
3329      case 'n': // valid address for Neon doubleword vector load/store
3330      case 'm': // valid address for Neon element and structure load/store
3331      case 's': // valid address for non-offset loads/stores of quad-word
3332	        // values in four ARM registers
3333        Info.setAllowsMemory();
3334        Name++;
3335        return true;
3336      }
3337    }
3338    return false;
3339  }
3340  virtual std::string convertConstraint(const char *&Constraint) const {
3341    std::string R;
3342    switch (*Constraint) {
3343    case 'U':   // Two-character constraint; add "^" hint for later parsing.
3344      R = std::string("^") + std::string(Constraint, 2);
3345      Constraint++;
3346      break;
3347    case 'p': // 'p' should be translated to 'r' by default.
3348      R = std::string("r");
3349      break;
3350    default:
3351      return std::string(1, *Constraint);
3352    }
3353    return R;
3354  }
3355  virtual bool validateConstraintModifier(StringRef Constraint,
3356                                          const char Modifier,
3357                                          unsigned Size) const {
3358    // Strip off constraint modifiers.
3359    while (Constraint[0] == '=' ||
3360           Constraint[0] == '+' ||
3361           Constraint[0] == '&')
3362      Constraint = Constraint.substr(1);
3363
3364    switch (Constraint[0]) {
3365    default: break;
3366    case 'r': {
3367      switch (Modifier) {
3368      default:
3369        return Size == 32;
3370      case 'q':
3371        // A register of size 32 cannot fit a vector type.
3372        return false;
3373      }
3374    }
3375    }
3376
3377    return true;
3378  }
3379  virtual const char *getClobbers() const {
3380    // FIXME: Is this really right?
3381    return "";
3382  }
3383
3384  virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
3385    return (CC == CC_AAPCS || CC == CC_AAPCS_VFP) ? CCCR_OK : CCCR_Warning;
3386  }
3387};
3388
3389const char * const ARMTargetInfo::GCCRegNames[] = {
3390  // Integer registers
3391  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3392  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
3393
3394  // Float registers
3395  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
3396  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
3397  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
3398  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
3399
3400  // Double registers
3401  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
3402  "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
3403  "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
3404  "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
3405
3406  // Quad registers
3407  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
3408  "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
3409};
3410
3411void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
3412                                   unsigned &NumNames) const {
3413  Names = GCCRegNames;
3414  NumNames = llvm::array_lengthof(GCCRegNames);
3415}
3416
3417const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
3418  { { "a1" }, "r0" },
3419  { { "a2" }, "r1" },
3420  { { "a3" }, "r2" },
3421  { { "a4" }, "r3" },
3422  { { "v1" }, "r4" },
3423  { { "v2" }, "r5" },
3424  { { "v3" }, "r6" },
3425  { { "v4" }, "r7" },
3426  { { "v5" }, "r8" },
3427  { { "v6", "rfp" }, "r9" },
3428  { { "sl" }, "r10" },
3429  { { "fp" }, "r11" },
3430  { { "ip" }, "r12" },
3431  { { "r13" }, "sp" },
3432  { { "r14" }, "lr" },
3433  { { "r15" }, "pc" },
3434  // The S, D and Q registers overlap, but aren't really aliases; we
3435  // don't want to substitute one of these for a different-sized one.
3436};
3437
3438void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3439                                       unsigned &NumAliases) const {
3440  Aliases = GCCRegAliases;
3441  NumAliases = llvm::array_lengthof(GCCRegAliases);
3442}
3443
3444const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
3445#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3446#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3447                                              ALL_LANGUAGES },
3448#include "clang/Basic/BuiltinsARM.def"
3449};
3450} // end anonymous namespace.
3451
3452namespace {
3453class DarwinARMTargetInfo :
3454  public DarwinTargetInfo<ARMTargetInfo> {
3455protected:
3456  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
3457                            MacroBuilder &Builder) const {
3458    getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
3459  }
3460
3461public:
3462  DarwinARMTargetInfo(const std::string& triple)
3463    : DarwinTargetInfo<ARMTargetInfo>(triple) {
3464    HasAlignMac68kSupport = true;
3465    // iOS always has 64-bit atomic instructions.
3466    // FIXME: This should be based off of the target features in ARMTargetInfo.
3467    MaxAtomicInlineWidth = 64;
3468  }
3469};
3470} // end anonymous namespace.
3471
3472
3473namespace {
3474// Hexagon abstract base class
3475class HexagonTargetInfo : public TargetInfo {
3476  static const Builtin::Info BuiltinInfo[];
3477  static const char * const GCCRegNames[];
3478  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3479  std::string CPU;
3480public:
3481  HexagonTargetInfo(const std::string& triple) : TargetInfo(triple)  {
3482    BigEndian = false;
3483    DescriptionString = ("e-p:32:32:32-"
3484                         "i64:64:64-i32:32:32-i16:16:16-i1:32:32"
3485                         "f64:64:64-f32:32:32-a0:0-n32");
3486
3487    // {} in inline assembly are packet specifiers, not assembly variant
3488    // specifiers.
3489    NoAsmVariants = true;
3490  }
3491
3492  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3493                                 unsigned &NumRecords) const {
3494    Records = BuiltinInfo;
3495    NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
3496  }
3497
3498  virtual bool validateAsmConstraint(const char *&Name,
3499                                     TargetInfo::ConstraintInfo &Info) const {
3500    return true;
3501  }
3502
3503  virtual void getTargetDefines(const LangOptions &Opts,
3504                                MacroBuilder &Builder) const;
3505
3506  virtual bool hasFeature(StringRef Feature) const {
3507    return Feature == "hexagon";
3508  }
3509
3510  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3511    return TargetInfo::CharPtrBuiltinVaList;
3512  }
3513  virtual void getGCCRegNames(const char * const *&Names,
3514                              unsigned &NumNames) const;
3515  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3516                                unsigned &NumAliases) const;
3517  virtual const char *getClobbers() const {
3518    return "";
3519  }
3520
3521  static const char *getHexagonCPUSuffix(StringRef Name) {
3522    return llvm::StringSwitch<const char*>(Name)
3523      .Case("hexagonv2", "2")
3524      .Case("hexagonv3", "3")
3525      .Case("hexagonv4", "4")
3526      .Case("hexagonv5", "5")
3527      .Default(0);
3528  }
3529
3530  virtual bool setCPU(const std::string &Name) {
3531    if (!getHexagonCPUSuffix(Name))
3532      return false;
3533
3534    CPU = Name;
3535    return true;
3536  }
3537};
3538
3539void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
3540                                MacroBuilder &Builder) const {
3541  Builder.defineMacro("qdsp6");
3542  Builder.defineMacro("__qdsp6", "1");
3543  Builder.defineMacro("__qdsp6__", "1");
3544
3545  Builder.defineMacro("hexagon");
3546  Builder.defineMacro("__hexagon", "1");
3547  Builder.defineMacro("__hexagon__", "1");
3548
3549  if(CPU == "hexagonv1") {
3550    Builder.defineMacro("__HEXAGON_V1__");
3551    Builder.defineMacro("__HEXAGON_ARCH__", "1");
3552    if(Opts.HexagonQdsp6Compat) {
3553      Builder.defineMacro("__QDSP6_V1__");
3554      Builder.defineMacro("__QDSP6_ARCH__", "1");
3555    }
3556  }
3557  else if(CPU == "hexagonv2") {
3558    Builder.defineMacro("__HEXAGON_V2__");
3559    Builder.defineMacro("__HEXAGON_ARCH__", "2");
3560    if(Opts.HexagonQdsp6Compat) {
3561      Builder.defineMacro("__QDSP6_V2__");
3562      Builder.defineMacro("__QDSP6_ARCH__", "2");
3563    }
3564  }
3565  else if(CPU == "hexagonv3") {
3566    Builder.defineMacro("__HEXAGON_V3__");
3567    Builder.defineMacro("__HEXAGON_ARCH__", "3");
3568    if(Opts.HexagonQdsp6Compat) {
3569      Builder.defineMacro("__QDSP6_V3__");
3570      Builder.defineMacro("__QDSP6_ARCH__", "3");
3571    }
3572  }
3573  else if(CPU == "hexagonv4") {
3574    Builder.defineMacro("__HEXAGON_V4__");
3575    Builder.defineMacro("__HEXAGON_ARCH__", "4");
3576    if(Opts.HexagonQdsp6Compat) {
3577      Builder.defineMacro("__QDSP6_V4__");
3578      Builder.defineMacro("__QDSP6_ARCH__", "4");
3579    }
3580  }
3581  else if(CPU == "hexagonv5") {
3582    Builder.defineMacro("__HEXAGON_V5__");
3583    Builder.defineMacro("__HEXAGON_ARCH__", "5");
3584    if(Opts.HexagonQdsp6Compat) {
3585      Builder.defineMacro("__QDSP6_V5__");
3586      Builder.defineMacro("__QDSP6_ARCH__", "5");
3587    }
3588  }
3589}
3590
3591const char * const HexagonTargetInfo::GCCRegNames[] = {
3592  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3593  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3594  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3595  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3596  "p0", "p1", "p2", "p3",
3597  "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3598};
3599
3600void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3601                                   unsigned &NumNames) const {
3602  Names = GCCRegNames;
3603  NumNames = llvm::array_lengthof(GCCRegNames);
3604}
3605
3606
3607const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3608  { { "sp" }, "r29" },
3609  { { "fp" }, "r30" },
3610  { { "lr" }, "r31" },
3611 };
3612
3613void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3614                                     unsigned &NumAliases) const {
3615  Aliases = GCCRegAliases;
3616  NumAliases = llvm::array_lengthof(GCCRegAliases);
3617}
3618
3619
3620const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3621#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3622#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3623                                              ALL_LANGUAGES },
3624#include "clang/Basic/BuiltinsHexagon.def"
3625};
3626}
3627
3628
3629namespace {
3630class SparcV8TargetInfo : public TargetInfo {
3631  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3632  static const char * const GCCRegNames[];
3633  bool SoftFloat;
3634public:
3635  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3636    // FIXME: Support Sparc quad-precision long double?
3637    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3638                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3639  }
3640  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3641                                 StringRef Name,
3642                                 bool Enabled) const {
3643    if (Name == "soft-float")
3644      Features[Name] = Enabled;
3645    else
3646      return false;
3647
3648    return true;
3649  }
3650  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3651    SoftFloat = false;
3652    for (unsigned i = 0, e = Features.size(); i != e; ++i)
3653      if (Features[i] == "+soft-float")
3654        SoftFloat = true;
3655  }
3656  virtual void getTargetDefines(const LangOptions &Opts,
3657                                MacroBuilder &Builder) const {
3658    DefineStd(Builder, "sparc", Opts);
3659    Builder.defineMacro("__sparcv8");
3660    Builder.defineMacro("__REGISTER_PREFIX__", "");
3661
3662    if (SoftFloat)
3663      Builder.defineMacro("SOFT_FLOAT", "1");
3664  }
3665
3666  virtual bool hasFeature(StringRef Feature) const {
3667    return llvm::StringSwitch<bool>(Feature)
3668             .Case("softfloat", SoftFloat)
3669             .Case("sparc", true)
3670             .Default(false);
3671  }
3672
3673  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3674                                 unsigned &NumRecords) const {
3675    // FIXME: Implement!
3676  }
3677  virtual BuiltinVaListKind getBuiltinVaListKind() const {
3678    return TargetInfo::VoidPtrBuiltinVaList;
3679  }
3680  virtual void getGCCRegNames(const char * const *&Names,
3681                              unsigned &NumNames) const;
3682  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3683                                unsigned &NumAliases) const;
3684  virtual bool validateAsmConstraint(const char *&Name,
3685                                     TargetInfo::ConstraintInfo &info) const {
3686    // FIXME: Implement!
3687    return false;
3688  }
3689  virtual const char *getClobbers() const {
3690    // FIXME: Implement!
3691    return "";
3692  }
3693};
3694
3695const char * const SparcV8TargetInfo::GCCRegNames[] = {
3696  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3697  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3698  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3699  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3700};
3701
3702void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3703                                       unsigned &NumNames) const {
3704  Names = GCCRegNames;
3705  NumNames = llvm::array_lengthof(GCCRegNames);
3706}
3707
3708const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3709  { { "g0" }, "r0" },
3710  { { "g1" }, "r1" },
3711  { { "g2" }, "r2" },
3712  { { "g3" }, "r3" },
3713  { { "g4" }, "r4" },
3714  { { "g5" }, "r5" },
3715  { { "g6" }, "r6" },
3716  { { "g7" }, "r7" },
3717  { { "o0" }, "r8" },
3718  { { "o1" }, "r9" },
3719  { { "o2" }, "r10" },
3720  { { "o3" }, "r11" },
3721  { { "o4" }, "r12" },
3722  { { "o5" }, "r13" },
3723  { { "o6", "sp" }, "r14" },
3724  { { "o7" }, "r15" },
3725  { { "l0" }, "r16" },
3726  { { "l1" }, "r17" },
3727  { { "l2" }, "r18" },
3728  { { "l3" }, "r19" },
3729  { { "l4" }, "r20" },
3730  { { "l5" }, "r21" },
3731  { { "l6" }, "r22" },
3732  { { "l7" }, "r23" },
3733  { { "i0" }, "r24" },
3734  { { "i1" }, "r25" },
3735  { { "i2" }, "r26" },
3736  { { "i3" }, "r27" },
3737  { { "i4" }, "r28" },
3738  { { "i5" }, "r29" },
3739  { { "i6", "fp" }, "r30" },
3740  { { "i7" }, "r31" },
3741};
3742
3743void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3744                                         unsigned &NumAliases) const {
3745  Aliases = GCCRegAliases;
3746  NumAliases = llvm::array_lengthof(GCCRegAliases);
3747}
3748} // end anonymous namespace.
3749
3750namespace {
3751class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3752public:
3753  AuroraUXSparcV8TargetInfo(const std::string& triple) :
3754      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3755    SizeType = UnsignedInt;
3756    PtrDiffType = SignedInt;
3757  }
3758};
3759class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3760public:
3761  SolarisSparcV8TargetInfo(const std::string& triple) :
3762      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3763    SizeType = UnsignedInt;
3764    PtrDiffType = SignedInt;
3765  }
3766};
3767} // end anonymous namespace.
3768
3769namespace {
3770  class MSP430TargetInfo : public TargetInfo {
3771    static const char * const GCCRegNames[];
3772  public:
3773    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3774      BigEndian = false;
3775      TLSSupported = false;
3776      IntWidth = 16; IntAlign = 16;
3777      LongWidth = 32; LongLongWidth = 64;
3778      LongAlign = LongLongAlign = 16;
3779      PointerWidth = 16; PointerAlign = 16;
3780      SuitableAlign = 16;
3781      SizeType = UnsignedInt;
3782      IntMaxType = SignedLong;
3783      UIntMaxType = UnsignedLong;
3784      IntPtrType = SignedShort;
3785      PtrDiffType = SignedInt;
3786      SigAtomicType = SignedLong;
3787      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3788   }
3789    virtual void getTargetDefines(const LangOptions &Opts,
3790                                  MacroBuilder &Builder) const {
3791      Builder.defineMacro("MSP430");
3792      Builder.defineMacro("__MSP430__");
3793      // FIXME: defines for different 'flavours' of MCU
3794    }
3795    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3796                                   unsigned &NumRecords) const {
3797     // FIXME: Implement.
3798      Records = 0;
3799      NumRecords = 0;
3800    }
3801    virtual bool hasFeature(StringRef Feature) const {
3802      return Feature == "msp430";
3803    }
3804    virtual void getGCCRegNames(const char * const *&Names,
3805                                unsigned &NumNames) const;
3806    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3807                                  unsigned &NumAliases) const {
3808      // No aliases.
3809      Aliases = 0;
3810      NumAliases = 0;
3811    }
3812    virtual bool validateAsmConstraint(const char *&Name,
3813                                       TargetInfo::ConstraintInfo &info) const {
3814      // No target constraints for now.
3815      return false;
3816    }
3817    virtual const char *getClobbers() const {
3818      // FIXME: Is this really right?
3819      return "";
3820    }
3821    virtual BuiltinVaListKind getBuiltinVaListKind() const {
3822      // FIXME: implement
3823      return TargetInfo::CharPtrBuiltinVaList;
3824   }
3825  };
3826
3827  const char * const MSP430TargetInfo::GCCRegNames[] = {
3828    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3829    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3830  };
3831
3832  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3833                                        unsigned &NumNames) const {
3834    Names = GCCRegNames;
3835    NumNames = llvm::array_lengthof(GCCRegNames);
3836  }
3837}
3838
3839namespace {
3840
3841  // LLVM and Clang cannot be used directly to output native binaries for
3842  // target, but is used to compile C code to llvm bitcode with correct
3843  // type and alignment information.
3844  //
3845  // TCE uses the llvm bitcode as input and uses it for generating customized
3846  // target processor and program binary. TCE co-design environment is
3847  // publicly available in http://tce.cs.tut.fi
3848
3849  static const unsigned TCEOpenCLAddrSpaceMap[] = {
3850      3, // opencl_global
3851      4, // opencl_local
3852      5, // opencl_constant
3853      0, // cuda_device
3854      0, // cuda_constant
3855      0  // cuda_shared
3856  };
3857
3858  class TCETargetInfo : public TargetInfo{
3859  public:
3860    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3861      TLSSupported = false;
3862      IntWidth = 32;
3863      LongWidth = LongLongWidth = 32;
3864      PointerWidth = 32;
3865      IntAlign = 32;
3866      LongAlign = LongLongAlign = 32;
3867      PointerAlign = 32;
3868      SuitableAlign = 32;
3869      SizeType = UnsignedInt;
3870      IntMaxType = SignedLong;
3871      UIntMaxType = UnsignedLong;
3872      IntPtrType = SignedInt;
3873      PtrDiffType = SignedInt;
3874      FloatWidth = 32;
3875      FloatAlign = 32;
3876      DoubleWidth = 32;
3877      DoubleAlign = 32;
3878      LongDoubleWidth = 32;
3879      LongDoubleAlign = 32;
3880      FloatFormat = &llvm::APFloat::IEEEsingle;
3881      DoubleFormat = &llvm::APFloat::IEEEsingle;
3882      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3883      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3884                          "i16:16:32-i32:32:32-i64:32:32-"
3885                          "f32:32:32-f64:32:32-v64:32:32-"
3886                          "v128:32:32-a0:0:32-n32";
3887      AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3888    }
3889
3890    virtual void getTargetDefines(const LangOptions &Opts,
3891                                  MacroBuilder &Builder) const {
3892      DefineStd(Builder, "tce", Opts);
3893      Builder.defineMacro("__TCE__");
3894      Builder.defineMacro("__TCE_V1__");
3895    }
3896    virtual bool hasFeature(StringRef Feature) const {
3897      return Feature == "tce";
3898    }
3899
3900    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3901                                   unsigned &NumRecords) const {}
3902    virtual const char *getClobbers() const {
3903      return "";
3904    }
3905    virtual BuiltinVaListKind getBuiltinVaListKind() const {
3906      return TargetInfo::VoidPtrBuiltinVaList;
3907    }
3908    virtual void getGCCRegNames(const char * const *&Names,
3909                                unsigned &NumNames) const {}
3910    virtual bool validateAsmConstraint(const char *&Name,
3911                                       TargetInfo::ConstraintInfo &info) const {
3912      return true;
3913    }
3914    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3915                                  unsigned &NumAliases) const {}
3916  };
3917}
3918
3919namespace {
3920class MipsTargetInfoBase : public TargetInfo {
3921  static const Builtin::Info BuiltinInfo[];
3922  std::string CPU;
3923  bool IsMips16;
3924  enum MipsFloatABI {
3925    HardFloat, SingleFloat, SoftFloat
3926  } FloatABI;
3927  enum DspRevEnum {
3928    NoDSP, DSP1, DSP2
3929  } DspRev;
3930
3931protected:
3932  std::string ABI;
3933
3934public:
3935  MipsTargetInfoBase(const std::string& triple,
3936                     const std::string& ABIStr,
3937                     const std::string& CPUStr)
3938    : TargetInfo(triple),
3939      CPU(CPUStr),
3940      IsMips16(false),
3941      FloatABI(HardFloat),
3942      DspRev(NoDSP),
3943      ABI(ABIStr)
3944  {}
3945
3946  virtual const char *getABI() const { return ABI.c_str(); }
3947  virtual bool setABI(const std::string &Name) = 0;
3948  virtual bool setCPU(const std::string &Name) {
3949    CPU = Name;
3950    return true;
3951  }
3952  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3953    Features[ABI] = true;
3954    Features[CPU] = true;
3955  }
3956
3957  virtual void getTargetDefines(const LangOptions &Opts,
3958                                MacroBuilder &Builder) const {
3959    DefineStd(Builder, "mips", Opts);
3960    Builder.defineMacro("_mips");
3961    Builder.defineMacro("__REGISTER_PREFIX__", "");
3962
3963    switch (FloatABI) {
3964    case HardFloat:
3965      Builder.defineMacro("__mips_hard_float", Twine(1));
3966      break;
3967    case SingleFloat:
3968      Builder.defineMacro("__mips_hard_float", Twine(1));
3969      Builder.defineMacro("__mips_single_float", Twine(1));
3970      break;
3971    case SoftFloat:
3972      Builder.defineMacro("__mips_soft_float", Twine(1));
3973      break;
3974    }
3975
3976    if (IsMips16)
3977      Builder.defineMacro("__mips16", Twine(1));
3978
3979    switch (DspRev) {
3980    default:
3981      break;
3982    case DSP1:
3983      Builder.defineMacro("__mips_dsp_rev", Twine(1));
3984      Builder.defineMacro("__mips_dsp", Twine(1));
3985      break;
3986    case DSP2:
3987      Builder.defineMacro("__mips_dsp_rev", Twine(2));
3988      Builder.defineMacro("__mips_dspr2", Twine(1));
3989      Builder.defineMacro("__mips_dsp", Twine(1));
3990      break;
3991    }
3992
3993    Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
3994    Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
3995    Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
3996
3997    Builder.defineMacro("_MIPS_ARCH", "\"" + CPU + "\"");
3998    Builder.defineMacro("_MIPS_ARCH_" + StringRef(CPU).upper());
3999  }
4000
4001  virtual void getTargetBuiltins(const Builtin::Info *&Records,
4002                                 unsigned &NumRecords) const {
4003    Records = BuiltinInfo;
4004    NumRecords = clang::Mips::LastTSBuiltin - Builtin::FirstTSBuiltin;
4005  }
4006  virtual bool hasFeature(StringRef Feature) const {
4007    return Feature == "mips";
4008  }
4009  virtual BuiltinVaListKind getBuiltinVaListKind() const {
4010    return TargetInfo::VoidPtrBuiltinVaList;
4011  }
4012  virtual void getGCCRegNames(const char * const *&Names,
4013                              unsigned &NumNames) const {
4014    static const char * const GCCRegNames[] = {
4015      // CPU register names
4016      // Must match second column of GCCRegAliases
4017      "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
4018      "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
4019      "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
4020      "$24",  "$25",  "$26",  "$27",  "$28",  "$29",  "$30",  "$31",
4021      // Floating point register names
4022      "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
4023      "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
4024      "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
4025      "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
4026      // Hi/lo and condition register names
4027      "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
4028      "$fcc5","$fcc6","$fcc7"
4029    };
4030    Names = GCCRegNames;
4031    NumNames = llvm::array_lengthof(GCCRegNames);
4032  }
4033  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4034                                unsigned &NumAliases) const = 0;
4035  virtual bool validateAsmConstraint(const char *&Name,
4036                                     TargetInfo::ConstraintInfo &Info) const {
4037    switch (*Name) {
4038    default:
4039      return false;
4040
4041    case 'r': // CPU registers.
4042    case 'd': // Equivalent to "r" unless generating MIPS16 code.
4043    case 'y': // Equivalent to "r", backwards compatibility only.
4044    case 'f': // floating-point registers.
4045    case 'c': // $25 for indirect jumps
4046    case 'l': // lo register
4047    case 'x': // hilo register pair
4048      Info.setAllowsRegister();
4049      return true;
4050    }
4051  }
4052
4053  virtual const char *getClobbers() const {
4054    // FIXME: Implement!
4055    return "";
4056  }
4057
4058  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
4059                                 StringRef Name,
4060                                 bool Enabled) const {
4061    if (Name == "soft-float" || Name == "single-float" ||
4062        Name == "o32" || Name == "n32" || Name == "n64" || Name == "eabi" ||
4063        Name == "mips32" || Name == "mips32r2" ||
4064        Name == "mips64" || Name == "mips64r2" ||
4065        Name == "mips16" || Name == "dsp" || Name == "dspr2") {
4066      Features[Name] = Enabled;
4067      return true;
4068    }
4069    return false;
4070  }
4071
4072  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
4073    IsMips16 = false;
4074    FloatABI = HardFloat;
4075    DspRev = NoDSP;
4076
4077    for (std::vector<std::string>::iterator it = Features.begin(),
4078         ie = Features.end(); it != ie; ++it) {
4079      if (*it == "+single-float")
4080        FloatABI = SingleFloat;
4081      else if (*it == "+soft-float")
4082        FloatABI = SoftFloat;
4083      else if (*it == "+mips16")
4084        IsMips16 = true;
4085      else if (*it == "+dsp")
4086        DspRev = std::max(DspRev, DSP1);
4087      else if (*it == "+dspr2")
4088        DspRev = std::max(DspRev, DSP2);
4089    }
4090
4091    // Remove front-end specific option.
4092    std::vector<std::string>::iterator it =
4093      std::find(Features.begin(), Features.end(), "+soft-float");
4094    if (it != Features.end())
4095      Features.erase(it);
4096  }
4097};
4098
4099const Builtin::Info MipsTargetInfoBase::BuiltinInfo[] = {
4100#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
4101#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
4102                                              ALL_LANGUAGES },
4103#include "clang/Basic/BuiltinsMips.def"
4104};
4105
4106class Mips32TargetInfoBase : public MipsTargetInfoBase {
4107public:
4108  Mips32TargetInfoBase(const std::string& triple) :
4109    MipsTargetInfoBase(triple, "o32", "mips32") {
4110    SizeType = UnsignedInt;
4111    PtrDiffType = SignedInt;
4112  }
4113  virtual bool setABI(const std::string &Name) {
4114    if ((Name == "o32") || (Name == "eabi")) {
4115      ABI = Name;
4116      return true;
4117    } else
4118      return false;
4119  }
4120  virtual void getTargetDefines(const LangOptions &Opts,
4121                                MacroBuilder &Builder) const {
4122    MipsTargetInfoBase::getTargetDefines(Opts, Builder);
4123
4124    if (ABI == "o32") {
4125      Builder.defineMacro("__mips_o32");
4126      Builder.defineMacro("_ABIO32", "1");
4127      Builder.defineMacro("_MIPS_SIM", "_ABIO32");
4128    }
4129    else if (ABI == "eabi")
4130      Builder.defineMacro("__mips_eabi");
4131    else
4132      llvm_unreachable("Invalid ABI for Mips32.");
4133  }
4134  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4135                                unsigned &NumAliases) const {
4136    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
4137      { { "at" },  "$1" },
4138      { { "v0" },  "$2" },
4139      { { "v1" },  "$3" },
4140      { { "a0" },  "$4" },
4141      { { "a1" },  "$5" },
4142      { { "a2" },  "$6" },
4143      { { "a3" },  "$7" },
4144      { { "t0" },  "$8" },
4145      { { "t1" },  "$9" },
4146      { { "t2" }, "$10" },
4147      { { "t3" }, "$11" },
4148      { { "t4" }, "$12" },
4149      { { "t5" }, "$13" },
4150      { { "t6" }, "$14" },
4151      { { "t7" }, "$15" },
4152      { { "s0" }, "$16" },
4153      { { "s1" }, "$17" },
4154      { { "s2" }, "$18" },
4155      { { "s3" }, "$19" },
4156      { { "s4" }, "$20" },
4157      { { "s5" }, "$21" },
4158      { { "s6" }, "$22" },
4159      { { "s7" }, "$23" },
4160      { { "t8" }, "$24" },
4161      { { "t9" }, "$25" },
4162      { { "k0" }, "$26" },
4163      { { "k1" }, "$27" },
4164      { { "gp" }, "$28" },
4165      { { "sp","$sp" }, "$29" },
4166      { { "fp","$fp" }, "$30" },
4167      { { "ra" }, "$31" }
4168    };
4169    Aliases = GCCRegAliases;
4170    NumAliases = llvm::array_lengthof(GCCRegAliases);
4171  }
4172};
4173
4174class Mips32EBTargetInfo : public Mips32TargetInfoBase {
4175public:
4176  Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
4177    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4178                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
4179  }
4180  virtual void getTargetDefines(const LangOptions &Opts,
4181                                MacroBuilder &Builder) const {
4182    DefineStd(Builder, "MIPSEB", Opts);
4183    Builder.defineMacro("_MIPSEB");
4184    Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
4185  }
4186};
4187
4188class Mips32ELTargetInfo : public Mips32TargetInfoBase {
4189public:
4190  Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
4191    BigEndian = false;
4192    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4193                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
4194  }
4195  virtual void getTargetDefines(const LangOptions &Opts,
4196                                MacroBuilder &Builder) const {
4197    DefineStd(Builder, "MIPSEL", Opts);
4198    Builder.defineMacro("_MIPSEL");
4199    Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
4200  }
4201};
4202
4203class Mips64TargetInfoBase : public MipsTargetInfoBase {
4204  virtual void SetDescriptionString(const std::string &Name) = 0;
4205public:
4206  Mips64TargetInfoBase(const std::string& triple) :
4207    MipsTargetInfoBase(triple, "n64", "mips64") {
4208    LongWidth = LongAlign = 64;
4209    PointerWidth = PointerAlign = 64;
4210    LongDoubleWidth = LongDoubleAlign = 128;
4211    LongDoubleFormat = &llvm::APFloat::IEEEquad;
4212    SuitableAlign = 128;
4213  }
4214  virtual bool setABI(const std::string &Name) {
4215    SetDescriptionString(Name);
4216
4217    if (Name != "n32" && Name != "n64")
4218      return false;
4219
4220    ABI = Name;
4221
4222    if (Name == "n32") {
4223      LongWidth = LongAlign = 32;
4224      PointerWidth = PointerAlign = 32;
4225    }
4226
4227    return true;
4228  }
4229  virtual void getTargetDefines(const LangOptions &Opts,
4230                                MacroBuilder &Builder) const {
4231    MipsTargetInfoBase::getTargetDefines(Opts, Builder);
4232
4233    Builder.defineMacro("__mips64");
4234    Builder.defineMacro("__mips64__");
4235
4236    if (ABI == "n32") {
4237      Builder.defineMacro("__mips_n32");
4238      Builder.defineMacro("_ABIN32", "2");
4239      Builder.defineMacro("_MIPS_SIM", "_ABIN32");
4240    }
4241    else if (ABI == "n64") {
4242      Builder.defineMacro("__mips_n64");
4243      Builder.defineMacro("_ABI64", "3");
4244      Builder.defineMacro("_MIPS_SIM", "_ABI64");
4245    }
4246    else
4247      llvm_unreachable("Invalid ABI for Mips64.");
4248  }
4249  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4250                                unsigned &NumAliases) const {
4251    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
4252      { { "at" },  "$1" },
4253      { { "v0" },  "$2" },
4254      { { "v1" },  "$3" },
4255      { { "a0" },  "$4" },
4256      { { "a1" },  "$5" },
4257      { { "a2" },  "$6" },
4258      { { "a3" },  "$7" },
4259      { { "a4" },  "$8" },
4260      { { "a5" },  "$9" },
4261      { { "a6" }, "$10" },
4262      { { "a7" }, "$11" },
4263      { { "t0" }, "$12" },
4264      { { "t1" }, "$13" },
4265      { { "t2" }, "$14" },
4266      { { "t3" }, "$15" },
4267      { { "s0" }, "$16" },
4268      { { "s1" }, "$17" },
4269      { { "s2" }, "$18" },
4270      { { "s3" }, "$19" },
4271      { { "s4" }, "$20" },
4272      { { "s5" }, "$21" },
4273      { { "s6" }, "$22" },
4274      { { "s7" }, "$23" },
4275      { { "t8" }, "$24" },
4276      { { "t9" }, "$25" },
4277      { { "k0" }, "$26" },
4278      { { "k1" }, "$27" },
4279      { { "gp" }, "$28" },
4280      { { "sp","$sp" }, "$29" },
4281      { { "fp","$fp" }, "$30" },
4282      { { "ra" }, "$31" }
4283    };
4284    Aliases = GCCRegAliases;
4285    NumAliases = llvm::array_lengthof(GCCRegAliases);
4286  }
4287};
4288
4289class Mips64EBTargetInfo : public Mips64TargetInfoBase {
4290  virtual void SetDescriptionString(const std::string &Name) {
4291    // Change DescriptionString only if ABI is n32.
4292    if (Name == "n32")
4293      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4294                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4295                          "v64:64:64-n32";
4296  }
4297public:
4298  Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
4299    // Default ABI is n64.
4300    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4301                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4302                        "v64:64:64-n32";
4303  }
4304  virtual void getTargetDefines(const LangOptions &Opts,
4305                                MacroBuilder &Builder) const {
4306    DefineStd(Builder, "MIPSEB", Opts);
4307    Builder.defineMacro("_MIPSEB");
4308    Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
4309  }
4310};
4311
4312class Mips64ELTargetInfo : public Mips64TargetInfoBase {
4313  virtual void SetDescriptionString(const std::string &Name) {
4314    // Change DescriptionString only if ABI is n32.
4315    if (Name == "n32")
4316      DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4317                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
4318                          "-v64:64:64-n32";
4319  }
4320public:
4321  Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
4322    // Default ABI is n64.
4323    BigEndian = false;
4324    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4325                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4326                        "v64:64:64-n32";
4327  }
4328  virtual void getTargetDefines(const LangOptions &Opts,
4329                                MacroBuilder &Builder) const {
4330    DefineStd(Builder, "MIPSEL", Opts);
4331    Builder.defineMacro("_MIPSEL");
4332    Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
4333  }
4334};
4335} // end anonymous namespace.
4336
4337namespace {
4338class PNaClTargetInfo : public TargetInfo {
4339public:
4340  PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
4341    BigEndian = false;
4342    this->UserLabelPrefix = "";
4343    this->LongAlign = 32;
4344    this->LongWidth = 32;
4345    this->PointerAlign = 32;
4346    this->PointerWidth = 32;
4347    this->IntMaxType = TargetInfo::SignedLongLong;
4348    this->UIntMaxType = TargetInfo::UnsignedLongLong;
4349    this->Int64Type = TargetInfo::SignedLongLong;
4350    this->DoubleAlign = 64;
4351    this->LongDoubleWidth = 64;
4352    this->LongDoubleAlign = 64;
4353    this->SizeType = TargetInfo::UnsignedInt;
4354    this->PtrDiffType = TargetInfo::SignedInt;
4355    this->IntPtrType = TargetInfo::SignedInt;
4356    this->RegParmMax = 2;
4357    DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
4358                        "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
4359  }
4360
4361  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
4362  }
4363  virtual void getArchDefines(const LangOptions &Opts,
4364                              MacroBuilder &Builder) const {
4365    Builder.defineMacro("__le32__");
4366    Builder.defineMacro("__pnacl__");
4367  }
4368  virtual void getTargetDefines(const LangOptions &Opts,
4369                                MacroBuilder &Builder) const {
4370    Builder.defineMacro("__LITTLE_ENDIAN__");
4371    getArchDefines(Opts, Builder);
4372  }
4373  virtual bool hasFeature(StringRef Feature) const {
4374    return Feature == "pnacl";
4375  }
4376  virtual void getTargetBuiltins(const Builtin::Info *&Records,
4377                                 unsigned &NumRecords) const {
4378  }
4379  virtual BuiltinVaListKind getBuiltinVaListKind() const {
4380    return TargetInfo::PNaClABIBuiltinVaList;
4381  }
4382  virtual void getGCCRegNames(const char * const *&Names,
4383                              unsigned &NumNames) const;
4384  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4385                                unsigned &NumAliases) const;
4386  virtual bool validateAsmConstraint(const char *&Name,
4387                                     TargetInfo::ConstraintInfo &Info) const {
4388    return false;
4389  }
4390
4391  virtual const char *getClobbers() const {
4392    return "";
4393  }
4394};
4395
4396void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
4397                                     unsigned &NumNames) const {
4398  Names = NULL;
4399  NumNames = 0;
4400}
4401
4402void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
4403                                       unsigned &NumAliases) const {
4404  Aliases = NULL;
4405  NumAliases = 0;
4406}
4407} // end anonymous namespace.
4408
4409
4410//===----------------------------------------------------------------------===//
4411// Driver code
4412//===----------------------------------------------------------------------===//
4413
4414static TargetInfo *AllocateTarget(const std::string &T) {
4415  llvm::Triple Triple(T);
4416  llvm::Triple::OSType os = Triple.getOS();
4417
4418  switch (Triple.getArch()) {
4419  default:
4420    return NULL;
4421
4422  case llvm::Triple::hexagon:
4423    return new HexagonTargetInfo(T);
4424
4425  case llvm::Triple::arm:
4426  case llvm::Triple::thumb:
4427    if (Triple.isOSDarwin())
4428      return new DarwinARMTargetInfo(T);
4429
4430    switch (os) {
4431    case llvm::Triple::Linux:
4432      return new LinuxTargetInfo<ARMTargetInfo>(T);
4433    case llvm::Triple::FreeBSD:
4434      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
4435    case llvm::Triple::NetBSD:
4436      return new NetBSDTargetInfo<ARMTargetInfo>(T);
4437    case llvm::Triple::OpenBSD:
4438      return new OpenBSDTargetInfo<ARMTargetInfo>(T);
4439    case llvm::Triple::Bitrig:
4440      return new BitrigTargetInfo<ARMTargetInfo>(T);
4441    case llvm::Triple::RTEMS:
4442      return new RTEMSTargetInfo<ARMTargetInfo>(T);
4443    case llvm::Triple::NativeClient:
4444      return new NaClTargetInfo<ARMTargetInfo>(T);
4445    default:
4446      return new ARMTargetInfo(T);
4447    }
4448
4449  case llvm::Triple::msp430:
4450    return new MSP430TargetInfo(T);
4451
4452  case llvm::Triple::mips:
4453    switch (os) {
4454    case llvm::Triple::Linux:
4455      return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
4456    case llvm::Triple::RTEMS:
4457      return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
4458    case llvm::Triple::FreeBSD:
4459      return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
4460    case llvm::Triple::NetBSD:
4461      return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
4462    default:
4463      return new Mips32EBTargetInfo(T);
4464    }
4465
4466  case llvm::Triple::mipsel:
4467    switch (os) {
4468    case llvm::Triple::Linux:
4469      return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
4470    case llvm::Triple::RTEMS:
4471      return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
4472    case llvm::Triple::FreeBSD:
4473      return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
4474    case llvm::Triple::NetBSD:
4475      return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
4476    default:
4477      return new Mips32ELTargetInfo(T);
4478    }
4479
4480  case llvm::Triple::mips64:
4481    switch (os) {
4482    case llvm::Triple::Linux:
4483      return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
4484    case llvm::Triple::RTEMS:
4485      return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
4486    case llvm::Triple::FreeBSD:
4487      return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
4488    case llvm::Triple::NetBSD:
4489      return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
4490    case llvm::Triple::OpenBSD:
4491      return new OpenBSDTargetInfo<Mips64EBTargetInfo>(T);
4492    default:
4493      return new Mips64EBTargetInfo(T);
4494    }
4495
4496  case llvm::Triple::mips64el:
4497    switch (os) {
4498    case llvm::Triple::Linux:
4499      return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
4500    case llvm::Triple::RTEMS:
4501      return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
4502    case llvm::Triple::FreeBSD:
4503      return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
4504    case llvm::Triple::NetBSD:
4505      return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
4506    case llvm::Triple::OpenBSD:
4507      return new OpenBSDTargetInfo<Mips64ELTargetInfo>(T);
4508    default:
4509      return new Mips64ELTargetInfo(T);
4510    }
4511
4512  case llvm::Triple::le32:
4513    switch (os) {
4514      case llvm::Triple::NativeClient:
4515        return new NaClTargetInfo<PNaClTargetInfo>(T);
4516      default:
4517        return NULL;
4518    }
4519
4520  case llvm::Triple::ppc:
4521    if (Triple.isOSDarwin())
4522      return new DarwinPPC32TargetInfo(T);
4523    switch (os) {
4524    case llvm::Triple::Linux:
4525      return new LinuxTargetInfo<PPC32TargetInfo>(T);
4526    case llvm::Triple::FreeBSD:
4527      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
4528    case llvm::Triple::NetBSD:
4529      return new NetBSDTargetInfo<PPC32TargetInfo>(T);
4530    case llvm::Triple::OpenBSD:
4531      return new OpenBSDTargetInfo<PPC32TargetInfo>(T);
4532    case llvm::Triple::RTEMS:
4533      return new RTEMSTargetInfo<PPC32TargetInfo>(T);
4534    default:
4535      return new PPC32TargetInfo(T);
4536    }
4537
4538  case llvm::Triple::ppc64:
4539    if (Triple.isOSDarwin())
4540      return new DarwinPPC64TargetInfo(T);
4541    switch (os) {
4542    case llvm::Triple::Linux:
4543      return new LinuxTargetInfo<PPC64TargetInfo>(T);
4544    case llvm::Triple::Lv2:
4545      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
4546    case llvm::Triple::FreeBSD:
4547      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
4548    case llvm::Triple::NetBSD:
4549      return new NetBSDTargetInfo<PPC64TargetInfo>(T);
4550    default:
4551      return new PPC64TargetInfo(T);
4552    }
4553
4554  case llvm::Triple::nvptx:
4555    return new NVPTX32TargetInfo(T);
4556  case llvm::Triple::nvptx64:
4557    return new NVPTX64TargetInfo(T);
4558
4559  case llvm::Triple::mblaze:
4560    return new MBlazeTargetInfo(T);
4561
4562  case llvm::Triple::r600:
4563    return new R600TargetInfo(T);
4564
4565  case llvm::Triple::sparc:
4566    switch (os) {
4567    case llvm::Triple::Linux:
4568      return new LinuxTargetInfo<SparcV8TargetInfo>(T);
4569    case llvm::Triple::AuroraUX:
4570      return new AuroraUXSparcV8TargetInfo(T);
4571    case llvm::Triple::Solaris:
4572      return new SolarisSparcV8TargetInfo(T);
4573    case llvm::Triple::NetBSD:
4574      return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
4575    case llvm::Triple::OpenBSD:
4576      return new OpenBSDTargetInfo<SparcV8TargetInfo>(T);
4577    case llvm::Triple::RTEMS:
4578      return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
4579    default:
4580      return new SparcV8TargetInfo(T);
4581    }
4582
4583  // FIXME: Need a real SPU target.
4584  case llvm::Triple::cellspu:
4585    return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
4586
4587  case llvm::Triple::tce:
4588    return new TCETargetInfo(T);
4589
4590  case llvm::Triple::x86:
4591    if (Triple.isOSDarwin())
4592      return new DarwinI386TargetInfo(T);
4593
4594    switch (os) {
4595    case llvm::Triple::AuroraUX:
4596      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
4597    case llvm::Triple::Linux:
4598      return new LinuxTargetInfo<X86_32TargetInfo>(T);
4599    case llvm::Triple::DragonFly:
4600      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
4601    case llvm::Triple::NetBSD:
4602      return new NetBSDI386TargetInfo(T);
4603    case llvm::Triple::OpenBSD:
4604      return new OpenBSDI386TargetInfo(T);
4605    case llvm::Triple::Bitrig:
4606      return new BitrigI386TargetInfo(T);
4607    case llvm::Triple::FreeBSD:
4608      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
4609    case llvm::Triple::Minix:
4610      return new MinixTargetInfo<X86_32TargetInfo>(T);
4611    case llvm::Triple::Solaris:
4612      return new SolarisTargetInfo<X86_32TargetInfo>(T);
4613    case llvm::Triple::Cygwin:
4614      return new CygwinX86_32TargetInfo(T);
4615    case llvm::Triple::MinGW32:
4616      return new MinGWX86_32TargetInfo(T);
4617    case llvm::Triple::Win32:
4618      return new VisualStudioWindowsX86_32TargetInfo(T);
4619    case llvm::Triple::Haiku:
4620      return new HaikuX86_32TargetInfo(T);
4621    case llvm::Triple::RTEMS:
4622      return new RTEMSX86_32TargetInfo(T);
4623    case llvm::Triple::NativeClient:
4624      return new NaClTargetInfo<X86_32TargetInfo>(T);
4625    default:
4626      return new X86_32TargetInfo(T);
4627    }
4628
4629  case llvm::Triple::x86_64:
4630    if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
4631      return new DarwinX86_64TargetInfo(T);
4632
4633    switch (os) {
4634    case llvm::Triple::AuroraUX:
4635      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
4636    case llvm::Triple::Linux:
4637      return new LinuxTargetInfo<X86_64TargetInfo>(T);
4638    case llvm::Triple::DragonFly:
4639      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
4640    case llvm::Triple::NetBSD:
4641      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
4642    case llvm::Triple::OpenBSD:
4643      return new OpenBSDX86_64TargetInfo(T);
4644    case llvm::Triple::Bitrig:
4645      return new BitrigX86_64TargetInfo(T);
4646    case llvm::Triple::FreeBSD:
4647      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
4648    case llvm::Triple::Solaris:
4649      return new SolarisTargetInfo<X86_64TargetInfo>(T);
4650    case llvm::Triple::MinGW32:
4651      return new MinGWX86_64TargetInfo(T);
4652    case llvm::Triple::Win32:   // This is what Triple.h supports now.
4653      return new VisualStudioWindowsX86_64TargetInfo(T);
4654    case llvm::Triple::NativeClient:
4655      return new NaClTargetInfo<X86_64TargetInfo>(T);
4656    default:
4657      return new X86_64TargetInfo(T);
4658    }
4659  }
4660}
4661
4662/// CreateTargetInfo - Return the target info object for the specified target
4663/// triple.
4664TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
4665                                         TargetOptions &Opts) {
4666  llvm::Triple Triple(Opts.Triple);
4667
4668  // Construct the target
4669  OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
4670  if (!Target) {
4671    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
4672    return 0;
4673  }
4674  Target->setTargetOpts(Opts);
4675
4676  // Set the target CPU if specified.
4677  if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
4678    Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
4679    return 0;
4680  }
4681
4682  // Set the target ABI if specified.
4683  if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
4684    Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
4685    return 0;
4686  }
4687
4688  // Set the target C++ ABI.
4689  if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
4690    Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
4691    return 0;
4692  }
4693
4694  // Compute the default target features, we need the target to handle this
4695  // because features may have dependencies on one another.
4696  llvm::StringMap<bool> Features;
4697  Target->getDefaultFeatures(Features);
4698
4699  // Apply the user specified deltas.
4700  // First the enables.
4701  for (std::vector<std::string>::const_iterator
4702         it = Opts.FeaturesAsWritten.begin(),
4703         ie = Opts.FeaturesAsWritten.end();
4704       it != ie; ++it) {
4705    const char *Name = it->c_str();
4706
4707    if (Name[0] != '+')
4708      continue;
4709
4710    // Apply the feature via the target.
4711    if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
4712      Diags.Report(diag::err_target_invalid_feature) << Name;
4713      return 0;
4714    }
4715  }
4716
4717  // Then the disables.
4718  for (std::vector<std::string>::const_iterator
4719         it = Opts.FeaturesAsWritten.begin(),
4720         ie = Opts.FeaturesAsWritten.end();
4721       it != ie; ++it) {
4722    const char *Name = it->c_str();
4723
4724    if (Name[0] == '+')
4725      continue;
4726
4727    // Apply the feature via the target.
4728    if (Name[0] != '-' ||
4729        !Target->setFeatureEnabled(Features, Name + 1, false)) {
4730      Diags.Report(diag::err_target_invalid_feature) << Name;
4731      return 0;
4732    }
4733  }
4734
4735  // Add the features to the compile options.
4736  //
4737  // FIXME: If we are completely confident that we have the right set, we only
4738  // need to pass the minuses.
4739  Opts.Features.clear();
4740  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
4741         ie = Features.end(); it != ie; ++it)
4742    Opts.Features.push_back((it->second ? "+" : "-") + it->first().str());
4743  Target->HandleTargetFeatures(Opts.Features);
4744
4745  return Target.take();
4746}
4747