Targets.cpp revision fd5a4122b358348167894347f68214b0210004a0 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/AST/Builtins.h"
16#include "clang/AST/TargetBuiltins.h"
17#include "clang/Basic/TargetInfo.h"
18#include "llvm/ADT/STLExtras.h"
19#include "llvm/ADT/APFloat.h"
20
21using namespace clang;
22
23//===----------------------------------------------------------------------===//
24//  Common code shared among targets.
25//===----------------------------------------------------------------------===//
26
27static void Define(std::vector<char> &Buf, const char *Macro,
28                   const char *Val = "1") {
29  const char *Def = "#define ";
30  Buf.insert(Buf.end(), Def, Def+strlen(Def));
31  Buf.insert(Buf.end(), Macro, Macro+strlen(Macro));
32  Buf.push_back(' ');
33  Buf.insert(Buf.end(), Val, Val+strlen(Val));
34  Buf.push_back('\n');
35}
36
37static void getSolarisDefines(std::vector<char> &Defs) {
38  Define(Defs, "__SUN__");
39  Define(Defs, "__SOLARIS__");
40}
41
42static void getDarwinDefines(std::vector<char> &Defs) {
43  Define(Defs, "__APPLE__");
44  Define(Defs, "__MACH__");
45
46  if (0)  // darwin_pascal_strings
47    Define(Defs, "__PASCAL_STRINGS__");
48}
49
50/// getPowerPCDefines - Return a set of the PowerPC-specific #defines that are
51/// not tied to a specific subtarget.
52static void getPowerPCDefines(std::vector<char> &Defs, bool is64Bit) {
53  // Target identification.
54  Define(Defs, "__ppc__");
55  Define(Defs, "_ARCH_PPC");
56  Define(Defs, "__POWERPC__");
57  if (is64Bit) {
58    Define(Defs, "_ARCH_PPC64");
59    Define(Defs, "_LP64");
60    Define(Defs, "__LP64__");
61    Define(Defs, "__ppc64__");
62  } else {
63    Define(Defs, "__ppc__");
64  }
65
66  // Target properties.
67  Define(Defs, "_BIG_ENDIAN");
68  Define(Defs, "__BIG_ENDIAN__");
69
70  if (is64Bit) {
71    Define(Defs, "__INTMAX_MAX__", "9223372036854775807L");
72    Define(Defs, "__INTMAX_TYPE__", "long int");
73    Define(Defs, "__LONG_MAX__", "9223372036854775807L");
74    Define(Defs, "__PTRDIFF_TYPE__", "long int");
75    Define(Defs, "__UINTMAX_TYPE__", "long unsigned int");
76  } else {
77    Define(Defs, "__INTMAX_MAX__", "9223372036854775807LL");
78    Define(Defs, "__INTMAX_TYPE__", "long long int");
79    Define(Defs, "__LONG_MAX__", "2147483647L");
80    Define(Defs, "__PTRDIFF_TYPE__", "int");
81    Define(Defs, "__UINTMAX_TYPE__", "long long unsigned int");
82  }
83  Define(Defs, "__INT_MAX__", "2147483647");
84  Define(Defs, "__LONG_LONG_MAX__", "9223372036854775807LL");
85  Define(Defs, "__CHAR_BIT__", "8");
86  Define(Defs, "__SCHAR_MAX__", "127");
87  Define(Defs, "__SHRT_MAX__", "32767");
88  Define(Defs, "__SIZE_TYPE__", "long unsigned int");
89
90  // Subtarget options.
91  Define(Defs, "__USER_LABEL_PREFIX__", "_");
92  Define(Defs, "__NATURAL_ALIGNMENT__");
93  Define(Defs, "__REGISTER_PREFIX__", "");
94
95  Define(Defs, "__WCHAR_MAX__", "2147483647");
96  Define(Defs, "__WCHAR_TYPE__", "int");
97  Define(Defs, "__WINT_TYPE__", "int");
98
99  // Float macros.
100  Define(Defs, "__FLT_DENORM_MIN__", "1.40129846e-45F");
101  Define(Defs, "__FLT_DIG__", "6");
102  Define(Defs, "__FLT_EPSILON__", "1.19209290e-7F");
103  Define(Defs, "__FLT_EVAL_METHOD__", "0");
104  Define(Defs, "__FLT_HAS_INFINITY__");
105  Define(Defs, "__FLT_HAS_QUIET_NAN__");
106  Define(Defs, "__FLT_MANT_DIG__", "24");
107  Define(Defs, "__FLT_MAX_10_EXP__", "38");
108  Define(Defs, "__FLT_MAX_EXP__", "128");
109  Define(Defs, "__FLT_MAX__", "3.40282347e+38F");
110  Define(Defs, "__FLT_MIN_10_EXP__", "(-37)");
111  Define(Defs, "__FLT_MIN_EXP__", "(-125)");
112  Define(Defs, "__FLT_MIN__", "1.17549435e-38F");
113  Define(Defs, "__FLT_RADIX__", "2");
114
115  // double macros.
116  Define(Defs, "__DBL_DENORM_MIN__", "4.9406564584124654e-324");
117  Define(Defs, "__DBL_DIG__", "15");
118  Define(Defs, "__DBL_EPSILON__", "2.2204460492503131e-16");
119  Define(Defs, "__DBL_HAS_INFINITY__");
120  Define(Defs, "__DBL_HAS_QUIET_NAN__");
121  Define(Defs, "__DBL_MANT_DIG__", "53");
122  Define(Defs, "__DBL_MAX_10_EXP__", "308");
123  Define(Defs, "__DBL_MAX_EXP__", "1024");
124  Define(Defs, "__DBL_MAX__", "1.7976931348623157e+308");
125  Define(Defs, "__DBL_MIN_10_EXP__", "(-307)");
126  Define(Defs, "__DBL_MIN_EXP__", "(-1021)");
127  Define(Defs, "__DBL_MIN__", "2.2250738585072014e-308");
128  Define(Defs, "__DECIMAL_DIG__", "33");
129
130  // 128-bit long double macros.
131  Define(Defs, "__LDBL_DENORM_MIN__",
132         "4.94065645841246544176568792868221e-324L");
133  Define(Defs, "__LDBL_DIG__", "31");
134  Define(Defs, "__LDBL_EPSILON__",
135         "4.94065645841246544176568792868221e-324L");
136  Define(Defs, "__LDBL_HAS_INFINITY__");
137  Define(Defs, "__LDBL_HAS_QUIET_NAN__");
138  Define(Defs, "__LDBL_MANT_DIG__", "106");
139  Define(Defs, "__LDBL_MAX_10_EXP__", "308");
140  Define(Defs, "__LDBL_MAX_EXP__", "1024");
141  Define(Defs, "__LDBL_MAX__",
142         "1.79769313486231580793728971405301e+308L");
143  Define(Defs, "__LDBL_MIN_10_EXP__", "(-291)");
144  Define(Defs, "__LDBL_MIN_EXP__", "(-968)");
145  Define(Defs, "__LDBL_MIN__",
146         "2.00416836000897277799610805135016e-292L");
147  Define(Defs, "__LONG_DOUBLE_128__");
148}
149
150/// getX86Defines - Return a set of the X86-specific #defines that are
151/// not tied to a specific subtarget.
152static void getX86Defines(std::vector<char> &Defs, bool is64Bit) {
153  // Target identification.
154  if (is64Bit) {
155    Define(Defs, "_LP64");
156    Define(Defs, "__LP64__");
157    Define(Defs, "__amd64__");
158    Define(Defs, "__amd64");
159    Define(Defs, "__x86_64");
160    Define(Defs, "__x86_64__");
161  } else {
162    Define(Defs, "__i386__");
163    Define(Defs, "__i386");
164    Define(Defs, "i386");
165  }
166
167  // Target properties.
168  Define(Defs, "__LITTLE_ENDIAN__");
169
170  if (is64Bit) {
171    Define(Defs, "__INTMAX_MAX__", "9223372036854775807L");
172    Define(Defs, "__INTMAX_TYPE__", "long int");
173    Define(Defs, "__LONG_MAX__", "9223372036854775807L");
174    Define(Defs, "__PTRDIFF_TYPE__", "long int");
175    Define(Defs, "__UINTMAX_TYPE__", "long unsigned int");
176  } else {
177    Define(Defs, "__INTMAX_MAX__", "9223372036854775807LL");
178    Define(Defs, "__INTMAX_TYPE__", "long long int");
179    Define(Defs, "__LONG_MAX__", "2147483647L");
180    Define(Defs, "__PTRDIFF_TYPE__", "int");
181    Define(Defs, "__UINTMAX_TYPE__", "long long unsigned int");
182  }
183  Define(Defs, "__SIZE_TYPE__", "long unsigned int");
184  Define(Defs, "__CHAR_BIT__", "8");
185  Define(Defs, "__INT_MAX__", "2147483647");
186  Define(Defs, "__LONG_LONG_MAX__", "9223372036854775807LL");
187  Define(Defs, "__SCHAR_MAX__", "127");
188  Define(Defs, "__SHRT_MAX__", "32767");
189
190  // Subtarget options.
191  Define(Defs, "__nocona");
192  Define(Defs, "__nocona__");
193  Define(Defs, "__tune_nocona__");
194  Define(Defs, "__SSE2_MATH__");
195  Define(Defs, "__SSE2__");
196  Define(Defs, "__SSE_MATH__");
197  Define(Defs, "__SSE__");
198  Define(Defs, "__MMX__");
199  Define(Defs, "__REGISTER_PREFIX__", "");
200
201  Define(Defs, "__WCHAR_MAX__", "2147483647");
202  Define(Defs, "__WCHAR_TYPE__", "int");
203  Define(Defs, "__WINT_TYPE__", "int");
204
205  // Float macros.
206  Define(Defs, "__FLT_DENORM_MIN__", "1.40129846e-45F");
207  Define(Defs, "__FLT_DIG__", "6");
208  Define(Defs, "__FLT_EPSILON__", "1.19209290e-7F");
209  Define(Defs, "__FLT_EVAL_METHOD__", "0");
210  Define(Defs, "__FLT_HAS_INFINITY__");
211  Define(Defs, "__FLT_HAS_QUIET_NAN__");
212  Define(Defs, "__FLT_MANT_DIG__", "24");
213  Define(Defs, "__FLT_MAX_10_EXP__", "38");
214  Define(Defs, "__FLT_MAX_EXP__", "128");
215  Define(Defs, "__FLT_MAX__", "3.40282347e+38F");
216  Define(Defs, "__FLT_MIN_10_EXP__", "(-37)");
217  Define(Defs, "__FLT_MIN_EXP__", "(-125)");
218  Define(Defs, "__FLT_MIN__", "1.17549435e-38F");
219  Define(Defs, "__FLT_RADIX__", "2");
220
221  // Double macros.
222  Define(Defs, "__DBL_DENORM_MIN__", "4.9406564584124654e-324");
223  Define(Defs, "__DBL_DIG__", "15");
224  Define(Defs, "__DBL_EPSILON__", "2.2204460492503131e-16");
225  Define(Defs, "__DBL_HAS_INFINITY__");
226  Define(Defs, "__DBL_HAS_QUIET_NAN__");
227  Define(Defs, "__DBL_MANT_DIG__", "53");
228  Define(Defs, "__DBL_MAX_10_EXP__", "308");
229  Define(Defs, "__DBL_MAX_EXP__", "1024");
230  Define(Defs, "__DBL_MAX__", "1.7976931348623157e+308");
231  Define(Defs, "__DBL_MIN_10_EXP__", "(-307)");
232  Define(Defs, "__DBL_MIN_EXP__", "(-1021)");
233  Define(Defs, "__DBL_MIN__", "2.2250738585072014e-308");
234  Define(Defs, "__DECIMAL_DIG__", "21");
235
236  // 80-bit Long double macros.
237  Define(Defs, "__LDBL_DENORM_MIN__", "3.64519953188247460253e-4951L");
238  Define(Defs, "__LDBL_DIG__", "18");
239  Define(Defs, "__LDBL_EPSILON__", "1.08420217248550443401e-19L");
240  Define(Defs, "__LDBL_HAS_INFINITY__");
241  Define(Defs, "__LDBL_HAS_QUIET_NAN__");
242  Define(Defs, "__LDBL_MANT_DIG__", "64");
243  Define(Defs, "__LDBL_MAX_10_EXP__", "4932");
244  Define(Defs, "__LDBL_MAX_EXP__", "16384");
245  Define(Defs, "__LDBL_MAX__", "1.18973149535723176502e+4932L");
246  Define(Defs, "__LDBL_MIN_10_EXP__", "(-4931)");
247  Define(Defs, "__LDBL_MIN_EXP__", "(-16381)");
248  Define(Defs, "__LDBL_MIN__", "3.36210314311209350626e-4932L");
249}
250
251/// getARMDefines - Return a set of the ARM-specific #defines that are
252/// not tied to a specific subtarget.
253static void getARMDefines(std::vector<char> &Defs) {
254  // Target identification.
255  Define(Defs, "__arm");
256  Define(Defs, "__arm__");
257
258  // Target properties.
259  Define(Defs, "__LITTLE_ENDIAN__");
260
261  Define(Defs, "__INTMAX_MAX__", "9223372036854775807LL");
262  Define(Defs, "__INTMAX_TYPE__", "long long int");
263  Define(Defs, "__LONG_MAX__", "2147483647L");
264  Define(Defs, "__PTRDIFF_TYPE__", "int");
265  Define(Defs, "__UINTMAX_TYPE__", "long long unsigned int");
266  Define(Defs, "__SIZE_TYPE__", "long unsigned int");
267
268  Define(Defs, "__CHAR_BIT__", "8");
269  Define(Defs, "__INT_MAX__", "2147483647");
270  Define(Defs, "__LONG_LONG_MAX__", "9223372036854775807LL");
271  Define(Defs, "__SCHAR_MAX__", "127");
272  Define(Defs, "__SHRT_MAX__", "32767");
273
274  // Subtarget options.  [hard coded to v6 for now]
275  Define(Defs, "__ARM_ARCH_6K__");
276  Define(Defs, "__ARMEL__");
277  Define(Defs, "__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", "20000");
278
279  Define(Defs, "__WCHAR_MAX__", "2147483647");
280  Define(Defs, "__WCHAR_TYPE__", "int");
281  Define(Defs, "__WINT_TYPE__", "int");
282  Define(Defs, "__DECIMAL_DIG__", "17");
283  Define(Defs, "__FLT_RADIX__", "2");
284
285  // Float macros.
286  Define(Defs, "__FLT_DENORM_MIN__", "1.40129846e-45F");
287  Define(Defs, "__FLT_DIG__", "6");
288  Define(Defs, "__FLT_EPSILON__", "1.19209290e-7F");
289  Define(Defs, "__FLT_EVAL_METHOD__", "0");
290  Define(Defs, "__FLT_HAS_INFINITY__");
291  Define(Defs, "__FLT_HAS_QUIET_NAN__");
292  Define(Defs, "__FLT_MANT_DIG__", "24");
293  Define(Defs, "__FLT_MAX_10_EXP__", "38");
294  Define(Defs, "__FLT_MAX_EXP__", "128");
295  Define(Defs, "__FLT_MAX__", "3.40282347e+38F");
296  Define(Defs, "__FLT_MIN_10_EXP__", "(-37)");
297  Define(Defs, "__FLT_MIN_EXP__", "(-125)");
298  Define(Defs, "__FLT_MIN__", "1.17549435e-38F");
299
300  // Double macros.
301  Define(Defs, "__DBL_DENORM_MIN__", "4.9406564584124654e-324");
302  Define(Defs, "__DBL_DIG__", "15");
303  Define(Defs, "__DBL_EPSILON__", "2.2204460492503131e-16");
304  Define(Defs, "__DBL_HAS_INFINITY__");
305  Define(Defs, "__DBL_HAS_QUIET_NAN__");
306  Define(Defs, "__DBL_MANT_DIG__", "53");
307  Define(Defs, "__DBL_MAX_10_EXP__", "308");
308  Define(Defs, "__DBL_MAX_EXP__", "1024");
309  Define(Defs, "__DBL_MAX__", "1.7976931348623157e+308");
310  Define(Defs, "__DBL_MIN_10_EXP__", "(-307)");
311  Define(Defs, "__DBL_MIN_EXP__", "(-1021)");
312  Define(Defs, "__DBL_MIN__", "2.2250738585072014e-308");
313
314  // 64-bit Long double macros (same as double).
315  Define(Defs, "__LDBL_DENORM_MIN__", "4.9406564584124654e-324");
316  Define(Defs, "__LDBL_DIG__", "15");
317  Define(Defs, "__LDBL_EPSILON__", "2.2204460492503131e-16");
318  Define(Defs, "__LDBL_HAS_INFINITY__");
319  Define(Defs, "__LDBL_HAS_QUIET_NAN__");
320  Define(Defs, "__LDBL_MANT_DIG__", "53");
321  Define(Defs, "__LDBL_MAX_10_EXP__", "308");
322  Define(Defs, "__LDBL_MAX_EXP__", "1024");
323  Define(Defs, "__LDBL_MAX__", "1.7976931348623157e+308");
324  Define(Defs, "__LDBL_MIN_10_EXP__", "(-307)");
325  Define(Defs, "__LDBL_MIN_EXP__", "(-1021)");
326  Define(Defs, "__LDBL_MIN__", "2.2250738585072014e-308");
327}
328
329//===----------------------------------------------------------------------===//
330// Specific target implementations.
331//===----------------------------------------------------------------------===//
332
333namespace {
334// PPC abstract base class
335class PPCTargetInfo : public TargetInfo {
336  static const Builtin::Info BuiltinInfo[];
337  static const char * const GCCRegNames[];
338  static const TargetInfo::GCCRegAlias GCCRegAliases[];
339
340public:
341  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {
342    CharIsSigned = false;
343  }
344  virtual void getTargetBuiltins(const Builtin::Info *&Records,
345                                 unsigned &NumRecords) const {
346    Records = BuiltinInfo;
347    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
348  }
349  virtual const char *getVAListDeclaration() const {
350    return "typedef struct __va_list_tag {"
351           "  unsigned char gpr;"
352           "  unsigned char fpr;"
353           "  unsigned short reserved;"
354           "  void* overflow_arg_area;"
355           "  void* reg_save_area;"
356           "} __builtin_va_list[1];";
357  }
358  virtual const char *getTargetPrefix() const {
359    return "ppc";
360  }
361  virtual void getGCCRegNames(const char * const *&Names,
362                              unsigned &NumNames) const;
363  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
364                                unsigned &NumAliases) const;
365  virtual bool validateAsmConstraint(char c,
366                                     TargetInfo::ConstraintInfo &info) const {
367    switch (c) {
368    default: return false;
369    case 'O': // Zero
370      return true;
371    case 'b': // Base register
372    case 'f': // Floating point register
373      info = (TargetInfo::ConstraintInfo)(info|TargetInfo::CI_AllowsRegister);
374      return true;
375    }
376  }
377  virtual const char *getClobbers() const {
378    return "";
379  }
380};
381
382const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
383#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS },
384#include "clang/AST/PPCBuiltins.def"
385};
386
387const char * const PPCTargetInfo::GCCRegNames[] = {
388  "0", "1", "2", "3", "4", "5", "6", "7",
389  "8", "9", "10", "11", "12", "13", "14", "15",
390  "16", "17", "18", "19", "20", "21", "22", "23",
391  "24", "25", "26", "27", "28", "29", "30", "31",
392  "0", "1", "2", "3", "4", "5", "6", "7",
393  "8", "9", "10", "11", "12", "13", "14", "15",
394  "16", "17", "18", "19", "20", "21", "22", "23",
395  "24", "25", "26", "27", "28", "29", "30", "31",
396  "mq", "lr", "ctr", "ap",
397  "0", "1", "2", "3", "4", "5", "6", "7",
398  "xer",
399  "0", "1", "2", "3", "4", "5", "6", "7",
400  "8", "9", "10", "11", "12", "13", "14", "15",
401  "16", "17", "18", "19", "20", "21", "22", "23",
402  "24", "25", "26", "27", "28", "29", "30", "31",
403  "vrsave", "vscr",
404  "spe_acc", "spefscr",
405  "sfp"
406};
407
408void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
409                                   unsigned &NumNames) const {
410  Names = GCCRegNames;
411  NumNames = llvm::array_lengthof(GCCRegNames);
412}
413
414const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
415  // While some of these aliases do map to different registers
416  // they still share the same register name.
417  { { "cc", "cr0", "fr0", "r0", "v0"}, "0" },
418  { { "cr1", "fr1", "r1", "sp", "v1"}, "1" },
419  { { "cr2", "fr2", "r2", "toc", "v2"}, "2" },
420  { { "cr3", "fr3", "r3", "v3"}, "3" },
421  { { "cr4", "fr4", "r4", "v4"}, "4" },
422  { { "cr5", "fr5", "r5", "v5"}, "5" },
423  { { "cr6", "fr6", "r6", "v6"}, "6" },
424  { { "cr7", "fr7", "r7", "v7"}, "7" },
425  { { "fr8", "r8", "v8"}, "8" },
426  { { "fr9", "r9", "v9"}, "9" },
427  { { "fr10", "r10", "v10"}, "10" },
428  { { "fr11", "r11", "v11"}, "11" },
429  { { "fr12", "r12", "v12"}, "12" },
430  { { "fr13", "r13", "v13"}, "13" },
431  { { "fr14", "r14", "v14"}, "14" },
432  { { "fr15", "r15", "v15"}, "15" },
433  { { "fr16", "r16", "v16"}, "16" },
434  { { "fr17", "r17", "v17"}, "17" },
435  { { "fr18", "r18", "v18"}, "18" },
436  { { "fr19", "r19", "v19"}, "19" },
437  { { "fr20", "r20", "v20"}, "20" },
438  { { "fr21", "r21", "v21"}, "21" },
439  { { "fr22", "r22", "v22"}, "22" },
440  { { "fr23", "r23", "v23"}, "23" },
441  { { "fr24", "r24", "v24"}, "24" },
442  { { "fr25", "r25", "v25"}, "25" },
443  { { "fr26", "r26", "v26"}, "26" },
444  { { "fr27", "r27", "v27"}, "27" },
445  { { "fr28", "r28", "v28"}, "28" },
446  { { "fr29", "r29", "v29"}, "29" },
447  { { "fr30", "r30", "v30"}, "30" },
448  { { "fr31", "r31", "v31"}, "31" },
449};
450
451void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
452                                     unsigned &NumAliases) const {
453  Aliases = GCCRegAliases;
454  NumAliases = llvm::array_lengthof(GCCRegAliases);
455}
456} // end anonymous namespace.
457
458namespace {
459class PPC32TargetInfo : public PPCTargetInfo {
460public:
461  PPC32TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {}
462  virtual void getTargetDefines(std::vector<char> &Defines) const {
463    getPowerPCDefines(Defines, false);
464  }
465};
466} // end anonymous namespace.
467
468namespace {
469class PPC64TargetInfo : public PPCTargetInfo {
470public:
471  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
472    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
473  }
474  virtual void getTargetDefines(std::vector<char> &Defines) const {
475    getPowerPCDefines(Defines, true);
476  }
477};
478} // end anonymous namespace.
479
480namespace {
481class DarwinPPCTargetInfo : public PPC32TargetInfo {
482public:
483  DarwinPPCTargetInfo(const std::string& triple) : PPC32TargetInfo(triple) {}
484  virtual void getTargetDefines(std::vector<char> &Defines) const {
485    PPC32TargetInfo::getTargetDefines(Defines);
486    getDarwinDefines(Defines);
487  }
488};
489} // end anonymous namespace.
490
491namespace {
492class DarwinPPC64TargetInfo : public PPC64TargetInfo {
493public:
494  DarwinPPC64TargetInfo(const std::string& triple) : PPC64TargetInfo(triple) {}
495  virtual void getTargetDefines(std::vector<char> &Defines) const {
496    PPC64TargetInfo::getTargetDefines(Defines);
497    getDarwinDefines(Defines);
498  }
499};
500} // end anonymous namespace.
501
502namespace {
503// Namespace for x86 abstract base class
504const Builtin::Info BuiltinInfo[] = {
505#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS },
506#include "clang/AST/X86Builtins.def"
507};
508
509const char *GCCRegNames[] = {
510  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
511  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
512  "argp", "flags", "fspr", "dirflag", "frame",
513  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
514  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
515  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
516  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"
517};
518
519const TargetInfo::GCCRegAlias GCCRegAliases[] = {
520  { { "al", "ah", "eax", "rax" }, "ax" },
521  { { "bl", "bh", "ebx", "rbx" }, "bx" },
522  { { "cl", "ch", "ecx", "rcx" }, "cx" },
523  { { "dl", "dh", "edx", "rdx" }, "dx" },
524  { { "esi", "rsi" }, "si" },
525  { { "edi", "rdi" }, "di" },
526  { { "esp", "rsp" }, "sp" },
527  { { "ebp", "rbp" }, "bp" },
528};
529
530// X86 target abstract base class; x86-32 and x86-64 are very close, so
531// most of the implementation can be shared.
532class X86TargetInfo : public TargetInfo {
533public:
534  X86TargetInfo(const std::string& triple) : TargetInfo(triple) {
535    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
536  }
537  virtual void getTargetBuiltins(const Builtin::Info *&Records,
538                                 unsigned &NumRecords) const {
539    Records = BuiltinInfo;
540    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
541  }
542  virtual const char *getTargetPrefix() const {
543    return "x86";
544  }
545  virtual void getGCCRegNames(const char * const *&Names,
546                              unsigned &NumNames) const {
547    Names = GCCRegNames;
548    NumNames = llvm::array_lengthof(GCCRegNames);
549  }
550  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
551                                unsigned &NumAliases) const {
552    Aliases = GCCRegAliases;
553    NumAliases = llvm::array_lengthof(GCCRegAliases);
554  }
555  virtual bool validateAsmConstraint(char c,
556                                     TargetInfo::ConstraintInfo &info) const;
557  virtual std::string convertConstraint(const char Constraint) const;
558  virtual const char *getClobbers() const {
559    return "~{dirflag},~{fpsr},~{flags}";
560  }
561};
562
563bool
564X86TargetInfo::validateAsmConstraint(char c,
565                                     TargetInfo::ConstraintInfo &info) const {
566  switch (c) {
567  default: return false;
568  case 'a': // eax.
569  case 'b': // ebx.
570  case 'c': // ecx.
571  case 'd': // edx.
572  case 'S': // esi.
573  case 'D': // edi.
574  case 'A': // edx:eax.
575  case 't': // top of floating point stack.
576  case 'u': // second from top of floating point stack.
577  case 'q': // Any register accessible as [r]l: a, b, c, and d.
578  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
579  case 'Z': // 32-bit integer constant for use with zero-extending x86_64
580            // instructions.
581  case 'N': // unsigned 8-bit integer constant for use with in and out
582            // instructions.
583    info = (TargetInfo::ConstraintInfo)(info|TargetInfo::CI_AllowsRegister);
584    return true;
585  }
586}
587
588std::string
589X86TargetInfo::convertConstraint(const char Constraint) const {
590  switch (Constraint) {
591  case 'a': return std::string("{ax}");
592  case 'b': return std::string("{bx}");
593  case 'c': return std::string("{cx}");
594  case 'd': return std::string("{dx}");
595  case 'S': return std::string("{si}");
596  case 'D': return std::string("{di}");
597  case 't': // top of floating point stack.
598    return std::string("{st}");
599  case 'u': // second from top of floating point stack.
600    return std::string("{st(1)}"); // second from top of floating point stack.
601  default:
602    return std::string(1, Constraint);
603  }
604}
605} // end anonymous namespace
606
607namespace {
608// X86-32 generic target
609class X86_32TargetInfo : public X86TargetInfo {
610public:
611  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
612    DoubleAlign = LongLongAlign = 32;
613    LongDoubleWidth = 96;
614    LongDoubleAlign = 32;
615  }
616  virtual const char *getVAListDeclaration() const {
617    return "typedef char* __builtin_va_list;";
618  }
619  virtual void getTargetDefines(std::vector<char> &Defines) const {
620    getX86Defines(Defines, false);
621  }
622};
623} // end anonymous namespace
624
625namespace {
626// x86-32 Darwin (OS X) target
627class DarwinI386TargetInfo : public X86_32TargetInfo {
628public:
629  DarwinI386TargetInfo(const std::string& triple) : X86_32TargetInfo(triple) {
630    LongDoubleWidth = 128;
631    LongDoubleAlign = 128;
632  }
633  virtual void getTargetDefines(std::vector<char> &Defines) const {
634    X86_32TargetInfo::getTargetDefines(Defines);
635    getDarwinDefines(Defines);
636  }
637};
638} // end anonymous namespace
639
640namespace {
641// x86-64 generic target
642class X86_64TargetInfo : public X86TargetInfo {
643public:
644  X86_64TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
645    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
646    LongDoubleWidth = 128;
647    LongDoubleAlign = 128;
648  }
649  virtual const char *getVAListDeclaration() const {
650    return "typedef struct __va_list_tag {"
651           "  unsigned gp_offset;"
652           "  unsigned fp_offset;"
653           "  void* overflow_arg_area;"
654           "  void* reg_save_area;"
655           "} __builtin_va_list[1];";
656  }
657  virtual void getTargetDefines(std::vector<char> &Defines) const {
658    getX86Defines(Defines, true);
659  }
660};
661} // end anonymous namespace
662
663namespace {
664// x86-64 Darwin (OS X) target
665class DarwinX86_64TargetInfo : public X86_64TargetInfo {
666public:
667  DarwinX86_64TargetInfo(const std::string& triple) :
668    X86_64TargetInfo(triple) {}
669
670  virtual void getTargetDefines(std::vector<char> &Defines) const {
671    X86_64TargetInfo::getTargetDefines(Defines);
672    getDarwinDefines(Defines);
673  }
674};
675} // end anonymous namespace.
676
677namespace {
678class ARMTargetInfo : public TargetInfo {
679public:
680  ARMTargetInfo(const std::string& triple) : TargetInfo(triple) {
681    // FIXME: Are the defaults correct for ARM?
682  }
683  virtual void getTargetDefines(std::vector<char> &Defines) const {
684    getARMDefines(Defines);
685  }
686  virtual void getTargetBuiltins(const Builtin::Info *&Records,
687                                 unsigned &NumRecords) const {
688    // FIXME: Implement.
689    Records = 0;
690    NumRecords = 0;
691  }
692  virtual const char *getVAListDeclaration() const {
693    return "typedef char* __builtin_va_list;";
694  }
695  virtual const char *getTargetPrefix() const {
696    return "arm";
697  }
698  virtual void getGCCRegNames(const char * const *&Names,
699                              unsigned &NumNames) const {
700    // FIXME: Implement.
701    Names = 0;
702    NumNames = 0;
703  }
704  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
705                                unsigned &NumAliases) const {
706    // FIXME: Implement.
707    Aliases = 0;
708    NumAliases = 0;
709  }
710  virtual bool validateAsmConstraint(char c,
711                                     TargetInfo::ConstraintInfo &info) const {
712    // FIXME: Check if this is complete
713    switch (c) {
714    default:
715    case 'l': // r0-r7
716    case 'h': // r8-r15
717    case 'w': // VFP Floating point register single precision
718    case 'P': // VFP Floating point register double precision
719      info = (TargetInfo::ConstraintInfo)(info|TargetInfo::CI_AllowsRegister);
720      return true;
721    }
722    return false;
723  }
724  virtual const char *getClobbers() const {
725    // FIXME: Is this really right?
726    return "";
727  }
728};
729} // end anonymous namespace.
730
731
732namespace {
733class DarwinARMTargetInfo : public ARMTargetInfo {
734public:
735  DarwinARMTargetInfo(const std::string& triple) : ARMTargetInfo(triple) {}
736
737  virtual void getTargetDefines(std::vector<char> &Defines) const {
738    ARMTargetInfo::getTargetDefines(Defines);
739    getDarwinDefines(Defines);
740  }
741};
742} // end anonymous namespace.
743
744namespace {
745class SparcV8TargetInfo : public TargetInfo {
746public:
747  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
748    // FIXME: Support Sparc quad-precision long double?
749  }
750  virtual void getTargetDefines(std::vector<char> &Defines) const {
751    // FIXME: This is missing a lot of important defines; some of the
752    // missing stuff is likely to break system headers.
753    Define(Defines, "__sparc");
754    Define(Defines, "__sparc__");
755    Define(Defines, "__sparcv8");
756  }
757  virtual void getTargetBuiltins(const Builtin::Info *&Records,
758                                 unsigned &NumRecords) const {
759    // FIXME: Implement!
760  }
761  virtual const char *getVAListDeclaration() const {
762    return "typedef void* __builtin_va_list;";
763  }
764  virtual const char *getTargetPrefix() const {
765    return "sparc";
766  }
767  virtual void getGCCRegNames(const char * const *&Names,
768                              unsigned &NumNames) const {
769    // FIXME: Implement!
770    Names = 0;
771    NumNames = 0;
772  }
773  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
774                                unsigned &NumAliases) const {
775    // FIXME: Implement!
776    Aliases = 0;
777    NumAliases = 0;
778  }
779  virtual bool validateAsmConstraint(char c,
780                                     TargetInfo::ConstraintInfo &info) const {
781    // FIXME: Implement!
782    return false;
783  }
784  virtual const char *getClobbers() const {
785    // FIXME: Implement!
786    return "";
787  }
788};
789
790} // end anonymous namespace.
791
792namespace {
793class SolarisSparcV8TargetInfo : public SparcV8TargetInfo {
794public:
795  SolarisSparcV8TargetInfo(const std::string& triple) :
796    SparcV8TargetInfo(triple) {}
797
798  virtual void getTargetDefines(std::vector<char> &Defines) const {
799    SparcV8TargetInfo::getTargetDefines(Defines);
800    getSolarisDefines(Defines);
801  }
802};
803} // end anonymous namespace.
804
805namespace {
806  class PIC16TargetInfo : public TargetInfo{
807  public:
808    PIC16TargetInfo(const std::string& triple) : TargetInfo(triple) {
809      // FIXME: Is IntAlign really supposed to be 16?  There seems
810      // little point on a platform with 8-bit loads.
811      IntWidth = IntAlign = LongAlign = LongLongAlign = PointerWidth = 16;
812      PointerAlign = 8;
813      DescriptionString = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8";
814    }
815    virtual uint64_t getPointerWidthV(unsigned AddrSpace) const { return 16; }
816    virtual uint64_t getPointerAlignV(unsigned AddrSpace) const { return 8; }
817    virtual void getTargetDefines(std::vector<char> &Defines) const {
818      Define(Defines, "__pic16");
819    }
820    virtual void getTargetBuiltins(const Builtin::Info *&Records,
821                                   unsigned &NumRecords) const {}
822    virtual const char *getVAListDeclaration() const { return "";}
823    virtual const char *getClobbers() const {return "";}
824    virtual const char *getTargetPrefix() const {return "";}
825    virtual void getGCCRegNames(const char * const *&Names,
826                                unsigned &NumNames) const {}
827    virtual bool validateAsmConstraint(char c,
828                                       TargetInfo::ConstraintInfo &info) const {
829      return true;
830    }
831    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
832                                  unsigned &NumAliases) const {}
833    virtual bool useGlobalsForAutomaticVariables() const {return true;}
834  };
835}
836
837//===----------------------------------------------------------------------===//
838// Driver code
839//===----------------------------------------------------------------------===//
840
841static inline bool IsX86(const std::string& TT) {
842  return (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' &&
843          TT[4] == '-' && TT[1] - '3' < 6);
844}
845
846/// CreateTargetInfo - Return the target info object for the specified target
847/// triple.
848TargetInfo* TargetInfo::CreateTargetInfo(const std::string &T) {
849  if (T.find("ppc-") == 0 || T.find("powerpc-") == 0)
850    return new DarwinPPCTargetInfo(T);
851
852  if (T.find("ppc64-") == 0 || T.find("powerpc64-") == 0)
853    return new DarwinPPC64TargetInfo(T);
854
855  if (T.find("armv6-") == 0 || T.find("arm-") == 0)
856    return new DarwinARMTargetInfo(T);
857
858  if (T.find("sparc-") == 0)
859    return new SolarisSparcV8TargetInfo(T); // ugly hack
860
861  if (T.find("x86_64-") == 0)
862    return new DarwinX86_64TargetInfo(T);
863
864  if (T.find("pic16-") == 0)
865    return new PIC16TargetInfo(T);
866
867  if (IsX86(T))
868    return new DarwinI386TargetInfo(T);
869
870  return NULL;
871}
872
873