TargetInfo.cpp revision 4581581881d3f7349bf5a4b39d761bce688f9164
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "llvm/Type.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/ADT/Triple.h" 22#include "llvm/Support/raw_ostream.h" 23using namespace clang; 24using namespace CodeGen; 25 26ABIInfo::~ABIInfo() {} 27 28void ABIArgInfo::dump() const { 29 llvm::raw_ostream &OS = llvm::errs(); 30 OS << "(ABIArgInfo Kind="; 31 switch (TheKind) { 32 case Direct: 33 OS << "Direct"; 34 break; 35 case Extend: 36 OS << "Extend"; 37 break; 38 case Ignore: 39 OS << "Ignore"; 40 break; 41 case Coerce: 42 OS << "Coerce Type="; 43 getCoerceToType()->print(OS); 44 break; 45 case Indirect: 46 OS << "Indirect Align=" << getIndirectAlign(); 47 break; 48 case Expand: 49 OS << "Expand"; 50 break; 51 } 52 OS << ")\n"; 53} 54 55TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 56 57static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 58 59/// isEmptyField - Return true iff a the field is "empty", that is it 60/// is an unnamed bit-field or an (array of) empty record(s). 61static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 62 bool AllowArrays) { 63 if (FD->isUnnamedBitfield()) 64 return true; 65 66 QualType FT = FD->getType(); 67 68 // Constant arrays of empty records count as empty, strip them off. 69 if (AllowArrays) 70 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 71 FT = AT->getElementType(); 72 73 return isEmptyRecord(Context, FT, AllowArrays); 74} 75 76/// isEmptyRecord - Return true iff a structure contains only empty 77/// fields. Note that a structure with a flexible array member is not 78/// considered empty. 79static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 80 const RecordType *RT = T->getAs<RecordType>(); 81 if (!RT) 82 return 0; 83 const RecordDecl *RD = RT->getDecl(); 84 if (RD->hasFlexibleArrayMember()) 85 return false; 86 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 87 i != e; ++i) 88 if (!isEmptyField(Context, *i, AllowArrays)) 89 return false; 90 return true; 91} 92 93/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 94/// a non-trivial destructor or a non-trivial copy constructor. 95static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 96 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 97 if (!RD) 98 return false; 99 100 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 101} 102 103/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 104/// a record type with either a non-trivial destructor or a non-trivial copy 105/// constructor. 106static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 107 const RecordType *RT = T->getAs<RecordType>(); 108 if (!RT) 109 return false; 110 111 return hasNonTrivialDestructorOrCopyConstructor(RT); 112} 113 114/// isSingleElementStruct - Determine if a structure is a "single 115/// element struct", i.e. it has exactly one non-empty field or 116/// exactly one field which is itself a single element 117/// struct. Structures with flexible array members are never 118/// considered single element structs. 119/// 120/// \return The field declaration for the single non-empty field, if 121/// it exists. 122static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 123 const RecordType *RT = T->getAsStructureType(); 124 if (!RT) 125 return 0; 126 127 const RecordDecl *RD = RT->getDecl(); 128 if (RD->hasFlexibleArrayMember()) 129 return 0; 130 131 const Type *Found = 0; 132 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 133 i != e; ++i) { 134 const FieldDecl *FD = *i; 135 QualType FT = FD->getType(); 136 137 // Ignore empty fields. 138 if (isEmptyField(Context, FD, true)) 139 continue; 140 141 // If we already found an element then this isn't a single-element 142 // struct. 143 if (Found) 144 return 0; 145 146 // Treat single element arrays as the element. 147 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 148 if (AT->getSize().getZExtValue() != 1) 149 break; 150 FT = AT->getElementType(); 151 } 152 153 if (!CodeGenFunction::hasAggregateLLVMType(FT)) { 154 Found = FT.getTypePtr(); 155 } else { 156 Found = isSingleElementStruct(FT, Context); 157 if (!Found) 158 return 0; 159 } 160 } 161 162 return Found; 163} 164 165static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 166 if (!Ty->getAs<BuiltinType>() && !Ty->isAnyPointerType() && 167 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 168 !Ty->isBlockPointerType()) 169 return false; 170 171 uint64_t Size = Context.getTypeSize(Ty); 172 return Size == 32 || Size == 64; 173} 174 175/// canExpandIndirectArgument - Test whether an argument type which is to be 176/// passed indirectly (on the stack) would have the equivalent layout if it was 177/// expanded into separate arguments. If so, we prefer to do the latter to avoid 178/// inhibiting optimizations. 179/// 180// FIXME: This predicate is missing many cases, currently it just follows 181// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 182// should probably make this smarter, or better yet make the LLVM backend 183// capable of handling it. 184static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 185 // We can only expand structure types. 186 const RecordType *RT = Ty->getAs<RecordType>(); 187 if (!RT) 188 return false; 189 190 // We can only expand (C) structures. 191 // 192 // FIXME: This needs to be generalized to handle classes as well. 193 const RecordDecl *RD = RT->getDecl(); 194 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 195 return false; 196 197 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 198 i != e; ++i) { 199 const FieldDecl *FD = *i; 200 201 if (!is32Or64BitBasicType(FD->getType(), Context)) 202 return false; 203 204 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 205 // how to expand them yet, and the predicate for telling if a bitfield still 206 // counts as "basic" is more complicated than what we were doing previously. 207 if (FD->isBitField()) 208 return false; 209 } 210 211 return true; 212} 213 214static bool typeContainsSSEVector(const RecordDecl *RD, ASTContext &Context) { 215 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 216 i != e; ++i) { 217 const FieldDecl *FD = *i; 218 219 if (FD->getType()->isVectorType() && 220 Context.getTypeSize(FD->getType()) >= 128) 221 return true; 222 223 if (const RecordType* RT = FD->getType()->getAs<RecordType>()) 224 if (typeContainsSSEVector(RT->getDecl(), Context)) 225 return true; 226 } 227 228 return false; 229} 230 231namespace { 232/// DefaultABIInfo - The default implementation for ABI specific 233/// details. This implementation provides information which results in 234/// self-consistent and sensible LLVM IR generation, but does not 235/// conform to any particular ABI. 236class DefaultABIInfo : public ABIInfo { 237 ABIArgInfo classifyReturnType(QualType RetTy, 238 ASTContext &Context, 239 llvm::LLVMContext &VMContext) const; 240 241 ABIArgInfo classifyArgumentType(QualType RetTy, 242 ASTContext &Context, 243 llvm::LLVMContext &VMContext) const; 244 245 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 246 llvm::LLVMContext &VMContext) const { 247 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 248 VMContext); 249 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 250 it != ie; ++it) 251 it->info = classifyArgumentType(it->type, Context, VMContext); 252 } 253 254 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 255 CodeGenFunction &CGF) const; 256}; 257 258class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 259public: 260 DefaultTargetCodeGenInfo():TargetCodeGenInfo(new DefaultABIInfo()) {} 261}; 262 263llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 264 CodeGenFunction &CGF) const { 265 return 0; 266} 267 268ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty, 269 ASTContext &Context, 270 llvm::LLVMContext &VMContext) const { 271 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 272 return ABIArgInfo::getIndirect(0); 273 } else { 274 return (Ty->isPromotableIntegerType() ? 275 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 276 } 277} 278 279/// X86_32ABIInfo - The X86-32 ABI information. 280class X86_32ABIInfo : public ABIInfo { 281 ASTContext &Context; 282 bool IsDarwinVectorABI; 283 bool IsSmallStructInRegABI; 284 285 static bool isRegisterSize(unsigned Size) { 286 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 287 } 288 289 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 290 291 static unsigned getIndirectArgumentAlignment(QualType Ty, 292 ASTContext &Context); 293 294public: 295 ABIArgInfo classifyReturnType(QualType RetTy, 296 ASTContext &Context, 297 llvm::LLVMContext &VMContext) const; 298 299 ABIArgInfo classifyArgumentType(QualType RetTy, 300 ASTContext &Context, 301 llvm::LLVMContext &VMContext) const; 302 303 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 304 llvm::LLVMContext &VMContext) const { 305 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 306 VMContext); 307 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 308 it != ie; ++it) 309 it->info = classifyArgumentType(it->type, Context, VMContext); 310 } 311 312 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 313 CodeGenFunction &CGF) const; 314 315 X86_32ABIInfo(ASTContext &Context, bool d, bool p) 316 : ABIInfo(), Context(Context), IsDarwinVectorABI(d), 317 IsSmallStructInRegABI(p) {} 318}; 319 320class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 321public: 322 X86_32TargetCodeGenInfo(ASTContext &Context, bool d, bool p) 323 :TargetCodeGenInfo(new X86_32ABIInfo(Context, d, p)) {} 324}; 325 326} 327 328/// shouldReturnTypeInRegister - Determine if the given type should be 329/// passed in a register (for the Darwin ABI). 330bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 331 ASTContext &Context) { 332 uint64_t Size = Context.getTypeSize(Ty); 333 334 // Type must be register sized. 335 if (!isRegisterSize(Size)) 336 return false; 337 338 if (Ty->isVectorType()) { 339 // 64- and 128- bit vectors inside structures are not returned in 340 // registers. 341 if (Size == 64 || Size == 128) 342 return false; 343 344 return true; 345 } 346 347 // If this is a builtin, pointer, enum, or complex type, it is ok. 348 if (Ty->getAs<BuiltinType>() || Ty->isAnyPointerType() || 349 Ty->isAnyComplexType() || Ty->isEnumeralType() || 350 Ty->isBlockPointerType()) 351 return true; 352 353 // Arrays are treated like records. 354 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 355 return shouldReturnTypeInRegister(AT->getElementType(), Context); 356 357 // Otherwise, it must be a record type. 358 const RecordType *RT = Ty->getAs<RecordType>(); 359 if (!RT) return false; 360 361 // FIXME: Traverse bases here too. 362 363 // Structure types are passed in register if all fields would be 364 // passed in a register. 365 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 366 e = RT->getDecl()->field_end(); i != e; ++i) { 367 const FieldDecl *FD = *i; 368 369 // Empty fields are ignored. 370 if (isEmptyField(Context, FD, true)) 371 continue; 372 373 // Check fields recursively. 374 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 375 return false; 376 } 377 378 return true; 379} 380 381ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, 382 ASTContext &Context, 383 llvm::LLVMContext &VMContext) const { 384 if (RetTy->isVoidType()) { 385 return ABIArgInfo::getIgnore(); 386 } else if (const VectorType *VT = RetTy->getAs<VectorType>()) { 387 // On Darwin, some vectors are returned in registers. 388 if (IsDarwinVectorABI) { 389 uint64_t Size = Context.getTypeSize(RetTy); 390 391 // 128-bit vectors are a special case; they are returned in 392 // registers and we need to make sure to pick a type the LLVM 393 // backend will like. 394 if (Size == 128) 395 return ABIArgInfo::getCoerce(llvm::VectorType::get( 396 llvm::Type::getInt64Ty(VMContext), 2)); 397 398 // Always return in register if it fits in a general purpose 399 // register, or if it is 64 bits and has a single element. 400 if ((Size == 8 || Size == 16 || Size == 32) || 401 (Size == 64 && VT->getNumElements() == 1)) 402 return ABIArgInfo::getCoerce(llvm::IntegerType::get(VMContext, Size)); 403 404 return ABIArgInfo::getIndirect(0); 405 } 406 407 return ABIArgInfo::getDirect(); 408 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 409 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 410 // Structures with either a non-trivial destructor or a non-trivial 411 // copy constructor are always indirect. 412 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 413 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 414 415 // Structures with flexible arrays are always indirect. 416 if (RT->getDecl()->hasFlexibleArrayMember()) 417 return ABIArgInfo::getIndirect(0); 418 } 419 420 // If specified, structs and unions are always indirect. 421 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 422 return ABIArgInfo::getIndirect(0); 423 424 // Classify "single element" structs as their element type. 425 if (const Type *SeltTy = isSingleElementStruct(RetTy, Context)) { 426 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 427 if (BT->isIntegerType()) { 428 // We need to use the size of the structure, padding 429 // bit-fields can adjust that to be larger than the single 430 // element type. 431 uint64_t Size = Context.getTypeSize(RetTy); 432 return ABIArgInfo::getCoerce( 433 llvm::IntegerType::get(VMContext, (unsigned) Size)); 434 } else if (BT->getKind() == BuiltinType::Float) { 435 assert(Context.getTypeSize(RetTy) == Context.getTypeSize(SeltTy) && 436 "Unexpect single element structure size!"); 437 return ABIArgInfo::getCoerce(llvm::Type::getFloatTy(VMContext)); 438 } else if (BT->getKind() == BuiltinType::Double) { 439 assert(Context.getTypeSize(RetTy) == Context.getTypeSize(SeltTy) && 440 "Unexpect single element structure size!"); 441 return ABIArgInfo::getCoerce(llvm::Type::getDoubleTy(VMContext)); 442 } 443 } else if (SeltTy->isPointerType()) { 444 // FIXME: It would be really nice if this could come out as the proper 445 // pointer type. 446 const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(VMContext); 447 return ABIArgInfo::getCoerce(PtrTy); 448 } else if (SeltTy->isVectorType()) { 449 // 64- and 128-bit vectors are never returned in a 450 // register when inside a structure. 451 uint64_t Size = Context.getTypeSize(RetTy); 452 if (Size == 64 || Size == 128) 453 return ABIArgInfo::getIndirect(0); 454 455 return classifyReturnType(QualType(SeltTy, 0), Context, VMContext); 456 } 457 } 458 459 // Small structures which are register sized are generally returned 460 // in a register. 461 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, Context)) { 462 uint64_t Size = Context.getTypeSize(RetTy); 463 return ABIArgInfo::getCoerce(llvm::IntegerType::get(VMContext, Size)); 464 } 465 466 return ABIArgInfo::getIndirect(0); 467 } else { 468 return (RetTy->isPromotableIntegerType() ? 469 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 470 } 471} 472 473unsigned X86_32ABIInfo::getIndirectArgumentAlignment(QualType Ty, 474 ASTContext &Context) { 475 unsigned Align = Context.getTypeAlign(Ty); 476 if (Align < 128) return 0; 477 if (const RecordType* RT = Ty->getAs<RecordType>()) 478 if (typeContainsSSEVector(RT->getDecl(), Context)) 479 return 16; 480 return 0; 481} 482 483ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty, 484 ASTContext &Context, 485 llvm::LLVMContext &VMContext) const { 486 // FIXME: Set alignment on indirect arguments. 487 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 488 // Structures with flexible arrays are always indirect. 489 if (const RecordType *RT = Ty->getAs<RecordType>()) { 490 // Structures with either a non-trivial destructor or a non-trivial 491 // copy constructor are always indirect. 492 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 493 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 494 495 if (RT->getDecl()->hasFlexibleArrayMember()) 496 return ABIArgInfo::getIndirect(getIndirectArgumentAlignment(Ty, 497 Context)); 498 } 499 500 // Ignore empty structs. 501 if (Ty->isStructureType() && Context.getTypeSize(Ty) == 0) 502 return ABIArgInfo::getIgnore(); 503 504 // Expand small (<= 128-bit) record types when we know that the stack layout 505 // of those arguments will match the struct. This is important because the 506 // LLVM backend isn't smart enough to remove byval, which inhibits many 507 // optimizations. 508 if (Context.getTypeSize(Ty) <= 4*32 && 509 canExpandIndirectArgument(Ty, Context)) 510 return ABIArgInfo::getExpand(); 511 512 return ABIArgInfo::getIndirect(getIndirectArgumentAlignment(Ty, Context)); 513 } else { 514 return (Ty->isPromotableIntegerType() ? 515 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 516 } 517} 518 519llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 520 CodeGenFunction &CGF) const { 521 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 522 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 523 524 CGBuilderTy &Builder = CGF.Builder; 525 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 526 "ap"); 527 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 528 llvm::Type *PTy = 529 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 530 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 531 532 uint64_t Offset = 533 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 534 llvm::Value *NextAddr = 535 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 536 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 537 "ap.next"); 538 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 539 540 return AddrTyped; 541} 542 543namespace { 544/// X86_64ABIInfo - The X86_64 ABI information. 545class X86_64ABIInfo : public ABIInfo { 546 enum Class { 547 Integer = 0, 548 SSE, 549 SSEUp, 550 X87, 551 X87Up, 552 ComplexX87, 553 NoClass, 554 Memory 555 }; 556 557 /// merge - Implement the X86_64 ABI merging algorithm. 558 /// 559 /// Merge an accumulating classification \arg Accum with a field 560 /// classification \arg Field. 561 /// 562 /// \param Accum - The accumulating classification. This should 563 /// always be either NoClass or the result of a previous merge 564 /// call. In addition, this should never be Memory (the caller 565 /// should just return Memory for the aggregate). 566 Class merge(Class Accum, Class Field) const; 567 568 /// classify - Determine the x86_64 register classes in which the 569 /// given type T should be passed. 570 /// 571 /// \param Lo - The classification for the parts of the type 572 /// residing in the low word of the containing object. 573 /// 574 /// \param Hi - The classification for the parts of the type 575 /// residing in the high word of the containing object. 576 /// 577 /// \param OffsetBase - The bit offset of this type in the 578 /// containing object. Some parameters are classified different 579 /// depending on whether they straddle an eightbyte boundary. 580 /// 581 /// If a word is unused its result will be NoClass; if a type should 582 /// be passed in Memory then at least the classification of \arg Lo 583 /// will be Memory. 584 /// 585 /// The \arg Lo class will be NoClass iff the argument is ignored. 586 /// 587 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 588 /// also be ComplexX87. 589 void classify(QualType T, ASTContext &Context, uint64_t OffsetBase, 590 Class &Lo, Class &Hi) const; 591 592 /// getCoerceResult - Given a source type \arg Ty and an LLVM type 593 /// to coerce to, chose the best way to pass Ty in the same place 594 /// that \arg CoerceTo would be passed, but while keeping the 595 /// emitted code as simple as possible. 596 /// 597 /// FIXME: Note, this should be cleaned up to just take an enumeration of all 598 /// the ways we might want to pass things, instead of constructing an LLVM 599 /// type. This makes this code more explicit, and it makes it clearer that we 600 /// are also doing this for correctness in the case of passing scalar types. 601 ABIArgInfo getCoerceResult(QualType Ty, 602 const llvm::Type *CoerceTo, 603 ASTContext &Context) const; 604 605 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 606 /// such that the argument will be passed in memory. 607 ABIArgInfo getIndirectResult(QualType Ty, 608 ASTContext &Context) const; 609 610 ABIArgInfo classifyReturnType(QualType RetTy, 611 ASTContext &Context, 612 llvm::LLVMContext &VMContext) const; 613 614 ABIArgInfo classifyArgumentType(QualType Ty, 615 ASTContext &Context, 616 llvm::LLVMContext &VMContext, 617 unsigned &neededInt, 618 unsigned &neededSSE) const; 619 620public: 621 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 622 llvm::LLVMContext &VMContext) const; 623 624 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 625 CodeGenFunction &CGF) const; 626}; 627 628class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 629public: 630 X86_64TargetCodeGenInfo():TargetCodeGenInfo(new X86_64ABIInfo()) {} 631}; 632 633} 634 635X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, 636 Class Field) const { 637 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 638 // classified recursively so that always two fields are 639 // considered. The resulting class is calculated according to 640 // the classes of the fields in the eightbyte: 641 // 642 // (a) If both classes are equal, this is the resulting class. 643 // 644 // (b) If one of the classes is NO_CLASS, the resulting class is 645 // the other class. 646 // 647 // (c) If one of the classes is MEMORY, the result is the MEMORY 648 // class. 649 // 650 // (d) If one of the classes is INTEGER, the result is the 651 // INTEGER. 652 // 653 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 654 // MEMORY is used as class. 655 // 656 // (f) Otherwise class SSE is used. 657 658 // Accum should never be memory (we should have returned) or 659 // ComplexX87 (because this cannot be passed in a structure). 660 assert((Accum != Memory && Accum != ComplexX87) && 661 "Invalid accumulated classification during merge."); 662 if (Accum == Field || Field == NoClass) 663 return Accum; 664 else if (Field == Memory) 665 return Memory; 666 else if (Accum == NoClass) 667 return Field; 668 else if (Accum == Integer || Field == Integer) 669 return Integer; 670 else if (Field == X87 || Field == X87Up || Field == ComplexX87 || 671 Accum == X87 || Accum == X87Up) 672 return Memory; 673 else 674 return SSE; 675} 676 677void X86_64ABIInfo::classify(QualType Ty, 678 ASTContext &Context, 679 uint64_t OffsetBase, 680 Class &Lo, Class &Hi) const { 681 // FIXME: This code can be simplified by introducing a simple value class for 682 // Class pairs with appropriate constructor methods for the various 683 // situations. 684 685 // FIXME: Some of the split computations are wrong; unaligned vectors 686 // shouldn't be passed in registers for example, so there is no chance they 687 // can straddle an eightbyte. Verify & simplify. 688 689 Lo = Hi = NoClass; 690 691 Class &Current = OffsetBase < 64 ? Lo : Hi; 692 Current = Memory; 693 694 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 695 BuiltinType::Kind k = BT->getKind(); 696 697 if (k == BuiltinType::Void) { 698 Current = NoClass; 699 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 700 Lo = Integer; 701 Hi = Integer; 702 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 703 Current = Integer; 704 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 705 Current = SSE; 706 } else if (k == BuiltinType::LongDouble) { 707 Lo = X87; 708 Hi = X87Up; 709 } 710 // FIXME: _Decimal32 and _Decimal64 are SSE. 711 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 712 } else if (const EnumType *ET = Ty->getAs<EnumType>()) { 713 // Classify the underlying integer type. 714 classify(ET->getDecl()->getIntegerType(), Context, OffsetBase, Lo, Hi); 715 } else if (Ty->hasPointerRepresentation()) { 716 Current = Integer; 717 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 718 uint64_t Size = Context.getTypeSize(VT); 719 if (Size == 32) { 720 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 721 // float> as integer. 722 Current = Integer; 723 724 // If this type crosses an eightbyte boundary, it should be 725 // split. 726 uint64_t EB_Real = (OffsetBase) / 64; 727 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 728 if (EB_Real != EB_Imag) 729 Hi = Lo; 730 } else if (Size == 64) { 731 // gcc passes <1 x double> in memory. :( 732 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 733 return; 734 735 // gcc passes <1 x long long> as INTEGER. 736 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong)) 737 Current = Integer; 738 else 739 Current = SSE; 740 741 // If this type crosses an eightbyte boundary, it should be 742 // split. 743 if (OffsetBase && OffsetBase != 64) 744 Hi = Lo; 745 } else if (Size == 128) { 746 Lo = SSE; 747 Hi = SSEUp; 748 } 749 } else if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 750 QualType ET = Context.getCanonicalType(CT->getElementType()); 751 752 uint64_t Size = Context.getTypeSize(Ty); 753 if (ET->isIntegralType()) { 754 if (Size <= 64) 755 Current = Integer; 756 else if (Size <= 128) 757 Lo = Hi = Integer; 758 } else if (ET == Context.FloatTy) 759 Current = SSE; 760 else if (ET == Context.DoubleTy) 761 Lo = Hi = SSE; 762 else if (ET == Context.LongDoubleTy) 763 Current = ComplexX87; 764 765 // If this complex type crosses an eightbyte boundary then it 766 // should be split. 767 uint64_t EB_Real = (OffsetBase) / 64; 768 uint64_t EB_Imag = (OffsetBase + Context.getTypeSize(ET)) / 64; 769 if (Hi == NoClass && EB_Real != EB_Imag) 770 Hi = Lo; 771 } else if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 772 // Arrays are treated like structures. 773 774 uint64_t Size = Context.getTypeSize(Ty); 775 776 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 777 // than two eightbytes, ..., it has class MEMORY. 778 if (Size > 128) 779 return; 780 781 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 782 // fields, it has class MEMORY. 783 // 784 // Only need to check alignment of array base. 785 if (OffsetBase % Context.getTypeAlign(AT->getElementType())) 786 return; 787 788 // Otherwise implement simplified merge. We could be smarter about 789 // this, but it isn't worth it and would be harder to verify. 790 Current = NoClass; 791 uint64_t EltSize = Context.getTypeSize(AT->getElementType()); 792 uint64_t ArraySize = AT->getSize().getZExtValue(); 793 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 794 Class FieldLo, FieldHi; 795 classify(AT->getElementType(), Context, Offset, FieldLo, FieldHi); 796 Lo = merge(Lo, FieldLo); 797 Hi = merge(Hi, FieldHi); 798 if (Lo == Memory || Hi == Memory) 799 break; 800 } 801 802 // Do post merger cleanup (see below). Only case we worry about is Memory. 803 if (Hi == Memory) 804 Lo = Memory; 805 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 806 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 807 uint64_t Size = Context.getTypeSize(Ty); 808 809 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 810 // than two eightbytes, ..., it has class MEMORY. 811 if (Size > 128) 812 return; 813 814 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 815 // copy constructor or a non-trivial destructor, it is passed by invisible 816 // reference. 817 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 818 return; 819 820 const RecordDecl *RD = RT->getDecl(); 821 822 // Assume variable sized types are passed in memory. 823 if (RD->hasFlexibleArrayMember()) 824 return; 825 826 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 827 828 // Reset Lo class, this will be recomputed. 829 Current = NoClass; 830 831 // If this is a C++ record, classify the bases first. 832 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 833 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 834 e = CXXRD->bases_end(); i != e; ++i) { 835 assert(!i->isVirtual() && !i->getType()->isDependentType() && 836 "Unexpected base class!"); 837 const CXXRecordDecl *Base = 838 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 839 840 // Classify this field. 841 // 842 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 843 // single eightbyte, each is classified separately. Each eightbyte gets 844 // initialized to class NO_CLASS. 845 Class FieldLo, FieldHi; 846 uint64_t Offset = OffsetBase + Layout.getBaseClassOffset(Base); 847 classify(i->getType(), Context, Offset, FieldLo, FieldHi); 848 Lo = merge(Lo, FieldLo); 849 Hi = merge(Hi, FieldHi); 850 if (Lo == Memory || Hi == Memory) 851 break; 852 } 853 854 // If this record has no fields but isn't empty, classify as INTEGER. 855 if (RD->field_empty() && Size) 856 Current = Integer; 857 } 858 859 // Classify the fields one at a time, merging the results. 860 unsigned idx = 0; 861 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 862 i != e; ++i, ++idx) { 863 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 864 bool BitField = i->isBitField(); 865 866 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 867 // fields, it has class MEMORY. 868 // 869 // Note, skip this test for bit-fields, see below. 870 if (!BitField && Offset % Context.getTypeAlign(i->getType())) { 871 Lo = Memory; 872 return; 873 } 874 875 // Classify this field. 876 // 877 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 878 // exceeds a single eightbyte, each is classified 879 // separately. Each eightbyte gets initialized to class 880 // NO_CLASS. 881 Class FieldLo, FieldHi; 882 883 // Bit-fields require special handling, they do not force the 884 // structure to be passed in memory even if unaligned, and 885 // therefore they can straddle an eightbyte. 886 if (BitField) { 887 // Ignore padding bit-fields. 888 if (i->isUnnamedBitfield()) 889 continue; 890 891 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 892 uint64_t Size = i->getBitWidth()->EvaluateAsInt(Context).getZExtValue(); 893 894 uint64_t EB_Lo = Offset / 64; 895 uint64_t EB_Hi = (Offset + Size - 1) / 64; 896 FieldLo = FieldHi = NoClass; 897 if (EB_Lo) { 898 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 899 FieldLo = NoClass; 900 FieldHi = Integer; 901 } else { 902 FieldLo = Integer; 903 FieldHi = EB_Hi ? Integer : NoClass; 904 } 905 } else 906 classify(i->getType(), Context, Offset, FieldLo, FieldHi); 907 Lo = merge(Lo, FieldLo); 908 Hi = merge(Hi, FieldHi); 909 if (Lo == Memory || Hi == Memory) 910 break; 911 } 912 913 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 914 // 915 // (a) If one of the classes is MEMORY, the whole argument is 916 // passed in memory. 917 // 918 // (b) If SSEUP is not preceeded by SSE, it is converted to SSE. 919 920 // The first of these conditions is guaranteed by how we implement 921 // the merge (just bail). 922 // 923 // The second condition occurs in the case of unions; for example 924 // union { _Complex double; unsigned; }. 925 if (Hi == Memory) 926 Lo = Memory; 927 if (Hi == SSEUp && Lo != SSE) 928 Hi = SSE; 929 } 930} 931 932ABIArgInfo X86_64ABIInfo::getCoerceResult(QualType Ty, 933 const llvm::Type *CoerceTo, 934 ASTContext &Context) const { 935 if (CoerceTo == llvm::Type::getInt64Ty(CoerceTo->getContext())) { 936 // Integer and pointer types will end up in a general purpose 937 // register. 938 if (Ty->isIntegralType() || Ty->hasPointerRepresentation()) 939 return (Ty->isPromotableIntegerType() ? 940 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 941 } else if (CoerceTo == llvm::Type::getDoubleTy(CoerceTo->getContext())) { 942 // FIXME: It would probably be better to make CGFunctionInfo only map using 943 // canonical types than to canonize here. 944 QualType CTy = Context.getCanonicalType(Ty); 945 946 // Float and double end up in a single SSE reg. 947 if (CTy == Context.FloatTy || CTy == Context.DoubleTy) 948 return ABIArgInfo::getDirect(); 949 950 } 951 952 return ABIArgInfo::getCoerce(CoerceTo); 953} 954 955ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty, 956 ASTContext &Context) const { 957 // If this is a scalar LLVM value then assume LLVM will pass it in the right 958 // place naturally. 959 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) 960 return (Ty->isPromotableIntegerType() ? 961 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 962 963 bool ByVal = !isRecordWithNonTrivialDestructorOrCopyConstructor(Ty); 964 965 // FIXME: Set alignment correctly. 966 return ABIArgInfo::getIndirect(0, ByVal); 967} 968 969ABIArgInfo X86_64ABIInfo::classifyReturnType(QualType RetTy, 970 ASTContext &Context, 971 llvm::LLVMContext &VMContext) const { 972 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 973 // classification algorithm. 974 X86_64ABIInfo::Class Lo, Hi; 975 classify(RetTy, Context, 0, Lo, Hi); 976 977 // Check some invariants. 978 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 979 assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification."); 980 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 981 982 const llvm::Type *ResType = 0; 983 switch (Lo) { 984 case NoClass: 985 return ABIArgInfo::getIgnore(); 986 987 case SSEUp: 988 case X87Up: 989 assert(0 && "Invalid classification for lo word."); 990 991 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 992 // hidden argument. 993 case Memory: 994 return getIndirectResult(RetTy, Context); 995 996 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 997 // available register of the sequence %rax, %rdx is used. 998 case Integer: 999 ResType = llvm::Type::getInt64Ty(VMContext); break; 1000 1001 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1002 // available SSE register of the sequence %xmm0, %xmm1 is used. 1003 case SSE: 1004 ResType = llvm::Type::getDoubleTy(VMContext); break; 1005 1006 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1007 // returned on the X87 stack in %st0 as 80-bit x87 number. 1008 case X87: 1009 ResType = llvm::Type::getX86_FP80Ty(VMContext); break; 1010 1011 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1012 // part of the value is returned in %st0 and the imaginary part in 1013 // %st1. 1014 case ComplexX87: 1015 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1016 ResType = llvm::StructType::get(VMContext, llvm::Type::getX86_FP80Ty(VMContext), 1017 llvm::Type::getX86_FP80Ty(VMContext), 1018 NULL); 1019 break; 1020 } 1021 1022 switch (Hi) { 1023 // Memory was handled previously and X87 should 1024 // never occur as a hi class. 1025 case Memory: 1026 case X87: 1027 assert(0 && "Invalid classification for hi word."); 1028 1029 case ComplexX87: // Previously handled. 1030 case NoClass: break; 1031 1032 case Integer: 1033 ResType = llvm::StructType::get(VMContext, ResType, 1034 llvm::Type::getInt64Ty(VMContext), NULL); 1035 break; 1036 case SSE: 1037 ResType = llvm::StructType::get(VMContext, ResType, 1038 llvm::Type::getDoubleTy(VMContext), NULL); 1039 break; 1040 1041 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1042 // is passed in the upper half of the last used SSE register. 1043 // 1044 // SSEUP should always be preceeded by SSE, just widen. 1045 case SSEUp: 1046 assert(Lo == SSE && "Unexpected SSEUp classification."); 1047 ResType = llvm::VectorType::get(llvm::Type::getDoubleTy(VMContext), 2); 1048 break; 1049 1050 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1051 // returned together with the previous X87 value in %st0. 1052 case X87Up: 1053 // If X87Up is preceeded by X87, we don't need to do 1054 // anything. However, in some cases with unions it may not be 1055 // preceeded by X87. In such situations we follow gcc and pass the 1056 // extra bits in an SSE reg. 1057 if (Lo != X87) 1058 ResType = llvm::StructType::get(VMContext, ResType, 1059 llvm::Type::getDoubleTy(VMContext), NULL); 1060 break; 1061 } 1062 1063 return getCoerceResult(RetTy, ResType, Context); 1064} 1065 1066ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, ASTContext &Context, 1067 llvm::LLVMContext &VMContext, 1068 unsigned &neededInt, 1069 unsigned &neededSSE) const { 1070 X86_64ABIInfo::Class Lo, Hi; 1071 classify(Ty, Context, 0, Lo, Hi); 1072 1073 // Check some invariants. 1074 // FIXME: Enforce these by construction. 1075 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1076 assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification."); 1077 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1078 1079 neededInt = 0; 1080 neededSSE = 0; 1081 const llvm::Type *ResType = 0; 1082 switch (Lo) { 1083 case NoClass: 1084 return ABIArgInfo::getIgnore(); 1085 1086 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1087 // on the stack. 1088 case Memory: 1089 1090 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1091 // COMPLEX_X87, it is passed in memory. 1092 case X87: 1093 case ComplexX87: 1094 return getIndirectResult(Ty, Context); 1095 1096 case SSEUp: 1097 case X87Up: 1098 assert(0 && "Invalid classification for lo word."); 1099 1100 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1101 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1102 // and %r9 is used. 1103 case Integer: 1104 ++neededInt; 1105 ResType = llvm::Type::getInt64Ty(VMContext); 1106 break; 1107 1108 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1109 // available SSE register is used, the registers are taken in the 1110 // order from %xmm0 to %xmm7. 1111 case SSE: 1112 ++neededSSE; 1113 ResType = llvm::Type::getDoubleTy(VMContext); 1114 break; 1115 } 1116 1117 switch (Hi) { 1118 // Memory was handled previously, ComplexX87 and X87 should 1119 // never occur as hi classes, and X87Up must be preceed by X87, 1120 // which is passed in memory. 1121 case Memory: 1122 case X87: 1123 case ComplexX87: 1124 assert(0 && "Invalid classification for hi word."); 1125 break; 1126 1127 case NoClass: break; 1128 case Integer: 1129 ResType = llvm::StructType::get(VMContext, ResType, 1130 llvm::Type::getInt64Ty(VMContext), NULL); 1131 ++neededInt; 1132 break; 1133 1134 // X87Up generally doesn't occur here (long double is passed in 1135 // memory), except in situations involving unions. 1136 case X87Up: 1137 case SSE: 1138 ResType = llvm::StructType::get(VMContext, ResType, 1139 llvm::Type::getDoubleTy(VMContext), NULL); 1140 ++neededSSE; 1141 break; 1142 1143 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1144 // eightbyte is passed in the upper half of the last used SSE 1145 // register. 1146 case SSEUp: 1147 assert(Lo == SSE && "Unexpected SSEUp classification."); 1148 ResType = llvm::VectorType::get(llvm::Type::getDoubleTy(VMContext), 2); 1149 break; 1150 } 1151 1152 return getCoerceResult(Ty, ResType, Context); 1153} 1154 1155void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1156 llvm::LLVMContext &VMContext) const { 1157 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 1158 Context, VMContext); 1159 1160 // Keep track of the number of assigned registers. 1161 unsigned freeIntRegs = 6, freeSSERegs = 8; 1162 1163 // If the return value is indirect, then the hidden argument is consuming one 1164 // integer register. 1165 if (FI.getReturnInfo().isIndirect()) 1166 --freeIntRegs; 1167 1168 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1169 // get assigned (in left-to-right order) for passing as follows... 1170 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1171 it != ie; ++it) { 1172 unsigned neededInt, neededSSE; 1173 it->info = classifyArgumentType(it->type, Context, VMContext, 1174 neededInt, neededSSE); 1175 1176 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1177 // eightbyte of an argument, the whole argument is passed on the 1178 // stack. If registers have already been assigned for some 1179 // eightbytes of such an argument, the assignments get reverted. 1180 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1181 freeIntRegs -= neededInt; 1182 freeSSERegs -= neededSSE; 1183 } else { 1184 it->info = getIndirectResult(it->type, Context); 1185 } 1186 } 1187} 1188 1189static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1190 QualType Ty, 1191 CodeGenFunction &CGF) { 1192 llvm::Value *overflow_arg_area_p = 1193 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1194 llvm::Value *overflow_arg_area = 1195 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1196 1197 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1198 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1199 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1200 if (Align > 8) { 1201 // Note that we follow the ABI & gcc here, even though the type 1202 // could in theory have an alignment greater than 16. This case 1203 // shouldn't ever matter in practice. 1204 1205 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1206 llvm::Value *Offset = 1207 llvm::ConstantInt::get(llvm::Type::getInt32Ty(CGF.getLLVMContext()), 15); 1208 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1209 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1210 llvm::Type::getInt64Ty(CGF.getLLVMContext())); 1211 llvm::Value *Mask = llvm::ConstantInt::get( 1212 llvm::Type::getInt64Ty(CGF.getLLVMContext()), ~15LL); 1213 overflow_arg_area = 1214 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1215 overflow_arg_area->getType(), 1216 "overflow_arg_area.align"); 1217 } 1218 1219 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1220 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1221 llvm::Value *Res = 1222 CGF.Builder.CreateBitCast(overflow_arg_area, 1223 llvm::PointerType::getUnqual(LTy)); 1224 1225 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1226 // l->overflow_arg_area + sizeof(type). 1227 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1228 // an 8 byte boundary. 1229 1230 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1231 llvm::Value *Offset = 1232 llvm::ConstantInt::get(llvm::Type::getInt32Ty(CGF.getLLVMContext()), 1233 (SizeInBytes + 7) & ~7); 1234 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1235 "overflow_arg_area.next"); 1236 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 1237 1238 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 1239 return Res; 1240} 1241 1242llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1243 CodeGenFunction &CGF) const { 1244 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 1245 const llvm::Type *i32Ty = llvm::Type::getInt32Ty(VMContext); 1246 const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 1247 1248 // Assume that va_list type is correct; should be pointer to LLVM type: 1249 // struct { 1250 // i32 gp_offset; 1251 // i32 fp_offset; 1252 // i8* overflow_arg_area; 1253 // i8* reg_save_area; 1254 // }; 1255 unsigned neededInt, neededSSE; 1256 ABIArgInfo AI = classifyArgumentType(Ty, CGF.getContext(), VMContext, 1257 neededInt, neededSSE); 1258 1259 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 1260 // in the registers. If not go to step 7. 1261 if (!neededInt && !neededSSE) 1262 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1263 1264 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 1265 // general purpose registers needed to pass type and num_fp to hold 1266 // the number of floating point registers needed. 1267 1268 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 1269 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 1270 // l->fp_offset > 304 - num_fp * 16 go to step 7. 1271 // 1272 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 1273 // register save space). 1274 1275 llvm::Value *InRegs = 0; 1276 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 1277 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 1278 if (neededInt) { 1279 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 1280 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 1281 InRegs = 1282 CGF.Builder.CreateICmpULE(gp_offset, 1283 llvm::ConstantInt::get(i32Ty, 1284 48 - neededInt * 8), 1285 "fits_in_gp"); 1286 } 1287 1288 if (neededSSE) { 1289 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 1290 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 1291 llvm::Value *FitsInFP = 1292 CGF.Builder.CreateICmpULE(fp_offset, 1293 llvm::ConstantInt::get(i32Ty, 1294 176 - neededSSE * 16), 1295 "fits_in_fp"); 1296 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 1297 } 1298 1299 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 1300 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 1301 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 1302 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 1303 1304 // Emit code to load the value if it was passed in registers. 1305 1306 CGF.EmitBlock(InRegBlock); 1307 1308 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 1309 // an offset of l->gp_offset and/or l->fp_offset. This may require 1310 // copying to a temporary location in case the parameter is passed 1311 // in different register classes or requires an alignment greater 1312 // than 8 for general purpose registers and 16 for XMM registers. 1313 // 1314 // FIXME: This really results in shameful code when we end up needing to 1315 // collect arguments from different places; often what should result in a 1316 // simple assembling of a structure from scattered addresses has many more 1317 // loads than necessary. Can we clean this up? 1318 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1319 llvm::Value *RegAddr = 1320 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 1321 "reg_save_area"); 1322 if (neededInt && neededSSE) { 1323 // FIXME: Cleanup. 1324 assert(AI.isCoerce() && "Unexpected ABI info for mixed regs"); 1325 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 1326 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 1327 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 1328 const llvm::Type *TyLo = ST->getElementType(0); 1329 const llvm::Type *TyHi = ST->getElementType(1); 1330 assert((TyLo->isFloatingPoint() ^ TyHi->isFloatingPoint()) && 1331 "Unexpected ABI info for mixed regs"); 1332 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 1333 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 1334 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1335 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1336 llvm::Value *RegLoAddr = TyLo->isFloatingPoint() ? FPAddr : GPAddr; 1337 llvm::Value *RegHiAddr = TyLo->isFloatingPoint() ? GPAddr : FPAddr; 1338 llvm::Value *V = 1339 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 1340 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1341 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 1342 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1343 1344 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1345 llvm::PointerType::getUnqual(LTy)); 1346 } else if (neededInt) { 1347 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1348 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1349 llvm::PointerType::getUnqual(LTy)); 1350 } else { 1351 if (neededSSE == 1) { 1352 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1353 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1354 llvm::PointerType::getUnqual(LTy)); 1355 } else { 1356 assert(neededSSE == 2 && "Invalid number of needed registers!"); 1357 // SSE registers are spaced 16 bytes apart in the register save 1358 // area, we need to collect the two eightbytes together. 1359 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1360 llvm::Value *RegAddrHi = 1361 CGF.Builder.CreateGEP(RegAddrLo, 1362 llvm::ConstantInt::get(i32Ty, 16)); 1363 const llvm::Type *DblPtrTy = 1364 llvm::PointerType::getUnqual(DoubleTy); 1365 const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy, 1366 DoubleTy, NULL); 1367 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 1368 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 1369 DblPtrTy)); 1370 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1371 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 1372 DblPtrTy)); 1373 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1374 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1375 llvm::PointerType::getUnqual(LTy)); 1376 } 1377 } 1378 1379 // AMD64-ABI 3.5.7p5: Step 5. Set: 1380 // l->gp_offset = l->gp_offset + num_gp * 8 1381 // l->fp_offset = l->fp_offset + num_fp * 16. 1382 if (neededInt) { 1383 llvm::Value *Offset = llvm::ConstantInt::get(i32Ty, neededInt * 8); 1384 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 1385 gp_offset_p); 1386 } 1387 if (neededSSE) { 1388 llvm::Value *Offset = llvm::ConstantInt::get(i32Ty, neededSSE * 16); 1389 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 1390 fp_offset_p); 1391 } 1392 CGF.EmitBranch(ContBlock); 1393 1394 // Emit code to load the value if it was passed in memory. 1395 1396 CGF.EmitBlock(InMemBlock); 1397 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1398 1399 // Return the appropriate result. 1400 1401 CGF.EmitBlock(ContBlock); 1402 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 1403 "vaarg.addr"); 1404 ResAddr->reserveOperandSpace(2); 1405 ResAddr->addIncoming(RegAddr, InRegBlock); 1406 ResAddr->addIncoming(MemAddr, InMemBlock); 1407 1408 return ResAddr; 1409} 1410 1411// PIC16 ABI Implementation 1412 1413namespace { 1414 1415class PIC16ABIInfo : public ABIInfo { 1416 ABIArgInfo classifyReturnType(QualType RetTy, 1417 ASTContext &Context, 1418 llvm::LLVMContext &VMContext) const; 1419 1420 ABIArgInfo classifyArgumentType(QualType RetTy, 1421 ASTContext &Context, 1422 llvm::LLVMContext &VMContext) const; 1423 1424 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1425 llvm::LLVMContext &VMContext) const { 1426 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 1427 VMContext); 1428 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1429 it != ie; ++it) 1430 it->info = classifyArgumentType(it->type, Context, VMContext); 1431 } 1432 1433 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1434 CodeGenFunction &CGF) const; 1435}; 1436 1437class PIC16TargetCodeGenInfo : public TargetCodeGenInfo { 1438public: 1439 PIC16TargetCodeGenInfo():TargetCodeGenInfo(new PIC16ABIInfo()) {} 1440}; 1441 1442} 1443 1444ABIArgInfo PIC16ABIInfo::classifyReturnType(QualType RetTy, 1445 ASTContext &Context, 1446 llvm::LLVMContext &VMContext) const { 1447 if (RetTy->isVoidType()) { 1448 return ABIArgInfo::getIgnore(); 1449 } else { 1450 return ABIArgInfo::getDirect(); 1451 } 1452} 1453 1454ABIArgInfo PIC16ABIInfo::classifyArgumentType(QualType Ty, 1455 ASTContext &Context, 1456 llvm::LLVMContext &VMContext) const { 1457 return ABIArgInfo::getDirect(); 1458} 1459 1460llvm::Value *PIC16ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1461 CodeGenFunction &CGF) const { 1462 return 0; 1463} 1464 1465// ARM ABI Implementation 1466 1467namespace { 1468 1469class ARMABIInfo : public ABIInfo { 1470public: 1471 enum ABIKind { 1472 APCS = 0, 1473 AAPCS = 1, 1474 AAPCS_VFP 1475 }; 1476 1477private: 1478 ABIKind Kind; 1479 1480public: 1481 ARMABIInfo(ABIKind _Kind) : Kind(_Kind) {} 1482 1483private: 1484 ABIKind getABIKind() const { return Kind; } 1485 1486 ABIArgInfo classifyReturnType(QualType RetTy, 1487 ASTContext &Context, 1488 llvm::LLVMContext &VMCOntext) const; 1489 1490 ABIArgInfo classifyArgumentType(QualType RetTy, 1491 ASTContext &Context, 1492 llvm::LLVMContext &VMContext) const; 1493 1494 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1495 llvm::LLVMContext &VMContext) const; 1496 1497 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1498 CodeGenFunction &CGF) const; 1499}; 1500 1501class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 1502public: 1503 ARMTargetCodeGenInfo(ARMABIInfo::ABIKind K) 1504 :TargetCodeGenInfo(new ARMABIInfo(K)) {} 1505}; 1506 1507} 1508 1509void ARMABIInfo::computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1510 llvm::LLVMContext &VMContext) const { 1511 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 1512 VMContext); 1513 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1514 it != ie; ++it) { 1515 it->info = classifyArgumentType(it->type, Context, VMContext); 1516 } 1517 1518 // ARM always overrides the calling convention. 1519 switch (getABIKind()) { 1520 case APCS: 1521 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 1522 break; 1523 1524 case AAPCS: 1525 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 1526 break; 1527 1528 case AAPCS_VFP: 1529 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 1530 break; 1531 } 1532} 1533 1534ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, 1535 ASTContext &Context, 1536 llvm::LLVMContext &VMContext) const { 1537 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) 1538 return (Ty->isPromotableIntegerType() ? 1539 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1540 1541 // Ignore empty records. 1542 if (isEmptyRecord(Context, Ty, true)) 1543 return ABIArgInfo::getIgnore(); 1544 1545 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 1546 // backend doesn't support byval. 1547 // FIXME: This doesn't handle alignment > 64 bits. 1548 const llvm::Type* ElemTy; 1549 unsigned SizeRegs; 1550 if (Context.getTypeAlign(Ty) > 32) { 1551 ElemTy = llvm::Type::getInt64Ty(VMContext); 1552 SizeRegs = (Context.getTypeSize(Ty) + 63) / 64; 1553 } else { 1554 ElemTy = llvm::Type::getInt32Ty(VMContext); 1555 SizeRegs = (Context.getTypeSize(Ty) + 31) / 32; 1556 } 1557 std::vector<const llvm::Type*> LLVMFields; 1558 LLVMFields.push_back(llvm::ArrayType::get(ElemTy, SizeRegs)); 1559 const llvm::Type* STy = llvm::StructType::get(VMContext, LLVMFields, true); 1560 return ABIArgInfo::getCoerce(STy); 1561} 1562 1563static bool isIntegerLikeType(QualType Ty, 1564 ASTContext &Context, 1565 llvm::LLVMContext &VMContext) { 1566 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 1567 // is called integer-like if its size is less than or equal to one word, and 1568 // the offset of each of its addressable sub-fields is zero. 1569 1570 uint64_t Size = Context.getTypeSize(Ty); 1571 1572 // Check that the type fits in a word. 1573 if (Size > 32) 1574 return false; 1575 1576 // FIXME: Handle vector types! 1577 if (Ty->isVectorType()) 1578 return false; 1579 1580 // Float types are never treated as "integer like". 1581 if (Ty->isRealFloatingType()) 1582 return false; 1583 1584 // If this is a builtin or pointer type then it is ok. 1585 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 1586 return true; 1587 1588 // Small complex integer types are "integer like". 1589 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 1590 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 1591 1592 // Single element and zero sized arrays should be allowed, by the definition 1593 // above, but they are not. 1594 1595 // Otherwise, it must be a record type. 1596 const RecordType *RT = Ty->getAs<RecordType>(); 1597 if (!RT) return false; 1598 1599 // Ignore records with flexible arrays. 1600 const RecordDecl *RD = RT->getDecl(); 1601 if (RD->hasFlexibleArrayMember()) 1602 return false; 1603 1604 // Check that all sub-fields are at offset 0, and are themselves "integer 1605 // like". 1606 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1607 1608 bool HadField = false; 1609 unsigned idx = 0; 1610 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1611 i != e; ++i, ++idx) { 1612 const FieldDecl *FD = *i; 1613 1614 // Bit-fields are not addressable, we only need to verify they are "integer 1615 // like". We still have to disallow a subsequent non-bitfield, for example: 1616 // struct { int : 0; int x } 1617 // is non-integer like according to gcc. 1618 if (FD->isBitField()) { 1619 if (!RD->isUnion()) 1620 HadField = true; 1621 1622 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 1623 return false; 1624 1625 continue; 1626 } 1627 1628 // Check if this field is at offset 0. 1629 if (Layout.getFieldOffset(idx) != 0) 1630 return false; 1631 1632 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 1633 return false; 1634 1635 // Only allow at most one field in a structure. This doesn't match the 1636 // wording above, but follows gcc in situations with a field following an 1637 // empty structure. 1638 if (!RD->isUnion()) { 1639 if (HadField) 1640 return false; 1641 1642 HadField = true; 1643 } 1644 } 1645 1646 return true; 1647} 1648 1649ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy, 1650 ASTContext &Context, 1651 llvm::LLVMContext &VMContext) const { 1652 if (RetTy->isVoidType()) 1653 return ABIArgInfo::getIgnore(); 1654 1655 if (!CodeGenFunction::hasAggregateLLVMType(RetTy)) 1656 return (RetTy->isPromotableIntegerType() ? 1657 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1658 1659 // Are we following APCS? 1660 if (getABIKind() == APCS) { 1661 if (isEmptyRecord(Context, RetTy, false)) 1662 return ABIArgInfo::getIgnore(); 1663 1664 // Complex types are all returned as packed integers. 1665 // 1666 // FIXME: Consider using 2 x vector types if the back end handles them 1667 // correctly. 1668 if (RetTy->isAnyComplexType()) 1669 return ABIArgInfo::getCoerce(llvm::IntegerType::get( 1670 VMContext, Context.getTypeSize(RetTy))); 1671 1672 // Integer like structures are returned in r0. 1673 if (isIntegerLikeType(RetTy, Context, VMContext)) { 1674 // Return in the smallest viable integer type. 1675 uint64_t Size = Context.getTypeSize(RetTy); 1676 if (Size <= 8) 1677 return ABIArgInfo::getCoerce(llvm::Type::getInt8Ty(VMContext)); 1678 if (Size <= 16) 1679 return ABIArgInfo::getCoerce(llvm::Type::getInt16Ty(VMContext)); 1680 return ABIArgInfo::getCoerce(llvm::Type::getInt32Ty(VMContext)); 1681 } 1682 1683 // Otherwise return in memory. 1684 return ABIArgInfo::getIndirect(0); 1685 } 1686 1687 // Otherwise this is an AAPCS variant. 1688 1689 if (isEmptyRecord(Context, RetTy, true)) 1690 return ABIArgInfo::getIgnore(); 1691 1692 // Aggregates <= 4 bytes are returned in r0; other aggregates 1693 // are returned indirectly. 1694 uint64_t Size = Context.getTypeSize(RetTy); 1695 if (Size <= 32) { 1696 // Return in the smallest viable integer type. 1697 if (Size <= 8) 1698 return ABIArgInfo::getCoerce(llvm::Type::getInt8Ty(VMContext)); 1699 if (Size <= 16) 1700 return ABIArgInfo::getCoerce(llvm::Type::getInt16Ty(VMContext)); 1701 return ABIArgInfo::getCoerce(llvm::Type::getInt32Ty(VMContext)); 1702 } 1703 1704 return ABIArgInfo::getIndirect(0); 1705} 1706 1707llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1708 CodeGenFunction &CGF) const { 1709 // FIXME: Need to handle alignment 1710 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 1711 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1712 1713 CGBuilderTy &Builder = CGF.Builder; 1714 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1715 "ap"); 1716 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1717 llvm::Type *PTy = 1718 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 1719 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1720 1721 uint64_t Offset = 1722 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 1723 llvm::Value *NextAddr = 1724 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 1725 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 1726 "ap.next"); 1727 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1728 1729 return AddrTyped; 1730} 1731 1732ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy, 1733 ASTContext &Context, 1734 llvm::LLVMContext &VMContext) const { 1735 if (RetTy->isVoidType()) { 1736 return ABIArgInfo::getIgnore(); 1737 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 1738 return ABIArgInfo::getIndirect(0); 1739 } else { 1740 return (RetTy->isPromotableIntegerType() ? 1741 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1742 } 1743} 1744 1745// SystemZ ABI Implementation 1746 1747namespace { 1748 1749class SystemZABIInfo : public ABIInfo { 1750 bool isPromotableIntegerType(QualType Ty) const; 1751 1752 ABIArgInfo classifyReturnType(QualType RetTy, ASTContext &Context, 1753 llvm::LLVMContext &VMContext) const; 1754 1755 ABIArgInfo classifyArgumentType(QualType RetTy, ASTContext &Context, 1756 llvm::LLVMContext &VMContext) const; 1757 1758 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1759 llvm::LLVMContext &VMContext) const { 1760 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 1761 Context, VMContext); 1762 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1763 it != ie; ++it) 1764 it->info = classifyArgumentType(it->type, Context, VMContext); 1765 } 1766 1767 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1768 CodeGenFunction &CGF) const; 1769}; 1770 1771class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 1772public: 1773 SystemZTargetCodeGenInfo():TargetCodeGenInfo(new SystemZABIInfo()) {} 1774}; 1775 1776} 1777 1778bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 1779 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 1780 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 1781 switch (BT->getKind()) { 1782 case BuiltinType::Bool: 1783 case BuiltinType::Char_S: 1784 case BuiltinType::Char_U: 1785 case BuiltinType::SChar: 1786 case BuiltinType::UChar: 1787 case BuiltinType::Short: 1788 case BuiltinType::UShort: 1789 case BuiltinType::Int: 1790 case BuiltinType::UInt: 1791 return true; 1792 default: 1793 return false; 1794 } 1795 return false; 1796} 1797 1798llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1799 CodeGenFunction &CGF) const { 1800 // FIXME: Implement 1801 return 0; 1802} 1803 1804 1805ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy, 1806 ASTContext &Context, 1807 llvm::LLVMContext &VMContext) const { 1808 if (RetTy->isVoidType()) { 1809 return ABIArgInfo::getIgnore(); 1810 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 1811 return ABIArgInfo::getIndirect(0); 1812 } else { 1813 return (isPromotableIntegerType(RetTy) ? 1814 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1815 } 1816} 1817 1818ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty, 1819 ASTContext &Context, 1820 llvm::LLVMContext &VMContext) const { 1821 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 1822 return ABIArgInfo::getIndirect(0); 1823 } else { 1824 return (isPromotableIntegerType(Ty) ? 1825 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1826 } 1827} 1828 1829// MSP430 ABI Implementation 1830 1831namespace { 1832 1833class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 1834public: 1835 MSP430TargetCodeGenInfo():TargetCodeGenInfo(new DefaultABIInfo()) {} 1836 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 1837 CodeGen::CodeGenModule &M) const; 1838}; 1839 1840} 1841 1842void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 1843 llvm::GlobalValue *GV, 1844 CodeGen::CodeGenModule &M) const { 1845 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 1846 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 1847 // Handle 'interrupt' attribute: 1848 llvm::Function *F = cast<llvm::Function>(GV); 1849 1850 // Step 1: Set ISR calling convention. 1851 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 1852 1853 // Step 2: Add attributes goodness. 1854 F->addFnAttr(llvm::Attribute::NoInline); 1855 1856 // Step 3: Emit ISR vector alias. 1857 unsigned Num = attr->getNumber() + 0xffe0; 1858 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 1859 "vector_" + 1860 llvm::LowercaseString(llvm::utohexstr(Num)), 1861 GV, &M.getModule()); 1862 } 1863 } 1864} 1865 1866const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() const { 1867 if (TheTargetCodeGenInfo) 1868 return *TheTargetCodeGenInfo; 1869 1870 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 1871 // free it. 1872 1873 const llvm::Triple &Triple(getContext().Target.getTriple()); 1874 switch (Triple.getArch()) { 1875 default: 1876 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo); 1877 1878 case llvm::Triple::arm: 1879 case llvm::Triple::thumb: 1880 // FIXME: We want to know the float calling convention as well. 1881 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0) 1882 return *(TheTargetCodeGenInfo = 1883 new ARMTargetCodeGenInfo(ARMABIInfo::APCS)); 1884 1885 return *(TheTargetCodeGenInfo = 1886 new ARMTargetCodeGenInfo(ARMABIInfo::AAPCS)); 1887 1888 case llvm::Triple::pic16: 1889 return *(TheTargetCodeGenInfo = new PIC16TargetCodeGenInfo()); 1890 1891 case llvm::Triple::systemz: 1892 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo()); 1893 1894 case llvm::Triple::msp430: 1895 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo()); 1896 1897 case llvm::Triple::x86: 1898 switch (Triple.getOS()) { 1899 case llvm::Triple::Darwin: 1900 return *(TheTargetCodeGenInfo = 1901 new X86_32TargetCodeGenInfo(Context, true, true)); 1902 case llvm::Triple::Cygwin: 1903 case llvm::Triple::MinGW32: 1904 case llvm::Triple::MinGW64: 1905 case llvm::Triple::AuroraUX: 1906 case llvm::Triple::DragonFly: 1907 case llvm::Triple::FreeBSD: 1908 case llvm::Triple::OpenBSD: 1909 return *(TheTargetCodeGenInfo = 1910 new X86_32TargetCodeGenInfo(Context, false, true)); 1911 1912 default: 1913 return *(TheTargetCodeGenInfo = 1914 new X86_32TargetCodeGenInfo(Context, false, false)); 1915 } 1916 1917 case llvm::Triple::x86_64: 1918 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo()); 1919 } 1920} 1921