TargetInfo.cpp revision 7b0a0383ef5ba23cbf2968f7cb314be0b80847e8
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "clang/Frontend/CodeGenOptions.h" 20#include "llvm/Type.h" 21#include "llvm/Target/TargetData.h" 22#include "llvm/ADT/Triple.h" 23#include "llvm/Support/raw_ostream.h" 24using namespace clang; 25using namespace CodeGen; 26 27static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 28 llvm::Value *Array, 29 llvm::Value *Value, 30 unsigned FirstIndex, 31 unsigned LastIndex) { 32 // Alternatively, we could emit this as a loop in the source. 33 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 34 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 35 Builder.CreateStore(Value, Cell); 36 } 37} 38 39static bool isAggregateTypeForABI(QualType T) { 40 return CodeGenFunction::hasAggregateLLVMType(T) || 41 T->isMemberFunctionPointerType(); 42} 43 44ABIInfo::~ABIInfo() {} 45 46ASTContext &ABIInfo::getContext() const { 47 return CGT.getContext(); 48} 49 50llvm::LLVMContext &ABIInfo::getVMContext() const { 51 return CGT.getLLVMContext(); 52} 53 54const llvm::TargetData &ABIInfo::getTargetData() const { 55 return CGT.getTargetData(); 56} 57 58 59void ABIArgInfo::dump() const { 60 raw_ostream &OS = llvm::errs(); 61 OS << "(ABIArgInfo Kind="; 62 switch (TheKind) { 63 case Direct: 64 OS << "Direct Type="; 65 if (llvm::Type *Ty = getCoerceToType()) 66 Ty->print(OS); 67 else 68 OS << "null"; 69 break; 70 case Extend: 71 OS << "Extend"; 72 break; 73 case Ignore: 74 OS << "Ignore"; 75 break; 76 case Indirect: 77 OS << "Indirect Align=" << getIndirectAlign() 78 << " ByVal=" << getIndirectByVal() 79 << " Realign=" << getIndirectRealign(); 80 break; 81 case Expand: 82 OS << "Expand"; 83 break; 84 } 85 OS << ")\n"; 86} 87 88TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 89 90static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 91 92/// isEmptyField - Return true iff a the field is "empty", that is it 93/// is an unnamed bit-field or an (array of) empty record(s). 94static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 95 bool AllowArrays) { 96 if (FD->isUnnamedBitfield()) 97 return true; 98 99 QualType FT = FD->getType(); 100 101 // Constant arrays of empty records count as empty, strip them off. 102 if (AllowArrays) 103 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 104 FT = AT->getElementType(); 105 106 const RecordType *RT = FT->getAs<RecordType>(); 107 if (!RT) 108 return false; 109 110 // C++ record fields are never empty, at least in the Itanium ABI. 111 // 112 // FIXME: We should use a predicate for whether this behavior is true in the 113 // current ABI. 114 if (isa<CXXRecordDecl>(RT->getDecl())) 115 return false; 116 117 return isEmptyRecord(Context, FT, AllowArrays); 118} 119 120/// isEmptyRecord - Return true iff a structure contains only empty 121/// fields. Note that a structure with a flexible array member is not 122/// considered empty. 123static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 124 const RecordType *RT = T->getAs<RecordType>(); 125 if (!RT) 126 return 0; 127 const RecordDecl *RD = RT->getDecl(); 128 if (RD->hasFlexibleArrayMember()) 129 return false; 130 131 // If this is a C++ record, check the bases first. 132 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 133 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 134 e = CXXRD->bases_end(); i != e; ++i) 135 if (!isEmptyRecord(Context, i->getType(), true)) 136 return false; 137 138 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 139 i != e; ++i) 140 if (!isEmptyField(Context, *i, AllowArrays)) 141 return false; 142 return true; 143} 144 145/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 146/// a non-trivial destructor or a non-trivial copy constructor. 147static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 148 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 149 if (!RD) 150 return false; 151 152 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 153} 154 155/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 156/// a record type with either a non-trivial destructor or a non-trivial copy 157/// constructor. 158static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 159 const RecordType *RT = T->getAs<RecordType>(); 160 if (!RT) 161 return false; 162 163 return hasNonTrivialDestructorOrCopyConstructor(RT); 164} 165 166/// isSingleElementStruct - Determine if a structure is a "single 167/// element struct", i.e. it has exactly one non-empty field or 168/// exactly one field which is itself a single element 169/// struct. Structures with flexible array members are never 170/// considered single element structs. 171/// 172/// \return The field declaration for the single non-empty field, if 173/// it exists. 174static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 175 const RecordType *RT = T->getAsStructureType(); 176 if (!RT) 177 return 0; 178 179 const RecordDecl *RD = RT->getDecl(); 180 if (RD->hasFlexibleArrayMember()) 181 return 0; 182 183 const Type *Found = 0; 184 185 // If this is a C++ record, check the bases first. 186 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 187 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 188 e = CXXRD->bases_end(); i != e; ++i) { 189 // Ignore empty records. 190 if (isEmptyRecord(Context, i->getType(), true)) 191 continue; 192 193 // If we already found an element then this isn't a single-element struct. 194 if (Found) 195 return 0; 196 197 // If this is non-empty and not a single element struct, the composite 198 // cannot be a single element struct. 199 Found = isSingleElementStruct(i->getType(), Context); 200 if (!Found) 201 return 0; 202 } 203 } 204 205 // Check for single element. 206 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 207 i != e; ++i) { 208 const FieldDecl *FD = *i; 209 QualType FT = FD->getType(); 210 211 // Ignore empty fields. 212 if (isEmptyField(Context, FD, true)) 213 continue; 214 215 // If we already found an element then this isn't a single-element 216 // struct. 217 if (Found) 218 return 0; 219 220 // Treat single element arrays as the element. 221 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 222 if (AT->getSize().getZExtValue() != 1) 223 break; 224 FT = AT->getElementType(); 225 } 226 227 if (!isAggregateTypeForABI(FT)) { 228 Found = FT.getTypePtr(); 229 } else { 230 Found = isSingleElementStruct(FT, Context); 231 if (!Found) 232 return 0; 233 } 234 } 235 236 return Found; 237} 238 239static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 240 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 241 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 242 !Ty->isBlockPointerType()) 243 return false; 244 245 uint64_t Size = Context.getTypeSize(Ty); 246 return Size == 32 || Size == 64; 247} 248 249/// canExpandIndirectArgument - Test whether an argument type which is to be 250/// passed indirectly (on the stack) would have the equivalent layout if it was 251/// expanded into separate arguments. If so, we prefer to do the latter to avoid 252/// inhibiting optimizations. 253/// 254// FIXME: This predicate is missing many cases, currently it just follows 255// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 256// should probably make this smarter, or better yet make the LLVM backend 257// capable of handling it. 258static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 259 // We can only expand structure types. 260 const RecordType *RT = Ty->getAs<RecordType>(); 261 if (!RT) 262 return false; 263 264 // We can only expand (C) structures. 265 // 266 // FIXME: This needs to be generalized to handle classes as well. 267 const RecordDecl *RD = RT->getDecl(); 268 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 269 return false; 270 271 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 272 i != e; ++i) { 273 const FieldDecl *FD = *i; 274 275 if (!is32Or64BitBasicType(FD->getType(), Context)) 276 return false; 277 278 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 279 // how to expand them yet, and the predicate for telling if a bitfield still 280 // counts as "basic" is more complicated than what we were doing previously. 281 if (FD->isBitField()) 282 return false; 283 } 284 285 return true; 286} 287 288namespace { 289/// DefaultABIInfo - The default implementation for ABI specific 290/// details. This implementation provides information which results in 291/// self-consistent and sensible LLVM IR generation, but does not 292/// conform to any particular ABI. 293class DefaultABIInfo : public ABIInfo { 294public: 295 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 296 297 ABIArgInfo classifyReturnType(QualType RetTy) const; 298 ABIArgInfo classifyArgumentType(QualType RetTy) const; 299 300 virtual void computeInfo(CGFunctionInfo &FI) const { 301 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 302 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 303 it != ie; ++it) 304 it->info = classifyArgumentType(it->type); 305 } 306 307 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 308 CodeGenFunction &CGF) const; 309}; 310 311class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 312public: 313 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 314 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 315}; 316 317llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 318 CodeGenFunction &CGF) const { 319 return 0; 320} 321 322ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 323 if (isAggregateTypeForABI(Ty)) 324 return ABIArgInfo::getIndirect(0); 325 326 // Treat an enum type as its underlying type. 327 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 328 Ty = EnumTy->getDecl()->getIntegerType(); 329 330 return (Ty->isPromotableIntegerType() ? 331 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 332} 333 334ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 335 if (RetTy->isVoidType()) 336 return ABIArgInfo::getIgnore(); 337 338 if (isAggregateTypeForABI(RetTy)) 339 return ABIArgInfo::getIndirect(0); 340 341 // Treat an enum type as its underlying type. 342 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 343 RetTy = EnumTy->getDecl()->getIntegerType(); 344 345 return (RetTy->isPromotableIntegerType() ? 346 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 347} 348 349/// UseX86_MMXType - Return true if this is an MMX type that should use the special 350/// x86_mmx type. 351bool UseX86_MMXType(llvm::Type *IRType) { 352 // If the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>, use the 353 // special x86_mmx type. 354 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && 355 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && 356 IRType->getScalarSizeInBits() != 64; 357} 358 359static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 360 StringRef Constraint, 361 llvm::Type* Ty) { 362 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) 363 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext()); 364 return Ty; 365} 366 367//===----------------------------------------------------------------------===// 368// X86-32 ABI Implementation 369//===----------------------------------------------------------------------===// 370 371/// X86_32ABIInfo - The X86-32 ABI information. 372class X86_32ABIInfo : public ABIInfo { 373 static const unsigned MinABIStackAlignInBytes = 4; 374 375 bool IsDarwinVectorABI; 376 bool IsSmallStructInRegABI; 377 bool IsMMXDisabled; 378 379 static bool isRegisterSize(unsigned Size) { 380 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 381 } 382 383 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 384 385 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 386 /// such that the argument will be passed in memory. 387 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const; 388 389 /// \brief Return the alignment to use for the given type on the stack. 390 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const; 391 392public: 393 394 ABIArgInfo classifyReturnType(QualType RetTy) const; 395 ABIArgInfo classifyArgumentType(QualType RetTy) const; 396 397 virtual void computeInfo(CGFunctionInfo &FI) const { 398 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 399 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 400 it != ie; ++it) 401 it->info = classifyArgumentType(it->type); 402 } 403 404 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 405 CodeGenFunction &CGF) const; 406 407 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m) 408 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p), 409 IsMMXDisabled(m) {} 410}; 411 412class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 413public: 414 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m) 415 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, m)) {} 416 417 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 418 CodeGen::CodeGenModule &CGM) const; 419 420 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 421 // Darwin uses different dwarf register numbers for EH. 422 if (CGM.isTargetDarwin()) return 5; 423 424 return 4; 425 } 426 427 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 428 llvm::Value *Address) const; 429 430 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 431 StringRef Constraint, 432 llvm::Type* Ty) const { 433 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 434 } 435 436}; 437 438} 439 440/// shouldReturnTypeInRegister - Determine if the given type should be 441/// passed in a register (for the Darwin ABI). 442bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 443 ASTContext &Context) { 444 uint64_t Size = Context.getTypeSize(Ty); 445 446 // Type must be register sized. 447 if (!isRegisterSize(Size)) 448 return false; 449 450 if (Ty->isVectorType()) { 451 // 64- and 128- bit vectors inside structures are not returned in 452 // registers. 453 if (Size == 64 || Size == 128) 454 return false; 455 456 return true; 457 } 458 459 // If this is a builtin, pointer, enum, complex type, member pointer, or 460 // member function pointer it is ok. 461 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 462 Ty->isAnyComplexType() || Ty->isEnumeralType() || 463 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 464 return true; 465 466 // Arrays are treated like records. 467 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 468 return shouldReturnTypeInRegister(AT->getElementType(), Context); 469 470 // Otherwise, it must be a record type. 471 const RecordType *RT = Ty->getAs<RecordType>(); 472 if (!RT) return false; 473 474 // FIXME: Traverse bases here too. 475 476 // Structure types are passed in register if all fields would be 477 // passed in a register. 478 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 479 e = RT->getDecl()->field_end(); i != e; ++i) { 480 const FieldDecl *FD = *i; 481 482 // Empty fields are ignored. 483 if (isEmptyField(Context, FD, true)) 484 continue; 485 486 // Check fields recursively. 487 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 488 return false; 489 } 490 491 return true; 492} 493 494ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy) const { 495 if (RetTy->isVoidType()) 496 return ABIArgInfo::getIgnore(); 497 498 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 499 // On Darwin, some vectors are returned in registers. 500 if (IsDarwinVectorABI) { 501 uint64_t Size = getContext().getTypeSize(RetTy); 502 503 // 128-bit vectors are a special case; they are returned in 504 // registers and we need to make sure to pick a type the LLVM 505 // backend will like. 506 if (Size == 128) 507 return ABIArgInfo::getDirect(llvm::VectorType::get( 508 llvm::Type::getInt64Ty(getVMContext()), 2)); 509 510 // Always return in register if it fits in a general purpose 511 // register, or if it is 64 bits and has a single element. 512 if ((Size == 8 || Size == 16 || Size == 32) || 513 (Size == 64 && VT->getNumElements() == 1)) 514 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 515 Size)); 516 517 return ABIArgInfo::getIndirect(0); 518 } 519 520 return ABIArgInfo::getDirect(); 521 } 522 523 if (isAggregateTypeForABI(RetTy)) { 524 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 525 // Structures with either a non-trivial destructor or a non-trivial 526 // copy constructor are always indirect. 527 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 528 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 529 530 // Structures with flexible arrays are always indirect. 531 if (RT->getDecl()->hasFlexibleArrayMember()) 532 return ABIArgInfo::getIndirect(0); 533 } 534 535 // If specified, structs and unions are always indirect. 536 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 537 return ABIArgInfo::getIndirect(0); 538 539 // Classify "single element" structs as their element type. 540 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) { 541 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 542 if (BT->isIntegerType()) { 543 // We need to use the size of the structure, padding 544 // bit-fields can adjust that to be larger than the single 545 // element type. 546 uint64_t Size = getContext().getTypeSize(RetTy); 547 return ABIArgInfo::getDirect( 548 llvm::IntegerType::get(getVMContext(), (unsigned)Size)); 549 } 550 551 if (BT->getKind() == BuiltinType::Float) { 552 assert(getContext().getTypeSize(RetTy) == 553 getContext().getTypeSize(SeltTy) && 554 "Unexpect single element structure size!"); 555 return ABIArgInfo::getDirect(llvm::Type::getFloatTy(getVMContext())); 556 } 557 558 if (BT->getKind() == BuiltinType::Double) { 559 assert(getContext().getTypeSize(RetTy) == 560 getContext().getTypeSize(SeltTy) && 561 "Unexpect single element structure size!"); 562 return ABIArgInfo::getDirect(llvm::Type::getDoubleTy(getVMContext())); 563 } 564 } else if (SeltTy->isPointerType()) { 565 // FIXME: It would be really nice if this could come out as the proper 566 // pointer type. 567 llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(getVMContext()); 568 return ABIArgInfo::getDirect(PtrTy); 569 } else if (SeltTy->isVectorType()) { 570 // 64- and 128-bit vectors are never returned in a 571 // register when inside a structure. 572 uint64_t Size = getContext().getTypeSize(RetTy); 573 if (Size == 64 || Size == 128) 574 return ABIArgInfo::getIndirect(0); 575 576 return classifyReturnType(QualType(SeltTy, 0)); 577 } 578 } 579 580 // Small structures which are register sized are generally returned 581 // in a register. 582 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext())) { 583 uint64_t Size = getContext().getTypeSize(RetTy); 584 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 585 } 586 587 return ABIArgInfo::getIndirect(0); 588 } 589 590 // Treat an enum type as its underlying type. 591 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 592 RetTy = EnumTy->getDecl()->getIntegerType(); 593 594 return (RetTy->isPromotableIntegerType() ? 595 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 596} 597 598static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) { 599 const RecordType *RT = Ty->getAs<RecordType>(); 600 if (!RT) 601 return 0; 602 const RecordDecl *RD = RT->getDecl(); 603 604 // If this is a C++ record, check the bases first. 605 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 606 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 607 e = CXXRD->bases_end(); i != e; ++i) 608 if (!isRecordWithSSEVectorType(Context, i->getType())) 609 return false; 610 611 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 612 i != e; ++i) { 613 QualType FT = i->getType(); 614 615 if (FT->getAs<VectorType>() && Context.getTypeSize(Ty) == 128) 616 return true; 617 618 if (isRecordWithSSEVectorType(Context, FT)) 619 return true; 620 } 621 622 return false; 623} 624 625unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty, 626 unsigned Align) const { 627 // Otherwise, if the alignment is less than or equal to the minimum ABI 628 // alignment, just use the default; the backend will handle this. 629 if (Align <= MinABIStackAlignInBytes) 630 return 0; // Use default alignment. 631 632 // On non-Darwin, the stack type alignment is always 4. 633 if (!IsDarwinVectorABI) { 634 // Set explicit alignment, since we may need to realign the top. 635 return MinABIStackAlignInBytes; 636 } 637 638 // Otherwise, if the type contains an SSE vector type, the alignment is 16. 639 if (isRecordWithSSEVectorType(getContext(), Ty)) 640 return 16; 641 642 return MinABIStackAlignInBytes; 643} 644 645ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const { 646 if (!ByVal) 647 return ABIArgInfo::getIndirect(0, false); 648 649 // Compute the byval alignment. 650 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 651 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign); 652 if (StackAlign == 0) 653 return ABIArgInfo::getIndirect(4); 654 655 // If the stack alignment is less than the type alignment, realign the 656 // argument. 657 if (StackAlign < TypeAlign) 658 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, 659 /*Realign=*/true); 660 661 return ABIArgInfo::getIndirect(StackAlign); 662} 663 664ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const { 665 // FIXME: Set alignment on indirect arguments. 666 if (isAggregateTypeForABI(Ty)) { 667 // Structures with flexible arrays are always indirect. 668 if (const RecordType *RT = Ty->getAs<RecordType>()) { 669 // Structures with either a non-trivial destructor or a non-trivial 670 // copy constructor are always indirect. 671 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 672 return getIndirectResult(Ty, /*ByVal=*/false); 673 674 if (RT->getDecl()->hasFlexibleArrayMember()) 675 return getIndirectResult(Ty); 676 } 677 678 // Ignore empty structs. 679 if (Ty->isStructureType() && getContext().getTypeSize(Ty) == 0) 680 return ABIArgInfo::getIgnore(); 681 682 // Expand small (<= 128-bit) record types when we know that the stack layout 683 // of those arguments will match the struct. This is important because the 684 // LLVM backend isn't smart enough to remove byval, which inhibits many 685 // optimizations. 686 if (getContext().getTypeSize(Ty) <= 4*32 && 687 canExpandIndirectArgument(Ty, getContext())) 688 return ABIArgInfo::getExpand(); 689 690 return getIndirectResult(Ty); 691 } 692 693 if (const VectorType *VT = Ty->getAs<VectorType>()) { 694 // On Darwin, some vectors are passed in memory, we handle this by passing 695 // it as an i8/i16/i32/i64. 696 if (IsDarwinVectorABI) { 697 uint64_t Size = getContext().getTypeSize(Ty); 698 if ((Size == 8 || Size == 16 || Size == 32) || 699 (Size == 64 && VT->getNumElements() == 1)) 700 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 701 Size)); 702 } 703 704 llvm::Type *IRType = CGT.ConvertType(Ty); 705 if (UseX86_MMXType(IRType)) { 706 if (IsMMXDisabled) 707 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 708 64)); 709 ABIArgInfo AAI = ABIArgInfo::getDirect(IRType); 710 AAI.setCoerceToType(llvm::Type::getX86_MMXTy(getVMContext())); 711 return AAI; 712 } 713 714 return ABIArgInfo::getDirect(); 715 } 716 717 718 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 719 Ty = EnumTy->getDecl()->getIntegerType(); 720 721 return (Ty->isPromotableIntegerType() ? 722 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 723} 724 725llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 726 CodeGenFunction &CGF) const { 727 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 728 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 729 730 CGBuilderTy &Builder = CGF.Builder; 731 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 732 "ap"); 733 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 734 llvm::Type *PTy = 735 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 736 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 737 738 uint64_t Offset = 739 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 740 llvm::Value *NextAddr = 741 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 742 "ap.next"); 743 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 744 745 return AddrTyped; 746} 747 748void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 749 llvm::GlobalValue *GV, 750 CodeGen::CodeGenModule &CGM) const { 751 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 752 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 753 // Get the LLVM function. 754 llvm::Function *Fn = cast<llvm::Function>(GV); 755 756 // Now add the 'alignstack' attribute with a value of 16. 757 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 758 } 759 } 760} 761 762bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 763 CodeGen::CodeGenFunction &CGF, 764 llvm::Value *Address) const { 765 CodeGen::CGBuilderTy &Builder = CGF.Builder; 766 llvm::LLVMContext &Context = CGF.getLLVMContext(); 767 768 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 769 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 770 771 // 0-7 are the eight integer registers; the order is different 772 // on Darwin (for EH), but the range is the same. 773 // 8 is %eip. 774 AssignToArrayRange(Builder, Address, Four8, 0, 8); 775 776 if (CGF.CGM.isTargetDarwin()) { 777 // 12-16 are st(0..4). Not sure why we stop at 4. 778 // These have size 16, which is sizeof(long double) on 779 // platforms with 8-byte alignment for that type. 780 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 781 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 782 783 } else { 784 // 9 is %eflags, which doesn't get a size on Darwin for some 785 // reason. 786 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 787 788 // 11-16 are st(0..5). Not sure why we stop at 5. 789 // These have size 12, which is sizeof(long double) on 790 // platforms with 4-byte alignment for that type. 791 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 792 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 793 } 794 795 return false; 796} 797 798//===----------------------------------------------------------------------===// 799// X86-64 ABI Implementation 800//===----------------------------------------------------------------------===// 801 802 803namespace { 804/// X86_64ABIInfo - The X86_64 ABI information. 805class X86_64ABIInfo : public ABIInfo { 806 enum Class { 807 Integer = 0, 808 SSE, 809 SSEUp, 810 X87, 811 X87Up, 812 ComplexX87, 813 NoClass, 814 Memory 815 }; 816 817 /// merge - Implement the X86_64 ABI merging algorithm. 818 /// 819 /// Merge an accumulating classification \arg Accum with a field 820 /// classification \arg Field. 821 /// 822 /// \param Accum - The accumulating classification. This should 823 /// always be either NoClass or the result of a previous merge 824 /// call. In addition, this should never be Memory (the caller 825 /// should just return Memory for the aggregate). 826 static Class merge(Class Accum, Class Field); 827 828 /// postMerge - Implement the X86_64 ABI post merging algorithm. 829 /// 830 /// Post merger cleanup, reduces a malformed Hi and Lo pair to 831 /// final MEMORY or SSE classes when necessary. 832 /// 833 /// \param AggregateSize - The size of the current aggregate in 834 /// the classification process. 835 /// 836 /// \param Lo - The classification for the parts of the type 837 /// residing in the low word of the containing object. 838 /// 839 /// \param Hi - The classification for the parts of the type 840 /// residing in the higher words of the containing object. 841 /// 842 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const; 843 844 /// classify - Determine the x86_64 register classes in which the 845 /// given type T should be passed. 846 /// 847 /// \param Lo - The classification for the parts of the type 848 /// residing in the low word of the containing object. 849 /// 850 /// \param Hi - The classification for the parts of the type 851 /// residing in the high word of the containing object. 852 /// 853 /// \param OffsetBase - The bit offset of this type in the 854 /// containing object. Some parameters are classified different 855 /// depending on whether they straddle an eightbyte boundary. 856 /// 857 /// If a word is unused its result will be NoClass; if a type should 858 /// be passed in Memory then at least the classification of \arg Lo 859 /// will be Memory. 860 /// 861 /// The \arg Lo class will be NoClass iff the argument is ignored. 862 /// 863 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 864 /// also be ComplexX87. 865 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 866 867 llvm::Type *GetByteVectorType(QualType Ty) const; 868 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType, 869 unsigned IROffset, QualType SourceTy, 870 unsigned SourceOffset) const; 871 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType, 872 unsigned IROffset, QualType SourceTy, 873 unsigned SourceOffset) const; 874 875 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 876 /// such that the argument will be returned in memory. 877 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 878 879 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 880 /// such that the argument will be passed in memory. 881 ABIArgInfo getIndirectResult(QualType Ty) const; 882 883 ABIArgInfo classifyReturnType(QualType RetTy) const; 884 885 ABIArgInfo classifyArgumentType(QualType Ty, 886 unsigned &neededInt, 887 unsigned &neededSSE) const; 888 889 /// The 0.98 ABI revision clarified a lot of ambiguities, 890 /// unfortunately in ways that were not always consistent with 891 /// certain previous compilers. In particular, platforms which 892 /// required strict binary compatibility with older versions of GCC 893 /// may need to exempt themselves. 894 bool honorsRevision0_98() const { 895 return !getContext().Target.getTriple().isOSDarwin(); 896 } 897 898public: 899 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 900 901 virtual void computeInfo(CGFunctionInfo &FI) const; 902 903 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 904 CodeGenFunction &CGF) const; 905}; 906 907/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 908class WinX86_64ABIInfo : public ABIInfo { 909 910 ABIArgInfo classify(QualType Ty) const; 911 912public: 913 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 914 915 virtual void computeInfo(CGFunctionInfo &FI) const; 916 917 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 918 CodeGenFunction &CGF) const; 919}; 920 921class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 922public: 923 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 924 : TargetCodeGenInfo(new X86_64ABIInfo(CGT)) {} 925 926 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 927 return 7; 928 } 929 930 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 931 llvm::Value *Address) const { 932 CodeGen::CGBuilderTy &Builder = CGF.Builder; 933 llvm::LLVMContext &Context = CGF.getLLVMContext(); 934 935 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 936 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 937 938 // 0-15 are the 16 integer registers. 939 // 16 is %rip. 940 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 941 942 return false; 943 } 944 945 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 946 StringRef Constraint, 947 llvm::Type* Ty) const { 948 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 949 } 950 951}; 952 953class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 954public: 955 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 956 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {} 957 958 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 959 return 7; 960 } 961 962 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 963 llvm::Value *Address) const { 964 CodeGen::CGBuilderTy &Builder = CGF.Builder; 965 llvm::LLVMContext &Context = CGF.getLLVMContext(); 966 967 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 968 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 969 970 // 0-15 are the 16 integer registers. 971 // 16 is %rip. 972 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 973 974 return false; 975 } 976}; 977 978} 979 980void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo, 981 Class &Hi) const { 982 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 983 // 984 // (a) If one of the classes is Memory, the whole argument is passed in 985 // memory. 986 // 987 // (b) If X87UP is not preceded by X87, the whole argument is passed in 988 // memory. 989 // 990 // (c) If the size of the aggregate exceeds two eightbytes and the first 991 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole 992 // argument is passed in memory. NOTE: This is necessary to keep the 993 // ABI working for processors that don't support the __m256 type. 994 // 995 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE. 996 // 997 // Some of these are enforced by the merging logic. Others can arise 998 // only with unions; for example: 999 // union { _Complex double; unsigned; } 1000 // 1001 // Note that clauses (b) and (c) were added in 0.98. 1002 // 1003 if (Hi == Memory) 1004 Lo = Memory; 1005 if (Hi == X87Up && Lo != X87 && honorsRevision0_98()) 1006 Lo = Memory; 1007 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp)) 1008 Lo = Memory; 1009 if (Hi == SSEUp && Lo != SSE) 1010 Hi = SSE; 1011} 1012 1013X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 1014 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 1015 // classified recursively so that always two fields are 1016 // considered. The resulting class is calculated according to 1017 // the classes of the fields in the eightbyte: 1018 // 1019 // (a) If both classes are equal, this is the resulting class. 1020 // 1021 // (b) If one of the classes is NO_CLASS, the resulting class is 1022 // the other class. 1023 // 1024 // (c) If one of the classes is MEMORY, the result is the MEMORY 1025 // class. 1026 // 1027 // (d) If one of the classes is INTEGER, the result is the 1028 // INTEGER. 1029 // 1030 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 1031 // MEMORY is used as class. 1032 // 1033 // (f) Otherwise class SSE is used. 1034 1035 // Accum should never be memory (we should have returned) or 1036 // ComplexX87 (because this cannot be passed in a structure). 1037 assert((Accum != Memory && Accum != ComplexX87) && 1038 "Invalid accumulated classification during merge."); 1039 if (Accum == Field || Field == NoClass) 1040 return Accum; 1041 if (Field == Memory) 1042 return Memory; 1043 if (Accum == NoClass) 1044 return Field; 1045 if (Accum == Integer || Field == Integer) 1046 return Integer; 1047 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 1048 Accum == X87 || Accum == X87Up) 1049 return Memory; 1050 return SSE; 1051} 1052 1053void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 1054 Class &Lo, Class &Hi) const { 1055 // FIXME: This code can be simplified by introducing a simple value class for 1056 // Class pairs with appropriate constructor methods for the various 1057 // situations. 1058 1059 // FIXME: Some of the split computations are wrong; unaligned vectors 1060 // shouldn't be passed in registers for example, so there is no chance they 1061 // can straddle an eightbyte. Verify & simplify. 1062 1063 Lo = Hi = NoClass; 1064 1065 Class &Current = OffsetBase < 64 ? Lo : Hi; 1066 Current = Memory; 1067 1068 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 1069 BuiltinType::Kind k = BT->getKind(); 1070 1071 if (k == BuiltinType::Void) { 1072 Current = NoClass; 1073 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 1074 Lo = Integer; 1075 Hi = Integer; 1076 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 1077 Current = Integer; 1078 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 1079 Current = SSE; 1080 } else if (k == BuiltinType::LongDouble) { 1081 Lo = X87; 1082 Hi = X87Up; 1083 } 1084 // FIXME: _Decimal32 and _Decimal64 are SSE. 1085 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 1086 return; 1087 } 1088 1089 if (const EnumType *ET = Ty->getAs<EnumType>()) { 1090 // Classify the underlying integer type. 1091 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 1092 return; 1093 } 1094 1095 if (Ty->hasPointerRepresentation()) { 1096 Current = Integer; 1097 return; 1098 } 1099 1100 if (Ty->isMemberPointerType()) { 1101 if (Ty->isMemberFunctionPointerType()) 1102 Lo = Hi = Integer; 1103 else 1104 Current = Integer; 1105 return; 1106 } 1107 1108 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1109 uint64_t Size = getContext().getTypeSize(VT); 1110 if (Size == 32) { 1111 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1112 // float> as integer. 1113 Current = Integer; 1114 1115 // If this type crosses an eightbyte boundary, it should be 1116 // split. 1117 uint64_t EB_Real = (OffsetBase) / 64; 1118 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 1119 if (EB_Real != EB_Imag) 1120 Hi = Lo; 1121 } else if (Size == 64) { 1122 // gcc passes <1 x double> in memory. :( 1123 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 1124 return; 1125 1126 // gcc passes <1 x long long> as INTEGER. 1127 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 1128 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 1129 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 1130 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 1131 Current = Integer; 1132 else 1133 Current = SSE; 1134 1135 // If this type crosses an eightbyte boundary, it should be 1136 // split. 1137 if (OffsetBase && OffsetBase != 64) 1138 Hi = Lo; 1139 } else if (Size == 128 || Size == 256) { 1140 // Arguments of 256-bits are split into four eightbyte chunks. The 1141 // least significant one belongs to class SSE and all the others to class 1142 // SSEUP. The original Lo and Hi design considers that types can't be 1143 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense. 1144 // This design isn't correct for 256-bits, but since there're no cases 1145 // where the upper parts would need to be inspected, avoid adding 1146 // complexity and just consider Hi to match the 64-256 part. 1147 Lo = SSE; 1148 Hi = SSEUp; 1149 } 1150 return; 1151 } 1152 1153 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 1154 QualType ET = getContext().getCanonicalType(CT->getElementType()); 1155 1156 uint64_t Size = getContext().getTypeSize(Ty); 1157 if (ET->isIntegralOrEnumerationType()) { 1158 if (Size <= 64) 1159 Current = Integer; 1160 else if (Size <= 128) 1161 Lo = Hi = Integer; 1162 } else if (ET == getContext().FloatTy) 1163 Current = SSE; 1164 else if (ET == getContext().DoubleTy) 1165 Lo = Hi = SSE; 1166 else if (ET == getContext().LongDoubleTy) 1167 Current = ComplexX87; 1168 1169 // If this complex type crosses an eightbyte boundary then it 1170 // should be split. 1171 uint64_t EB_Real = (OffsetBase) / 64; 1172 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 1173 if (Hi == NoClass && EB_Real != EB_Imag) 1174 Hi = Lo; 1175 1176 return; 1177 } 1178 1179 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 1180 // Arrays are treated like structures. 1181 1182 uint64_t Size = getContext().getTypeSize(Ty); 1183 1184 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1185 // than four eightbytes, ..., it has class MEMORY. 1186 if (Size > 256) 1187 return; 1188 1189 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1190 // fields, it has class MEMORY. 1191 // 1192 // Only need to check alignment of array base. 1193 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1194 return; 1195 1196 // Otherwise implement simplified merge. We could be smarter about 1197 // this, but it isn't worth it and would be harder to verify. 1198 Current = NoClass; 1199 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1200 uint64_t ArraySize = AT->getSize().getZExtValue(); 1201 1202 // The only case a 256-bit wide vector could be used is when the array 1203 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1204 // to work for sizes wider than 128, early check and fallback to memory. 1205 if (Size > 128 && EltSize != 256) 1206 return; 1207 1208 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1209 Class FieldLo, FieldHi; 1210 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 1211 Lo = merge(Lo, FieldLo); 1212 Hi = merge(Hi, FieldHi); 1213 if (Lo == Memory || Hi == Memory) 1214 break; 1215 } 1216 1217 postMerge(Size, Lo, Hi); 1218 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 1219 return; 1220 } 1221 1222 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1223 uint64_t Size = getContext().getTypeSize(Ty); 1224 1225 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1226 // than four eightbytes, ..., it has class MEMORY. 1227 if (Size > 256) 1228 return; 1229 1230 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1231 // copy constructor or a non-trivial destructor, it is passed by invisible 1232 // reference. 1233 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 1234 return; 1235 1236 const RecordDecl *RD = RT->getDecl(); 1237 1238 // Assume variable sized types are passed in memory. 1239 if (RD->hasFlexibleArrayMember()) 1240 return; 1241 1242 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1243 1244 // Reset Lo class, this will be recomputed. 1245 Current = NoClass; 1246 1247 // If this is a C++ record, classify the bases first. 1248 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1249 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1250 e = CXXRD->bases_end(); i != e; ++i) { 1251 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1252 "Unexpected base class!"); 1253 const CXXRecordDecl *Base = 1254 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1255 1256 // Classify this field. 1257 // 1258 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1259 // single eightbyte, each is classified separately. Each eightbyte gets 1260 // initialized to class NO_CLASS. 1261 Class FieldLo, FieldHi; 1262 uint64_t Offset = OffsetBase + Layout.getBaseClassOffsetInBits(Base); 1263 classify(i->getType(), Offset, FieldLo, FieldHi); 1264 Lo = merge(Lo, FieldLo); 1265 Hi = merge(Hi, FieldHi); 1266 if (Lo == Memory || Hi == Memory) 1267 break; 1268 } 1269 } 1270 1271 // Classify the fields one at a time, merging the results. 1272 unsigned idx = 0; 1273 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1274 i != e; ++i, ++idx) { 1275 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1276 bool BitField = i->isBitField(); 1277 1278 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than 1279 // four eightbytes, or it contains unaligned fields, it has class MEMORY. 1280 // 1281 // The only case a 256-bit wide vector could be used is when the struct 1282 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1283 // to work for sizes wider than 128, early check and fallback to memory. 1284 // 1285 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) { 1286 Lo = Memory; 1287 return; 1288 } 1289 // Note, skip this test for bit-fields, see below. 1290 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1291 Lo = Memory; 1292 return; 1293 } 1294 1295 // Classify this field. 1296 // 1297 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1298 // exceeds a single eightbyte, each is classified 1299 // separately. Each eightbyte gets initialized to class 1300 // NO_CLASS. 1301 Class FieldLo, FieldHi; 1302 1303 // Bit-fields require special handling, they do not force the 1304 // structure to be passed in memory even if unaligned, and 1305 // therefore they can straddle an eightbyte. 1306 if (BitField) { 1307 // Ignore padding bit-fields. 1308 if (i->isUnnamedBitfield()) 1309 continue; 1310 1311 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1312 uint64_t Size = 1313 i->getBitWidth()->EvaluateAsInt(getContext()).getZExtValue(); 1314 1315 uint64_t EB_Lo = Offset / 64; 1316 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1317 FieldLo = FieldHi = NoClass; 1318 if (EB_Lo) { 1319 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1320 FieldLo = NoClass; 1321 FieldHi = Integer; 1322 } else { 1323 FieldLo = Integer; 1324 FieldHi = EB_Hi ? Integer : NoClass; 1325 } 1326 } else 1327 classify(i->getType(), Offset, FieldLo, FieldHi); 1328 Lo = merge(Lo, FieldLo); 1329 Hi = merge(Hi, FieldHi); 1330 if (Lo == Memory || Hi == Memory) 1331 break; 1332 } 1333 1334 postMerge(Size, Lo, Hi); 1335 } 1336} 1337 1338ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1339 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1340 // place naturally. 1341 if (!isAggregateTypeForABI(Ty)) { 1342 // Treat an enum type as its underlying type. 1343 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1344 Ty = EnumTy->getDecl()->getIntegerType(); 1345 1346 return (Ty->isPromotableIntegerType() ? 1347 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1348 } 1349 1350 return ABIArgInfo::getIndirect(0); 1351} 1352 1353ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const { 1354 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1355 // place naturally. 1356 if (!isAggregateTypeForABI(Ty)) { 1357 // Treat an enum type as its underlying type. 1358 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1359 Ty = EnumTy->getDecl()->getIntegerType(); 1360 1361 return (Ty->isPromotableIntegerType() ? 1362 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1363 } 1364 1365 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1366 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1367 1368 // Compute the byval alignment. We specify the alignment of the byval in all 1369 // cases so that the mid-level optimizer knows the alignment of the byval. 1370 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U); 1371 return ABIArgInfo::getIndirect(Align); 1372} 1373 1374/// GetByteVectorType - The ABI specifies that a value should be passed in an 1375/// full vector XMM/YMM register. Pick an LLVM IR type that will be passed as a 1376/// vector register. 1377llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const { 1378 llvm::Type *IRType = CGT.ConvertType(Ty); 1379 1380 // Wrapper structs that just contain vectors are passed just like vectors, 1381 // strip them off if present. 1382 llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1383 while (STy && STy->getNumElements() == 1) { 1384 IRType = STy->getElementType(0); 1385 STy = dyn_cast<llvm::StructType>(IRType); 1386 } 1387 1388 // If the preferred type is a 16-byte vector, prefer to pass it. 1389 if (llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1390 llvm::Type *EltTy = VT->getElementType(); 1391 unsigned BitWidth = VT->getBitWidth(); 1392 if ((BitWidth == 128 || BitWidth == 256) && 1393 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1394 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1395 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1396 EltTy->isIntegerTy(128))) 1397 return VT; 1398 } 1399 1400 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1401} 1402 1403/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1404/// is known to either be off the end of the specified type or being in 1405/// alignment padding. The user type specified is known to be at most 128 bits 1406/// in size, and have passed through X86_64ABIInfo::classify with a successful 1407/// classification that put one of the two halves in the INTEGER class. 1408/// 1409/// It is conservatively correct to return false. 1410static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1411 unsigned EndBit, ASTContext &Context) { 1412 // If the bytes being queried are off the end of the type, there is no user 1413 // data hiding here. This handles analysis of builtins, vectors and other 1414 // types that don't contain interesting padding. 1415 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1416 if (TySize <= StartBit) 1417 return true; 1418 1419 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1420 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1421 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1422 1423 // Check each element to see if the element overlaps with the queried range. 1424 for (unsigned i = 0; i != NumElts; ++i) { 1425 // If the element is after the span we care about, then we're done.. 1426 unsigned EltOffset = i*EltSize; 1427 if (EltOffset >= EndBit) break; 1428 1429 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1430 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1431 EndBit-EltOffset, Context)) 1432 return false; 1433 } 1434 // If it overlaps no elements, then it is safe to process as padding. 1435 return true; 1436 } 1437 1438 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1439 const RecordDecl *RD = RT->getDecl(); 1440 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1441 1442 // If this is a C++ record, check the bases first. 1443 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1444 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1445 e = CXXRD->bases_end(); i != e; ++i) { 1446 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1447 "Unexpected base class!"); 1448 const CXXRecordDecl *Base = 1449 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1450 1451 // If the base is after the span we care about, ignore it. 1452 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffsetInBits(Base); 1453 if (BaseOffset >= EndBit) continue; 1454 1455 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1456 if (!BitsContainNoUserData(i->getType(), BaseStart, 1457 EndBit-BaseOffset, Context)) 1458 return false; 1459 } 1460 } 1461 1462 // Verify that no field has data that overlaps the region of interest. Yes 1463 // this could be sped up a lot by being smarter about queried fields, 1464 // however we're only looking at structs up to 16 bytes, so we don't care 1465 // much. 1466 unsigned idx = 0; 1467 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1468 i != e; ++i, ++idx) { 1469 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1470 1471 // If we found a field after the region we care about, then we're done. 1472 if (FieldOffset >= EndBit) break; 1473 1474 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1475 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1476 Context)) 1477 return false; 1478 } 1479 1480 // If nothing in this record overlapped the area of interest, then we're 1481 // clean. 1482 return true; 1483 } 1484 1485 return false; 1486} 1487 1488/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1489/// float member at the specified offset. For example, {int,{float}} has a 1490/// float at offset 4. It is conservatively correct for this routine to return 1491/// false. 1492static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset, 1493 const llvm::TargetData &TD) { 1494 // Base case if we find a float. 1495 if (IROffset == 0 && IRType->isFloatTy()) 1496 return true; 1497 1498 // If this is a struct, recurse into the field at the specified offset. 1499 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1500 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1501 unsigned Elt = SL->getElementContainingOffset(IROffset); 1502 IROffset -= SL->getElementOffset(Elt); 1503 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1504 } 1505 1506 // If this is an array, recurse into the field at the specified offset. 1507 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1508 llvm::Type *EltTy = ATy->getElementType(); 1509 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1510 IROffset -= IROffset/EltSize*EltSize; 1511 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1512 } 1513 1514 return false; 1515} 1516 1517 1518/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1519/// low 8 bytes of an XMM register, corresponding to the SSE class. 1520llvm::Type *X86_64ABIInfo:: 1521GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1522 QualType SourceTy, unsigned SourceOffset) const { 1523 // The only three choices we have are either double, <2 x float>, or float. We 1524 // pass as float if the last 4 bytes is just padding. This happens for 1525 // structs that contain 3 floats. 1526 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1527 SourceOffset*8+64, getContext())) 1528 return llvm::Type::getFloatTy(getVMContext()); 1529 1530 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1531 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1532 // case. 1533 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) && 1534 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData())) 1535 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1536 1537 return llvm::Type::getDoubleTy(getVMContext()); 1538} 1539 1540 1541/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1542/// an 8-byte GPR. This means that we either have a scalar or we are talking 1543/// about the high or low part of an up-to-16-byte struct. This routine picks 1544/// the best LLVM IR type to represent this, which may be i64 or may be anything 1545/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1546/// etc). 1547/// 1548/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1549/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1550/// the 8-byte value references. PrefType may be null. 1551/// 1552/// SourceTy is the source level type for the entire argument. SourceOffset is 1553/// an offset into this that we're processing (which is always either 0 or 8). 1554/// 1555llvm::Type *X86_64ABIInfo:: 1556GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1557 QualType SourceTy, unsigned SourceOffset) const { 1558 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1559 // returning an 8-byte unit starting with it. See if we can safely use it. 1560 if (IROffset == 0) { 1561 // Pointers and int64's always fill the 8-byte unit. 1562 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64)) 1563 return IRType; 1564 1565 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1566 // goodness in the source type is just tail padding. This is allowed to 1567 // kick in for struct {double,int} on the int, but not on 1568 // struct{double,int,int} because we wouldn't return the second int. We 1569 // have to do this analysis on the source type because we can't depend on 1570 // unions being lowered a specific way etc. 1571 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1572 IRType->isIntegerTy(32)) { 1573 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth(); 1574 1575 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1576 SourceOffset*8+64, getContext())) 1577 return IRType; 1578 } 1579 } 1580 1581 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1582 // If this is a struct, recurse into the field at the specified offset. 1583 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy); 1584 if (IROffset < SL->getSizeInBytes()) { 1585 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1586 IROffset -= SL->getElementOffset(FieldIdx); 1587 1588 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1589 SourceTy, SourceOffset); 1590 } 1591 } 1592 1593 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1594 llvm::Type *EltTy = ATy->getElementType(); 1595 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy); 1596 unsigned EltOffset = IROffset/EltSize*EltSize; 1597 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1598 SourceOffset); 1599 } 1600 1601 // Okay, we don't have any better idea of what to pass, so we pass this in an 1602 // integer register that isn't too big to fit the rest of the struct. 1603 unsigned TySizeInBytes = 1604 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 1605 1606 assert(TySizeInBytes != SourceOffset && "Empty field?"); 1607 1608 // It is always safe to classify this as an integer type up to i64 that 1609 // isn't larger than the structure. 1610 return llvm::IntegerType::get(getVMContext(), 1611 std::min(TySizeInBytes-SourceOffset, 8U)*8); 1612} 1613 1614 1615/// GetX86_64ByValArgumentPair - Given a high and low type that can ideally 1616/// be used as elements of a two register pair to pass or return, return a 1617/// first class aggregate to represent them. For example, if the low part of 1618/// a by-value argument should be passed as i32* and the high part as float, 1619/// return {i32*, float}. 1620static llvm::Type * 1621GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi, 1622 const llvm::TargetData &TD) { 1623 // In order to correctly satisfy the ABI, we need to the high part to start 1624 // at offset 8. If the high and low parts we inferred are both 4-byte types 1625 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have 1626 // the second element at offset 8. Check for this: 1627 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo); 1628 unsigned HiAlign = TD.getABITypeAlignment(Hi); 1629 unsigned HiStart = llvm::TargetData::RoundUpAlignment(LoSize, HiAlign); 1630 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!"); 1631 1632 // To handle this, we have to increase the size of the low part so that the 1633 // second element will start at an 8 byte offset. We can't increase the size 1634 // of the second element because it might make us access off the end of the 1635 // struct. 1636 if (HiStart != 8) { 1637 // There are only two sorts of types the ABI generation code can produce for 1638 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32. 1639 // Promote these to a larger type. 1640 if (Lo->isFloatTy()) 1641 Lo = llvm::Type::getDoubleTy(Lo->getContext()); 1642 else { 1643 assert(Lo->isIntegerTy() && "Invalid/unknown lo type"); 1644 Lo = llvm::Type::getInt64Ty(Lo->getContext()); 1645 } 1646 } 1647 1648 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, NULL); 1649 1650 1651 // Verify that the second element is at an 8-byte offset. 1652 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 && 1653 "Invalid x86-64 argument pair!"); 1654 return Result; 1655} 1656 1657ABIArgInfo X86_64ABIInfo:: 1658classifyReturnType(QualType RetTy) const { 1659 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1660 // classification algorithm. 1661 X86_64ABIInfo::Class Lo, Hi; 1662 classify(RetTy, 0, Lo, Hi); 1663 1664 // Check some invariants. 1665 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1666 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1667 1668 llvm::Type *ResType = 0; 1669 switch (Lo) { 1670 case NoClass: 1671 if (Hi == NoClass) 1672 return ABIArgInfo::getIgnore(); 1673 // If the low part is just padding, it takes no register, leave ResType 1674 // null. 1675 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1676 "Unknown missing lo part"); 1677 break; 1678 1679 case SSEUp: 1680 case X87Up: 1681 assert(0 && "Invalid classification for lo word."); 1682 1683 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1684 // hidden argument. 1685 case Memory: 1686 return getIndirectReturnResult(RetTy); 1687 1688 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1689 // available register of the sequence %rax, %rdx is used. 1690 case Integer: 1691 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 1692 1693 // If we have a sign or zero extended integer, make sure to return Extend 1694 // so that the parameter gets the right LLVM IR attributes. 1695 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1696 // Treat an enum type as its underlying type. 1697 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1698 RetTy = EnumTy->getDecl()->getIntegerType(); 1699 1700 if (RetTy->isIntegralOrEnumerationType() && 1701 RetTy->isPromotableIntegerType()) 1702 return ABIArgInfo::getExtend(); 1703 } 1704 break; 1705 1706 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1707 // available SSE register of the sequence %xmm0, %xmm1 is used. 1708 case SSE: 1709 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 1710 break; 1711 1712 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1713 // returned on the X87 stack in %st0 as 80-bit x87 number. 1714 case X87: 1715 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 1716 break; 1717 1718 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1719 // part of the value is returned in %st0 and the imaginary part in 1720 // %st1. 1721 case ComplexX87: 1722 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1723 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()), 1724 llvm::Type::getX86_FP80Ty(getVMContext()), 1725 NULL); 1726 break; 1727 } 1728 1729 llvm::Type *HighPart = 0; 1730 switch (Hi) { 1731 // Memory was handled previously and X87 should 1732 // never occur as a hi class. 1733 case Memory: 1734 case X87: 1735 assert(0 && "Invalid classification for hi word."); 1736 1737 case ComplexX87: // Previously handled. 1738 case NoClass: 1739 break; 1740 1741 case Integer: 1742 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1743 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1744 return ABIArgInfo::getDirect(HighPart, 8); 1745 break; 1746 case SSE: 1747 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1748 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1749 return ABIArgInfo::getDirect(HighPart, 8); 1750 break; 1751 1752 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1753 // is passed in the next available eightbyte chunk if the last used 1754 // vector register. 1755 // 1756 // SSEUP should always be preceded by SSE, just widen. 1757 case SSEUp: 1758 assert(Lo == SSE && "Unexpected SSEUp classification."); 1759 ResType = GetByteVectorType(RetTy); 1760 break; 1761 1762 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1763 // returned together with the previous X87 value in %st0. 1764 case X87Up: 1765 // If X87Up is preceded by X87, we don't need to do 1766 // anything. However, in some cases with unions it may not be 1767 // preceded by X87. In such situations we follow gcc and pass the 1768 // extra bits in an SSE reg. 1769 if (Lo != X87) { 1770 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1771 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1772 return ABIArgInfo::getDirect(HighPart, 8); 1773 } 1774 break; 1775 } 1776 1777 // If a high part was specified, merge it together with the low part. It is 1778 // known to pass in the high eightbyte of the result. We do this by forming a 1779 // first class struct aggregate with the high and low part: {low, high} 1780 if (HighPart) 1781 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1782 1783 return ABIArgInfo::getDirect(ResType); 1784} 1785 1786ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt, 1787 unsigned &neededSSE) const { 1788 X86_64ABIInfo::Class Lo, Hi; 1789 classify(Ty, 0, Lo, Hi); 1790 1791 // Check some invariants. 1792 // FIXME: Enforce these by construction. 1793 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1794 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1795 1796 neededInt = 0; 1797 neededSSE = 0; 1798 llvm::Type *ResType = 0; 1799 switch (Lo) { 1800 case NoClass: 1801 if (Hi == NoClass) 1802 return ABIArgInfo::getIgnore(); 1803 // If the low part is just padding, it takes no register, leave ResType 1804 // null. 1805 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1806 "Unknown missing lo part"); 1807 break; 1808 1809 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1810 // on the stack. 1811 case Memory: 1812 1813 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1814 // COMPLEX_X87, it is passed in memory. 1815 case X87: 1816 case ComplexX87: 1817 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1818 ++neededInt; 1819 return getIndirectResult(Ty); 1820 1821 case SSEUp: 1822 case X87Up: 1823 assert(0 && "Invalid classification for lo word."); 1824 1825 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1826 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1827 // and %r9 is used. 1828 case Integer: 1829 ++neededInt; 1830 1831 // Pick an 8-byte type based on the preferred type. 1832 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0); 1833 1834 // If we have a sign or zero extended integer, make sure to return Extend 1835 // so that the parameter gets the right LLVM IR attributes. 1836 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1837 // Treat an enum type as its underlying type. 1838 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1839 Ty = EnumTy->getDecl()->getIntegerType(); 1840 1841 if (Ty->isIntegralOrEnumerationType() && 1842 Ty->isPromotableIntegerType()) 1843 return ABIArgInfo::getExtend(); 1844 } 1845 1846 break; 1847 1848 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1849 // available SSE register is used, the registers are taken in the 1850 // order from %xmm0 to %xmm7. 1851 case SSE: { 1852 llvm::Type *IRType = CGT.ConvertType(Ty); 1853 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0); 1854 ++neededSSE; 1855 break; 1856 } 1857 } 1858 1859 llvm::Type *HighPart = 0; 1860 switch (Hi) { 1861 // Memory was handled previously, ComplexX87 and X87 should 1862 // never occur as hi classes, and X87Up must be preceded by X87, 1863 // which is passed in memory. 1864 case Memory: 1865 case X87: 1866 case ComplexX87: 1867 assert(0 && "Invalid classification for hi word."); 1868 break; 1869 1870 case NoClass: break; 1871 1872 case Integer: 1873 ++neededInt; 1874 // Pick an 8-byte type based on the preferred type. 1875 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 1876 1877 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1878 return ABIArgInfo::getDirect(HighPart, 8); 1879 break; 1880 1881 // X87Up generally doesn't occur here (long double is passed in 1882 // memory), except in situations involving unions. 1883 case X87Up: 1884 case SSE: 1885 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 1886 1887 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1888 return ABIArgInfo::getDirect(HighPart, 8); 1889 1890 ++neededSSE; 1891 break; 1892 1893 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1894 // eightbyte is passed in the upper half of the last used SSE 1895 // register. This only happens when 128-bit vectors are passed. 1896 case SSEUp: 1897 assert(Lo == SSE && "Unexpected SSEUp classification"); 1898 ResType = GetByteVectorType(Ty); 1899 break; 1900 } 1901 1902 // If a high part was specified, merge it together with the low part. It is 1903 // known to pass in the high eightbyte of the result. We do this by forming a 1904 // first class struct aggregate with the high and low part: {low, high} 1905 if (HighPart) 1906 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1907 1908 return ABIArgInfo::getDirect(ResType); 1909} 1910 1911void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 1912 1913 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1914 1915 // Keep track of the number of assigned registers. 1916 unsigned freeIntRegs = 6, freeSSERegs = 8; 1917 1918 // If the return value is indirect, then the hidden argument is consuming one 1919 // integer register. 1920 if (FI.getReturnInfo().isIndirect()) 1921 --freeIntRegs; 1922 1923 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1924 // get assigned (in left-to-right order) for passing as follows... 1925 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1926 it != ie; ++it) { 1927 unsigned neededInt, neededSSE; 1928 it->info = classifyArgumentType(it->type, neededInt, neededSSE); 1929 1930 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1931 // eightbyte of an argument, the whole argument is passed on the 1932 // stack. If registers have already been assigned for some 1933 // eightbytes of such an argument, the assignments get reverted. 1934 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1935 freeIntRegs -= neededInt; 1936 freeSSERegs -= neededSSE; 1937 } else { 1938 it->info = getIndirectResult(it->type); 1939 } 1940 } 1941} 1942 1943static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1944 QualType Ty, 1945 CodeGenFunction &CGF) { 1946 llvm::Value *overflow_arg_area_p = 1947 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1948 llvm::Value *overflow_arg_area = 1949 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1950 1951 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1952 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1953 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1954 if (Align > 8) { 1955 // Note that we follow the ABI & gcc here, even though the type 1956 // could in theory have an alignment greater than 16. This case 1957 // shouldn't ever matter in practice. 1958 1959 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1960 llvm::Value *Offset = 1961 llvm::ConstantInt::get(CGF.Int32Ty, 15); 1962 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1963 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1964 CGF.Int64Ty); 1965 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~15LL); 1966 overflow_arg_area = 1967 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1968 overflow_arg_area->getType(), 1969 "overflow_arg_area.align"); 1970 } 1971 1972 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1973 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1974 llvm::Value *Res = 1975 CGF.Builder.CreateBitCast(overflow_arg_area, 1976 llvm::PointerType::getUnqual(LTy)); 1977 1978 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1979 // l->overflow_arg_area + sizeof(type). 1980 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1981 // an 8 byte boundary. 1982 1983 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1984 llvm::Value *Offset = 1985 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 1986 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1987 "overflow_arg_area.next"); 1988 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 1989 1990 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 1991 return Res; 1992} 1993 1994llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1995 CodeGenFunction &CGF) const { 1996 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 1997 1998 // Assume that va_list type is correct; should be pointer to LLVM type: 1999 // struct { 2000 // i32 gp_offset; 2001 // i32 fp_offset; 2002 // i8* overflow_arg_area; 2003 // i8* reg_save_area; 2004 // }; 2005 unsigned neededInt, neededSSE; 2006 2007 Ty = CGF.getContext().getCanonicalType(Ty); 2008 ABIArgInfo AI = classifyArgumentType(Ty, neededInt, neededSSE); 2009 2010 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 2011 // in the registers. If not go to step 7. 2012 if (!neededInt && !neededSSE) 2013 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2014 2015 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 2016 // general purpose registers needed to pass type and num_fp to hold 2017 // the number of floating point registers needed. 2018 2019 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 2020 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 2021 // l->fp_offset > 304 - num_fp * 16 go to step 7. 2022 // 2023 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 2024 // register save space). 2025 2026 llvm::Value *InRegs = 0; 2027 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 2028 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 2029 if (neededInt) { 2030 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 2031 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 2032 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 2033 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 2034 } 2035 2036 if (neededSSE) { 2037 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 2038 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 2039 llvm::Value *FitsInFP = 2040 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 2041 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 2042 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 2043 } 2044 2045 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 2046 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 2047 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 2048 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 2049 2050 // Emit code to load the value if it was passed in registers. 2051 2052 CGF.EmitBlock(InRegBlock); 2053 2054 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 2055 // an offset of l->gp_offset and/or l->fp_offset. This may require 2056 // copying to a temporary location in case the parameter is passed 2057 // in different register classes or requires an alignment greater 2058 // than 8 for general purpose registers and 16 for XMM registers. 2059 // 2060 // FIXME: This really results in shameful code when we end up needing to 2061 // collect arguments from different places; often what should result in a 2062 // simple assembling of a structure from scattered addresses has many more 2063 // loads than necessary. Can we clean this up? 2064 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2065 llvm::Value *RegAddr = 2066 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 2067 "reg_save_area"); 2068 if (neededInt && neededSSE) { 2069 // FIXME: Cleanup. 2070 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 2071 llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 2072 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 2073 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 2074 llvm::Type *TyLo = ST->getElementType(0); 2075 llvm::Type *TyHi = ST->getElementType(1); 2076 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 2077 "Unexpected ABI info for mixed regs"); 2078 llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 2079 llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 2080 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2081 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2082 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 2083 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 2084 llvm::Value *V = 2085 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 2086 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2087 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 2088 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2089 2090 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2091 llvm::PointerType::getUnqual(LTy)); 2092 } else if (neededInt) { 2093 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2094 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2095 llvm::PointerType::getUnqual(LTy)); 2096 } else if (neededSSE == 1) { 2097 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2098 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2099 llvm::PointerType::getUnqual(LTy)); 2100 } else { 2101 assert(neededSSE == 2 && "Invalid number of needed registers!"); 2102 // SSE registers are spaced 16 bytes apart in the register save 2103 // area, we need to collect the two eightbytes together. 2104 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2105 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 2106 llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 2107 llvm::Type *DblPtrTy = 2108 llvm::PointerType::getUnqual(DoubleTy); 2109 llvm::StructType *ST = llvm::StructType::get(DoubleTy, 2110 DoubleTy, NULL); 2111 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 2112 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 2113 DblPtrTy)); 2114 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2115 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 2116 DblPtrTy)); 2117 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2118 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2119 llvm::PointerType::getUnqual(LTy)); 2120 } 2121 2122 // AMD64-ABI 3.5.7p5: Step 5. Set: 2123 // l->gp_offset = l->gp_offset + num_gp * 8 2124 // l->fp_offset = l->fp_offset + num_fp * 16. 2125 if (neededInt) { 2126 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 2127 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 2128 gp_offset_p); 2129 } 2130 if (neededSSE) { 2131 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 2132 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 2133 fp_offset_p); 2134 } 2135 CGF.EmitBranch(ContBlock); 2136 2137 // Emit code to load the value if it was passed in memory. 2138 2139 CGF.EmitBlock(InMemBlock); 2140 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2141 2142 // Return the appropriate result. 2143 2144 CGF.EmitBlock(ContBlock); 2145 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2, 2146 "vaarg.addr"); 2147 ResAddr->addIncoming(RegAddr, InRegBlock); 2148 ResAddr->addIncoming(MemAddr, InMemBlock); 2149 return ResAddr; 2150} 2151 2152ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty) const { 2153 2154 if (Ty->isVoidType()) 2155 return ABIArgInfo::getIgnore(); 2156 2157 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2158 Ty = EnumTy->getDecl()->getIntegerType(); 2159 2160 uint64_t Size = getContext().getTypeSize(Ty); 2161 2162 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2163 if (hasNonTrivialDestructorOrCopyConstructor(RT) || 2164 RT->getDecl()->hasFlexibleArrayMember()) 2165 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2166 2167 // FIXME: mingw-w64-gcc emits 128-bit struct as i128 2168 if (Size == 128 && 2169 getContext().Target.getTriple().getOS() == llvm::Triple::MinGW32) 2170 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2171 Size)); 2172 2173 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is 2174 // not 1, 2, 4, or 8 bytes, must be passed by reference." 2175 if (Size <= 64 && 2176 (Size & (Size - 1)) == 0) 2177 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2178 Size)); 2179 2180 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2181 } 2182 2183 if (Ty->isPromotableIntegerType()) 2184 return ABIArgInfo::getExtend(); 2185 2186 return ABIArgInfo::getDirect(); 2187} 2188 2189void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2190 2191 QualType RetTy = FI.getReturnType(); 2192 FI.getReturnInfo() = classify(RetTy); 2193 2194 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2195 it != ie; ++it) 2196 it->info = classify(it->type); 2197} 2198 2199llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2200 CodeGenFunction &CGF) const { 2201 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2202 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2203 2204 CGBuilderTy &Builder = CGF.Builder; 2205 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2206 "ap"); 2207 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2208 llvm::Type *PTy = 2209 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2210 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2211 2212 uint64_t Offset = 2213 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 2214 llvm::Value *NextAddr = 2215 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2216 "ap.next"); 2217 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2218 2219 return AddrTyped; 2220} 2221 2222// PowerPC-32 2223 2224namespace { 2225class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2226public: 2227 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2228 2229 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2230 // This is recovered from gcc output. 2231 return 1; // r1 is the dedicated stack pointer 2232 } 2233 2234 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2235 llvm::Value *Address) const; 2236}; 2237 2238} 2239 2240bool 2241PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2242 llvm::Value *Address) const { 2243 // This is calculated from the LLVM and GCC tables and verified 2244 // against gcc output. AFAIK all ABIs use the same encoding. 2245 2246 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2247 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2248 2249 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2250 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2251 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2252 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2253 2254 // 0-31: r0-31, the 4-byte general-purpose registers 2255 AssignToArrayRange(Builder, Address, Four8, 0, 31); 2256 2257 // 32-63: fp0-31, the 8-byte floating-point registers 2258 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2259 2260 // 64-76 are various 4-byte special-purpose registers: 2261 // 64: mq 2262 // 65: lr 2263 // 66: ctr 2264 // 67: ap 2265 // 68-75 cr0-7 2266 // 76: xer 2267 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2268 2269 // 77-108: v0-31, the 16-byte vector registers 2270 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2271 2272 // 109: vrsave 2273 // 110: vscr 2274 // 111: spe_acc 2275 // 112: spefscr 2276 // 113: sfp 2277 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2278 2279 return false; 2280} 2281 2282 2283//===----------------------------------------------------------------------===// 2284// ARM ABI Implementation 2285//===----------------------------------------------------------------------===// 2286 2287namespace { 2288 2289class ARMABIInfo : public ABIInfo { 2290public: 2291 enum ABIKind { 2292 APCS = 0, 2293 AAPCS = 1, 2294 AAPCS_VFP 2295 }; 2296 2297private: 2298 ABIKind Kind; 2299 2300public: 2301 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {} 2302 2303private: 2304 ABIKind getABIKind() const { return Kind; } 2305 2306 ABIArgInfo classifyReturnType(QualType RetTy) const; 2307 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2308 2309 virtual void computeInfo(CGFunctionInfo &FI) const; 2310 2311 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2312 CodeGenFunction &CGF) const; 2313}; 2314 2315class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 2316public: 2317 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 2318 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 2319 2320 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2321 return 13; 2322 } 2323 2324 StringRef getARCRetainAutoreleasedReturnValueMarker() const { 2325 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue"; 2326 } 2327 2328 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2329 llvm::Value *Address) const { 2330 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2331 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2332 2333 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2334 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2335 2336 // 0-15 are the 16 integer registers. 2337 AssignToArrayRange(Builder, Address, Four8, 0, 15); 2338 2339 return false; 2340 } 2341}; 2342 2343} 2344 2345void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 2346 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2347 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2348 it != ie; ++it) 2349 it->info = classifyArgumentType(it->type); 2350 2351 // Always honor user-specified calling convention. 2352 if (FI.getCallingConvention() != llvm::CallingConv::C) 2353 return; 2354 2355 // Calling convention as default by an ABI. 2356 llvm::CallingConv::ID DefaultCC; 2357 StringRef Env = getContext().Target.getTriple().getEnvironmentName(); 2358 if (Env == "gnueabi" || Env == "eabi") 2359 DefaultCC = llvm::CallingConv::ARM_AAPCS; 2360 else 2361 DefaultCC = llvm::CallingConv::ARM_APCS; 2362 2363 // If user did not ask for specific calling convention explicitly (e.g. via 2364 // pcs attribute), set effective calling convention if it's different than ABI 2365 // default. 2366 switch (getABIKind()) { 2367 case APCS: 2368 if (DefaultCC != llvm::CallingConv::ARM_APCS) 2369 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 2370 break; 2371 case AAPCS: 2372 if (DefaultCC != llvm::CallingConv::ARM_AAPCS) 2373 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 2374 break; 2375 case AAPCS_VFP: 2376 if (DefaultCC != llvm::CallingConv::ARM_AAPCS_VFP) 2377 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 2378 break; 2379 } 2380} 2381 2382/// isHomogeneousAggregate - Return true if a type is an AAPCS-VFP homogeneous 2383/// aggregate. If HAMembers is non-null, the number of base elements 2384/// contained in the type is returned through it; this is used for the 2385/// recursive calls that check aggregate component types. 2386static bool isHomogeneousAggregate(QualType Ty, const Type *&Base, 2387 ASTContext &Context, 2388 uint64_t *HAMembers = 0) { 2389 uint64_t Members; 2390 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 2391 if (!isHomogeneousAggregate(AT->getElementType(), Base, Context, &Members)) 2392 return false; 2393 Members *= AT->getSize().getZExtValue(); 2394 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 2395 const RecordDecl *RD = RT->getDecl(); 2396 if (RD->isUnion() || RD->hasFlexibleArrayMember()) 2397 return false; 2398 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 2399 if (!CXXRD->isAggregate()) 2400 return false; 2401 } 2402 Members = 0; 2403 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2404 i != e; ++i) { 2405 const FieldDecl *FD = *i; 2406 uint64_t FldMembers; 2407 if (!isHomogeneousAggregate(FD->getType(), Base, Context, &FldMembers)) 2408 return false; 2409 Members += FldMembers; 2410 } 2411 } else { 2412 Members = 1; 2413 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 2414 Members = 2; 2415 Ty = CT->getElementType(); 2416 } 2417 2418 // Homogeneous aggregates for AAPCS-VFP must have base types of float, 2419 // double, or 64-bit or 128-bit vectors. 2420 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 2421 if (BT->getKind() != BuiltinType::Float && 2422 BT->getKind() != BuiltinType::Double) 2423 return false; 2424 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 2425 unsigned VecSize = Context.getTypeSize(VT); 2426 if (VecSize != 64 && VecSize != 128) 2427 return false; 2428 } else { 2429 return false; 2430 } 2431 2432 // The base type must be the same for all members. Vector types of the 2433 // same total size are treated as being equivalent here. 2434 const Type *TyPtr = Ty.getTypePtr(); 2435 if (!Base) 2436 Base = TyPtr; 2437 if (Base != TyPtr && 2438 (!Base->isVectorType() || !TyPtr->isVectorType() || 2439 Context.getTypeSize(Base) != Context.getTypeSize(TyPtr))) 2440 return false; 2441 } 2442 2443 // Homogeneous Aggregates can have at most 4 members of the base type. 2444 if (HAMembers) 2445 *HAMembers = Members; 2446 return (Members <= 4); 2447} 2448 2449ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const { 2450 if (!isAggregateTypeForABI(Ty)) { 2451 // Treat an enum type as its underlying type. 2452 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2453 Ty = EnumTy->getDecl()->getIntegerType(); 2454 2455 return (Ty->isPromotableIntegerType() ? 2456 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2457 } 2458 2459 // Ignore empty records. 2460 if (isEmptyRecord(getContext(), Ty, true)) 2461 return ABIArgInfo::getIgnore(); 2462 2463 // Structures with either a non-trivial destructor or a non-trivial 2464 // copy constructor are always indirect. 2465 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2466 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2467 2468 if (getABIKind() == ARMABIInfo::AAPCS_VFP) { 2469 // Homogeneous Aggregates need to be expanded. 2470 const Type *Base = 0; 2471 if (isHomogeneousAggregate(Ty, Base, getContext())) 2472 return ABIArgInfo::getExpand(); 2473 } 2474 2475 // Otherwise, pass by coercing to a structure of the appropriate size. 2476 // 2477 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 2478 // backend doesn't support byval. 2479 // FIXME: This doesn't handle alignment > 64 bits. 2480 llvm::Type* ElemTy; 2481 unsigned SizeRegs; 2482 if (getContext().getTypeAlign(Ty) > 32) { 2483 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 2484 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 2485 } else { 2486 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 2487 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 2488 } 2489 2490 llvm::Type *STy = 2491 llvm::StructType::get(llvm::ArrayType::get(ElemTy, SizeRegs), NULL); 2492 return ABIArgInfo::getDirect(STy); 2493} 2494 2495static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 2496 llvm::LLVMContext &VMContext) { 2497 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 2498 // is called integer-like if its size is less than or equal to one word, and 2499 // the offset of each of its addressable sub-fields is zero. 2500 2501 uint64_t Size = Context.getTypeSize(Ty); 2502 2503 // Check that the type fits in a word. 2504 if (Size > 32) 2505 return false; 2506 2507 // FIXME: Handle vector types! 2508 if (Ty->isVectorType()) 2509 return false; 2510 2511 // Float types are never treated as "integer like". 2512 if (Ty->isRealFloatingType()) 2513 return false; 2514 2515 // If this is a builtin or pointer type then it is ok. 2516 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 2517 return true; 2518 2519 // Small complex integer types are "integer like". 2520 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 2521 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 2522 2523 // Single element and zero sized arrays should be allowed, by the definition 2524 // above, but they are not. 2525 2526 // Otherwise, it must be a record type. 2527 const RecordType *RT = Ty->getAs<RecordType>(); 2528 if (!RT) return false; 2529 2530 // Ignore records with flexible arrays. 2531 const RecordDecl *RD = RT->getDecl(); 2532 if (RD->hasFlexibleArrayMember()) 2533 return false; 2534 2535 // Check that all sub-fields are at offset 0, and are themselves "integer 2536 // like". 2537 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 2538 2539 bool HadField = false; 2540 unsigned idx = 0; 2541 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2542 i != e; ++i, ++idx) { 2543 const FieldDecl *FD = *i; 2544 2545 // Bit-fields are not addressable, we only need to verify they are "integer 2546 // like". We still have to disallow a subsequent non-bitfield, for example: 2547 // struct { int : 0; int x } 2548 // is non-integer like according to gcc. 2549 if (FD->isBitField()) { 2550 if (!RD->isUnion()) 2551 HadField = true; 2552 2553 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2554 return false; 2555 2556 continue; 2557 } 2558 2559 // Check if this field is at offset 0. 2560 if (Layout.getFieldOffset(idx) != 0) 2561 return false; 2562 2563 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2564 return false; 2565 2566 // Only allow at most one field in a structure. This doesn't match the 2567 // wording above, but follows gcc in situations with a field following an 2568 // empty structure. 2569 if (!RD->isUnion()) { 2570 if (HadField) 2571 return false; 2572 2573 HadField = true; 2574 } 2575 } 2576 2577 return true; 2578} 2579 2580ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 2581 if (RetTy->isVoidType()) 2582 return ABIArgInfo::getIgnore(); 2583 2584 // Large vector types should be returned via memory. 2585 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) 2586 return ABIArgInfo::getIndirect(0); 2587 2588 if (!isAggregateTypeForABI(RetTy)) { 2589 // Treat an enum type as its underlying type. 2590 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2591 RetTy = EnumTy->getDecl()->getIntegerType(); 2592 2593 return (RetTy->isPromotableIntegerType() ? 2594 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2595 } 2596 2597 // Structures with either a non-trivial destructor or a non-trivial 2598 // copy constructor are always indirect. 2599 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 2600 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2601 2602 // Are we following APCS? 2603 if (getABIKind() == APCS) { 2604 if (isEmptyRecord(getContext(), RetTy, false)) 2605 return ABIArgInfo::getIgnore(); 2606 2607 // Complex types are all returned as packed integers. 2608 // 2609 // FIXME: Consider using 2 x vector types if the back end handles them 2610 // correctly. 2611 if (RetTy->isAnyComplexType()) 2612 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2613 getContext().getTypeSize(RetTy))); 2614 2615 // Integer like structures are returned in r0. 2616 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 2617 // Return in the smallest viable integer type. 2618 uint64_t Size = getContext().getTypeSize(RetTy); 2619 if (Size <= 8) 2620 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2621 if (Size <= 16) 2622 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2623 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2624 } 2625 2626 // Otherwise return in memory. 2627 return ABIArgInfo::getIndirect(0); 2628 } 2629 2630 // Otherwise this is an AAPCS variant. 2631 2632 if (isEmptyRecord(getContext(), RetTy, true)) 2633 return ABIArgInfo::getIgnore(); 2634 2635 // Aggregates <= 4 bytes are returned in r0; other aggregates 2636 // are returned indirectly. 2637 uint64_t Size = getContext().getTypeSize(RetTy); 2638 if (Size <= 32) { 2639 // Return in the smallest viable integer type. 2640 if (Size <= 8) 2641 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2642 if (Size <= 16) 2643 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2644 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2645 } 2646 2647 return ABIArgInfo::getIndirect(0); 2648} 2649 2650llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2651 CodeGenFunction &CGF) const { 2652 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2653 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2654 2655 CGBuilderTy &Builder = CGF.Builder; 2656 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2657 "ap"); 2658 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2659 // Handle address alignment for type alignment > 32 bits 2660 uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8; 2661 if (TyAlign > 4) { 2662 assert((TyAlign & (TyAlign - 1)) == 0 && 2663 "Alignment is not power of 2!"); 2664 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 2665 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1)); 2666 AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1))); 2667 Addr = Builder.CreateIntToPtr(AddrAsInt, BP); 2668 } 2669 llvm::Type *PTy = 2670 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2671 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2672 2673 uint64_t Offset = 2674 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 2675 llvm::Value *NextAddr = 2676 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2677 "ap.next"); 2678 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2679 2680 return AddrTyped; 2681} 2682 2683//===----------------------------------------------------------------------===// 2684// PTX ABI Implementation 2685//===----------------------------------------------------------------------===// 2686 2687namespace { 2688 2689class PTXABIInfo : public ABIInfo { 2690public: 2691 PTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2692 2693 ABIArgInfo classifyReturnType(QualType RetTy) const; 2694 ABIArgInfo classifyArgumentType(QualType Ty) const; 2695 2696 virtual void computeInfo(CGFunctionInfo &FI) const; 2697 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2698 CodeGenFunction &CFG) const; 2699}; 2700 2701class PTXTargetCodeGenInfo : public TargetCodeGenInfo { 2702public: 2703 PTXTargetCodeGenInfo(CodeGenTypes &CGT) 2704 : TargetCodeGenInfo(new PTXABIInfo(CGT)) {} 2705}; 2706 2707ABIArgInfo PTXABIInfo::classifyReturnType(QualType RetTy) const { 2708 if (RetTy->isVoidType()) 2709 return ABIArgInfo::getIgnore(); 2710 if (isAggregateTypeForABI(RetTy)) 2711 return ABIArgInfo::getIndirect(0); 2712 return ABIArgInfo::getDirect(); 2713} 2714 2715ABIArgInfo PTXABIInfo::classifyArgumentType(QualType Ty) const { 2716 if (isAggregateTypeForABI(Ty)) 2717 return ABIArgInfo::getIndirect(0); 2718 2719 return ABIArgInfo::getDirect(); 2720} 2721 2722void PTXABIInfo::computeInfo(CGFunctionInfo &FI) const { 2723 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2724 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2725 it != ie; ++it) 2726 it->info = classifyArgumentType(it->type); 2727 2728 // Always honor user-specified calling convention. 2729 if (FI.getCallingConvention() != llvm::CallingConv::C) 2730 return; 2731 2732 // Calling convention as default by an ABI. 2733 llvm::CallingConv::ID DefaultCC; 2734 StringRef Env = getContext().Target.getTriple().getEnvironmentName(); 2735 if (Env == "device") 2736 DefaultCC = llvm::CallingConv::PTX_Device; 2737 else 2738 DefaultCC = llvm::CallingConv::PTX_Kernel; 2739 2740 FI.setEffectiveCallingConvention(DefaultCC); 2741} 2742 2743llvm::Value *PTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2744 CodeGenFunction &CFG) const { 2745 llvm_unreachable("PTX does not support varargs"); 2746 return 0; 2747} 2748 2749} 2750 2751//===----------------------------------------------------------------------===// 2752// SystemZ ABI Implementation 2753//===----------------------------------------------------------------------===// 2754 2755namespace { 2756 2757class SystemZABIInfo : public ABIInfo { 2758public: 2759 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2760 2761 bool isPromotableIntegerType(QualType Ty) const; 2762 2763 ABIArgInfo classifyReturnType(QualType RetTy) const; 2764 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2765 2766 virtual void computeInfo(CGFunctionInfo &FI) const { 2767 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2768 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2769 it != ie; ++it) 2770 it->info = classifyArgumentType(it->type); 2771 } 2772 2773 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2774 CodeGenFunction &CGF) const; 2775}; 2776 2777class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 2778public: 2779 SystemZTargetCodeGenInfo(CodeGenTypes &CGT) 2780 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {} 2781}; 2782 2783} 2784 2785bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 2786 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 2787 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2788 switch (BT->getKind()) { 2789 case BuiltinType::Bool: 2790 case BuiltinType::Char_S: 2791 case BuiltinType::Char_U: 2792 case BuiltinType::SChar: 2793 case BuiltinType::UChar: 2794 case BuiltinType::Short: 2795 case BuiltinType::UShort: 2796 case BuiltinType::Int: 2797 case BuiltinType::UInt: 2798 return true; 2799 default: 2800 return false; 2801 } 2802 return false; 2803} 2804 2805llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2806 CodeGenFunction &CGF) const { 2807 // FIXME: Implement 2808 return 0; 2809} 2810 2811 2812ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const { 2813 if (RetTy->isVoidType()) 2814 return ABIArgInfo::getIgnore(); 2815 if (isAggregateTypeForABI(RetTy)) 2816 return ABIArgInfo::getIndirect(0); 2817 2818 return (isPromotableIntegerType(RetTy) ? 2819 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2820} 2821 2822ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const { 2823 if (isAggregateTypeForABI(Ty)) 2824 return ABIArgInfo::getIndirect(0); 2825 2826 return (isPromotableIntegerType(Ty) ? 2827 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2828} 2829 2830//===----------------------------------------------------------------------===// 2831// MBlaze ABI Implementation 2832//===----------------------------------------------------------------------===// 2833 2834namespace { 2835 2836class MBlazeABIInfo : public ABIInfo { 2837public: 2838 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2839 2840 bool isPromotableIntegerType(QualType Ty) const; 2841 2842 ABIArgInfo classifyReturnType(QualType RetTy) const; 2843 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2844 2845 virtual void computeInfo(CGFunctionInfo &FI) const { 2846 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2847 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2848 it != ie; ++it) 2849 it->info = classifyArgumentType(it->type); 2850 } 2851 2852 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2853 CodeGenFunction &CGF) const; 2854}; 2855 2856class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo { 2857public: 2858 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT) 2859 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {} 2860 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2861 CodeGen::CodeGenModule &M) const; 2862}; 2863 2864} 2865 2866bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const { 2867 // MBlaze ABI requires all 8 and 16 bit quantities to be extended. 2868 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2869 switch (BT->getKind()) { 2870 case BuiltinType::Bool: 2871 case BuiltinType::Char_S: 2872 case BuiltinType::Char_U: 2873 case BuiltinType::SChar: 2874 case BuiltinType::UChar: 2875 case BuiltinType::Short: 2876 case BuiltinType::UShort: 2877 return true; 2878 default: 2879 return false; 2880 } 2881 return false; 2882} 2883 2884llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2885 CodeGenFunction &CGF) const { 2886 // FIXME: Implement 2887 return 0; 2888} 2889 2890 2891ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const { 2892 if (RetTy->isVoidType()) 2893 return ABIArgInfo::getIgnore(); 2894 if (isAggregateTypeForABI(RetTy)) 2895 return ABIArgInfo::getIndirect(0); 2896 2897 return (isPromotableIntegerType(RetTy) ? 2898 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2899} 2900 2901ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const { 2902 if (isAggregateTypeForABI(Ty)) 2903 return ABIArgInfo::getIndirect(0); 2904 2905 return (isPromotableIntegerType(Ty) ? 2906 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2907} 2908 2909void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2910 llvm::GlobalValue *GV, 2911 CodeGen::CodeGenModule &M) 2912 const { 2913 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 2914 if (!FD) return; 2915 2916 llvm::CallingConv::ID CC = llvm::CallingConv::C; 2917 if (FD->hasAttr<MBlazeInterruptHandlerAttr>()) 2918 CC = llvm::CallingConv::MBLAZE_INTR; 2919 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>()) 2920 CC = llvm::CallingConv::MBLAZE_SVOL; 2921 2922 if (CC != llvm::CallingConv::C) { 2923 // Handle 'interrupt_handler' attribute: 2924 llvm::Function *F = cast<llvm::Function>(GV); 2925 2926 // Step 1: Set ISR calling convention. 2927 F->setCallingConv(CC); 2928 2929 // Step 2: Add attributes goodness. 2930 F->addFnAttr(llvm::Attribute::NoInline); 2931 } 2932 2933 // Step 3: Emit _interrupt_handler alias. 2934 if (CC == llvm::CallingConv::MBLAZE_INTR) 2935 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2936 "_interrupt_handler", GV, &M.getModule()); 2937} 2938 2939 2940//===----------------------------------------------------------------------===// 2941// MSP430 ABI Implementation 2942//===----------------------------------------------------------------------===// 2943 2944namespace { 2945 2946class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 2947public: 2948 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 2949 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2950 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2951 CodeGen::CodeGenModule &M) const; 2952}; 2953 2954} 2955 2956void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2957 llvm::GlobalValue *GV, 2958 CodeGen::CodeGenModule &M) const { 2959 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 2960 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 2961 // Handle 'interrupt' attribute: 2962 llvm::Function *F = cast<llvm::Function>(GV); 2963 2964 // Step 1: Set ISR calling convention. 2965 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 2966 2967 // Step 2: Add attributes goodness. 2968 F->addFnAttr(llvm::Attribute::NoInline); 2969 2970 // Step 3: Emit ISR vector alias. 2971 unsigned Num = attr->getNumber() + 0xffe0; 2972 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2973 "vector_" + Twine::utohexstr(Num), 2974 GV, &M.getModule()); 2975 } 2976 } 2977} 2978 2979//===----------------------------------------------------------------------===// 2980// MIPS ABI Implementation. This works for both little-endian and 2981// big-endian variants. 2982//===----------------------------------------------------------------------===// 2983 2984namespace { 2985class MipsABIInfo : public ABIInfo { 2986 static const unsigned MinABIStackAlignInBytes = 4; 2987public: 2988 MipsABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2989 2990 ABIArgInfo classifyReturnType(QualType RetTy) const; 2991 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2992 virtual void computeInfo(CGFunctionInfo &FI) const; 2993 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2994 CodeGenFunction &CGF) const; 2995}; 2996 2997const unsigned MipsABIInfo::MinABIStackAlignInBytes; 2998 2999class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 3000public: 3001 MIPSTargetCodeGenInfo(CodeGenTypes &CGT) 3002 : TargetCodeGenInfo(new MipsABIInfo(CGT)) {} 3003 3004 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 3005 return 29; 3006 } 3007 3008 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3009 llvm::Value *Address) const; 3010}; 3011} 3012 3013ABIArgInfo MipsABIInfo::classifyArgumentType(QualType Ty) const { 3014 if (isAggregateTypeForABI(Ty)) { 3015 // Ignore empty aggregates. 3016 if (getContext().getTypeSize(Ty) == 0) 3017 return ABIArgInfo::getIgnore(); 3018 3019 // Records with non trivial destructors/constructors should not be passed 3020 // by value. 3021 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 3022 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3023 3024 return ABIArgInfo::getIndirect(0); 3025 } 3026 3027 // Treat an enum type as its underlying type. 3028 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3029 Ty = EnumTy->getDecl()->getIntegerType(); 3030 3031 return (Ty->isPromotableIntegerType() ? 3032 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3033} 3034 3035ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const { 3036 if (RetTy->isVoidType()) 3037 return ABIArgInfo::getIgnore(); 3038 3039 if (isAggregateTypeForABI(RetTy)) { 3040 if (RetTy->isAnyComplexType()) 3041 return ABIArgInfo::getDirect(); 3042 3043 return ABIArgInfo::getIndirect(0); 3044 } 3045 3046 // Treat an enum type as its underlying type. 3047 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 3048 RetTy = EnumTy->getDecl()->getIntegerType(); 3049 3050 return (RetTy->isPromotableIntegerType() ? 3051 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3052} 3053 3054void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const { 3055 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3056 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3057 it != ie; ++it) 3058 it->info = classifyArgumentType(it->type); 3059} 3060 3061llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3062 CodeGenFunction &CGF) const { 3063 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 3064 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 3065 3066 CGBuilderTy &Builder = CGF.Builder; 3067 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 3068 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3069 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 3070 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3071 llvm::Value *AddrTyped; 3072 3073 if (TypeAlign > MinABIStackAlignInBytes) { 3074 llvm::Value *AddrAsInt32 = CGF.Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 3075 llvm::Value *Inc = llvm::ConstantInt::get(CGF.Int32Ty, TypeAlign - 1); 3076 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -TypeAlign); 3077 llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt32, Inc); 3078 llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask); 3079 AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy); 3080 } 3081 else 3082 AddrTyped = Builder.CreateBitCast(Addr, PTy); 3083 3084 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP); 3085 TypeAlign = std::max(TypeAlign, MinABIStackAlignInBytes); 3086 uint64_t Offset = 3087 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, TypeAlign); 3088 llvm::Value *NextAddr = 3089 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 3090 "ap.next"); 3091 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3092 3093 return AddrTyped; 3094} 3095 3096bool 3097MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3098 llvm::Value *Address) const { 3099 // This information comes from gcc's implementation, which seems to 3100 // as canonical as it gets. 3101 3102 CodeGen::CGBuilderTy &Builder = CGF.Builder; 3103 llvm::LLVMContext &Context = CGF.getLLVMContext(); 3104 3105 // Everything on MIPS is 4 bytes. Double-precision FP registers 3106 // are aliased to pairs of single-precision FP registers. 3107 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 3108 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 3109 3110 // 0-31 are the general purpose registers, $0 - $31. 3111 // 32-63 are the floating-point registers, $f0 - $f31. 3112 // 64 and 65 are the multiply/divide registers, $hi and $lo. 3113 // 66 is the (notional, I think) register for signal-handler return. 3114 AssignToArrayRange(Builder, Address, Four8, 0, 65); 3115 3116 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 3117 // They are one bit wide and ignored here. 3118 3119 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 3120 // (coprocessor 1 is the FP unit) 3121 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 3122 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 3123 // 176-181 are the DSP accumulator registers. 3124 AssignToArrayRange(Builder, Address, Four8, 80, 181); 3125 3126 return false; 3127} 3128 3129 3130const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 3131 if (TheTargetCodeGenInfo) 3132 return *TheTargetCodeGenInfo; 3133 3134 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 3135 // free it. 3136 3137 const llvm::Triple &Triple = getContext().Target.getTriple(); 3138 switch (Triple.getArch()) { 3139 default: 3140 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 3141 3142 case llvm::Triple::mips: 3143 case llvm::Triple::mipsel: 3144 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types)); 3145 3146 case llvm::Triple::arm: 3147 case llvm::Triple::thumb: 3148 { 3149 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS; 3150 3151 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0) 3152 Kind = ARMABIInfo::APCS; 3153 else if (CodeGenOpts.FloatABI == "hard") 3154 Kind = ARMABIInfo::AAPCS_VFP; 3155 3156 return *(TheTargetCodeGenInfo = new ARMTargetCodeGenInfo(Types, Kind)); 3157 } 3158 3159 case llvm::Triple::ppc: 3160 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 3161 3162 case llvm::Triple::ptx32: 3163 case llvm::Triple::ptx64: 3164 return *(TheTargetCodeGenInfo = new PTXTargetCodeGenInfo(Types)); 3165 3166 case llvm::Triple::systemz: 3167 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types)); 3168 3169 case llvm::Triple::mblaze: 3170 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types)); 3171 3172 case llvm::Triple::msp430: 3173 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 3174 3175 case llvm::Triple::x86: { 3176 bool DisableMMX = strcmp(getContext().Target.getABI(), "no-mmx") == 0; 3177 3178 if (Triple.isOSDarwin()) 3179 return *(TheTargetCodeGenInfo = 3180 new X86_32TargetCodeGenInfo(Types, true, true, DisableMMX)); 3181 3182 switch (Triple.getOS()) { 3183 case llvm::Triple::Cygwin: 3184 case llvm::Triple::MinGW32: 3185 case llvm::Triple::AuroraUX: 3186 case llvm::Triple::DragonFly: 3187 case llvm::Triple::FreeBSD: 3188 case llvm::Triple::OpenBSD: 3189 case llvm::Triple::NetBSD: 3190 return *(TheTargetCodeGenInfo = 3191 new X86_32TargetCodeGenInfo(Types, false, true, DisableMMX)); 3192 3193 default: 3194 return *(TheTargetCodeGenInfo = 3195 new X86_32TargetCodeGenInfo(Types, false, false, DisableMMX)); 3196 } 3197 } 3198 3199 case llvm::Triple::x86_64: 3200 switch (Triple.getOS()) { 3201 case llvm::Triple::Win32: 3202 case llvm::Triple::MinGW32: 3203 case llvm::Triple::Cygwin: 3204 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 3205 default: 3206 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types)); 3207 } 3208 } 3209} 3210