TargetInfo.cpp revision 9631939f82c0eaa6fb3936a0ce58a41adfbc9011
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "clang/Frontend/CodeGenOptions.h" 20#include "llvm/Type.h" 21#include "llvm/Target/TargetData.h" 22#include "llvm/ADT/Triple.h" 23#include "llvm/Support/raw_ostream.h" 24using namespace clang; 25using namespace CodeGen; 26 27static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 28 llvm::Value *Array, 29 llvm::Value *Value, 30 unsigned FirstIndex, 31 unsigned LastIndex) { 32 // Alternatively, we could emit this as a loop in the source. 33 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 34 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 35 Builder.CreateStore(Value, Cell); 36 } 37} 38 39static bool isAggregateTypeForABI(QualType T) { 40 return CodeGenFunction::hasAggregateLLVMType(T) || 41 T->isMemberFunctionPointerType(); 42} 43 44ABIInfo::~ABIInfo() {} 45 46ASTContext &ABIInfo::getContext() const { 47 return CGT.getContext(); 48} 49 50llvm::LLVMContext &ABIInfo::getVMContext() const { 51 return CGT.getLLVMContext(); 52} 53 54const llvm::TargetData &ABIInfo::getTargetData() const { 55 return CGT.getTargetData(); 56} 57 58 59void ABIArgInfo::dump() const { 60 raw_ostream &OS = llvm::errs(); 61 OS << "(ABIArgInfo Kind="; 62 switch (TheKind) { 63 case Direct: 64 OS << "Direct Type="; 65 if (llvm::Type *Ty = getCoerceToType()) 66 Ty->print(OS); 67 else 68 OS << "null"; 69 break; 70 case Extend: 71 OS << "Extend"; 72 break; 73 case Ignore: 74 OS << "Ignore"; 75 break; 76 case Indirect: 77 OS << "Indirect Align=" << getIndirectAlign() 78 << " ByVal=" << getIndirectByVal() 79 << " Realign=" << getIndirectRealign(); 80 break; 81 case Expand: 82 OS << "Expand"; 83 break; 84 } 85 OS << ")\n"; 86} 87 88TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 89 90// If someone can figure out a general rule for this, that would be great. 91// It's probably just doomed to be platform-dependent, though. 92unsigned TargetCodeGenInfo::getSizeOfUnwindException() const { 93 // Verified for: 94 // x86-64 FreeBSD, Linux, Darwin 95 // x86-32 FreeBSD, Linux, Darwin 96 // PowerPC Linux, Darwin 97 // ARM Darwin (*not* EABI) 98 return 32; 99} 100 101bool TargetCodeGenInfo::isNoProtoCallVariadic( 102 const CodeGen::CGFunctionInfo &) const { 103 // The following conventions are known to require this to be false: 104 // x86_stdcall 105 // MIPS 106 // For everything else, we just prefer false unless we opt out. 107 return false; 108} 109 110static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 111 112/// isEmptyField - Return true iff a the field is "empty", that is it 113/// is an unnamed bit-field or an (array of) empty record(s). 114static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 115 bool AllowArrays) { 116 if (FD->isUnnamedBitfield()) 117 return true; 118 119 QualType FT = FD->getType(); 120 121 // Constant arrays of empty records count as empty, strip them off. 122 // Constant arrays of zero length always count as empty. 123 if (AllowArrays) 124 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 125 if (AT->getSize() == 0) 126 return true; 127 FT = AT->getElementType(); 128 } 129 130 const RecordType *RT = FT->getAs<RecordType>(); 131 if (!RT) 132 return false; 133 134 // C++ record fields are never empty, at least in the Itanium ABI. 135 // 136 // FIXME: We should use a predicate for whether this behavior is true in the 137 // current ABI. 138 if (isa<CXXRecordDecl>(RT->getDecl())) 139 return false; 140 141 return isEmptyRecord(Context, FT, AllowArrays); 142} 143 144/// isEmptyRecord - Return true iff a structure contains only empty 145/// fields. Note that a structure with a flexible array member is not 146/// considered empty. 147static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 148 const RecordType *RT = T->getAs<RecordType>(); 149 if (!RT) 150 return 0; 151 const RecordDecl *RD = RT->getDecl(); 152 if (RD->hasFlexibleArrayMember()) 153 return false; 154 155 // If this is a C++ record, check the bases first. 156 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 157 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 158 e = CXXRD->bases_end(); i != e; ++i) 159 if (!isEmptyRecord(Context, i->getType(), true)) 160 return false; 161 162 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 163 i != e; ++i) 164 if (!isEmptyField(Context, *i, AllowArrays)) 165 return false; 166 return true; 167} 168 169/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 170/// a non-trivial destructor or a non-trivial copy constructor. 171static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 172 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 173 if (!RD) 174 return false; 175 176 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 177} 178 179/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 180/// a record type with either a non-trivial destructor or a non-trivial copy 181/// constructor. 182static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 183 const RecordType *RT = T->getAs<RecordType>(); 184 if (!RT) 185 return false; 186 187 return hasNonTrivialDestructorOrCopyConstructor(RT); 188} 189 190/// isSingleElementStruct - Determine if a structure is a "single 191/// element struct", i.e. it has exactly one non-empty field or 192/// exactly one field which is itself a single element 193/// struct. Structures with flexible array members are never 194/// considered single element structs. 195/// 196/// \return The field declaration for the single non-empty field, if 197/// it exists. 198static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 199 const RecordType *RT = T->getAsStructureType(); 200 if (!RT) 201 return 0; 202 203 const RecordDecl *RD = RT->getDecl(); 204 if (RD->hasFlexibleArrayMember()) 205 return 0; 206 207 const Type *Found = 0; 208 209 // If this is a C++ record, check the bases first. 210 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 211 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 212 e = CXXRD->bases_end(); i != e; ++i) { 213 // Ignore empty records. 214 if (isEmptyRecord(Context, i->getType(), true)) 215 continue; 216 217 // If we already found an element then this isn't a single-element struct. 218 if (Found) 219 return 0; 220 221 // If this is non-empty and not a single element struct, the composite 222 // cannot be a single element struct. 223 Found = isSingleElementStruct(i->getType(), Context); 224 if (!Found) 225 return 0; 226 } 227 } 228 229 // Check for single element. 230 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 231 i != e; ++i) { 232 const FieldDecl *FD = *i; 233 QualType FT = FD->getType(); 234 235 // Ignore empty fields. 236 if (isEmptyField(Context, FD, true)) 237 continue; 238 239 // If we already found an element then this isn't a single-element 240 // struct. 241 if (Found) 242 return 0; 243 244 // Treat single element arrays as the element. 245 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 246 if (AT->getSize().getZExtValue() != 1) 247 break; 248 FT = AT->getElementType(); 249 } 250 251 if (!isAggregateTypeForABI(FT)) { 252 Found = FT.getTypePtr(); 253 } else { 254 Found = isSingleElementStruct(FT, Context); 255 if (!Found) 256 return 0; 257 } 258 } 259 260 // We don't consider a struct a single-element struct if it has 261 // padding beyond the element type. 262 if (Found && Context.getTypeSize(Found) != Context.getTypeSize(T)) 263 return 0; 264 265 return Found; 266} 267 268static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 269 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 270 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 271 !Ty->isBlockPointerType()) 272 return false; 273 274 uint64_t Size = Context.getTypeSize(Ty); 275 return Size == 32 || Size == 64; 276} 277 278/// canExpandIndirectArgument - Test whether an argument type which is to be 279/// passed indirectly (on the stack) would have the equivalent layout if it was 280/// expanded into separate arguments. If so, we prefer to do the latter to avoid 281/// inhibiting optimizations. 282/// 283// FIXME: This predicate is missing many cases, currently it just follows 284// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 285// should probably make this smarter, or better yet make the LLVM backend 286// capable of handling it. 287static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 288 // We can only expand structure types. 289 const RecordType *RT = Ty->getAs<RecordType>(); 290 if (!RT) 291 return false; 292 293 // We can only expand (C) structures. 294 // 295 // FIXME: This needs to be generalized to handle classes as well. 296 const RecordDecl *RD = RT->getDecl(); 297 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 298 return false; 299 300 uint64_t Size = 0; 301 302 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 303 i != e; ++i) { 304 const FieldDecl *FD = *i; 305 306 if (!is32Or64BitBasicType(FD->getType(), Context)) 307 return false; 308 309 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 310 // how to expand them yet, and the predicate for telling if a bitfield still 311 // counts as "basic" is more complicated than what we were doing previously. 312 if (FD->isBitField()) 313 return false; 314 315 Size += Context.getTypeSize(FD->getType()); 316 } 317 318 // Make sure there are not any holes in the struct. 319 if (Size != Context.getTypeSize(Ty)) 320 return false; 321 322 return true; 323} 324 325namespace { 326/// DefaultABIInfo - The default implementation for ABI specific 327/// details. This implementation provides information which results in 328/// self-consistent and sensible LLVM IR generation, but does not 329/// conform to any particular ABI. 330class DefaultABIInfo : public ABIInfo { 331public: 332 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 333 334 ABIArgInfo classifyReturnType(QualType RetTy) const; 335 ABIArgInfo classifyArgumentType(QualType RetTy) const; 336 337 virtual void computeInfo(CGFunctionInfo &FI) const { 338 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 339 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 340 it != ie; ++it) 341 it->info = classifyArgumentType(it->type); 342 } 343 344 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 345 CodeGenFunction &CGF) const; 346}; 347 348class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 349public: 350 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 351 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 352}; 353 354llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 355 CodeGenFunction &CGF) const { 356 return 0; 357} 358 359ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 360 if (isAggregateTypeForABI(Ty)) { 361 // Records with non trivial destructors/constructors should not be passed 362 // by value. 363 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 364 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 365 366 return ABIArgInfo::getIndirect(0); 367 } 368 369 // Treat an enum type as its underlying type. 370 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 371 Ty = EnumTy->getDecl()->getIntegerType(); 372 373 return (Ty->isPromotableIntegerType() ? 374 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 375} 376 377ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 378 if (RetTy->isVoidType()) 379 return ABIArgInfo::getIgnore(); 380 381 if (isAggregateTypeForABI(RetTy)) 382 return ABIArgInfo::getIndirect(0); 383 384 // Treat an enum type as its underlying type. 385 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 386 RetTy = EnumTy->getDecl()->getIntegerType(); 387 388 return (RetTy->isPromotableIntegerType() ? 389 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 390} 391 392/// UseX86_MMXType - Return true if this is an MMX type that should use the special 393/// x86_mmx type. 394bool UseX86_MMXType(llvm::Type *IRType) { 395 // If the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>, use the 396 // special x86_mmx type. 397 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && 398 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && 399 IRType->getScalarSizeInBits() != 64; 400} 401 402static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 403 StringRef Constraint, 404 llvm::Type* Ty) { 405 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) 406 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext()); 407 return Ty; 408} 409 410//===----------------------------------------------------------------------===// 411// X86-32 ABI Implementation 412//===----------------------------------------------------------------------===// 413 414/// X86_32ABIInfo - The X86-32 ABI information. 415class X86_32ABIInfo : public ABIInfo { 416 static const unsigned MinABIStackAlignInBytes = 4; 417 418 bool IsDarwinVectorABI; 419 bool IsSmallStructInRegABI; 420 bool IsMMXDisabled; 421 422 static bool isRegisterSize(unsigned Size) { 423 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 424 } 425 426 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 427 428 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 429 /// such that the argument will be passed in memory. 430 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const; 431 432 /// \brief Return the alignment to use for the given type on the stack. 433 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const; 434 435public: 436 437 ABIArgInfo classifyReturnType(QualType RetTy) const; 438 ABIArgInfo classifyArgumentType(QualType RetTy) const; 439 440 virtual void computeInfo(CGFunctionInfo &FI) const { 441 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 442 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 443 it != ie; ++it) 444 it->info = classifyArgumentType(it->type); 445 } 446 447 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 448 CodeGenFunction &CGF) const; 449 450 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m) 451 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p), 452 IsMMXDisabled(m) {} 453}; 454 455class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 456public: 457 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m) 458 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, m)) {} 459 460 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 461 CodeGen::CodeGenModule &CGM) const; 462 463 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 464 // Darwin uses different dwarf register numbers for EH. 465 if (CGM.isTargetDarwin()) return 5; 466 467 return 4; 468 } 469 470 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 471 llvm::Value *Address) const; 472 473 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 474 StringRef Constraint, 475 llvm::Type* Ty) const { 476 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 477 } 478 479}; 480 481} 482 483/// shouldReturnTypeInRegister - Determine if the given type should be 484/// passed in a register (for the Darwin ABI). 485bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 486 ASTContext &Context) { 487 uint64_t Size = Context.getTypeSize(Ty); 488 489 // Type must be register sized. 490 if (!isRegisterSize(Size)) 491 return false; 492 493 if (Ty->isVectorType()) { 494 // 64- and 128- bit vectors inside structures are not returned in 495 // registers. 496 if (Size == 64 || Size == 128) 497 return false; 498 499 return true; 500 } 501 502 // If this is a builtin, pointer, enum, complex type, member pointer, or 503 // member function pointer it is ok. 504 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 505 Ty->isAnyComplexType() || Ty->isEnumeralType() || 506 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 507 return true; 508 509 // Arrays are treated like records. 510 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 511 return shouldReturnTypeInRegister(AT->getElementType(), Context); 512 513 // Otherwise, it must be a record type. 514 const RecordType *RT = Ty->getAs<RecordType>(); 515 if (!RT) return false; 516 517 // FIXME: Traverse bases here too. 518 519 // Structure types are passed in register if all fields would be 520 // passed in a register. 521 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 522 e = RT->getDecl()->field_end(); i != e; ++i) { 523 const FieldDecl *FD = *i; 524 525 // Empty fields are ignored. 526 if (isEmptyField(Context, FD, true)) 527 continue; 528 529 // Check fields recursively. 530 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 531 return false; 532 } 533 534 return true; 535} 536 537ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy) const { 538 if (RetTy->isVoidType()) 539 return ABIArgInfo::getIgnore(); 540 541 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 542 // On Darwin, some vectors are returned in registers. 543 if (IsDarwinVectorABI) { 544 uint64_t Size = getContext().getTypeSize(RetTy); 545 546 // 128-bit vectors are a special case; they are returned in 547 // registers and we need to make sure to pick a type the LLVM 548 // backend will like. 549 if (Size == 128) 550 return ABIArgInfo::getDirect(llvm::VectorType::get( 551 llvm::Type::getInt64Ty(getVMContext()), 2)); 552 553 // Always return in register if it fits in a general purpose 554 // register, or if it is 64 bits and has a single element. 555 if ((Size == 8 || Size == 16 || Size == 32) || 556 (Size == 64 && VT->getNumElements() == 1)) 557 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 558 Size)); 559 560 return ABIArgInfo::getIndirect(0); 561 } 562 563 return ABIArgInfo::getDirect(); 564 } 565 566 if (isAggregateTypeForABI(RetTy)) { 567 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 568 // Structures with either a non-trivial destructor or a non-trivial 569 // copy constructor are always indirect. 570 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 571 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 572 573 // Structures with flexible arrays are always indirect. 574 if (RT->getDecl()->hasFlexibleArrayMember()) 575 return ABIArgInfo::getIndirect(0); 576 } 577 578 // If specified, structs and unions are always indirect. 579 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 580 return ABIArgInfo::getIndirect(0); 581 582 // Small structures which are register sized are generally returned 583 // in a register. 584 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext())) { 585 uint64_t Size = getContext().getTypeSize(RetTy); 586 587 // As a special-case, if the struct is a "single-element" struct, and 588 // the field is of type "float" or "double", return it in a 589 // floating-point register. We apply a similar transformation for 590 // pointer types to improve the quality of the generated IR. 591 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) 592 if (SeltTy->isRealFloatingType() || SeltTy->hasPointerRepresentation()) 593 return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0))); 594 595 // FIXME: We should be able to narrow this integer in cases with dead 596 // padding. 597 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 598 } 599 600 return ABIArgInfo::getIndirect(0); 601 } 602 603 // Treat an enum type as its underlying type. 604 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 605 RetTy = EnumTy->getDecl()->getIntegerType(); 606 607 return (RetTy->isPromotableIntegerType() ? 608 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 609} 610 611static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) { 612 const RecordType *RT = Ty->getAs<RecordType>(); 613 if (!RT) 614 return 0; 615 const RecordDecl *RD = RT->getDecl(); 616 617 // If this is a C++ record, check the bases first. 618 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 619 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 620 e = CXXRD->bases_end(); i != e; ++i) 621 if (!isRecordWithSSEVectorType(Context, i->getType())) 622 return false; 623 624 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 625 i != e; ++i) { 626 QualType FT = i->getType(); 627 628 if (FT->getAs<VectorType>() && Context.getTypeSize(FT) == 128) 629 return true; 630 631 if (isRecordWithSSEVectorType(Context, FT)) 632 return true; 633 } 634 635 return false; 636} 637 638unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty, 639 unsigned Align) const { 640 // Otherwise, if the alignment is less than or equal to the minimum ABI 641 // alignment, just use the default; the backend will handle this. 642 if (Align <= MinABIStackAlignInBytes) 643 return 0; // Use default alignment. 644 645 // On non-Darwin, the stack type alignment is always 4. 646 if (!IsDarwinVectorABI) { 647 // Set explicit alignment, since we may need to realign the top. 648 return MinABIStackAlignInBytes; 649 } 650 651 // Otherwise, if the type contains an SSE vector type, the alignment is 16. 652 if (Align >= 16 && isRecordWithSSEVectorType(getContext(), Ty)) 653 return 16; 654 655 return MinABIStackAlignInBytes; 656} 657 658ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const { 659 if (!ByVal) 660 return ABIArgInfo::getIndirect(0, false); 661 662 // Compute the byval alignment. 663 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 664 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign); 665 if (StackAlign == 0) 666 return ABIArgInfo::getIndirect(4); 667 668 // If the stack alignment is less than the type alignment, realign the 669 // argument. 670 if (StackAlign < TypeAlign) 671 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, 672 /*Realign=*/true); 673 674 return ABIArgInfo::getIndirect(StackAlign); 675} 676 677ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const { 678 // FIXME: Set alignment on indirect arguments. 679 if (isAggregateTypeForABI(Ty)) { 680 // Structures with flexible arrays are always indirect. 681 if (const RecordType *RT = Ty->getAs<RecordType>()) { 682 // Structures with either a non-trivial destructor or a non-trivial 683 // copy constructor are always indirect. 684 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 685 return getIndirectResult(Ty, /*ByVal=*/false); 686 687 if (RT->getDecl()->hasFlexibleArrayMember()) 688 return getIndirectResult(Ty); 689 } 690 691 // Ignore empty structs/unions. 692 if (isEmptyRecord(getContext(), Ty, true)) 693 return ABIArgInfo::getIgnore(); 694 695 // Expand small (<= 128-bit) record types when we know that the stack layout 696 // of those arguments will match the struct. This is important because the 697 // LLVM backend isn't smart enough to remove byval, which inhibits many 698 // optimizations. 699 if (getContext().getTypeSize(Ty) <= 4*32 && 700 canExpandIndirectArgument(Ty, getContext())) 701 return ABIArgInfo::getExpand(); 702 703 return getIndirectResult(Ty); 704 } 705 706 if (const VectorType *VT = Ty->getAs<VectorType>()) { 707 // On Darwin, some vectors are passed in memory, we handle this by passing 708 // it as an i8/i16/i32/i64. 709 if (IsDarwinVectorABI) { 710 uint64_t Size = getContext().getTypeSize(Ty); 711 if ((Size == 8 || Size == 16 || Size == 32) || 712 (Size == 64 && VT->getNumElements() == 1)) 713 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 714 Size)); 715 } 716 717 llvm::Type *IRType = CGT.ConvertType(Ty); 718 if (UseX86_MMXType(IRType)) { 719 if (IsMMXDisabled) 720 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 721 64)); 722 ABIArgInfo AAI = ABIArgInfo::getDirect(IRType); 723 AAI.setCoerceToType(llvm::Type::getX86_MMXTy(getVMContext())); 724 return AAI; 725 } 726 727 return ABIArgInfo::getDirect(); 728 } 729 730 731 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 732 Ty = EnumTy->getDecl()->getIntegerType(); 733 734 return (Ty->isPromotableIntegerType() ? 735 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 736} 737 738llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 739 CodeGenFunction &CGF) const { 740 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 741 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 742 743 CGBuilderTy &Builder = CGF.Builder; 744 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 745 "ap"); 746 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 747 748 // Compute if the address needs to be aligned 749 unsigned Align = CGF.getContext().getTypeAlignInChars(Ty).getQuantity(); 750 Align = getTypeStackAlignInBytes(Ty, Align); 751 Align = std::max(Align, 4U); 752 if (Align > 4) { 753 // addr = (addr + align - 1) & -align; 754 llvm::Value *Offset = 755 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1); 756 Addr = CGF.Builder.CreateGEP(Addr, Offset); 757 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(Addr, 758 CGF.Int32Ty); 759 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -Align); 760 Addr = CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 761 Addr->getType(), 762 "ap.cur.aligned"); 763 } 764 765 llvm::Type *PTy = 766 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 767 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 768 769 uint64_t Offset = 770 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, Align); 771 llvm::Value *NextAddr = 772 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 773 "ap.next"); 774 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 775 776 return AddrTyped; 777} 778 779void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 780 llvm::GlobalValue *GV, 781 CodeGen::CodeGenModule &CGM) const { 782 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 783 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 784 // Get the LLVM function. 785 llvm::Function *Fn = cast<llvm::Function>(GV); 786 787 // Now add the 'alignstack' attribute with a value of 16. 788 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 789 } 790 } 791} 792 793bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 794 CodeGen::CodeGenFunction &CGF, 795 llvm::Value *Address) const { 796 CodeGen::CGBuilderTy &Builder = CGF.Builder; 797 llvm::LLVMContext &Context = CGF.getLLVMContext(); 798 799 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 800 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 801 802 // 0-7 are the eight integer registers; the order is different 803 // on Darwin (for EH), but the range is the same. 804 // 8 is %eip. 805 AssignToArrayRange(Builder, Address, Four8, 0, 8); 806 807 if (CGF.CGM.isTargetDarwin()) { 808 // 12-16 are st(0..4). Not sure why we stop at 4. 809 // These have size 16, which is sizeof(long double) on 810 // platforms with 8-byte alignment for that type. 811 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 812 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 813 814 } else { 815 // 9 is %eflags, which doesn't get a size on Darwin for some 816 // reason. 817 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 818 819 // 11-16 are st(0..5). Not sure why we stop at 5. 820 // These have size 12, which is sizeof(long double) on 821 // platforms with 4-byte alignment for that type. 822 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 823 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 824 } 825 826 return false; 827} 828 829//===----------------------------------------------------------------------===// 830// X86-64 ABI Implementation 831//===----------------------------------------------------------------------===// 832 833 834namespace { 835/// X86_64ABIInfo - The X86_64 ABI information. 836class X86_64ABIInfo : public ABIInfo { 837 enum Class { 838 Integer = 0, 839 SSE, 840 SSEUp, 841 X87, 842 X87Up, 843 ComplexX87, 844 NoClass, 845 Memory 846 }; 847 848 /// merge - Implement the X86_64 ABI merging algorithm. 849 /// 850 /// Merge an accumulating classification \arg Accum with a field 851 /// classification \arg Field. 852 /// 853 /// \param Accum - The accumulating classification. This should 854 /// always be either NoClass or the result of a previous merge 855 /// call. In addition, this should never be Memory (the caller 856 /// should just return Memory for the aggregate). 857 static Class merge(Class Accum, Class Field); 858 859 /// postMerge - Implement the X86_64 ABI post merging algorithm. 860 /// 861 /// Post merger cleanup, reduces a malformed Hi and Lo pair to 862 /// final MEMORY or SSE classes when necessary. 863 /// 864 /// \param AggregateSize - The size of the current aggregate in 865 /// the classification process. 866 /// 867 /// \param Lo - The classification for the parts of the type 868 /// residing in the low word of the containing object. 869 /// 870 /// \param Hi - The classification for the parts of the type 871 /// residing in the higher words of the containing object. 872 /// 873 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const; 874 875 /// classify - Determine the x86_64 register classes in which the 876 /// given type T should be passed. 877 /// 878 /// \param Lo - The classification for the parts of the type 879 /// residing in the low word of the containing object. 880 /// 881 /// \param Hi - The classification for the parts of the type 882 /// residing in the high word of the containing object. 883 /// 884 /// \param OffsetBase - The bit offset of this type in the 885 /// containing object. Some parameters are classified different 886 /// depending on whether they straddle an eightbyte boundary. 887 /// 888 /// If a word is unused its result will be NoClass; if a type should 889 /// be passed in Memory then at least the classification of \arg Lo 890 /// will be Memory. 891 /// 892 /// The \arg Lo class will be NoClass iff the argument is ignored. 893 /// 894 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 895 /// also be ComplexX87. 896 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 897 898 llvm::Type *GetByteVectorType(QualType Ty) const; 899 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType, 900 unsigned IROffset, QualType SourceTy, 901 unsigned SourceOffset) const; 902 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType, 903 unsigned IROffset, QualType SourceTy, 904 unsigned SourceOffset) const; 905 906 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 907 /// such that the argument will be returned in memory. 908 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 909 910 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 911 /// such that the argument will be passed in memory. 912 ABIArgInfo getIndirectResult(QualType Ty) const; 913 914 ABIArgInfo classifyReturnType(QualType RetTy) const; 915 916 ABIArgInfo classifyArgumentType(QualType Ty, 917 unsigned &neededInt, 918 unsigned &neededSSE) const; 919 920 bool IsIllegalVectorType(QualType Ty) const; 921 922 /// The 0.98 ABI revision clarified a lot of ambiguities, 923 /// unfortunately in ways that were not always consistent with 924 /// certain previous compilers. In particular, platforms which 925 /// required strict binary compatibility with older versions of GCC 926 /// may need to exempt themselves. 927 bool honorsRevision0_98() const { 928 return !getContext().getTargetInfo().getTriple().isOSDarwin(); 929 } 930 931 bool HasAVX; 932 933public: 934 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool hasavx) : 935 ABIInfo(CGT), HasAVX(hasavx) {} 936 937 virtual void computeInfo(CGFunctionInfo &FI) const; 938 939 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 940 CodeGenFunction &CGF) const; 941}; 942 943/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 944class WinX86_64ABIInfo : public ABIInfo { 945 946 ABIArgInfo classify(QualType Ty) const; 947 948public: 949 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 950 951 virtual void computeInfo(CGFunctionInfo &FI) const; 952 953 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 954 CodeGenFunction &CGF) const; 955}; 956 957class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 958public: 959 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 960 : TargetCodeGenInfo(new X86_64ABIInfo(CGT, HasAVX)) {} 961 962 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 963 return 7; 964 } 965 966 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 967 llvm::Value *Address) const { 968 CodeGen::CGBuilderTy &Builder = CGF.Builder; 969 llvm::LLVMContext &Context = CGF.getLLVMContext(); 970 971 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 972 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 973 974 // 0-15 are the 16 integer registers. 975 // 16 is %rip. 976 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 977 978 return false; 979 } 980 981 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 982 StringRef Constraint, 983 llvm::Type* Ty) const { 984 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 985 } 986 987 bool isNoProtoCallVariadic(const CodeGen::CGFunctionInfo &FI) const { 988 // The default CC on x86-64 sets %al to the number of SSA 989 // registers used, and GCC sets this when calling an unprototyped 990 // function, so we override the default behavior. However, don't do 991 // that when AVX types are involved: the ABI explicitly states it is 992 // undefined, and it doesn't work in practice because of how the ABI 993 // defines varargs anyway. 994 if (FI.getCallingConvention() == llvm::CallingConv::C) { 995 bool HasAVXType = false; 996 for (CGFunctionInfo::const_arg_iterator it = FI.arg_begin(), 997 ie = FI.arg_end(); 998 it != ie; ++it) { 999 if (it->info.isDirect()) { 1000 llvm::Type *Ty = it->info.getCoerceToType(); 1001 if (llvm::VectorType *VTy = dyn_cast_or_null<llvm::VectorType>(Ty)) { 1002 if (VTy->getBitWidth() > 128) { 1003 HasAVXType = true; 1004 break; 1005 } 1006 } 1007 } 1008 } 1009 if (!HasAVXType) 1010 return true; 1011 } 1012 1013 return TargetCodeGenInfo::isNoProtoCallVariadic(FI); 1014 } 1015 1016}; 1017 1018class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1019public: 1020 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 1021 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {} 1022 1023 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 1024 return 7; 1025 } 1026 1027 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1028 llvm::Value *Address) const { 1029 CodeGen::CGBuilderTy &Builder = CGF.Builder; 1030 llvm::LLVMContext &Context = CGF.getLLVMContext(); 1031 1032 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 1033 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 1034 1035 // 0-15 are the 16 integer registers. 1036 // 16 is %rip. 1037 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 1038 1039 return false; 1040 } 1041}; 1042 1043} 1044 1045void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo, 1046 Class &Hi) const { 1047 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1048 // 1049 // (a) If one of the classes is Memory, the whole argument is passed in 1050 // memory. 1051 // 1052 // (b) If X87UP is not preceded by X87, the whole argument is passed in 1053 // memory. 1054 // 1055 // (c) If the size of the aggregate exceeds two eightbytes and the first 1056 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole 1057 // argument is passed in memory. NOTE: This is necessary to keep the 1058 // ABI working for processors that don't support the __m256 type. 1059 // 1060 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE. 1061 // 1062 // Some of these are enforced by the merging logic. Others can arise 1063 // only with unions; for example: 1064 // union { _Complex double; unsigned; } 1065 // 1066 // Note that clauses (b) and (c) were added in 0.98. 1067 // 1068 if (Hi == Memory) 1069 Lo = Memory; 1070 if (Hi == X87Up && Lo != X87 && honorsRevision0_98()) 1071 Lo = Memory; 1072 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp)) 1073 Lo = Memory; 1074 if (Hi == SSEUp && Lo != SSE) 1075 Hi = SSE; 1076} 1077 1078X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 1079 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 1080 // classified recursively so that always two fields are 1081 // considered. The resulting class is calculated according to 1082 // the classes of the fields in the eightbyte: 1083 // 1084 // (a) If both classes are equal, this is the resulting class. 1085 // 1086 // (b) If one of the classes is NO_CLASS, the resulting class is 1087 // the other class. 1088 // 1089 // (c) If one of the classes is MEMORY, the result is the MEMORY 1090 // class. 1091 // 1092 // (d) If one of the classes is INTEGER, the result is the 1093 // INTEGER. 1094 // 1095 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 1096 // MEMORY is used as class. 1097 // 1098 // (f) Otherwise class SSE is used. 1099 1100 // Accum should never be memory (we should have returned) or 1101 // ComplexX87 (because this cannot be passed in a structure). 1102 assert((Accum != Memory && Accum != ComplexX87) && 1103 "Invalid accumulated classification during merge."); 1104 if (Accum == Field || Field == NoClass) 1105 return Accum; 1106 if (Field == Memory) 1107 return Memory; 1108 if (Accum == NoClass) 1109 return Field; 1110 if (Accum == Integer || Field == Integer) 1111 return Integer; 1112 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 1113 Accum == X87 || Accum == X87Up) 1114 return Memory; 1115 return SSE; 1116} 1117 1118void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 1119 Class &Lo, Class &Hi) const { 1120 // FIXME: This code can be simplified by introducing a simple value class for 1121 // Class pairs with appropriate constructor methods for the various 1122 // situations. 1123 1124 // FIXME: Some of the split computations are wrong; unaligned vectors 1125 // shouldn't be passed in registers for example, so there is no chance they 1126 // can straddle an eightbyte. Verify & simplify. 1127 1128 Lo = Hi = NoClass; 1129 1130 Class &Current = OffsetBase < 64 ? Lo : Hi; 1131 Current = Memory; 1132 1133 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 1134 BuiltinType::Kind k = BT->getKind(); 1135 1136 if (k == BuiltinType::Void) { 1137 Current = NoClass; 1138 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 1139 Lo = Integer; 1140 Hi = Integer; 1141 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 1142 Current = Integer; 1143 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 1144 Current = SSE; 1145 } else if (k == BuiltinType::LongDouble) { 1146 Lo = X87; 1147 Hi = X87Up; 1148 } 1149 // FIXME: _Decimal32 and _Decimal64 are SSE. 1150 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 1151 return; 1152 } 1153 1154 if (const EnumType *ET = Ty->getAs<EnumType>()) { 1155 // Classify the underlying integer type. 1156 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 1157 return; 1158 } 1159 1160 if (Ty->hasPointerRepresentation()) { 1161 Current = Integer; 1162 return; 1163 } 1164 1165 if (Ty->isMemberPointerType()) { 1166 if (Ty->isMemberFunctionPointerType()) 1167 Lo = Hi = Integer; 1168 else 1169 Current = Integer; 1170 return; 1171 } 1172 1173 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1174 uint64_t Size = getContext().getTypeSize(VT); 1175 if (Size == 32) { 1176 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1177 // float> as integer. 1178 Current = Integer; 1179 1180 // If this type crosses an eightbyte boundary, it should be 1181 // split. 1182 uint64_t EB_Real = (OffsetBase) / 64; 1183 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 1184 if (EB_Real != EB_Imag) 1185 Hi = Lo; 1186 } else if (Size == 64) { 1187 // gcc passes <1 x double> in memory. :( 1188 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 1189 return; 1190 1191 // gcc passes <1 x long long> as INTEGER. 1192 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 1193 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 1194 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 1195 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 1196 Current = Integer; 1197 else 1198 Current = SSE; 1199 1200 // If this type crosses an eightbyte boundary, it should be 1201 // split. 1202 if (OffsetBase && OffsetBase != 64) 1203 Hi = Lo; 1204 } else if (Size == 128 || (HasAVX && Size == 256)) { 1205 // Arguments of 256-bits are split into four eightbyte chunks. The 1206 // least significant one belongs to class SSE and all the others to class 1207 // SSEUP. The original Lo and Hi design considers that types can't be 1208 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense. 1209 // This design isn't correct for 256-bits, but since there're no cases 1210 // where the upper parts would need to be inspected, avoid adding 1211 // complexity and just consider Hi to match the 64-256 part. 1212 Lo = SSE; 1213 Hi = SSEUp; 1214 } 1215 return; 1216 } 1217 1218 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 1219 QualType ET = getContext().getCanonicalType(CT->getElementType()); 1220 1221 uint64_t Size = getContext().getTypeSize(Ty); 1222 if (ET->isIntegralOrEnumerationType()) { 1223 if (Size <= 64) 1224 Current = Integer; 1225 else if (Size <= 128) 1226 Lo = Hi = Integer; 1227 } else if (ET == getContext().FloatTy) 1228 Current = SSE; 1229 else if (ET == getContext().DoubleTy) 1230 Lo = Hi = SSE; 1231 else if (ET == getContext().LongDoubleTy) 1232 Current = ComplexX87; 1233 1234 // If this complex type crosses an eightbyte boundary then it 1235 // should be split. 1236 uint64_t EB_Real = (OffsetBase) / 64; 1237 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 1238 if (Hi == NoClass && EB_Real != EB_Imag) 1239 Hi = Lo; 1240 1241 return; 1242 } 1243 1244 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 1245 // Arrays are treated like structures. 1246 1247 uint64_t Size = getContext().getTypeSize(Ty); 1248 1249 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1250 // than four eightbytes, ..., it has class MEMORY. 1251 if (Size > 256) 1252 return; 1253 1254 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1255 // fields, it has class MEMORY. 1256 // 1257 // Only need to check alignment of array base. 1258 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1259 return; 1260 1261 // Otherwise implement simplified merge. We could be smarter about 1262 // this, but it isn't worth it and would be harder to verify. 1263 Current = NoClass; 1264 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1265 uint64_t ArraySize = AT->getSize().getZExtValue(); 1266 1267 // The only case a 256-bit wide vector could be used is when the array 1268 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1269 // to work for sizes wider than 128, early check and fallback to memory. 1270 if (Size > 128 && EltSize != 256) 1271 return; 1272 1273 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1274 Class FieldLo, FieldHi; 1275 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 1276 Lo = merge(Lo, FieldLo); 1277 Hi = merge(Hi, FieldHi); 1278 if (Lo == Memory || Hi == Memory) 1279 break; 1280 } 1281 1282 postMerge(Size, Lo, Hi); 1283 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 1284 return; 1285 } 1286 1287 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1288 uint64_t Size = getContext().getTypeSize(Ty); 1289 1290 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1291 // than four eightbytes, ..., it has class MEMORY. 1292 if (Size > 256) 1293 return; 1294 1295 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1296 // copy constructor or a non-trivial destructor, it is passed by invisible 1297 // reference. 1298 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 1299 return; 1300 1301 const RecordDecl *RD = RT->getDecl(); 1302 1303 // Assume variable sized types are passed in memory. 1304 if (RD->hasFlexibleArrayMember()) 1305 return; 1306 1307 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1308 1309 // Reset Lo class, this will be recomputed. 1310 Current = NoClass; 1311 1312 // If this is a C++ record, classify the bases first. 1313 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1314 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1315 e = CXXRD->bases_end(); i != e; ++i) { 1316 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1317 "Unexpected base class!"); 1318 const CXXRecordDecl *Base = 1319 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1320 1321 // Classify this field. 1322 // 1323 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1324 // single eightbyte, each is classified separately. Each eightbyte gets 1325 // initialized to class NO_CLASS. 1326 Class FieldLo, FieldHi; 1327 uint64_t Offset = OffsetBase + Layout.getBaseClassOffsetInBits(Base); 1328 classify(i->getType(), Offset, FieldLo, FieldHi); 1329 Lo = merge(Lo, FieldLo); 1330 Hi = merge(Hi, FieldHi); 1331 if (Lo == Memory || Hi == Memory) 1332 break; 1333 } 1334 } 1335 1336 // Classify the fields one at a time, merging the results. 1337 unsigned idx = 0; 1338 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1339 i != e; ++i, ++idx) { 1340 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1341 bool BitField = i->isBitField(); 1342 1343 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than 1344 // four eightbytes, or it contains unaligned fields, it has class MEMORY. 1345 // 1346 // The only case a 256-bit wide vector could be used is when the struct 1347 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1348 // to work for sizes wider than 128, early check and fallback to memory. 1349 // 1350 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) { 1351 Lo = Memory; 1352 return; 1353 } 1354 // Note, skip this test for bit-fields, see below. 1355 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1356 Lo = Memory; 1357 return; 1358 } 1359 1360 // Classify this field. 1361 // 1362 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1363 // exceeds a single eightbyte, each is classified 1364 // separately. Each eightbyte gets initialized to class 1365 // NO_CLASS. 1366 Class FieldLo, FieldHi; 1367 1368 // Bit-fields require special handling, they do not force the 1369 // structure to be passed in memory even if unaligned, and 1370 // therefore they can straddle an eightbyte. 1371 if (BitField) { 1372 // Ignore padding bit-fields. 1373 if (i->isUnnamedBitfield()) 1374 continue; 1375 1376 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1377 uint64_t Size = i->getBitWidthValue(getContext()); 1378 1379 uint64_t EB_Lo = Offset / 64; 1380 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1381 FieldLo = FieldHi = NoClass; 1382 if (EB_Lo) { 1383 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1384 FieldLo = NoClass; 1385 FieldHi = Integer; 1386 } else { 1387 FieldLo = Integer; 1388 FieldHi = EB_Hi ? Integer : NoClass; 1389 } 1390 } else 1391 classify(i->getType(), Offset, FieldLo, FieldHi); 1392 Lo = merge(Lo, FieldLo); 1393 Hi = merge(Hi, FieldHi); 1394 if (Lo == Memory || Hi == Memory) 1395 break; 1396 } 1397 1398 postMerge(Size, Lo, Hi); 1399 } 1400} 1401 1402ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1403 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1404 // place naturally. 1405 if (!isAggregateTypeForABI(Ty)) { 1406 // Treat an enum type as its underlying type. 1407 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1408 Ty = EnumTy->getDecl()->getIntegerType(); 1409 1410 return (Ty->isPromotableIntegerType() ? 1411 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1412 } 1413 1414 return ABIArgInfo::getIndirect(0); 1415} 1416 1417bool X86_64ABIInfo::IsIllegalVectorType(QualType Ty) const { 1418 if (const VectorType *VecTy = Ty->getAs<VectorType>()) { 1419 uint64_t Size = getContext().getTypeSize(VecTy); 1420 unsigned LargestVector = HasAVX ? 256 : 128; 1421 if (Size <= 64 || Size > LargestVector) 1422 return true; 1423 } 1424 1425 return false; 1426} 1427 1428ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const { 1429 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1430 // place naturally. 1431 if (!isAggregateTypeForABI(Ty) && !IsIllegalVectorType(Ty)) { 1432 // Treat an enum type as its underlying type. 1433 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1434 Ty = EnumTy->getDecl()->getIntegerType(); 1435 1436 return (Ty->isPromotableIntegerType() ? 1437 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1438 } 1439 1440 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1441 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1442 1443 // Compute the byval alignment. We specify the alignment of the byval in all 1444 // cases so that the mid-level optimizer knows the alignment of the byval. 1445 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U); 1446 return ABIArgInfo::getIndirect(Align); 1447} 1448 1449/// GetByteVectorType - The ABI specifies that a value should be passed in an 1450/// full vector XMM/YMM register. Pick an LLVM IR type that will be passed as a 1451/// vector register. 1452llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const { 1453 llvm::Type *IRType = CGT.ConvertType(Ty); 1454 1455 // Wrapper structs that just contain vectors are passed just like vectors, 1456 // strip them off if present. 1457 llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1458 while (STy && STy->getNumElements() == 1) { 1459 IRType = STy->getElementType(0); 1460 STy = dyn_cast<llvm::StructType>(IRType); 1461 } 1462 1463 // If the preferred type is a 16-byte vector, prefer to pass it. 1464 if (llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1465 llvm::Type *EltTy = VT->getElementType(); 1466 unsigned BitWidth = VT->getBitWidth(); 1467 if ((BitWidth >= 128 && BitWidth <= 256) && 1468 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1469 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1470 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1471 EltTy->isIntegerTy(128))) 1472 return VT; 1473 } 1474 1475 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1476} 1477 1478/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1479/// is known to either be off the end of the specified type or being in 1480/// alignment padding. The user type specified is known to be at most 128 bits 1481/// in size, and have passed through X86_64ABIInfo::classify with a successful 1482/// classification that put one of the two halves in the INTEGER class. 1483/// 1484/// It is conservatively correct to return false. 1485static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1486 unsigned EndBit, ASTContext &Context) { 1487 // If the bytes being queried are off the end of the type, there is no user 1488 // data hiding here. This handles analysis of builtins, vectors and other 1489 // types that don't contain interesting padding. 1490 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1491 if (TySize <= StartBit) 1492 return true; 1493 1494 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1495 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1496 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1497 1498 // Check each element to see if the element overlaps with the queried range. 1499 for (unsigned i = 0; i != NumElts; ++i) { 1500 // If the element is after the span we care about, then we're done.. 1501 unsigned EltOffset = i*EltSize; 1502 if (EltOffset >= EndBit) break; 1503 1504 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1505 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1506 EndBit-EltOffset, Context)) 1507 return false; 1508 } 1509 // If it overlaps no elements, then it is safe to process as padding. 1510 return true; 1511 } 1512 1513 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1514 const RecordDecl *RD = RT->getDecl(); 1515 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1516 1517 // If this is a C++ record, check the bases first. 1518 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1519 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1520 e = CXXRD->bases_end(); i != e; ++i) { 1521 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1522 "Unexpected base class!"); 1523 const CXXRecordDecl *Base = 1524 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1525 1526 // If the base is after the span we care about, ignore it. 1527 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffsetInBits(Base); 1528 if (BaseOffset >= EndBit) continue; 1529 1530 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1531 if (!BitsContainNoUserData(i->getType(), BaseStart, 1532 EndBit-BaseOffset, Context)) 1533 return false; 1534 } 1535 } 1536 1537 // Verify that no field has data that overlaps the region of interest. Yes 1538 // this could be sped up a lot by being smarter about queried fields, 1539 // however we're only looking at structs up to 16 bytes, so we don't care 1540 // much. 1541 unsigned idx = 0; 1542 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1543 i != e; ++i, ++idx) { 1544 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1545 1546 // If we found a field after the region we care about, then we're done. 1547 if (FieldOffset >= EndBit) break; 1548 1549 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1550 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1551 Context)) 1552 return false; 1553 } 1554 1555 // If nothing in this record overlapped the area of interest, then we're 1556 // clean. 1557 return true; 1558 } 1559 1560 return false; 1561} 1562 1563/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1564/// float member at the specified offset. For example, {int,{float}} has a 1565/// float at offset 4. It is conservatively correct for this routine to return 1566/// false. 1567static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset, 1568 const llvm::TargetData &TD) { 1569 // Base case if we find a float. 1570 if (IROffset == 0 && IRType->isFloatTy()) 1571 return true; 1572 1573 // If this is a struct, recurse into the field at the specified offset. 1574 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1575 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1576 unsigned Elt = SL->getElementContainingOffset(IROffset); 1577 IROffset -= SL->getElementOffset(Elt); 1578 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1579 } 1580 1581 // If this is an array, recurse into the field at the specified offset. 1582 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1583 llvm::Type *EltTy = ATy->getElementType(); 1584 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1585 IROffset -= IROffset/EltSize*EltSize; 1586 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1587 } 1588 1589 return false; 1590} 1591 1592 1593/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1594/// low 8 bytes of an XMM register, corresponding to the SSE class. 1595llvm::Type *X86_64ABIInfo:: 1596GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1597 QualType SourceTy, unsigned SourceOffset) const { 1598 // The only three choices we have are either double, <2 x float>, or float. We 1599 // pass as float if the last 4 bytes is just padding. This happens for 1600 // structs that contain 3 floats. 1601 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1602 SourceOffset*8+64, getContext())) 1603 return llvm::Type::getFloatTy(getVMContext()); 1604 1605 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1606 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1607 // case. 1608 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) && 1609 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData())) 1610 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1611 1612 return llvm::Type::getDoubleTy(getVMContext()); 1613} 1614 1615 1616/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1617/// an 8-byte GPR. This means that we either have a scalar or we are talking 1618/// about the high or low part of an up-to-16-byte struct. This routine picks 1619/// the best LLVM IR type to represent this, which may be i64 or may be anything 1620/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1621/// etc). 1622/// 1623/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1624/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1625/// the 8-byte value references. PrefType may be null. 1626/// 1627/// SourceTy is the source level type for the entire argument. SourceOffset is 1628/// an offset into this that we're processing (which is always either 0 or 8). 1629/// 1630llvm::Type *X86_64ABIInfo:: 1631GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1632 QualType SourceTy, unsigned SourceOffset) const { 1633 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1634 // returning an 8-byte unit starting with it. See if we can safely use it. 1635 if (IROffset == 0) { 1636 // Pointers and int64's always fill the 8-byte unit. 1637 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64)) 1638 return IRType; 1639 1640 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1641 // goodness in the source type is just tail padding. This is allowed to 1642 // kick in for struct {double,int} on the int, but not on 1643 // struct{double,int,int} because we wouldn't return the second int. We 1644 // have to do this analysis on the source type because we can't depend on 1645 // unions being lowered a specific way etc. 1646 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1647 IRType->isIntegerTy(32)) { 1648 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth(); 1649 1650 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1651 SourceOffset*8+64, getContext())) 1652 return IRType; 1653 } 1654 } 1655 1656 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1657 // If this is a struct, recurse into the field at the specified offset. 1658 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy); 1659 if (IROffset < SL->getSizeInBytes()) { 1660 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1661 IROffset -= SL->getElementOffset(FieldIdx); 1662 1663 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1664 SourceTy, SourceOffset); 1665 } 1666 } 1667 1668 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1669 llvm::Type *EltTy = ATy->getElementType(); 1670 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy); 1671 unsigned EltOffset = IROffset/EltSize*EltSize; 1672 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1673 SourceOffset); 1674 } 1675 1676 // Okay, we don't have any better idea of what to pass, so we pass this in an 1677 // integer register that isn't too big to fit the rest of the struct. 1678 unsigned TySizeInBytes = 1679 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 1680 1681 assert(TySizeInBytes != SourceOffset && "Empty field?"); 1682 1683 // It is always safe to classify this as an integer type up to i64 that 1684 // isn't larger than the structure. 1685 return llvm::IntegerType::get(getVMContext(), 1686 std::min(TySizeInBytes-SourceOffset, 8U)*8); 1687} 1688 1689 1690/// GetX86_64ByValArgumentPair - Given a high and low type that can ideally 1691/// be used as elements of a two register pair to pass or return, return a 1692/// first class aggregate to represent them. For example, if the low part of 1693/// a by-value argument should be passed as i32* and the high part as float, 1694/// return {i32*, float}. 1695static llvm::Type * 1696GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi, 1697 const llvm::TargetData &TD) { 1698 // In order to correctly satisfy the ABI, we need to the high part to start 1699 // at offset 8. If the high and low parts we inferred are both 4-byte types 1700 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have 1701 // the second element at offset 8. Check for this: 1702 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo); 1703 unsigned HiAlign = TD.getABITypeAlignment(Hi); 1704 unsigned HiStart = llvm::TargetData::RoundUpAlignment(LoSize, HiAlign); 1705 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!"); 1706 1707 // To handle this, we have to increase the size of the low part so that the 1708 // second element will start at an 8 byte offset. We can't increase the size 1709 // of the second element because it might make us access off the end of the 1710 // struct. 1711 if (HiStart != 8) { 1712 // There are only two sorts of types the ABI generation code can produce for 1713 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32. 1714 // Promote these to a larger type. 1715 if (Lo->isFloatTy()) 1716 Lo = llvm::Type::getDoubleTy(Lo->getContext()); 1717 else { 1718 assert(Lo->isIntegerTy() && "Invalid/unknown lo type"); 1719 Lo = llvm::Type::getInt64Ty(Lo->getContext()); 1720 } 1721 } 1722 1723 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, NULL); 1724 1725 1726 // Verify that the second element is at an 8-byte offset. 1727 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 && 1728 "Invalid x86-64 argument pair!"); 1729 return Result; 1730} 1731 1732ABIArgInfo X86_64ABIInfo:: 1733classifyReturnType(QualType RetTy) const { 1734 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1735 // classification algorithm. 1736 X86_64ABIInfo::Class Lo, Hi; 1737 classify(RetTy, 0, Lo, Hi); 1738 1739 // Check some invariants. 1740 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1741 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1742 1743 llvm::Type *ResType = 0; 1744 switch (Lo) { 1745 case NoClass: 1746 if (Hi == NoClass) 1747 return ABIArgInfo::getIgnore(); 1748 // If the low part is just padding, it takes no register, leave ResType 1749 // null. 1750 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1751 "Unknown missing lo part"); 1752 break; 1753 1754 case SSEUp: 1755 case X87Up: 1756 llvm_unreachable("Invalid classification for lo word."); 1757 1758 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1759 // hidden argument. 1760 case Memory: 1761 return getIndirectReturnResult(RetTy); 1762 1763 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1764 // available register of the sequence %rax, %rdx is used. 1765 case Integer: 1766 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 1767 1768 // If we have a sign or zero extended integer, make sure to return Extend 1769 // so that the parameter gets the right LLVM IR attributes. 1770 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1771 // Treat an enum type as its underlying type. 1772 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1773 RetTy = EnumTy->getDecl()->getIntegerType(); 1774 1775 if (RetTy->isIntegralOrEnumerationType() && 1776 RetTy->isPromotableIntegerType()) 1777 return ABIArgInfo::getExtend(); 1778 } 1779 break; 1780 1781 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1782 // available SSE register of the sequence %xmm0, %xmm1 is used. 1783 case SSE: 1784 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 1785 break; 1786 1787 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1788 // returned on the X87 stack in %st0 as 80-bit x87 number. 1789 case X87: 1790 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 1791 break; 1792 1793 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1794 // part of the value is returned in %st0 and the imaginary part in 1795 // %st1. 1796 case ComplexX87: 1797 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1798 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()), 1799 llvm::Type::getX86_FP80Ty(getVMContext()), 1800 NULL); 1801 break; 1802 } 1803 1804 llvm::Type *HighPart = 0; 1805 switch (Hi) { 1806 // Memory was handled previously and X87 should 1807 // never occur as a hi class. 1808 case Memory: 1809 case X87: 1810 llvm_unreachable("Invalid classification for hi word."); 1811 1812 case ComplexX87: // Previously handled. 1813 case NoClass: 1814 break; 1815 1816 case Integer: 1817 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1818 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1819 return ABIArgInfo::getDirect(HighPart, 8); 1820 break; 1821 case SSE: 1822 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1823 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1824 return ABIArgInfo::getDirect(HighPart, 8); 1825 break; 1826 1827 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1828 // is passed in the next available eightbyte chunk if the last used 1829 // vector register. 1830 // 1831 // SSEUP should always be preceded by SSE, just widen. 1832 case SSEUp: 1833 assert(Lo == SSE && "Unexpected SSEUp classification."); 1834 ResType = GetByteVectorType(RetTy); 1835 break; 1836 1837 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1838 // returned together with the previous X87 value in %st0. 1839 case X87Up: 1840 // If X87Up is preceded by X87, we don't need to do 1841 // anything. However, in some cases with unions it may not be 1842 // preceded by X87. In such situations we follow gcc and pass the 1843 // extra bits in an SSE reg. 1844 if (Lo != X87) { 1845 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1846 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1847 return ABIArgInfo::getDirect(HighPart, 8); 1848 } 1849 break; 1850 } 1851 1852 // If a high part was specified, merge it together with the low part. It is 1853 // known to pass in the high eightbyte of the result. We do this by forming a 1854 // first class struct aggregate with the high and low part: {low, high} 1855 if (HighPart) 1856 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1857 1858 return ABIArgInfo::getDirect(ResType); 1859} 1860 1861ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt, 1862 unsigned &neededSSE) const { 1863 X86_64ABIInfo::Class Lo, Hi; 1864 classify(Ty, 0, Lo, Hi); 1865 1866 // Check some invariants. 1867 // FIXME: Enforce these by construction. 1868 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1869 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1870 1871 neededInt = 0; 1872 neededSSE = 0; 1873 llvm::Type *ResType = 0; 1874 switch (Lo) { 1875 case NoClass: 1876 if (Hi == NoClass) 1877 return ABIArgInfo::getIgnore(); 1878 // If the low part is just padding, it takes no register, leave ResType 1879 // null. 1880 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1881 "Unknown missing lo part"); 1882 break; 1883 1884 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1885 // on the stack. 1886 case Memory: 1887 1888 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1889 // COMPLEX_X87, it is passed in memory. 1890 case X87: 1891 case ComplexX87: 1892 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1893 ++neededInt; 1894 return getIndirectResult(Ty); 1895 1896 case SSEUp: 1897 case X87Up: 1898 llvm_unreachable("Invalid classification for lo word."); 1899 1900 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1901 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1902 // and %r9 is used. 1903 case Integer: 1904 ++neededInt; 1905 1906 // Pick an 8-byte type based on the preferred type. 1907 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0); 1908 1909 // If we have a sign or zero extended integer, make sure to return Extend 1910 // so that the parameter gets the right LLVM IR attributes. 1911 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1912 // Treat an enum type as its underlying type. 1913 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1914 Ty = EnumTy->getDecl()->getIntegerType(); 1915 1916 if (Ty->isIntegralOrEnumerationType() && 1917 Ty->isPromotableIntegerType()) 1918 return ABIArgInfo::getExtend(); 1919 } 1920 1921 break; 1922 1923 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1924 // available SSE register is used, the registers are taken in the 1925 // order from %xmm0 to %xmm7. 1926 case SSE: { 1927 llvm::Type *IRType = CGT.ConvertType(Ty); 1928 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0); 1929 ++neededSSE; 1930 break; 1931 } 1932 } 1933 1934 llvm::Type *HighPart = 0; 1935 switch (Hi) { 1936 // Memory was handled previously, ComplexX87 and X87 should 1937 // never occur as hi classes, and X87Up must be preceded by X87, 1938 // which is passed in memory. 1939 case Memory: 1940 case X87: 1941 case ComplexX87: 1942 llvm_unreachable("Invalid classification for hi word."); 1943 1944 case NoClass: break; 1945 1946 case Integer: 1947 ++neededInt; 1948 // Pick an 8-byte type based on the preferred type. 1949 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 1950 1951 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1952 return ABIArgInfo::getDirect(HighPart, 8); 1953 break; 1954 1955 // X87Up generally doesn't occur here (long double is passed in 1956 // memory), except in situations involving unions. 1957 case X87Up: 1958 case SSE: 1959 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 1960 1961 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1962 return ABIArgInfo::getDirect(HighPart, 8); 1963 1964 ++neededSSE; 1965 break; 1966 1967 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1968 // eightbyte is passed in the upper half of the last used SSE 1969 // register. This only happens when 128-bit vectors are passed. 1970 case SSEUp: 1971 assert(Lo == SSE && "Unexpected SSEUp classification"); 1972 ResType = GetByteVectorType(Ty); 1973 break; 1974 } 1975 1976 // If a high part was specified, merge it together with the low part. It is 1977 // known to pass in the high eightbyte of the result. We do this by forming a 1978 // first class struct aggregate with the high and low part: {low, high} 1979 if (HighPart) 1980 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1981 1982 return ABIArgInfo::getDirect(ResType); 1983} 1984 1985void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 1986 1987 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1988 1989 // Keep track of the number of assigned registers. 1990 unsigned freeIntRegs = 6, freeSSERegs = 8; 1991 1992 // If the return value is indirect, then the hidden argument is consuming one 1993 // integer register. 1994 if (FI.getReturnInfo().isIndirect()) 1995 --freeIntRegs; 1996 1997 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1998 // get assigned (in left-to-right order) for passing as follows... 1999 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2000 it != ie; ++it) { 2001 unsigned neededInt, neededSSE; 2002 it->info = classifyArgumentType(it->type, neededInt, neededSSE); 2003 2004 // AMD64-ABI 3.2.3p3: If there are no registers available for any 2005 // eightbyte of an argument, the whole argument is passed on the 2006 // stack. If registers have already been assigned for some 2007 // eightbytes of such an argument, the assignments get reverted. 2008 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 2009 freeIntRegs -= neededInt; 2010 freeSSERegs -= neededSSE; 2011 } else { 2012 it->info = getIndirectResult(it->type); 2013 } 2014 } 2015} 2016 2017static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 2018 QualType Ty, 2019 CodeGenFunction &CGF) { 2020 llvm::Value *overflow_arg_area_p = 2021 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 2022 llvm::Value *overflow_arg_area = 2023 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 2024 2025 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 2026 // byte boundary if alignment needed by type exceeds 8 byte boundary. 2027 // It isn't stated explicitly in the standard, but in practice we use 2028 // alignment greater than 16 where necessary. 2029 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 2030 if (Align > 8) { 2031 // overflow_arg_area = (overflow_arg_area + align - 1) & -align; 2032 llvm::Value *Offset = 2033 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1); 2034 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 2035 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 2036 CGF.Int64Ty); 2037 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, -(uint64_t)Align); 2038 overflow_arg_area = 2039 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 2040 overflow_arg_area->getType(), 2041 "overflow_arg_area.align"); 2042 } 2043 2044 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 2045 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2046 llvm::Value *Res = 2047 CGF.Builder.CreateBitCast(overflow_arg_area, 2048 llvm::PointerType::getUnqual(LTy)); 2049 2050 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 2051 // l->overflow_arg_area + sizeof(type). 2052 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 2053 // an 8 byte boundary. 2054 2055 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 2056 llvm::Value *Offset = 2057 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 2058 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 2059 "overflow_arg_area.next"); 2060 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 2061 2062 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 2063 return Res; 2064} 2065 2066llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2067 CodeGenFunction &CGF) const { 2068 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 2069 2070 // Assume that va_list type is correct; should be pointer to LLVM type: 2071 // struct { 2072 // i32 gp_offset; 2073 // i32 fp_offset; 2074 // i8* overflow_arg_area; 2075 // i8* reg_save_area; 2076 // }; 2077 unsigned neededInt, neededSSE; 2078 2079 Ty = CGF.getContext().getCanonicalType(Ty); 2080 ABIArgInfo AI = classifyArgumentType(Ty, neededInt, neededSSE); 2081 2082 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 2083 // in the registers. If not go to step 7. 2084 if (!neededInt && !neededSSE) 2085 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2086 2087 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 2088 // general purpose registers needed to pass type and num_fp to hold 2089 // the number of floating point registers needed. 2090 2091 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 2092 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 2093 // l->fp_offset > 304 - num_fp * 16 go to step 7. 2094 // 2095 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 2096 // register save space). 2097 2098 llvm::Value *InRegs = 0; 2099 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 2100 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 2101 if (neededInt) { 2102 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 2103 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 2104 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 2105 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 2106 } 2107 2108 if (neededSSE) { 2109 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 2110 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 2111 llvm::Value *FitsInFP = 2112 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 2113 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 2114 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 2115 } 2116 2117 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 2118 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 2119 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 2120 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 2121 2122 // Emit code to load the value if it was passed in registers. 2123 2124 CGF.EmitBlock(InRegBlock); 2125 2126 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 2127 // an offset of l->gp_offset and/or l->fp_offset. This may require 2128 // copying to a temporary location in case the parameter is passed 2129 // in different register classes or requires an alignment greater 2130 // than 8 for general purpose registers and 16 for XMM registers. 2131 // 2132 // FIXME: This really results in shameful code when we end up needing to 2133 // collect arguments from different places; often what should result in a 2134 // simple assembling of a structure from scattered addresses has many more 2135 // loads than necessary. Can we clean this up? 2136 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2137 llvm::Value *RegAddr = 2138 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 2139 "reg_save_area"); 2140 if (neededInt && neededSSE) { 2141 // FIXME: Cleanup. 2142 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 2143 llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 2144 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 2145 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 2146 llvm::Type *TyLo = ST->getElementType(0); 2147 llvm::Type *TyHi = ST->getElementType(1); 2148 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 2149 "Unexpected ABI info for mixed regs"); 2150 llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 2151 llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 2152 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2153 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2154 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 2155 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 2156 llvm::Value *V = 2157 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 2158 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2159 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 2160 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2161 2162 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2163 llvm::PointerType::getUnqual(LTy)); 2164 } else if (neededInt) { 2165 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2166 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2167 llvm::PointerType::getUnqual(LTy)); 2168 } else if (neededSSE == 1) { 2169 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2170 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2171 llvm::PointerType::getUnqual(LTy)); 2172 } else { 2173 assert(neededSSE == 2 && "Invalid number of needed registers!"); 2174 // SSE registers are spaced 16 bytes apart in the register save 2175 // area, we need to collect the two eightbytes together. 2176 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2177 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 2178 llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 2179 llvm::Type *DblPtrTy = 2180 llvm::PointerType::getUnqual(DoubleTy); 2181 llvm::StructType *ST = llvm::StructType::get(DoubleTy, 2182 DoubleTy, NULL); 2183 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 2184 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 2185 DblPtrTy)); 2186 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2187 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 2188 DblPtrTy)); 2189 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2190 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2191 llvm::PointerType::getUnqual(LTy)); 2192 } 2193 2194 // AMD64-ABI 3.5.7p5: Step 5. Set: 2195 // l->gp_offset = l->gp_offset + num_gp * 8 2196 // l->fp_offset = l->fp_offset + num_fp * 16. 2197 if (neededInt) { 2198 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 2199 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 2200 gp_offset_p); 2201 } 2202 if (neededSSE) { 2203 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 2204 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 2205 fp_offset_p); 2206 } 2207 CGF.EmitBranch(ContBlock); 2208 2209 // Emit code to load the value if it was passed in memory. 2210 2211 CGF.EmitBlock(InMemBlock); 2212 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2213 2214 // Return the appropriate result. 2215 2216 CGF.EmitBlock(ContBlock); 2217 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2, 2218 "vaarg.addr"); 2219 ResAddr->addIncoming(RegAddr, InRegBlock); 2220 ResAddr->addIncoming(MemAddr, InMemBlock); 2221 return ResAddr; 2222} 2223 2224ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty) const { 2225 2226 if (Ty->isVoidType()) 2227 return ABIArgInfo::getIgnore(); 2228 2229 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2230 Ty = EnumTy->getDecl()->getIntegerType(); 2231 2232 uint64_t Size = getContext().getTypeSize(Ty); 2233 2234 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2235 if (hasNonTrivialDestructorOrCopyConstructor(RT) || 2236 RT->getDecl()->hasFlexibleArrayMember()) 2237 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2238 2239 // FIXME: mingw-w64-gcc emits 128-bit struct as i128 2240 if (Size == 128 && 2241 getContext().getTargetInfo().getTriple().getOS() == llvm::Triple::MinGW32) 2242 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2243 Size)); 2244 2245 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is 2246 // not 1, 2, 4, or 8 bytes, must be passed by reference." 2247 if (Size <= 64 && 2248 (Size & (Size - 1)) == 0) 2249 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2250 Size)); 2251 2252 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2253 } 2254 2255 if (Ty->isPromotableIntegerType()) 2256 return ABIArgInfo::getExtend(); 2257 2258 return ABIArgInfo::getDirect(); 2259} 2260 2261void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2262 2263 QualType RetTy = FI.getReturnType(); 2264 FI.getReturnInfo() = classify(RetTy); 2265 2266 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2267 it != ie; ++it) 2268 it->info = classify(it->type); 2269} 2270 2271llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2272 CodeGenFunction &CGF) const { 2273 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2274 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2275 2276 CGBuilderTy &Builder = CGF.Builder; 2277 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2278 "ap"); 2279 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2280 llvm::Type *PTy = 2281 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2282 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2283 2284 uint64_t Offset = 2285 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 2286 llvm::Value *NextAddr = 2287 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2288 "ap.next"); 2289 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2290 2291 return AddrTyped; 2292} 2293 2294// PowerPC-32 2295 2296namespace { 2297class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2298public: 2299 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2300 2301 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2302 // This is recovered from gcc output. 2303 return 1; // r1 is the dedicated stack pointer 2304 } 2305 2306 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2307 llvm::Value *Address) const; 2308}; 2309 2310} 2311 2312bool 2313PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2314 llvm::Value *Address) const { 2315 // This is calculated from the LLVM and GCC tables and verified 2316 // against gcc output. AFAIK all ABIs use the same encoding. 2317 2318 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2319 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2320 2321 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2322 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2323 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2324 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2325 2326 // 0-31: r0-31, the 4-byte general-purpose registers 2327 AssignToArrayRange(Builder, Address, Four8, 0, 31); 2328 2329 // 32-63: fp0-31, the 8-byte floating-point registers 2330 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2331 2332 // 64-76 are various 4-byte special-purpose registers: 2333 // 64: mq 2334 // 65: lr 2335 // 66: ctr 2336 // 67: ap 2337 // 68-75 cr0-7 2338 // 76: xer 2339 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2340 2341 // 77-108: v0-31, the 16-byte vector registers 2342 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2343 2344 // 109: vrsave 2345 // 110: vscr 2346 // 111: spe_acc 2347 // 112: spefscr 2348 // 113: sfp 2349 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2350 2351 return false; 2352} 2353 2354 2355//===----------------------------------------------------------------------===// 2356// ARM ABI Implementation 2357//===----------------------------------------------------------------------===// 2358 2359namespace { 2360 2361class ARMABIInfo : public ABIInfo { 2362public: 2363 enum ABIKind { 2364 APCS = 0, 2365 AAPCS = 1, 2366 AAPCS_VFP 2367 }; 2368 2369private: 2370 ABIKind Kind; 2371 2372public: 2373 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {} 2374 2375 bool isEABI() const { 2376 StringRef Env = getContext().getTargetInfo().getTriple().getEnvironmentName(); 2377 return (Env == "gnueabi" || Env == "eabi"); 2378 } 2379 2380private: 2381 ABIKind getABIKind() const { return Kind; } 2382 2383 ABIArgInfo classifyReturnType(QualType RetTy) const; 2384 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2385 2386 virtual void computeInfo(CGFunctionInfo &FI) const; 2387 2388 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2389 CodeGenFunction &CGF) const; 2390}; 2391 2392class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 2393public: 2394 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 2395 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 2396 2397 const ARMABIInfo &getABIInfo() const { 2398 return static_cast<const ARMABIInfo&>(TargetCodeGenInfo::getABIInfo()); 2399 } 2400 2401 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2402 return 13; 2403 } 2404 2405 StringRef getARCRetainAutoreleasedReturnValueMarker() const { 2406 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue"; 2407 } 2408 2409 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2410 llvm::Value *Address) const { 2411 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2412 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2413 2414 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2415 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2416 2417 // 0-15 are the 16 integer registers. 2418 AssignToArrayRange(Builder, Address, Four8, 0, 15); 2419 2420 return false; 2421 } 2422 2423 unsigned getSizeOfUnwindException() const { 2424 if (getABIInfo().isEABI()) return 88; 2425 return TargetCodeGenInfo::getSizeOfUnwindException(); 2426 } 2427}; 2428 2429} 2430 2431void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 2432 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2433 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2434 it != ie; ++it) 2435 it->info = classifyArgumentType(it->type); 2436 2437 // Always honor user-specified calling convention. 2438 if (FI.getCallingConvention() != llvm::CallingConv::C) 2439 return; 2440 2441 // Calling convention as default by an ABI. 2442 llvm::CallingConv::ID DefaultCC; 2443 if (isEABI()) 2444 DefaultCC = llvm::CallingConv::ARM_AAPCS; 2445 else 2446 DefaultCC = llvm::CallingConv::ARM_APCS; 2447 2448 // If user did not ask for specific calling convention explicitly (e.g. via 2449 // pcs attribute), set effective calling convention if it's different than ABI 2450 // default. 2451 switch (getABIKind()) { 2452 case APCS: 2453 if (DefaultCC != llvm::CallingConv::ARM_APCS) 2454 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 2455 break; 2456 case AAPCS: 2457 if (DefaultCC != llvm::CallingConv::ARM_AAPCS) 2458 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 2459 break; 2460 case AAPCS_VFP: 2461 if (DefaultCC != llvm::CallingConv::ARM_AAPCS_VFP) 2462 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 2463 break; 2464 } 2465} 2466 2467/// isHomogeneousAggregate - Return true if a type is an AAPCS-VFP homogeneous 2468/// aggregate. If HAMembers is non-null, the number of base elements 2469/// contained in the type is returned through it; this is used for the 2470/// recursive calls that check aggregate component types. 2471static bool isHomogeneousAggregate(QualType Ty, const Type *&Base, 2472 ASTContext &Context, 2473 uint64_t *HAMembers = 0) { 2474 uint64_t Members; 2475 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 2476 if (!isHomogeneousAggregate(AT->getElementType(), Base, Context, &Members)) 2477 return false; 2478 Members *= AT->getSize().getZExtValue(); 2479 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 2480 const RecordDecl *RD = RT->getDecl(); 2481 if (RD->isUnion() || RD->hasFlexibleArrayMember()) 2482 return false; 2483 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 2484 if (!CXXRD->isAggregate()) 2485 return false; 2486 } 2487 Members = 0; 2488 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2489 i != e; ++i) { 2490 const FieldDecl *FD = *i; 2491 uint64_t FldMembers; 2492 if (!isHomogeneousAggregate(FD->getType(), Base, Context, &FldMembers)) 2493 return false; 2494 Members += FldMembers; 2495 } 2496 } else { 2497 Members = 1; 2498 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 2499 Members = 2; 2500 Ty = CT->getElementType(); 2501 } 2502 2503 // Homogeneous aggregates for AAPCS-VFP must have base types of float, 2504 // double, or 64-bit or 128-bit vectors. 2505 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 2506 if (BT->getKind() != BuiltinType::Float && 2507 BT->getKind() != BuiltinType::Double) 2508 return false; 2509 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 2510 unsigned VecSize = Context.getTypeSize(VT); 2511 if (VecSize != 64 && VecSize != 128) 2512 return false; 2513 } else { 2514 return false; 2515 } 2516 2517 // The base type must be the same for all members. Vector types of the 2518 // same total size are treated as being equivalent here. 2519 const Type *TyPtr = Ty.getTypePtr(); 2520 if (!Base) 2521 Base = TyPtr; 2522 if (Base != TyPtr && 2523 (!Base->isVectorType() || !TyPtr->isVectorType() || 2524 Context.getTypeSize(Base) != Context.getTypeSize(TyPtr))) 2525 return false; 2526 } 2527 2528 // Homogeneous Aggregates can have at most 4 members of the base type. 2529 if (HAMembers) 2530 *HAMembers = Members; 2531 return (Members <= 4); 2532} 2533 2534ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const { 2535 if (!isAggregateTypeForABI(Ty)) { 2536 // Treat an enum type as its underlying type. 2537 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2538 Ty = EnumTy->getDecl()->getIntegerType(); 2539 2540 return (Ty->isPromotableIntegerType() ? 2541 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2542 } 2543 2544 // Ignore empty records. 2545 if (isEmptyRecord(getContext(), Ty, true)) 2546 return ABIArgInfo::getIgnore(); 2547 2548 // Structures with either a non-trivial destructor or a non-trivial 2549 // copy constructor are always indirect. 2550 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2551 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2552 2553 if (getABIKind() == ARMABIInfo::AAPCS_VFP) { 2554 // Homogeneous Aggregates need to be expanded. 2555 const Type *Base = 0; 2556 if (isHomogeneousAggregate(Ty, Base, getContext())) 2557 return ABIArgInfo::getExpand(); 2558 } 2559 2560 // Otherwise, pass by coercing to a structure of the appropriate size. 2561 // 2562 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 2563 // backend doesn't support byval. 2564 // FIXME: This doesn't handle alignment > 64 bits. 2565 llvm::Type* ElemTy; 2566 unsigned SizeRegs; 2567 if (getContext().getTypeAlign(Ty) > 32) { 2568 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 2569 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 2570 } else { 2571 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 2572 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 2573 } 2574 2575 llvm::Type *STy = 2576 llvm::StructType::get(llvm::ArrayType::get(ElemTy, SizeRegs), NULL); 2577 return ABIArgInfo::getDirect(STy); 2578} 2579 2580static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 2581 llvm::LLVMContext &VMContext) { 2582 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 2583 // is called integer-like if its size is less than or equal to one word, and 2584 // the offset of each of its addressable sub-fields is zero. 2585 2586 uint64_t Size = Context.getTypeSize(Ty); 2587 2588 // Check that the type fits in a word. 2589 if (Size > 32) 2590 return false; 2591 2592 // FIXME: Handle vector types! 2593 if (Ty->isVectorType()) 2594 return false; 2595 2596 // Float types are never treated as "integer like". 2597 if (Ty->isRealFloatingType()) 2598 return false; 2599 2600 // If this is a builtin or pointer type then it is ok. 2601 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 2602 return true; 2603 2604 // Small complex integer types are "integer like". 2605 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 2606 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 2607 2608 // Single element and zero sized arrays should be allowed, by the definition 2609 // above, but they are not. 2610 2611 // Otherwise, it must be a record type. 2612 const RecordType *RT = Ty->getAs<RecordType>(); 2613 if (!RT) return false; 2614 2615 // Ignore records with flexible arrays. 2616 const RecordDecl *RD = RT->getDecl(); 2617 if (RD->hasFlexibleArrayMember()) 2618 return false; 2619 2620 // Check that all sub-fields are at offset 0, and are themselves "integer 2621 // like". 2622 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 2623 2624 bool HadField = false; 2625 unsigned idx = 0; 2626 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2627 i != e; ++i, ++idx) { 2628 const FieldDecl *FD = *i; 2629 2630 // Bit-fields are not addressable, we only need to verify they are "integer 2631 // like". We still have to disallow a subsequent non-bitfield, for example: 2632 // struct { int : 0; int x } 2633 // is non-integer like according to gcc. 2634 if (FD->isBitField()) { 2635 if (!RD->isUnion()) 2636 HadField = true; 2637 2638 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2639 return false; 2640 2641 continue; 2642 } 2643 2644 // Check if this field is at offset 0. 2645 if (Layout.getFieldOffset(idx) != 0) 2646 return false; 2647 2648 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2649 return false; 2650 2651 // Only allow at most one field in a structure. This doesn't match the 2652 // wording above, but follows gcc in situations with a field following an 2653 // empty structure. 2654 if (!RD->isUnion()) { 2655 if (HadField) 2656 return false; 2657 2658 HadField = true; 2659 } 2660 } 2661 2662 return true; 2663} 2664 2665ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 2666 if (RetTy->isVoidType()) 2667 return ABIArgInfo::getIgnore(); 2668 2669 // Large vector types should be returned via memory. 2670 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) 2671 return ABIArgInfo::getIndirect(0); 2672 2673 if (!isAggregateTypeForABI(RetTy)) { 2674 // Treat an enum type as its underlying type. 2675 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2676 RetTy = EnumTy->getDecl()->getIntegerType(); 2677 2678 return (RetTy->isPromotableIntegerType() ? 2679 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2680 } 2681 2682 // Structures with either a non-trivial destructor or a non-trivial 2683 // copy constructor are always indirect. 2684 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 2685 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2686 2687 // Are we following APCS? 2688 if (getABIKind() == APCS) { 2689 if (isEmptyRecord(getContext(), RetTy, false)) 2690 return ABIArgInfo::getIgnore(); 2691 2692 // Complex types are all returned as packed integers. 2693 // 2694 // FIXME: Consider using 2 x vector types if the back end handles them 2695 // correctly. 2696 if (RetTy->isAnyComplexType()) 2697 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2698 getContext().getTypeSize(RetTy))); 2699 2700 // Integer like structures are returned in r0. 2701 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 2702 // Return in the smallest viable integer type. 2703 uint64_t Size = getContext().getTypeSize(RetTy); 2704 if (Size <= 8) 2705 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2706 if (Size <= 16) 2707 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2708 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2709 } 2710 2711 // Otherwise return in memory. 2712 return ABIArgInfo::getIndirect(0); 2713 } 2714 2715 // Otherwise this is an AAPCS variant. 2716 2717 if (isEmptyRecord(getContext(), RetTy, true)) 2718 return ABIArgInfo::getIgnore(); 2719 2720 // Check for homogeneous aggregates with AAPCS-VFP. 2721 if (getABIKind() == AAPCS_VFP) { 2722 const Type *Base = 0; 2723 if (isHomogeneousAggregate(RetTy, Base, getContext())) 2724 // Homogeneous Aggregates are returned directly. 2725 return ABIArgInfo::getDirect(); 2726 } 2727 2728 // Aggregates <= 4 bytes are returned in r0; other aggregates 2729 // are returned indirectly. 2730 uint64_t Size = getContext().getTypeSize(RetTy); 2731 if (Size <= 32) { 2732 // Return in the smallest viable integer type. 2733 if (Size <= 8) 2734 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2735 if (Size <= 16) 2736 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2737 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2738 } 2739 2740 return ABIArgInfo::getIndirect(0); 2741} 2742 2743llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2744 CodeGenFunction &CGF) const { 2745 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2746 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2747 2748 CGBuilderTy &Builder = CGF.Builder; 2749 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2750 "ap"); 2751 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2752 // Handle address alignment for type alignment > 32 bits 2753 uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8; 2754 if (TyAlign > 4) { 2755 assert((TyAlign & (TyAlign - 1)) == 0 && 2756 "Alignment is not power of 2!"); 2757 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 2758 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1)); 2759 AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1))); 2760 Addr = Builder.CreateIntToPtr(AddrAsInt, BP); 2761 } 2762 llvm::Type *PTy = 2763 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2764 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2765 2766 uint64_t Offset = 2767 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 2768 llvm::Value *NextAddr = 2769 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2770 "ap.next"); 2771 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2772 2773 return AddrTyped; 2774} 2775 2776//===----------------------------------------------------------------------===// 2777// PTX ABI Implementation 2778//===----------------------------------------------------------------------===// 2779 2780namespace { 2781 2782class PTXABIInfo : public ABIInfo { 2783public: 2784 PTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2785 2786 ABIArgInfo classifyReturnType(QualType RetTy) const; 2787 ABIArgInfo classifyArgumentType(QualType Ty) const; 2788 2789 virtual void computeInfo(CGFunctionInfo &FI) const; 2790 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2791 CodeGenFunction &CFG) const; 2792}; 2793 2794class PTXTargetCodeGenInfo : public TargetCodeGenInfo { 2795public: 2796 PTXTargetCodeGenInfo(CodeGenTypes &CGT) 2797 : TargetCodeGenInfo(new PTXABIInfo(CGT)) {} 2798 2799 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2800 CodeGen::CodeGenModule &M) const; 2801}; 2802 2803ABIArgInfo PTXABIInfo::classifyReturnType(QualType RetTy) const { 2804 if (RetTy->isVoidType()) 2805 return ABIArgInfo::getIgnore(); 2806 if (isAggregateTypeForABI(RetTy)) 2807 return ABIArgInfo::getIndirect(0); 2808 return ABIArgInfo::getDirect(); 2809} 2810 2811ABIArgInfo PTXABIInfo::classifyArgumentType(QualType Ty) const { 2812 if (isAggregateTypeForABI(Ty)) 2813 return ABIArgInfo::getIndirect(0); 2814 2815 return ABIArgInfo::getDirect(); 2816} 2817 2818void PTXABIInfo::computeInfo(CGFunctionInfo &FI) const { 2819 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2820 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2821 it != ie; ++it) 2822 it->info = classifyArgumentType(it->type); 2823 2824 // Always honor user-specified calling convention. 2825 if (FI.getCallingConvention() != llvm::CallingConv::C) 2826 return; 2827 2828 // Calling convention as default by an ABI. 2829 llvm::CallingConv::ID DefaultCC; 2830 const LangOptions &LangOpts = getContext().getLangOptions(); 2831 if (LangOpts.OpenCL || LangOpts.CUDA) { 2832 // If we are in OpenCL or CUDA mode, then default to device functions 2833 DefaultCC = llvm::CallingConv::PTX_Device; 2834 } else { 2835 // If we are in standard C/C++ mode, use the triple to decide on the default 2836 StringRef Env = 2837 getContext().getTargetInfo().getTriple().getEnvironmentName(); 2838 if (Env == "device") 2839 DefaultCC = llvm::CallingConv::PTX_Device; 2840 else 2841 DefaultCC = llvm::CallingConv::PTX_Kernel; 2842 } 2843 FI.setEffectiveCallingConvention(DefaultCC); 2844 2845} 2846 2847llvm::Value *PTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2848 CodeGenFunction &CFG) const { 2849 llvm_unreachable("PTX does not support varargs"); 2850 return 0; 2851} 2852 2853void PTXTargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2854 llvm::GlobalValue *GV, 2855 CodeGen::CodeGenModule &M) const{ 2856 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 2857 if (!FD) return; 2858 2859 llvm::Function *F = cast<llvm::Function>(GV); 2860 2861 // Perform special handling in OpenCL mode 2862 if (M.getLangOptions().OpenCL) { 2863 // Use OpenCL function attributes to set proper calling conventions 2864 // By default, all functions are device functions 2865 if (FD->hasAttr<OpenCLKernelAttr>()) { 2866 // OpenCL __kernel functions get a kernel calling convention 2867 F->setCallingConv(llvm::CallingConv::PTX_Kernel); 2868 // And kernel functions are not subject to inlining 2869 F->addFnAttr(llvm::Attribute::NoInline); 2870 } 2871 } 2872 2873 // Perform special handling in CUDA mode. 2874 if (M.getLangOptions().CUDA) { 2875 // CUDA __global__ functions get a kernel calling convention. Since 2876 // __global__ functions cannot be called from the device, we do not 2877 // need to set the noinline attribute. 2878 if (FD->getAttr<CUDAGlobalAttr>()) 2879 F->setCallingConv(llvm::CallingConv::PTX_Kernel); 2880 } 2881} 2882 2883} 2884 2885//===----------------------------------------------------------------------===// 2886// MBlaze ABI Implementation 2887//===----------------------------------------------------------------------===// 2888 2889namespace { 2890 2891class MBlazeABIInfo : public ABIInfo { 2892public: 2893 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2894 2895 bool isPromotableIntegerType(QualType Ty) const; 2896 2897 ABIArgInfo classifyReturnType(QualType RetTy) const; 2898 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2899 2900 virtual void computeInfo(CGFunctionInfo &FI) const { 2901 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2902 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2903 it != ie; ++it) 2904 it->info = classifyArgumentType(it->type); 2905 } 2906 2907 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2908 CodeGenFunction &CGF) const; 2909}; 2910 2911class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo { 2912public: 2913 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT) 2914 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {} 2915 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2916 CodeGen::CodeGenModule &M) const; 2917}; 2918 2919} 2920 2921bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const { 2922 // MBlaze ABI requires all 8 and 16 bit quantities to be extended. 2923 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2924 switch (BT->getKind()) { 2925 case BuiltinType::Bool: 2926 case BuiltinType::Char_S: 2927 case BuiltinType::Char_U: 2928 case BuiltinType::SChar: 2929 case BuiltinType::UChar: 2930 case BuiltinType::Short: 2931 case BuiltinType::UShort: 2932 return true; 2933 default: 2934 return false; 2935 } 2936 return false; 2937} 2938 2939llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2940 CodeGenFunction &CGF) const { 2941 // FIXME: Implement 2942 return 0; 2943} 2944 2945 2946ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const { 2947 if (RetTy->isVoidType()) 2948 return ABIArgInfo::getIgnore(); 2949 if (isAggregateTypeForABI(RetTy)) 2950 return ABIArgInfo::getIndirect(0); 2951 2952 return (isPromotableIntegerType(RetTy) ? 2953 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2954} 2955 2956ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const { 2957 if (isAggregateTypeForABI(Ty)) 2958 return ABIArgInfo::getIndirect(0); 2959 2960 return (isPromotableIntegerType(Ty) ? 2961 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2962} 2963 2964void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2965 llvm::GlobalValue *GV, 2966 CodeGen::CodeGenModule &M) 2967 const { 2968 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 2969 if (!FD) return; 2970 2971 llvm::CallingConv::ID CC = llvm::CallingConv::C; 2972 if (FD->hasAttr<MBlazeInterruptHandlerAttr>()) 2973 CC = llvm::CallingConv::MBLAZE_INTR; 2974 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>()) 2975 CC = llvm::CallingConv::MBLAZE_SVOL; 2976 2977 if (CC != llvm::CallingConv::C) { 2978 // Handle 'interrupt_handler' attribute: 2979 llvm::Function *F = cast<llvm::Function>(GV); 2980 2981 // Step 1: Set ISR calling convention. 2982 F->setCallingConv(CC); 2983 2984 // Step 2: Add attributes goodness. 2985 F->addFnAttr(llvm::Attribute::NoInline); 2986 } 2987 2988 // Step 3: Emit _interrupt_handler alias. 2989 if (CC == llvm::CallingConv::MBLAZE_INTR) 2990 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2991 "_interrupt_handler", GV, &M.getModule()); 2992} 2993 2994 2995//===----------------------------------------------------------------------===// 2996// MSP430 ABI Implementation 2997//===----------------------------------------------------------------------===// 2998 2999namespace { 3000 3001class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 3002public: 3003 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 3004 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 3005 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 3006 CodeGen::CodeGenModule &M) const; 3007}; 3008 3009} 3010 3011void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 3012 llvm::GlobalValue *GV, 3013 CodeGen::CodeGenModule &M) const { 3014 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 3015 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 3016 // Handle 'interrupt' attribute: 3017 llvm::Function *F = cast<llvm::Function>(GV); 3018 3019 // Step 1: Set ISR calling convention. 3020 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 3021 3022 // Step 2: Add attributes goodness. 3023 F->addFnAttr(llvm::Attribute::NoInline); 3024 3025 // Step 3: Emit ISR vector alias. 3026 unsigned Num = attr->getNumber() + 0xffe0; 3027 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 3028 "vector_" + Twine::utohexstr(Num), 3029 GV, &M.getModule()); 3030 } 3031 } 3032} 3033 3034//===----------------------------------------------------------------------===// 3035// MIPS ABI Implementation. This works for both little-endian and 3036// big-endian variants. 3037//===----------------------------------------------------------------------===// 3038 3039namespace { 3040class MipsABIInfo : public ABIInfo { 3041 bool IsO32; 3042 unsigned MinABIStackAlignInBytes; 3043 llvm::Type* HandleStructTy(QualType Ty) const; 3044public: 3045 MipsABIInfo(CodeGenTypes &CGT, bool _IsO32) : 3046 ABIInfo(CGT), IsO32(_IsO32), MinABIStackAlignInBytes(IsO32 ? 4 : 8) {} 3047 3048 ABIArgInfo classifyReturnType(QualType RetTy) const; 3049 ABIArgInfo classifyArgumentType(QualType RetTy) const; 3050 virtual void computeInfo(CGFunctionInfo &FI) const; 3051 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3052 CodeGenFunction &CGF) const; 3053}; 3054 3055class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 3056 unsigned SizeOfUnwindException; 3057public: 3058 MIPSTargetCodeGenInfo(CodeGenTypes &CGT, bool IsO32) 3059 : TargetCodeGenInfo(new MipsABIInfo(CGT, IsO32)), 3060 SizeOfUnwindException(IsO32 ? 24 : 32) {} 3061 3062 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 3063 return 29; 3064 } 3065 3066 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3067 llvm::Value *Address) const; 3068 3069 unsigned getSizeOfUnwindException() const { 3070 return SizeOfUnwindException; 3071 } 3072}; 3073} 3074 3075// In N32/64, an aligned double precision floating point field is passed in 3076// a register. 3077llvm::Type* MipsABIInfo::HandleStructTy(QualType Ty) const { 3078 if (IsO32) 3079 return 0; 3080 3081 const RecordType *RT = Ty->getAsStructureType(); 3082 3083 if (!RT) 3084 return 0; 3085 3086 const RecordDecl *RD = RT->getDecl(); 3087 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 3088 uint64_t StructSize = getContext().getTypeSize(Ty); 3089 assert(!(StructSize % 8) && "Size of structure must be multiple of 8."); 3090 3091 SmallVector<llvm::Type*, 8> ArgList; 3092 uint64_t LastOffset = 0; 3093 unsigned idx = 0; 3094 llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64); 3095 3096 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 3097 i != e; ++i, ++idx) { 3098 const QualType Ty = (*i)->getType(); 3099 const BuiltinType *BT = Ty->getAs<BuiltinType>(); 3100 3101 if (!BT || BT->getKind() != BuiltinType::Double) 3102 continue; 3103 3104 uint64_t Offset = Layout.getFieldOffset(idx); 3105 if (Offset % 64) // Ignore doubles that are not aligned. 3106 continue; 3107 3108 // Add ((Offset - LastOffset) / 64) args of type i64. 3109 for (unsigned j = (Offset - LastOffset) / 64; j > 0; --j) 3110 ArgList.push_back(I64); 3111 3112 // Add double type. 3113 ArgList.push_back(llvm::Type::getDoubleTy(getVMContext())); 3114 LastOffset = Offset + 64; 3115 } 3116 3117 // This structure doesn't have an aligned double field. 3118 if (!LastOffset) 3119 return 0; 3120 3121 // Add ((StructSize - LastOffset) / 64) args of type i64. 3122 for (unsigned N = (StructSize - LastOffset) / 64; N; --N) 3123 ArgList.push_back(I64); 3124 3125 // If the size of the remainder is not zero, add one more integer type to 3126 // ArgList. 3127 unsigned R = (StructSize - LastOffset) % 64; 3128 if (R) 3129 ArgList.push_back(llvm::IntegerType::get(getVMContext(), R)); 3130 3131 return llvm::StructType::get(getVMContext(), ArgList); 3132} 3133 3134ABIArgInfo MipsABIInfo::classifyArgumentType(QualType Ty) const { 3135 if (isAggregateTypeForABI(Ty)) { 3136 // Ignore empty aggregates. 3137 if (getContext().getTypeSize(Ty) == 0) 3138 return ABIArgInfo::getIgnore(); 3139 3140 // Records with non trivial destructors/constructors should not be passed 3141 // by value. 3142 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 3143 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3144 3145 llvm::Type *ResType; 3146 if ((ResType = HandleStructTy(Ty))) 3147 return ABIArgInfo::getDirect(ResType); 3148 3149 return ABIArgInfo::getIndirect(0); 3150 } 3151 3152 // Treat an enum type as its underlying type. 3153 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3154 Ty = EnumTy->getDecl()->getIntegerType(); 3155 3156 return (Ty->isPromotableIntegerType() ? 3157 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3158} 3159 3160ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const { 3161 if (RetTy->isVoidType()) 3162 return ABIArgInfo::getIgnore(); 3163 3164 if (isAggregateTypeForABI(RetTy)) { 3165 if ((IsO32 && RetTy->isAnyComplexType()) || 3166 (!IsO32 && (getContext().getTypeSize(RetTy) <= 128))) 3167 return ABIArgInfo::getDirect(); 3168 3169 return ABIArgInfo::getIndirect(0); 3170 } 3171 3172 // Treat an enum type as its underlying type. 3173 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 3174 RetTy = EnumTy->getDecl()->getIntegerType(); 3175 3176 return (RetTy->isPromotableIntegerType() ? 3177 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3178} 3179 3180void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const { 3181 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3182 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3183 it != ie; ++it) 3184 it->info = classifyArgumentType(it->type); 3185} 3186 3187llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3188 CodeGenFunction &CGF) const { 3189 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 3190 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 3191 3192 CGBuilderTy &Builder = CGF.Builder; 3193 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 3194 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3195 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 3196 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3197 llvm::Value *AddrTyped; 3198 3199 if (TypeAlign > MinABIStackAlignInBytes) { 3200 llvm::Value *AddrAsInt32 = CGF.Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 3201 llvm::Value *Inc = llvm::ConstantInt::get(CGF.Int32Ty, TypeAlign - 1); 3202 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -TypeAlign); 3203 llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt32, Inc); 3204 llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask); 3205 AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy); 3206 } 3207 else 3208 AddrTyped = Builder.CreateBitCast(Addr, PTy); 3209 3210 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP); 3211 TypeAlign = std::max(TypeAlign, MinABIStackAlignInBytes); 3212 uint64_t Offset = 3213 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, TypeAlign); 3214 llvm::Value *NextAddr = 3215 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 3216 "ap.next"); 3217 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3218 3219 return AddrTyped; 3220} 3221 3222bool 3223MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3224 llvm::Value *Address) const { 3225 // This information comes from gcc's implementation, which seems to 3226 // as canonical as it gets. 3227 3228 CodeGen::CGBuilderTy &Builder = CGF.Builder; 3229 llvm::LLVMContext &Context = CGF.getLLVMContext(); 3230 3231 // Everything on MIPS is 4 bytes. Double-precision FP registers 3232 // are aliased to pairs of single-precision FP registers. 3233 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 3234 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 3235 3236 // 0-31 are the general purpose registers, $0 - $31. 3237 // 32-63 are the floating-point registers, $f0 - $f31. 3238 // 64 and 65 are the multiply/divide registers, $hi and $lo. 3239 // 66 is the (notional, I think) register for signal-handler return. 3240 AssignToArrayRange(Builder, Address, Four8, 0, 65); 3241 3242 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 3243 // They are one bit wide and ignored here. 3244 3245 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 3246 // (coprocessor 1 is the FP unit) 3247 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 3248 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 3249 // 176-181 are the DSP accumulator registers. 3250 AssignToArrayRange(Builder, Address, Four8, 80, 181); 3251 3252 return false; 3253} 3254 3255//===----------------------------------------------------------------------===// 3256// TCE ABI Implementation (see http://tce.cs.tut.fi). Uses mostly the defaults. 3257// Currently subclassed only to implement custom OpenCL C function attribute 3258// handling. 3259//===----------------------------------------------------------------------===// 3260 3261namespace { 3262 3263class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo { 3264public: 3265 TCETargetCodeGenInfo(CodeGenTypes &CGT) 3266 : DefaultTargetCodeGenInfo(CGT) {} 3267 3268 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 3269 CodeGen::CodeGenModule &M) const; 3270}; 3271 3272void TCETargetCodeGenInfo::SetTargetAttributes(const Decl *D, 3273 llvm::GlobalValue *GV, 3274 CodeGen::CodeGenModule &M) const { 3275 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 3276 if (!FD) return; 3277 3278 llvm::Function *F = cast<llvm::Function>(GV); 3279 3280 if (M.getLangOptions().OpenCL) { 3281 if (FD->hasAttr<OpenCLKernelAttr>()) { 3282 // OpenCL C Kernel functions are not subject to inlining 3283 F->addFnAttr(llvm::Attribute::NoInline); 3284 3285 if (FD->hasAttr<ReqdWorkGroupSizeAttr>()) { 3286 3287 // Convert the reqd_work_group_size() attributes to metadata. 3288 llvm::LLVMContext &Context = F->getContext(); 3289 llvm::NamedMDNode *OpenCLMetadata = 3290 M.getModule().getOrInsertNamedMetadata("opencl.kernel_wg_size_info"); 3291 3292 SmallVector<llvm::Value*, 5> Operands; 3293 Operands.push_back(F); 3294 3295 Operands.push_back(llvm::Constant::getIntegerValue( 3296 llvm::Type::getInt32Ty(Context), 3297 llvm::APInt( 3298 32, 3299 FD->getAttr<ReqdWorkGroupSizeAttr>()->getXDim()))); 3300 Operands.push_back(llvm::Constant::getIntegerValue( 3301 llvm::Type::getInt32Ty(Context), 3302 llvm::APInt( 3303 32, 3304 FD->getAttr<ReqdWorkGroupSizeAttr>()->getYDim()))); 3305 Operands.push_back(llvm::Constant::getIntegerValue( 3306 llvm::Type::getInt32Ty(Context), 3307 llvm::APInt( 3308 32, 3309 FD->getAttr<ReqdWorkGroupSizeAttr>()->getZDim()))); 3310 3311 // Add a boolean constant operand for "required" (true) or "hint" (false) 3312 // for implementing the work_group_size_hint attr later. Currently 3313 // always true as the hint is not yet implemented. 3314 Operands.push_back(llvm::ConstantInt::getTrue(llvm::Type::getInt1Ty(Context))); 3315 3316 OpenCLMetadata->addOperand(llvm::MDNode::get(Context, Operands)); 3317 } 3318 } 3319 } 3320} 3321 3322} 3323 3324//===----------------------------------------------------------------------===// 3325// Hexagon ABI Implementation 3326//===----------------------------------------------------------------------===// 3327 3328namespace { 3329 3330class HexagonABIInfo : public ABIInfo { 3331 3332 3333public: 3334 HexagonABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 3335 3336private: 3337 3338 ABIArgInfo classifyReturnType(QualType RetTy) const; 3339 ABIArgInfo classifyArgumentType(QualType RetTy) const; 3340 3341 virtual void computeInfo(CGFunctionInfo &FI) const; 3342 3343 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3344 CodeGenFunction &CGF) const; 3345}; 3346 3347class HexagonTargetCodeGenInfo : public TargetCodeGenInfo { 3348public: 3349 HexagonTargetCodeGenInfo(CodeGenTypes &CGT) 3350 :TargetCodeGenInfo(new HexagonABIInfo(CGT)) {} 3351 3352 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 3353 return 29; 3354 } 3355}; 3356 3357} 3358 3359void HexagonABIInfo::computeInfo(CGFunctionInfo &FI) const { 3360 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3361 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3362 it != ie; ++it) 3363 it->info = classifyArgumentType(it->type); 3364} 3365 3366ABIArgInfo HexagonABIInfo::classifyArgumentType(QualType Ty) const { 3367 if (!isAggregateTypeForABI(Ty)) { 3368 // Treat an enum type as its underlying type. 3369 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3370 Ty = EnumTy->getDecl()->getIntegerType(); 3371 3372 return (Ty->isPromotableIntegerType() ? 3373 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3374 } 3375 3376 // Ignore empty records. 3377 if (isEmptyRecord(getContext(), Ty, true)) 3378 return ABIArgInfo::getIgnore(); 3379 3380 // Structures with either a non-trivial destructor or a non-trivial 3381 // copy constructor are always indirect. 3382 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 3383 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3384 3385 uint64_t Size = getContext().getTypeSize(Ty); 3386 if (Size > 64) 3387 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 3388 // Pass in the smallest viable integer type. 3389 else if (Size > 32) 3390 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 3391 else if (Size > 16) 3392 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3393 else if (Size > 8) 3394 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3395 else 3396 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3397} 3398 3399ABIArgInfo HexagonABIInfo::classifyReturnType(QualType RetTy) const { 3400 if (RetTy->isVoidType()) 3401 return ABIArgInfo::getIgnore(); 3402 3403 // Large vector types should be returned via memory. 3404 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 64) 3405 return ABIArgInfo::getIndirect(0); 3406 3407 if (!isAggregateTypeForABI(RetTy)) { 3408 // Treat an enum type as its underlying type. 3409 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 3410 RetTy = EnumTy->getDecl()->getIntegerType(); 3411 3412 return (RetTy->isPromotableIntegerType() ? 3413 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3414 } 3415 3416 // Structures with either a non-trivial destructor or a non-trivial 3417 // copy constructor are always indirect. 3418 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 3419 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3420 3421 if (isEmptyRecord(getContext(), RetTy, true)) 3422 return ABIArgInfo::getIgnore(); 3423 3424 // Aggregates <= 8 bytes are returned in r0; other aggregates 3425 // are returned indirectly. 3426 uint64_t Size = getContext().getTypeSize(RetTy); 3427 if (Size <= 64) { 3428 // Return in the smallest viable integer type. 3429 if (Size <= 8) 3430 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3431 if (Size <= 16) 3432 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3433 if (Size <= 32) 3434 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3435 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 3436 } 3437 3438 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 3439} 3440 3441llvm::Value *HexagonABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3442 CodeGenFunction &CGF) const { 3443 // FIXME: Need to handle alignment 3444 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 3445 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 3446 3447 CGBuilderTy &Builder = CGF.Builder; 3448 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 3449 "ap"); 3450 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3451 llvm::Type *PTy = 3452 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3453 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 3454 3455 uint64_t Offset = 3456 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 3457 llvm::Value *NextAddr = 3458 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 3459 "ap.next"); 3460 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3461 3462 return AddrTyped; 3463} 3464 3465 3466const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 3467 if (TheTargetCodeGenInfo) 3468 return *TheTargetCodeGenInfo; 3469 3470 const llvm::Triple &Triple = getContext().getTargetInfo().getTriple(); 3471 switch (Triple.getArch()) { 3472 default: 3473 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 3474 3475 case llvm::Triple::mips: 3476 case llvm::Triple::mipsel: 3477 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, true)); 3478 3479 case llvm::Triple::mips64: 3480 case llvm::Triple::mips64el: 3481 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, false)); 3482 3483 case llvm::Triple::arm: 3484 case llvm::Triple::thumb: 3485 { 3486 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS; 3487 3488 if (strcmp(getContext().getTargetInfo().getABI(), "apcs-gnu") == 0) 3489 Kind = ARMABIInfo::APCS; 3490 else if (CodeGenOpts.FloatABI == "hard") 3491 Kind = ARMABIInfo::AAPCS_VFP; 3492 3493 return *(TheTargetCodeGenInfo = new ARMTargetCodeGenInfo(Types, Kind)); 3494 } 3495 3496 case llvm::Triple::ppc: 3497 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 3498 3499 case llvm::Triple::ptx32: 3500 case llvm::Triple::ptx64: 3501 return *(TheTargetCodeGenInfo = new PTXTargetCodeGenInfo(Types)); 3502 3503 case llvm::Triple::mblaze: 3504 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types)); 3505 3506 case llvm::Triple::msp430: 3507 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 3508 3509 case llvm::Triple::tce: 3510 return *(TheTargetCodeGenInfo = new TCETargetCodeGenInfo(Types)); 3511 3512 case llvm::Triple::x86: { 3513 bool DisableMMX = strcmp(getContext().getTargetInfo().getABI(), "no-mmx") == 0; 3514 3515 if (Triple.isOSDarwin()) 3516 return *(TheTargetCodeGenInfo = 3517 new X86_32TargetCodeGenInfo(Types, true, true, DisableMMX)); 3518 3519 switch (Triple.getOS()) { 3520 case llvm::Triple::Cygwin: 3521 case llvm::Triple::MinGW32: 3522 case llvm::Triple::AuroraUX: 3523 case llvm::Triple::DragonFly: 3524 case llvm::Triple::FreeBSD: 3525 case llvm::Triple::OpenBSD: 3526 case llvm::Triple::NetBSD: 3527 return *(TheTargetCodeGenInfo = 3528 new X86_32TargetCodeGenInfo(Types, false, true, DisableMMX)); 3529 3530 default: 3531 return *(TheTargetCodeGenInfo = 3532 new X86_32TargetCodeGenInfo(Types, false, false, DisableMMX)); 3533 } 3534 } 3535 3536 case llvm::Triple::x86_64: { 3537 bool HasAVX = strcmp(getContext().getTargetInfo().getABI(), "avx") == 0; 3538 3539 switch (Triple.getOS()) { 3540 case llvm::Triple::Win32: 3541 case llvm::Triple::MinGW32: 3542 case llvm::Triple::Cygwin: 3543 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 3544 default: 3545 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types, 3546 HasAVX)); 3547 } 3548 } 3549 case llvm::Triple::hexagon: 3550 return *(TheTargetCodeGenInfo = new HexagonTargetCodeGenInfo(Types)); 3551 } 3552} 3553