TargetInfo.cpp revision a7ff62f9443efa3b13a28a1e566d4625b15b8553
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CGCXXABI.h" 18#include "CodeGenFunction.h" 19#include "clang/AST/RecordLayout.h" 20#include "clang/Frontend/CodeGenOptions.h" 21#include "llvm/ADT/Triple.h" 22#include "llvm/IR/DataLayout.h" 23#include "llvm/IR/Type.h" 24#include "llvm/Support/raw_ostream.h" 25using namespace clang; 26using namespace CodeGen; 27 28static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 29 llvm::Value *Array, 30 llvm::Value *Value, 31 unsigned FirstIndex, 32 unsigned LastIndex) { 33 // Alternatively, we could emit this as a loop in the source. 34 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 35 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 36 Builder.CreateStore(Value, Cell); 37 } 38} 39 40static bool isAggregateTypeForABI(QualType T) { 41 return !CodeGenFunction::hasScalarEvaluationKind(T) || 42 T->isMemberFunctionPointerType(); 43} 44 45ABIInfo::~ABIInfo() {} 46 47static bool isRecordReturnIndirect(const RecordType *RT, CodeGen::CodeGenTypes &CGT) { 48 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 49 if (!RD) 50 return false; 51 return CGT.CGM.getCXXABI().isReturnTypeIndirect(RD); 52} 53 54 55static bool isRecordReturnIndirect(QualType T, CodeGen::CodeGenTypes &CGT) { 56 const RecordType *RT = T->getAs<RecordType>(); 57 if (!RT) 58 return false; 59 return isRecordReturnIndirect(RT, CGT); 60} 61 62static CGCXXABI::RecordArgABI getRecordArgABI(const RecordType *RT, 63 CodeGen::CodeGenTypes &CGT) { 64 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 65 if (!RD) 66 return CGCXXABI::RAA_Default; 67 return CGT.CGM.getCXXABI().getRecordArgABI(RD); 68} 69 70static CGCXXABI::RecordArgABI getRecordArgABI(QualType T, 71 CodeGen::CodeGenTypes &CGT) { 72 const RecordType *RT = T->getAs<RecordType>(); 73 if (!RT) 74 return CGCXXABI::RAA_Default; 75 return getRecordArgABI(RT, CGT); 76} 77 78ASTContext &ABIInfo::getContext() const { 79 return CGT.getContext(); 80} 81 82llvm::LLVMContext &ABIInfo::getVMContext() const { 83 return CGT.getLLVMContext(); 84} 85 86const llvm::DataLayout &ABIInfo::getDataLayout() const { 87 return CGT.getDataLayout(); 88} 89 90const TargetInfo &ABIInfo::getTarget() const { 91 return CGT.getTarget(); 92} 93 94void ABIArgInfo::dump() const { 95 raw_ostream &OS = llvm::errs(); 96 OS << "(ABIArgInfo Kind="; 97 switch (TheKind) { 98 case Direct: 99 OS << "Direct Type="; 100 if (llvm::Type *Ty = getCoerceToType()) 101 Ty->print(OS); 102 else 103 OS << "null"; 104 break; 105 case Extend: 106 OS << "Extend"; 107 break; 108 case Ignore: 109 OS << "Ignore"; 110 break; 111 case Indirect: 112 OS << "Indirect Align=" << getIndirectAlign() 113 << " ByVal=" << getIndirectByVal() 114 << " Realign=" << getIndirectRealign(); 115 break; 116 case Expand: 117 OS << "Expand"; 118 break; 119 } 120 OS << ")\n"; 121} 122 123TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 124 125// If someone can figure out a general rule for this, that would be great. 126// It's probably just doomed to be platform-dependent, though. 127unsigned TargetCodeGenInfo::getSizeOfUnwindException() const { 128 // Verified for: 129 // x86-64 FreeBSD, Linux, Darwin 130 // x86-32 FreeBSD, Linux, Darwin 131 // PowerPC Linux, Darwin 132 // ARM Darwin (*not* EABI) 133 // AArch64 Linux 134 return 32; 135} 136 137bool TargetCodeGenInfo::isNoProtoCallVariadic(const CallArgList &args, 138 const FunctionNoProtoType *fnType) const { 139 // The following conventions are known to require this to be false: 140 // x86_stdcall 141 // MIPS 142 // For everything else, we just prefer false unless we opt out. 143 return false; 144} 145 146void 147TargetCodeGenInfo::getDependentLibraryOption(llvm::StringRef Lib, 148 llvm::SmallString<24> &Opt) const { 149 // This assumes the user is passing a library name like "rt" instead of a 150 // filename like "librt.a/so", and that they don't care whether it's static or 151 // dynamic. 152 Opt = "-l"; 153 Opt += Lib; 154} 155 156static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 157 158/// isEmptyField - Return true iff a the field is "empty", that is it 159/// is an unnamed bit-field or an (array of) empty record(s). 160static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 161 bool AllowArrays) { 162 if (FD->isUnnamedBitfield()) 163 return true; 164 165 QualType FT = FD->getType(); 166 167 // Constant arrays of empty records count as empty, strip them off. 168 // Constant arrays of zero length always count as empty. 169 if (AllowArrays) 170 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 171 if (AT->getSize() == 0) 172 return true; 173 FT = AT->getElementType(); 174 } 175 176 const RecordType *RT = FT->getAs<RecordType>(); 177 if (!RT) 178 return false; 179 180 // C++ record fields are never empty, at least in the Itanium ABI. 181 // 182 // FIXME: We should use a predicate for whether this behavior is true in the 183 // current ABI. 184 if (isa<CXXRecordDecl>(RT->getDecl())) 185 return false; 186 187 return isEmptyRecord(Context, FT, AllowArrays); 188} 189 190/// isEmptyRecord - Return true iff a structure contains only empty 191/// fields. Note that a structure with a flexible array member is not 192/// considered empty. 193static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 194 const RecordType *RT = T->getAs<RecordType>(); 195 if (!RT) 196 return 0; 197 const RecordDecl *RD = RT->getDecl(); 198 if (RD->hasFlexibleArrayMember()) 199 return false; 200 201 // If this is a C++ record, check the bases first. 202 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 203 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 204 e = CXXRD->bases_end(); i != e; ++i) 205 if (!isEmptyRecord(Context, i->getType(), true)) 206 return false; 207 208 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 209 i != e; ++i) 210 if (!isEmptyField(Context, *i, AllowArrays)) 211 return false; 212 return true; 213} 214 215/// isSingleElementStruct - Determine if a structure is a "single 216/// element struct", i.e. it has exactly one non-empty field or 217/// exactly one field which is itself a single element 218/// struct. Structures with flexible array members are never 219/// considered single element structs. 220/// 221/// \return The field declaration for the single non-empty field, if 222/// it exists. 223static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 224 const RecordType *RT = T->getAsStructureType(); 225 if (!RT) 226 return 0; 227 228 const RecordDecl *RD = RT->getDecl(); 229 if (RD->hasFlexibleArrayMember()) 230 return 0; 231 232 const Type *Found = 0; 233 234 // If this is a C++ record, check the bases first. 235 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 236 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 237 e = CXXRD->bases_end(); i != e; ++i) { 238 // Ignore empty records. 239 if (isEmptyRecord(Context, i->getType(), true)) 240 continue; 241 242 // If we already found an element then this isn't a single-element struct. 243 if (Found) 244 return 0; 245 246 // If this is non-empty and not a single element struct, the composite 247 // cannot be a single element struct. 248 Found = isSingleElementStruct(i->getType(), Context); 249 if (!Found) 250 return 0; 251 } 252 } 253 254 // Check for single element. 255 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 256 i != e; ++i) { 257 const FieldDecl *FD = *i; 258 QualType FT = FD->getType(); 259 260 // Ignore empty fields. 261 if (isEmptyField(Context, FD, true)) 262 continue; 263 264 // If we already found an element then this isn't a single-element 265 // struct. 266 if (Found) 267 return 0; 268 269 // Treat single element arrays as the element. 270 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 271 if (AT->getSize().getZExtValue() != 1) 272 break; 273 FT = AT->getElementType(); 274 } 275 276 if (!isAggregateTypeForABI(FT)) { 277 Found = FT.getTypePtr(); 278 } else { 279 Found = isSingleElementStruct(FT, Context); 280 if (!Found) 281 return 0; 282 } 283 } 284 285 // We don't consider a struct a single-element struct if it has 286 // padding beyond the element type. 287 if (Found && Context.getTypeSize(Found) != Context.getTypeSize(T)) 288 return 0; 289 290 return Found; 291} 292 293static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 294 // Treat complex types as the element type. 295 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) 296 Ty = CTy->getElementType(); 297 298 // Check for a type which we know has a simple scalar argument-passing 299 // convention without any padding. (We're specifically looking for 32 300 // and 64-bit integer and integer-equivalents, float, and double.) 301 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 302 !Ty->isEnumeralType() && !Ty->isBlockPointerType()) 303 return false; 304 305 uint64_t Size = Context.getTypeSize(Ty); 306 return Size == 32 || Size == 64; 307} 308 309/// canExpandIndirectArgument - Test whether an argument type which is to be 310/// passed indirectly (on the stack) would have the equivalent layout if it was 311/// expanded into separate arguments. If so, we prefer to do the latter to avoid 312/// inhibiting optimizations. 313/// 314// FIXME: This predicate is missing many cases, currently it just follows 315// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 316// should probably make this smarter, or better yet make the LLVM backend 317// capable of handling it. 318static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 319 // We can only expand structure types. 320 const RecordType *RT = Ty->getAs<RecordType>(); 321 if (!RT) 322 return false; 323 324 // We can only expand (C) structures. 325 // 326 // FIXME: This needs to be generalized to handle classes as well. 327 const RecordDecl *RD = RT->getDecl(); 328 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 329 return false; 330 331 uint64_t Size = 0; 332 333 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 334 i != e; ++i) { 335 const FieldDecl *FD = *i; 336 337 if (!is32Or64BitBasicType(FD->getType(), Context)) 338 return false; 339 340 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 341 // how to expand them yet, and the predicate for telling if a bitfield still 342 // counts as "basic" is more complicated than what we were doing previously. 343 if (FD->isBitField()) 344 return false; 345 346 Size += Context.getTypeSize(FD->getType()); 347 } 348 349 // Make sure there are not any holes in the struct. 350 if (Size != Context.getTypeSize(Ty)) 351 return false; 352 353 return true; 354} 355 356namespace { 357/// DefaultABIInfo - The default implementation for ABI specific 358/// details. This implementation provides information which results in 359/// self-consistent and sensible LLVM IR generation, but does not 360/// conform to any particular ABI. 361class DefaultABIInfo : public ABIInfo { 362public: 363 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 364 365 ABIArgInfo classifyReturnType(QualType RetTy) const; 366 ABIArgInfo classifyArgumentType(QualType RetTy) const; 367 368 virtual void computeInfo(CGFunctionInfo &FI) const { 369 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 370 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 371 it != ie; ++it) 372 it->info = classifyArgumentType(it->type); 373 } 374 375 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 376 CodeGenFunction &CGF) const; 377}; 378 379class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 380public: 381 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 382 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 383}; 384 385llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 386 CodeGenFunction &CGF) const { 387 return 0; 388} 389 390ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 391 if (isAggregateTypeForABI(Ty)) { 392 // Records with non trivial destructors/constructors should not be passed 393 // by value. 394 if (isRecordReturnIndirect(Ty, CGT)) 395 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 396 397 return ABIArgInfo::getIndirect(0); 398 } 399 400 // Treat an enum type as its underlying type. 401 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 402 Ty = EnumTy->getDecl()->getIntegerType(); 403 404 return (Ty->isPromotableIntegerType() ? 405 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 406} 407 408ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 409 if (RetTy->isVoidType()) 410 return ABIArgInfo::getIgnore(); 411 412 if (isAggregateTypeForABI(RetTy)) 413 return ABIArgInfo::getIndirect(0); 414 415 // Treat an enum type as its underlying type. 416 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 417 RetTy = EnumTy->getDecl()->getIntegerType(); 418 419 return (RetTy->isPromotableIntegerType() ? 420 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 421} 422 423//===----------------------------------------------------------------------===// 424// le32/PNaCl bitcode ABI Implementation 425// 426// This is a simplified version of the x86_32 ABI. Arguments and return values 427// are always passed on the stack. 428//===----------------------------------------------------------------------===// 429 430class PNaClABIInfo : public ABIInfo { 431 public: 432 PNaClABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 433 434 ABIArgInfo classifyReturnType(QualType RetTy) const; 435 ABIArgInfo classifyArgumentType(QualType RetTy) const; 436 437 virtual void computeInfo(CGFunctionInfo &FI) const; 438 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 439 CodeGenFunction &CGF) const; 440}; 441 442class PNaClTargetCodeGenInfo : public TargetCodeGenInfo { 443 public: 444 PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 445 : TargetCodeGenInfo(new PNaClABIInfo(CGT)) {} 446}; 447 448void PNaClABIInfo::computeInfo(CGFunctionInfo &FI) const { 449 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 450 451 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 452 it != ie; ++it) 453 it->info = classifyArgumentType(it->type); 454 } 455 456llvm::Value *PNaClABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 457 CodeGenFunction &CGF) const { 458 return 0; 459} 460 461/// \brief Classify argument of given type \p Ty. 462ABIArgInfo PNaClABIInfo::classifyArgumentType(QualType Ty) const { 463 if (isAggregateTypeForABI(Ty)) { 464 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) 465 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 466 return ABIArgInfo::getIndirect(0); 467 } else if (const EnumType *EnumTy = Ty->getAs<EnumType>()) { 468 // Treat an enum type as its underlying type. 469 Ty = EnumTy->getDecl()->getIntegerType(); 470 } else if (Ty->isFloatingType()) { 471 // Floating-point types don't go inreg. 472 return ABIArgInfo::getDirect(); 473 } 474 475 return (Ty->isPromotableIntegerType() ? 476 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 477} 478 479ABIArgInfo PNaClABIInfo::classifyReturnType(QualType RetTy) const { 480 if (RetTy->isVoidType()) 481 return ABIArgInfo::getIgnore(); 482 483 // In the PNaCl ABI we always return records/structures on the stack. 484 if (isAggregateTypeForABI(RetTy)) 485 return ABIArgInfo::getIndirect(0); 486 487 // Treat an enum type as its underlying type. 488 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 489 RetTy = EnumTy->getDecl()->getIntegerType(); 490 491 return (RetTy->isPromotableIntegerType() ? 492 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 493} 494 495/// IsX86_MMXType - Return true if this is an MMX type. 496bool IsX86_MMXType(llvm::Type *IRType) { 497 // Return true if the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>. 498 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && 499 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && 500 IRType->getScalarSizeInBits() != 64; 501} 502 503static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 504 StringRef Constraint, 505 llvm::Type* Ty) { 506 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) 507 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext()); 508 return Ty; 509} 510 511//===----------------------------------------------------------------------===// 512// X86-32 ABI Implementation 513//===----------------------------------------------------------------------===// 514 515/// X86_32ABIInfo - The X86-32 ABI information. 516class X86_32ABIInfo : public ABIInfo { 517 enum Class { 518 Integer, 519 Float 520 }; 521 522 static const unsigned MinABIStackAlignInBytes = 4; 523 524 bool IsDarwinVectorABI; 525 bool IsSmallStructInRegABI; 526 bool IsWin32StructABI; 527 unsigned DefaultNumRegisterParameters; 528 529 static bool isRegisterSize(unsigned Size) { 530 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 531 } 532 533 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context, 534 unsigned callingConvention); 535 536 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 537 /// such that the argument will be passed in memory. 538 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal, 539 unsigned &FreeRegs) const; 540 541 /// \brief Return the alignment to use for the given type on the stack. 542 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const; 543 544 Class classify(QualType Ty) const; 545 ABIArgInfo classifyReturnType(QualType RetTy, 546 unsigned callingConvention) const; 547 ABIArgInfo classifyArgumentType(QualType RetTy, unsigned &FreeRegs, 548 bool IsFastCall) const; 549 bool shouldUseInReg(QualType Ty, unsigned &FreeRegs, 550 bool IsFastCall, bool &NeedsPadding) const; 551 552public: 553 554 virtual void computeInfo(CGFunctionInfo &FI) const; 555 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 556 CodeGenFunction &CGF) const; 557 558 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool w, 559 unsigned r) 560 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p), 561 IsWin32StructABI(w), DefaultNumRegisterParameters(r) {} 562}; 563 564class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 565public: 566 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, 567 bool d, bool p, bool w, unsigned r) 568 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, w, r)) {} 569 570 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 571 CodeGen::CodeGenModule &CGM) const; 572 573 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 574 // Darwin uses different dwarf register numbers for EH. 575 if (CGM.getTarget().getTriple().isOSDarwin()) return 5; 576 return 4; 577 } 578 579 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 580 llvm::Value *Address) const; 581 582 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 583 StringRef Constraint, 584 llvm::Type* Ty) const { 585 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 586 } 587 588}; 589 590} 591 592/// shouldReturnTypeInRegister - Determine if the given type should be 593/// passed in a register (for the Darwin ABI). 594bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 595 ASTContext &Context, 596 unsigned callingConvention) { 597 uint64_t Size = Context.getTypeSize(Ty); 598 599 // Type must be register sized. 600 if (!isRegisterSize(Size)) 601 return false; 602 603 if (Ty->isVectorType()) { 604 // 64- and 128- bit vectors inside structures are not returned in 605 // registers. 606 if (Size == 64 || Size == 128) 607 return false; 608 609 return true; 610 } 611 612 // If this is a builtin, pointer, enum, complex type, member pointer, or 613 // member function pointer it is ok. 614 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 615 Ty->isAnyComplexType() || Ty->isEnumeralType() || 616 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 617 return true; 618 619 // Arrays are treated like records. 620 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 621 return shouldReturnTypeInRegister(AT->getElementType(), Context, 622 callingConvention); 623 624 // Otherwise, it must be a record type. 625 const RecordType *RT = Ty->getAs<RecordType>(); 626 if (!RT) return false; 627 628 // FIXME: Traverse bases here too. 629 630 // For thiscall conventions, structures will never be returned in 631 // a register. This is for compatibility with the MSVC ABI 632 if (callingConvention == llvm::CallingConv::X86_ThisCall && 633 RT->isStructureType()) { 634 return false; 635 } 636 637 // Structure types are passed in register if all fields would be 638 // passed in a register. 639 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 640 e = RT->getDecl()->field_end(); i != e; ++i) { 641 const FieldDecl *FD = *i; 642 643 // Empty fields are ignored. 644 if (isEmptyField(Context, FD, true)) 645 continue; 646 647 // Check fields recursively. 648 if (!shouldReturnTypeInRegister(FD->getType(), Context, 649 callingConvention)) 650 return false; 651 } 652 return true; 653} 654 655ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, 656 unsigned callingConvention) const { 657 if (RetTy->isVoidType()) 658 return ABIArgInfo::getIgnore(); 659 660 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 661 // On Darwin, some vectors are returned in registers. 662 if (IsDarwinVectorABI) { 663 uint64_t Size = getContext().getTypeSize(RetTy); 664 665 // 128-bit vectors are a special case; they are returned in 666 // registers and we need to make sure to pick a type the LLVM 667 // backend will like. 668 if (Size == 128) 669 return ABIArgInfo::getDirect(llvm::VectorType::get( 670 llvm::Type::getInt64Ty(getVMContext()), 2)); 671 672 // Always return in register if it fits in a general purpose 673 // register, or if it is 64 bits and has a single element. 674 if ((Size == 8 || Size == 16 || Size == 32) || 675 (Size == 64 && VT->getNumElements() == 1)) 676 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 677 Size)); 678 679 return ABIArgInfo::getIndirect(0); 680 } 681 682 return ABIArgInfo::getDirect(); 683 } 684 685 if (isAggregateTypeForABI(RetTy)) { 686 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 687 if (isRecordReturnIndirect(RT, CGT)) 688 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 689 690 // Structures with flexible arrays are always indirect. 691 if (RT->getDecl()->hasFlexibleArrayMember()) 692 return ABIArgInfo::getIndirect(0); 693 } 694 695 // If specified, structs and unions are always indirect. 696 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 697 return ABIArgInfo::getIndirect(0); 698 699 // Small structures which are register sized are generally returned 700 // in a register. 701 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext(), 702 callingConvention)) { 703 uint64_t Size = getContext().getTypeSize(RetTy); 704 705 // As a special-case, if the struct is a "single-element" struct, and 706 // the field is of type "float" or "double", return it in a 707 // floating-point register. (MSVC does not apply this special case.) 708 // We apply a similar transformation for pointer types to improve the 709 // quality of the generated IR. 710 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) 711 if ((!IsWin32StructABI && SeltTy->isRealFloatingType()) 712 || SeltTy->hasPointerRepresentation()) 713 return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0))); 714 715 // FIXME: We should be able to narrow this integer in cases with dead 716 // padding. 717 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 718 } 719 720 return ABIArgInfo::getIndirect(0); 721 } 722 723 // Treat an enum type as its underlying type. 724 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 725 RetTy = EnumTy->getDecl()->getIntegerType(); 726 727 return (RetTy->isPromotableIntegerType() ? 728 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 729} 730 731static bool isSSEVectorType(ASTContext &Context, QualType Ty) { 732 return Ty->getAs<VectorType>() && Context.getTypeSize(Ty) == 128; 733} 734 735static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) { 736 const RecordType *RT = Ty->getAs<RecordType>(); 737 if (!RT) 738 return 0; 739 const RecordDecl *RD = RT->getDecl(); 740 741 // If this is a C++ record, check the bases first. 742 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 743 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 744 e = CXXRD->bases_end(); i != e; ++i) 745 if (!isRecordWithSSEVectorType(Context, i->getType())) 746 return false; 747 748 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 749 i != e; ++i) { 750 QualType FT = i->getType(); 751 752 if (isSSEVectorType(Context, FT)) 753 return true; 754 755 if (isRecordWithSSEVectorType(Context, FT)) 756 return true; 757 } 758 759 return false; 760} 761 762unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty, 763 unsigned Align) const { 764 // Otherwise, if the alignment is less than or equal to the minimum ABI 765 // alignment, just use the default; the backend will handle this. 766 if (Align <= MinABIStackAlignInBytes) 767 return 0; // Use default alignment. 768 769 // On non-Darwin, the stack type alignment is always 4. 770 if (!IsDarwinVectorABI) { 771 // Set explicit alignment, since we may need to realign the top. 772 return MinABIStackAlignInBytes; 773 } 774 775 // Otherwise, if the type contains an SSE vector type, the alignment is 16. 776 if (Align >= 16 && (isSSEVectorType(getContext(), Ty) || 777 isRecordWithSSEVectorType(getContext(), Ty))) 778 return 16; 779 780 return MinABIStackAlignInBytes; 781} 782 783ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal, 784 unsigned &FreeRegs) const { 785 if (!ByVal) { 786 if (FreeRegs) { 787 --FreeRegs; // Non byval indirects just use one pointer. 788 return ABIArgInfo::getIndirectInReg(0, false); 789 } 790 return ABIArgInfo::getIndirect(0, false); 791 } 792 793 // Compute the byval alignment. 794 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 795 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign); 796 if (StackAlign == 0) 797 return ABIArgInfo::getIndirect(4); 798 799 // If the stack alignment is less than the type alignment, realign the 800 // argument. 801 if (StackAlign < TypeAlign) 802 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, 803 /*Realign=*/true); 804 805 return ABIArgInfo::getIndirect(StackAlign); 806} 807 808X86_32ABIInfo::Class X86_32ABIInfo::classify(QualType Ty) const { 809 const Type *T = isSingleElementStruct(Ty, getContext()); 810 if (!T) 811 T = Ty.getTypePtr(); 812 813 if (const BuiltinType *BT = T->getAs<BuiltinType>()) { 814 BuiltinType::Kind K = BT->getKind(); 815 if (K == BuiltinType::Float || K == BuiltinType::Double) 816 return Float; 817 } 818 return Integer; 819} 820 821bool X86_32ABIInfo::shouldUseInReg(QualType Ty, unsigned &FreeRegs, 822 bool IsFastCall, bool &NeedsPadding) const { 823 NeedsPadding = false; 824 Class C = classify(Ty); 825 if (C == Float) 826 return false; 827 828 unsigned Size = getContext().getTypeSize(Ty); 829 unsigned SizeInRegs = (Size + 31) / 32; 830 831 if (SizeInRegs == 0) 832 return false; 833 834 if (SizeInRegs > FreeRegs) { 835 FreeRegs = 0; 836 return false; 837 } 838 839 FreeRegs -= SizeInRegs; 840 841 if (IsFastCall) { 842 if (Size > 32) 843 return false; 844 845 if (Ty->isIntegralOrEnumerationType()) 846 return true; 847 848 if (Ty->isPointerType()) 849 return true; 850 851 if (Ty->isReferenceType()) 852 return true; 853 854 if (FreeRegs) 855 NeedsPadding = true; 856 857 return false; 858 } 859 860 return true; 861} 862 863ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty, 864 unsigned &FreeRegs, 865 bool IsFastCall) const { 866 // FIXME: Set alignment on indirect arguments. 867 if (isAggregateTypeForABI(Ty)) { 868 if (const RecordType *RT = Ty->getAs<RecordType>()) { 869 if (IsWin32StructABI) 870 return getIndirectResult(Ty, true, FreeRegs); 871 872 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, CGT)) 873 return getIndirectResult(Ty, RAA == CGCXXABI::RAA_DirectInMemory, FreeRegs); 874 875 // Structures with flexible arrays are always indirect. 876 if (RT->getDecl()->hasFlexibleArrayMember()) 877 return getIndirectResult(Ty, true, FreeRegs); 878 } 879 880 // Ignore empty structs/unions. 881 if (isEmptyRecord(getContext(), Ty, true)) 882 return ABIArgInfo::getIgnore(); 883 884 llvm::LLVMContext &LLVMContext = getVMContext(); 885 llvm::IntegerType *Int32 = llvm::Type::getInt32Ty(LLVMContext); 886 bool NeedsPadding; 887 if (shouldUseInReg(Ty, FreeRegs, IsFastCall, NeedsPadding)) { 888 unsigned SizeInRegs = (getContext().getTypeSize(Ty) + 31) / 32; 889 SmallVector<llvm::Type*, 3> Elements; 890 for (unsigned I = 0; I < SizeInRegs; ++I) 891 Elements.push_back(Int32); 892 llvm::Type *Result = llvm::StructType::get(LLVMContext, Elements); 893 return ABIArgInfo::getDirectInReg(Result); 894 } 895 llvm::IntegerType *PaddingType = NeedsPadding ? Int32 : 0; 896 897 // Expand small (<= 128-bit) record types when we know that the stack layout 898 // of those arguments will match the struct. This is important because the 899 // LLVM backend isn't smart enough to remove byval, which inhibits many 900 // optimizations. 901 if (getContext().getTypeSize(Ty) <= 4*32 && 902 canExpandIndirectArgument(Ty, getContext())) 903 return ABIArgInfo::getExpandWithPadding(IsFastCall, PaddingType); 904 905 return getIndirectResult(Ty, true, FreeRegs); 906 } 907 908 if (const VectorType *VT = Ty->getAs<VectorType>()) { 909 // On Darwin, some vectors are passed in memory, we handle this by passing 910 // it as an i8/i16/i32/i64. 911 if (IsDarwinVectorABI) { 912 uint64_t Size = getContext().getTypeSize(Ty); 913 if ((Size == 8 || Size == 16 || Size == 32) || 914 (Size == 64 && VT->getNumElements() == 1)) 915 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 916 Size)); 917 } 918 919 if (IsX86_MMXType(CGT.ConvertType(Ty))) 920 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 64)); 921 922 return ABIArgInfo::getDirect(); 923 } 924 925 926 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 927 Ty = EnumTy->getDecl()->getIntegerType(); 928 929 bool NeedsPadding; 930 bool InReg = shouldUseInReg(Ty, FreeRegs, IsFastCall, NeedsPadding); 931 932 if (Ty->isPromotableIntegerType()) { 933 if (InReg) 934 return ABIArgInfo::getExtendInReg(); 935 return ABIArgInfo::getExtend(); 936 } 937 if (InReg) 938 return ABIArgInfo::getDirectInReg(); 939 return ABIArgInfo::getDirect(); 940} 941 942void X86_32ABIInfo::computeInfo(CGFunctionInfo &FI) const { 943 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 944 FI.getCallingConvention()); 945 946 unsigned CC = FI.getCallingConvention(); 947 bool IsFastCall = CC == llvm::CallingConv::X86_FastCall; 948 unsigned FreeRegs; 949 if (IsFastCall) 950 FreeRegs = 2; 951 else if (FI.getHasRegParm()) 952 FreeRegs = FI.getRegParm(); 953 else 954 FreeRegs = DefaultNumRegisterParameters; 955 956 // If the return value is indirect, then the hidden argument is consuming one 957 // integer register. 958 if (FI.getReturnInfo().isIndirect() && FreeRegs) { 959 --FreeRegs; 960 ABIArgInfo &Old = FI.getReturnInfo(); 961 Old = ABIArgInfo::getIndirectInReg(Old.getIndirectAlign(), 962 Old.getIndirectByVal(), 963 Old.getIndirectRealign()); 964 } 965 966 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 967 it != ie; ++it) 968 it->info = classifyArgumentType(it->type, FreeRegs, IsFastCall); 969} 970 971llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 972 CodeGenFunction &CGF) const { 973 llvm::Type *BPP = CGF.Int8PtrPtrTy; 974 975 CGBuilderTy &Builder = CGF.Builder; 976 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 977 "ap"); 978 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 979 980 // Compute if the address needs to be aligned 981 unsigned Align = CGF.getContext().getTypeAlignInChars(Ty).getQuantity(); 982 Align = getTypeStackAlignInBytes(Ty, Align); 983 Align = std::max(Align, 4U); 984 if (Align > 4) { 985 // addr = (addr + align - 1) & -align; 986 llvm::Value *Offset = 987 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1); 988 Addr = CGF.Builder.CreateGEP(Addr, Offset); 989 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(Addr, 990 CGF.Int32Ty); 991 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -Align); 992 Addr = CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 993 Addr->getType(), 994 "ap.cur.aligned"); 995 } 996 997 llvm::Type *PTy = 998 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 999 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1000 1001 uint64_t Offset = 1002 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, Align); 1003 llvm::Value *NextAddr = 1004 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 1005 "ap.next"); 1006 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1007 1008 return AddrTyped; 1009} 1010 1011void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 1012 llvm::GlobalValue *GV, 1013 CodeGen::CodeGenModule &CGM) const { 1014 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 1015 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 1016 // Get the LLVM function. 1017 llvm::Function *Fn = cast<llvm::Function>(GV); 1018 1019 // Now add the 'alignstack' attribute with a value of 16. 1020 llvm::AttrBuilder B; 1021 B.addStackAlignmentAttr(16); 1022 Fn->addAttributes(llvm::AttributeSet::FunctionIndex, 1023 llvm::AttributeSet::get(CGM.getLLVMContext(), 1024 llvm::AttributeSet::FunctionIndex, 1025 B)); 1026 } 1027 } 1028} 1029 1030bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 1031 CodeGen::CodeGenFunction &CGF, 1032 llvm::Value *Address) const { 1033 CodeGen::CGBuilderTy &Builder = CGF.Builder; 1034 1035 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 1036 1037 // 0-7 are the eight integer registers; the order is different 1038 // on Darwin (for EH), but the range is the same. 1039 // 8 is %eip. 1040 AssignToArrayRange(Builder, Address, Four8, 0, 8); 1041 1042 if (CGF.CGM.getTarget().getTriple().isOSDarwin()) { 1043 // 12-16 are st(0..4). Not sure why we stop at 4. 1044 // These have size 16, which is sizeof(long double) on 1045 // platforms with 8-byte alignment for that type. 1046 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16); 1047 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 1048 1049 } else { 1050 // 9 is %eflags, which doesn't get a size on Darwin for some 1051 // reason. 1052 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 1053 1054 // 11-16 are st(0..5). Not sure why we stop at 5. 1055 // These have size 12, which is sizeof(long double) on 1056 // platforms with 4-byte alignment for that type. 1057 llvm::Value *Twelve8 = llvm::ConstantInt::get(CGF.Int8Ty, 12); 1058 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 1059 } 1060 1061 return false; 1062} 1063 1064//===----------------------------------------------------------------------===// 1065// X86-64 ABI Implementation 1066//===----------------------------------------------------------------------===// 1067 1068 1069namespace { 1070/// X86_64ABIInfo - The X86_64 ABI information. 1071class X86_64ABIInfo : public ABIInfo { 1072 enum Class { 1073 Integer = 0, 1074 SSE, 1075 SSEUp, 1076 X87, 1077 X87Up, 1078 ComplexX87, 1079 NoClass, 1080 Memory 1081 }; 1082 1083 /// merge - Implement the X86_64 ABI merging algorithm. 1084 /// 1085 /// Merge an accumulating classification \arg Accum with a field 1086 /// classification \arg Field. 1087 /// 1088 /// \param Accum - The accumulating classification. This should 1089 /// always be either NoClass or the result of a previous merge 1090 /// call. In addition, this should never be Memory (the caller 1091 /// should just return Memory for the aggregate). 1092 static Class merge(Class Accum, Class Field); 1093 1094 /// postMerge - Implement the X86_64 ABI post merging algorithm. 1095 /// 1096 /// Post merger cleanup, reduces a malformed Hi and Lo pair to 1097 /// final MEMORY or SSE classes when necessary. 1098 /// 1099 /// \param AggregateSize - The size of the current aggregate in 1100 /// the classification process. 1101 /// 1102 /// \param Lo - The classification for the parts of the type 1103 /// residing in the low word of the containing object. 1104 /// 1105 /// \param Hi - The classification for the parts of the type 1106 /// residing in the higher words of the containing object. 1107 /// 1108 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const; 1109 1110 /// classify - Determine the x86_64 register classes in which the 1111 /// given type T should be passed. 1112 /// 1113 /// \param Lo - The classification for the parts of the type 1114 /// residing in the low word of the containing object. 1115 /// 1116 /// \param Hi - The classification for the parts of the type 1117 /// residing in the high word of the containing object. 1118 /// 1119 /// \param OffsetBase - The bit offset of this type in the 1120 /// containing object. Some parameters are classified different 1121 /// depending on whether they straddle an eightbyte boundary. 1122 /// 1123 /// If a word is unused its result will be NoClass; if a type should 1124 /// be passed in Memory then at least the classification of \arg Lo 1125 /// will be Memory. 1126 /// 1127 /// The \arg Lo class will be NoClass iff the argument is ignored. 1128 /// 1129 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 1130 /// also be ComplexX87. 1131 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 1132 1133 llvm::Type *GetByteVectorType(QualType Ty) const; 1134 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType, 1135 unsigned IROffset, QualType SourceTy, 1136 unsigned SourceOffset) const; 1137 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType, 1138 unsigned IROffset, QualType SourceTy, 1139 unsigned SourceOffset) const; 1140 1141 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 1142 /// such that the argument will be returned in memory. 1143 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 1144 1145 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 1146 /// such that the argument will be passed in memory. 1147 /// 1148 /// \param freeIntRegs - The number of free integer registers remaining 1149 /// available. 1150 ABIArgInfo getIndirectResult(QualType Ty, unsigned freeIntRegs) const; 1151 1152 ABIArgInfo classifyReturnType(QualType RetTy) const; 1153 1154 ABIArgInfo classifyArgumentType(QualType Ty, 1155 unsigned freeIntRegs, 1156 unsigned &neededInt, 1157 unsigned &neededSSE) const; 1158 1159 bool IsIllegalVectorType(QualType Ty) const; 1160 1161 /// The 0.98 ABI revision clarified a lot of ambiguities, 1162 /// unfortunately in ways that were not always consistent with 1163 /// certain previous compilers. In particular, platforms which 1164 /// required strict binary compatibility with older versions of GCC 1165 /// may need to exempt themselves. 1166 bool honorsRevision0_98() const { 1167 return !getTarget().getTriple().isOSDarwin(); 1168 } 1169 1170 bool HasAVX; 1171 // Some ABIs (e.g. X32 ABI and Native Client OS) use 32 bit pointers on 1172 // 64-bit hardware. 1173 bool Has64BitPointers; 1174 1175public: 1176 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool hasavx) : 1177 ABIInfo(CGT), HasAVX(hasavx), 1178 Has64BitPointers(CGT.getDataLayout().getPointerSize(0) == 8) { 1179 } 1180 1181 bool isPassedUsingAVXType(QualType type) const { 1182 unsigned neededInt, neededSSE; 1183 // The freeIntRegs argument doesn't matter here. 1184 ABIArgInfo info = classifyArgumentType(type, 0, neededInt, neededSSE); 1185 if (info.isDirect()) { 1186 llvm::Type *ty = info.getCoerceToType(); 1187 if (llvm::VectorType *vectorTy = dyn_cast_or_null<llvm::VectorType>(ty)) 1188 return (vectorTy->getBitWidth() > 128); 1189 } 1190 return false; 1191 } 1192 1193 virtual void computeInfo(CGFunctionInfo &FI) const; 1194 1195 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1196 CodeGenFunction &CGF) const; 1197}; 1198 1199/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 1200class WinX86_64ABIInfo : public ABIInfo { 1201 1202 ABIArgInfo classify(QualType Ty, bool IsReturnType) const; 1203 1204public: 1205 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 1206 1207 virtual void computeInfo(CGFunctionInfo &FI) const; 1208 1209 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1210 CodeGenFunction &CGF) const; 1211}; 1212 1213class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1214public: 1215 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 1216 : TargetCodeGenInfo(new X86_64ABIInfo(CGT, HasAVX)) {} 1217 1218 const X86_64ABIInfo &getABIInfo() const { 1219 return static_cast<const X86_64ABIInfo&>(TargetCodeGenInfo::getABIInfo()); 1220 } 1221 1222 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 1223 return 7; 1224 } 1225 1226 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1227 llvm::Value *Address) const { 1228 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 1229 1230 // 0-15 are the 16 integer registers. 1231 // 16 is %rip. 1232 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16); 1233 return false; 1234 } 1235 1236 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 1237 StringRef Constraint, 1238 llvm::Type* Ty) const { 1239 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 1240 } 1241 1242 bool isNoProtoCallVariadic(const CallArgList &args, 1243 const FunctionNoProtoType *fnType) const { 1244 // The default CC on x86-64 sets %al to the number of SSA 1245 // registers used, and GCC sets this when calling an unprototyped 1246 // function, so we override the default behavior. However, don't do 1247 // that when AVX types are involved: the ABI explicitly states it is 1248 // undefined, and it doesn't work in practice because of how the ABI 1249 // defines varargs anyway. 1250 if (fnType->getCallConv() == CC_Default || fnType->getCallConv() == CC_C) { 1251 bool HasAVXType = false; 1252 for (CallArgList::const_iterator 1253 it = args.begin(), ie = args.end(); it != ie; ++it) { 1254 if (getABIInfo().isPassedUsingAVXType(it->Ty)) { 1255 HasAVXType = true; 1256 break; 1257 } 1258 } 1259 1260 if (!HasAVXType) 1261 return true; 1262 } 1263 1264 return TargetCodeGenInfo::isNoProtoCallVariadic(args, fnType); 1265 } 1266 1267}; 1268 1269static std::string qualifyWindowsLibrary(llvm::StringRef Lib) { 1270 // If the argument does not end in .lib, automatically add the suffix. This 1271 // matches the behavior of MSVC. 1272 std::string ArgStr = Lib; 1273 if (Lib.size() <= 4 || 1274 Lib.substr(Lib.size() - 4).compare_lower(".lib") != 0) { 1275 ArgStr += ".lib"; 1276 } 1277 return ArgStr; 1278} 1279 1280class WinX86_32TargetCodeGenInfo : public X86_32TargetCodeGenInfo { 1281public: 1282 WinX86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, unsigned RegParms) 1283 : X86_32TargetCodeGenInfo(CGT, false, true, true, RegParms) {} 1284 1285 void getDependentLibraryOption(llvm::StringRef Lib, 1286 llvm::SmallString<24> &Opt) const { 1287 Opt = "/DEFAULTLIB:"; 1288 Opt += qualifyWindowsLibrary(Lib); 1289 } 1290 1291 void getDetectMismatchOption(llvm::StringRef Name, 1292 llvm::StringRef Value, 1293 llvm::SmallString<32> &Opt) const { 1294 Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\""; 1295 } 1296}; 1297 1298class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1299public: 1300 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 1301 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {} 1302 1303 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 1304 return 7; 1305 } 1306 1307 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1308 llvm::Value *Address) const { 1309 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 1310 1311 // 0-15 are the 16 integer registers. 1312 // 16 is %rip. 1313 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16); 1314 return false; 1315 } 1316 1317 void getDependentLibraryOption(llvm::StringRef Lib, 1318 llvm::SmallString<24> &Opt) const { 1319 Opt = "/DEFAULTLIB:"; 1320 Opt += qualifyWindowsLibrary(Lib); 1321 } 1322 1323 void getDetectMismatchOption(llvm::StringRef Name, 1324 llvm::StringRef Value, 1325 llvm::SmallString<32> &Opt) const { 1326 Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\""; 1327 } 1328}; 1329 1330} 1331 1332void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo, 1333 Class &Hi) const { 1334 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1335 // 1336 // (a) If one of the classes is Memory, the whole argument is passed in 1337 // memory. 1338 // 1339 // (b) If X87UP is not preceded by X87, the whole argument is passed in 1340 // memory. 1341 // 1342 // (c) If the size of the aggregate exceeds two eightbytes and the first 1343 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole 1344 // argument is passed in memory. NOTE: This is necessary to keep the 1345 // ABI working for processors that don't support the __m256 type. 1346 // 1347 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE. 1348 // 1349 // Some of these are enforced by the merging logic. Others can arise 1350 // only with unions; for example: 1351 // union { _Complex double; unsigned; } 1352 // 1353 // Note that clauses (b) and (c) were added in 0.98. 1354 // 1355 if (Hi == Memory) 1356 Lo = Memory; 1357 if (Hi == X87Up && Lo != X87 && honorsRevision0_98()) 1358 Lo = Memory; 1359 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp)) 1360 Lo = Memory; 1361 if (Hi == SSEUp && Lo != SSE) 1362 Hi = SSE; 1363} 1364 1365X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 1366 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 1367 // classified recursively so that always two fields are 1368 // considered. The resulting class is calculated according to 1369 // the classes of the fields in the eightbyte: 1370 // 1371 // (a) If both classes are equal, this is the resulting class. 1372 // 1373 // (b) If one of the classes is NO_CLASS, the resulting class is 1374 // the other class. 1375 // 1376 // (c) If one of the classes is MEMORY, the result is the MEMORY 1377 // class. 1378 // 1379 // (d) If one of the classes is INTEGER, the result is the 1380 // INTEGER. 1381 // 1382 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 1383 // MEMORY is used as class. 1384 // 1385 // (f) Otherwise class SSE is used. 1386 1387 // Accum should never be memory (we should have returned) or 1388 // ComplexX87 (because this cannot be passed in a structure). 1389 assert((Accum != Memory && Accum != ComplexX87) && 1390 "Invalid accumulated classification during merge."); 1391 if (Accum == Field || Field == NoClass) 1392 return Accum; 1393 if (Field == Memory) 1394 return Memory; 1395 if (Accum == NoClass) 1396 return Field; 1397 if (Accum == Integer || Field == Integer) 1398 return Integer; 1399 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 1400 Accum == X87 || Accum == X87Up) 1401 return Memory; 1402 return SSE; 1403} 1404 1405void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 1406 Class &Lo, Class &Hi) const { 1407 // FIXME: This code can be simplified by introducing a simple value class for 1408 // Class pairs with appropriate constructor methods for the various 1409 // situations. 1410 1411 // FIXME: Some of the split computations are wrong; unaligned vectors 1412 // shouldn't be passed in registers for example, so there is no chance they 1413 // can straddle an eightbyte. Verify & simplify. 1414 1415 Lo = Hi = NoClass; 1416 1417 Class &Current = OffsetBase < 64 ? Lo : Hi; 1418 Current = Memory; 1419 1420 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 1421 BuiltinType::Kind k = BT->getKind(); 1422 1423 if (k == BuiltinType::Void) { 1424 Current = NoClass; 1425 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 1426 Lo = Integer; 1427 Hi = Integer; 1428 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 1429 Current = Integer; 1430 } else if ((k == BuiltinType::Float || k == BuiltinType::Double) || 1431 (k == BuiltinType::LongDouble && 1432 getTarget().getTriple().getOS() == llvm::Triple::NaCl)) { 1433 Current = SSE; 1434 } else if (k == BuiltinType::LongDouble) { 1435 Lo = X87; 1436 Hi = X87Up; 1437 } 1438 // FIXME: _Decimal32 and _Decimal64 are SSE. 1439 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 1440 return; 1441 } 1442 1443 if (const EnumType *ET = Ty->getAs<EnumType>()) { 1444 // Classify the underlying integer type. 1445 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 1446 return; 1447 } 1448 1449 if (Ty->hasPointerRepresentation()) { 1450 Current = Integer; 1451 return; 1452 } 1453 1454 if (Ty->isMemberPointerType()) { 1455 if (Ty->isMemberFunctionPointerType() && Has64BitPointers) 1456 Lo = Hi = Integer; 1457 else 1458 Current = Integer; 1459 return; 1460 } 1461 1462 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1463 uint64_t Size = getContext().getTypeSize(VT); 1464 if (Size == 32) { 1465 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1466 // float> as integer. 1467 Current = Integer; 1468 1469 // If this type crosses an eightbyte boundary, it should be 1470 // split. 1471 uint64_t EB_Real = (OffsetBase) / 64; 1472 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 1473 if (EB_Real != EB_Imag) 1474 Hi = Lo; 1475 } else if (Size == 64) { 1476 // gcc passes <1 x double> in memory. :( 1477 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 1478 return; 1479 1480 // gcc passes <1 x long long> as INTEGER. 1481 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 1482 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 1483 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 1484 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 1485 Current = Integer; 1486 else 1487 Current = SSE; 1488 1489 // If this type crosses an eightbyte boundary, it should be 1490 // split. 1491 if (OffsetBase && OffsetBase != 64) 1492 Hi = Lo; 1493 } else if (Size == 128 || (HasAVX && Size == 256)) { 1494 // Arguments of 256-bits are split into four eightbyte chunks. The 1495 // least significant one belongs to class SSE and all the others to class 1496 // SSEUP. The original Lo and Hi design considers that types can't be 1497 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense. 1498 // This design isn't correct for 256-bits, but since there're no cases 1499 // where the upper parts would need to be inspected, avoid adding 1500 // complexity and just consider Hi to match the 64-256 part. 1501 Lo = SSE; 1502 Hi = SSEUp; 1503 } 1504 return; 1505 } 1506 1507 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 1508 QualType ET = getContext().getCanonicalType(CT->getElementType()); 1509 1510 uint64_t Size = getContext().getTypeSize(Ty); 1511 if (ET->isIntegralOrEnumerationType()) { 1512 if (Size <= 64) 1513 Current = Integer; 1514 else if (Size <= 128) 1515 Lo = Hi = Integer; 1516 } else if (ET == getContext().FloatTy) 1517 Current = SSE; 1518 else if (ET == getContext().DoubleTy || 1519 (ET == getContext().LongDoubleTy && 1520 getTarget().getTriple().getOS() == llvm::Triple::NaCl)) 1521 Lo = Hi = SSE; 1522 else if (ET == getContext().LongDoubleTy) 1523 Current = ComplexX87; 1524 1525 // If this complex type crosses an eightbyte boundary then it 1526 // should be split. 1527 uint64_t EB_Real = (OffsetBase) / 64; 1528 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 1529 if (Hi == NoClass && EB_Real != EB_Imag) 1530 Hi = Lo; 1531 1532 return; 1533 } 1534 1535 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 1536 // Arrays are treated like structures. 1537 1538 uint64_t Size = getContext().getTypeSize(Ty); 1539 1540 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1541 // than four eightbytes, ..., it has class MEMORY. 1542 if (Size > 256) 1543 return; 1544 1545 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1546 // fields, it has class MEMORY. 1547 // 1548 // Only need to check alignment of array base. 1549 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1550 return; 1551 1552 // Otherwise implement simplified merge. We could be smarter about 1553 // this, but it isn't worth it and would be harder to verify. 1554 Current = NoClass; 1555 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1556 uint64_t ArraySize = AT->getSize().getZExtValue(); 1557 1558 // The only case a 256-bit wide vector could be used is when the array 1559 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1560 // to work for sizes wider than 128, early check and fallback to memory. 1561 if (Size > 128 && EltSize != 256) 1562 return; 1563 1564 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1565 Class FieldLo, FieldHi; 1566 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 1567 Lo = merge(Lo, FieldLo); 1568 Hi = merge(Hi, FieldHi); 1569 if (Lo == Memory || Hi == Memory) 1570 break; 1571 } 1572 1573 postMerge(Size, Lo, Hi); 1574 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 1575 return; 1576 } 1577 1578 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1579 uint64_t Size = getContext().getTypeSize(Ty); 1580 1581 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1582 // than four eightbytes, ..., it has class MEMORY. 1583 if (Size > 256) 1584 return; 1585 1586 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1587 // copy constructor or a non-trivial destructor, it is passed by invisible 1588 // reference. 1589 if (getRecordArgABI(RT, CGT)) 1590 return; 1591 1592 const RecordDecl *RD = RT->getDecl(); 1593 1594 // Assume variable sized types are passed in memory. 1595 if (RD->hasFlexibleArrayMember()) 1596 return; 1597 1598 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1599 1600 // Reset Lo class, this will be recomputed. 1601 Current = NoClass; 1602 1603 // If this is a C++ record, classify the bases first. 1604 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1605 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1606 e = CXXRD->bases_end(); i != e; ++i) { 1607 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1608 "Unexpected base class!"); 1609 const CXXRecordDecl *Base = 1610 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1611 1612 // Classify this field. 1613 // 1614 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1615 // single eightbyte, each is classified separately. Each eightbyte gets 1616 // initialized to class NO_CLASS. 1617 Class FieldLo, FieldHi; 1618 uint64_t Offset = 1619 OffsetBase + getContext().toBits(Layout.getBaseClassOffset(Base)); 1620 classify(i->getType(), Offset, FieldLo, FieldHi); 1621 Lo = merge(Lo, FieldLo); 1622 Hi = merge(Hi, FieldHi); 1623 if (Lo == Memory || Hi == Memory) 1624 break; 1625 } 1626 } 1627 1628 // Classify the fields one at a time, merging the results. 1629 unsigned idx = 0; 1630 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1631 i != e; ++i, ++idx) { 1632 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1633 bool BitField = i->isBitField(); 1634 1635 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than 1636 // four eightbytes, or it contains unaligned fields, it has class MEMORY. 1637 // 1638 // The only case a 256-bit wide vector could be used is when the struct 1639 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1640 // to work for sizes wider than 128, early check and fallback to memory. 1641 // 1642 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) { 1643 Lo = Memory; 1644 return; 1645 } 1646 // Note, skip this test for bit-fields, see below. 1647 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1648 Lo = Memory; 1649 return; 1650 } 1651 1652 // Classify this field. 1653 // 1654 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1655 // exceeds a single eightbyte, each is classified 1656 // separately. Each eightbyte gets initialized to class 1657 // NO_CLASS. 1658 Class FieldLo, FieldHi; 1659 1660 // Bit-fields require special handling, they do not force the 1661 // structure to be passed in memory even if unaligned, and 1662 // therefore they can straddle an eightbyte. 1663 if (BitField) { 1664 // Ignore padding bit-fields. 1665 if (i->isUnnamedBitfield()) 1666 continue; 1667 1668 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1669 uint64_t Size = i->getBitWidthValue(getContext()); 1670 1671 uint64_t EB_Lo = Offset / 64; 1672 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1673 FieldLo = FieldHi = NoClass; 1674 if (EB_Lo) { 1675 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1676 FieldLo = NoClass; 1677 FieldHi = Integer; 1678 } else { 1679 FieldLo = Integer; 1680 FieldHi = EB_Hi ? Integer : NoClass; 1681 } 1682 } else 1683 classify(i->getType(), Offset, FieldLo, FieldHi); 1684 Lo = merge(Lo, FieldLo); 1685 Hi = merge(Hi, FieldHi); 1686 if (Lo == Memory || Hi == Memory) 1687 break; 1688 } 1689 1690 postMerge(Size, Lo, Hi); 1691 } 1692} 1693 1694ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1695 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1696 // place naturally. 1697 if (!isAggregateTypeForABI(Ty)) { 1698 // Treat an enum type as its underlying type. 1699 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1700 Ty = EnumTy->getDecl()->getIntegerType(); 1701 1702 return (Ty->isPromotableIntegerType() ? 1703 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1704 } 1705 1706 return ABIArgInfo::getIndirect(0); 1707} 1708 1709bool X86_64ABIInfo::IsIllegalVectorType(QualType Ty) const { 1710 if (const VectorType *VecTy = Ty->getAs<VectorType>()) { 1711 uint64_t Size = getContext().getTypeSize(VecTy); 1712 unsigned LargestVector = HasAVX ? 256 : 128; 1713 if (Size <= 64 || Size > LargestVector) 1714 return true; 1715 } 1716 1717 return false; 1718} 1719 1720ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty, 1721 unsigned freeIntRegs) const { 1722 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1723 // place naturally. 1724 // 1725 // This assumption is optimistic, as there could be free registers available 1726 // when we need to pass this argument in memory, and LLVM could try to pass 1727 // the argument in the free register. This does not seem to happen currently, 1728 // but this code would be much safer if we could mark the argument with 1729 // 'onstack'. See PR12193. 1730 if (!isAggregateTypeForABI(Ty) && !IsIllegalVectorType(Ty)) { 1731 // Treat an enum type as its underlying type. 1732 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1733 Ty = EnumTy->getDecl()->getIntegerType(); 1734 1735 return (Ty->isPromotableIntegerType() ? 1736 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1737 } 1738 1739 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) 1740 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 1741 1742 // Compute the byval alignment. We specify the alignment of the byval in all 1743 // cases so that the mid-level optimizer knows the alignment of the byval. 1744 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U); 1745 1746 // Attempt to avoid passing indirect results using byval when possible. This 1747 // is important for good codegen. 1748 // 1749 // We do this by coercing the value into a scalar type which the backend can 1750 // handle naturally (i.e., without using byval). 1751 // 1752 // For simplicity, we currently only do this when we have exhausted all of the 1753 // free integer registers. Doing this when there are free integer registers 1754 // would require more care, as we would have to ensure that the coerced value 1755 // did not claim the unused register. That would require either reording the 1756 // arguments to the function (so that any subsequent inreg values came first), 1757 // or only doing this optimization when there were no following arguments that 1758 // might be inreg. 1759 // 1760 // We currently expect it to be rare (particularly in well written code) for 1761 // arguments to be passed on the stack when there are still free integer 1762 // registers available (this would typically imply large structs being passed 1763 // by value), so this seems like a fair tradeoff for now. 1764 // 1765 // We can revisit this if the backend grows support for 'onstack' parameter 1766 // attributes. See PR12193. 1767 if (freeIntRegs == 0) { 1768 uint64_t Size = getContext().getTypeSize(Ty); 1769 1770 // If this type fits in an eightbyte, coerce it into the matching integral 1771 // type, which will end up on the stack (with alignment 8). 1772 if (Align == 8 && Size <= 64) 1773 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 1774 Size)); 1775 } 1776 1777 return ABIArgInfo::getIndirect(Align); 1778} 1779 1780/// GetByteVectorType - The ABI specifies that a value should be passed in an 1781/// full vector XMM/YMM register. Pick an LLVM IR type that will be passed as a 1782/// vector register. 1783llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const { 1784 llvm::Type *IRType = CGT.ConvertType(Ty); 1785 1786 // Wrapper structs that just contain vectors are passed just like vectors, 1787 // strip them off if present. 1788 llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1789 while (STy && STy->getNumElements() == 1) { 1790 IRType = STy->getElementType(0); 1791 STy = dyn_cast<llvm::StructType>(IRType); 1792 } 1793 1794 // If the preferred type is a 16-byte vector, prefer to pass it. 1795 if (llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1796 llvm::Type *EltTy = VT->getElementType(); 1797 unsigned BitWidth = VT->getBitWidth(); 1798 if ((BitWidth >= 128 && BitWidth <= 256) && 1799 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1800 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1801 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1802 EltTy->isIntegerTy(128))) 1803 return VT; 1804 } 1805 1806 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1807} 1808 1809/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1810/// is known to either be off the end of the specified type or being in 1811/// alignment padding. The user type specified is known to be at most 128 bits 1812/// in size, and have passed through X86_64ABIInfo::classify with a successful 1813/// classification that put one of the two halves in the INTEGER class. 1814/// 1815/// It is conservatively correct to return false. 1816static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1817 unsigned EndBit, ASTContext &Context) { 1818 // If the bytes being queried are off the end of the type, there is no user 1819 // data hiding here. This handles analysis of builtins, vectors and other 1820 // types that don't contain interesting padding. 1821 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1822 if (TySize <= StartBit) 1823 return true; 1824 1825 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1826 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1827 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1828 1829 // Check each element to see if the element overlaps with the queried range. 1830 for (unsigned i = 0; i != NumElts; ++i) { 1831 // If the element is after the span we care about, then we're done.. 1832 unsigned EltOffset = i*EltSize; 1833 if (EltOffset >= EndBit) break; 1834 1835 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1836 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1837 EndBit-EltOffset, Context)) 1838 return false; 1839 } 1840 // If it overlaps no elements, then it is safe to process as padding. 1841 return true; 1842 } 1843 1844 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1845 const RecordDecl *RD = RT->getDecl(); 1846 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1847 1848 // If this is a C++ record, check the bases first. 1849 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1850 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1851 e = CXXRD->bases_end(); i != e; ++i) { 1852 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1853 "Unexpected base class!"); 1854 const CXXRecordDecl *Base = 1855 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1856 1857 // If the base is after the span we care about, ignore it. 1858 unsigned BaseOffset = Context.toBits(Layout.getBaseClassOffset(Base)); 1859 if (BaseOffset >= EndBit) continue; 1860 1861 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1862 if (!BitsContainNoUserData(i->getType(), BaseStart, 1863 EndBit-BaseOffset, Context)) 1864 return false; 1865 } 1866 } 1867 1868 // Verify that no field has data that overlaps the region of interest. Yes 1869 // this could be sped up a lot by being smarter about queried fields, 1870 // however we're only looking at structs up to 16 bytes, so we don't care 1871 // much. 1872 unsigned idx = 0; 1873 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1874 i != e; ++i, ++idx) { 1875 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1876 1877 // If we found a field after the region we care about, then we're done. 1878 if (FieldOffset >= EndBit) break; 1879 1880 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1881 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1882 Context)) 1883 return false; 1884 } 1885 1886 // If nothing in this record overlapped the area of interest, then we're 1887 // clean. 1888 return true; 1889 } 1890 1891 return false; 1892} 1893 1894/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1895/// float member at the specified offset. For example, {int,{float}} has a 1896/// float at offset 4. It is conservatively correct for this routine to return 1897/// false. 1898static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset, 1899 const llvm::DataLayout &TD) { 1900 // Base case if we find a float. 1901 if (IROffset == 0 && IRType->isFloatTy()) 1902 return true; 1903 1904 // If this is a struct, recurse into the field at the specified offset. 1905 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1906 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1907 unsigned Elt = SL->getElementContainingOffset(IROffset); 1908 IROffset -= SL->getElementOffset(Elt); 1909 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1910 } 1911 1912 // If this is an array, recurse into the field at the specified offset. 1913 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1914 llvm::Type *EltTy = ATy->getElementType(); 1915 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1916 IROffset -= IROffset/EltSize*EltSize; 1917 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1918 } 1919 1920 return false; 1921} 1922 1923 1924/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1925/// low 8 bytes of an XMM register, corresponding to the SSE class. 1926llvm::Type *X86_64ABIInfo:: 1927GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1928 QualType SourceTy, unsigned SourceOffset) const { 1929 // The only three choices we have are either double, <2 x float>, or float. We 1930 // pass as float if the last 4 bytes is just padding. This happens for 1931 // structs that contain 3 floats. 1932 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1933 SourceOffset*8+64, getContext())) 1934 return llvm::Type::getFloatTy(getVMContext()); 1935 1936 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1937 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1938 // case. 1939 if (ContainsFloatAtOffset(IRType, IROffset, getDataLayout()) && 1940 ContainsFloatAtOffset(IRType, IROffset+4, getDataLayout())) 1941 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1942 1943 return llvm::Type::getDoubleTy(getVMContext()); 1944} 1945 1946 1947/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1948/// an 8-byte GPR. This means that we either have a scalar or we are talking 1949/// about the high or low part of an up-to-16-byte struct. This routine picks 1950/// the best LLVM IR type to represent this, which may be i64 or may be anything 1951/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1952/// etc). 1953/// 1954/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1955/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1956/// the 8-byte value references. PrefType may be null. 1957/// 1958/// SourceTy is the source level type for the entire argument. SourceOffset is 1959/// an offset into this that we're processing (which is always either 0 or 8). 1960/// 1961llvm::Type *X86_64ABIInfo:: 1962GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1963 QualType SourceTy, unsigned SourceOffset) const { 1964 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1965 // returning an 8-byte unit starting with it. See if we can safely use it. 1966 if (IROffset == 0) { 1967 // Pointers and int64's always fill the 8-byte unit. 1968 if ((isa<llvm::PointerType>(IRType) && Has64BitPointers) || 1969 IRType->isIntegerTy(64)) 1970 return IRType; 1971 1972 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1973 // goodness in the source type is just tail padding. This is allowed to 1974 // kick in for struct {double,int} on the int, but not on 1975 // struct{double,int,int} because we wouldn't return the second int. We 1976 // have to do this analysis on the source type because we can't depend on 1977 // unions being lowered a specific way etc. 1978 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1979 IRType->isIntegerTy(32) || 1980 (isa<llvm::PointerType>(IRType) && !Has64BitPointers)) { 1981 unsigned BitWidth = isa<llvm::PointerType>(IRType) ? 32 : 1982 cast<llvm::IntegerType>(IRType)->getBitWidth(); 1983 1984 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1985 SourceOffset*8+64, getContext())) 1986 return IRType; 1987 } 1988 } 1989 1990 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1991 // If this is a struct, recurse into the field at the specified offset. 1992 const llvm::StructLayout *SL = getDataLayout().getStructLayout(STy); 1993 if (IROffset < SL->getSizeInBytes()) { 1994 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1995 IROffset -= SL->getElementOffset(FieldIdx); 1996 1997 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1998 SourceTy, SourceOffset); 1999 } 2000 } 2001 2002 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 2003 llvm::Type *EltTy = ATy->getElementType(); 2004 unsigned EltSize = getDataLayout().getTypeAllocSize(EltTy); 2005 unsigned EltOffset = IROffset/EltSize*EltSize; 2006 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 2007 SourceOffset); 2008 } 2009 2010 // Okay, we don't have any better idea of what to pass, so we pass this in an 2011 // integer register that isn't too big to fit the rest of the struct. 2012 unsigned TySizeInBytes = 2013 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 2014 2015 assert(TySizeInBytes != SourceOffset && "Empty field?"); 2016 2017 // It is always safe to classify this as an integer type up to i64 that 2018 // isn't larger than the structure. 2019 return llvm::IntegerType::get(getVMContext(), 2020 std::min(TySizeInBytes-SourceOffset, 8U)*8); 2021} 2022 2023 2024/// GetX86_64ByValArgumentPair - Given a high and low type that can ideally 2025/// be used as elements of a two register pair to pass or return, return a 2026/// first class aggregate to represent them. For example, if the low part of 2027/// a by-value argument should be passed as i32* and the high part as float, 2028/// return {i32*, float}. 2029static llvm::Type * 2030GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi, 2031 const llvm::DataLayout &TD) { 2032 // In order to correctly satisfy the ABI, we need to the high part to start 2033 // at offset 8. If the high and low parts we inferred are both 4-byte types 2034 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have 2035 // the second element at offset 8. Check for this: 2036 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo); 2037 unsigned HiAlign = TD.getABITypeAlignment(Hi); 2038 unsigned HiStart = llvm::DataLayout::RoundUpAlignment(LoSize, HiAlign); 2039 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!"); 2040 2041 // To handle this, we have to increase the size of the low part so that the 2042 // second element will start at an 8 byte offset. We can't increase the size 2043 // of the second element because it might make us access off the end of the 2044 // struct. 2045 if (HiStart != 8) { 2046 // There are only two sorts of types the ABI generation code can produce for 2047 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32. 2048 // Promote these to a larger type. 2049 if (Lo->isFloatTy()) 2050 Lo = llvm::Type::getDoubleTy(Lo->getContext()); 2051 else { 2052 assert(Lo->isIntegerTy() && "Invalid/unknown lo type"); 2053 Lo = llvm::Type::getInt64Ty(Lo->getContext()); 2054 } 2055 } 2056 2057 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, NULL); 2058 2059 2060 // Verify that the second element is at an 8-byte offset. 2061 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 && 2062 "Invalid x86-64 argument pair!"); 2063 return Result; 2064} 2065 2066ABIArgInfo X86_64ABIInfo:: 2067classifyReturnType(QualType RetTy) const { 2068 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 2069 // classification algorithm. 2070 X86_64ABIInfo::Class Lo, Hi; 2071 classify(RetTy, 0, Lo, Hi); 2072 2073 // Check some invariants. 2074 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 2075 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 2076 2077 llvm::Type *ResType = 0; 2078 switch (Lo) { 2079 case NoClass: 2080 if (Hi == NoClass) 2081 return ABIArgInfo::getIgnore(); 2082 // If the low part is just padding, it takes no register, leave ResType 2083 // null. 2084 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 2085 "Unknown missing lo part"); 2086 break; 2087 2088 case SSEUp: 2089 case X87Up: 2090 llvm_unreachable("Invalid classification for lo word."); 2091 2092 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 2093 // hidden argument. 2094 case Memory: 2095 return getIndirectReturnResult(RetTy); 2096 2097 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 2098 // available register of the sequence %rax, %rdx is used. 2099 case Integer: 2100 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 2101 2102 // If we have a sign or zero extended integer, make sure to return Extend 2103 // so that the parameter gets the right LLVM IR attributes. 2104 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 2105 // Treat an enum type as its underlying type. 2106 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2107 RetTy = EnumTy->getDecl()->getIntegerType(); 2108 2109 if (RetTy->isIntegralOrEnumerationType() && 2110 RetTy->isPromotableIntegerType()) 2111 return ABIArgInfo::getExtend(); 2112 } 2113 break; 2114 2115 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 2116 // available SSE register of the sequence %xmm0, %xmm1 is used. 2117 case SSE: 2118 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 2119 break; 2120 2121 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 2122 // returned on the X87 stack in %st0 as 80-bit x87 number. 2123 case X87: 2124 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 2125 break; 2126 2127 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 2128 // part of the value is returned in %st0 and the imaginary part in 2129 // %st1. 2130 case ComplexX87: 2131 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 2132 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()), 2133 llvm::Type::getX86_FP80Ty(getVMContext()), 2134 NULL); 2135 break; 2136 } 2137 2138 llvm::Type *HighPart = 0; 2139 switch (Hi) { 2140 // Memory was handled previously and X87 should 2141 // never occur as a hi class. 2142 case Memory: 2143 case X87: 2144 llvm_unreachable("Invalid classification for hi word."); 2145 2146 case ComplexX87: // Previously handled. 2147 case NoClass: 2148 break; 2149 2150 case Integer: 2151 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2152 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2153 return ABIArgInfo::getDirect(HighPart, 8); 2154 break; 2155 case SSE: 2156 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2157 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2158 return ABIArgInfo::getDirect(HighPart, 8); 2159 break; 2160 2161 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 2162 // is passed in the next available eightbyte chunk if the last used 2163 // vector register. 2164 // 2165 // SSEUP should always be preceded by SSE, just widen. 2166 case SSEUp: 2167 assert(Lo == SSE && "Unexpected SSEUp classification."); 2168 ResType = GetByteVectorType(RetTy); 2169 break; 2170 2171 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 2172 // returned together with the previous X87 value in %st0. 2173 case X87Up: 2174 // If X87Up is preceded by X87, we don't need to do 2175 // anything. However, in some cases with unions it may not be 2176 // preceded by X87. In such situations we follow gcc and pass the 2177 // extra bits in an SSE reg. 2178 if (Lo != X87) { 2179 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2180 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2181 return ABIArgInfo::getDirect(HighPart, 8); 2182 } 2183 break; 2184 } 2185 2186 // If a high part was specified, merge it together with the low part. It is 2187 // known to pass in the high eightbyte of the result. We do this by forming a 2188 // first class struct aggregate with the high and low part: {low, high} 2189 if (HighPart) 2190 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout()); 2191 2192 return ABIArgInfo::getDirect(ResType); 2193} 2194 2195ABIArgInfo X86_64ABIInfo::classifyArgumentType( 2196 QualType Ty, unsigned freeIntRegs, unsigned &neededInt, unsigned &neededSSE) 2197 const 2198{ 2199 X86_64ABIInfo::Class Lo, Hi; 2200 classify(Ty, 0, Lo, Hi); 2201 2202 // Check some invariants. 2203 // FIXME: Enforce these by construction. 2204 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 2205 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 2206 2207 neededInt = 0; 2208 neededSSE = 0; 2209 llvm::Type *ResType = 0; 2210 switch (Lo) { 2211 case NoClass: 2212 if (Hi == NoClass) 2213 return ABIArgInfo::getIgnore(); 2214 // If the low part is just padding, it takes no register, leave ResType 2215 // null. 2216 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 2217 "Unknown missing lo part"); 2218 break; 2219 2220 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 2221 // on the stack. 2222 case Memory: 2223 2224 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 2225 // COMPLEX_X87, it is passed in memory. 2226 case X87: 2227 case ComplexX87: 2228 if (getRecordArgABI(Ty, CGT) == CGCXXABI::RAA_Indirect) 2229 ++neededInt; 2230 return getIndirectResult(Ty, freeIntRegs); 2231 2232 case SSEUp: 2233 case X87Up: 2234 llvm_unreachable("Invalid classification for lo word."); 2235 2236 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 2237 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 2238 // and %r9 is used. 2239 case Integer: 2240 ++neededInt; 2241 2242 // Pick an 8-byte type based on the preferred type. 2243 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0); 2244 2245 // If we have a sign or zero extended integer, make sure to return Extend 2246 // so that the parameter gets the right LLVM IR attributes. 2247 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 2248 // Treat an enum type as its underlying type. 2249 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2250 Ty = EnumTy->getDecl()->getIntegerType(); 2251 2252 if (Ty->isIntegralOrEnumerationType() && 2253 Ty->isPromotableIntegerType()) 2254 return ABIArgInfo::getExtend(); 2255 } 2256 2257 break; 2258 2259 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 2260 // available SSE register is used, the registers are taken in the 2261 // order from %xmm0 to %xmm7. 2262 case SSE: { 2263 llvm::Type *IRType = CGT.ConvertType(Ty); 2264 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0); 2265 ++neededSSE; 2266 break; 2267 } 2268 } 2269 2270 llvm::Type *HighPart = 0; 2271 switch (Hi) { 2272 // Memory was handled previously, ComplexX87 and X87 should 2273 // never occur as hi classes, and X87Up must be preceded by X87, 2274 // which is passed in memory. 2275 case Memory: 2276 case X87: 2277 case ComplexX87: 2278 llvm_unreachable("Invalid classification for hi word."); 2279 2280 case NoClass: break; 2281 2282 case Integer: 2283 ++neededInt; 2284 // Pick an 8-byte type based on the preferred type. 2285 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 2286 2287 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 2288 return ABIArgInfo::getDirect(HighPart, 8); 2289 break; 2290 2291 // X87Up generally doesn't occur here (long double is passed in 2292 // memory), except in situations involving unions. 2293 case X87Up: 2294 case SSE: 2295 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 2296 2297 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 2298 return ABIArgInfo::getDirect(HighPart, 8); 2299 2300 ++neededSSE; 2301 break; 2302 2303 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 2304 // eightbyte is passed in the upper half of the last used SSE 2305 // register. This only happens when 128-bit vectors are passed. 2306 case SSEUp: 2307 assert(Lo == SSE && "Unexpected SSEUp classification"); 2308 ResType = GetByteVectorType(Ty); 2309 break; 2310 } 2311 2312 // If a high part was specified, merge it together with the low part. It is 2313 // known to pass in the high eightbyte of the result. We do this by forming a 2314 // first class struct aggregate with the high and low part: {low, high} 2315 if (HighPart) 2316 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout()); 2317 2318 return ABIArgInfo::getDirect(ResType); 2319} 2320 2321void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2322 2323 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2324 2325 // Keep track of the number of assigned registers. 2326 unsigned freeIntRegs = 6, freeSSERegs = 8; 2327 2328 // If the return value is indirect, then the hidden argument is consuming one 2329 // integer register. 2330 if (FI.getReturnInfo().isIndirect()) 2331 --freeIntRegs; 2332 2333 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 2334 // get assigned (in left-to-right order) for passing as follows... 2335 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2336 it != ie; ++it) { 2337 unsigned neededInt, neededSSE; 2338 it->info = classifyArgumentType(it->type, freeIntRegs, neededInt, 2339 neededSSE); 2340 2341 // AMD64-ABI 3.2.3p3: If there are no registers available for any 2342 // eightbyte of an argument, the whole argument is passed on the 2343 // stack. If registers have already been assigned for some 2344 // eightbytes of such an argument, the assignments get reverted. 2345 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 2346 freeIntRegs -= neededInt; 2347 freeSSERegs -= neededSSE; 2348 } else { 2349 it->info = getIndirectResult(it->type, freeIntRegs); 2350 } 2351 } 2352} 2353 2354static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 2355 QualType Ty, 2356 CodeGenFunction &CGF) { 2357 llvm::Value *overflow_arg_area_p = 2358 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 2359 llvm::Value *overflow_arg_area = 2360 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 2361 2362 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 2363 // byte boundary if alignment needed by type exceeds 8 byte boundary. 2364 // It isn't stated explicitly in the standard, but in practice we use 2365 // alignment greater than 16 where necessary. 2366 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 2367 if (Align > 8) { 2368 // overflow_arg_area = (overflow_arg_area + align - 1) & -align; 2369 llvm::Value *Offset = 2370 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1); 2371 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 2372 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 2373 CGF.Int64Ty); 2374 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, -(uint64_t)Align); 2375 overflow_arg_area = 2376 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 2377 overflow_arg_area->getType(), 2378 "overflow_arg_area.align"); 2379 } 2380 2381 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 2382 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2383 llvm::Value *Res = 2384 CGF.Builder.CreateBitCast(overflow_arg_area, 2385 llvm::PointerType::getUnqual(LTy)); 2386 2387 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 2388 // l->overflow_arg_area + sizeof(type). 2389 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 2390 // an 8 byte boundary. 2391 2392 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 2393 llvm::Value *Offset = 2394 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 2395 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 2396 "overflow_arg_area.next"); 2397 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 2398 2399 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 2400 return Res; 2401} 2402 2403llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2404 CodeGenFunction &CGF) const { 2405 // Assume that va_list type is correct; should be pointer to LLVM type: 2406 // struct { 2407 // i32 gp_offset; 2408 // i32 fp_offset; 2409 // i8* overflow_arg_area; 2410 // i8* reg_save_area; 2411 // }; 2412 unsigned neededInt, neededSSE; 2413 2414 Ty = CGF.getContext().getCanonicalType(Ty); 2415 ABIArgInfo AI = classifyArgumentType(Ty, 0, neededInt, neededSSE); 2416 2417 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 2418 // in the registers. If not go to step 7. 2419 if (!neededInt && !neededSSE) 2420 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2421 2422 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 2423 // general purpose registers needed to pass type and num_fp to hold 2424 // the number of floating point registers needed. 2425 2426 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 2427 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 2428 // l->fp_offset > 304 - num_fp * 16 go to step 7. 2429 // 2430 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 2431 // register save space). 2432 2433 llvm::Value *InRegs = 0; 2434 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 2435 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 2436 if (neededInt) { 2437 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 2438 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 2439 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 2440 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 2441 } 2442 2443 if (neededSSE) { 2444 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 2445 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 2446 llvm::Value *FitsInFP = 2447 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 2448 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 2449 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 2450 } 2451 2452 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 2453 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 2454 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 2455 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 2456 2457 // Emit code to load the value if it was passed in registers. 2458 2459 CGF.EmitBlock(InRegBlock); 2460 2461 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 2462 // an offset of l->gp_offset and/or l->fp_offset. This may require 2463 // copying to a temporary location in case the parameter is passed 2464 // in different register classes or requires an alignment greater 2465 // than 8 for general purpose registers and 16 for XMM registers. 2466 // 2467 // FIXME: This really results in shameful code when we end up needing to 2468 // collect arguments from different places; often what should result in a 2469 // simple assembling of a structure from scattered addresses has many more 2470 // loads than necessary. Can we clean this up? 2471 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2472 llvm::Value *RegAddr = 2473 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 2474 "reg_save_area"); 2475 if (neededInt && neededSSE) { 2476 // FIXME: Cleanup. 2477 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 2478 llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 2479 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 2480 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 2481 llvm::Type *TyLo = ST->getElementType(0); 2482 llvm::Type *TyHi = ST->getElementType(1); 2483 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 2484 "Unexpected ABI info for mixed regs"); 2485 llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 2486 llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 2487 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2488 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2489 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 2490 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 2491 llvm::Value *V = 2492 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 2493 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2494 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 2495 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2496 2497 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2498 llvm::PointerType::getUnqual(LTy)); 2499 } else if (neededInt) { 2500 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2501 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2502 llvm::PointerType::getUnqual(LTy)); 2503 } else if (neededSSE == 1) { 2504 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2505 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2506 llvm::PointerType::getUnqual(LTy)); 2507 } else { 2508 assert(neededSSE == 2 && "Invalid number of needed registers!"); 2509 // SSE registers are spaced 16 bytes apart in the register save 2510 // area, we need to collect the two eightbytes together. 2511 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2512 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 2513 llvm::Type *DoubleTy = CGF.DoubleTy; 2514 llvm::Type *DblPtrTy = 2515 llvm::PointerType::getUnqual(DoubleTy); 2516 llvm::StructType *ST = llvm::StructType::get(DoubleTy, 2517 DoubleTy, NULL); 2518 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 2519 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 2520 DblPtrTy)); 2521 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2522 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 2523 DblPtrTy)); 2524 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2525 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2526 llvm::PointerType::getUnqual(LTy)); 2527 } 2528 2529 // AMD64-ABI 3.5.7p5: Step 5. Set: 2530 // l->gp_offset = l->gp_offset + num_gp * 8 2531 // l->fp_offset = l->fp_offset + num_fp * 16. 2532 if (neededInt) { 2533 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 2534 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 2535 gp_offset_p); 2536 } 2537 if (neededSSE) { 2538 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 2539 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 2540 fp_offset_p); 2541 } 2542 CGF.EmitBranch(ContBlock); 2543 2544 // Emit code to load the value if it was passed in memory. 2545 2546 CGF.EmitBlock(InMemBlock); 2547 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2548 2549 // Return the appropriate result. 2550 2551 CGF.EmitBlock(ContBlock); 2552 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2, 2553 "vaarg.addr"); 2554 ResAddr->addIncoming(RegAddr, InRegBlock); 2555 ResAddr->addIncoming(MemAddr, InMemBlock); 2556 return ResAddr; 2557} 2558 2559ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty, bool IsReturnType) const { 2560 2561 if (Ty->isVoidType()) 2562 return ABIArgInfo::getIgnore(); 2563 2564 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2565 Ty = EnumTy->getDecl()->getIntegerType(); 2566 2567 uint64_t Size = getContext().getTypeSize(Ty); 2568 2569 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2570 if (IsReturnType) { 2571 if (isRecordReturnIndirect(RT, CGT)) 2572 return ABIArgInfo::getIndirect(0, false); 2573 } else { 2574 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, CGT)) 2575 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 2576 } 2577 2578 if (RT->getDecl()->hasFlexibleArrayMember()) 2579 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2580 2581 // FIXME: mingw-w64-gcc emits 128-bit struct as i128 2582 if (Size == 128 && getTarget().getTriple().getOS() == llvm::Triple::MinGW32) 2583 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2584 Size)); 2585 2586 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is 2587 // not 1, 2, 4, or 8 bytes, must be passed by reference." 2588 if (Size <= 64 && 2589 (Size & (Size - 1)) == 0) 2590 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2591 Size)); 2592 2593 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2594 } 2595 2596 if (Ty->isPromotableIntegerType()) 2597 return ABIArgInfo::getExtend(); 2598 2599 return ABIArgInfo::getDirect(); 2600} 2601 2602void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2603 2604 QualType RetTy = FI.getReturnType(); 2605 FI.getReturnInfo() = classify(RetTy, true); 2606 2607 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2608 it != ie; ++it) 2609 it->info = classify(it->type, false); 2610} 2611 2612llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2613 CodeGenFunction &CGF) const { 2614 llvm::Type *BPP = CGF.Int8PtrPtrTy; 2615 2616 CGBuilderTy &Builder = CGF.Builder; 2617 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2618 "ap"); 2619 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2620 llvm::Type *PTy = 2621 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2622 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2623 2624 uint64_t Offset = 2625 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 2626 llvm::Value *NextAddr = 2627 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2628 "ap.next"); 2629 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2630 2631 return AddrTyped; 2632} 2633 2634namespace { 2635 2636class NaClX86_64ABIInfo : public ABIInfo { 2637 public: 2638 NaClX86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 2639 : ABIInfo(CGT), PInfo(CGT), NInfo(CGT, HasAVX) {} 2640 virtual void computeInfo(CGFunctionInfo &FI) const; 2641 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2642 CodeGenFunction &CGF) const; 2643 private: 2644 PNaClABIInfo PInfo; // Used for generating calls with pnaclcall callingconv. 2645 X86_64ABIInfo NInfo; // Used for everything else. 2646}; 2647 2648class NaClX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 2649 public: 2650 NaClX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 2651 : TargetCodeGenInfo(new NaClX86_64ABIInfo(CGT, HasAVX)) {} 2652}; 2653 2654} 2655 2656void NaClX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2657 if (FI.getASTCallingConvention() == CC_PnaclCall) 2658 PInfo.computeInfo(FI); 2659 else 2660 NInfo.computeInfo(FI); 2661} 2662 2663llvm::Value *NaClX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2664 CodeGenFunction &CGF) const { 2665 // Always use the native convention; calling pnacl-style varargs functions 2666 // is unuspported. 2667 return NInfo.EmitVAArg(VAListAddr, Ty, CGF); 2668} 2669 2670 2671// PowerPC-32 2672 2673namespace { 2674class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2675public: 2676 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2677 2678 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2679 // This is recovered from gcc output. 2680 return 1; // r1 is the dedicated stack pointer 2681 } 2682 2683 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2684 llvm::Value *Address) const; 2685}; 2686 2687} 2688 2689bool 2690PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2691 llvm::Value *Address) const { 2692 // This is calculated from the LLVM and GCC tables and verified 2693 // against gcc output. AFAIK all ABIs use the same encoding. 2694 2695 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2696 2697 llvm::IntegerType *i8 = CGF.Int8Ty; 2698 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2699 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2700 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2701 2702 // 0-31: r0-31, the 4-byte general-purpose registers 2703 AssignToArrayRange(Builder, Address, Four8, 0, 31); 2704 2705 // 32-63: fp0-31, the 8-byte floating-point registers 2706 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2707 2708 // 64-76 are various 4-byte special-purpose registers: 2709 // 64: mq 2710 // 65: lr 2711 // 66: ctr 2712 // 67: ap 2713 // 68-75 cr0-7 2714 // 76: xer 2715 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2716 2717 // 77-108: v0-31, the 16-byte vector registers 2718 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2719 2720 // 109: vrsave 2721 // 110: vscr 2722 // 111: spe_acc 2723 // 112: spefscr 2724 // 113: sfp 2725 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2726 2727 return false; 2728} 2729 2730// PowerPC-64 2731 2732namespace { 2733/// PPC64_SVR4_ABIInfo - The 64-bit PowerPC ELF (SVR4) ABI information. 2734class PPC64_SVR4_ABIInfo : public DefaultABIInfo { 2735 2736public: 2737 PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {} 2738 2739 bool isPromotableTypeForABI(QualType Ty) const; 2740 2741 ABIArgInfo classifyReturnType(QualType RetTy) const; 2742 ABIArgInfo classifyArgumentType(QualType Ty) const; 2743 2744 // TODO: We can add more logic to computeInfo to improve performance. 2745 // Example: For aggregate arguments that fit in a register, we could 2746 // use getDirectInReg (as is done below for structs containing a single 2747 // floating-point value) to avoid pushing them to memory on function 2748 // entry. This would require changing the logic in PPCISelLowering 2749 // when lowering the parameters in the caller and args in the callee. 2750 virtual void computeInfo(CGFunctionInfo &FI) const { 2751 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2752 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2753 it != ie; ++it) { 2754 // We rely on the default argument classification for the most part. 2755 // One exception: An aggregate containing a single floating-point 2756 // item must be passed in a register if one is available. 2757 const Type *T = isSingleElementStruct(it->type, getContext()); 2758 if (T) { 2759 const BuiltinType *BT = T->getAs<BuiltinType>(); 2760 if (BT && BT->isFloatingPoint()) { 2761 QualType QT(T, 0); 2762 it->info = ABIArgInfo::getDirectInReg(CGT.ConvertType(QT)); 2763 continue; 2764 } 2765 } 2766 it->info = classifyArgumentType(it->type); 2767 } 2768 } 2769 2770 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, 2771 QualType Ty, 2772 CodeGenFunction &CGF) const; 2773}; 2774 2775class PPC64_SVR4_TargetCodeGenInfo : public TargetCodeGenInfo { 2776public: 2777 PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes &CGT) 2778 : TargetCodeGenInfo(new PPC64_SVR4_ABIInfo(CGT)) {} 2779 2780 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2781 // This is recovered from gcc output. 2782 return 1; // r1 is the dedicated stack pointer 2783 } 2784 2785 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2786 llvm::Value *Address) const; 2787}; 2788 2789class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2790public: 2791 PPC64TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2792 2793 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2794 // This is recovered from gcc output. 2795 return 1; // r1 is the dedicated stack pointer 2796 } 2797 2798 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2799 llvm::Value *Address) const; 2800}; 2801 2802} 2803 2804// Return true if the ABI requires Ty to be passed sign- or zero- 2805// extended to 64 bits. 2806bool 2807PPC64_SVR4_ABIInfo::isPromotableTypeForABI(QualType Ty) const { 2808 // Treat an enum type as its underlying type. 2809 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2810 Ty = EnumTy->getDecl()->getIntegerType(); 2811 2812 // Promotable integer types are required to be promoted by the ABI. 2813 if (Ty->isPromotableIntegerType()) 2814 return true; 2815 2816 // In addition to the usual promotable integer types, we also need to 2817 // extend all 32-bit types, since the ABI requires promotion to 64 bits. 2818 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2819 switch (BT->getKind()) { 2820 case BuiltinType::Int: 2821 case BuiltinType::UInt: 2822 return true; 2823 default: 2824 break; 2825 } 2826 2827 return false; 2828} 2829 2830ABIArgInfo 2831PPC64_SVR4_ABIInfo::classifyArgumentType(QualType Ty) const { 2832 if (Ty->isAnyComplexType()) 2833 return ABIArgInfo::getDirect(); 2834 2835 if (isAggregateTypeForABI(Ty)) { 2836 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) 2837 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 2838 2839 return ABIArgInfo::getIndirect(0); 2840 } 2841 2842 return (isPromotableTypeForABI(Ty) ? 2843 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2844} 2845 2846ABIArgInfo 2847PPC64_SVR4_ABIInfo::classifyReturnType(QualType RetTy) const { 2848 if (RetTy->isVoidType()) 2849 return ABIArgInfo::getIgnore(); 2850 2851 if (RetTy->isAnyComplexType()) 2852 return ABIArgInfo::getDirect(); 2853 2854 if (isAggregateTypeForABI(RetTy)) 2855 return ABIArgInfo::getIndirect(0); 2856 2857 return (isPromotableTypeForABI(RetTy) ? 2858 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2859} 2860 2861// Based on ARMABIInfo::EmitVAArg, adjusted for 64-bit machine. 2862llvm::Value *PPC64_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr, 2863 QualType Ty, 2864 CodeGenFunction &CGF) const { 2865 llvm::Type *BP = CGF.Int8PtrTy; 2866 llvm::Type *BPP = CGF.Int8PtrPtrTy; 2867 2868 CGBuilderTy &Builder = CGF.Builder; 2869 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 2870 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2871 2872 // Update the va_list pointer. The pointer should be bumped by the 2873 // size of the object. We can trust getTypeSize() except for a complex 2874 // type whose base type is smaller than a doubleword. For these, the 2875 // size of the object is 16 bytes; see below for further explanation. 2876 unsigned SizeInBytes = CGF.getContext().getTypeSize(Ty) / 8; 2877 QualType BaseTy; 2878 unsigned CplxBaseSize = 0; 2879 2880 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) { 2881 BaseTy = CTy->getElementType(); 2882 CplxBaseSize = CGF.getContext().getTypeSize(BaseTy) / 8; 2883 if (CplxBaseSize < 8) 2884 SizeInBytes = 16; 2885 } 2886 2887 unsigned Offset = llvm::RoundUpToAlignment(SizeInBytes, 8); 2888 llvm::Value *NextAddr = 2889 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int64Ty, Offset), 2890 "ap.next"); 2891 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2892 2893 // If we have a complex type and the base type is smaller than 8 bytes, 2894 // the ABI calls for the real and imaginary parts to be right-adjusted 2895 // in separate doublewords. However, Clang expects us to produce a 2896 // pointer to a structure with the two parts packed tightly. So generate 2897 // loads of the real and imaginary parts relative to the va_list pointer, 2898 // and store them to a temporary structure. 2899 if (CplxBaseSize && CplxBaseSize < 8) { 2900 llvm::Value *RealAddr = Builder.CreatePtrToInt(Addr, CGF.Int64Ty); 2901 llvm::Value *ImagAddr = RealAddr; 2902 RealAddr = Builder.CreateAdd(RealAddr, Builder.getInt64(8 - CplxBaseSize)); 2903 ImagAddr = Builder.CreateAdd(ImagAddr, Builder.getInt64(16 - CplxBaseSize)); 2904 llvm::Type *PBaseTy = llvm::PointerType::getUnqual(CGF.ConvertType(BaseTy)); 2905 RealAddr = Builder.CreateIntToPtr(RealAddr, PBaseTy); 2906 ImagAddr = Builder.CreateIntToPtr(ImagAddr, PBaseTy); 2907 llvm::Value *Real = Builder.CreateLoad(RealAddr, false, ".vareal"); 2908 llvm::Value *Imag = Builder.CreateLoad(ImagAddr, false, ".vaimag"); 2909 llvm::Value *Ptr = CGF.CreateTempAlloca(CGT.ConvertTypeForMem(Ty), 2910 "vacplx"); 2911 llvm::Value *RealPtr = Builder.CreateStructGEP(Ptr, 0, ".real"); 2912 llvm::Value *ImagPtr = Builder.CreateStructGEP(Ptr, 1, ".imag"); 2913 Builder.CreateStore(Real, RealPtr, false); 2914 Builder.CreateStore(Imag, ImagPtr, false); 2915 return Ptr; 2916 } 2917 2918 // If the argument is smaller than 8 bytes, it is right-adjusted in 2919 // its doubleword slot. Adjust the pointer to pick it up from the 2920 // correct offset. 2921 if (SizeInBytes < 8) { 2922 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int64Ty); 2923 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt64(8 - SizeInBytes)); 2924 Addr = Builder.CreateIntToPtr(AddrAsInt, BP); 2925 } 2926 2927 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2928 return Builder.CreateBitCast(Addr, PTy); 2929} 2930 2931static bool 2932PPC64_initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2933 llvm::Value *Address) { 2934 // This is calculated from the LLVM and GCC tables and verified 2935 // against gcc output. AFAIK all ABIs use the same encoding. 2936 2937 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2938 2939 llvm::IntegerType *i8 = CGF.Int8Ty; 2940 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2941 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2942 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2943 2944 // 0-31: r0-31, the 8-byte general-purpose registers 2945 AssignToArrayRange(Builder, Address, Eight8, 0, 31); 2946 2947 // 32-63: fp0-31, the 8-byte floating-point registers 2948 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2949 2950 // 64-76 are various 4-byte special-purpose registers: 2951 // 64: mq 2952 // 65: lr 2953 // 66: ctr 2954 // 67: ap 2955 // 68-75 cr0-7 2956 // 76: xer 2957 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2958 2959 // 77-108: v0-31, the 16-byte vector registers 2960 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2961 2962 // 109: vrsave 2963 // 110: vscr 2964 // 111: spe_acc 2965 // 112: spefscr 2966 // 113: sfp 2967 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2968 2969 return false; 2970} 2971 2972bool 2973PPC64_SVR4_TargetCodeGenInfo::initDwarfEHRegSizeTable( 2974 CodeGen::CodeGenFunction &CGF, 2975 llvm::Value *Address) const { 2976 2977 return PPC64_initDwarfEHRegSizeTable(CGF, Address); 2978} 2979 2980bool 2981PPC64TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2982 llvm::Value *Address) const { 2983 2984 return PPC64_initDwarfEHRegSizeTable(CGF, Address); 2985} 2986 2987//===----------------------------------------------------------------------===// 2988// ARM ABI Implementation 2989//===----------------------------------------------------------------------===// 2990 2991namespace { 2992 2993class ARMABIInfo : public ABIInfo { 2994public: 2995 enum ABIKind { 2996 APCS = 0, 2997 AAPCS = 1, 2998 AAPCS_VFP 2999 }; 3000 3001private: 3002 ABIKind Kind; 3003 3004public: 3005 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) { 3006 setRuntimeCC(); 3007 } 3008 3009 bool isEABI() const { 3010 StringRef Env = getTarget().getTriple().getEnvironmentName(); 3011 return (Env == "gnueabi" || Env == "eabi" || 3012 Env == "android" || Env == "androideabi"); 3013 } 3014 3015private: 3016 ABIKind getABIKind() const { return Kind; } 3017 3018 ABIArgInfo classifyReturnType(QualType RetTy) const; 3019 ABIArgInfo classifyArgumentType(QualType RetTy, int *VFPRegs, 3020 unsigned &AllocatedVFP, 3021 bool &IsHA) const; 3022 bool isIllegalVectorType(QualType Ty) const; 3023 3024 virtual void computeInfo(CGFunctionInfo &FI) const; 3025 3026 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3027 CodeGenFunction &CGF) const; 3028 3029 llvm::CallingConv::ID getLLVMDefaultCC() const; 3030 llvm::CallingConv::ID getABIDefaultCC() const; 3031 void setRuntimeCC(); 3032}; 3033 3034class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 3035public: 3036 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 3037 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 3038 3039 const ARMABIInfo &getABIInfo() const { 3040 return static_cast<const ARMABIInfo&>(TargetCodeGenInfo::getABIInfo()); 3041 } 3042 3043 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 3044 return 13; 3045 } 3046 3047 StringRef getARCRetainAutoreleasedReturnValueMarker() const { 3048 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue"; 3049 } 3050 3051 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3052 llvm::Value *Address) const { 3053 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 3054 3055 // 0-15 are the 16 integer registers. 3056 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 15); 3057 return false; 3058 } 3059 3060 unsigned getSizeOfUnwindException() const { 3061 if (getABIInfo().isEABI()) return 88; 3062 return TargetCodeGenInfo::getSizeOfUnwindException(); 3063 } 3064}; 3065 3066} 3067 3068void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 3069 // To correctly handle Homogeneous Aggregate, we need to keep track of the 3070 // VFP registers allocated so far. 3071 // C.1.vfp If the argument is a VFP CPRC and there are sufficient consecutive 3072 // VFP registers of the appropriate type unallocated then the argument is 3073 // allocated to the lowest-numbered sequence of such registers. 3074 // C.2.vfp If the argument is a VFP CPRC then any VFP registers that are 3075 // unallocated are marked as unavailable. 3076 unsigned AllocatedVFP = 0; 3077 int VFPRegs[16] = { 0 }; 3078 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3079 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3080 it != ie; ++it) { 3081 unsigned PreAllocation = AllocatedVFP; 3082 bool IsHA = false; 3083 // 6.1.2.3 There is one VFP co-processor register class using registers 3084 // s0-s15 (d0-d7) for passing arguments. 3085 const unsigned NumVFPs = 16; 3086 it->info = classifyArgumentType(it->type, VFPRegs, AllocatedVFP, IsHA); 3087 // If we do not have enough VFP registers for the HA, any VFP registers 3088 // that are unallocated are marked as unavailable. To achieve this, we add 3089 // padding of (NumVFPs - PreAllocation) floats. 3090 if (IsHA && AllocatedVFP > NumVFPs && PreAllocation < NumVFPs) { 3091 llvm::Type *PaddingTy = llvm::ArrayType::get( 3092 llvm::Type::getFloatTy(getVMContext()), NumVFPs - PreAllocation); 3093 it->info = ABIArgInfo::getExpandWithPadding(false, PaddingTy); 3094 } 3095 } 3096 3097 // Always honor user-specified calling convention. 3098 if (FI.getCallingConvention() != llvm::CallingConv::C) 3099 return; 3100 3101 llvm::CallingConv::ID cc = getRuntimeCC(); 3102 if (cc != llvm::CallingConv::C) 3103 FI.setEffectiveCallingConvention(cc); 3104} 3105 3106/// Return the default calling convention that LLVM will use. 3107llvm::CallingConv::ID ARMABIInfo::getLLVMDefaultCC() const { 3108 // The default calling convention that LLVM will infer. 3109 if (getTarget().getTriple().getEnvironmentName()=="gnueabihf") 3110 return llvm::CallingConv::ARM_AAPCS_VFP; 3111 else if (isEABI()) 3112 return llvm::CallingConv::ARM_AAPCS; 3113 else 3114 return llvm::CallingConv::ARM_APCS; 3115} 3116 3117/// Return the calling convention that our ABI would like us to use 3118/// as the C calling convention. 3119llvm::CallingConv::ID ARMABIInfo::getABIDefaultCC() const { 3120 switch (getABIKind()) { 3121 case APCS: return llvm::CallingConv::ARM_APCS; 3122 case AAPCS: return llvm::CallingConv::ARM_AAPCS; 3123 case AAPCS_VFP: return llvm::CallingConv::ARM_AAPCS_VFP; 3124 } 3125 llvm_unreachable("bad ABI kind"); 3126} 3127 3128void ARMABIInfo::setRuntimeCC() { 3129 assert(getRuntimeCC() == llvm::CallingConv::C); 3130 3131 // Don't muddy up the IR with a ton of explicit annotations if 3132 // they'd just match what LLVM will infer from the triple. 3133 llvm::CallingConv::ID abiCC = getABIDefaultCC(); 3134 if (abiCC != getLLVMDefaultCC()) 3135 RuntimeCC = abiCC; 3136} 3137 3138/// isHomogeneousAggregate - Return true if a type is an AAPCS-VFP homogeneous 3139/// aggregate. If HAMembers is non-null, the number of base elements 3140/// contained in the type is returned through it; this is used for the 3141/// recursive calls that check aggregate component types. 3142static bool isHomogeneousAggregate(QualType Ty, const Type *&Base, 3143 ASTContext &Context, 3144 uint64_t *HAMembers = 0) { 3145 uint64_t Members = 0; 3146 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 3147 if (!isHomogeneousAggregate(AT->getElementType(), Base, Context, &Members)) 3148 return false; 3149 Members *= AT->getSize().getZExtValue(); 3150 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 3151 const RecordDecl *RD = RT->getDecl(); 3152 if (RD->hasFlexibleArrayMember()) 3153 return false; 3154 3155 Members = 0; 3156 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 3157 i != e; ++i) { 3158 const FieldDecl *FD = *i; 3159 uint64_t FldMembers; 3160 if (!isHomogeneousAggregate(FD->getType(), Base, Context, &FldMembers)) 3161 return false; 3162 3163 Members = (RD->isUnion() ? 3164 std::max(Members, FldMembers) : Members + FldMembers); 3165 } 3166 } else { 3167 Members = 1; 3168 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 3169 Members = 2; 3170 Ty = CT->getElementType(); 3171 } 3172 3173 // Homogeneous aggregates for AAPCS-VFP must have base types of float, 3174 // double, or 64-bit or 128-bit vectors. 3175 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 3176 if (BT->getKind() != BuiltinType::Float && 3177 BT->getKind() != BuiltinType::Double && 3178 BT->getKind() != BuiltinType::LongDouble) 3179 return false; 3180 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 3181 unsigned VecSize = Context.getTypeSize(VT); 3182 if (VecSize != 64 && VecSize != 128) 3183 return false; 3184 } else { 3185 return false; 3186 } 3187 3188 // The base type must be the same for all members. Vector types of the 3189 // same total size are treated as being equivalent here. 3190 const Type *TyPtr = Ty.getTypePtr(); 3191 if (!Base) 3192 Base = TyPtr; 3193 if (Base != TyPtr && 3194 (!Base->isVectorType() || !TyPtr->isVectorType() || 3195 Context.getTypeSize(Base) != Context.getTypeSize(TyPtr))) 3196 return false; 3197 } 3198 3199 // Homogeneous Aggregates can have at most 4 members of the base type. 3200 if (HAMembers) 3201 *HAMembers = Members; 3202 3203 return (Members > 0 && Members <= 4); 3204} 3205 3206/// markAllocatedVFPs - update VFPRegs according to the alignment and 3207/// number of VFP registers (unit is S register) requested. 3208static void markAllocatedVFPs(int *VFPRegs, unsigned &AllocatedVFP, 3209 unsigned Alignment, 3210 unsigned NumRequired) { 3211 // Early Exit. 3212 if (AllocatedVFP >= 16) 3213 return; 3214 // C.1.vfp If the argument is a VFP CPRC and there are sufficient consecutive 3215 // VFP registers of the appropriate type unallocated then the argument is 3216 // allocated to the lowest-numbered sequence of such registers. 3217 for (unsigned I = 0; I < 16; I += Alignment) { 3218 bool FoundSlot = true; 3219 for (unsigned J = I, JEnd = I + NumRequired; J < JEnd; J++) 3220 if (J >= 16 || VFPRegs[J]) { 3221 FoundSlot = false; 3222 break; 3223 } 3224 if (FoundSlot) { 3225 for (unsigned J = I, JEnd = I + NumRequired; J < JEnd; J++) 3226 VFPRegs[J] = 1; 3227 AllocatedVFP += NumRequired; 3228 return; 3229 } 3230 } 3231 // C.2.vfp If the argument is a VFP CPRC then any VFP registers that are 3232 // unallocated are marked as unavailable. 3233 for (unsigned I = 0; I < 16; I++) 3234 VFPRegs[I] = 1; 3235 AllocatedVFP = 17; // We do not have enough VFP registers. 3236} 3237 3238ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, int *VFPRegs, 3239 unsigned &AllocatedVFP, 3240 bool &IsHA) const { 3241 // We update number of allocated VFPs according to 3242 // 6.1.2.1 The following argument types are VFP CPRCs: 3243 // A single-precision floating-point type (including promoted 3244 // half-precision types); A double-precision floating-point type; 3245 // A 64-bit or 128-bit containerized vector type; Homogeneous Aggregate 3246 // with a Base Type of a single- or double-precision floating-point type, 3247 // 64-bit containerized vectors or 128-bit containerized vectors with one 3248 // to four Elements. 3249 3250 // Handle illegal vector types here. 3251 if (isIllegalVectorType(Ty)) { 3252 uint64_t Size = getContext().getTypeSize(Ty); 3253 if (Size <= 32) { 3254 llvm::Type *ResType = 3255 llvm::Type::getInt32Ty(getVMContext()); 3256 return ABIArgInfo::getDirect(ResType); 3257 } 3258 if (Size == 64) { 3259 llvm::Type *ResType = llvm::VectorType::get( 3260 llvm::Type::getInt32Ty(getVMContext()), 2); 3261 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, 2); 3262 return ABIArgInfo::getDirect(ResType); 3263 } 3264 if (Size == 128) { 3265 llvm::Type *ResType = llvm::VectorType::get( 3266 llvm::Type::getInt32Ty(getVMContext()), 4); 3267 markAllocatedVFPs(VFPRegs, AllocatedVFP, 4, 4); 3268 return ABIArgInfo::getDirect(ResType); 3269 } 3270 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3271 } 3272 // Update VFPRegs for legal vector types. 3273 if (const VectorType *VT = Ty->getAs<VectorType>()) { 3274 uint64_t Size = getContext().getTypeSize(VT); 3275 // Size of a legal vector should be power of 2 and above 64. 3276 markAllocatedVFPs(VFPRegs, AllocatedVFP, Size >= 128 ? 4 : 2, Size / 32); 3277 } 3278 // Update VFPRegs for floating point types. 3279 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 3280 if (BT->getKind() == BuiltinType::Half || 3281 BT->getKind() == BuiltinType::Float) 3282 markAllocatedVFPs(VFPRegs, AllocatedVFP, 1, 1); 3283 if (BT->getKind() == BuiltinType::Double || 3284 BT->getKind() == BuiltinType::LongDouble) 3285 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, 2); 3286 } 3287 3288 if (!isAggregateTypeForABI(Ty)) { 3289 // Treat an enum type as its underlying type. 3290 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3291 Ty = EnumTy->getDecl()->getIntegerType(); 3292 3293 return (Ty->isPromotableIntegerType() ? 3294 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3295 } 3296 3297 // Ignore empty records. 3298 if (isEmptyRecord(getContext(), Ty, true)) 3299 return ABIArgInfo::getIgnore(); 3300 3301 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) 3302 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 3303 3304 if (getABIKind() == ARMABIInfo::AAPCS_VFP) { 3305 // Homogeneous Aggregates need to be expanded when we can fit the aggregate 3306 // into VFP registers. 3307 const Type *Base = 0; 3308 uint64_t Members = 0; 3309 if (isHomogeneousAggregate(Ty, Base, getContext(), &Members)) { 3310 assert(Base && "Base class should be set for homogeneous aggregate"); 3311 // Base can be a floating-point or a vector. 3312 if (Base->isVectorType()) { 3313 // ElementSize is in number of floats. 3314 unsigned ElementSize = getContext().getTypeSize(Base) == 64 ? 2 : 4; 3315 markAllocatedVFPs(VFPRegs, AllocatedVFP, ElementSize, 3316 Members * ElementSize); 3317 } else if (Base->isSpecificBuiltinType(BuiltinType::Float)) 3318 markAllocatedVFPs(VFPRegs, AllocatedVFP, 1, Members); 3319 else { 3320 assert(Base->isSpecificBuiltinType(BuiltinType::Double) || 3321 Base->isSpecificBuiltinType(BuiltinType::LongDouble)); 3322 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, Members * 2); 3323 } 3324 IsHA = true; 3325 return ABIArgInfo::getExpand(); 3326 } 3327 } 3328 3329 // Support byval for ARM. 3330 // The ABI alignment for APCS is 4-byte and for AAPCS at least 4-byte and at 3331 // most 8-byte. We realign the indirect argument if type alignment is bigger 3332 // than ABI alignment. 3333 uint64_t ABIAlign = 4; 3334 uint64_t TyAlign = getContext().getTypeAlign(Ty) / 8; 3335 if (getABIKind() == ARMABIInfo::AAPCS_VFP || 3336 getABIKind() == ARMABIInfo::AAPCS) 3337 ABIAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8); 3338 if (getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(64)) { 3339 return ABIArgInfo::getIndirect(0, /*ByVal=*/true, 3340 /*Realign=*/TyAlign > ABIAlign); 3341 } 3342 3343 // Otherwise, pass by coercing to a structure of the appropriate size. 3344 llvm::Type* ElemTy; 3345 unsigned SizeRegs; 3346 // FIXME: Try to match the types of the arguments more accurately where 3347 // we can. 3348 if (getContext().getTypeAlign(Ty) <= 32) { 3349 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 3350 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 3351 } else { 3352 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 3353 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 3354 } 3355 3356 llvm::Type *STy = 3357 llvm::StructType::get(llvm::ArrayType::get(ElemTy, SizeRegs), NULL); 3358 return ABIArgInfo::getDirect(STy); 3359} 3360 3361static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 3362 llvm::LLVMContext &VMContext) { 3363 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 3364 // is called integer-like if its size is less than or equal to one word, and 3365 // the offset of each of its addressable sub-fields is zero. 3366 3367 uint64_t Size = Context.getTypeSize(Ty); 3368 3369 // Check that the type fits in a word. 3370 if (Size > 32) 3371 return false; 3372 3373 // FIXME: Handle vector types! 3374 if (Ty->isVectorType()) 3375 return false; 3376 3377 // Float types are never treated as "integer like". 3378 if (Ty->isRealFloatingType()) 3379 return false; 3380 3381 // If this is a builtin or pointer type then it is ok. 3382 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 3383 return true; 3384 3385 // Small complex integer types are "integer like". 3386 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 3387 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 3388 3389 // Single element and zero sized arrays should be allowed, by the definition 3390 // above, but they are not. 3391 3392 // Otherwise, it must be a record type. 3393 const RecordType *RT = Ty->getAs<RecordType>(); 3394 if (!RT) return false; 3395 3396 // Ignore records with flexible arrays. 3397 const RecordDecl *RD = RT->getDecl(); 3398 if (RD->hasFlexibleArrayMember()) 3399 return false; 3400 3401 // Check that all sub-fields are at offset 0, and are themselves "integer 3402 // like". 3403 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 3404 3405 bool HadField = false; 3406 unsigned idx = 0; 3407 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 3408 i != e; ++i, ++idx) { 3409 const FieldDecl *FD = *i; 3410 3411 // Bit-fields are not addressable, we only need to verify they are "integer 3412 // like". We still have to disallow a subsequent non-bitfield, for example: 3413 // struct { int : 0; int x } 3414 // is non-integer like according to gcc. 3415 if (FD->isBitField()) { 3416 if (!RD->isUnion()) 3417 HadField = true; 3418 3419 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 3420 return false; 3421 3422 continue; 3423 } 3424 3425 // Check if this field is at offset 0. 3426 if (Layout.getFieldOffset(idx) != 0) 3427 return false; 3428 3429 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 3430 return false; 3431 3432 // Only allow at most one field in a structure. This doesn't match the 3433 // wording above, but follows gcc in situations with a field following an 3434 // empty structure. 3435 if (!RD->isUnion()) { 3436 if (HadField) 3437 return false; 3438 3439 HadField = true; 3440 } 3441 } 3442 3443 return true; 3444} 3445 3446ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 3447 if (RetTy->isVoidType()) 3448 return ABIArgInfo::getIgnore(); 3449 3450 // Large vector types should be returned via memory. 3451 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) 3452 return ABIArgInfo::getIndirect(0); 3453 3454 if (!isAggregateTypeForABI(RetTy)) { 3455 // Treat an enum type as its underlying type. 3456 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 3457 RetTy = EnumTy->getDecl()->getIntegerType(); 3458 3459 return (RetTy->isPromotableIntegerType() ? 3460 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3461 } 3462 3463 // Structures with either a non-trivial destructor or a non-trivial 3464 // copy constructor are always indirect. 3465 if (isRecordReturnIndirect(RetTy, CGT)) 3466 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3467 3468 // Are we following APCS? 3469 if (getABIKind() == APCS) { 3470 if (isEmptyRecord(getContext(), RetTy, false)) 3471 return ABIArgInfo::getIgnore(); 3472 3473 // Complex types are all returned as packed integers. 3474 // 3475 // FIXME: Consider using 2 x vector types if the back end handles them 3476 // correctly. 3477 if (RetTy->isAnyComplexType()) 3478 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 3479 getContext().getTypeSize(RetTy))); 3480 3481 // Integer like structures are returned in r0. 3482 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 3483 // Return in the smallest viable integer type. 3484 uint64_t Size = getContext().getTypeSize(RetTy); 3485 if (Size <= 8) 3486 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3487 if (Size <= 16) 3488 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3489 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3490 } 3491 3492 // Otherwise return in memory. 3493 return ABIArgInfo::getIndirect(0); 3494 } 3495 3496 // Otherwise this is an AAPCS variant. 3497 3498 if (isEmptyRecord(getContext(), RetTy, true)) 3499 return ABIArgInfo::getIgnore(); 3500 3501 // Check for homogeneous aggregates with AAPCS-VFP. 3502 if (getABIKind() == AAPCS_VFP) { 3503 const Type *Base = 0; 3504 if (isHomogeneousAggregate(RetTy, Base, getContext())) { 3505 assert(Base && "Base class should be set for homogeneous aggregate"); 3506 // Homogeneous Aggregates are returned directly. 3507 return ABIArgInfo::getDirect(); 3508 } 3509 } 3510 3511 // Aggregates <= 4 bytes are returned in r0; other aggregates 3512 // are returned indirectly. 3513 uint64_t Size = getContext().getTypeSize(RetTy); 3514 if (Size <= 32) { 3515 // Return in the smallest viable integer type. 3516 if (Size <= 8) 3517 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3518 if (Size <= 16) 3519 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3520 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3521 } 3522 3523 return ABIArgInfo::getIndirect(0); 3524} 3525 3526/// isIllegalVector - check whether Ty is an illegal vector type. 3527bool ARMABIInfo::isIllegalVectorType(QualType Ty) const { 3528 if (const VectorType *VT = Ty->getAs<VectorType>()) { 3529 // Check whether VT is legal. 3530 unsigned NumElements = VT->getNumElements(); 3531 uint64_t Size = getContext().getTypeSize(VT); 3532 // NumElements should be power of 2. 3533 if ((NumElements & (NumElements - 1)) != 0) 3534 return true; 3535 // Size should be greater than 32 bits. 3536 return Size <= 32; 3537 } 3538 return false; 3539} 3540 3541llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3542 CodeGenFunction &CGF) const { 3543 llvm::Type *BP = CGF.Int8PtrTy; 3544 llvm::Type *BPP = CGF.Int8PtrPtrTy; 3545 3546 CGBuilderTy &Builder = CGF.Builder; 3547 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 3548 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3549 3550 uint64_t Size = CGF.getContext().getTypeSize(Ty) / 8; 3551 uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8; 3552 bool IsIndirect = false; 3553 3554 // The ABI alignment for 64-bit or 128-bit vectors is 8 for AAPCS and 4 for 3555 // APCS. For AAPCS, the ABI alignment is at least 4-byte and at most 8-byte. 3556 if (getABIKind() == ARMABIInfo::AAPCS_VFP || 3557 getABIKind() == ARMABIInfo::AAPCS) 3558 TyAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8); 3559 else 3560 TyAlign = 4; 3561 // Use indirect if size of the illegal vector is bigger than 16 bytes. 3562 if (isIllegalVectorType(Ty) && Size > 16) { 3563 IsIndirect = true; 3564 Size = 4; 3565 TyAlign = 4; 3566 } 3567 3568 // Handle address alignment for ABI alignment > 4 bytes. 3569 if (TyAlign > 4) { 3570 assert((TyAlign & (TyAlign - 1)) == 0 && 3571 "Alignment is not power of 2!"); 3572 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 3573 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1)); 3574 AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1))); 3575 Addr = Builder.CreateIntToPtr(AddrAsInt, BP, "ap.align"); 3576 } 3577 3578 uint64_t Offset = 3579 llvm::RoundUpToAlignment(Size, 4); 3580 llvm::Value *NextAddr = 3581 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 3582 "ap.next"); 3583 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3584 3585 if (IsIndirect) 3586 Addr = Builder.CreateLoad(Builder.CreateBitCast(Addr, BPP)); 3587 else if (TyAlign < CGF.getContext().getTypeAlign(Ty) / 8) { 3588 // We can't directly cast ap.cur to pointer to a vector type, since ap.cur 3589 // may not be correctly aligned for the vector type. We create an aligned 3590 // temporary space and copy the content over from ap.cur to the temporary 3591 // space. This is necessary if the natural alignment of the type is greater 3592 // than the ABI alignment. 3593 llvm::Type *I8PtrTy = Builder.getInt8PtrTy(); 3594 CharUnits CharSize = getContext().getTypeSizeInChars(Ty); 3595 llvm::Value *AlignedTemp = CGF.CreateTempAlloca(CGF.ConvertType(Ty), 3596 "var.align"); 3597 llvm::Value *Dst = Builder.CreateBitCast(AlignedTemp, I8PtrTy); 3598 llvm::Value *Src = Builder.CreateBitCast(Addr, I8PtrTy); 3599 Builder.CreateMemCpy(Dst, Src, 3600 llvm::ConstantInt::get(CGF.IntPtrTy, CharSize.getQuantity()), 3601 TyAlign, false); 3602 Addr = AlignedTemp; //The content is in aligned location. 3603 } 3604 llvm::Type *PTy = 3605 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3606 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 3607 3608 return AddrTyped; 3609} 3610 3611namespace { 3612 3613class NaClARMABIInfo : public ABIInfo { 3614 public: 3615 NaClARMABIInfo(CodeGen::CodeGenTypes &CGT, ARMABIInfo::ABIKind Kind) 3616 : ABIInfo(CGT), PInfo(CGT), NInfo(CGT, Kind) {} 3617 virtual void computeInfo(CGFunctionInfo &FI) const; 3618 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3619 CodeGenFunction &CGF) const; 3620 private: 3621 PNaClABIInfo PInfo; // Used for generating calls with pnaclcall callingconv. 3622 ARMABIInfo NInfo; // Used for everything else. 3623}; 3624 3625class NaClARMTargetCodeGenInfo : public TargetCodeGenInfo { 3626 public: 3627 NaClARMTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, ARMABIInfo::ABIKind Kind) 3628 : TargetCodeGenInfo(new NaClARMABIInfo(CGT, Kind)) {} 3629}; 3630 3631} 3632 3633void NaClARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 3634 if (FI.getASTCallingConvention() == CC_PnaclCall) 3635 PInfo.computeInfo(FI); 3636 else 3637 static_cast<const ABIInfo&>(NInfo).computeInfo(FI); 3638} 3639 3640llvm::Value *NaClARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3641 CodeGenFunction &CGF) const { 3642 // Always use the native convention; calling pnacl-style varargs functions 3643 // is unsupported. 3644 return static_cast<const ABIInfo&>(NInfo).EmitVAArg(VAListAddr, Ty, CGF); 3645} 3646 3647//===----------------------------------------------------------------------===// 3648// AArch64 ABI Implementation 3649//===----------------------------------------------------------------------===// 3650 3651namespace { 3652 3653class AArch64ABIInfo : public ABIInfo { 3654public: 3655 AArch64ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 3656 3657private: 3658 // The AArch64 PCS is explicit about return types and argument types being 3659 // handled identically, so we don't need to draw a distinction between 3660 // Argument and Return classification. 3661 ABIArgInfo classifyGenericType(QualType Ty, int &FreeIntRegs, 3662 int &FreeVFPRegs) const; 3663 3664 ABIArgInfo tryUseRegs(QualType Ty, int &FreeRegs, int RegsNeeded, bool IsInt, 3665 llvm::Type *DirectTy = 0) const; 3666 3667 virtual void computeInfo(CGFunctionInfo &FI) const; 3668 3669 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3670 CodeGenFunction &CGF) const; 3671}; 3672 3673class AArch64TargetCodeGenInfo : public TargetCodeGenInfo { 3674public: 3675 AArch64TargetCodeGenInfo(CodeGenTypes &CGT) 3676 :TargetCodeGenInfo(new AArch64ABIInfo(CGT)) {} 3677 3678 const AArch64ABIInfo &getABIInfo() const { 3679 return static_cast<const AArch64ABIInfo&>(TargetCodeGenInfo::getABIInfo()); 3680 } 3681 3682 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 3683 return 31; 3684 } 3685 3686 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3687 llvm::Value *Address) const { 3688 // 0-31 are x0-x30 and sp: 8 bytes each 3689 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 3690 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 31); 3691 3692 // 64-95 are v0-v31: 16 bytes each 3693 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16); 3694 AssignToArrayRange(CGF.Builder, Address, Sixteen8, 64, 95); 3695 3696 return false; 3697 } 3698 3699}; 3700 3701} 3702 3703void AArch64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 3704 int FreeIntRegs = 8, FreeVFPRegs = 8; 3705 3706 FI.getReturnInfo() = classifyGenericType(FI.getReturnType(), 3707 FreeIntRegs, FreeVFPRegs); 3708 3709 FreeIntRegs = FreeVFPRegs = 8; 3710 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3711 it != ie; ++it) { 3712 it->info = classifyGenericType(it->type, FreeIntRegs, FreeVFPRegs); 3713 3714 } 3715} 3716 3717ABIArgInfo 3718AArch64ABIInfo::tryUseRegs(QualType Ty, int &FreeRegs, int RegsNeeded, 3719 bool IsInt, llvm::Type *DirectTy) const { 3720 if (FreeRegs >= RegsNeeded) { 3721 FreeRegs -= RegsNeeded; 3722 return ABIArgInfo::getDirect(DirectTy); 3723 } 3724 3725 llvm::Type *Padding = 0; 3726 3727 // We need padding so that later arguments don't get filled in anyway. That 3728 // wouldn't happen if only ByVal arguments followed in the same category, but 3729 // a large structure will simply seem to be a pointer as far as LLVM is 3730 // concerned. 3731 if (FreeRegs > 0) { 3732 if (IsInt) 3733 Padding = llvm::Type::getInt64Ty(getVMContext()); 3734 else 3735 Padding = llvm::Type::getFloatTy(getVMContext()); 3736 3737 // Either [N x i64] or [N x float]. 3738 Padding = llvm::ArrayType::get(Padding, FreeRegs); 3739 FreeRegs = 0; 3740 } 3741 3742 return ABIArgInfo::getIndirect(getContext().getTypeAlign(Ty) / 8, 3743 /*IsByVal=*/ true, /*Realign=*/ false, 3744 Padding); 3745} 3746 3747 3748ABIArgInfo AArch64ABIInfo::classifyGenericType(QualType Ty, 3749 int &FreeIntRegs, 3750 int &FreeVFPRegs) const { 3751 // Can only occurs for return, but harmless otherwise. 3752 if (Ty->isVoidType()) 3753 return ABIArgInfo::getIgnore(); 3754 3755 // Large vector types should be returned via memory. There's no such concept 3756 // in the ABI, but they'd be over 16 bytes anyway so no matter how they're 3757 // classified they'd go into memory (see B.3). 3758 if (Ty->isVectorType() && getContext().getTypeSize(Ty) > 128) { 3759 if (FreeIntRegs > 0) 3760 --FreeIntRegs; 3761 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3762 } 3763 3764 // All non-aggregate LLVM types have a concrete ABI representation so they can 3765 // be passed directly. After this block we're guaranteed to be in a 3766 // complicated case. 3767 if (!isAggregateTypeForABI(Ty)) { 3768 // Treat an enum type as its underlying type. 3769 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3770 Ty = EnumTy->getDecl()->getIntegerType(); 3771 3772 if (Ty->isFloatingType() || Ty->isVectorType()) 3773 return tryUseRegs(Ty, FreeVFPRegs, /*RegsNeeded=*/ 1, /*IsInt=*/ false); 3774 3775 assert(getContext().getTypeSize(Ty) <= 128 && 3776 "unexpectedly large scalar type"); 3777 3778 int RegsNeeded = getContext().getTypeSize(Ty) > 64 ? 2 : 1; 3779 3780 // If the type may need padding registers to ensure "alignment", we must be 3781 // careful when this is accounted for. Increasing the effective size covers 3782 // all cases. 3783 if (getContext().getTypeAlign(Ty) == 128) 3784 RegsNeeded += FreeIntRegs % 2 != 0; 3785 3786 return tryUseRegs(Ty, FreeIntRegs, RegsNeeded, /*IsInt=*/ true); 3787 } 3788 3789 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) { 3790 if (FreeIntRegs > 0 && RAA == CGCXXABI::RAA_Indirect) 3791 --FreeIntRegs; 3792 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 3793 } 3794 3795 if (isEmptyRecord(getContext(), Ty, true)) { 3796 if (!getContext().getLangOpts().CPlusPlus) { 3797 // Empty structs outside C++ mode are a GNU extension, so no ABI can 3798 // possibly tell us what to do. It turns out (I believe) that GCC ignores 3799 // the object for parameter-passsing purposes. 3800 return ABIArgInfo::getIgnore(); 3801 } 3802 3803 // The combination of C++98 9p5 (sizeof(struct) != 0) and the pseudocode 3804 // description of va_arg in the PCS require that an empty struct does 3805 // actually occupy space for parameter-passing. I'm hoping for a 3806 // clarification giving an explicit paragraph to point to in future. 3807 return tryUseRegs(Ty, FreeIntRegs, /*RegsNeeded=*/ 1, /*IsInt=*/ true, 3808 llvm::Type::getInt8Ty(getVMContext())); 3809 } 3810 3811 // Homogeneous vector aggregates get passed in registers or on the stack. 3812 const Type *Base = 0; 3813 uint64_t NumMembers = 0; 3814 if (isHomogeneousAggregate(Ty, Base, getContext(), &NumMembers)) { 3815 assert(Base && "Base class should be set for homogeneous aggregate"); 3816 // Homogeneous aggregates are passed and returned directly. 3817 return tryUseRegs(Ty, FreeVFPRegs, /*RegsNeeded=*/ NumMembers, 3818 /*IsInt=*/ false); 3819 } 3820 3821 uint64_t Size = getContext().getTypeSize(Ty); 3822 if (Size <= 128) { 3823 // Small structs can use the same direct type whether they're in registers 3824 // or on the stack. 3825 llvm::Type *BaseTy; 3826 unsigned NumBases; 3827 int SizeInRegs = (Size + 63) / 64; 3828 3829 if (getContext().getTypeAlign(Ty) == 128) { 3830 BaseTy = llvm::Type::getIntNTy(getVMContext(), 128); 3831 NumBases = 1; 3832 3833 // If the type may need padding registers to ensure "alignment", we must 3834 // be careful when this is accounted for. Increasing the effective size 3835 // covers all cases. 3836 SizeInRegs += FreeIntRegs % 2 != 0; 3837 } else { 3838 BaseTy = llvm::Type::getInt64Ty(getVMContext()); 3839 NumBases = SizeInRegs; 3840 } 3841 llvm::Type *DirectTy = llvm::ArrayType::get(BaseTy, NumBases); 3842 3843 return tryUseRegs(Ty, FreeIntRegs, /*RegsNeeded=*/ SizeInRegs, 3844 /*IsInt=*/ true, DirectTy); 3845 } 3846 3847 // If the aggregate is > 16 bytes, it's passed and returned indirectly. In 3848 // LLVM terms the return uses an "sret" pointer, but that's handled elsewhere. 3849 --FreeIntRegs; 3850 return ABIArgInfo::getIndirect(0, /* byVal = */ false); 3851} 3852 3853llvm::Value *AArch64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3854 CodeGenFunction &CGF) const { 3855 // The AArch64 va_list type and handling is specified in the Procedure Call 3856 // Standard, section B.4: 3857 // 3858 // struct { 3859 // void *__stack; 3860 // void *__gr_top; 3861 // void *__vr_top; 3862 // int __gr_offs; 3863 // int __vr_offs; 3864 // }; 3865 3866 assert(!CGF.CGM.getDataLayout().isBigEndian() 3867 && "va_arg not implemented for big-endian AArch64"); 3868 3869 int FreeIntRegs = 8, FreeVFPRegs = 8; 3870 Ty = CGF.getContext().getCanonicalType(Ty); 3871 ABIArgInfo AI = classifyGenericType(Ty, FreeIntRegs, FreeVFPRegs); 3872 3873 llvm::BasicBlock *MaybeRegBlock = CGF.createBasicBlock("vaarg.maybe_reg"); 3874 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 3875 llvm::BasicBlock *OnStackBlock = CGF.createBasicBlock("vaarg.on_stack"); 3876 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 3877 3878 llvm::Value *reg_offs_p = 0, *reg_offs = 0; 3879 int reg_top_index; 3880 int RegSize; 3881 if (FreeIntRegs < 8) { 3882 assert(FreeVFPRegs == 8 && "Arguments never split between int & VFP regs"); 3883 // 3 is the field number of __gr_offs 3884 reg_offs_p = CGF.Builder.CreateStructGEP(VAListAddr, 3, "gr_offs_p"); 3885 reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "gr_offs"); 3886 reg_top_index = 1; // field number for __gr_top 3887 RegSize = 8 * (8 - FreeIntRegs); 3888 } else { 3889 assert(FreeVFPRegs < 8 && "Argument must go in VFP or int regs"); 3890 // 4 is the field number of __vr_offs. 3891 reg_offs_p = CGF.Builder.CreateStructGEP(VAListAddr, 4, "vr_offs_p"); 3892 reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "vr_offs"); 3893 reg_top_index = 2; // field number for __vr_top 3894 RegSize = 16 * (8 - FreeVFPRegs); 3895 } 3896 3897 //======================================= 3898 // Find out where argument was passed 3899 //======================================= 3900 3901 // If reg_offs >= 0 we're already using the stack for this type of 3902 // argument. We don't want to keep updating reg_offs (in case it overflows, 3903 // though anyone passing 2GB of arguments, each at most 16 bytes, deserves 3904 // whatever they get). 3905 llvm::Value *UsingStack = 0; 3906 UsingStack = CGF.Builder.CreateICmpSGE(reg_offs, 3907 llvm::ConstantInt::get(CGF.Int32Ty, 0)); 3908 3909 CGF.Builder.CreateCondBr(UsingStack, OnStackBlock, MaybeRegBlock); 3910 3911 // Otherwise, at least some kind of argument could go in these registers, the 3912 // quesiton is whether this particular type is too big. 3913 CGF.EmitBlock(MaybeRegBlock); 3914 3915 // Integer arguments may need to correct register alignment (for example a 3916 // "struct { __int128 a; };" gets passed in x_2N, x_{2N+1}). In this case we 3917 // align __gr_offs to calculate the potential address. 3918 if (FreeIntRegs < 8 && AI.isDirect() && getContext().getTypeAlign(Ty) > 64) { 3919 int Align = getContext().getTypeAlign(Ty) / 8; 3920 3921 reg_offs = CGF.Builder.CreateAdd(reg_offs, 3922 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1), 3923 "align_regoffs"); 3924 reg_offs = CGF.Builder.CreateAnd(reg_offs, 3925 llvm::ConstantInt::get(CGF.Int32Ty, -Align), 3926 "aligned_regoffs"); 3927 } 3928 3929 // Update the gr_offs/vr_offs pointer for next call to va_arg on this va_list. 3930 llvm::Value *NewOffset = 0; 3931 NewOffset = CGF.Builder.CreateAdd(reg_offs, 3932 llvm::ConstantInt::get(CGF.Int32Ty, RegSize), 3933 "new_reg_offs"); 3934 CGF.Builder.CreateStore(NewOffset, reg_offs_p); 3935 3936 // Now we're in a position to decide whether this argument really was in 3937 // registers or not. 3938 llvm::Value *InRegs = 0; 3939 InRegs = CGF.Builder.CreateICmpSLE(NewOffset, 3940 llvm::ConstantInt::get(CGF.Int32Ty, 0), 3941 "inreg"); 3942 3943 CGF.Builder.CreateCondBr(InRegs, InRegBlock, OnStackBlock); 3944 3945 //======================================= 3946 // Argument was in registers 3947 //======================================= 3948 3949 // Now we emit the code for if the argument was originally passed in 3950 // registers. First start the appropriate block: 3951 CGF.EmitBlock(InRegBlock); 3952 3953 llvm::Value *reg_top_p = 0, *reg_top = 0; 3954 reg_top_p = CGF.Builder.CreateStructGEP(VAListAddr, reg_top_index, "reg_top_p"); 3955 reg_top = CGF.Builder.CreateLoad(reg_top_p, "reg_top"); 3956 llvm::Value *BaseAddr = CGF.Builder.CreateGEP(reg_top, reg_offs); 3957 llvm::Value *RegAddr = 0; 3958 llvm::Type *MemTy = llvm::PointerType::getUnqual(CGF.ConvertTypeForMem(Ty)); 3959 3960 if (!AI.isDirect()) { 3961 // If it's been passed indirectly (actually a struct), whatever we find from 3962 // stored registers or on the stack will actually be a struct **. 3963 MemTy = llvm::PointerType::getUnqual(MemTy); 3964 } 3965 3966 const Type *Base = 0; 3967 uint64_t NumMembers; 3968 if (isHomogeneousAggregate(Ty, Base, getContext(), &NumMembers) 3969 && NumMembers > 1) { 3970 // Homogeneous aggregates passed in registers will have their elements split 3971 // and stored 16-bytes apart regardless of size (they're notionally in qN, 3972 // qN+1, ...). We reload and store into a temporary local variable 3973 // contiguously. 3974 assert(AI.isDirect() && "Homogeneous aggregates should be passed directly"); 3975 llvm::Type *BaseTy = CGF.ConvertType(QualType(Base, 0)); 3976 llvm::Type *HFATy = llvm::ArrayType::get(BaseTy, NumMembers); 3977 llvm::Value *Tmp = CGF.CreateTempAlloca(HFATy); 3978 3979 for (unsigned i = 0; i < NumMembers; ++i) { 3980 llvm::Value *BaseOffset = llvm::ConstantInt::get(CGF.Int32Ty, 16 * i); 3981 llvm::Value *LoadAddr = CGF.Builder.CreateGEP(BaseAddr, BaseOffset); 3982 LoadAddr = CGF.Builder.CreateBitCast(LoadAddr, 3983 llvm::PointerType::getUnqual(BaseTy)); 3984 llvm::Value *StoreAddr = CGF.Builder.CreateStructGEP(Tmp, i); 3985 3986 llvm::Value *Elem = CGF.Builder.CreateLoad(LoadAddr); 3987 CGF.Builder.CreateStore(Elem, StoreAddr); 3988 } 3989 3990 RegAddr = CGF.Builder.CreateBitCast(Tmp, MemTy); 3991 } else { 3992 // Otherwise the object is contiguous in memory 3993 RegAddr = CGF.Builder.CreateBitCast(BaseAddr, MemTy); 3994 } 3995 3996 CGF.EmitBranch(ContBlock); 3997 3998 //======================================= 3999 // Argument was on the stack 4000 //======================================= 4001 CGF.EmitBlock(OnStackBlock); 4002 4003 llvm::Value *stack_p = 0, *OnStackAddr = 0; 4004 stack_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "stack_p"); 4005 OnStackAddr = CGF.Builder.CreateLoad(stack_p, "stack"); 4006 4007 // Again, stack arguments may need realigmnent. In this case both integer and 4008 // floating-point ones might be affected. 4009 if (AI.isDirect() && getContext().getTypeAlign(Ty) > 64) { 4010 int Align = getContext().getTypeAlign(Ty) / 8; 4011 4012 OnStackAddr = CGF.Builder.CreatePtrToInt(OnStackAddr, CGF.Int64Ty); 4013 4014 OnStackAddr = CGF.Builder.CreateAdd(OnStackAddr, 4015 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1), 4016 "align_stack"); 4017 OnStackAddr = CGF.Builder.CreateAnd(OnStackAddr, 4018 llvm::ConstantInt::get(CGF.Int64Ty, -Align), 4019 "align_stack"); 4020 4021 OnStackAddr = CGF.Builder.CreateIntToPtr(OnStackAddr, CGF.Int8PtrTy); 4022 } 4023 4024 uint64_t StackSize; 4025 if (AI.isDirect()) 4026 StackSize = getContext().getTypeSize(Ty) / 8; 4027 else 4028 StackSize = 8; 4029 4030 // All stack slots are 8 bytes 4031 StackSize = llvm::RoundUpToAlignment(StackSize, 8); 4032 4033 llvm::Value *StackSizeC = llvm::ConstantInt::get(CGF.Int32Ty, StackSize); 4034 llvm::Value *NewStack = CGF.Builder.CreateGEP(OnStackAddr, StackSizeC, 4035 "new_stack"); 4036 4037 // Write the new value of __stack for the next call to va_arg 4038 CGF.Builder.CreateStore(NewStack, stack_p); 4039 4040 OnStackAddr = CGF.Builder.CreateBitCast(OnStackAddr, MemTy); 4041 4042 CGF.EmitBranch(ContBlock); 4043 4044 //======================================= 4045 // Tidy up 4046 //======================================= 4047 CGF.EmitBlock(ContBlock); 4048 4049 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(MemTy, 2, "vaarg.addr"); 4050 ResAddr->addIncoming(RegAddr, InRegBlock); 4051 ResAddr->addIncoming(OnStackAddr, OnStackBlock); 4052 4053 if (AI.isDirect()) 4054 return ResAddr; 4055 4056 return CGF.Builder.CreateLoad(ResAddr, "vaarg.addr"); 4057} 4058 4059//===----------------------------------------------------------------------===// 4060// NVPTX ABI Implementation 4061//===----------------------------------------------------------------------===// 4062 4063namespace { 4064 4065class NVPTXABIInfo : public ABIInfo { 4066public: 4067 NVPTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 4068 4069 ABIArgInfo classifyReturnType(QualType RetTy) const; 4070 ABIArgInfo classifyArgumentType(QualType Ty) const; 4071 4072 virtual void computeInfo(CGFunctionInfo &FI) const; 4073 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4074 CodeGenFunction &CFG) const; 4075}; 4076 4077class NVPTXTargetCodeGenInfo : public TargetCodeGenInfo { 4078public: 4079 NVPTXTargetCodeGenInfo(CodeGenTypes &CGT) 4080 : TargetCodeGenInfo(new NVPTXABIInfo(CGT)) {} 4081 4082 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4083 CodeGen::CodeGenModule &M) const; 4084private: 4085 static void addKernelMetadata(llvm::Function *F); 4086}; 4087 4088ABIArgInfo NVPTXABIInfo::classifyReturnType(QualType RetTy) const { 4089 if (RetTy->isVoidType()) 4090 return ABIArgInfo::getIgnore(); 4091 if (isAggregateTypeForABI(RetTy)) 4092 return ABIArgInfo::getIndirect(0); 4093 return ABIArgInfo::getDirect(); 4094} 4095 4096ABIArgInfo NVPTXABIInfo::classifyArgumentType(QualType Ty) const { 4097 if (isAggregateTypeForABI(Ty)) 4098 return ABIArgInfo::getIndirect(0); 4099 4100 return ABIArgInfo::getDirect(); 4101} 4102 4103void NVPTXABIInfo::computeInfo(CGFunctionInfo &FI) const { 4104 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 4105 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4106 it != ie; ++it) 4107 it->info = classifyArgumentType(it->type); 4108 4109 // Always honor user-specified calling convention. 4110 if (FI.getCallingConvention() != llvm::CallingConv::C) 4111 return; 4112 4113 FI.setEffectiveCallingConvention(getRuntimeCC()); 4114} 4115 4116llvm::Value *NVPTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4117 CodeGenFunction &CFG) const { 4118 llvm_unreachable("NVPTX does not support varargs"); 4119} 4120 4121void NVPTXTargetCodeGenInfo:: 4122SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4123 CodeGen::CodeGenModule &M) const{ 4124 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4125 if (!FD) return; 4126 4127 llvm::Function *F = cast<llvm::Function>(GV); 4128 4129 // Perform special handling in OpenCL mode 4130 if (M.getLangOpts().OpenCL) { 4131 // Use OpenCL function attributes to check for kernel functions 4132 // By default, all functions are device functions 4133 if (FD->hasAttr<OpenCLKernelAttr>()) { 4134 // OpenCL __kernel functions get kernel metadata 4135 addKernelMetadata(F); 4136 // And kernel functions are not subject to inlining 4137 F->addFnAttr(llvm::Attribute::NoInline); 4138 } 4139 } 4140 4141 // Perform special handling in CUDA mode. 4142 if (M.getLangOpts().CUDA) { 4143 // CUDA __global__ functions get a kernel metadata entry. Since 4144 // __global__ functions cannot be called from the device, we do not 4145 // need to set the noinline attribute. 4146 if (FD->getAttr<CUDAGlobalAttr>()) 4147 addKernelMetadata(F); 4148 } 4149} 4150 4151void NVPTXTargetCodeGenInfo::addKernelMetadata(llvm::Function *F) { 4152 llvm::Module *M = F->getParent(); 4153 llvm::LLVMContext &Ctx = M->getContext(); 4154 4155 // Get "nvvm.annotations" metadata node 4156 llvm::NamedMDNode *MD = M->getOrInsertNamedMetadata("nvvm.annotations"); 4157 4158 // Create !{<func-ref>, metadata !"kernel", i32 1} node 4159 llvm::SmallVector<llvm::Value *, 3> MDVals; 4160 MDVals.push_back(F); 4161 MDVals.push_back(llvm::MDString::get(Ctx, "kernel")); 4162 MDVals.push_back(llvm::ConstantInt::get(llvm::Type::getInt32Ty(Ctx), 1)); 4163 4164 // Append metadata to nvvm.annotations 4165 MD->addOperand(llvm::MDNode::get(Ctx, MDVals)); 4166} 4167 4168} 4169 4170//===----------------------------------------------------------------------===// 4171// SystemZ ABI Implementation 4172//===----------------------------------------------------------------------===// 4173 4174namespace { 4175 4176class SystemZABIInfo : public ABIInfo { 4177public: 4178 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 4179 4180 bool isPromotableIntegerType(QualType Ty) const; 4181 bool isCompoundType(QualType Ty) const; 4182 bool isFPArgumentType(QualType Ty) const; 4183 4184 ABIArgInfo classifyReturnType(QualType RetTy) const; 4185 ABIArgInfo classifyArgumentType(QualType ArgTy) const; 4186 4187 virtual void computeInfo(CGFunctionInfo &FI) const { 4188 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 4189 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4190 it != ie; ++it) 4191 it->info = classifyArgumentType(it->type); 4192 } 4193 4194 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4195 CodeGenFunction &CGF) const; 4196}; 4197 4198class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 4199public: 4200 SystemZTargetCodeGenInfo(CodeGenTypes &CGT) 4201 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {} 4202}; 4203 4204} 4205 4206bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 4207 // Treat an enum type as its underlying type. 4208 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 4209 Ty = EnumTy->getDecl()->getIntegerType(); 4210 4211 // Promotable integer types are required to be promoted by the ABI. 4212 if (Ty->isPromotableIntegerType()) 4213 return true; 4214 4215 // 32-bit values must also be promoted. 4216 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 4217 switch (BT->getKind()) { 4218 case BuiltinType::Int: 4219 case BuiltinType::UInt: 4220 return true; 4221 default: 4222 return false; 4223 } 4224 return false; 4225} 4226 4227bool SystemZABIInfo::isCompoundType(QualType Ty) const { 4228 return Ty->isAnyComplexType() || isAggregateTypeForABI(Ty); 4229} 4230 4231bool SystemZABIInfo::isFPArgumentType(QualType Ty) const { 4232 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 4233 switch (BT->getKind()) { 4234 case BuiltinType::Float: 4235 case BuiltinType::Double: 4236 return true; 4237 default: 4238 return false; 4239 } 4240 4241 if (const RecordType *RT = Ty->getAsStructureType()) { 4242 const RecordDecl *RD = RT->getDecl(); 4243 bool Found = false; 4244 4245 // If this is a C++ record, check the bases first. 4246 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 4247 for (CXXRecordDecl::base_class_const_iterator I = CXXRD->bases_begin(), 4248 E = CXXRD->bases_end(); I != E; ++I) { 4249 QualType Base = I->getType(); 4250 4251 // Empty bases don't affect things either way. 4252 if (isEmptyRecord(getContext(), Base, true)) 4253 continue; 4254 4255 if (Found) 4256 return false; 4257 Found = isFPArgumentType(Base); 4258 if (!Found) 4259 return false; 4260 } 4261 4262 // Check the fields. 4263 for (RecordDecl::field_iterator I = RD->field_begin(), 4264 E = RD->field_end(); I != E; ++I) { 4265 const FieldDecl *FD = *I; 4266 4267 // Empty bitfields don't affect things either way. 4268 // Unlike isSingleElementStruct(), empty structure and array fields 4269 // do count. So do anonymous bitfields that aren't zero-sized. 4270 if (FD->isBitField() && FD->getBitWidthValue(getContext()) == 0) 4271 return true; 4272 4273 // Unlike isSingleElementStruct(), arrays do not count. 4274 // Nested isFPArgumentType structures still do though. 4275 if (Found) 4276 return false; 4277 Found = isFPArgumentType(FD->getType()); 4278 if (!Found) 4279 return false; 4280 } 4281 4282 // Unlike isSingleElementStruct(), trailing padding is allowed. 4283 // An 8-byte aligned struct s { float f; } is passed as a double. 4284 return Found; 4285 } 4286 4287 return false; 4288} 4289 4290llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4291 CodeGenFunction &CGF) const { 4292 // Assume that va_list type is correct; should be pointer to LLVM type: 4293 // struct { 4294 // i64 __gpr; 4295 // i64 __fpr; 4296 // i8 *__overflow_arg_area; 4297 // i8 *__reg_save_area; 4298 // }; 4299 4300 // Every argument occupies 8 bytes and is passed by preference in either 4301 // GPRs or FPRs. 4302 Ty = CGF.getContext().getCanonicalType(Ty); 4303 ABIArgInfo AI = classifyArgumentType(Ty); 4304 bool InFPRs = isFPArgumentType(Ty); 4305 4306 llvm::Type *APTy = llvm::PointerType::getUnqual(CGF.ConvertTypeForMem(Ty)); 4307 bool IsIndirect = AI.isIndirect(); 4308 unsigned UnpaddedBitSize; 4309 if (IsIndirect) { 4310 APTy = llvm::PointerType::getUnqual(APTy); 4311 UnpaddedBitSize = 64; 4312 } else 4313 UnpaddedBitSize = getContext().getTypeSize(Ty); 4314 unsigned PaddedBitSize = 64; 4315 assert((UnpaddedBitSize <= PaddedBitSize) && "Invalid argument size."); 4316 4317 unsigned PaddedSize = PaddedBitSize / 8; 4318 unsigned Padding = (PaddedBitSize - UnpaddedBitSize) / 8; 4319 4320 unsigned MaxRegs, RegCountField, RegSaveIndex, RegPadding; 4321 if (InFPRs) { 4322 MaxRegs = 4; // Maximum of 4 FPR arguments 4323 RegCountField = 1; // __fpr 4324 RegSaveIndex = 16; // save offset for f0 4325 RegPadding = 0; // floats are passed in the high bits of an FPR 4326 } else { 4327 MaxRegs = 5; // Maximum of 5 GPR arguments 4328 RegCountField = 0; // __gpr 4329 RegSaveIndex = 2; // save offset for r2 4330 RegPadding = Padding; // values are passed in the low bits of a GPR 4331 } 4332 4333 llvm::Value *RegCountPtr = 4334 CGF.Builder.CreateStructGEP(VAListAddr, RegCountField, "reg_count_ptr"); 4335 llvm::Value *RegCount = CGF.Builder.CreateLoad(RegCountPtr, "reg_count"); 4336 llvm::Type *IndexTy = RegCount->getType(); 4337 llvm::Value *MaxRegsV = llvm::ConstantInt::get(IndexTy, MaxRegs); 4338 llvm::Value *InRegs = CGF.Builder.CreateICmpULT(RegCount, MaxRegsV, 4339 "fits_in_regs"); 4340 4341 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 4342 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 4343 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 4344 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 4345 4346 // Emit code to load the value if it was passed in registers. 4347 CGF.EmitBlock(InRegBlock); 4348 4349 // Work out the address of an argument register. 4350 llvm::Value *PaddedSizeV = llvm::ConstantInt::get(IndexTy, PaddedSize); 4351 llvm::Value *ScaledRegCount = 4352 CGF.Builder.CreateMul(RegCount, PaddedSizeV, "scaled_reg_count"); 4353 llvm::Value *RegBase = 4354 llvm::ConstantInt::get(IndexTy, RegSaveIndex * PaddedSize + RegPadding); 4355 llvm::Value *RegOffset = 4356 CGF.Builder.CreateAdd(ScaledRegCount, RegBase, "reg_offset"); 4357 llvm::Value *RegSaveAreaPtr = 4358 CGF.Builder.CreateStructGEP(VAListAddr, 3, "reg_save_area_ptr"); 4359 llvm::Value *RegSaveArea = 4360 CGF.Builder.CreateLoad(RegSaveAreaPtr, "reg_save_area"); 4361 llvm::Value *RawRegAddr = 4362 CGF.Builder.CreateGEP(RegSaveArea, RegOffset, "raw_reg_addr"); 4363 llvm::Value *RegAddr = 4364 CGF.Builder.CreateBitCast(RawRegAddr, APTy, "reg_addr"); 4365 4366 // Update the register count 4367 llvm::Value *One = llvm::ConstantInt::get(IndexTy, 1); 4368 llvm::Value *NewRegCount = 4369 CGF.Builder.CreateAdd(RegCount, One, "reg_count"); 4370 CGF.Builder.CreateStore(NewRegCount, RegCountPtr); 4371 CGF.EmitBranch(ContBlock); 4372 4373 // Emit code to load the value if it was passed in memory. 4374 CGF.EmitBlock(InMemBlock); 4375 4376 // Work out the address of a stack argument. 4377 llvm::Value *OverflowArgAreaPtr = 4378 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_ptr"); 4379 llvm::Value *OverflowArgArea = 4380 CGF.Builder.CreateLoad(OverflowArgAreaPtr, "overflow_arg_area"); 4381 llvm::Value *PaddingV = llvm::ConstantInt::get(IndexTy, Padding); 4382 llvm::Value *RawMemAddr = 4383 CGF.Builder.CreateGEP(OverflowArgArea, PaddingV, "raw_mem_addr"); 4384 llvm::Value *MemAddr = 4385 CGF.Builder.CreateBitCast(RawMemAddr, APTy, "mem_addr"); 4386 4387 // Update overflow_arg_area_ptr pointer 4388 llvm::Value *NewOverflowArgArea = 4389 CGF.Builder.CreateGEP(OverflowArgArea, PaddedSizeV, "overflow_arg_area"); 4390 CGF.Builder.CreateStore(NewOverflowArgArea, OverflowArgAreaPtr); 4391 CGF.EmitBranch(ContBlock); 4392 4393 // Return the appropriate result. 4394 CGF.EmitBlock(ContBlock); 4395 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(APTy, 2, "va_arg.addr"); 4396 ResAddr->addIncoming(RegAddr, InRegBlock); 4397 ResAddr->addIncoming(MemAddr, InMemBlock); 4398 4399 if (IsIndirect) 4400 return CGF.Builder.CreateLoad(ResAddr, "indirect_arg"); 4401 4402 return ResAddr; 4403} 4404 4405 4406ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const { 4407 if (RetTy->isVoidType()) 4408 return ABIArgInfo::getIgnore(); 4409 if (isCompoundType(RetTy) || getContext().getTypeSize(RetTy) > 64) 4410 return ABIArgInfo::getIndirect(0); 4411 return (isPromotableIntegerType(RetTy) ? 4412 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4413} 4414 4415ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const { 4416 // Handle the generic C++ ABI. 4417 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) 4418 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 4419 4420 // Integers and enums are extended to full register width. 4421 if (isPromotableIntegerType(Ty)) 4422 return ABIArgInfo::getExtend(); 4423 4424 // Values that are not 1, 2, 4 or 8 bytes in size are passed indirectly. 4425 uint64_t Size = getContext().getTypeSize(Ty); 4426 if (Size != 8 && Size != 16 && Size != 32 && Size != 64) 4427 return ABIArgInfo::getIndirect(0); 4428 4429 // Handle small structures. 4430 if (const RecordType *RT = Ty->getAs<RecordType>()) { 4431 // Structures with flexible arrays have variable length, so really 4432 // fail the size test above. 4433 const RecordDecl *RD = RT->getDecl(); 4434 if (RD->hasFlexibleArrayMember()) 4435 return ABIArgInfo::getIndirect(0); 4436 4437 // The structure is passed as an unextended integer, a float, or a double. 4438 llvm::Type *PassTy; 4439 if (isFPArgumentType(Ty)) { 4440 assert(Size == 32 || Size == 64); 4441 if (Size == 32) 4442 PassTy = llvm::Type::getFloatTy(getVMContext()); 4443 else 4444 PassTy = llvm::Type::getDoubleTy(getVMContext()); 4445 } else 4446 PassTy = llvm::IntegerType::get(getVMContext(), Size); 4447 return ABIArgInfo::getDirect(PassTy); 4448 } 4449 4450 // Non-structure compounds are passed indirectly. 4451 if (isCompoundType(Ty)) 4452 return ABIArgInfo::getIndirect(0); 4453 4454 return ABIArgInfo::getDirect(0); 4455} 4456 4457//===----------------------------------------------------------------------===// 4458// MBlaze ABI Implementation 4459//===----------------------------------------------------------------------===// 4460 4461namespace { 4462 4463class MBlazeABIInfo : public ABIInfo { 4464public: 4465 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 4466 4467 bool isPromotableIntegerType(QualType Ty) const; 4468 4469 ABIArgInfo classifyReturnType(QualType RetTy) const; 4470 ABIArgInfo classifyArgumentType(QualType RetTy) const; 4471 4472 virtual void computeInfo(CGFunctionInfo &FI) const { 4473 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 4474 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4475 it != ie; ++it) 4476 it->info = classifyArgumentType(it->type); 4477 } 4478 4479 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4480 CodeGenFunction &CGF) const; 4481}; 4482 4483class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo { 4484public: 4485 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT) 4486 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {} 4487 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4488 CodeGen::CodeGenModule &M) const; 4489}; 4490 4491} 4492 4493bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const { 4494 // MBlaze ABI requires all 8 and 16 bit quantities to be extended. 4495 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 4496 switch (BT->getKind()) { 4497 case BuiltinType::Bool: 4498 case BuiltinType::Char_S: 4499 case BuiltinType::Char_U: 4500 case BuiltinType::SChar: 4501 case BuiltinType::UChar: 4502 case BuiltinType::Short: 4503 case BuiltinType::UShort: 4504 return true; 4505 default: 4506 return false; 4507 } 4508 return false; 4509} 4510 4511llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4512 CodeGenFunction &CGF) const { 4513 // FIXME: Implement 4514 return 0; 4515} 4516 4517 4518ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const { 4519 if (RetTy->isVoidType()) 4520 return ABIArgInfo::getIgnore(); 4521 if (isAggregateTypeForABI(RetTy)) 4522 return ABIArgInfo::getIndirect(0); 4523 4524 return (isPromotableIntegerType(RetTy) ? 4525 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4526} 4527 4528ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const { 4529 if (isAggregateTypeForABI(Ty)) 4530 return ABIArgInfo::getIndirect(0); 4531 4532 return (isPromotableIntegerType(Ty) ? 4533 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4534} 4535 4536void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D, 4537 llvm::GlobalValue *GV, 4538 CodeGen::CodeGenModule &M) 4539 const { 4540 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4541 if (!FD) return; 4542 4543 llvm::CallingConv::ID CC = llvm::CallingConv::C; 4544 if (FD->hasAttr<MBlazeInterruptHandlerAttr>()) 4545 CC = llvm::CallingConv::MBLAZE_INTR; 4546 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>()) 4547 CC = llvm::CallingConv::MBLAZE_SVOL; 4548 4549 if (CC != llvm::CallingConv::C) { 4550 // Handle 'interrupt_handler' attribute: 4551 llvm::Function *F = cast<llvm::Function>(GV); 4552 4553 // Step 1: Set ISR calling convention. 4554 F->setCallingConv(CC); 4555 4556 // Step 2: Add attributes goodness. 4557 F->addFnAttr(llvm::Attribute::NoInline); 4558 } 4559 4560 // Step 3: Emit _interrupt_handler alias. 4561 if (CC == llvm::CallingConv::MBLAZE_INTR) 4562 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 4563 "_interrupt_handler", GV, &M.getModule()); 4564} 4565 4566 4567//===----------------------------------------------------------------------===// 4568// MSP430 ABI Implementation 4569//===----------------------------------------------------------------------===// 4570 4571namespace { 4572 4573class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 4574public: 4575 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 4576 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 4577 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4578 CodeGen::CodeGenModule &M) const; 4579}; 4580 4581} 4582 4583void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 4584 llvm::GlobalValue *GV, 4585 CodeGen::CodeGenModule &M) const { 4586 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 4587 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 4588 // Handle 'interrupt' attribute: 4589 llvm::Function *F = cast<llvm::Function>(GV); 4590 4591 // Step 1: Set ISR calling convention. 4592 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 4593 4594 // Step 2: Add attributes goodness. 4595 F->addFnAttr(llvm::Attribute::NoInline); 4596 4597 // Step 3: Emit ISR vector alias. 4598 unsigned Num = attr->getNumber() / 2; 4599 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 4600 "__isr_" + Twine(Num), 4601 GV, &M.getModule()); 4602 } 4603 } 4604} 4605 4606//===----------------------------------------------------------------------===// 4607// MIPS ABI Implementation. This works for both little-endian and 4608// big-endian variants. 4609//===----------------------------------------------------------------------===// 4610 4611namespace { 4612class MipsABIInfo : public ABIInfo { 4613 bool IsO32; 4614 unsigned MinABIStackAlignInBytes, StackAlignInBytes; 4615 void CoerceToIntArgs(uint64_t TySize, 4616 SmallVector<llvm::Type*, 8> &ArgList) const; 4617 llvm::Type* HandleAggregates(QualType Ty, uint64_t TySize) const; 4618 llvm::Type* returnAggregateInRegs(QualType RetTy, uint64_t Size) const; 4619 llvm::Type* getPaddingType(uint64_t Align, uint64_t Offset) const; 4620public: 4621 MipsABIInfo(CodeGenTypes &CGT, bool _IsO32) : 4622 ABIInfo(CGT), IsO32(_IsO32), MinABIStackAlignInBytes(IsO32 ? 4 : 8), 4623 StackAlignInBytes(IsO32 ? 8 : 16) {} 4624 4625 ABIArgInfo classifyReturnType(QualType RetTy) const; 4626 ABIArgInfo classifyArgumentType(QualType RetTy, uint64_t &Offset) const; 4627 virtual void computeInfo(CGFunctionInfo &FI) const; 4628 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4629 CodeGenFunction &CGF) const; 4630}; 4631 4632class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 4633 unsigned SizeOfUnwindException; 4634public: 4635 MIPSTargetCodeGenInfo(CodeGenTypes &CGT, bool IsO32) 4636 : TargetCodeGenInfo(new MipsABIInfo(CGT, IsO32)), 4637 SizeOfUnwindException(IsO32 ? 24 : 32) {} 4638 4639 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 4640 return 29; 4641 } 4642 4643 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4644 CodeGen::CodeGenModule &CGM) const { 4645 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4646 if (!FD) return; 4647 llvm::Function *Fn = cast<llvm::Function>(GV); 4648 if (FD->hasAttr<Mips16Attr>()) { 4649 Fn->addFnAttr("mips16"); 4650 } 4651 else if (FD->hasAttr<NoMips16Attr>()) { 4652 Fn->addFnAttr("nomips16"); 4653 } 4654 } 4655 4656 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 4657 llvm::Value *Address) const; 4658 4659 unsigned getSizeOfUnwindException() const { 4660 return SizeOfUnwindException; 4661 } 4662}; 4663} 4664 4665void MipsABIInfo::CoerceToIntArgs(uint64_t TySize, 4666 SmallVector<llvm::Type*, 8> &ArgList) const { 4667 llvm::IntegerType *IntTy = 4668 llvm::IntegerType::get(getVMContext(), MinABIStackAlignInBytes * 8); 4669 4670 // Add (TySize / MinABIStackAlignInBytes) args of IntTy. 4671 for (unsigned N = TySize / (MinABIStackAlignInBytes * 8); N; --N) 4672 ArgList.push_back(IntTy); 4673 4674 // If necessary, add one more integer type to ArgList. 4675 unsigned R = TySize % (MinABIStackAlignInBytes * 8); 4676 4677 if (R) 4678 ArgList.push_back(llvm::IntegerType::get(getVMContext(), R)); 4679} 4680 4681// In N32/64, an aligned double precision floating point field is passed in 4682// a register. 4683llvm::Type* MipsABIInfo::HandleAggregates(QualType Ty, uint64_t TySize) const { 4684 SmallVector<llvm::Type*, 8> ArgList, IntArgList; 4685 4686 if (IsO32) { 4687 CoerceToIntArgs(TySize, ArgList); 4688 return llvm::StructType::get(getVMContext(), ArgList); 4689 } 4690 4691 if (Ty->isComplexType()) 4692 return CGT.ConvertType(Ty); 4693 4694 const RecordType *RT = Ty->getAs<RecordType>(); 4695 4696 // Unions/vectors are passed in integer registers. 4697 if (!RT || !RT->isStructureOrClassType()) { 4698 CoerceToIntArgs(TySize, ArgList); 4699 return llvm::StructType::get(getVMContext(), ArgList); 4700 } 4701 4702 const RecordDecl *RD = RT->getDecl(); 4703 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 4704 assert(!(TySize % 8) && "Size of structure must be multiple of 8."); 4705 4706 uint64_t LastOffset = 0; 4707 unsigned idx = 0; 4708 llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64); 4709 4710 // Iterate over fields in the struct/class and check if there are any aligned 4711 // double fields. 4712 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 4713 i != e; ++i, ++idx) { 4714 const QualType Ty = i->getType(); 4715 const BuiltinType *BT = Ty->getAs<BuiltinType>(); 4716 4717 if (!BT || BT->getKind() != BuiltinType::Double) 4718 continue; 4719 4720 uint64_t Offset = Layout.getFieldOffset(idx); 4721 if (Offset % 64) // Ignore doubles that are not aligned. 4722 continue; 4723 4724 // Add ((Offset - LastOffset) / 64) args of type i64. 4725 for (unsigned j = (Offset - LastOffset) / 64; j > 0; --j) 4726 ArgList.push_back(I64); 4727 4728 // Add double type. 4729 ArgList.push_back(llvm::Type::getDoubleTy(getVMContext())); 4730 LastOffset = Offset + 64; 4731 } 4732 4733 CoerceToIntArgs(TySize - LastOffset, IntArgList); 4734 ArgList.append(IntArgList.begin(), IntArgList.end()); 4735 4736 return llvm::StructType::get(getVMContext(), ArgList); 4737} 4738 4739llvm::Type *MipsABIInfo::getPaddingType(uint64_t Align, uint64_t Offset) const { 4740 assert((Offset % MinABIStackAlignInBytes) == 0); 4741 4742 if ((Align - 1) & Offset) 4743 return llvm::IntegerType::get(getVMContext(), MinABIStackAlignInBytes * 8); 4744 4745 return 0; 4746} 4747 4748ABIArgInfo 4749MipsABIInfo::classifyArgumentType(QualType Ty, uint64_t &Offset) const { 4750 uint64_t OrigOffset = Offset; 4751 uint64_t TySize = getContext().getTypeSize(Ty); 4752 uint64_t Align = getContext().getTypeAlign(Ty) / 8; 4753 4754 Align = std::min(std::max(Align, (uint64_t)MinABIStackAlignInBytes), 4755 (uint64_t)StackAlignInBytes); 4756 Offset = llvm::RoundUpToAlignment(Offset, Align); 4757 Offset += llvm::RoundUpToAlignment(TySize, Align * 8) / 8; 4758 4759 if (isAggregateTypeForABI(Ty) || Ty->isVectorType()) { 4760 // Ignore empty aggregates. 4761 if (TySize == 0) 4762 return ABIArgInfo::getIgnore(); 4763 4764 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) { 4765 Offset = OrigOffset + MinABIStackAlignInBytes; 4766 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 4767 } 4768 4769 // If we have reached here, aggregates are passed directly by coercing to 4770 // another structure type. Padding is inserted if the offset of the 4771 // aggregate is unaligned. 4772 return ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0, 4773 getPaddingType(Align, OrigOffset)); 4774 } 4775 4776 // Treat an enum type as its underlying type. 4777 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 4778 Ty = EnumTy->getDecl()->getIntegerType(); 4779 4780 if (Ty->isPromotableIntegerType()) 4781 return ABIArgInfo::getExtend(); 4782 4783 return ABIArgInfo::getDirect(0, 0, 4784 IsO32 ? 0 : getPaddingType(Align, OrigOffset)); 4785} 4786 4787llvm::Type* 4788MipsABIInfo::returnAggregateInRegs(QualType RetTy, uint64_t Size) const { 4789 const RecordType *RT = RetTy->getAs<RecordType>(); 4790 SmallVector<llvm::Type*, 8> RTList; 4791 4792 if (RT && RT->isStructureOrClassType()) { 4793 const RecordDecl *RD = RT->getDecl(); 4794 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 4795 unsigned FieldCnt = Layout.getFieldCount(); 4796 4797 // N32/64 returns struct/classes in floating point registers if the 4798 // following conditions are met: 4799 // 1. The size of the struct/class is no larger than 128-bit. 4800 // 2. The struct/class has one or two fields all of which are floating 4801 // point types. 4802 // 3. The offset of the first field is zero (this follows what gcc does). 4803 // 4804 // Any other composite results are returned in integer registers. 4805 // 4806 if (FieldCnt && (FieldCnt <= 2) && !Layout.getFieldOffset(0)) { 4807 RecordDecl::field_iterator b = RD->field_begin(), e = RD->field_end(); 4808 for (; b != e; ++b) { 4809 const BuiltinType *BT = b->getType()->getAs<BuiltinType>(); 4810 4811 if (!BT || !BT->isFloatingPoint()) 4812 break; 4813 4814 RTList.push_back(CGT.ConvertType(b->getType())); 4815 } 4816 4817 if (b == e) 4818 return llvm::StructType::get(getVMContext(), RTList, 4819 RD->hasAttr<PackedAttr>()); 4820 4821 RTList.clear(); 4822 } 4823 } 4824 4825 CoerceToIntArgs(Size, RTList); 4826 return llvm::StructType::get(getVMContext(), RTList); 4827} 4828 4829ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const { 4830 uint64_t Size = getContext().getTypeSize(RetTy); 4831 4832 if (RetTy->isVoidType() || Size == 0) 4833 return ABIArgInfo::getIgnore(); 4834 4835 if (isAggregateTypeForABI(RetTy) || RetTy->isVectorType()) { 4836 if (isRecordReturnIndirect(RetTy, CGT)) 4837 return ABIArgInfo::getIndirect(0); 4838 4839 if (Size <= 128) { 4840 if (RetTy->isAnyComplexType()) 4841 return ABIArgInfo::getDirect(); 4842 4843 // O32 returns integer vectors in registers. 4844 if (IsO32 && RetTy->isVectorType() && !RetTy->hasFloatingRepresentation()) 4845 return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); 4846 4847 if (!IsO32) 4848 return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); 4849 } 4850 4851 return ABIArgInfo::getIndirect(0); 4852 } 4853 4854 // Treat an enum type as its underlying type. 4855 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 4856 RetTy = EnumTy->getDecl()->getIntegerType(); 4857 4858 return (RetTy->isPromotableIntegerType() ? 4859 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4860} 4861 4862void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const { 4863 ABIArgInfo &RetInfo = FI.getReturnInfo(); 4864 RetInfo = classifyReturnType(FI.getReturnType()); 4865 4866 // Check if a pointer to an aggregate is passed as a hidden argument. 4867 uint64_t Offset = RetInfo.isIndirect() ? MinABIStackAlignInBytes : 0; 4868 4869 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4870 it != ie; ++it) 4871 it->info = classifyArgumentType(it->type, Offset); 4872} 4873 4874llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4875 CodeGenFunction &CGF) const { 4876 llvm::Type *BP = CGF.Int8PtrTy; 4877 llvm::Type *BPP = CGF.Int8PtrPtrTy; 4878 4879 CGBuilderTy &Builder = CGF.Builder; 4880 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 4881 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 4882 int64_t TypeAlign = getContext().getTypeAlign(Ty) / 8; 4883 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 4884 llvm::Value *AddrTyped; 4885 unsigned PtrWidth = getTarget().getPointerWidth(0); 4886 llvm::IntegerType *IntTy = (PtrWidth == 32) ? CGF.Int32Ty : CGF.Int64Ty; 4887 4888 if (TypeAlign > MinABIStackAlignInBytes) { 4889 llvm::Value *AddrAsInt = CGF.Builder.CreatePtrToInt(Addr, IntTy); 4890 llvm::Value *Inc = llvm::ConstantInt::get(IntTy, TypeAlign - 1); 4891 llvm::Value *Mask = llvm::ConstantInt::get(IntTy, -TypeAlign); 4892 llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt, Inc); 4893 llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask); 4894 AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy); 4895 } 4896 else 4897 AddrTyped = Builder.CreateBitCast(Addr, PTy); 4898 4899 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP); 4900 TypeAlign = std::max((unsigned)TypeAlign, MinABIStackAlignInBytes); 4901 uint64_t Offset = 4902 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, TypeAlign); 4903 llvm::Value *NextAddr = 4904 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(IntTy, Offset), 4905 "ap.next"); 4906 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 4907 4908 return AddrTyped; 4909} 4910 4911bool 4912MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 4913 llvm::Value *Address) const { 4914 // This information comes from gcc's implementation, which seems to 4915 // as canonical as it gets. 4916 4917 // Everything on MIPS is 4 bytes. Double-precision FP registers 4918 // are aliased to pairs of single-precision FP registers. 4919 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 4920 4921 // 0-31 are the general purpose registers, $0 - $31. 4922 // 32-63 are the floating-point registers, $f0 - $f31. 4923 // 64 and 65 are the multiply/divide registers, $hi and $lo. 4924 // 66 is the (notional, I think) register for signal-handler return. 4925 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 65); 4926 4927 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 4928 // They are one bit wide and ignored here. 4929 4930 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 4931 // (coprocessor 1 is the FP unit) 4932 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 4933 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 4934 // 176-181 are the DSP accumulator registers. 4935 AssignToArrayRange(CGF.Builder, Address, Four8, 80, 181); 4936 return false; 4937} 4938 4939//===----------------------------------------------------------------------===// 4940// TCE ABI Implementation (see http://tce.cs.tut.fi). Uses mostly the defaults. 4941// Currently subclassed only to implement custom OpenCL C function attribute 4942// handling. 4943//===----------------------------------------------------------------------===// 4944 4945namespace { 4946 4947class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo { 4948public: 4949 TCETargetCodeGenInfo(CodeGenTypes &CGT) 4950 : DefaultTargetCodeGenInfo(CGT) {} 4951 4952 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4953 CodeGen::CodeGenModule &M) const; 4954}; 4955 4956void TCETargetCodeGenInfo::SetTargetAttributes(const Decl *D, 4957 llvm::GlobalValue *GV, 4958 CodeGen::CodeGenModule &M) const { 4959 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4960 if (!FD) return; 4961 4962 llvm::Function *F = cast<llvm::Function>(GV); 4963 4964 if (M.getLangOpts().OpenCL) { 4965 if (FD->hasAttr<OpenCLKernelAttr>()) { 4966 // OpenCL C Kernel functions are not subject to inlining 4967 F->addFnAttr(llvm::Attribute::NoInline); 4968 4969 if (FD->hasAttr<ReqdWorkGroupSizeAttr>()) { 4970 4971 // Convert the reqd_work_group_size() attributes to metadata. 4972 llvm::LLVMContext &Context = F->getContext(); 4973 llvm::NamedMDNode *OpenCLMetadata = 4974 M.getModule().getOrInsertNamedMetadata("opencl.kernel_wg_size_info"); 4975 4976 SmallVector<llvm::Value*, 5> Operands; 4977 Operands.push_back(F); 4978 4979 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 4980 llvm::APInt(32, 4981 FD->getAttr<ReqdWorkGroupSizeAttr>()->getXDim()))); 4982 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 4983 llvm::APInt(32, 4984 FD->getAttr<ReqdWorkGroupSizeAttr>()->getYDim()))); 4985 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 4986 llvm::APInt(32, 4987 FD->getAttr<ReqdWorkGroupSizeAttr>()->getZDim()))); 4988 4989 // Add a boolean constant operand for "required" (true) or "hint" (false) 4990 // for implementing the work_group_size_hint attr later. Currently 4991 // always true as the hint is not yet implemented. 4992 Operands.push_back(llvm::ConstantInt::getTrue(Context)); 4993 OpenCLMetadata->addOperand(llvm::MDNode::get(Context, Operands)); 4994 } 4995 } 4996 } 4997} 4998 4999} 5000 5001//===----------------------------------------------------------------------===// 5002// Hexagon ABI Implementation 5003//===----------------------------------------------------------------------===// 5004 5005namespace { 5006 5007class HexagonABIInfo : public ABIInfo { 5008 5009 5010public: 5011 HexagonABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 5012 5013private: 5014 5015 ABIArgInfo classifyReturnType(QualType RetTy) const; 5016 ABIArgInfo classifyArgumentType(QualType RetTy) const; 5017 5018 virtual void computeInfo(CGFunctionInfo &FI) const; 5019 5020 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5021 CodeGenFunction &CGF) const; 5022}; 5023 5024class HexagonTargetCodeGenInfo : public TargetCodeGenInfo { 5025public: 5026 HexagonTargetCodeGenInfo(CodeGenTypes &CGT) 5027 :TargetCodeGenInfo(new HexagonABIInfo(CGT)) {} 5028 5029 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 5030 return 29; 5031 } 5032}; 5033 5034} 5035 5036void HexagonABIInfo::computeInfo(CGFunctionInfo &FI) const { 5037 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 5038 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 5039 it != ie; ++it) 5040 it->info = classifyArgumentType(it->type); 5041} 5042 5043ABIArgInfo HexagonABIInfo::classifyArgumentType(QualType Ty) const { 5044 if (!isAggregateTypeForABI(Ty)) { 5045 // Treat an enum type as its underlying type. 5046 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 5047 Ty = EnumTy->getDecl()->getIntegerType(); 5048 5049 return (Ty->isPromotableIntegerType() ? 5050 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 5051 } 5052 5053 // Ignore empty records. 5054 if (isEmptyRecord(getContext(), Ty, true)) 5055 return ABIArgInfo::getIgnore(); 5056 5057 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) 5058 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 5059 5060 uint64_t Size = getContext().getTypeSize(Ty); 5061 if (Size > 64) 5062 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 5063 // Pass in the smallest viable integer type. 5064 else if (Size > 32) 5065 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 5066 else if (Size > 16) 5067 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 5068 else if (Size > 8) 5069 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 5070 else 5071 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 5072} 5073 5074ABIArgInfo HexagonABIInfo::classifyReturnType(QualType RetTy) const { 5075 if (RetTy->isVoidType()) 5076 return ABIArgInfo::getIgnore(); 5077 5078 // Large vector types should be returned via memory. 5079 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 64) 5080 return ABIArgInfo::getIndirect(0); 5081 5082 if (!isAggregateTypeForABI(RetTy)) { 5083 // Treat an enum type as its underlying type. 5084 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 5085 RetTy = EnumTy->getDecl()->getIntegerType(); 5086 5087 return (RetTy->isPromotableIntegerType() ? 5088 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 5089 } 5090 5091 // Structures with either a non-trivial destructor or a non-trivial 5092 // copy constructor are always indirect. 5093 if (isRecordReturnIndirect(RetTy, CGT)) 5094 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 5095 5096 if (isEmptyRecord(getContext(), RetTy, true)) 5097 return ABIArgInfo::getIgnore(); 5098 5099 // Aggregates <= 8 bytes are returned in r0; other aggregates 5100 // are returned indirectly. 5101 uint64_t Size = getContext().getTypeSize(RetTy); 5102 if (Size <= 64) { 5103 // Return in the smallest viable integer type. 5104 if (Size <= 8) 5105 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 5106 if (Size <= 16) 5107 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 5108 if (Size <= 32) 5109 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 5110 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 5111 } 5112 5113 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 5114} 5115 5116llvm::Value *HexagonABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5117 CodeGenFunction &CGF) const { 5118 // FIXME: Need to handle alignment 5119 llvm::Type *BPP = CGF.Int8PtrPtrTy; 5120 5121 CGBuilderTy &Builder = CGF.Builder; 5122 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 5123 "ap"); 5124 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 5125 llvm::Type *PTy = 5126 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 5127 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 5128 5129 uint64_t Offset = 5130 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 5131 llvm::Value *NextAddr = 5132 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 5133 "ap.next"); 5134 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 5135 5136 return AddrTyped; 5137} 5138 5139 5140//===----------------------------------------------------------------------===// 5141// SPARC v9 ABI Implementation. 5142// Based on the SPARC Compliance Definition version 2.4.1. 5143// 5144// Function arguments a mapped to a nominal "parameter array" and promoted to 5145// registers depending on their type. Each argument occupies 8 or 16 bytes in 5146// the array, structs larger than 16 bytes are passed indirectly. 5147// 5148// One case requires special care: 5149// 5150// struct mixed { 5151// int i; 5152// float f; 5153// }; 5154// 5155// When a struct mixed is passed by value, it only occupies 8 bytes in the 5156// parameter array, but the int is passed in an integer register, and the float 5157// is passed in a floating point register. This is represented as two arguments 5158// with the LLVM IR inreg attribute: 5159// 5160// declare void f(i32 inreg %i, float inreg %f) 5161// 5162// The code generator will only allocate 4 bytes from the parameter array for 5163// the inreg arguments. All other arguments are allocated a multiple of 8 5164// bytes. 5165// 5166namespace { 5167class SparcV9ABIInfo : public ABIInfo { 5168public: 5169 SparcV9ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 5170 5171private: 5172 ABIArgInfo classifyType(QualType RetTy, unsigned SizeLimit) const; 5173 virtual void computeInfo(CGFunctionInfo &FI) const; 5174 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5175 CodeGenFunction &CGF) const; 5176 5177 // Coercion type builder for structs passed in registers. The coercion type 5178 // serves two purposes: 5179 // 5180 // 1. Pad structs to a multiple of 64 bits, so they are passed 'left-aligned' 5181 // in registers. 5182 // 2. Expose aligned floating point elements as first-level elements, so the 5183 // code generator knows to pass them in floating point registers. 5184 // 5185 // We also compute the InReg flag which indicates that the struct contains 5186 // aligned 32-bit floats. 5187 // 5188 struct CoerceBuilder { 5189 llvm::LLVMContext &Context; 5190 const llvm::DataLayout &DL; 5191 SmallVector<llvm::Type*, 8> Elems; 5192 uint64_t Size; 5193 bool InReg; 5194 5195 CoerceBuilder(llvm::LLVMContext &c, const llvm::DataLayout &dl) 5196 : Context(c), DL(dl), Size(0), InReg(false) {} 5197 5198 // Pad Elems with integers until Size is ToSize. 5199 void pad(uint64_t ToSize) { 5200 assert(ToSize >= Size && "Cannot remove elements"); 5201 if (ToSize == Size) 5202 return; 5203 5204 // Finish the current 64-bit word. 5205 uint64_t Aligned = llvm::RoundUpToAlignment(Size, 64); 5206 if (Aligned > Size && Aligned <= ToSize) { 5207 Elems.push_back(llvm::IntegerType::get(Context, Aligned - Size)); 5208 Size = Aligned; 5209 } 5210 5211 // Add whole 64-bit words. 5212 while (Size + 64 <= ToSize) { 5213 Elems.push_back(llvm::Type::getInt64Ty(Context)); 5214 Size += 64; 5215 } 5216 5217 // Final in-word padding. 5218 if (Size < ToSize) { 5219 Elems.push_back(llvm::IntegerType::get(Context, ToSize - Size)); 5220 Size = ToSize; 5221 } 5222 } 5223 5224 // Add a floating point element at Offset. 5225 void addFloat(uint64_t Offset, llvm::Type *Ty, unsigned Bits) { 5226 // Unaligned floats are treated as integers. 5227 if (Offset % Bits) 5228 return; 5229 // The InReg flag is only required if there are any floats < 64 bits. 5230 if (Bits < 64) 5231 InReg = true; 5232 pad(Offset); 5233 Elems.push_back(Ty); 5234 Size = Offset + Bits; 5235 } 5236 5237 // Add a struct type to the coercion type, starting at Offset (in bits). 5238 void addStruct(uint64_t Offset, llvm::StructType *StrTy) { 5239 const llvm::StructLayout *Layout = DL.getStructLayout(StrTy); 5240 for (unsigned i = 0, e = StrTy->getNumElements(); i != e; ++i) { 5241 llvm::Type *ElemTy = StrTy->getElementType(i); 5242 uint64_t ElemOffset = Offset + Layout->getElementOffsetInBits(i); 5243 switch (ElemTy->getTypeID()) { 5244 case llvm::Type::StructTyID: 5245 addStruct(ElemOffset, cast<llvm::StructType>(ElemTy)); 5246 break; 5247 case llvm::Type::FloatTyID: 5248 addFloat(ElemOffset, ElemTy, 32); 5249 break; 5250 case llvm::Type::DoubleTyID: 5251 addFloat(ElemOffset, ElemTy, 64); 5252 break; 5253 case llvm::Type::FP128TyID: 5254 addFloat(ElemOffset, ElemTy, 128); 5255 break; 5256 case llvm::Type::PointerTyID: 5257 if (ElemOffset % 64 == 0) { 5258 pad(ElemOffset); 5259 Elems.push_back(ElemTy); 5260 Size += 64; 5261 } 5262 break; 5263 default: 5264 break; 5265 } 5266 } 5267 } 5268 5269 // Check if Ty is a usable substitute for the coercion type. 5270 bool isUsableType(llvm::StructType *Ty) const { 5271 if (Ty->getNumElements() != Elems.size()) 5272 return false; 5273 for (unsigned i = 0, e = Elems.size(); i != e; ++i) 5274 if (Elems[i] != Ty->getElementType(i)) 5275 return false; 5276 return true; 5277 } 5278 5279 // Get the coercion type as a literal struct type. 5280 llvm::Type *getType() const { 5281 if (Elems.size() == 1) 5282 return Elems.front(); 5283 else 5284 return llvm::StructType::get(Context, Elems); 5285 } 5286 }; 5287}; 5288} // end anonymous namespace 5289 5290ABIArgInfo 5291SparcV9ABIInfo::classifyType(QualType Ty, unsigned SizeLimit) const { 5292 if (Ty->isVoidType()) 5293 return ABIArgInfo::getIgnore(); 5294 5295 uint64_t Size = getContext().getTypeSize(Ty); 5296 5297 // Anything too big to fit in registers is passed with an explicit indirect 5298 // pointer / sret pointer. 5299 if (Size > SizeLimit) 5300 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 5301 5302 // Treat an enum type as its underlying type. 5303 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 5304 Ty = EnumTy->getDecl()->getIntegerType(); 5305 5306 // Integer types smaller than a register are extended. 5307 if (Size < 64 && Ty->isIntegerType()) 5308 return ABIArgInfo::getExtend(); 5309 5310 // Other non-aggregates go in registers. 5311 if (!isAggregateTypeForABI(Ty)) 5312 return ABIArgInfo::getDirect(); 5313 5314 // This is a small aggregate type that should be passed in registers. 5315 // Build a coercion type from the LLVM struct type. 5316 llvm::StructType *StrTy = dyn_cast<llvm::StructType>(CGT.ConvertType(Ty)); 5317 if (!StrTy) 5318 return ABIArgInfo::getDirect(); 5319 5320 CoerceBuilder CB(getVMContext(), getDataLayout()); 5321 CB.addStruct(0, StrTy); 5322 CB.pad(llvm::RoundUpToAlignment(CB.DL.getTypeSizeInBits(StrTy), 64)); 5323 5324 // Try to use the original type for coercion. 5325 llvm::Type *CoerceTy = CB.isUsableType(StrTy) ? StrTy : CB.getType(); 5326 5327 if (CB.InReg) 5328 return ABIArgInfo::getDirectInReg(CoerceTy); 5329 else 5330 return ABIArgInfo::getDirect(CoerceTy); 5331} 5332 5333llvm::Value *SparcV9ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5334 CodeGenFunction &CGF) const { 5335 // FIXME: Implement with va_arg. 5336 return 0; 5337} 5338 5339void SparcV9ABIInfo::computeInfo(CGFunctionInfo &FI) const { 5340 FI.getReturnInfo() = classifyType(FI.getReturnType(), 32 * 8); 5341 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 5342 it != ie; ++it) 5343 it->info = classifyType(it->type, 16 * 8); 5344} 5345 5346namespace { 5347class SparcV9TargetCodeGenInfo : public TargetCodeGenInfo { 5348public: 5349 SparcV9TargetCodeGenInfo(CodeGenTypes &CGT) 5350 : TargetCodeGenInfo(new SparcV9ABIInfo(CGT)) {} 5351}; 5352} // end anonymous namespace 5353 5354 5355const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 5356 if (TheTargetCodeGenInfo) 5357 return *TheTargetCodeGenInfo; 5358 5359 const llvm::Triple &Triple = getTarget().getTriple(); 5360 switch (Triple.getArch()) { 5361 default: 5362 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 5363 5364 case llvm::Triple::le32: 5365 return *(TheTargetCodeGenInfo = new PNaClTargetCodeGenInfo(Types)); 5366 case llvm::Triple::mips: 5367 case llvm::Triple::mipsel: 5368 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, true)); 5369 5370 case llvm::Triple::mips64: 5371 case llvm::Triple::mips64el: 5372 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, false)); 5373 5374 case llvm::Triple::aarch64: 5375 return *(TheTargetCodeGenInfo = new AArch64TargetCodeGenInfo(Types)); 5376 5377 case llvm::Triple::arm: 5378 case llvm::Triple::thumb: 5379 { 5380 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS; 5381 if (strcmp(getTarget().getABI(), "apcs-gnu") == 0) 5382 Kind = ARMABIInfo::APCS; 5383 else if (CodeGenOpts.FloatABI == "hard" || 5384 (CodeGenOpts.FloatABI != "soft" && 5385 Triple.getEnvironment() == llvm::Triple::GNUEABIHF)) 5386 Kind = ARMABIInfo::AAPCS_VFP; 5387 5388 switch (Triple.getOS()) { 5389 case llvm::Triple::NaCl: 5390 return *(TheTargetCodeGenInfo = 5391 new NaClARMTargetCodeGenInfo(Types, Kind)); 5392 default: 5393 return *(TheTargetCodeGenInfo = 5394 new ARMTargetCodeGenInfo(Types, Kind)); 5395 } 5396 } 5397 5398 case llvm::Triple::ppc: 5399 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 5400 case llvm::Triple::ppc64: 5401 if (Triple.isOSBinFormatELF()) 5402 return *(TheTargetCodeGenInfo = new PPC64_SVR4_TargetCodeGenInfo(Types)); 5403 else 5404 return *(TheTargetCodeGenInfo = new PPC64TargetCodeGenInfo(Types)); 5405 5406 case llvm::Triple::nvptx: 5407 case llvm::Triple::nvptx64: 5408 return *(TheTargetCodeGenInfo = new NVPTXTargetCodeGenInfo(Types)); 5409 5410 case llvm::Triple::mblaze: 5411 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types)); 5412 5413 case llvm::Triple::msp430: 5414 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 5415 5416 case llvm::Triple::systemz: 5417 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types)); 5418 5419 case llvm::Triple::tce: 5420 return *(TheTargetCodeGenInfo = new TCETargetCodeGenInfo(Types)); 5421 5422 case llvm::Triple::x86: { 5423 if (Triple.isOSDarwin()) 5424 return *(TheTargetCodeGenInfo = 5425 new X86_32TargetCodeGenInfo(Types, true, true, false, 5426 CodeGenOpts.NumRegisterParameters)); 5427 5428 switch (Triple.getOS()) { 5429 case llvm::Triple::Cygwin: 5430 case llvm::Triple::MinGW32: 5431 case llvm::Triple::AuroraUX: 5432 case llvm::Triple::DragonFly: 5433 case llvm::Triple::FreeBSD: 5434 case llvm::Triple::OpenBSD: 5435 case llvm::Triple::Bitrig: 5436 return *(TheTargetCodeGenInfo = 5437 new X86_32TargetCodeGenInfo(Types, false, true, false, 5438 CodeGenOpts.NumRegisterParameters)); 5439 5440 case llvm::Triple::Win32: 5441 return *(TheTargetCodeGenInfo = 5442 new WinX86_32TargetCodeGenInfo(Types, 5443 CodeGenOpts.NumRegisterParameters)); 5444 5445 default: 5446 return *(TheTargetCodeGenInfo = 5447 new X86_32TargetCodeGenInfo(Types, false, false, false, 5448 CodeGenOpts.NumRegisterParameters)); 5449 } 5450 } 5451 5452 case llvm::Triple::x86_64: { 5453 bool HasAVX = strcmp(getTarget().getABI(), "avx") == 0; 5454 5455 switch (Triple.getOS()) { 5456 case llvm::Triple::Win32: 5457 case llvm::Triple::MinGW32: 5458 case llvm::Triple::Cygwin: 5459 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 5460 case llvm::Triple::NaCl: 5461 return *(TheTargetCodeGenInfo = new NaClX86_64TargetCodeGenInfo(Types, 5462 HasAVX)); 5463 default: 5464 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types, 5465 HasAVX)); 5466 } 5467 } 5468 case llvm::Triple::hexagon: 5469 return *(TheTargetCodeGenInfo = new HexagonTargetCodeGenInfo(Types)); 5470 case llvm::Triple::sparcv9: 5471 return *(TheTargetCodeGenInfo = new SparcV9TargetCodeGenInfo(Types)); 5472 } 5473} 5474