TargetInfo.cpp revision de92d739ba0ef42a5a7dcfd6e170329549d0716b
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "clang/Frontend/CodeGenOptions.h" 20#include "llvm/Type.h" 21#include "llvm/Target/TargetData.h" 22#include "llvm/ADT/Triple.h" 23#include "llvm/Support/raw_ostream.h" 24using namespace clang; 25using namespace CodeGen; 26 27static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 28 llvm::Value *Array, 29 llvm::Value *Value, 30 unsigned FirstIndex, 31 unsigned LastIndex) { 32 // Alternatively, we could emit this as a loop in the source. 33 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 34 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 35 Builder.CreateStore(Value, Cell); 36 } 37} 38 39static bool isAggregateTypeForABI(QualType T) { 40 return CodeGenFunction::hasAggregateLLVMType(T) || 41 T->isMemberFunctionPointerType(); 42} 43 44ABIInfo::~ABIInfo() {} 45 46ASTContext &ABIInfo::getContext() const { 47 return CGT.getContext(); 48} 49 50llvm::LLVMContext &ABIInfo::getVMContext() const { 51 return CGT.getLLVMContext(); 52} 53 54const llvm::TargetData &ABIInfo::getTargetData() const { 55 return CGT.getTargetData(); 56} 57 58 59void ABIArgInfo::dump() const { 60 llvm::raw_ostream &OS = llvm::errs(); 61 OS << "(ABIArgInfo Kind="; 62 switch (TheKind) { 63 case Direct: 64 OS << "Direct Type="; 65 if (const llvm::Type *Ty = getCoerceToType()) 66 Ty->print(OS); 67 else 68 OS << "null"; 69 break; 70 case Extend: 71 OS << "Extend"; 72 break; 73 case Ignore: 74 OS << "Ignore"; 75 break; 76 case Indirect: 77 OS << "Indirect Align=" << getIndirectAlign() 78 << " Byal=" << getIndirectByVal() 79 << " Realign=" << getIndirectRealign(); 80 break; 81 case Expand: 82 OS << "Expand"; 83 break; 84 } 85 OS << ")\n"; 86} 87 88TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 89 90static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 91 92/// isEmptyField - Return true iff a the field is "empty", that is it 93/// is an unnamed bit-field or an (array of) empty record(s). 94static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 95 bool AllowArrays) { 96 if (FD->isUnnamedBitfield()) 97 return true; 98 99 QualType FT = FD->getType(); 100 101 // Constant arrays of empty records count as empty, strip them off. 102 if (AllowArrays) 103 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 104 FT = AT->getElementType(); 105 106 const RecordType *RT = FT->getAs<RecordType>(); 107 if (!RT) 108 return false; 109 110 // C++ record fields are never empty, at least in the Itanium ABI. 111 // 112 // FIXME: We should use a predicate for whether this behavior is true in the 113 // current ABI. 114 if (isa<CXXRecordDecl>(RT->getDecl())) 115 return false; 116 117 return isEmptyRecord(Context, FT, AllowArrays); 118} 119 120/// isEmptyRecord - Return true iff a structure contains only empty 121/// fields. Note that a structure with a flexible array member is not 122/// considered empty. 123static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 124 const RecordType *RT = T->getAs<RecordType>(); 125 if (!RT) 126 return 0; 127 const RecordDecl *RD = RT->getDecl(); 128 if (RD->hasFlexibleArrayMember()) 129 return false; 130 131 // If this is a C++ record, check the bases first. 132 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 133 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 134 e = CXXRD->bases_end(); i != e; ++i) 135 if (!isEmptyRecord(Context, i->getType(), true)) 136 return false; 137 138 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 139 i != e; ++i) 140 if (!isEmptyField(Context, *i, AllowArrays)) 141 return false; 142 return true; 143} 144 145/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 146/// a non-trivial destructor or a non-trivial copy constructor. 147static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 148 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 149 if (!RD) 150 return false; 151 152 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 153} 154 155/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 156/// a record type with either a non-trivial destructor or a non-trivial copy 157/// constructor. 158static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 159 const RecordType *RT = T->getAs<RecordType>(); 160 if (!RT) 161 return false; 162 163 return hasNonTrivialDestructorOrCopyConstructor(RT); 164} 165 166/// isSingleElementStruct - Determine if a structure is a "single 167/// element struct", i.e. it has exactly one non-empty field or 168/// exactly one field which is itself a single element 169/// struct. Structures with flexible array members are never 170/// considered single element structs. 171/// 172/// \return The field declaration for the single non-empty field, if 173/// it exists. 174static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 175 const RecordType *RT = T->getAsStructureType(); 176 if (!RT) 177 return 0; 178 179 const RecordDecl *RD = RT->getDecl(); 180 if (RD->hasFlexibleArrayMember()) 181 return 0; 182 183 const Type *Found = 0; 184 185 // If this is a C++ record, check the bases first. 186 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 187 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 188 e = CXXRD->bases_end(); i != e; ++i) { 189 // Ignore empty records. 190 if (isEmptyRecord(Context, i->getType(), true)) 191 continue; 192 193 // If we already found an element then this isn't a single-element struct. 194 if (Found) 195 return 0; 196 197 // If this is non-empty and not a single element struct, the composite 198 // cannot be a single element struct. 199 Found = isSingleElementStruct(i->getType(), Context); 200 if (!Found) 201 return 0; 202 } 203 } 204 205 // Check for single element. 206 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 207 i != e; ++i) { 208 const FieldDecl *FD = *i; 209 QualType FT = FD->getType(); 210 211 // Ignore empty fields. 212 if (isEmptyField(Context, FD, true)) 213 continue; 214 215 // If we already found an element then this isn't a single-element 216 // struct. 217 if (Found) 218 return 0; 219 220 // Treat single element arrays as the element. 221 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 222 if (AT->getSize().getZExtValue() != 1) 223 break; 224 FT = AT->getElementType(); 225 } 226 227 if (!isAggregateTypeForABI(FT)) { 228 Found = FT.getTypePtr(); 229 } else { 230 Found = isSingleElementStruct(FT, Context); 231 if (!Found) 232 return 0; 233 } 234 } 235 236 return Found; 237} 238 239static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 240 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 241 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 242 !Ty->isBlockPointerType()) 243 return false; 244 245 uint64_t Size = Context.getTypeSize(Ty); 246 return Size == 32 || Size == 64; 247} 248 249/// canExpandIndirectArgument - Test whether an argument type which is to be 250/// passed indirectly (on the stack) would have the equivalent layout if it was 251/// expanded into separate arguments. If so, we prefer to do the latter to avoid 252/// inhibiting optimizations. 253/// 254// FIXME: This predicate is missing many cases, currently it just follows 255// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 256// should probably make this smarter, or better yet make the LLVM backend 257// capable of handling it. 258static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 259 // We can only expand structure types. 260 const RecordType *RT = Ty->getAs<RecordType>(); 261 if (!RT) 262 return false; 263 264 // We can only expand (C) structures. 265 // 266 // FIXME: This needs to be generalized to handle classes as well. 267 const RecordDecl *RD = RT->getDecl(); 268 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 269 return false; 270 271 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 272 i != e; ++i) { 273 const FieldDecl *FD = *i; 274 275 if (!is32Or64BitBasicType(FD->getType(), Context)) 276 return false; 277 278 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 279 // how to expand them yet, and the predicate for telling if a bitfield still 280 // counts as "basic" is more complicated than what we were doing previously. 281 if (FD->isBitField()) 282 return false; 283 } 284 285 return true; 286} 287 288namespace { 289/// DefaultABIInfo - The default implementation for ABI specific 290/// details. This implementation provides information which results in 291/// self-consistent and sensible LLVM IR generation, but does not 292/// conform to any particular ABI. 293class DefaultABIInfo : public ABIInfo { 294public: 295 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 296 297 ABIArgInfo classifyReturnType(QualType RetTy) const; 298 ABIArgInfo classifyArgumentType(QualType RetTy) const; 299 300 virtual void computeInfo(CGFunctionInfo &FI) const { 301 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 302 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 303 it != ie; ++it) 304 it->info = classifyArgumentType(it->type); 305 } 306 307 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 308 CodeGenFunction &CGF) const; 309}; 310 311class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 312public: 313 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 314 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 315}; 316 317llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 318 CodeGenFunction &CGF) const { 319 return 0; 320} 321 322ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 323 if (isAggregateTypeForABI(Ty)) 324 return ABIArgInfo::getIndirect(0); 325 326 // Treat an enum type as its underlying type. 327 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 328 Ty = EnumTy->getDecl()->getIntegerType(); 329 330 return (Ty->isPromotableIntegerType() ? 331 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 332} 333 334ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 335 if (RetTy->isVoidType()) 336 return ABIArgInfo::getIgnore(); 337 338 if (isAggregateTypeForABI(RetTy)) 339 return ABIArgInfo::getIndirect(0); 340 341 // Treat an enum type as its underlying type. 342 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 343 RetTy = EnumTy->getDecl()->getIntegerType(); 344 345 return (RetTy->isPromotableIntegerType() ? 346 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 347} 348 349/// UseX86_MMXType - Return true if this is an MMX type that should use the special 350/// x86_mmx type. 351bool UseX86_MMXType(const llvm::Type *IRType) { 352 // If the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>, use the 353 // special x86_mmx type. 354 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && 355 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && 356 IRType->getScalarSizeInBits() != 64; 357} 358 359static const llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 360 llvm::StringRef Constraint, 361 const llvm::Type* Ty) { 362 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) 363 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext()); 364 return Ty; 365} 366 367//===----------------------------------------------------------------------===// 368// X86-32 ABI Implementation 369//===----------------------------------------------------------------------===// 370 371/// X86_32ABIInfo - The X86-32 ABI information. 372class X86_32ABIInfo : public ABIInfo { 373 static const unsigned MinABIStackAlignInBytes = 4; 374 375 bool IsDarwinVectorABI; 376 bool IsSmallStructInRegABI; 377 378 static bool isRegisterSize(unsigned Size) { 379 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 380 } 381 382 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 383 384 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 385 /// such that the argument will be passed in memory. 386 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const; 387 388 /// \brief Return the alignment to use for the given type on the stack. 389 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const; 390 391public: 392 393 ABIArgInfo classifyReturnType(QualType RetTy) const; 394 ABIArgInfo classifyArgumentType(QualType RetTy) const; 395 396 virtual void computeInfo(CGFunctionInfo &FI) const { 397 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 398 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 399 it != ie; ++it) 400 it->info = classifyArgumentType(it->type); 401 } 402 403 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 404 CodeGenFunction &CGF) const; 405 406 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p) 407 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p) {} 408}; 409 410class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 411public: 412 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p) 413 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p)) {} 414 415 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 416 CodeGen::CodeGenModule &CGM) const; 417 418 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 419 // Darwin uses different dwarf register numbers for EH. 420 if (CGM.isTargetDarwin()) return 5; 421 422 return 4; 423 } 424 425 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 426 llvm::Value *Address) const; 427 428 const llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 429 llvm::StringRef Constraint, 430 const llvm::Type* Ty) const { 431 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 432 } 433 434}; 435 436} 437 438/// shouldReturnTypeInRegister - Determine if the given type should be 439/// passed in a register (for the Darwin ABI). 440bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 441 ASTContext &Context) { 442 uint64_t Size = Context.getTypeSize(Ty); 443 444 // Type must be register sized. 445 if (!isRegisterSize(Size)) 446 return false; 447 448 if (Ty->isVectorType()) { 449 // 64- and 128- bit vectors inside structures are not returned in 450 // registers. 451 if (Size == 64 || Size == 128) 452 return false; 453 454 return true; 455 } 456 457 // If this is a builtin, pointer, enum, complex type, member pointer, or 458 // member function pointer it is ok. 459 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 460 Ty->isAnyComplexType() || Ty->isEnumeralType() || 461 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 462 return true; 463 464 // Arrays are treated like records. 465 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 466 return shouldReturnTypeInRegister(AT->getElementType(), Context); 467 468 // Otherwise, it must be a record type. 469 const RecordType *RT = Ty->getAs<RecordType>(); 470 if (!RT) return false; 471 472 // FIXME: Traverse bases here too. 473 474 // Structure types are passed in register if all fields would be 475 // passed in a register. 476 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 477 e = RT->getDecl()->field_end(); i != e; ++i) { 478 const FieldDecl *FD = *i; 479 480 // Empty fields are ignored. 481 if (isEmptyField(Context, FD, true)) 482 continue; 483 484 // Check fields recursively. 485 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 486 return false; 487 } 488 489 return true; 490} 491 492ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy) const { 493 if (RetTy->isVoidType()) 494 return ABIArgInfo::getIgnore(); 495 496 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 497 // On Darwin, some vectors are returned in registers. 498 if (IsDarwinVectorABI) { 499 uint64_t Size = getContext().getTypeSize(RetTy); 500 501 // 128-bit vectors are a special case; they are returned in 502 // registers and we need to make sure to pick a type the LLVM 503 // backend will like. 504 if (Size == 128) 505 return ABIArgInfo::getDirect(llvm::VectorType::get( 506 llvm::Type::getInt64Ty(getVMContext()), 2)); 507 508 // Always return in register if it fits in a general purpose 509 // register, or if it is 64 bits and has a single element. 510 if ((Size == 8 || Size == 16 || Size == 32) || 511 (Size == 64 && VT->getNumElements() == 1)) 512 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 513 Size)); 514 515 return ABIArgInfo::getIndirect(0); 516 } 517 518 return ABIArgInfo::getDirect(); 519 } 520 521 if (isAggregateTypeForABI(RetTy)) { 522 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 523 // Structures with either a non-trivial destructor or a non-trivial 524 // copy constructor are always indirect. 525 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 526 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 527 528 // Structures with flexible arrays are always indirect. 529 if (RT->getDecl()->hasFlexibleArrayMember()) 530 return ABIArgInfo::getIndirect(0); 531 } 532 533 // If specified, structs and unions are always indirect. 534 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 535 return ABIArgInfo::getIndirect(0); 536 537 // Classify "single element" structs as their element type. 538 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) { 539 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 540 if (BT->isIntegerType()) { 541 // We need to use the size of the structure, padding 542 // bit-fields can adjust that to be larger than the single 543 // element type. 544 uint64_t Size = getContext().getTypeSize(RetTy); 545 return ABIArgInfo::getDirect( 546 llvm::IntegerType::get(getVMContext(), (unsigned)Size)); 547 } 548 549 if (BT->getKind() == BuiltinType::Float) { 550 assert(getContext().getTypeSize(RetTy) == 551 getContext().getTypeSize(SeltTy) && 552 "Unexpect single element structure size!"); 553 return ABIArgInfo::getDirect(llvm::Type::getFloatTy(getVMContext())); 554 } 555 556 if (BT->getKind() == BuiltinType::Double) { 557 assert(getContext().getTypeSize(RetTy) == 558 getContext().getTypeSize(SeltTy) && 559 "Unexpect single element structure size!"); 560 return ABIArgInfo::getDirect(llvm::Type::getDoubleTy(getVMContext())); 561 } 562 } else if (SeltTy->isPointerType()) { 563 // FIXME: It would be really nice if this could come out as the proper 564 // pointer type. 565 const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(getVMContext()); 566 return ABIArgInfo::getDirect(PtrTy); 567 } else if (SeltTy->isVectorType()) { 568 // 64- and 128-bit vectors are never returned in a 569 // register when inside a structure. 570 uint64_t Size = getContext().getTypeSize(RetTy); 571 if (Size == 64 || Size == 128) 572 return ABIArgInfo::getIndirect(0); 573 574 return classifyReturnType(QualType(SeltTy, 0)); 575 } 576 } 577 578 // Small structures which are register sized are generally returned 579 // in a register. 580 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext())) { 581 uint64_t Size = getContext().getTypeSize(RetTy); 582 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 583 } 584 585 return ABIArgInfo::getIndirect(0); 586 } 587 588 // Treat an enum type as its underlying type. 589 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 590 RetTy = EnumTy->getDecl()->getIntegerType(); 591 592 return (RetTy->isPromotableIntegerType() ? 593 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 594} 595 596static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) { 597 const RecordType *RT = Ty->getAs<RecordType>(); 598 if (!RT) 599 return 0; 600 const RecordDecl *RD = RT->getDecl(); 601 602 // If this is a C++ record, check the bases first. 603 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 604 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 605 e = CXXRD->bases_end(); i != e; ++i) 606 if (!isRecordWithSSEVectorType(Context, i->getType())) 607 return false; 608 609 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 610 i != e; ++i) { 611 QualType FT = i->getType(); 612 613 if (FT->getAs<VectorType>() && Context.getTypeSize(Ty) == 128) 614 return true; 615 616 if (isRecordWithSSEVectorType(Context, FT)) 617 return true; 618 } 619 620 return false; 621} 622 623unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty, 624 unsigned Align) const { 625 // Otherwise, if the alignment is less than or equal to the minimum ABI 626 // alignment, just use the default; the backend will handle this. 627 if (Align <= MinABIStackAlignInBytes) 628 return 0; // Use default alignment. 629 630 // On non-Darwin, the stack type alignment is always 4. 631 if (!IsDarwinVectorABI) { 632 // Set explicit alignment, since we may need to realign the top. 633 return MinABIStackAlignInBytes; 634 } 635 636 // Otherwise, if the type contains an SSE vector type, the alignment is 16. 637 if (isRecordWithSSEVectorType(getContext(), Ty)) 638 return 16; 639 640 return MinABIStackAlignInBytes; 641} 642 643ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const { 644 if (!ByVal) 645 return ABIArgInfo::getIndirect(0, false); 646 647 // Compute the byval alignment. 648 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 649 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign); 650 if (StackAlign == 0) 651 return ABIArgInfo::getIndirect(4); 652 653 // If the stack alignment is less than the type alignment, realign the 654 // argument. 655 if (StackAlign < TypeAlign) 656 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, 657 /*Realign=*/true); 658 659 return ABIArgInfo::getIndirect(StackAlign); 660} 661 662ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const { 663 // FIXME: Set alignment on indirect arguments. 664 if (isAggregateTypeForABI(Ty)) { 665 // Structures with flexible arrays are always indirect. 666 if (const RecordType *RT = Ty->getAs<RecordType>()) { 667 // Structures with either a non-trivial destructor or a non-trivial 668 // copy constructor are always indirect. 669 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 670 return getIndirectResult(Ty, /*ByVal=*/false); 671 672 if (RT->getDecl()->hasFlexibleArrayMember()) 673 return getIndirectResult(Ty); 674 } 675 676 // Ignore empty structs. 677 if (Ty->isStructureType() && getContext().getTypeSize(Ty) == 0) 678 return ABIArgInfo::getIgnore(); 679 680 // Expand small (<= 128-bit) record types when we know that the stack layout 681 // of those arguments will match the struct. This is important because the 682 // LLVM backend isn't smart enough to remove byval, which inhibits many 683 // optimizations. 684 if (getContext().getTypeSize(Ty) <= 4*32 && 685 canExpandIndirectArgument(Ty, getContext())) 686 return ABIArgInfo::getExpand(); 687 688 return getIndirectResult(Ty); 689 } 690 691 if (const VectorType *VT = Ty->getAs<VectorType>()) { 692 // On Darwin, some vectors are passed in memory, we handle this by passing 693 // it as an i8/i16/i32/i64. 694 if (IsDarwinVectorABI) { 695 uint64_t Size = getContext().getTypeSize(Ty); 696 if ((Size == 8 || Size == 16 || Size == 32) || 697 (Size == 64 && VT->getNumElements() == 1)) 698 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 699 Size)); 700 } 701 702 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty); 703 if (UseX86_MMXType(IRType)) { 704 ABIArgInfo AAI = ABIArgInfo::getDirect(IRType); 705 AAI.setCoerceToType(llvm::Type::getX86_MMXTy(getVMContext())); 706 return AAI; 707 } 708 709 return ABIArgInfo::getDirect(); 710 } 711 712 713 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 714 Ty = EnumTy->getDecl()->getIntegerType(); 715 716 return (Ty->isPromotableIntegerType() ? 717 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 718} 719 720llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 721 CodeGenFunction &CGF) const { 722 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 723 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 724 725 CGBuilderTy &Builder = CGF.Builder; 726 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 727 "ap"); 728 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 729 llvm::Type *PTy = 730 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 731 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 732 733 uint64_t Offset = 734 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 735 llvm::Value *NextAddr = 736 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 737 "ap.next"); 738 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 739 740 return AddrTyped; 741} 742 743void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 744 llvm::GlobalValue *GV, 745 CodeGen::CodeGenModule &CGM) const { 746 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 747 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 748 // Get the LLVM function. 749 llvm::Function *Fn = cast<llvm::Function>(GV); 750 751 // Now add the 'alignstack' attribute with a value of 16. 752 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 753 } 754 } 755} 756 757bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 758 CodeGen::CodeGenFunction &CGF, 759 llvm::Value *Address) const { 760 CodeGen::CGBuilderTy &Builder = CGF.Builder; 761 llvm::LLVMContext &Context = CGF.getLLVMContext(); 762 763 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 764 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 765 766 // 0-7 are the eight integer registers; the order is different 767 // on Darwin (for EH), but the range is the same. 768 // 8 is %eip. 769 AssignToArrayRange(Builder, Address, Four8, 0, 8); 770 771 if (CGF.CGM.isTargetDarwin()) { 772 // 12-16 are st(0..4). Not sure why we stop at 4. 773 // These have size 16, which is sizeof(long double) on 774 // platforms with 8-byte alignment for that type. 775 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 776 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 777 778 } else { 779 // 9 is %eflags, which doesn't get a size on Darwin for some 780 // reason. 781 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 782 783 // 11-16 are st(0..5). Not sure why we stop at 5. 784 // These have size 12, which is sizeof(long double) on 785 // platforms with 4-byte alignment for that type. 786 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 787 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 788 } 789 790 return false; 791} 792 793//===----------------------------------------------------------------------===// 794// X86-64 ABI Implementation 795//===----------------------------------------------------------------------===// 796 797 798namespace { 799/// X86_64ABIInfo - The X86_64 ABI information. 800class X86_64ABIInfo : public ABIInfo { 801 enum Class { 802 Integer = 0, 803 SSE, 804 SSEUp, 805 X87, 806 X87Up, 807 ComplexX87, 808 NoClass, 809 Memory 810 }; 811 812 /// merge - Implement the X86_64 ABI merging algorithm. 813 /// 814 /// Merge an accumulating classification \arg Accum with a field 815 /// classification \arg Field. 816 /// 817 /// \param Accum - The accumulating classification. This should 818 /// always be either NoClass or the result of a previous merge 819 /// call. In addition, this should never be Memory (the caller 820 /// should just return Memory for the aggregate). 821 static Class merge(Class Accum, Class Field); 822 823 /// classify - Determine the x86_64 register classes in which the 824 /// given type T should be passed. 825 /// 826 /// \param Lo - The classification for the parts of the type 827 /// residing in the low word of the containing object. 828 /// 829 /// \param Hi - The classification for the parts of the type 830 /// residing in the high word of the containing object. 831 /// 832 /// \param OffsetBase - The bit offset of this type in the 833 /// containing object. Some parameters are classified different 834 /// depending on whether they straddle an eightbyte boundary. 835 /// 836 /// If a word is unused its result will be NoClass; if a type should 837 /// be passed in Memory then at least the classification of \arg Lo 838 /// will be Memory. 839 /// 840 /// The \arg Lo class will be NoClass iff the argument is ignored. 841 /// 842 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 843 /// also be ComplexX87. 844 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 845 846 const llvm::Type *Get16ByteVectorType(QualType Ty) const; 847 const llvm::Type *GetSSETypeAtOffset(const llvm::Type *IRType, 848 unsigned IROffset, QualType SourceTy, 849 unsigned SourceOffset) const; 850 const llvm::Type *GetINTEGERTypeAtOffset(const llvm::Type *IRType, 851 unsigned IROffset, QualType SourceTy, 852 unsigned SourceOffset) const; 853 854 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 855 /// such that the argument will be returned in memory. 856 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 857 858 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 859 /// such that the argument will be passed in memory. 860 ABIArgInfo getIndirectResult(QualType Ty) const; 861 862 ABIArgInfo classifyReturnType(QualType RetTy) const; 863 864 ABIArgInfo classifyArgumentType(QualType Ty, 865 unsigned &neededInt, 866 unsigned &neededSSE) const; 867 868 /// The 0.98 ABI revision clarified a lot of ambiguities, 869 /// unfortunately in ways that were not always consistent with 870 /// certain previous compilers. In particular, platforms which 871 /// required strict binary compatibility with older versions of GCC 872 /// may need to exempt themselves. 873 bool honorsRevision0_98() const { 874 return !getContext().Target.getTriple().isOSDarwin(); 875 } 876 877public: 878 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 879 880 virtual void computeInfo(CGFunctionInfo &FI) const; 881 882 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 883 CodeGenFunction &CGF) const; 884}; 885 886/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 887class WinX86_64ABIInfo : public ABIInfo { 888 889 ABIArgInfo classify(QualType Ty) const; 890 891public: 892 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 893 894 virtual void computeInfo(CGFunctionInfo &FI) const; 895 896 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 897 CodeGenFunction &CGF) const; 898}; 899 900class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 901public: 902 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 903 : TargetCodeGenInfo(new X86_64ABIInfo(CGT)) {} 904 905 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 906 return 7; 907 } 908 909 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 910 llvm::Value *Address) const { 911 CodeGen::CGBuilderTy &Builder = CGF.Builder; 912 llvm::LLVMContext &Context = CGF.getLLVMContext(); 913 914 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 915 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 916 917 // 0-15 are the 16 integer registers. 918 // 16 is %rip. 919 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 920 921 return false; 922 } 923 924 const llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 925 llvm::StringRef Constraint, 926 const llvm::Type* Ty) const { 927 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 928 } 929 930}; 931 932class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 933public: 934 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 935 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {} 936 937 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 938 return 7; 939 } 940 941 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 942 llvm::Value *Address) const { 943 CodeGen::CGBuilderTy &Builder = CGF.Builder; 944 llvm::LLVMContext &Context = CGF.getLLVMContext(); 945 946 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 947 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 948 949 // 0-15 are the 16 integer registers. 950 // 16 is %rip. 951 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 952 953 return false; 954 } 955}; 956 957} 958 959X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 960 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 961 // classified recursively so that always two fields are 962 // considered. The resulting class is calculated according to 963 // the classes of the fields in the eightbyte: 964 // 965 // (a) If both classes are equal, this is the resulting class. 966 // 967 // (b) If one of the classes is NO_CLASS, the resulting class is 968 // the other class. 969 // 970 // (c) If one of the classes is MEMORY, the result is the MEMORY 971 // class. 972 // 973 // (d) If one of the classes is INTEGER, the result is the 974 // INTEGER. 975 // 976 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 977 // MEMORY is used as class. 978 // 979 // (f) Otherwise class SSE is used. 980 981 // Accum should never be memory (we should have returned) or 982 // ComplexX87 (because this cannot be passed in a structure). 983 assert((Accum != Memory && Accum != ComplexX87) && 984 "Invalid accumulated classification during merge."); 985 if (Accum == Field || Field == NoClass) 986 return Accum; 987 if (Field == Memory) 988 return Memory; 989 if (Accum == NoClass) 990 return Field; 991 if (Accum == Integer || Field == Integer) 992 return Integer; 993 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 994 Accum == X87 || Accum == X87Up) 995 return Memory; 996 return SSE; 997} 998 999void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 1000 Class &Lo, Class &Hi) const { 1001 // FIXME: This code can be simplified by introducing a simple value class for 1002 // Class pairs with appropriate constructor methods for the various 1003 // situations. 1004 1005 // FIXME: Some of the split computations are wrong; unaligned vectors 1006 // shouldn't be passed in registers for example, so there is no chance they 1007 // can straddle an eightbyte. Verify & simplify. 1008 1009 Lo = Hi = NoClass; 1010 1011 Class &Current = OffsetBase < 64 ? Lo : Hi; 1012 Current = Memory; 1013 1014 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 1015 BuiltinType::Kind k = BT->getKind(); 1016 1017 if (k == BuiltinType::Void) { 1018 Current = NoClass; 1019 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 1020 Lo = Integer; 1021 Hi = Integer; 1022 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 1023 Current = Integer; 1024 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 1025 Current = SSE; 1026 } else if (k == BuiltinType::LongDouble) { 1027 Lo = X87; 1028 Hi = X87Up; 1029 } 1030 // FIXME: _Decimal32 and _Decimal64 are SSE. 1031 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 1032 return; 1033 } 1034 1035 if (const EnumType *ET = Ty->getAs<EnumType>()) { 1036 // Classify the underlying integer type. 1037 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 1038 return; 1039 } 1040 1041 if (Ty->hasPointerRepresentation()) { 1042 Current = Integer; 1043 return; 1044 } 1045 1046 if (Ty->isMemberPointerType()) { 1047 if (Ty->isMemberFunctionPointerType()) 1048 Lo = Hi = Integer; 1049 else 1050 Current = Integer; 1051 return; 1052 } 1053 1054 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1055 uint64_t Size = getContext().getTypeSize(VT); 1056 if (Size == 32) { 1057 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1058 // float> as integer. 1059 Current = Integer; 1060 1061 // If this type crosses an eightbyte boundary, it should be 1062 // split. 1063 uint64_t EB_Real = (OffsetBase) / 64; 1064 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 1065 if (EB_Real != EB_Imag) 1066 Hi = Lo; 1067 } else if (Size == 64) { 1068 // gcc passes <1 x double> in memory. :( 1069 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 1070 return; 1071 1072 // gcc passes <1 x long long> as INTEGER. 1073 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 1074 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 1075 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 1076 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 1077 Current = Integer; 1078 else 1079 Current = SSE; 1080 1081 // If this type crosses an eightbyte boundary, it should be 1082 // split. 1083 if (OffsetBase && OffsetBase != 64) 1084 Hi = Lo; 1085 } else if (Size == 128) { 1086 Lo = SSE; 1087 Hi = SSEUp; 1088 } 1089 return; 1090 } 1091 1092 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 1093 QualType ET = getContext().getCanonicalType(CT->getElementType()); 1094 1095 uint64_t Size = getContext().getTypeSize(Ty); 1096 if (ET->isIntegralOrEnumerationType()) { 1097 if (Size <= 64) 1098 Current = Integer; 1099 else if (Size <= 128) 1100 Lo = Hi = Integer; 1101 } else if (ET == getContext().FloatTy) 1102 Current = SSE; 1103 else if (ET == getContext().DoubleTy) 1104 Lo = Hi = SSE; 1105 else if (ET == getContext().LongDoubleTy) 1106 Current = ComplexX87; 1107 1108 // If this complex type crosses an eightbyte boundary then it 1109 // should be split. 1110 uint64_t EB_Real = (OffsetBase) / 64; 1111 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 1112 if (Hi == NoClass && EB_Real != EB_Imag) 1113 Hi = Lo; 1114 1115 return; 1116 } 1117 1118 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 1119 // Arrays are treated like structures. 1120 1121 uint64_t Size = getContext().getTypeSize(Ty); 1122 1123 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1124 // than two eightbytes, ..., it has class MEMORY. 1125 if (Size > 128) 1126 return; 1127 1128 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1129 // fields, it has class MEMORY. 1130 // 1131 // Only need to check alignment of array base. 1132 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1133 return; 1134 1135 // Otherwise implement simplified merge. We could be smarter about 1136 // this, but it isn't worth it and would be harder to verify. 1137 Current = NoClass; 1138 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1139 uint64_t ArraySize = AT->getSize().getZExtValue(); 1140 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1141 Class FieldLo, FieldHi; 1142 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 1143 Lo = merge(Lo, FieldLo); 1144 Hi = merge(Hi, FieldHi); 1145 if (Lo == Memory || Hi == Memory) 1146 break; 1147 } 1148 1149 // Do post merger cleanup (see below). Only case we worry about is Memory. 1150 if (Hi == Memory) 1151 Lo = Memory; 1152 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 1153 return; 1154 } 1155 1156 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1157 uint64_t Size = getContext().getTypeSize(Ty); 1158 1159 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1160 // than two eightbytes, ..., it has class MEMORY. 1161 if (Size > 128) 1162 return; 1163 1164 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1165 // copy constructor or a non-trivial destructor, it is passed by invisible 1166 // reference. 1167 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 1168 return; 1169 1170 const RecordDecl *RD = RT->getDecl(); 1171 1172 // Assume variable sized types are passed in memory. 1173 if (RD->hasFlexibleArrayMember()) 1174 return; 1175 1176 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1177 1178 // Reset Lo class, this will be recomputed. 1179 Current = NoClass; 1180 1181 // If this is a C++ record, classify the bases first. 1182 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1183 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1184 e = CXXRD->bases_end(); i != e; ++i) { 1185 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1186 "Unexpected base class!"); 1187 const CXXRecordDecl *Base = 1188 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1189 1190 // Classify this field. 1191 // 1192 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1193 // single eightbyte, each is classified separately. Each eightbyte gets 1194 // initialized to class NO_CLASS. 1195 Class FieldLo, FieldHi; 1196 uint64_t Offset = OffsetBase + Layout.getBaseClassOffsetInBits(Base); 1197 classify(i->getType(), Offset, FieldLo, FieldHi); 1198 Lo = merge(Lo, FieldLo); 1199 Hi = merge(Hi, FieldHi); 1200 if (Lo == Memory || Hi == Memory) 1201 break; 1202 } 1203 } 1204 1205 // Classify the fields one at a time, merging the results. 1206 unsigned idx = 0; 1207 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1208 i != e; ++i, ++idx) { 1209 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1210 bool BitField = i->isBitField(); 1211 1212 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1213 // fields, it has class MEMORY. 1214 // 1215 // Note, skip this test for bit-fields, see below. 1216 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1217 Lo = Memory; 1218 return; 1219 } 1220 1221 // Classify this field. 1222 // 1223 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1224 // exceeds a single eightbyte, each is classified 1225 // separately. Each eightbyte gets initialized to class 1226 // NO_CLASS. 1227 Class FieldLo, FieldHi; 1228 1229 // Bit-fields require special handling, they do not force the 1230 // structure to be passed in memory even if unaligned, and 1231 // therefore they can straddle an eightbyte. 1232 if (BitField) { 1233 // Ignore padding bit-fields. 1234 if (i->isUnnamedBitfield()) 1235 continue; 1236 1237 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1238 uint64_t Size = 1239 i->getBitWidth()->EvaluateAsInt(getContext()).getZExtValue(); 1240 1241 uint64_t EB_Lo = Offset / 64; 1242 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1243 FieldLo = FieldHi = NoClass; 1244 if (EB_Lo) { 1245 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1246 FieldLo = NoClass; 1247 FieldHi = Integer; 1248 } else { 1249 FieldLo = Integer; 1250 FieldHi = EB_Hi ? Integer : NoClass; 1251 } 1252 } else 1253 classify(i->getType(), Offset, FieldLo, FieldHi); 1254 Lo = merge(Lo, FieldLo); 1255 Hi = merge(Hi, FieldHi); 1256 if (Lo == Memory || Hi == Memory) 1257 break; 1258 } 1259 1260 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1261 // 1262 // (a) If one of the classes is MEMORY, the whole argument is 1263 // passed in memory. 1264 // 1265 // (b) If X87UP is not preceded by X87, the whole argument is 1266 // passed in memory. 1267 // 1268 // (c) If the size of the aggregate exceeds two eightbytes and the first 1269 // eight-byte isn’t SSE or any other eightbyte isn’t SSEUP, the whole 1270 // argument is passed in memory. 1271 // 1272 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE. 1273 // 1274 // Some of these are enforced by the merging logic. Others can arise 1275 // only with unions; for example: 1276 // union { _Complex double; unsigned; } 1277 // 1278 // Note that clauses (b) and (c) were added in 0.98. 1279 if (Hi == Memory) 1280 Lo = Memory; 1281 if (Hi == X87Up && Lo != X87 && honorsRevision0_98()) 1282 Lo = Memory; 1283 if (Hi == SSEUp && Lo != SSE) 1284 Hi = SSE; 1285 } 1286} 1287 1288ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1289 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1290 // place naturally. 1291 if (!isAggregateTypeForABI(Ty)) { 1292 // Treat an enum type as its underlying type. 1293 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1294 Ty = EnumTy->getDecl()->getIntegerType(); 1295 1296 return (Ty->isPromotableIntegerType() ? 1297 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1298 } 1299 1300 return ABIArgInfo::getIndirect(0); 1301} 1302 1303ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const { 1304 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1305 // place naturally. 1306 if (!isAggregateTypeForABI(Ty)) { 1307 // Treat an enum type as its underlying type. 1308 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1309 Ty = EnumTy->getDecl()->getIntegerType(); 1310 1311 return (Ty->isPromotableIntegerType() ? 1312 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1313 } 1314 1315 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1316 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1317 1318 // Compute the byval alignment. We specify the alignment of the byval in all 1319 // cases so that the mid-level optimizer knows the alignment of the byval. 1320 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U); 1321 return ABIArgInfo::getIndirect(Align); 1322} 1323 1324/// Get16ByteVectorType - The ABI specifies that a value should be passed in an 1325/// full vector XMM register. Pick an LLVM IR type that will be passed as a 1326/// vector register. 1327const llvm::Type *X86_64ABIInfo::Get16ByteVectorType(QualType Ty) const { 1328 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty); 1329 1330 // Wrapper structs that just contain vectors are passed just like vectors, 1331 // strip them off if present. 1332 const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1333 while (STy && STy->getNumElements() == 1) { 1334 IRType = STy->getElementType(0); 1335 STy = dyn_cast<llvm::StructType>(IRType); 1336 } 1337 1338 // If the preferred type is a 16-byte vector, prefer to pass it. 1339 if (const llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1340 const llvm::Type *EltTy = VT->getElementType(); 1341 if (VT->getBitWidth() == 128 && 1342 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1343 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1344 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1345 EltTy->isIntegerTy(128))) 1346 return VT; 1347 } 1348 1349 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1350} 1351 1352/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1353/// is known to either be off the end of the specified type or being in 1354/// alignment padding. The user type specified is known to be at most 128 bits 1355/// in size, and have passed through X86_64ABIInfo::classify with a successful 1356/// classification that put one of the two halves in the INTEGER class. 1357/// 1358/// It is conservatively correct to return false. 1359static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1360 unsigned EndBit, ASTContext &Context) { 1361 // If the bytes being queried are off the end of the type, there is no user 1362 // data hiding here. This handles analysis of builtins, vectors and other 1363 // types that don't contain interesting padding. 1364 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1365 if (TySize <= StartBit) 1366 return true; 1367 1368 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1369 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1370 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1371 1372 // Check each element to see if the element overlaps with the queried range. 1373 for (unsigned i = 0; i != NumElts; ++i) { 1374 // If the element is after the span we care about, then we're done.. 1375 unsigned EltOffset = i*EltSize; 1376 if (EltOffset >= EndBit) break; 1377 1378 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1379 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1380 EndBit-EltOffset, Context)) 1381 return false; 1382 } 1383 // If it overlaps no elements, then it is safe to process as padding. 1384 return true; 1385 } 1386 1387 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1388 const RecordDecl *RD = RT->getDecl(); 1389 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1390 1391 // If this is a C++ record, check the bases first. 1392 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1393 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1394 e = CXXRD->bases_end(); i != e; ++i) { 1395 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1396 "Unexpected base class!"); 1397 const CXXRecordDecl *Base = 1398 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1399 1400 // If the base is after the span we care about, ignore it. 1401 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffsetInBits(Base); 1402 if (BaseOffset >= EndBit) continue; 1403 1404 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1405 if (!BitsContainNoUserData(i->getType(), BaseStart, 1406 EndBit-BaseOffset, Context)) 1407 return false; 1408 } 1409 } 1410 1411 // Verify that no field has data that overlaps the region of interest. Yes 1412 // this could be sped up a lot by being smarter about queried fields, 1413 // however we're only looking at structs up to 16 bytes, so we don't care 1414 // much. 1415 unsigned idx = 0; 1416 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1417 i != e; ++i, ++idx) { 1418 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1419 1420 // If we found a field after the region we care about, then we're done. 1421 if (FieldOffset >= EndBit) break; 1422 1423 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1424 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1425 Context)) 1426 return false; 1427 } 1428 1429 // If nothing in this record overlapped the area of interest, then we're 1430 // clean. 1431 return true; 1432 } 1433 1434 return false; 1435} 1436 1437/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1438/// float member at the specified offset. For example, {int,{float}} has a 1439/// float at offset 4. It is conservatively correct for this routine to return 1440/// false. 1441static bool ContainsFloatAtOffset(const llvm::Type *IRType, unsigned IROffset, 1442 const llvm::TargetData &TD) { 1443 // Base case if we find a float. 1444 if (IROffset == 0 && IRType->isFloatTy()) 1445 return true; 1446 1447 // If this is a struct, recurse into the field at the specified offset. 1448 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1449 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1450 unsigned Elt = SL->getElementContainingOffset(IROffset); 1451 IROffset -= SL->getElementOffset(Elt); 1452 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1453 } 1454 1455 // If this is an array, recurse into the field at the specified offset. 1456 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1457 const llvm::Type *EltTy = ATy->getElementType(); 1458 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1459 IROffset -= IROffset/EltSize*EltSize; 1460 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1461 } 1462 1463 return false; 1464} 1465 1466 1467/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1468/// low 8 bytes of an XMM register, corresponding to the SSE class. 1469const llvm::Type *X86_64ABIInfo:: 1470GetSSETypeAtOffset(const llvm::Type *IRType, unsigned IROffset, 1471 QualType SourceTy, unsigned SourceOffset) const { 1472 // The only three choices we have are either double, <2 x float>, or float. We 1473 // pass as float if the last 4 bytes is just padding. This happens for 1474 // structs that contain 3 floats. 1475 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1476 SourceOffset*8+64, getContext())) 1477 return llvm::Type::getFloatTy(getVMContext()); 1478 1479 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1480 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1481 // case. 1482 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) && 1483 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData())) 1484 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1485 1486 return llvm::Type::getDoubleTy(getVMContext()); 1487} 1488 1489 1490/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1491/// an 8-byte GPR. This means that we either have a scalar or we are talking 1492/// about the high or low part of an up-to-16-byte struct. This routine picks 1493/// the best LLVM IR type to represent this, which may be i64 or may be anything 1494/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1495/// etc). 1496/// 1497/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1498/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1499/// the 8-byte value references. PrefType may be null. 1500/// 1501/// SourceTy is the source level type for the entire argument. SourceOffset is 1502/// an offset into this that we're processing (which is always either 0 or 8). 1503/// 1504const llvm::Type *X86_64ABIInfo:: 1505GetINTEGERTypeAtOffset(const llvm::Type *IRType, unsigned IROffset, 1506 QualType SourceTy, unsigned SourceOffset) const { 1507 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1508 // returning an 8-byte unit starting with it. See if we can safely use it. 1509 if (IROffset == 0) { 1510 // Pointers and int64's always fill the 8-byte unit. 1511 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64)) 1512 return IRType; 1513 1514 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1515 // goodness in the source type is just tail padding. This is allowed to 1516 // kick in for struct {double,int} on the int, but not on 1517 // struct{double,int,int} because we wouldn't return the second int. We 1518 // have to do this analysis on the source type because we can't depend on 1519 // unions being lowered a specific way etc. 1520 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1521 IRType->isIntegerTy(32)) { 1522 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth(); 1523 1524 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1525 SourceOffset*8+64, getContext())) 1526 return IRType; 1527 } 1528 } 1529 1530 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1531 // If this is a struct, recurse into the field at the specified offset. 1532 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy); 1533 if (IROffset < SL->getSizeInBytes()) { 1534 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1535 IROffset -= SL->getElementOffset(FieldIdx); 1536 1537 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1538 SourceTy, SourceOffset); 1539 } 1540 } 1541 1542 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1543 const llvm::Type *EltTy = ATy->getElementType(); 1544 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy); 1545 unsigned EltOffset = IROffset/EltSize*EltSize; 1546 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1547 SourceOffset); 1548 } 1549 1550 // Okay, we don't have any better idea of what to pass, so we pass this in an 1551 // integer register that isn't too big to fit the rest of the struct. 1552 unsigned TySizeInBytes = 1553 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 1554 1555 assert(TySizeInBytes != SourceOffset && "Empty field?"); 1556 1557 // It is always safe to classify this as an integer type up to i64 that 1558 // isn't larger than the structure. 1559 return llvm::IntegerType::get(getVMContext(), 1560 std::min(TySizeInBytes-SourceOffset, 8U)*8); 1561} 1562 1563 1564/// GetX86_64ByValArgumentPair - Given a high and low type that can ideally 1565/// be used as elements of a two register pair to pass or return, return a 1566/// first class aggregate to represent them. For example, if the low part of 1567/// a by-value argument should be passed as i32* and the high part as float, 1568/// return {i32*, float}. 1569static const llvm::Type * 1570GetX86_64ByValArgumentPair(const llvm::Type *Lo, const llvm::Type *Hi, 1571 const llvm::TargetData &TD) { 1572 // In order to correctly satisfy the ABI, we need to the high part to start 1573 // at offset 8. If the high and low parts we inferred are both 4-byte types 1574 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have 1575 // the second element at offset 8. Check for this: 1576 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo); 1577 unsigned HiAlign = TD.getABITypeAlignment(Hi); 1578 unsigned HiStart = llvm::TargetData::RoundUpAlignment(LoSize, HiAlign); 1579 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!"); 1580 1581 // To handle this, we have to increase the size of the low part so that the 1582 // second element will start at an 8 byte offset. We can't increase the size 1583 // of the second element because it might make us access off the end of the 1584 // struct. 1585 if (HiStart != 8) { 1586 // There are only two sorts of types the ABI generation code can produce for 1587 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32. 1588 // Promote these to a larger type. 1589 if (Lo->isFloatTy()) 1590 Lo = llvm::Type::getDoubleTy(Lo->getContext()); 1591 else { 1592 assert(Lo->isIntegerTy() && "Invalid/unknown lo type"); 1593 Lo = llvm::Type::getInt64Ty(Lo->getContext()); 1594 } 1595 } 1596 1597 const llvm::StructType *Result = 1598 llvm::StructType::get(Lo->getContext(), Lo, Hi, NULL); 1599 1600 1601 // Verify that the second element is at an 8-byte offset. 1602 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 && 1603 "Invalid x86-64 argument pair!"); 1604 return Result; 1605} 1606 1607ABIArgInfo X86_64ABIInfo:: 1608classifyReturnType(QualType RetTy) const { 1609 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1610 // classification algorithm. 1611 X86_64ABIInfo::Class Lo, Hi; 1612 classify(RetTy, 0, Lo, Hi); 1613 1614 // Check some invariants. 1615 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1616 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1617 1618 const llvm::Type *ResType = 0; 1619 switch (Lo) { 1620 case NoClass: 1621 if (Hi == NoClass) 1622 return ABIArgInfo::getIgnore(); 1623 // If the low part is just padding, it takes no register, leave ResType 1624 // null. 1625 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1626 "Unknown missing lo part"); 1627 break; 1628 1629 case SSEUp: 1630 case X87Up: 1631 assert(0 && "Invalid classification for lo word."); 1632 1633 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1634 // hidden argument. 1635 case Memory: 1636 return getIndirectReturnResult(RetTy); 1637 1638 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1639 // available register of the sequence %rax, %rdx is used. 1640 case Integer: 1641 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, 1642 RetTy, 0); 1643 1644 // If we have a sign or zero extended integer, make sure to return Extend 1645 // so that the parameter gets the right LLVM IR attributes. 1646 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1647 // Treat an enum type as its underlying type. 1648 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1649 RetTy = EnumTy->getDecl()->getIntegerType(); 1650 1651 if (RetTy->isIntegralOrEnumerationType() && 1652 RetTy->isPromotableIntegerType()) 1653 return ABIArgInfo::getExtend(); 1654 } 1655 break; 1656 1657 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1658 // available SSE register of the sequence %xmm0, %xmm1 is used. 1659 case SSE: 1660 ResType = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, RetTy, 0); 1661 break; 1662 1663 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1664 // returned on the X87 stack in %st0 as 80-bit x87 number. 1665 case X87: 1666 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 1667 break; 1668 1669 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1670 // part of the value is returned in %st0 and the imaginary part in 1671 // %st1. 1672 case ComplexX87: 1673 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1674 ResType = llvm::StructType::get(getVMContext(), 1675 llvm::Type::getX86_FP80Ty(getVMContext()), 1676 llvm::Type::getX86_FP80Ty(getVMContext()), 1677 NULL); 1678 break; 1679 } 1680 1681 const llvm::Type *HighPart = 0; 1682 switch (Hi) { 1683 // Memory was handled previously and X87 should 1684 // never occur as a hi class. 1685 case Memory: 1686 case X87: 1687 assert(0 && "Invalid classification for hi word."); 1688 1689 case ComplexX87: // Previously handled. 1690 case NoClass: 1691 break; 1692 1693 case Integer: 1694 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 1695 8, RetTy, 8); 1696 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1697 return ABIArgInfo::getDirect(HighPart, 8); 1698 break; 1699 case SSE: 1700 HighPart = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8, RetTy, 8); 1701 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1702 return ABIArgInfo::getDirect(HighPart, 8); 1703 break; 1704 1705 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1706 // is passed in the upper half of the last used SSE register. 1707 // 1708 // SSEUP should always be preceded by SSE, just widen. 1709 case SSEUp: 1710 assert(Lo == SSE && "Unexpected SSEUp classification."); 1711 ResType = Get16ByteVectorType(RetTy); 1712 break; 1713 1714 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1715 // returned together with the previous X87 value in %st0. 1716 case X87Up: 1717 // If X87Up is preceded by X87, we don't need to do 1718 // anything. However, in some cases with unions it may not be 1719 // preceded by X87. In such situations we follow gcc and pass the 1720 // extra bits in an SSE reg. 1721 if (Lo != X87) { 1722 HighPart = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 1723 8, RetTy, 8); 1724 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1725 return ABIArgInfo::getDirect(HighPart, 8); 1726 } 1727 break; 1728 } 1729 1730 // If a high part was specified, merge it together with the low part. It is 1731 // known to pass in the high eightbyte of the result. We do this by forming a 1732 // first class struct aggregate with the high and low part: {low, high} 1733 if (HighPart) 1734 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1735 1736 return ABIArgInfo::getDirect(ResType); 1737} 1738 1739ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt, 1740 unsigned &neededSSE) const { 1741 X86_64ABIInfo::Class Lo, Hi; 1742 classify(Ty, 0, Lo, Hi); 1743 1744 // Check some invariants. 1745 // FIXME: Enforce these by construction. 1746 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1747 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1748 1749 neededInt = 0; 1750 neededSSE = 0; 1751 const llvm::Type *ResType = 0; 1752 switch (Lo) { 1753 case NoClass: 1754 if (Hi == NoClass) 1755 return ABIArgInfo::getIgnore(); 1756 // If the low part is just padding, it takes no register, leave ResType 1757 // null. 1758 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1759 "Unknown missing lo part"); 1760 break; 1761 1762 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1763 // on the stack. 1764 case Memory: 1765 1766 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1767 // COMPLEX_X87, it is passed in memory. 1768 case X87: 1769 case ComplexX87: 1770 return getIndirectResult(Ty); 1771 1772 case SSEUp: 1773 case X87Up: 1774 assert(0 && "Invalid classification for lo word."); 1775 1776 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1777 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1778 // and %r9 is used. 1779 case Integer: 1780 ++neededInt; 1781 1782 // Pick an 8-byte type based on the preferred type. 1783 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 0, Ty, 0); 1784 1785 // If we have a sign or zero extended integer, make sure to return Extend 1786 // so that the parameter gets the right LLVM IR attributes. 1787 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1788 // Treat an enum type as its underlying type. 1789 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1790 Ty = EnumTy->getDecl()->getIntegerType(); 1791 1792 if (Ty->isIntegralOrEnumerationType() && 1793 Ty->isPromotableIntegerType()) 1794 return ABIArgInfo::getExtend(); 1795 } 1796 1797 break; 1798 1799 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1800 // available SSE register is used, the registers are taken in the 1801 // order from %xmm0 to %xmm7. 1802 case SSE: { 1803 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty); 1804 if (Hi != NoClass || !UseX86_MMXType(IRType)) 1805 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0); 1806 else 1807 // This is an MMX type. Treat it as such. 1808 ResType = llvm::Type::getX86_MMXTy(getVMContext()); 1809 1810 ++neededSSE; 1811 break; 1812 } 1813 } 1814 1815 const llvm::Type *HighPart = 0; 1816 switch (Hi) { 1817 // Memory was handled previously, ComplexX87 and X87 should 1818 // never occur as hi classes, and X87Up must be preceded by X87, 1819 // which is passed in memory. 1820 case Memory: 1821 case X87: 1822 case ComplexX87: 1823 assert(0 && "Invalid classification for hi word."); 1824 break; 1825 1826 case NoClass: break; 1827 1828 case Integer: 1829 ++neededInt; 1830 // Pick an 8-byte type based on the preferred type. 1831 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8); 1832 1833 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1834 return ABIArgInfo::getDirect(HighPart, 8); 1835 break; 1836 1837 // X87Up generally doesn't occur here (long double is passed in 1838 // memory), except in situations involving unions. 1839 case X87Up: 1840 case SSE: 1841 HighPart = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8); 1842 1843 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1844 return ABIArgInfo::getDirect(HighPart, 8); 1845 1846 ++neededSSE; 1847 break; 1848 1849 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1850 // eightbyte is passed in the upper half of the last used SSE 1851 // register. This only happens when 128-bit vectors are passed. 1852 case SSEUp: 1853 assert(Lo == SSE && "Unexpected SSEUp classification"); 1854 ResType = Get16ByteVectorType(Ty); 1855 break; 1856 } 1857 1858 // If a high part was specified, merge it together with the low part. It is 1859 // known to pass in the high eightbyte of the result. We do this by forming a 1860 // first class struct aggregate with the high and low part: {low, high} 1861 if (HighPart) 1862 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1863 1864 return ABIArgInfo::getDirect(ResType); 1865} 1866 1867void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 1868 1869 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1870 1871 // Keep track of the number of assigned registers. 1872 unsigned freeIntRegs = 6, freeSSERegs = 8; 1873 1874 // If the return value is indirect, then the hidden argument is consuming one 1875 // integer register. 1876 if (FI.getReturnInfo().isIndirect()) 1877 --freeIntRegs; 1878 1879 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1880 // get assigned (in left-to-right order) for passing as follows... 1881 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1882 it != ie; ++it) { 1883 unsigned neededInt, neededSSE; 1884 it->info = classifyArgumentType(it->type, neededInt, neededSSE); 1885 1886 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1887 // eightbyte of an argument, the whole argument is passed on the 1888 // stack. If registers have already been assigned for some 1889 // eightbytes of such an argument, the assignments get reverted. 1890 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1891 freeIntRegs -= neededInt; 1892 freeSSERegs -= neededSSE; 1893 } else { 1894 it->info = getIndirectResult(it->type); 1895 } 1896 } 1897} 1898 1899static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1900 QualType Ty, 1901 CodeGenFunction &CGF) { 1902 llvm::Value *overflow_arg_area_p = 1903 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1904 llvm::Value *overflow_arg_area = 1905 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1906 1907 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1908 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1909 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1910 if (Align > 8) { 1911 // Note that we follow the ABI & gcc here, even though the type 1912 // could in theory have an alignment greater than 16. This case 1913 // shouldn't ever matter in practice. 1914 1915 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1916 llvm::Value *Offset = 1917 llvm::ConstantInt::get(CGF.Int32Ty, 15); 1918 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1919 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1920 CGF.Int64Ty); 1921 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~15LL); 1922 overflow_arg_area = 1923 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1924 overflow_arg_area->getType(), 1925 "overflow_arg_area.align"); 1926 } 1927 1928 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1929 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1930 llvm::Value *Res = 1931 CGF.Builder.CreateBitCast(overflow_arg_area, 1932 llvm::PointerType::getUnqual(LTy)); 1933 1934 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1935 // l->overflow_arg_area + sizeof(type). 1936 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1937 // an 8 byte boundary. 1938 1939 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1940 llvm::Value *Offset = 1941 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 1942 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1943 "overflow_arg_area.next"); 1944 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 1945 1946 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 1947 return Res; 1948} 1949 1950llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1951 CodeGenFunction &CGF) const { 1952 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 1953 1954 // Assume that va_list type is correct; should be pointer to LLVM type: 1955 // struct { 1956 // i32 gp_offset; 1957 // i32 fp_offset; 1958 // i8* overflow_arg_area; 1959 // i8* reg_save_area; 1960 // }; 1961 unsigned neededInt, neededSSE; 1962 1963 Ty = CGF.getContext().getCanonicalType(Ty); 1964 ABIArgInfo AI = classifyArgumentType(Ty, neededInt, neededSSE); 1965 1966 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 1967 // in the registers. If not go to step 7. 1968 if (!neededInt && !neededSSE) 1969 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1970 1971 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 1972 // general purpose registers needed to pass type and num_fp to hold 1973 // the number of floating point registers needed. 1974 1975 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 1976 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 1977 // l->fp_offset > 304 - num_fp * 16 go to step 7. 1978 // 1979 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 1980 // register save space). 1981 1982 llvm::Value *InRegs = 0; 1983 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 1984 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 1985 if (neededInt) { 1986 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 1987 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 1988 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 1989 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 1990 } 1991 1992 if (neededSSE) { 1993 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 1994 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 1995 llvm::Value *FitsInFP = 1996 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 1997 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 1998 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 1999 } 2000 2001 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 2002 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 2003 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 2004 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 2005 2006 // Emit code to load the value if it was passed in registers. 2007 2008 CGF.EmitBlock(InRegBlock); 2009 2010 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 2011 // an offset of l->gp_offset and/or l->fp_offset. This may require 2012 // copying to a temporary location in case the parameter is passed 2013 // in different register classes or requires an alignment greater 2014 // than 8 for general purpose registers and 16 for XMM registers. 2015 // 2016 // FIXME: This really results in shameful code when we end up needing to 2017 // collect arguments from different places; often what should result in a 2018 // simple assembling of a structure from scattered addresses has many more 2019 // loads than necessary. Can we clean this up? 2020 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2021 llvm::Value *RegAddr = 2022 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 2023 "reg_save_area"); 2024 if (neededInt && neededSSE) { 2025 // FIXME: Cleanup. 2026 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 2027 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 2028 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 2029 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 2030 const llvm::Type *TyLo = ST->getElementType(0); 2031 const llvm::Type *TyHi = ST->getElementType(1); 2032 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 2033 "Unexpected ABI info for mixed regs"); 2034 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 2035 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 2036 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2037 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2038 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 2039 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 2040 llvm::Value *V = 2041 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 2042 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2043 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 2044 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2045 2046 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2047 llvm::PointerType::getUnqual(LTy)); 2048 } else if (neededInt) { 2049 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2050 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2051 llvm::PointerType::getUnqual(LTy)); 2052 } else if (neededSSE == 1) { 2053 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2054 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2055 llvm::PointerType::getUnqual(LTy)); 2056 } else { 2057 assert(neededSSE == 2 && "Invalid number of needed registers!"); 2058 // SSE registers are spaced 16 bytes apart in the register save 2059 // area, we need to collect the two eightbytes together. 2060 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2061 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 2062 const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 2063 const llvm::Type *DblPtrTy = 2064 llvm::PointerType::getUnqual(DoubleTy); 2065 const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy, 2066 DoubleTy, NULL); 2067 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 2068 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 2069 DblPtrTy)); 2070 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2071 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 2072 DblPtrTy)); 2073 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2074 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2075 llvm::PointerType::getUnqual(LTy)); 2076 } 2077 2078 // AMD64-ABI 3.5.7p5: Step 5. Set: 2079 // l->gp_offset = l->gp_offset + num_gp * 8 2080 // l->fp_offset = l->fp_offset + num_fp * 16. 2081 if (neededInt) { 2082 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 2083 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 2084 gp_offset_p); 2085 } 2086 if (neededSSE) { 2087 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 2088 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 2089 fp_offset_p); 2090 } 2091 CGF.EmitBranch(ContBlock); 2092 2093 // Emit code to load the value if it was passed in memory. 2094 2095 CGF.EmitBlock(InMemBlock); 2096 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2097 2098 // Return the appropriate result. 2099 2100 CGF.EmitBlock(ContBlock); 2101 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2, 2102 "vaarg.addr"); 2103 ResAddr->addIncoming(RegAddr, InRegBlock); 2104 ResAddr->addIncoming(MemAddr, InMemBlock); 2105 return ResAddr; 2106} 2107 2108ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty) const { 2109 2110 if (Ty->isVoidType()) 2111 return ABIArgInfo::getIgnore(); 2112 2113 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2114 Ty = EnumTy->getDecl()->getIntegerType(); 2115 2116 uint64_t Size = getContext().getTypeSize(Ty); 2117 2118 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2119 if (hasNonTrivialDestructorOrCopyConstructor(RT) || 2120 RT->getDecl()->hasFlexibleArrayMember()) 2121 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2122 2123 // FIXME: mingw-w64-gcc emits 128-bit struct as i128 2124 if (Size == 128 && 2125 getContext().Target.getTriple().getOS() == llvm::Triple::MinGW32) 2126 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2127 Size)); 2128 2129 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is 2130 // not 1, 2, 4, or 8 bytes, must be passed by reference." 2131 if (Size <= 64 && 2132 (Size & (Size - 1)) == 0) 2133 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2134 Size)); 2135 2136 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2137 } 2138 2139 if (Ty->isPromotableIntegerType()) 2140 return ABIArgInfo::getExtend(); 2141 2142 return ABIArgInfo::getDirect(); 2143} 2144 2145void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2146 2147 QualType RetTy = FI.getReturnType(); 2148 FI.getReturnInfo() = classify(RetTy); 2149 2150 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2151 it != ie; ++it) 2152 it->info = classify(it->type); 2153} 2154 2155llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2156 CodeGenFunction &CGF) const { 2157 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2158 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2159 2160 CGBuilderTy &Builder = CGF.Builder; 2161 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2162 "ap"); 2163 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2164 llvm::Type *PTy = 2165 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2166 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2167 2168 uint64_t Offset = 2169 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 2170 llvm::Value *NextAddr = 2171 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2172 "ap.next"); 2173 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2174 2175 return AddrTyped; 2176} 2177 2178// PowerPC-32 2179 2180namespace { 2181class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2182public: 2183 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2184 2185 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2186 // This is recovered from gcc output. 2187 return 1; // r1 is the dedicated stack pointer 2188 } 2189 2190 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2191 llvm::Value *Address) const; 2192}; 2193 2194} 2195 2196bool 2197PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2198 llvm::Value *Address) const { 2199 // This is calculated from the LLVM and GCC tables and verified 2200 // against gcc output. AFAIK all ABIs use the same encoding. 2201 2202 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2203 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2204 2205 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2206 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2207 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2208 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2209 2210 // 0-31: r0-31, the 4-byte general-purpose registers 2211 AssignToArrayRange(Builder, Address, Four8, 0, 31); 2212 2213 // 32-63: fp0-31, the 8-byte floating-point registers 2214 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2215 2216 // 64-76 are various 4-byte special-purpose registers: 2217 // 64: mq 2218 // 65: lr 2219 // 66: ctr 2220 // 67: ap 2221 // 68-75 cr0-7 2222 // 76: xer 2223 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2224 2225 // 77-108: v0-31, the 16-byte vector registers 2226 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2227 2228 // 109: vrsave 2229 // 110: vscr 2230 // 111: spe_acc 2231 // 112: spefscr 2232 // 113: sfp 2233 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2234 2235 return false; 2236} 2237 2238 2239//===----------------------------------------------------------------------===// 2240// ARM ABI Implementation 2241//===----------------------------------------------------------------------===// 2242 2243namespace { 2244 2245class ARMABIInfo : public ABIInfo { 2246public: 2247 enum ABIKind { 2248 APCS = 0, 2249 AAPCS = 1, 2250 AAPCS_VFP 2251 }; 2252 2253private: 2254 ABIKind Kind; 2255 2256public: 2257 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {} 2258 2259private: 2260 ABIKind getABIKind() const { return Kind; } 2261 2262 ABIArgInfo classifyReturnType(QualType RetTy) const; 2263 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2264 2265 virtual void computeInfo(CGFunctionInfo &FI) const; 2266 2267 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2268 CodeGenFunction &CGF) const; 2269}; 2270 2271class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 2272public: 2273 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 2274 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 2275 2276 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2277 return 13; 2278 } 2279 2280 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2281 llvm::Value *Address) const { 2282 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2283 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2284 2285 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2286 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2287 2288 // 0-15 are the 16 integer registers. 2289 AssignToArrayRange(Builder, Address, Four8, 0, 15); 2290 2291 return false; 2292 } 2293 2294 2295}; 2296 2297} 2298 2299void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 2300 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2301 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2302 it != ie; ++it) 2303 it->info = classifyArgumentType(it->type); 2304 2305 // Always honor user-specified calling convention. 2306 if (FI.getCallingConvention() != llvm::CallingConv::C) 2307 return; 2308 2309 // Calling convention as default by an ABI. 2310 llvm::CallingConv::ID DefaultCC; 2311 llvm::StringRef Env = getContext().Target.getTriple().getEnvironmentName(); 2312 if (Env == "gnueabi" || Env == "eabi") 2313 DefaultCC = llvm::CallingConv::ARM_AAPCS; 2314 else 2315 DefaultCC = llvm::CallingConv::ARM_APCS; 2316 2317 // If user did not ask for specific calling convention explicitly (e.g. via 2318 // pcs attribute), set effective calling convention if it's different than ABI 2319 // default. 2320 switch (getABIKind()) { 2321 case APCS: 2322 if (DefaultCC != llvm::CallingConv::ARM_APCS) 2323 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 2324 break; 2325 case AAPCS: 2326 if (DefaultCC != llvm::CallingConv::ARM_AAPCS) 2327 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 2328 break; 2329 case AAPCS_VFP: 2330 if (DefaultCC != llvm::CallingConv::ARM_AAPCS_VFP) 2331 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 2332 break; 2333 } 2334} 2335 2336ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const { 2337 if (!isAggregateTypeForABI(Ty)) { 2338 // Treat an enum type as its underlying type. 2339 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2340 Ty = EnumTy->getDecl()->getIntegerType(); 2341 2342 return (Ty->isPromotableIntegerType() ? 2343 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2344 } 2345 2346 // Ignore empty records. 2347 if (isEmptyRecord(getContext(), Ty, true)) 2348 return ABIArgInfo::getIgnore(); 2349 2350 // Structures with either a non-trivial destructor or a non-trivial 2351 // copy constructor are always indirect. 2352 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2353 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2354 2355 // Otherwise, pass by coercing to a structure of the appropriate size. 2356 // 2357 // FIXME: This doesn't handle alignment > 64 bits. 2358 const llvm::Type* ElemTy; 2359 unsigned SizeRegs; 2360 if (getContext().getTypeSizeInChars(Ty) <= CharUnits::fromQuantity(64)) { 2361 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 2362 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 2363 } else if (getABIKind() == ARMABIInfo::APCS) { 2364 // Initial ARM ByVal support is APCS-only. 2365 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 2366 } else { 2367 // FIXME: This is kind of nasty... but there isn't much choice 2368 // because most of the ARM calling conventions don't yet support 2369 // byval. 2370 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 2371 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 2372 } 2373 2374 const llvm::Type *STy = 2375 llvm::StructType::get(getVMContext(), 2376 llvm::ArrayType::get(ElemTy, SizeRegs), NULL, NULL); 2377 return ABIArgInfo::getDirect(STy); 2378} 2379 2380static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 2381 llvm::LLVMContext &VMContext) { 2382 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 2383 // is called integer-like if its size is less than or equal to one word, and 2384 // the offset of each of its addressable sub-fields is zero. 2385 2386 uint64_t Size = Context.getTypeSize(Ty); 2387 2388 // Check that the type fits in a word. 2389 if (Size > 32) 2390 return false; 2391 2392 // FIXME: Handle vector types! 2393 if (Ty->isVectorType()) 2394 return false; 2395 2396 // Float types are never treated as "integer like". 2397 if (Ty->isRealFloatingType()) 2398 return false; 2399 2400 // If this is a builtin or pointer type then it is ok. 2401 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 2402 return true; 2403 2404 // Small complex integer types are "integer like". 2405 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 2406 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 2407 2408 // Single element and zero sized arrays should be allowed, by the definition 2409 // above, but they are not. 2410 2411 // Otherwise, it must be a record type. 2412 const RecordType *RT = Ty->getAs<RecordType>(); 2413 if (!RT) return false; 2414 2415 // Ignore records with flexible arrays. 2416 const RecordDecl *RD = RT->getDecl(); 2417 if (RD->hasFlexibleArrayMember()) 2418 return false; 2419 2420 // Check that all sub-fields are at offset 0, and are themselves "integer 2421 // like". 2422 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 2423 2424 bool HadField = false; 2425 unsigned idx = 0; 2426 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2427 i != e; ++i, ++idx) { 2428 const FieldDecl *FD = *i; 2429 2430 // Bit-fields are not addressable, we only need to verify they are "integer 2431 // like". We still have to disallow a subsequent non-bitfield, for example: 2432 // struct { int : 0; int x } 2433 // is non-integer like according to gcc. 2434 if (FD->isBitField()) { 2435 if (!RD->isUnion()) 2436 HadField = true; 2437 2438 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2439 return false; 2440 2441 continue; 2442 } 2443 2444 // Check if this field is at offset 0. 2445 if (Layout.getFieldOffset(idx) != 0) 2446 return false; 2447 2448 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2449 return false; 2450 2451 // Only allow at most one field in a structure. This doesn't match the 2452 // wording above, but follows gcc in situations with a field following an 2453 // empty structure. 2454 if (!RD->isUnion()) { 2455 if (HadField) 2456 return false; 2457 2458 HadField = true; 2459 } 2460 } 2461 2462 return true; 2463} 2464 2465ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 2466 if (RetTy->isVoidType()) 2467 return ABIArgInfo::getIgnore(); 2468 2469 // Large vector types should be returned via memory. 2470 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) 2471 return ABIArgInfo::getIndirect(0); 2472 2473 if (!isAggregateTypeForABI(RetTy)) { 2474 // Treat an enum type as its underlying type. 2475 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2476 RetTy = EnumTy->getDecl()->getIntegerType(); 2477 2478 return (RetTy->isPromotableIntegerType() ? 2479 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2480 } 2481 2482 // Structures with either a non-trivial destructor or a non-trivial 2483 // copy constructor are always indirect. 2484 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 2485 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2486 2487 // Are we following APCS? 2488 if (getABIKind() == APCS) { 2489 if (isEmptyRecord(getContext(), RetTy, false)) 2490 return ABIArgInfo::getIgnore(); 2491 2492 // Complex types are all returned as packed integers. 2493 // 2494 // FIXME: Consider using 2 x vector types if the back end handles them 2495 // correctly. 2496 if (RetTy->isAnyComplexType()) 2497 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2498 getContext().getTypeSize(RetTy))); 2499 2500 // Integer like structures are returned in r0. 2501 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 2502 // Return in the smallest viable integer type. 2503 uint64_t Size = getContext().getTypeSize(RetTy); 2504 if (Size <= 8) 2505 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2506 if (Size <= 16) 2507 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2508 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2509 } 2510 2511 // Otherwise return in memory. 2512 return ABIArgInfo::getIndirect(0); 2513 } 2514 2515 // Otherwise this is an AAPCS variant. 2516 2517 if (isEmptyRecord(getContext(), RetTy, true)) 2518 return ABIArgInfo::getIgnore(); 2519 2520 // Aggregates <= 4 bytes are returned in r0; other aggregates 2521 // are returned indirectly. 2522 uint64_t Size = getContext().getTypeSize(RetTy); 2523 if (Size <= 32) { 2524 // Return in the smallest viable integer type. 2525 if (Size <= 8) 2526 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2527 if (Size <= 16) 2528 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2529 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2530 } 2531 2532 return ABIArgInfo::getIndirect(0); 2533} 2534 2535llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2536 CodeGenFunction &CGF) const { 2537 // FIXME: Need to handle alignment 2538 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2539 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2540 2541 CGBuilderTy &Builder = CGF.Builder; 2542 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2543 "ap"); 2544 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2545 llvm::Type *PTy = 2546 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2547 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2548 2549 uint64_t Offset = 2550 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 2551 llvm::Value *NextAddr = 2552 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2553 "ap.next"); 2554 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2555 2556 return AddrTyped; 2557} 2558 2559//===----------------------------------------------------------------------===// 2560// PTX ABI Implementation 2561//===----------------------------------------------------------------------===// 2562 2563namespace { 2564 2565class PTXABIInfo : public ABIInfo { 2566public: 2567 PTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2568 2569 ABIArgInfo classifyReturnType(QualType RetTy) const; 2570 ABIArgInfo classifyArgumentType(QualType Ty) const; 2571 2572 virtual void computeInfo(CGFunctionInfo &FI) const; 2573 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2574 CodeGenFunction &CFG) const; 2575}; 2576 2577class PTXTargetCodeGenInfo : public TargetCodeGenInfo { 2578public: 2579 PTXTargetCodeGenInfo(CodeGenTypes &CGT) 2580 : TargetCodeGenInfo(new PTXABIInfo(CGT)) {} 2581}; 2582 2583ABIArgInfo PTXABIInfo::classifyReturnType(QualType RetTy) const { 2584 if (RetTy->isVoidType()) 2585 return ABIArgInfo::getIgnore(); 2586 if (isAggregateTypeForABI(RetTy)) 2587 return ABIArgInfo::getIndirect(0); 2588 return ABIArgInfo::getDirect(); 2589} 2590 2591ABIArgInfo PTXABIInfo::classifyArgumentType(QualType Ty) const { 2592 if (isAggregateTypeForABI(Ty)) 2593 return ABIArgInfo::getIndirect(0); 2594 2595 return ABIArgInfo::getDirect(); 2596} 2597 2598void PTXABIInfo::computeInfo(CGFunctionInfo &FI) const { 2599 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2600 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2601 it != ie; ++it) 2602 it->info = classifyArgumentType(it->type); 2603 2604 // Always honor user-specified calling convention. 2605 if (FI.getCallingConvention() != llvm::CallingConv::C) 2606 return; 2607 2608 // Calling convention as default by an ABI. 2609 llvm::CallingConv::ID DefaultCC; 2610 llvm::StringRef Env = getContext().Target.getTriple().getEnvironmentName(); 2611 if (Env == "device") 2612 DefaultCC = llvm::CallingConv::PTX_Device; 2613 else 2614 DefaultCC = llvm::CallingConv::PTX_Kernel; 2615 2616 FI.setEffectiveCallingConvention(DefaultCC); 2617} 2618 2619llvm::Value *PTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2620 CodeGenFunction &CFG) const { 2621 llvm_unreachable("PTX does not support varargs"); 2622 return 0; 2623} 2624 2625} 2626 2627//===----------------------------------------------------------------------===// 2628// SystemZ ABI Implementation 2629//===----------------------------------------------------------------------===// 2630 2631namespace { 2632 2633class SystemZABIInfo : public ABIInfo { 2634public: 2635 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2636 2637 bool isPromotableIntegerType(QualType Ty) const; 2638 2639 ABIArgInfo classifyReturnType(QualType RetTy) const; 2640 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2641 2642 virtual void computeInfo(CGFunctionInfo &FI) const { 2643 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2644 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2645 it != ie; ++it) 2646 it->info = classifyArgumentType(it->type); 2647 } 2648 2649 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2650 CodeGenFunction &CGF) const; 2651}; 2652 2653class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 2654public: 2655 SystemZTargetCodeGenInfo(CodeGenTypes &CGT) 2656 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {} 2657}; 2658 2659} 2660 2661bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 2662 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 2663 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2664 switch (BT->getKind()) { 2665 case BuiltinType::Bool: 2666 case BuiltinType::Char_S: 2667 case BuiltinType::Char_U: 2668 case BuiltinType::SChar: 2669 case BuiltinType::UChar: 2670 case BuiltinType::Short: 2671 case BuiltinType::UShort: 2672 case BuiltinType::Int: 2673 case BuiltinType::UInt: 2674 return true; 2675 default: 2676 return false; 2677 } 2678 return false; 2679} 2680 2681llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2682 CodeGenFunction &CGF) const { 2683 // FIXME: Implement 2684 return 0; 2685} 2686 2687 2688ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const { 2689 if (RetTy->isVoidType()) 2690 return ABIArgInfo::getIgnore(); 2691 if (isAggregateTypeForABI(RetTy)) 2692 return ABIArgInfo::getIndirect(0); 2693 2694 return (isPromotableIntegerType(RetTy) ? 2695 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2696} 2697 2698ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const { 2699 if (isAggregateTypeForABI(Ty)) 2700 return ABIArgInfo::getIndirect(0); 2701 2702 return (isPromotableIntegerType(Ty) ? 2703 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2704} 2705 2706//===----------------------------------------------------------------------===// 2707// MBlaze ABI Implementation 2708//===----------------------------------------------------------------------===// 2709 2710namespace { 2711 2712class MBlazeABIInfo : public ABIInfo { 2713public: 2714 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2715 2716 bool isPromotableIntegerType(QualType Ty) const; 2717 2718 ABIArgInfo classifyReturnType(QualType RetTy) const; 2719 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2720 2721 virtual void computeInfo(CGFunctionInfo &FI) const { 2722 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2723 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2724 it != ie; ++it) 2725 it->info = classifyArgumentType(it->type); 2726 } 2727 2728 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2729 CodeGenFunction &CGF) const; 2730}; 2731 2732class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo { 2733public: 2734 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT) 2735 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {} 2736 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2737 CodeGen::CodeGenModule &M) const; 2738}; 2739 2740} 2741 2742bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const { 2743 // MBlaze ABI requires all 8 and 16 bit quantities to be extended. 2744 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2745 switch (BT->getKind()) { 2746 case BuiltinType::Bool: 2747 case BuiltinType::Char_S: 2748 case BuiltinType::Char_U: 2749 case BuiltinType::SChar: 2750 case BuiltinType::UChar: 2751 case BuiltinType::Short: 2752 case BuiltinType::UShort: 2753 return true; 2754 default: 2755 return false; 2756 } 2757 return false; 2758} 2759 2760llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2761 CodeGenFunction &CGF) const { 2762 // FIXME: Implement 2763 return 0; 2764} 2765 2766 2767ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const { 2768 if (RetTy->isVoidType()) 2769 return ABIArgInfo::getIgnore(); 2770 if (isAggregateTypeForABI(RetTy)) 2771 return ABIArgInfo::getIndirect(0); 2772 2773 return (isPromotableIntegerType(RetTy) ? 2774 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2775} 2776 2777ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const { 2778 if (isAggregateTypeForABI(Ty)) 2779 return ABIArgInfo::getIndirect(0); 2780 2781 return (isPromotableIntegerType(Ty) ? 2782 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2783} 2784 2785void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2786 llvm::GlobalValue *GV, 2787 CodeGen::CodeGenModule &M) 2788 const { 2789 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 2790 if (!FD) return; 2791 2792 llvm::CallingConv::ID CC = llvm::CallingConv::C; 2793 if (FD->hasAttr<MBlazeInterruptHandlerAttr>()) 2794 CC = llvm::CallingConv::MBLAZE_INTR; 2795 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>()) 2796 CC = llvm::CallingConv::MBLAZE_SVOL; 2797 2798 if (CC != llvm::CallingConv::C) { 2799 // Handle 'interrupt_handler' attribute: 2800 llvm::Function *F = cast<llvm::Function>(GV); 2801 2802 // Step 1: Set ISR calling convention. 2803 F->setCallingConv(CC); 2804 2805 // Step 2: Add attributes goodness. 2806 F->addFnAttr(llvm::Attribute::NoInline); 2807 } 2808 2809 // Step 3: Emit _interrupt_handler alias. 2810 if (CC == llvm::CallingConv::MBLAZE_INTR) 2811 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2812 "_interrupt_handler", GV, &M.getModule()); 2813} 2814 2815 2816//===----------------------------------------------------------------------===// 2817// MSP430 ABI Implementation 2818//===----------------------------------------------------------------------===// 2819 2820namespace { 2821 2822class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 2823public: 2824 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 2825 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2826 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2827 CodeGen::CodeGenModule &M) const; 2828}; 2829 2830} 2831 2832void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2833 llvm::GlobalValue *GV, 2834 CodeGen::CodeGenModule &M) const { 2835 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 2836 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 2837 // Handle 'interrupt' attribute: 2838 llvm::Function *F = cast<llvm::Function>(GV); 2839 2840 // Step 1: Set ISR calling convention. 2841 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 2842 2843 // Step 2: Add attributes goodness. 2844 F->addFnAttr(llvm::Attribute::NoInline); 2845 2846 // Step 3: Emit ISR vector alias. 2847 unsigned Num = attr->getNumber() + 0xffe0; 2848 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2849 "vector_" + llvm::Twine::utohexstr(Num), 2850 GV, &M.getModule()); 2851 } 2852 } 2853} 2854 2855//===----------------------------------------------------------------------===// 2856// MIPS ABI Implementation. This works for both little-endian and 2857// big-endian variants. 2858//===----------------------------------------------------------------------===// 2859 2860namespace { 2861class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 2862public: 2863 MIPSTargetCodeGenInfo(CodeGenTypes &CGT) 2864 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2865 2866 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 2867 return 29; 2868 } 2869 2870 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2871 llvm::Value *Address) const; 2872}; 2873} 2874 2875bool 2876MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2877 llvm::Value *Address) const { 2878 // This information comes from gcc's implementation, which seems to 2879 // as canonical as it gets. 2880 2881 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2882 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2883 2884 // Everything on MIPS is 4 bytes. Double-precision FP registers 2885 // are aliased to pairs of single-precision FP registers. 2886 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2887 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2888 2889 // 0-31 are the general purpose registers, $0 - $31. 2890 // 32-63 are the floating-point registers, $f0 - $f31. 2891 // 64 and 65 are the multiply/divide registers, $hi and $lo. 2892 // 66 is the (notional, I think) register for signal-handler return. 2893 AssignToArrayRange(Builder, Address, Four8, 0, 65); 2894 2895 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 2896 // They are one bit wide and ignored here. 2897 2898 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 2899 // (coprocessor 1 is the FP unit) 2900 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 2901 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 2902 // 176-181 are the DSP accumulator registers. 2903 AssignToArrayRange(Builder, Address, Four8, 80, 181); 2904 2905 return false; 2906} 2907 2908 2909const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 2910 if (TheTargetCodeGenInfo) 2911 return *TheTargetCodeGenInfo; 2912 2913 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 2914 // free it. 2915 2916 const llvm::Triple &Triple = getContext().Target.getTriple(); 2917 switch (Triple.getArch()) { 2918 default: 2919 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 2920 2921 case llvm::Triple::mips: 2922 case llvm::Triple::mipsel: 2923 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types)); 2924 2925 case llvm::Triple::arm: 2926 case llvm::Triple::thumb: 2927 { 2928 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS; 2929 2930 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0) 2931 Kind = ARMABIInfo::APCS; 2932 else if (CodeGenOpts.FloatABI == "hard") 2933 Kind = ARMABIInfo::AAPCS_VFP; 2934 2935 return *(TheTargetCodeGenInfo = new ARMTargetCodeGenInfo(Types, Kind)); 2936 } 2937 2938 case llvm::Triple::ppc: 2939 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 2940 2941 case llvm::Triple::ptx32: 2942 case llvm::Triple::ptx64: 2943 return *(TheTargetCodeGenInfo = new PTXTargetCodeGenInfo(Types)); 2944 2945 case llvm::Triple::systemz: 2946 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types)); 2947 2948 case llvm::Triple::mblaze: 2949 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types)); 2950 2951 case llvm::Triple::msp430: 2952 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 2953 2954 case llvm::Triple::x86: 2955 if (Triple.isOSDarwin()) 2956 return *(TheTargetCodeGenInfo = 2957 new X86_32TargetCodeGenInfo(Types, true, true)); 2958 2959 switch (Triple.getOS()) { 2960 case llvm::Triple::Cygwin: 2961 case llvm::Triple::MinGW32: 2962 case llvm::Triple::AuroraUX: 2963 case llvm::Triple::DragonFly: 2964 case llvm::Triple::FreeBSD: 2965 case llvm::Triple::OpenBSD: 2966 case llvm::Triple::NetBSD: 2967 return *(TheTargetCodeGenInfo = 2968 new X86_32TargetCodeGenInfo(Types, false, true)); 2969 2970 default: 2971 return *(TheTargetCodeGenInfo = 2972 new X86_32TargetCodeGenInfo(Types, false, false)); 2973 } 2974 2975 case llvm::Triple::x86_64: 2976 switch (Triple.getOS()) { 2977 case llvm::Triple::Win32: 2978 case llvm::Triple::MinGW32: 2979 case llvm::Triple::Cygwin: 2980 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 2981 default: 2982 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types)); 2983 } 2984 } 2985} 2986