TargetInfo.cpp revision e624fa02b2c2c614b3a27a25516885fc64e07001
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "clang/Frontend/CodeGenOptions.h" 20#include "llvm/Type.h" 21#include "llvm/Target/TargetData.h" 22#include "llvm/ADT/Triple.h" 23#include "llvm/Support/raw_ostream.h" 24using namespace clang; 25using namespace CodeGen; 26 27static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 28 llvm::Value *Array, 29 llvm::Value *Value, 30 unsigned FirstIndex, 31 unsigned LastIndex) { 32 // Alternatively, we could emit this as a loop in the source. 33 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 34 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 35 Builder.CreateStore(Value, Cell); 36 } 37} 38 39static bool isAggregateTypeForABI(QualType T) { 40 return CodeGenFunction::hasAggregateLLVMType(T) || 41 T->isMemberFunctionPointerType(); 42} 43 44ABIInfo::~ABIInfo() {} 45 46ASTContext &ABIInfo::getContext() const { 47 return CGT.getContext(); 48} 49 50llvm::LLVMContext &ABIInfo::getVMContext() const { 51 return CGT.getLLVMContext(); 52} 53 54const llvm::TargetData &ABIInfo::getTargetData() const { 55 return CGT.getTargetData(); 56} 57 58 59void ABIArgInfo::dump() const { 60 raw_ostream &OS = llvm::errs(); 61 OS << "(ABIArgInfo Kind="; 62 switch (TheKind) { 63 case Direct: 64 OS << "Direct Type="; 65 if (llvm::Type *Ty = getCoerceToType()) 66 Ty->print(OS); 67 else 68 OS << "null"; 69 break; 70 case Extend: 71 OS << "Extend"; 72 break; 73 case Ignore: 74 OS << "Ignore"; 75 break; 76 case Indirect: 77 OS << "Indirect Align=" << getIndirectAlign() 78 << " ByVal=" << getIndirectByVal() 79 << " Realign=" << getIndirectRealign(); 80 break; 81 case Expand: 82 OS << "Expand"; 83 break; 84 } 85 OS << ")\n"; 86} 87 88TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 89 90// If someone can figure out a general rule for this, that would be great. 91// It's probably just doomed to be platform-dependent, though. 92unsigned TargetCodeGenInfo::getSizeOfUnwindException() const { 93 // Verified for: 94 // x86-64 FreeBSD, Linux, Darwin 95 // x86-32 FreeBSD, Linux, Darwin 96 // PowerPC Linux, Darwin 97 // ARM Darwin (*not* EABI) 98 return 32; 99} 100 101static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 102 103/// isEmptyField - Return true iff a the field is "empty", that is it 104/// is an unnamed bit-field or an (array of) empty record(s). 105static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 106 bool AllowArrays) { 107 if (FD->isUnnamedBitfield()) 108 return true; 109 110 QualType FT = FD->getType(); 111 112 // Constant arrays of empty records count as empty, strip them off. 113 if (AllowArrays) 114 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 115 FT = AT->getElementType(); 116 117 const RecordType *RT = FT->getAs<RecordType>(); 118 if (!RT) 119 return false; 120 121 // C++ record fields are never empty, at least in the Itanium ABI. 122 // 123 // FIXME: We should use a predicate for whether this behavior is true in the 124 // current ABI. 125 if (isa<CXXRecordDecl>(RT->getDecl())) 126 return false; 127 128 return isEmptyRecord(Context, FT, AllowArrays); 129} 130 131/// isEmptyRecord - Return true iff a structure contains only empty 132/// fields. Note that a structure with a flexible array member is not 133/// considered empty. 134static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 135 const RecordType *RT = T->getAs<RecordType>(); 136 if (!RT) 137 return 0; 138 const RecordDecl *RD = RT->getDecl(); 139 if (RD->hasFlexibleArrayMember()) 140 return false; 141 142 // If this is a C++ record, check the bases first. 143 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 144 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 145 e = CXXRD->bases_end(); i != e; ++i) 146 if (!isEmptyRecord(Context, i->getType(), true)) 147 return false; 148 149 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 150 i != e; ++i) 151 if (!isEmptyField(Context, *i, AllowArrays)) 152 return false; 153 return true; 154} 155 156/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 157/// a non-trivial destructor or a non-trivial copy constructor. 158static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 159 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 160 if (!RD) 161 return false; 162 163 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 164} 165 166/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 167/// a record type with either a non-trivial destructor or a non-trivial copy 168/// constructor. 169static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 170 const RecordType *RT = T->getAs<RecordType>(); 171 if (!RT) 172 return false; 173 174 return hasNonTrivialDestructorOrCopyConstructor(RT); 175} 176 177/// isSingleElementStruct - Determine if a structure is a "single 178/// element struct", i.e. it has exactly one non-empty field or 179/// exactly one field which is itself a single element 180/// struct. Structures with flexible array members are never 181/// considered single element structs. 182/// 183/// \return The field declaration for the single non-empty field, if 184/// it exists. 185static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 186 const RecordType *RT = T->getAsStructureType(); 187 if (!RT) 188 return 0; 189 190 const RecordDecl *RD = RT->getDecl(); 191 if (RD->hasFlexibleArrayMember()) 192 return 0; 193 194 const Type *Found = 0; 195 196 // If this is a C++ record, check the bases first. 197 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 198 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 199 e = CXXRD->bases_end(); i != e; ++i) { 200 // Ignore empty records. 201 if (isEmptyRecord(Context, i->getType(), true)) 202 continue; 203 204 // If we already found an element then this isn't a single-element struct. 205 if (Found) 206 return 0; 207 208 // If this is non-empty and not a single element struct, the composite 209 // cannot be a single element struct. 210 Found = isSingleElementStruct(i->getType(), Context); 211 if (!Found) 212 return 0; 213 } 214 } 215 216 // Check for single element. 217 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 218 i != e; ++i) { 219 const FieldDecl *FD = *i; 220 QualType FT = FD->getType(); 221 222 // Ignore empty fields. 223 if (isEmptyField(Context, FD, true)) 224 continue; 225 226 // If we already found an element then this isn't a single-element 227 // struct. 228 if (Found) 229 return 0; 230 231 // Treat single element arrays as the element. 232 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 233 if (AT->getSize().getZExtValue() != 1) 234 break; 235 FT = AT->getElementType(); 236 } 237 238 if (!isAggregateTypeForABI(FT)) { 239 Found = FT.getTypePtr(); 240 } else { 241 Found = isSingleElementStruct(FT, Context); 242 if (!Found) 243 return 0; 244 } 245 } 246 247 return Found; 248} 249 250static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 251 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 252 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 253 !Ty->isBlockPointerType()) 254 return false; 255 256 uint64_t Size = Context.getTypeSize(Ty); 257 return Size == 32 || Size == 64; 258} 259 260/// canExpandIndirectArgument - Test whether an argument type which is to be 261/// passed indirectly (on the stack) would have the equivalent layout if it was 262/// expanded into separate arguments. If so, we prefer to do the latter to avoid 263/// inhibiting optimizations. 264/// 265// FIXME: This predicate is missing many cases, currently it just follows 266// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 267// should probably make this smarter, or better yet make the LLVM backend 268// capable of handling it. 269static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 270 // We can only expand structure types. 271 const RecordType *RT = Ty->getAs<RecordType>(); 272 if (!RT) 273 return false; 274 275 // We can only expand (C) structures. 276 // 277 // FIXME: This needs to be generalized to handle classes as well. 278 const RecordDecl *RD = RT->getDecl(); 279 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 280 return false; 281 282 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 283 i != e; ++i) { 284 const FieldDecl *FD = *i; 285 286 if (!is32Or64BitBasicType(FD->getType(), Context)) 287 return false; 288 289 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 290 // how to expand them yet, and the predicate for telling if a bitfield still 291 // counts as "basic" is more complicated than what we were doing previously. 292 if (FD->isBitField()) 293 return false; 294 } 295 296 return true; 297} 298 299namespace { 300/// DefaultABIInfo - The default implementation for ABI specific 301/// details. This implementation provides information which results in 302/// self-consistent and sensible LLVM IR generation, but does not 303/// conform to any particular ABI. 304class DefaultABIInfo : public ABIInfo { 305public: 306 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 307 308 ABIArgInfo classifyReturnType(QualType RetTy) const; 309 ABIArgInfo classifyArgumentType(QualType RetTy) const; 310 311 virtual void computeInfo(CGFunctionInfo &FI) const { 312 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 313 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 314 it != ie; ++it) 315 it->info = classifyArgumentType(it->type); 316 } 317 318 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 319 CodeGenFunction &CGF) const; 320}; 321 322class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 323public: 324 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 325 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 326}; 327 328llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 329 CodeGenFunction &CGF) const { 330 return 0; 331} 332 333ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 334 if (isAggregateTypeForABI(Ty)) 335 return ABIArgInfo::getIndirect(0); 336 337 // Treat an enum type as its underlying type. 338 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 339 Ty = EnumTy->getDecl()->getIntegerType(); 340 341 return (Ty->isPromotableIntegerType() ? 342 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 343} 344 345ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 346 if (RetTy->isVoidType()) 347 return ABIArgInfo::getIgnore(); 348 349 if (isAggregateTypeForABI(RetTy)) 350 return ABIArgInfo::getIndirect(0); 351 352 // Treat an enum type as its underlying type. 353 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 354 RetTy = EnumTy->getDecl()->getIntegerType(); 355 356 return (RetTy->isPromotableIntegerType() ? 357 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 358} 359 360/// UseX86_MMXType - Return true if this is an MMX type that should use the special 361/// x86_mmx type. 362bool UseX86_MMXType(llvm::Type *IRType) { 363 // If the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>, use the 364 // special x86_mmx type. 365 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && 366 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && 367 IRType->getScalarSizeInBits() != 64; 368} 369 370static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 371 StringRef Constraint, 372 llvm::Type* Ty) { 373 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) 374 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext()); 375 return Ty; 376} 377 378//===----------------------------------------------------------------------===// 379// X86-32 ABI Implementation 380//===----------------------------------------------------------------------===// 381 382/// X86_32ABIInfo - The X86-32 ABI information. 383class X86_32ABIInfo : public ABIInfo { 384 static const unsigned MinABIStackAlignInBytes = 4; 385 386 bool IsDarwinVectorABI; 387 bool IsSmallStructInRegABI; 388 bool IsMMXDisabled; 389 390 static bool isRegisterSize(unsigned Size) { 391 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 392 } 393 394 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 395 396 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 397 /// such that the argument will be passed in memory. 398 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const; 399 400 /// \brief Return the alignment to use for the given type on the stack. 401 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const; 402 403public: 404 405 ABIArgInfo classifyReturnType(QualType RetTy) const; 406 ABIArgInfo classifyArgumentType(QualType RetTy) const; 407 408 virtual void computeInfo(CGFunctionInfo &FI) const { 409 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 410 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 411 it != ie; ++it) 412 it->info = classifyArgumentType(it->type); 413 } 414 415 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 416 CodeGenFunction &CGF) const; 417 418 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m) 419 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p), 420 IsMMXDisabled(m) {} 421}; 422 423class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 424public: 425 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m) 426 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, m)) {} 427 428 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 429 CodeGen::CodeGenModule &CGM) const; 430 431 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 432 // Darwin uses different dwarf register numbers for EH. 433 if (CGM.isTargetDarwin()) return 5; 434 435 return 4; 436 } 437 438 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 439 llvm::Value *Address) const; 440 441 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 442 StringRef Constraint, 443 llvm::Type* Ty) const { 444 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 445 } 446 447}; 448 449} 450 451/// shouldReturnTypeInRegister - Determine if the given type should be 452/// passed in a register (for the Darwin ABI). 453bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 454 ASTContext &Context) { 455 uint64_t Size = Context.getTypeSize(Ty); 456 457 // Type must be register sized. 458 if (!isRegisterSize(Size)) 459 return false; 460 461 if (Ty->isVectorType()) { 462 // 64- and 128- bit vectors inside structures are not returned in 463 // registers. 464 if (Size == 64 || Size == 128) 465 return false; 466 467 return true; 468 } 469 470 // If this is a builtin, pointer, enum, complex type, member pointer, or 471 // member function pointer it is ok. 472 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 473 Ty->isAnyComplexType() || Ty->isEnumeralType() || 474 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 475 return true; 476 477 // Arrays are treated like records. 478 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 479 return shouldReturnTypeInRegister(AT->getElementType(), Context); 480 481 // Otherwise, it must be a record type. 482 const RecordType *RT = Ty->getAs<RecordType>(); 483 if (!RT) return false; 484 485 // FIXME: Traverse bases here too. 486 487 // Structure types are passed in register if all fields would be 488 // passed in a register. 489 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 490 e = RT->getDecl()->field_end(); i != e; ++i) { 491 const FieldDecl *FD = *i; 492 493 // Empty fields are ignored. 494 if (isEmptyField(Context, FD, true)) 495 continue; 496 497 // Check fields recursively. 498 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 499 return false; 500 } 501 502 return true; 503} 504 505ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy) const { 506 if (RetTy->isVoidType()) 507 return ABIArgInfo::getIgnore(); 508 509 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 510 // On Darwin, some vectors are returned in registers. 511 if (IsDarwinVectorABI) { 512 uint64_t Size = getContext().getTypeSize(RetTy); 513 514 // 128-bit vectors are a special case; they are returned in 515 // registers and we need to make sure to pick a type the LLVM 516 // backend will like. 517 if (Size == 128) 518 return ABIArgInfo::getDirect(llvm::VectorType::get( 519 llvm::Type::getInt64Ty(getVMContext()), 2)); 520 521 // Always return in register if it fits in a general purpose 522 // register, or if it is 64 bits and has a single element. 523 if ((Size == 8 || Size == 16 || Size == 32) || 524 (Size == 64 && VT->getNumElements() == 1)) 525 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 526 Size)); 527 528 return ABIArgInfo::getIndirect(0); 529 } 530 531 return ABIArgInfo::getDirect(); 532 } 533 534 if (isAggregateTypeForABI(RetTy)) { 535 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 536 // Structures with either a non-trivial destructor or a non-trivial 537 // copy constructor are always indirect. 538 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 539 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 540 541 // Structures with flexible arrays are always indirect. 542 if (RT->getDecl()->hasFlexibleArrayMember()) 543 return ABIArgInfo::getIndirect(0); 544 } 545 546 // If specified, structs and unions are always indirect. 547 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 548 return ABIArgInfo::getIndirect(0); 549 550 // Classify "single element" structs as their element type. 551 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) { 552 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 553 if (BT->isIntegerType()) { 554 // We need to use the size of the structure, padding 555 // bit-fields can adjust that to be larger than the single 556 // element type. 557 uint64_t Size = getContext().getTypeSize(RetTy); 558 return ABIArgInfo::getDirect( 559 llvm::IntegerType::get(getVMContext(), (unsigned)Size)); 560 } 561 562 if (BT->getKind() == BuiltinType::Float) { 563 assert(getContext().getTypeSize(RetTy) == 564 getContext().getTypeSize(SeltTy) && 565 "Unexpect single element structure size!"); 566 return ABIArgInfo::getDirect(llvm::Type::getFloatTy(getVMContext())); 567 } 568 569 if (BT->getKind() == BuiltinType::Double) { 570 assert(getContext().getTypeSize(RetTy) == 571 getContext().getTypeSize(SeltTy) && 572 "Unexpect single element structure size!"); 573 return ABIArgInfo::getDirect(llvm::Type::getDoubleTy(getVMContext())); 574 } 575 } else if (SeltTy->isPointerType()) { 576 // FIXME: It would be really nice if this could come out as the proper 577 // pointer type. 578 llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(getVMContext()); 579 return ABIArgInfo::getDirect(PtrTy); 580 } else if (SeltTy->isVectorType()) { 581 // 64- and 128-bit vectors are never returned in a 582 // register when inside a structure. 583 uint64_t Size = getContext().getTypeSize(RetTy); 584 if (Size == 64 || Size == 128) 585 return ABIArgInfo::getIndirect(0); 586 587 return classifyReturnType(QualType(SeltTy, 0)); 588 } 589 } 590 591 // Small structures which are register sized are generally returned 592 // in a register. 593 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext())) { 594 uint64_t Size = getContext().getTypeSize(RetTy); 595 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 596 } 597 598 return ABIArgInfo::getIndirect(0); 599 } 600 601 // Treat an enum type as its underlying type. 602 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 603 RetTy = EnumTy->getDecl()->getIntegerType(); 604 605 return (RetTy->isPromotableIntegerType() ? 606 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 607} 608 609static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) { 610 const RecordType *RT = Ty->getAs<RecordType>(); 611 if (!RT) 612 return 0; 613 const RecordDecl *RD = RT->getDecl(); 614 615 // If this is a C++ record, check the bases first. 616 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 617 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 618 e = CXXRD->bases_end(); i != e; ++i) 619 if (!isRecordWithSSEVectorType(Context, i->getType())) 620 return false; 621 622 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 623 i != e; ++i) { 624 QualType FT = i->getType(); 625 626 if (FT->getAs<VectorType>() && Context.getTypeSize(Ty) == 128) 627 return true; 628 629 if (isRecordWithSSEVectorType(Context, FT)) 630 return true; 631 } 632 633 return false; 634} 635 636unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty, 637 unsigned Align) const { 638 // Otherwise, if the alignment is less than or equal to the minimum ABI 639 // alignment, just use the default; the backend will handle this. 640 if (Align <= MinABIStackAlignInBytes) 641 return 0; // Use default alignment. 642 643 // On non-Darwin, the stack type alignment is always 4. 644 if (!IsDarwinVectorABI) { 645 // Set explicit alignment, since we may need to realign the top. 646 return MinABIStackAlignInBytes; 647 } 648 649 // Otherwise, if the type contains an SSE vector type, the alignment is 16. 650 if (isRecordWithSSEVectorType(getContext(), Ty)) 651 return 16; 652 653 return MinABIStackAlignInBytes; 654} 655 656ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const { 657 if (!ByVal) 658 return ABIArgInfo::getIndirect(0, false); 659 660 // Compute the byval alignment. 661 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 662 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign); 663 if (StackAlign == 0) 664 return ABIArgInfo::getIndirect(4); 665 666 // If the stack alignment is less than the type alignment, realign the 667 // argument. 668 if (StackAlign < TypeAlign) 669 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, 670 /*Realign=*/true); 671 672 return ABIArgInfo::getIndirect(StackAlign); 673} 674 675ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const { 676 // FIXME: Set alignment on indirect arguments. 677 if (isAggregateTypeForABI(Ty)) { 678 // Structures with flexible arrays are always indirect. 679 if (const RecordType *RT = Ty->getAs<RecordType>()) { 680 // Structures with either a non-trivial destructor or a non-trivial 681 // copy constructor are always indirect. 682 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 683 return getIndirectResult(Ty, /*ByVal=*/false); 684 685 if (RT->getDecl()->hasFlexibleArrayMember()) 686 return getIndirectResult(Ty); 687 } 688 689 // Ignore empty structs. 690 if (Ty->isStructureType() && getContext().getTypeSize(Ty) == 0) 691 return ABIArgInfo::getIgnore(); 692 693 // Expand small (<= 128-bit) record types when we know that the stack layout 694 // of those arguments will match the struct. This is important because the 695 // LLVM backend isn't smart enough to remove byval, which inhibits many 696 // optimizations. 697 if (getContext().getTypeSize(Ty) <= 4*32 && 698 canExpandIndirectArgument(Ty, getContext())) 699 return ABIArgInfo::getExpand(); 700 701 return getIndirectResult(Ty); 702 } 703 704 if (const VectorType *VT = Ty->getAs<VectorType>()) { 705 // On Darwin, some vectors are passed in memory, we handle this by passing 706 // it as an i8/i16/i32/i64. 707 if (IsDarwinVectorABI) { 708 uint64_t Size = getContext().getTypeSize(Ty); 709 if ((Size == 8 || Size == 16 || Size == 32) || 710 (Size == 64 && VT->getNumElements() == 1)) 711 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 712 Size)); 713 } 714 715 llvm::Type *IRType = CGT.ConvertType(Ty); 716 if (UseX86_MMXType(IRType)) { 717 if (IsMMXDisabled) 718 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 719 64)); 720 ABIArgInfo AAI = ABIArgInfo::getDirect(IRType); 721 AAI.setCoerceToType(llvm::Type::getX86_MMXTy(getVMContext())); 722 return AAI; 723 } 724 725 return ABIArgInfo::getDirect(); 726 } 727 728 729 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 730 Ty = EnumTy->getDecl()->getIntegerType(); 731 732 return (Ty->isPromotableIntegerType() ? 733 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 734} 735 736llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 737 CodeGenFunction &CGF) const { 738 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 739 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 740 741 CGBuilderTy &Builder = CGF.Builder; 742 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 743 "ap"); 744 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 745 llvm::Type *PTy = 746 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 747 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 748 749 uint64_t Offset = 750 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 751 llvm::Value *NextAddr = 752 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 753 "ap.next"); 754 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 755 756 return AddrTyped; 757} 758 759void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 760 llvm::GlobalValue *GV, 761 CodeGen::CodeGenModule &CGM) const { 762 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 763 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 764 // Get the LLVM function. 765 llvm::Function *Fn = cast<llvm::Function>(GV); 766 767 // Now add the 'alignstack' attribute with a value of 16. 768 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 769 } 770 } 771} 772 773bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 774 CodeGen::CodeGenFunction &CGF, 775 llvm::Value *Address) const { 776 CodeGen::CGBuilderTy &Builder = CGF.Builder; 777 llvm::LLVMContext &Context = CGF.getLLVMContext(); 778 779 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 780 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 781 782 // 0-7 are the eight integer registers; the order is different 783 // on Darwin (for EH), but the range is the same. 784 // 8 is %eip. 785 AssignToArrayRange(Builder, Address, Four8, 0, 8); 786 787 if (CGF.CGM.isTargetDarwin()) { 788 // 12-16 are st(0..4). Not sure why we stop at 4. 789 // These have size 16, which is sizeof(long double) on 790 // platforms with 8-byte alignment for that type. 791 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 792 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 793 794 } else { 795 // 9 is %eflags, which doesn't get a size on Darwin for some 796 // reason. 797 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 798 799 // 11-16 are st(0..5). Not sure why we stop at 5. 800 // These have size 12, which is sizeof(long double) on 801 // platforms with 4-byte alignment for that type. 802 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 803 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 804 } 805 806 return false; 807} 808 809//===----------------------------------------------------------------------===// 810// X86-64 ABI Implementation 811//===----------------------------------------------------------------------===// 812 813 814namespace { 815/// X86_64ABIInfo - The X86_64 ABI information. 816class X86_64ABIInfo : public ABIInfo { 817 enum Class { 818 Integer = 0, 819 SSE, 820 SSEUp, 821 X87, 822 X87Up, 823 ComplexX87, 824 NoClass, 825 Memory 826 }; 827 828 /// merge - Implement the X86_64 ABI merging algorithm. 829 /// 830 /// Merge an accumulating classification \arg Accum with a field 831 /// classification \arg Field. 832 /// 833 /// \param Accum - The accumulating classification. This should 834 /// always be either NoClass or the result of a previous merge 835 /// call. In addition, this should never be Memory (the caller 836 /// should just return Memory for the aggregate). 837 static Class merge(Class Accum, Class Field); 838 839 /// postMerge - Implement the X86_64 ABI post merging algorithm. 840 /// 841 /// Post merger cleanup, reduces a malformed Hi and Lo pair to 842 /// final MEMORY or SSE classes when necessary. 843 /// 844 /// \param AggregateSize - The size of the current aggregate in 845 /// the classification process. 846 /// 847 /// \param Lo - The classification for the parts of the type 848 /// residing in the low word of the containing object. 849 /// 850 /// \param Hi - The classification for the parts of the type 851 /// residing in the higher words of the containing object. 852 /// 853 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const; 854 855 /// classify - Determine the x86_64 register classes in which the 856 /// given type T should be passed. 857 /// 858 /// \param Lo - The classification for the parts of the type 859 /// residing in the low word of the containing object. 860 /// 861 /// \param Hi - The classification for the parts of the type 862 /// residing in the high word of the containing object. 863 /// 864 /// \param OffsetBase - The bit offset of this type in the 865 /// containing object. Some parameters are classified different 866 /// depending on whether they straddle an eightbyte boundary. 867 /// 868 /// If a word is unused its result will be NoClass; if a type should 869 /// be passed in Memory then at least the classification of \arg Lo 870 /// will be Memory. 871 /// 872 /// The \arg Lo class will be NoClass iff the argument is ignored. 873 /// 874 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 875 /// also be ComplexX87. 876 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 877 878 llvm::Type *GetByteVectorType(QualType Ty) const; 879 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType, 880 unsigned IROffset, QualType SourceTy, 881 unsigned SourceOffset) const; 882 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType, 883 unsigned IROffset, QualType SourceTy, 884 unsigned SourceOffset) const; 885 886 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 887 /// such that the argument will be returned in memory. 888 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 889 890 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 891 /// such that the argument will be passed in memory. 892 ABIArgInfo getIndirectResult(QualType Ty) const; 893 894 ABIArgInfo classifyReturnType(QualType RetTy) const; 895 896 ABIArgInfo classifyArgumentType(QualType Ty, 897 unsigned &neededInt, 898 unsigned &neededSSE) const; 899 900 /// The 0.98 ABI revision clarified a lot of ambiguities, 901 /// unfortunately in ways that were not always consistent with 902 /// certain previous compilers. In particular, platforms which 903 /// required strict binary compatibility with older versions of GCC 904 /// may need to exempt themselves. 905 bool honorsRevision0_98() const { 906 return !getContext().getTargetInfo().getTriple().isOSDarwin(); 907 } 908 909public: 910 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 911 912 virtual void computeInfo(CGFunctionInfo &FI) const; 913 914 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 915 CodeGenFunction &CGF) const; 916}; 917 918/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 919class WinX86_64ABIInfo : public ABIInfo { 920 921 ABIArgInfo classify(QualType Ty) const; 922 923public: 924 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 925 926 virtual void computeInfo(CGFunctionInfo &FI) const; 927 928 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 929 CodeGenFunction &CGF) const; 930}; 931 932class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 933public: 934 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 935 : TargetCodeGenInfo(new X86_64ABIInfo(CGT)) {} 936 937 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 938 return 7; 939 } 940 941 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 942 llvm::Value *Address) const { 943 CodeGen::CGBuilderTy &Builder = CGF.Builder; 944 llvm::LLVMContext &Context = CGF.getLLVMContext(); 945 946 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 947 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 948 949 // 0-15 are the 16 integer registers. 950 // 16 is %rip. 951 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 952 953 return false; 954 } 955 956 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 957 StringRef Constraint, 958 llvm::Type* Ty) const { 959 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 960 } 961 962}; 963 964class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 965public: 966 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 967 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {} 968 969 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 970 return 7; 971 } 972 973 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 974 llvm::Value *Address) const { 975 CodeGen::CGBuilderTy &Builder = CGF.Builder; 976 llvm::LLVMContext &Context = CGF.getLLVMContext(); 977 978 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 979 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 980 981 // 0-15 are the 16 integer registers. 982 // 16 is %rip. 983 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 984 985 return false; 986 } 987}; 988 989} 990 991void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo, 992 Class &Hi) const { 993 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 994 // 995 // (a) If one of the classes is Memory, the whole argument is passed in 996 // memory. 997 // 998 // (b) If X87UP is not preceded by X87, the whole argument is passed in 999 // memory. 1000 // 1001 // (c) If the size of the aggregate exceeds two eightbytes and the first 1002 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole 1003 // argument is passed in memory. NOTE: This is necessary to keep the 1004 // ABI working for processors that don't support the __m256 type. 1005 // 1006 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE. 1007 // 1008 // Some of these are enforced by the merging logic. Others can arise 1009 // only with unions; for example: 1010 // union { _Complex double; unsigned; } 1011 // 1012 // Note that clauses (b) and (c) were added in 0.98. 1013 // 1014 if (Hi == Memory) 1015 Lo = Memory; 1016 if (Hi == X87Up && Lo != X87 && honorsRevision0_98()) 1017 Lo = Memory; 1018 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp)) 1019 Lo = Memory; 1020 if (Hi == SSEUp && Lo != SSE) 1021 Hi = SSE; 1022} 1023 1024X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 1025 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 1026 // classified recursively so that always two fields are 1027 // considered. The resulting class is calculated according to 1028 // the classes of the fields in the eightbyte: 1029 // 1030 // (a) If both classes are equal, this is the resulting class. 1031 // 1032 // (b) If one of the classes is NO_CLASS, the resulting class is 1033 // the other class. 1034 // 1035 // (c) If one of the classes is MEMORY, the result is the MEMORY 1036 // class. 1037 // 1038 // (d) If one of the classes is INTEGER, the result is the 1039 // INTEGER. 1040 // 1041 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 1042 // MEMORY is used as class. 1043 // 1044 // (f) Otherwise class SSE is used. 1045 1046 // Accum should never be memory (we should have returned) or 1047 // ComplexX87 (because this cannot be passed in a structure). 1048 assert((Accum != Memory && Accum != ComplexX87) && 1049 "Invalid accumulated classification during merge."); 1050 if (Accum == Field || Field == NoClass) 1051 return Accum; 1052 if (Field == Memory) 1053 return Memory; 1054 if (Accum == NoClass) 1055 return Field; 1056 if (Accum == Integer || Field == Integer) 1057 return Integer; 1058 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 1059 Accum == X87 || Accum == X87Up) 1060 return Memory; 1061 return SSE; 1062} 1063 1064void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 1065 Class &Lo, Class &Hi) const { 1066 // FIXME: This code can be simplified by introducing a simple value class for 1067 // Class pairs with appropriate constructor methods for the various 1068 // situations. 1069 1070 // FIXME: Some of the split computations are wrong; unaligned vectors 1071 // shouldn't be passed in registers for example, so there is no chance they 1072 // can straddle an eightbyte. Verify & simplify. 1073 1074 Lo = Hi = NoClass; 1075 1076 Class &Current = OffsetBase < 64 ? Lo : Hi; 1077 Current = Memory; 1078 1079 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 1080 BuiltinType::Kind k = BT->getKind(); 1081 1082 if (k == BuiltinType::Void) { 1083 Current = NoClass; 1084 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 1085 Lo = Integer; 1086 Hi = Integer; 1087 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 1088 Current = Integer; 1089 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 1090 Current = SSE; 1091 } else if (k == BuiltinType::LongDouble) { 1092 Lo = X87; 1093 Hi = X87Up; 1094 } 1095 // FIXME: _Decimal32 and _Decimal64 are SSE. 1096 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 1097 return; 1098 } 1099 1100 if (const EnumType *ET = Ty->getAs<EnumType>()) { 1101 // Classify the underlying integer type. 1102 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 1103 return; 1104 } 1105 1106 if (Ty->hasPointerRepresentation()) { 1107 Current = Integer; 1108 return; 1109 } 1110 1111 if (Ty->isMemberPointerType()) { 1112 if (Ty->isMemberFunctionPointerType()) 1113 Lo = Hi = Integer; 1114 else 1115 Current = Integer; 1116 return; 1117 } 1118 1119 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1120 uint64_t Size = getContext().getTypeSize(VT); 1121 if (Size == 32) { 1122 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1123 // float> as integer. 1124 Current = Integer; 1125 1126 // If this type crosses an eightbyte boundary, it should be 1127 // split. 1128 uint64_t EB_Real = (OffsetBase) / 64; 1129 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 1130 if (EB_Real != EB_Imag) 1131 Hi = Lo; 1132 } else if (Size == 64) { 1133 // gcc passes <1 x double> in memory. :( 1134 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 1135 return; 1136 1137 // gcc passes <1 x long long> as INTEGER. 1138 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 1139 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 1140 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 1141 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 1142 Current = Integer; 1143 else 1144 Current = SSE; 1145 1146 // If this type crosses an eightbyte boundary, it should be 1147 // split. 1148 if (OffsetBase && OffsetBase != 64) 1149 Hi = Lo; 1150 } else if (Size == 128 || Size == 256) { 1151 // Arguments of 256-bits are split into four eightbyte chunks. The 1152 // least significant one belongs to class SSE and all the others to class 1153 // SSEUP. The original Lo and Hi design considers that types can't be 1154 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense. 1155 // This design isn't correct for 256-bits, but since there're no cases 1156 // where the upper parts would need to be inspected, avoid adding 1157 // complexity and just consider Hi to match the 64-256 part. 1158 Lo = SSE; 1159 Hi = SSEUp; 1160 } 1161 return; 1162 } 1163 1164 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 1165 QualType ET = getContext().getCanonicalType(CT->getElementType()); 1166 1167 uint64_t Size = getContext().getTypeSize(Ty); 1168 if (ET->isIntegralOrEnumerationType()) { 1169 if (Size <= 64) 1170 Current = Integer; 1171 else if (Size <= 128) 1172 Lo = Hi = Integer; 1173 } else if (ET == getContext().FloatTy) 1174 Current = SSE; 1175 else if (ET == getContext().DoubleTy) 1176 Lo = Hi = SSE; 1177 else if (ET == getContext().LongDoubleTy) 1178 Current = ComplexX87; 1179 1180 // If this complex type crosses an eightbyte boundary then it 1181 // should be split. 1182 uint64_t EB_Real = (OffsetBase) / 64; 1183 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 1184 if (Hi == NoClass && EB_Real != EB_Imag) 1185 Hi = Lo; 1186 1187 return; 1188 } 1189 1190 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 1191 // Arrays are treated like structures. 1192 1193 uint64_t Size = getContext().getTypeSize(Ty); 1194 1195 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1196 // than four eightbytes, ..., it has class MEMORY. 1197 if (Size > 256) 1198 return; 1199 1200 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1201 // fields, it has class MEMORY. 1202 // 1203 // Only need to check alignment of array base. 1204 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1205 return; 1206 1207 // Otherwise implement simplified merge. We could be smarter about 1208 // this, but it isn't worth it and would be harder to verify. 1209 Current = NoClass; 1210 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1211 uint64_t ArraySize = AT->getSize().getZExtValue(); 1212 1213 // The only case a 256-bit wide vector could be used is when the array 1214 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1215 // to work for sizes wider than 128, early check and fallback to memory. 1216 if (Size > 128 && EltSize != 256) 1217 return; 1218 1219 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1220 Class FieldLo, FieldHi; 1221 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 1222 Lo = merge(Lo, FieldLo); 1223 Hi = merge(Hi, FieldHi); 1224 if (Lo == Memory || Hi == Memory) 1225 break; 1226 } 1227 1228 postMerge(Size, Lo, Hi); 1229 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 1230 return; 1231 } 1232 1233 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1234 uint64_t Size = getContext().getTypeSize(Ty); 1235 1236 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1237 // than four eightbytes, ..., it has class MEMORY. 1238 if (Size > 256) 1239 return; 1240 1241 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1242 // copy constructor or a non-trivial destructor, it is passed by invisible 1243 // reference. 1244 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 1245 return; 1246 1247 const RecordDecl *RD = RT->getDecl(); 1248 1249 // Assume variable sized types are passed in memory. 1250 if (RD->hasFlexibleArrayMember()) 1251 return; 1252 1253 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1254 1255 // Reset Lo class, this will be recomputed. 1256 Current = NoClass; 1257 1258 // If this is a C++ record, classify the bases first. 1259 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1260 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1261 e = CXXRD->bases_end(); i != e; ++i) { 1262 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1263 "Unexpected base class!"); 1264 const CXXRecordDecl *Base = 1265 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1266 1267 // Classify this field. 1268 // 1269 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1270 // single eightbyte, each is classified separately. Each eightbyte gets 1271 // initialized to class NO_CLASS. 1272 Class FieldLo, FieldHi; 1273 uint64_t Offset = OffsetBase + Layout.getBaseClassOffsetInBits(Base); 1274 classify(i->getType(), Offset, FieldLo, FieldHi); 1275 Lo = merge(Lo, FieldLo); 1276 Hi = merge(Hi, FieldHi); 1277 if (Lo == Memory || Hi == Memory) 1278 break; 1279 } 1280 } 1281 1282 // Classify the fields one at a time, merging the results. 1283 unsigned idx = 0; 1284 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1285 i != e; ++i, ++idx) { 1286 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1287 bool BitField = i->isBitField(); 1288 1289 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than 1290 // four eightbytes, or it contains unaligned fields, it has class MEMORY. 1291 // 1292 // The only case a 256-bit wide vector could be used is when the struct 1293 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1294 // to work for sizes wider than 128, early check and fallback to memory. 1295 // 1296 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) { 1297 Lo = Memory; 1298 return; 1299 } 1300 // Note, skip this test for bit-fields, see below. 1301 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1302 Lo = Memory; 1303 return; 1304 } 1305 1306 // Classify this field. 1307 // 1308 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1309 // exceeds a single eightbyte, each is classified 1310 // separately. Each eightbyte gets initialized to class 1311 // NO_CLASS. 1312 Class FieldLo, FieldHi; 1313 1314 // Bit-fields require special handling, they do not force the 1315 // structure to be passed in memory even if unaligned, and 1316 // therefore they can straddle an eightbyte. 1317 if (BitField) { 1318 // Ignore padding bit-fields. 1319 if (i->isUnnamedBitfield()) 1320 continue; 1321 1322 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1323 uint64_t Size = 1324 i->getBitWidth()->EvaluateAsInt(getContext()).getZExtValue(); 1325 1326 uint64_t EB_Lo = Offset / 64; 1327 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1328 FieldLo = FieldHi = NoClass; 1329 if (EB_Lo) { 1330 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1331 FieldLo = NoClass; 1332 FieldHi = Integer; 1333 } else { 1334 FieldLo = Integer; 1335 FieldHi = EB_Hi ? Integer : NoClass; 1336 } 1337 } else 1338 classify(i->getType(), Offset, FieldLo, FieldHi); 1339 Lo = merge(Lo, FieldLo); 1340 Hi = merge(Hi, FieldHi); 1341 if (Lo == Memory || Hi == Memory) 1342 break; 1343 } 1344 1345 postMerge(Size, Lo, Hi); 1346 } 1347} 1348 1349ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1350 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1351 // place naturally. 1352 if (!isAggregateTypeForABI(Ty)) { 1353 // Treat an enum type as its underlying type. 1354 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1355 Ty = EnumTy->getDecl()->getIntegerType(); 1356 1357 return (Ty->isPromotableIntegerType() ? 1358 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1359 } 1360 1361 return ABIArgInfo::getIndirect(0); 1362} 1363 1364ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const { 1365 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1366 // place naturally. 1367 if (!isAggregateTypeForABI(Ty)) { 1368 // Treat an enum type as its underlying type. 1369 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1370 Ty = EnumTy->getDecl()->getIntegerType(); 1371 1372 return (Ty->isPromotableIntegerType() ? 1373 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1374 } 1375 1376 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1377 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1378 1379 // Compute the byval alignment. We specify the alignment of the byval in all 1380 // cases so that the mid-level optimizer knows the alignment of the byval. 1381 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U); 1382 return ABIArgInfo::getIndirect(Align); 1383} 1384 1385/// GetByteVectorType - The ABI specifies that a value should be passed in an 1386/// full vector XMM/YMM register. Pick an LLVM IR type that will be passed as a 1387/// vector register. 1388llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const { 1389 llvm::Type *IRType = CGT.ConvertType(Ty); 1390 1391 // Wrapper structs that just contain vectors are passed just like vectors, 1392 // strip them off if present. 1393 llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1394 while (STy && STy->getNumElements() == 1) { 1395 IRType = STy->getElementType(0); 1396 STy = dyn_cast<llvm::StructType>(IRType); 1397 } 1398 1399 // If the preferred type is a 16-byte vector, prefer to pass it. 1400 if (llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1401 llvm::Type *EltTy = VT->getElementType(); 1402 unsigned BitWidth = VT->getBitWidth(); 1403 if ((BitWidth == 128 || BitWidth == 256) && 1404 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1405 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1406 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1407 EltTy->isIntegerTy(128))) 1408 return VT; 1409 } 1410 1411 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1412} 1413 1414/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1415/// is known to either be off the end of the specified type or being in 1416/// alignment padding. The user type specified is known to be at most 128 bits 1417/// in size, and have passed through X86_64ABIInfo::classify with a successful 1418/// classification that put one of the two halves in the INTEGER class. 1419/// 1420/// It is conservatively correct to return false. 1421static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1422 unsigned EndBit, ASTContext &Context) { 1423 // If the bytes being queried are off the end of the type, there is no user 1424 // data hiding here. This handles analysis of builtins, vectors and other 1425 // types that don't contain interesting padding. 1426 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1427 if (TySize <= StartBit) 1428 return true; 1429 1430 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1431 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1432 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1433 1434 // Check each element to see if the element overlaps with the queried range. 1435 for (unsigned i = 0; i != NumElts; ++i) { 1436 // If the element is after the span we care about, then we're done.. 1437 unsigned EltOffset = i*EltSize; 1438 if (EltOffset >= EndBit) break; 1439 1440 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1441 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1442 EndBit-EltOffset, Context)) 1443 return false; 1444 } 1445 // If it overlaps no elements, then it is safe to process as padding. 1446 return true; 1447 } 1448 1449 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1450 const RecordDecl *RD = RT->getDecl(); 1451 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1452 1453 // If this is a C++ record, check the bases first. 1454 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1455 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1456 e = CXXRD->bases_end(); i != e; ++i) { 1457 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1458 "Unexpected base class!"); 1459 const CXXRecordDecl *Base = 1460 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1461 1462 // If the base is after the span we care about, ignore it. 1463 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffsetInBits(Base); 1464 if (BaseOffset >= EndBit) continue; 1465 1466 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1467 if (!BitsContainNoUserData(i->getType(), BaseStart, 1468 EndBit-BaseOffset, Context)) 1469 return false; 1470 } 1471 } 1472 1473 // Verify that no field has data that overlaps the region of interest. Yes 1474 // this could be sped up a lot by being smarter about queried fields, 1475 // however we're only looking at structs up to 16 bytes, so we don't care 1476 // much. 1477 unsigned idx = 0; 1478 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1479 i != e; ++i, ++idx) { 1480 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1481 1482 // If we found a field after the region we care about, then we're done. 1483 if (FieldOffset >= EndBit) break; 1484 1485 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1486 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1487 Context)) 1488 return false; 1489 } 1490 1491 // If nothing in this record overlapped the area of interest, then we're 1492 // clean. 1493 return true; 1494 } 1495 1496 return false; 1497} 1498 1499/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1500/// float member at the specified offset. For example, {int,{float}} has a 1501/// float at offset 4. It is conservatively correct for this routine to return 1502/// false. 1503static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset, 1504 const llvm::TargetData &TD) { 1505 // Base case if we find a float. 1506 if (IROffset == 0 && IRType->isFloatTy()) 1507 return true; 1508 1509 // If this is a struct, recurse into the field at the specified offset. 1510 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1511 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1512 unsigned Elt = SL->getElementContainingOffset(IROffset); 1513 IROffset -= SL->getElementOffset(Elt); 1514 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1515 } 1516 1517 // If this is an array, recurse into the field at the specified offset. 1518 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1519 llvm::Type *EltTy = ATy->getElementType(); 1520 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1521 IROffset -= IROffset/EltSize*EltSize; 1522 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1523 } 1524 1525 return false; 1526} 1527 1528 1529/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1530/// low 8 bytes of an XMM register, corresponding to the SSE class. 1531llvm::Type *X86_64ABIInfo:: 1532GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1533 QualType SourceTy, unsigned SourceOffset) const { 1534 // The only three choices we have are either double, <2 x float>, or float. We 1535 // pass as float if the last 4 bytes is just padding. This happens for 1536 // structs that contain 3 floats. 1537 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1538 SourceOffset*8+64, getContext())) 1539 return llvm::Type::getFloatTy(getVMContext()); 1540 1541 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1542 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1543 // case. 1544 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) && 1545 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData())) 1546 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1547 1548 return llvm::Type::getDoubleTy(getVMContext()); 1549} 1550 1551 1552/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1553/// an 8-byte GPR. This means that we either have a scalar or we are talking 1554/// about the high or low part of an up-to-16-byte struct. This routine picks 1555/// the best LLVM IR type to represent this, which may be i64 or may be anything 1556/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1557/// etc). 1558/// 1559/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1560/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1561/// the 8-byte value references. PrefType may be null. 1562/// 1563/// SourceTy is the source level type for the entire argument. SourceOffset is 1564/// an offset into this that we're processing (which is always either 0 or 8). 1565/// 1566llvm::Type *X86_64ABIInfo:: 1567GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1568 QualType SourceTy, unsigned SourceOffset) const { 1569 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1570 // returning an 8-byte unit starting with it. See if we can safely use it. 1571 if (IROffset == 0) { 1572 // Pointers and int64's always fill the 8-byte unit. 1573 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64)) 1574 return IRType; 1575 1576 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1577 // goodness in the source type is just tail padding. This is allowed to 1578 // kick in for struct {double,int} on the int, but not on 1579 // struct{double,int,int} because we wouldn't return the second int. We 1580 // have to do this analysis on the source type because we can't depend on 1581 // unions being lowered a specific way etc. 1582 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1583 IRType->isIntegerTy(32)) { 1584 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth(); 1585 1586 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1587 SourceOffset*8+64, getContext())) 1588 return IRType; 1589 } 1590 } 1591 1592 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1593 // If this is a struct, recurse into the field at the specified offset. 1594 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy); 1595 if (IROffset < SL->getSizeInBytes()) { 1596 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1597 IROffset -= SL->getElementOffset(FieldIdx); 1598 1599 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1600 SourceTy, SourceOffset); 1601 } 1602 } 1603 1604 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1605 llvm::Type *EltTy = ATy->getElementType(); 1606 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy); 1607 unsigned EltOffset = IROffset/EltSize*EltSize; 1608 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1609 SourceOffset); 1610 } 1611 1612 // Okay, we don't have any better idea of what to pass, so we pass this in an 1613 // integer register that isn't too big to fit the rest of the struct. 1614 unsigned TySizeInBytes = 1615 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 1616 1617 assert(TySizeInBytes != SourceOffset && "Empty field?"); 1618 1619 // It is always safe to classify this as an integer type up to i64 that 1620 // isn't larger than the structure. 1621 return llvm::IntegerType::get(getVMContext(), 1622 std::min(TySizeInBytes-SourceOffset, 8U)*8); 1623} 1624 1625 1626/// GetX86_64ByValArgumentPair - Given a high and low type that can ideally 1627/// be used as elements of a two register pair to pass or return, return a 1628/// first class aggregate to represent them. For example, if the low part of 1629/// a by-value argument should be passed as i32* and the high part as float, 1630/// return {i32*, float}. 1631static llvm::Type * 1632GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi, 1633 const llvm::TargetData &TD) { 1634 // In order to correctly satisfy the ABI, we need to the high part to start 1635 // at offset 8. If the high and low parts we inferred are both 4-byte types 1636 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have 1637 // the second element at offset 8. Check for this: 1638 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo); 1639 unsigned HiAlign = TD.getABITypeAlignment(Hi); 1640 unsigned HiStart = llvm::TargetData::RoundUpAlignment(LoSize, HiAlign); 1641 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!"); 1642 1643 // To handle this, we have to increase the size of the low part so that the 1644 // second element will start at an 8 byte offset. We can't increase the size 1645 // of the second element because it might make us access off the end of the 1646 // struct. 1647 if (HiStart != 8) { 1648 // There are only two sorts of types the ABI generation code can produce for 1649 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32. 1650 // Promote these to a larger type. 1651 if (Lo->isFloatTy()) 1652 Lo = llvm::Type::getDoubleTy(Lo->getContext()); 1653 else { 1654 assert(Lo->isIntegerTy() && "Invalid/unknown lo type"); 1655 Lo = llvm::Type::getInt64Ty(Lo->getContext()); 1656 } 1657 } 1658 1659 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, NULL); 1660 1661 1662 // Verify that the second element is at an 8-byte offset. 1663 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 && 1664 "Invalid x86-64 argument pair!"); 1665 return Result; 1666} 1667 1668ABIArgInfo X86_64ABIInfo:: 1669classifyReturnType(QualType RetTy) const { 1670 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1671 // classification algorithm. 1672 X86_64ABIInfo::Class Lo, Hi; 1673 classify(RetTy, 0, Lo, Hi); 1674 1675 // Check some invariants. 1676 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1677 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1678 1679 llvm::Type *ResType = 0; 1680 switch (Lo) { 1681 case NoClass: 1682 if (Hi == NoClass) 1683 return ABIArgInfo::getIgnore(); 1684 // If the low part is just padding, it takes no register, leave ResType 1685 // null. 1686 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1687 "Unknown missing lo part"); 1688 break; 1689 1690 case SSEUp: 1691 case X87Up: 1692 assert(0 && "Invalid classification for lo word."); 1693 1694 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1695 // hidden argument. 1696 case Memory: 1697 return getIndirectReturnResult(RetTy); 1698 1699 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1700 // available register of the sequence %rax, %rdx is used. 1701 case Integer: 1702 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 1703 1704 // If we have a sign or zero extended integer, make sure to return Extend 1705 // so that the parameter gets the right LLVM IR attributes. 1706 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1707 // Treat an enum type as its underlying type. 1708 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1709 RetTy = EnumTy->getDecl()->getIntegerType(); 1710 1711 if (RetTy->isIntegralOrEnumerationType() && 1712 RetTy->isPromotableIntegerType()) 1713 return ABIArgInfo::getExtend(); 1714 } 1715 break; 1716 1717 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1718 // available SSE register of the sequence %xmm0, %xmm1 is used. 1719 case SSE: 1720 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 1721 break; 1722 1723 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1724 // returned on the X87 stack in %st0 as 80-bit x87 number. 1725 case X87: 1726 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 1727 break; 1728 1729 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1730 // part of the value is returned in %st0 and the imaginary part in 1731 // %st1. 1732 case ComplexX87: 1733 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1734 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()), 1735 llvm::Type::getX86_FP80Ty(getVMContext()), 1736 NULL); 1737 break; 1738 } 1739 1740 llvm::Type *HighPart = 0; 1741 switch (Hi) { 1742 // Memory was handled previously and X87 should 1743 // never occur as a hi class. 1744 case Memory: 1745 case X87: 1746 assert(0 && "Invalid classification for hi word."); 1747 1748 case ComplexX87: // Previously handled. 1749 case NoClass: 1750 break; 1751 1752 case Integer: 1753 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1754 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1755 return ABIArgInfo::getDirect(HighPart, 8); 1756 break; 1757 case SSE: 1758 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1759 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1760 return ABIArgInfo::getDirect(HighPart, 8); 1761 break; 1762 1763 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1764 // is passed in the next available eightbyte chunk if the last used 1765 // vector register. 1766 // 1767 // SSEUP should always be preceded by SSE, just widen. 1768 case SSEUp: 1769 assert(Lo == SSE && "Unexpected SSEUp classification."); 1770 ResType = GetByteVectorType(RetTy); 1771 break; 1772 1773 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1774 // returned together with the previous X87 value in %st0. 1775 case X87Up: 1776 // If X87Up is preceded by X87, we don't need to do 1777 // anything. However, in some cases with unions it may not be 1778 // preceded by X87. In such situations we follow gcc and pass the 1779 // extra bits in an SSE reg. 1780 if (Lo != X87) { 1781 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1782 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1783 return ABIArgInfo::getDirect(HighPart, 8); 1784 } 1785 break; 1786 } 1787 1788 // If a high part was specified, merge it together with the low part. It is 1789 // known to pass in the high eightbyte of the result. We do this by forming a 1790 // first class struct aggregate with the high and low part: {low, high} 1791 if (HighPart) 1792 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1793 1794 return ABIArgInfo::getDirect(ResType); 1795} 1796 1797ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt, 1798 unsigned &neededSSE) const { 1799 X86_64ABIInfo::Class Lo, Hi; 1800 classify(Ty, 0, Lo, Hi); 1801 1802 // Check some invariants. 1803 // FIXME: Enforce these by construction. 1804 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1805 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1806 1807 neededInt = 0; 1808 neededSSE = 0; 1809 llvm::Type *ResType = 0; 1810 switch (Lo) { 1811 case NoClass: 1812 if (Hi == NoClass) 1813 return ABIArgInfo::getIgnore(); 1814 // If the low part is just padding, it takes no register, leave ResType 1815 // null. 1816 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1817 "Unknown missing lo part"); 1818 break; 1819 1820 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1821 // on the stack. 1822 case Memory: 1823 1824 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1825 // COMPLEX_X87, it is passed in memory. 1826 case X87: 1827 case ComplexX87: 1828 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1829 ++neededInt; 1830 return getIndirectResult(Ty); 1831 1832 case SSEUp: 1833 case X87Up: 1834 assert(0 && "Invalid classification for lo word."); 1835 1836 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1837 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1838 // and %r9 is used. 1839 case Integer: 1840 ++neededInt; 1841 1842 // Pick an 8-byte type based on the preferred type. 1843 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0); 1844 1845 // If we have a sign or zero extended integer, make sure to return Extend 1846 // so that the parameter gets the right LLVM IR attributes. 1847 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1848 // Treat an enum type as its underlying type. 1849 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1850 Ty = EnumTy->getDecl()->getIntegerType(); 1851 1852 if (Ty->isIntegralOrEnumerationType() && 1853 Ty->isPromotableIntegerType()) 1854 return ABIArgInfo::getExtend(); 1855 } 1856 1857 break; 1858 1859 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1860 // available SSE register is used, the registers are taken in the 1861 // order from %xmm0 to %xmm7. 1862 case SSE: { 1863 llvm::Type *IRType = CGT.ConvertType(Ty); 1864 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0); 1865 ++neededSSE; 1866 break; 1867 } 1868 } 1869 1870 llvm::Type *HighPart = 0; 1871 switch (Hi) { 1872 // Memory was handled previously, ComplexX87 and X87 should 1873 // never occur as hi classes, and X87Up must be preceded by X87, 1874 // which is passed in memory. 1875 case Memory: 1876 case X87: 1877 case ComplexX87: 1878 assert(0 && "Invalid classification for hi word."); 1879 break; 1880 1881 case NoClass: break; 1882 1883 case Integer: 1884 ++neededInt; 1885 // Pick an 8-byte type based on the preferred type. 1886 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 1887 1888 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1889 return ABIArgInfo::getDirect(HighPart, 8); 1890 break; 1891 1892 // X87Up generally doesn't occur here (long double is passed in 1893 // memory), except in situations involving unions. 1894 case X87Up: 1895 case SSE: 1896 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 1897 1898 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1899 return ABIArgInfo::getDirect(HighPart, 8); 1900 1901 ++neededSSE; 1902 break; 1903 1904 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1905 // eightbyte is passed in the upper half of the last used SSE 1906 // register. This only happens when 128-bit vectors are passed. 1907 case SSEUp: 1908 assert(Lo == SSE && "Unexpected SSEUp classification"); 1909 ResType = GetByteVectorType(Ty); 1910 break; 1911 } 1912 1913 // If a high part was specified, merge it together with the low part. It is 1914 // known to pass in the high eightbyte of the result. We do this by forming a 1915 // first class struct aggregate with the high and low part: {low, high} 1916 if (HighPart) 1917 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1918 1919 return ABIArgInfo::getDirect(ResType); 1920} 1921 1922void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 1923 1924 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1925 1926 // Keep track of the number of assigned registers. 1927 unsigned freeIntRegs = 6, freeSSERegs = 8; 1928 1929 // If the return value is indirect, then the hidden argument is consuming one 1930 // integer register. 1931 if (FI.getReturnInfo().isIndirect()) 1932 --freeIntRegs; 1933 1934 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1935 // get assigned (in left-to-right order) for passing as follows... 1936 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1937 it != ie; ++it) { 1938 unsigned neededInt, neededSSE; 1939 it->info = classifyArgumentType(it->type, neededInt, neededSSE); 1940 1941 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1942 // eightbyte of an argument, the whole argument is passed on the 1943 // stack. If registers have already been assigned for some 1944 // eightbytes of such an argument, the assignments get reverted. 1945 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1946 freeIntRegs -= neededInt; 1947 freeSSERegs -= neededSSE; 1948 } else { 1949 it->info = getIndirectResult(it->type); 1950 } 1951 } 1952} 1953 1954static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1955 QualType Ty, 1956 CodeGenFunction &CGF) { 1957 llvm::Value *overflow_arg_area_p = 1958 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1959 llvm::Value *overflow_arg_area = 1960 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1961 1962 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1963 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1964 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1965 if (Align > 8) { 1966 // Note that we follow the ABI & gcc here, even though the type 1967 // could in theory have an alignment greater than 16. This case 1968 // shouldn't ever matter in practice. 1969 1970 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1971 llvm::Value *Offset = 1972 llvm::ConstantInt::get(CGF.Int32Ty, 15); 1973 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1974 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1975 CGF.Int64Ty); 1976 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~15LL); 1977 overflow_arg_area = 1978 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1979 overflow_arg_area->getType(), 1980 "overflow_arg_area.align"); 1981 } 1982 1983 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1984 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1985 llvm::Value *Res = 1986 CGF.Builder.CreateBitCast(overflow_arg_area, 1987 llvm::PointerType::getUnqual(LTy)); 1988 1989 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1990 // l->overflow_arg_area + sizeof(type). 1991 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1992 // an 8 byte boundary. 1993 1994 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1995 llvm::Value *Offset = 1996 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 1997 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1998 "overflow_arg_area.next"); 1999 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 2000 2001 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 2002 return Res; 2003} 2004 2005llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2006 CodeGenFunction &CGF) const { 2007 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 2008 2009 // Assume that va_list type is correct; should be pointer to LLVM type: 2010 // struct { 2011 // i32 gp_offset; 2012 // i32 fp_offset; 2013 // i8* overflow_arg_area; 2014 // i8* reg_save_area; 2015 // }; 2016 unsigned neededInt, neededSSE; 2017 2018 Ty = CGF.getContext().getCanonicalType(Ty); 2019 ABIArgInfo AI = classifyArgumentType(Ty, neededInt, neededSSE); 2020 2021 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 2022 // in the registers. If not go to step 7. 2023 if (!neededInt && !neededSSE) 2024 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2025 2026 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 2027 // general purpose registers needed to pass type and num_fp to hold 2028 // the number of floating point registers needed. 2029 2030 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 2031 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 2032 // l->fp_offset > 304 - num_fp * 16 go to step 7. 2033 // 2034 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 2035 // register save space). 2036 2037 llvm::Value *InRegs = 0; 2038 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 2039 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 2040 if (neededInt) { 2041 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 2042 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 2043 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 2044 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 2045 } 2046 2047 if (neededSSE) { 2048 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 2049 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 2050 llvm::Value *FitsInFP = 2051 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 2052 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 2053 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 2054 } 2055 2056 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 2057 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 2058 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 2059 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 2060 2061 // Emit code to load the value if it was passed in registers. 2062 2063 CGF.EmitBlock(InRegBlock); 2064 2065 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 2066 // an offset of l->gp_offset and/or l->fp_offset. This may require 2067 // copying to a temporary location in case the parameter is passed 2068 // in different register classes or requires an alignment greater 2069 // than 8 for general purpose registers and 16 for XMM registers. 2070 // 2071 // FIXME: This really results in shameful code when we end up needing to 2072 // collect arguments from different places; often what should result in a 2073 // simple assembling of a structure from scattered addresses has many more 2074 // loads than necessary. Can we clean this up? 2075 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2076 llvm::Value *RegAddr = 2077 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 2078 "reg_save_area"); 2079 if (neededInt && neededSSE) { 2080 // FIXME: Cleanup. 2081 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 2082 llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 2083 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 2084 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 2085 llvm::Type *TyLo = ST->getElementType(0); 2086 llvm::Type *TyHi = ST->getElementType(1); 2087 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 2088 "Unexpected ABI info for mixed regs"); 2089 llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 2090 llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 2091 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2092 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2093 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 2094 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 2095 llvm::Value *V = 2096 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 2097 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2098 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 2099 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2100 2101 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2102 llvm::PointerType::getUnqual(LTy)); 2103 } else if (neededInt) { 2104 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2105 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2106 llvm::PointerType::getUnqual(LTy)); 2107 } else if (neededSSE == 1) { 2108 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2109 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2110 llvm::PointerType::getUnqual(LTy)); 2111 } else { 2112 assert(neededSSE == 2 && "Invalid number of needed registers!"); 2113 // SSE registers are spaced 16 bytes apart in the register save 2114 // area, we need to collect the two eightbytes together. 2115 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2116 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 2117 llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 2118 llvm::Type *DblPtrTy = 2119 llvm::PointerType::getUnqual(DoubleTy); 2120 llvm::StructType *ST = llvm::StructType::get(DoubleTy, 2121 DoubleTy, NULL); 2122 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 2123 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 2124 DblPtrTy)); 2125 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2126 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 2127 DblPtrTy)); 2128 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2129 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2130 llvm::PointerType::getUnqual(LTy)); 2131 } 2132 2133 // AMD64-ABI 3.5.7p5: Step 5. Set: 2134 // l->gp_offset = l->gp_offset + num_gp * 8 2135 // l->fp_offset = l->fp_offset + num_fp * 16. 2136 if (neededInt) { 2137 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 2138 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 2139 gp_offset_p); 2140 } 2141 if (neededSSE) { 2142 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 2143 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 2144 fp_offset_p); 2145 } 2146 CGF.EmitBranch(ContBlock); 2147 2148 // Emit code to load the value if it was passed in memory. 2149 2150 CGF.EmitBlock(InMemBlock); 2151 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2152 2153 // Return the appropriate result. 2154 2155 CGF.EmitBlock(ContBlock); 2156 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2, 2157 "vaarg.addr"); 2158 ResAddr->addIncoming(RegAddr, InRegBlock); 2159 ResAddr->addIncoming(MemAddr, InMemBlock); 2160 return ResAddr; 2161} 2162 2163ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty) const { 2164 2165 if (Ty->isVoidType()) 2166 return ABIArgInfo::getIgnore(); 2167 2168 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2169 Ty = EnumTy->getDecl()->getIntegerType(); 2170 2171 uint64_t Size = getContext().getTypeSize(Ty); 2172 2173 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2174 if (hasNonTrivialDestructorOrCopyConstructor(RT) || 2175 RT->getDecl()->hasFlexibleArrayMember()) 2176 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2177 2178 // FIXME: mingw-w64-gcc emits 128-bit struct as i128 2179 if (Size == 128 && 2180 getContext().getTargetInfo().getTriple().getOS() == llvm::Triple::MinGW32) 2181 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2182 Size)); 2183 2184 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is 2185 // not 1, 2, 4, or 8 bytes, must be passed by reference." 2186 if (Size <= 64 && 2187 (Size & (Size - 1)) == 0) 2188 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2189 Size)); 2190 2191 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2192 } 2193 2194 if (Ty->isPromotableIntegerType()) 2195 return ABIArgInfo::getExtend(); 2196 2197 return ABIArgInfo::getDirect(); 2198} 2199 2200void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2201 2202 QualType RetTy = FI.getReturnType(); 2203 FI.getReturnInfo() = classify(RetTy); 2204 2205 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2206 it != ie; ++it) 2207 it->info = classify(it->type); 2208} 2209 2210llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2211 CodeGenFunction &CGF) const { 2212 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2213 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2214 2215 CGBuilderTy &Builder = CGF.Builder; 2216 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2217 "ap"); 2218 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2219 llvm::Type *PTy = 2220 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2221 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2222 2223 uint64_t Offset = 2224 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 2225 llvm::Value *NextAddr = 2226 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2227 "ap.next"); 2228 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2229 2230 return AddrTyped; 2231} 2232 2233// PowerPC-32 2234 2235namespace { 2236class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2237public: 2238 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2239 2240 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2241 // This is recovered from gcc output. 2242 return 1; // r1 is the dedicated stack pointer 2243 } 2244 2245 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2246 llvm::Value *Address) const; 2247}; 2248 2249} 2250 2251bool 2252PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2253 llvm::Value *Address) const { 2254 // This is calculated from the LLVM and GCC tables and verified 2255 // against gcc output. AFAIK all ABIs use the same encoding. 2256 2257 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2258 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2259 2260 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2261 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2262 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2263 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2264 2265 // 0-31: r0-31, the 4-byte general-purpose registers 2266 AssignToArrayRange(Builder, Address, Four8, 0, 31); 2267 2268 // 32-63: fp0-31, the 8-byte floating-point registers 2269 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2270 2271 // 64-76 are various 4-byte special-purpose registers: 2272 // 64: mq 2273 // 65: lr 2274 // 66: ctr 2275 // 67: ap 2276 // 68-75 cr0-7 2277 // 76: xer 2278 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2279 2280 // 77-108: v0-31, the 16-byte vector registers 2281 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2282 2283 // 109: vrsave 2284 // 110: vscr 2285 // 111: spe_acc 2286 // 112: spefscr 2287 // 113: sfp 2288 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2289 2290 return false; 2291} 2292 2293 2294//===----------------------------------------------------------------------===// 2295// ARM ABI Implementation 2296//===----------------------------------------------------------------------===// 2297 2298namespace { 2299 2300class ARMABIInfo : public ABIInfo { 2301public: 2302 enum ABIKind { 2303 APCS = 0, 2304 AAPCS = 1, 2305 AAPCS_VFP 2306 }; 2307 2308private: 2309 ABIKind Kind; 2310 2311public: 2312 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {} 2313 2314 bool isEABI() const { 2315 StringRef Env = getContext().getTargetInfo().getTriple().getEnvironmentName(); 2316 return (Env == "gnueabi" || Env == "eabi"); 2317 } 2318 2319private: 2320 ABIKind getABIKind() const { return Kind; } 2321 2322 ABIArgInfo classifyReturnType(QualType RetTy) const; 2323 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2324 2325 virtual void computeInfo(CGFunctionInfo &FI) const; 2326 2327 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2328 CodeGenFunction &CGF) const; 2329}; 2330 2331class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 2332public: 2333 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 2334 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 2335 2336 const ARMABIInfo &getABIInfo() const { 2337 return static_cast<const ARMABIInfo&>(TargetCodeGenInfo::getABIInfo()); 2338 } 2339 2340 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2341 return 13; 2342 } 2343 2344 StringRef getARCRetainAutoreleasedReturnValueMarker() const { 2345 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue"; 2346 } 2347 2348 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2349 llvm::Value *Address) const { 2350 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2351 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2352 2353 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2354 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2355 2356 // 0-15 are the 16 integer registers. 2357 AssignToArrayRange(Builder, Address, Four8, 0, 15); 2358 2359 return false; 2360 } 2361 2362 unsigned getSizeOfUnwindException() const { 2363 if (getABIInfo().isEABI()) return 88; 2364 return TargetCodeGenInfo::getSizeOfUnwindException(); 2365 } 2366}; 2367 2368} 2369 2370void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 2371 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2372 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2373 it != ie; ++it) 2374 it->info = classifyArgumentType(it->type); 2375 2376 // Always honor user-specified calling convention. 2377 if (FI.getCallingConvention() != llvm::CallingConv::C) 2378 return; 2379 2380 // Calling convention as default by an ABI. 2381 llvm::CallingConv::ID DefaultCC; 2382 if (isEABI()) 2383 DefaultCC = llvm::CallingConv::ARM_AAPCS; 2384 else 2385 DefaultCC = llvm::CallingConv::ARM_APCS; 2386 2387 // If user did not ask for specific calling convention explicitly (e.g. via 2388 // pcs attribute), set effective calling convention if it's different than ABI 2389 // default. 2390 switch (getABIKind()) { 2391 case APCS: 2392 if (DefaultCC != llvm::CallingConv::ARM_APCS) 2393 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 2394 break; 2395 case AAPCS: 2396 if (DefaultCC != llvm::CallingConv::ARM_AAPCS) 2397 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 2398 break; 2399 case AAPCS_VFP: 2400 if (DefaultCC != llvm::CallingConv::ARM_AAPCS_VFP) 2401 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 2402 break; 2403 } 2404} 2405 2406/// isHomogeneousAggregate - Return true if a type is an AAPCS-VFP homogeneous 2407/// aggregate. If HAMembers is non-null, the number of base elements 2408/// contained in the type is returned through it; this is used for the 2409/// recursive calls that check aggregate component types. 2410static bool isHomogeneousAggregate(QualType Ty, const Type *&Base, 2411 ASTContext &Context, 2412 uint64_t *HAMembers = 0) { 2413 uint64_t Members; 2414 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 2415 if (!isHomogeneousAggregate(AT->getElementType(), Base, Context, &Members)) 2416 return false; 2417 Members *= AT->getSize().getZExtValue(); 2418 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 2419 const RecordDecl *RD = RT->getDecl(); 2420 if (RD->isUnion() || RD->hasFlexibleArrayMember()) 2421 return false; 2422 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 2423 if (!CXXRD->isAggregate()) 2424 return false; 2425 } 2426 Members = 0; 2427 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2428 i != e; ++i) { 2429 const FieldDecl *FD = *i; 2430 uint64_t FldMembers; 2431 if (!isHomogeneousAggregate(FD->getType(), Base, Context, &FldMembers)) 2432 return false; 2433 Members += FldMembers; 2434 } 2435 } else { 2436 Members = 1; 2437 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 2438 Members = 2; 2439 Ty = CT->getElementType(); 2440 } 2441 2442 // Homogeneous aggregates for AAPCS-VFP must have base types of float, 2443 // double, or 64-bit or 128-bit vectors. 2444 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 2445 if (BT->getKind() != BuiltinType::Float && 2446 BT->getKind() != BuiltinType::Double) 2447 return false; 2448 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 2449 unsigned VecSize = Context.getTypeSize(VT); 2450 if (VecSize != 64 && VecSize != 128) 2451 return false; 2452 } else { 2453 return false; 2454 } 2455 2456 // The base type must be the same for all members. Vector types of the 2457 // same total size are treated as being equivalent here. 2458 const Type *TyPtr = Ty.getTypePtr(); 2459 if (!Base) 2460 Base = TyPtr; 2461 if (Base != TyPtr && 2462 (!Base->isVectorType() || !TyPtr->isVectorType() || 2463 Context.getTypeSize(Base) != Context.getTypeSize(TyPtr))) 2464 return false; 2465 } 2466 2467 // Homogeneous Aggregates can have at most 4 members of the base type. 2468 if (HAMembers) 2469 *HAMembers = Members; 2470 return (Members <= 4); 2471} 2472 2473ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const { 2474 if (!isAggregateTypeForABI(Ty)) { 2475 // Treat an enum type as its underlying type. 2476 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2477 Ty = EnumTy->getDecl()->getIntegerType(); 2478 2479 return (Ty->isPromotableIntegerType() ? 2480 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2481 } 2482 2483 // Ignore empty records. 2484 if (isEmptyRecord(getContext(), Ty, true)) 2485 return ABIArgInfo::getIgnore(); 2486 2487 // Structures with either a non-trivial destructor or a non-trivial 2488 // copy constructor are always indirect. 2489 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2490 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2491 2492 if (getABIKind() == ARMABIInfo::AAPCS_VFP) { 2493 // Homogeneous Aggregates need to be expanded. 2494 const Type *Base = 0; 2495 if (isHomogeneousAggregate(Ty, Base, getContext())) 2496 return ABIArgInfo::getExpand(); 2497 } 2498 2499 // Otherwise, pass by coercing to a structure of the appropriate size. 2500 // 2501 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 2502 // backend doesn't support byval. 2503 // FIXME: This doesn't handle alignment > 64 bits. 2504 llvm::Type* ElemTy; 2505 unsigned SizeRegs; 2506 if (getContext().getTypeAlign(Ty) > 32) { 2507 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 2508 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 2509 } else { 2510 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 2511 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 2512 } 2513 2514 llvm::Type *STy = 2515 llvm::StructType::get(llvm::ArrayType::get(ElemTy, SizeRegs), NULL); 2516 return ABIArgInfo::getDirect(STy); 2517} 2518 2519static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 2520 llvm::LLVMContext &VMContext) { 2521 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 2522 // is called integer-like if its size is less than or equal to one word, and 2523 // the offset of each of its addressable sub-fields is zero. 2524 2525 uint64_t Size = Context.getTypeSize(Ty); 2526 2527 // Check that the type fits in a word. 2528 if (Size > 32) 2529 return false; 2530 2531 // FIXME: Handle vector types! 2532 if (Ty->isVectorType()) 2533 return false; 2534 2535 // Float types are never treated as "integer like". 2536 if (Ty->isRealFloatingType()) 2537 return false; 2538 2539 // If this is a builtin or pointer type then it is ok. 2540 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 2541 return true; 2542 2543 // Small complex integer types are "integer like". 2544 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 2545 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 2546 2547 // Single element and zero sized arrays should be allowed, by the definition 2548 // above, but they are not. 2549 2550 // Otherwise, it must be a record type. 2551 const RecordType *RT = Ty->getAs<RecordType>(); 2552 if (!RT) return false; 2553 2554 // Ignore records with flexible arrays. 2555 const RecordDecl *RD = RT->getDecl(); 2556 if (RD->hasFlexibleArrayMember()) 2557 return false; 2558 2559 // Check that all sub-fields are at offset 0, and are themselves "integer 2560 // like". 2561 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 2562 2563 bool HadField = false; 2564 unsigned idx = 0; 2565 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2566 i != e; ++i, ++idx) { 2567 const FieldDecl *FD = *i; 2568 2569 // Bit-fields are not addressable, we only need to verify they are "integer 2570 // like". We still have to disallow a subsequent non-bitfield, for example: 2571 // struct { int : 0; int x } 2572 // is non-integer like according to gcc. 2573 if (FD->isBitField()) { 2574 if (!RD->isUnion()) 2575 HadField = true; 2576 2577 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2578 return false; 2579 2580 continue; 2581 } 2582 2583 // Check if this field is at offset 0. 2584 if (Layout.getFieldOffset(idx) != 0) 2585 return false; 2586 2587 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2588 return false; 2589 2590 // Only allow at most one field in a structure. This doesn't match the 2591 // wording above, but follows gcc in situations with a field following an 2592 // empty structure. 2593 if (!RD->isUnion()) { 2594 if (HadField) 2595 return false; 2596 2597 HadField = true; 2598 } 2599 } 2600 2601 return true; 2602} 2603 2604ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 2605 if (RetTy->isVoidType()) 2606 return ABIArgInfo::getIgnore(); 2607 2608 // Large vector types should be returned via memory. 2609 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) 2610 return ABIArgInfo::getIndirect(0); 2611 2612 if (!isAggregateTypeForABI(RetTy)) { 2613 // Treat an enum type as its underlying type. 2614 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2615 RetTy = EnumTy->getDecl()->getIntegerType(); 2616 2617 return (RetTy->isPromotableIntegerType() ? 2618 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2619 } 2620 2621 // Structures with either a non-trivial destructor or a non-trivial 2622 // copy constructor are always indirect. 2623 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 2624 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2625 2626 // Are we following APCS? 2627 if (getABIKind() == APCS) { 2628 if (isEmptyRecord(getContext(), RetTy, false)) 2629 return ABIArgInfo::getIgnore(); 2630 2631 // Complex types are all returned as packed integers. 2632 // 2633 // FIXME: Consider using 2 x vector types if the back end handles them 2634 // correctly. 2635 if (RetTy->isAnyComplexType()) 2636 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2637 getContext().getTypeSize(RetTy))); 2638 2639 // Integer like structures are returned in r0. 2640 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 2641 // Return in the smallest viable integer type. 2642 uint64_t Size = getContext().getTypeSize(RetTy); 2643 if (Size <= 8) 2644 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2645 if (Size <= 16) 2646 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2647 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2648 } 2649 2650 // Otherwise return in memory. 2651 return ABIArgInfo::getIndirect(0); 2652 } 2653 2654 // Otherwise this is an AAPCS variant. 2655 2656 if (isEmptyRecord(getContext(), RetTy, true)) 2657 return ABIArgInfo::getIgnore(); 2658 2659 // Aggregates <= 4 bytes are returned in r0; other aggregates 2660 // are returned indirectly. 2661 uint64_t Size = getContext().getTypeSize(RetTy); 2662 if (Size <= 32) { 2663 // Return in the smallest viable integer type. 2664 if (Size <= 8) 2665 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2666 if (Size <= 16) 2667 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2668 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2669 } 2670 2671 return ABIArgInfo::getIndirect(0); 2672} 2673 2674llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2675 CodeGenFunction &CGF) const { 2676 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2677 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2678 2679 CGBuilderTy &Builder = CGF.Builder; 2680 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2681 "ap"); 2682 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2683 // Handle address alignment for type alignment > 32 bits 2684 uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8; 2685 if (TyAlign > 4) { 2686 assert((TyAlign & (TyAlign - 1)) == 0 && 2687 "Alignment is not power of 2!"); 2688 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 2689 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1)); 2690 AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1))); 2691 Addr = Builder.CreateIntToPtr(AddrAsInt, BP); 2692 } 2693 llvm::Type *PTy = 2694 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2695 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2696 2697 uint64_t Offset = 2698 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 2699 llvm::Value *NextAddr = 2700 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2701 "ap.next"); 2702 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2703 2704 return AddrTyped; 2705} 2706 2707//===----------------------------------------------------------------------===// 2708// PTX ABI Implementation 2709//===----------------------------------------------------------------------===// 2710 2711namespace { 2712 2713class PTXABIInfo : public ABIInfo { 2714public: 2715 PTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2716 2717 ABIArgInfo classifyReturnType(QualType RetTy) const; 2718 ABIArgInfo classifyArgumentType(QualType Ty) const; 2719 2720 virtual void computeInfo(CGFunctionInfo &FI) const; 2721 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2722 CodeGenFunction &CFG) const; 2723}; 2724 2725class PTXTargetCodeGenInfo : public TargetCodeGenInfo { 2726public: 2727 PTXTargetCodeGenInfo(CodeGenTypes &CGT) 2728 : TargetCodeGenInfo(new PTXABIInfo(CGT)) {} 2729}; 2730 2731ABIArgInfo PTXABIInfo::classifyReturnType(QualType RetTy) const { 2732 if (RetTy->isVoidType()) 2733 return ABIArgInfo::getIgnore(); 2734 if (isAggregateTypeForABI(RetTy)) 2735 return ABIArgInfo::getIndirect(0); 2736 return ABIArgInfo::getDirect(); 2737} 2738 2739ABIArgInfo PTXABIInfo::classifyArgumentType(QualType Ty) const { 2740 if (isAggregateTypeForABI(Ty)) 2741 return ABIArgInfo::getIndirect(0); 2742 2743 return ABIArgInfo::getDirect(); 2744} 2745 2746void PTXABIInfo::computeInfo(CGFunctionInfo &FI) const { 2747 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2748 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2749 it != ie; ++it) 2750 it->info = classifyArgumentType(it->type); 2751 2752 // Always honor user-specified calling convention. 2753 if (FI.getCallingConvention() != llvm::CallingConv::C) 2754 return; 2755 2756 // Calling convention as default by an ABI. 2757 llvm::CallingConv::ID DefaultCC; 2758 StringRef Env = getContext().getTargetInfo().getTriple().getEnvironmentName(); 2759 if (Env == "device") 2760 DefaultCC = llvm::CallingConv::PTX_Device; 2761 else 2762 DefaultCC = llvm::CallingConv::PTX_Kernel; 2763 2764 FI.setEffectiveCallingConvention(DefaultCC); 2765} 2766 2767llvm::Value *PTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2768 CodeGenFunction &CFG) const { 2769 llvm_unreachable("PTX does not support varargs"); 2770 return 0; 2771} 2772 2773} 2774 2775//===----------------------------------------------------------------------===// 2776// SystemZ ABI Implementation 2777//===----------------------------------------------------------------------===// 2778 2779namespace { 2780 2781class SystemZABIInfo : public ABIInfo { 2782public: 2783 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2784 2785 bool isPromotableIntegerType(QualType Ty) const; 2786 2787 ABIArgInfo classifyReturnType(QualType RetTy) const; 2788 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2789 2790 virtual void computeInfo(CGFunctionInfo &FI) const { 2791 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2792 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2793 it != ie; ++it) 2794 it->info = classifyArgumentType(it->type); 2795 } 2796 2797 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2798 CodeGenFunction &CGF) const; 2799}; 2800 2801class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 2802public: 2803 SystemZTargetCodeGenInfo(CodeGenTypes &CGT) 2804 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {} 2805}; 2806 2807} 2808 2809bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 2810 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 2811 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2812 switch (BT->getKind()) { 2813 case BuiltinType::Bool: 2814 case BuiltinType::Char_S: 2815 case BuiltinType::Char_U: 2816 case BuiltinType::SChar: 2817 case BuiltinType::UChar: 2818 case BuiltinType::Short: 2819 case BuiltinType::UShort: 2820 case BuiltinType::Int: 2821 case BuiltinType::UInt: 2822 return true; 2823 default: 2824 return false; 2825 } 2826 return false; 2827} 2828 2829llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2830 CodeGenFunction &CGF) const { 2831 // FIXME: Implement 2832 return 0; 2833} 2834 2835 2836ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const { 2837 if (RetTy->isVoidType()) 2838 return ABIArgInfo::getIgnore(); 2839 if (isAggregateTypeForABI(RetTy)) 2840 return ABIArgInfo::getIndirect(0); 2841 2842 return (isPromotableIntegerType(RetTy) ? 2843 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2844} 2845 2846ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const { 2847 if (isAggregateTypeForABI(Ty)) 2848 return ABIArgInfo::getIndirect(0); 2849 2850 return (isPromotableIntegerType(Ty) ? 2851 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2852} 2853 2854//===----------------------------------------------------------------------===// 2855// MBlaze ABI Implementation 2856//===----------------------------------------------------------------------===// 2857 2858namespace { 2859 2860class MBlazeABIInfo : public ABIInfo { 2861public: 2862 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2863 2864 bool isPromotableIntegerType(QualType Ty) const; 2865 2866 ABIArgInfo classifyReturnType(QualType RetTy) const; 2867 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2868 2869 virtual void computeInfo(CGFunctionInfo &FI) const { 2870 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2871 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2872 it != ie; ++it) 2873 it->info = classifyArgumentType(it->type); 2874 } 2875 2876 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2877 CodeGenFunction &CGF) const; 2878}; 2879 2880class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo { 2881public: 2882 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT) 2883 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {} 2884 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2885 CodeGen::CodeGenModule &M) const; 2886}; 2887 2888} 2889 2890bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const { 2891 // MBlaze ABI requires all 8 and 16 bit quantities to be extended. 2892 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2893 switch (BT->getKind()) { 2894 case BuiltinType::Bool: 2895 case BuiltinType::Char_S: 2896 case BuiltinType::Char_U: 2897 case BuiltinType::SChar: 2898 case BuiltinType::UChar: 2899 case BuiltinType::Short: 2900 case BuiltinType::UShort: 2901 return true; 2902 default: 2903 return false; 2904 } 2905 return false; 2906} 2907 2908llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2909 CodeGenFunction &CGF) const { 2910 // FIXME: Implement 2911 return 0; 2912} 2913 2914 2915ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const { 2916 if (RetTy->isVoidType()) 2917 return ABIArgInfo::getIgnore(); 2918 if (isAggregateTypeForABI(RetTy)) 2919 return ABIArgInfo::getIndirect(0); 2920 2921 return (isPromotableIntegerType(RetTy) ? 2922 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2923} 2924 2925ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const { 2926 if (isAggregateTypeForABI(Ty)) 2927 return ABIArgInfo::getIndirect(0); 2928 2929 return (isPromotableIntegerType(Ty) ? 2930 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2931} 2932 2933void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2934 llvm::GlobalValue *GV, 2935 CodeGen::CodeGenModule &M) 2936 const { 2937 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 2938 if (!FD) return; 2939 2940 llvm::CallingConv::ID CC = llvm::CallingConv::C; 2941 if (FD->hasAttr<MBlazeInterruptHandlerAttr>()) 2942 CC = llvm::CallingConv::MBLAZE_INTR; 2943 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>()) 2944 CC = llvm::CallingConv::MBLAZE_SVOL; 2945 2946 if (CC != llvm::CallingConv::C) { 2947 // Handle 'interrupt_handler' attribute: 2948 llvm::Function *F = cast<llvm::Function>(GV); 2949 2950 // Step 1: Set ISR calling convention. 2951 F->setCallingConv(CC); 2952 2953 // Step 2: Add attributes goodness. 2954 F->addFnAttr(llvm::Attribute::NoInline); 2955 } 2956 2957 // Step 3: Emit _interrupt_handler alias. 2958 if (CC == llvm::CallingConv::MBLAZE_INTR) 2959 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2960 "_interrupt_handler", GV, &M.getModule()); 2961} 2962 2963 2964//===----------------------------------------------------------------------===// 2965// MSP430 ABI Implementation 2966//===----------------------------------------------------------------------===// 2967 2968namespace { 2969 2970class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 2971public: 2972 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 2973 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2974 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2975 CodeGen::CodeGenModule &M) const; 2976}; 2977 2978} 2979 2980void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2981 llvm::GlobalValue *GV, 2982 CodeGen::CodeGenModule &M) const { 2983 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 2984 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 2985 // Handle 'interrupt' attribute: 2986 llvm::Function *F = cast<llvm::Function>(GV); 2987 2988 // Step 1: Set ISR calling convention. 2989 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 2990 2991 // Step 2: Add attributes goodness. 2992 F->addFnAttr(llvm::Attribute::NoInline); 2993 2994 // Step 3: Emit ISR vector alias. 2995 unsigned Num = attr->getNumber() + 0xffe0; 2996 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2997 "vector_" + Twine::utohexstr(Num), 2998 GV, &M.getModule()); 2999 } 3000 } 3001} 3002 3003//===----------------------------------------------------------------------===// 3004// MIPS ABI Implementation. This works for both little-endian and 3005// big-endian variants. 3006//===----------------------------------------------------------------------===// 3007 3008namespace { 3009class MipsABIInfo : public ABIInfo { 3010 static const unsigned MinABIStackAlignInBytes = 4; 3011public: 3012 MipsABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 3013 3014 ABIArgInfo classifyReturnType(QualType RetTy) const; 3015 ABIArgInfo classifyArgumentType(QualType RetTy) const; 3016 virtual void computeInfo(CGFunctionInfo &FI) const; 3017 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3018 CodeGenFunction &CGF) const; 3019}; 3020 3021const unsigned MipsABIInfo::MinABIStackAlignInBytes; 3022 3023class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 3024 unsigned SizeOfUnwindException; 3025public: 3026 MIPSTargetCodeGenInfo(CodeGenTypes &CGT, unsigned SZ) 3027 : TargetCodeGenInfo(new MipsABIInfo(CGT)), SizeOfUnwindException(SZ) {} 3028 3029 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 3030 return 29; 3031 } 3032 3033 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3034 llvm::Value *Address) const; 3035 3036 unsigned getSizeOfUnwindException() const { 3037 return SizeOfUnwindException; 3038 } 3039}; 3040} 3041 3042ABIArgInfo MipsABIInfo::classifyArgumentType(QualType Ty) const { 3043 if (isAggregateTypeForABI(Ty)) { 3044 // Ignore empty aggregates. 3045 if (getContext().getTypeSize(Ty) == 0) 3046 return ABIArgInfo::getIgnore(); 3047 3048 // Records with non trivial destructors/constructors should not be passed 3049 // by value. 3050 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 3051 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3052 3053 return ABIArgInfo::getIndirect(0); 3054 } 3055 3056 // Treat an enum type as its underlying type. 3057 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3058 Ty = EnumTy->getDecl()->getIntegerType(); 3059 3060 return (Ty->isPromotableIntegerType() ? 3061 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3062} 3063 3064ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const { 3065 if (RetTy->isVoidType()) 3066 return ABIArgInfo::getIgnore(); 3067 3068 if (isAggregateTypeForABI(RetTy)) { 3069 if (RetTy->isAnyComplexType()) 3070 return ABIArgInfo::getDirect(); 3071 3072 return ABIArgInfo::getIndirect(0); 3073 } 3074 3075 // Treat an enum type as its underlying type. 3076 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 3077 RetTy = EnumTy->getDecl()->getIntegerType(); 3078 3079 return (RetTy->isPromotableIntegerType() ? 3080 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3081} 3082 3083void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const { 3084 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3085 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3086 it != ie; ++it) 3087 it->info = classifyArgumentType(it->type); 3088} 3089 3090llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3091 CodeGenFunction &CGF) const { 3092 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 3093 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 3094 3095 CGBuilderTy &Builder = CGF.Builder; 3096 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 3097 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3098 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 3099 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3100 llvm::Value *AddrTyped; 3101 3102 if (TypeAlign > MinABIStackAlignInBytes) { 3103 llvm::Value *AddrAsInt32 = CGF.Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 3104 llvm::Value *Inc = llvm::ConstantInt::get(CGF.Int32Ty, TypeAlign - 1); 3105 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -TypeAlign); 3106 llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt32, Inc); 3107 llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask); 3108 AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy); 3109 } 3110 else 3111 AddrTyped = Builder.CreateBitCast(Addr, PTy); 3112 3113 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP); 3114 TypeAlign = std::max(TypeAlign, MinABIStackAlignInBytes); 3115 uint64_t Offset = 3116 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, TypeAlign); 3117 llvm::Value *NextAddr = 3118 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 3119 "ap.next"); 3120 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3121 3122 return AddrTyped; 3123} 3124 3125bool 3126MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3127 llvm::Value *Address) const { 3128 // This information comes from gcc's implementation, which seems to 3129 // as canonical as it gets. 3130 3131 CodeGen::CGBuilderTy &Builder = CGF.Builder; 3132 llvm::LLVMContext &Context = CGF.getLLVMContext(); 3133 3134 // Everything on MIPS is 4 bytes. Double-precision FP registers 3135 // are aliased to pairs of single-precision FP registers. 3136 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 3137 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 3138 3139 // 0-31 are the general purpose registers, $0 - $31. 3140 // 32-63 are the floating-point registers, $f0 - $f31. 3141 // 64 and 65 are the multiply/divide registers, $hi and $lo. 3142 // 66 is the (notional, I think) register for signal-handler return. 3143 AssignToArrayRange(Builder, Address, Four8, 0, 65); 3144 3145 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 3146 // They are one bit wide and ignored here. 3147 3148 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 3149 // (coprocessor 1 is the FP unit) 3150 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 3151 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 3152 // 176-181 are the DSP accumulator registers. 3153 AssignToArrayRange(Builder, Address, Four8, 80, 181); 3154 3155 return false; 3156} 3157 3158 3159const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 3160 if (TheTargetCodeGenInfo) 3161 return *TheTargetCodeGenInfo; 3162 3163 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 3164 // free it. 3165 3166 const llvm::Triple &Triple = getContext().getTargetInfo().getTriple(); 3167 switch (Triple.getArch()) { 3168 default: 3169 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 3170 3171 case llvm::Triple::mips: 3172 case llvm::Triple::mipsel: 3173 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, 24)); 3174 3175 case llvm::Triple::arm: 3176 case llvm::Triple::thumb: 3177 { 3178 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS; 3179 3180 if (strcmp(getContext().getTargetInfo().getABI(), "apcs-gnu") == 0) 3181 Kind = ARMABIInfo::APCS; 3182 else if (CodeGenOpts.FloatABI == "hard") 3183 Kind = ARMABIInfo::AAPCS_VFP; 3184 3185 return *(TheTargetCodeGenInfo = new ARMTargetCodeGenInfo(Types, Kind)); 3186 } 3187 3188 case llvm::Triple::ppc: 3189 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 3190 3191 case llvm::Triple::ptx32: 3192 case llvm::Triple::ptx64: 3193 return *(TheTargetCodeGenInfo = new PTXTargetCodeGenInfo(Types)); 3194 3195 case llvm::Triple::systemz: 3196 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types)); 3197 3198 case llvm::Triple::mblaze: 3199 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types)); 3200 3201 case llvm::Triple::msp430: 3202 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 3203 3204 case llvm::Triple::x86: { 3205 bool DisableMMX = strcmp(getContext().getTargetInfo().getABI(), "no-mmx") == 0; 3206 3207 if (Triple.isOSDarwin()) 3208 return *(TheTargetCodeGenInfo = 3209 new X86_32TargetCodeGenInfo(Types, true, true, DisableMMX)); 3210 3211 switch (Triple.getOS()) { 3212 case llvm::Triple::Cygwin: 3213 case llvm::Triple::MinGW32: 3214 case llvm::Triple::AuroraUX: 3215 case llvm::Triple::DragonFly: 3216 case llvm::Triple::FreeBSD: 3217 case llvm::Triple::OpenBSD: 3218 case llvm::Triple::NetBSD: 3219 return *(TheTargetCodeGenInfo = 3220 new X86_32TargetCodeGenInfo(Types, false, true, DisableMMX)); 3221 3222 default: 3223 return *(TheTargetCodeGenInfo = 3224 new X86_32TargetCodeGenInfo(Types, false, false, DisableMMX)); 3225 } 3226 } 3227 3228 case llvm::Triple::x86_64: 3229 switch (Triple.getOS()) { 3230 case llvm::Triple::Win32: 3231 case llvm::Triple::MinGW32: 3232 case llvm::Triple::Cygwin: 3233 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 3234 default: 3235 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types)); 3236 } 3237 } 3238} 3239