TargetInfo.cpp revision eb2d1f1c88836bd5382e5d7aa8f6b85148a88b27
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "clang/Frontend/CodeGenOptions.h" 20#include "llvm/Type.h" 21#include "llvm/Target/TargetData.h" 22#include "llvm/ADT/Triple.h" 23#include "llvm/Support/raw_ostream.h" 24using namespace clang; 25using namespace CodeGen; 26 27static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 28 llvm::Value *Array, 29 llvm::Value *Value, 30 unsigned FirstIndex, 31 unsigned LastIndex) { 32 // Alternatively, we could emit this as a loop in the source. 33 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 34 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 35 Builder.CreateStore(Value, Cell); 36 } 37} 38 39static bool isAggregateTypeForABI(QualType T) { 40 return CodeGenFunction::hasAggregateLLVMType(T) || 41 T->isMemberFunctionPointerType(); 42} 43 44ABIInfo::~ABIInfo() {} 45 46ASTContext &ABIInfo::getContext() const { 47 return CGT.getContext(); 48} 49 50llvm::LLVMContext &ABIInfo::getVMContext() const { 51 return CGT.getLLVMContext(); 52} 53 54const llvm::TargetData &ABIInfo::getTargetData() const { 55 return CGT.getTargetData(); 56} 57 58 59void ABIArgInfo::dump() const { 60 raw_ostream &OS = llvm::errs(); 61 OS << "(ABIArgInfo Kind="; 62 switch (TheKind) { 63 case Direct: 64 OS << "Direct Type="; 65 if (llvm::Type *Ty = getCoerceToType()) 66 Ty->print(OS); 67 else 68 OS << "null"; 69 break; 70 case Extend: 71 OS << "Extend"; 72 break; 73 case Ignore: 74 OS << "Ignore"; 75 break; 76 case Indirect: 77 OS << "Indirect Align=" << getIndirectAlign() 78 << " ByVal=" << getIndirectByVal() 79 << " Realign=" << getIndirectRealign(); 80 break; 81 case Expand: 82 OS << "Expand"; 83 break; 84 } 85 OS << ")\n"; 86} 87 88TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 89 90// If someone can figure out a general rule for this, that would be great. 91// It's probably just doomed to be platform-dependent, though. 92unsigned TargetCodeGenInfo::getSizeOfUnwindException() const { 93 // Verified for: 94 // x86-64 FreeBSD, Linux, Darwin 95 // x86-32 FreeBSD, Linux, Darwin 96 // PowerPC Linux, Darwin 97 // ARM Darwin (*not* EABI) 98 return 32; 99} 100 101bool TargetCodeGenInfo::isNoProtoCallVariadic(CallingConv CC) const { 102 // The following conventions are known to require this to be false: 103 // x86_stdcall 104 // MIPS 105 // For everything else, we just prefer false unless we opt out. 106 return false; 107} 108 109static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 110 111/// isEmptyField - Return true iff a the field is "empty", that is it 112/// is an unnamed bit-field or an (array of) empty record(s). 113static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 114 bool AllowArrays) { 115 if (FD->isUnnamedBitfield()) 116 return true; 117 118 QualType FT = FD->getType(); 119 120 // Constant arrays of empty records count as empty, strip them off. 121 if (AllowArrays) 122 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 123 FT = AT->getElementType(); 124 125 const RecordType *RT = FT->getAs<RecordType>(); 126 if (!RT) 127 return false; 128 129 // C++ record fields are never empty, at least in the Itanium ABI. 130 // 131 // FIXME: We should use a predicate for whether this behavior is true in the 132 // current ABI. 133 if (isa<CXXRecordDecl>(RT->getDecl())) 134 return false; 135 136 return isEmptyRecord(Context, FT, AllowArrays); 137} 138 139/// isEmptyRecord - Return true iff a structure contains only empty 140/// fields. Note that a structure with a flexible array member is not 141/// considered empty. 142static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 143 const RecordType *RT = T->getAs<RecordType>(); 144 if (!RT) 145 return 0; 146 const RecordDecl *RD = RT->getDecl(); 147 if (RD->hasFlexibleArrayMember()) 148 return false; 149 150 // If this is a C++ record, check the bases first. 151 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 152 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 153 e = CXXRD->bases_end(); i != e; ++i) 154 if (!isEmptyRecord(Context, i->getType(), true)) 155 return false; 156 157 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 158 i != e; ++i) 159 if (!isEmptyField(Context, *i, AllowArrays)) 160 return false; 161 return true; 162} 163 164/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 165/// a non-trivial destructor or a non-trivial copy constructor. 166static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 167 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 168 if (!RD) 169 return false; 170 171 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 172} 173 174/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 175/// a record type with either a non-trivial destructor or a non-trivial copy 176/// constructor. 177static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 178 const RecordType *RT = T->getAs<RecordType>(); 179 if (!RT) 180 return false; 181 182 return hasNonTrivialDestructorOrCopyConstructor(RT); 183} 184 185/// isSingleElementStruct - Determine if a structure is a "single 186/// element struct", i.e. it has exactly one non-empty field or 187/// exactly one field which is itself a single element 188/// struct. Structures with flexible array members are never 189/// considered single element structs. 190/// 191/// \return The field declaration for the single non-empty field, if 192/// it exists. 193static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 194 const RecordType *RT = T->getAsStructureType(); 195 if (!RT) 196 return 0; 197 198 const RecordDecl *RD = RT->getDecl(); 199 if (RD->hasFlexibleArrayMember()) 200 return 0; 201 202 const Type *Found = 0; 203 204 // If this is a C++ record, check the bases first. 205 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 206 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 207 e = CXXRD->bases_end(); i != e; ++i) { 208 // Ignore empty records. 209 if (isEmptyRecord(Context, i->getType(), true)) 210 continue; 211 212 // If we already found an element then this isn't a single-element struct. 213 if (Found) 214 return 0; 215 216 // If this is non-empty and not a single element struct, the composite 217 // cannot be a single element struct. 218 Found = isSingleElementStruct(i->getType(), Context); 219 if (!Found) 220 return 0; 221 } 222 } 223 224 // Check for single element. 225 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 226 i != e; ++i) { 227 const FieldDecl *FD = *i; 228 QualType FT = FD->getType(); 229 230 // Ignore empty fields. 231 if (isEmptyField(Context, FD, true)) 232 continue; 233 234 // If we already found an element then this isn't a single-element 235 // struct. 236 if (Found) 237 return 0; 238 239 // Treat single element arrays as the element. 240 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 241 if (AT->getSize().getZExtValue() != 1) 242 break; 243 FT = AT->getElementType(); 244 } 245 246 if (!isAggregateTypeForABI(FT)) { 247 Found = FT.getTypePtr(); 248 } else { 249 Found = isSingleElementStruct(FT, Context); 250 if (!Found) 251 return 0; 252 } 253 } 254 255 return Found; 256} 257 258static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 259 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 260 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 261 !Ty->isBlockPointerType()) 262 return false; 263 264 uint64_t Size = Context.getTypeSize(Ty); 265 return Size == 32 || Size == 64; 266} 267 268/// canExpandIndirectArgument - Test whether an argument type which is to be 269/// passed indirectly (on the stack) would have the equivalent layout if it was 270/// expanded into separate arguments. If so, we prefer to do the latter to avoid 271/// inhibiting optimizations. 272/// 273// FIXME: This predicate is missing many cases, currently it just follows 274// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 275// should probably make this smarter, or better yet make the LLVM backend 276// capable of handling it. 277static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 278 // We can only expand structure types. 279 const RecordType *RT = Ty->getAs<RecordType>(); 280 if (!RT) 281 return false; 282 283 // We can only expand (C) structures. 284 // 285 // FIXME: This needs to be generalized to handle classes as well. 286 const RecordDecl *RD = RT->getDecl(); 287 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 288 return false; 289 290 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 291 i != e; ++i) { 292 const FieldDecl *FD = *i; 293 294 if (!is32Or64BitBasicType(FD->getType(), Context)) 295 return false; 296 297 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 298 // how to expand them yet, and the predicate for telling if a bitfield still 299 // counts as "basic" is more complicated than what we were doing previously. 300 if (FD->isBitField()) 301 return false; 302 } 303 304 return true; 305} 306 307namespace { 308/// DefaultABIInfo - The default implementation for ABI specific 309/// details. This implementation provides information which results in 310/// self-consistent and sensible LLVM IR generation, but does not 311/// conform to any particular ABI. 312class DefaultABIInfo : public ABIInfo { 313public: 314 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 315 316 ABIArgInfo classifyReturnType(QualType RetTy) const; 317 ABIArgInfo classifyArgumentType(QualType RetTy) const; 318 319 virtual void computeInfo(CGFunctionInfo &FI) const { 320 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 321 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 322 it != ie; ++it) 323 it->info = classifyArgumentType(it->type); 324 } 325 326 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 327 CodeGenFunction &CGF) const; 328}; 329 330class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 331public: 332 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 333 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 334}; 335 336llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 337 CodeGenFunction &CGF) const { 338 return 0; 339} 340 341ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 342 if (isAggregateTypeForABI(Ty)) 343 return ABIArgInfo::getIndirect(0); 344 345 // Treat an enum type as its underlying type. 346 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 347 Ty = EnumTy->getDecl()->getIntegerType(); 348 349 return (Ty->isPromotableIntegerType() ? 350 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 351} 352 353ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 354 if (RetTy->isVoidType()) 355 return ABIArgInfo::getIgnore(); 356 357 if (isAggregateTypeForABI(RetTy)) 358 return ABIArgInfo::getIndirect(0); 359 360 // Treat an enum type as its underlying type. 361 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 362 RetTy = EnumTy->getDecl()->getIntegerType(); 363 364 return (RetTy->isPromotableIntegerType() ? 365 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 366} 367 368/// UseX86_MMXType - Return true if this is an MMX type that should use the special 369/// x86_mmx type. 370bool UseX86_MMXType(llvm::Type *IRType) { 371 // If the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>, use the 372 // special x86_mmx type. 373 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && 374 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && 375 IRType->getScalarSizeInBits() != 64; 376} 377 378static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 379 StringRef Constraint, 380 llvm::Type* Ty) { 381 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) 382 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext()); 383 return Ty; 384} 385 386//===----------------------------------------------------------------------===// 387// X86-32 ABI Implementation 388//===----------------------------------------------------------------------===// 389 390/// X86_32ABIInfo - The X86-32 ABI information. 391class X86_32ABIInfo : public ABIInfo { 392 static const unsigned MinABIStackAlignInBytes = 4; 393 394 bool IsDarwinVectorABI; 395 bool IsSmallStructInRegABI; 396 bool IsMMXDisabled; 397 398 static bool isRegisterSize(unsigned Size) { 399 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 400 } 401 402 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 403 404 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 405 /// such that the argument will be passed in memory. 406 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const; 407 408 /// \brief Return the alignment to use for the given type on the stack. 409 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const; 410 411public: 412 413 ABIArgInfo classifyReturnType(QualType RetTy) const; 414 ABIArgInfo classifyArgumentType(QualType RetTy) const; 415 416 virtual void computeInfo(CGFunctionInfo &FI) const { 417 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 418 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 419 it != ie; ++it) 420 it->info = classifyArgumentType(it->type); 421 } 422 423 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 424 CodeGenFunction &CGF) const; 425 426 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m) 427 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p), 428 IsMMXDisabled(m) {} 429}; 430 431class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 432public: 433 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m) 434 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, m)) {} 435 436 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 437 CodeGen::CodeGenModule &CGM) const; 438 439 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 440 // Darwin uses different dwarf register numbers for EH. 441 if (CGM.isTargetDarwin()) return 5; 442 443 return 4; 444 } 445 446 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 447 llvm::Value *Address) const; 448 449 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 450 StringRef Constraint, 451 llvm::Type* Ty) const { 452 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 453 } 454 455}; 456 457} 458 459/// shouldReturnTypeInRegister - Determine if the given type should be 460/// passed in a register (for the Darwin ABI). 461bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 462 ASTContext &Context) { 463 uint64_t Size = Context.getTypeSize(Ty); 464 465 // Type must be register sized. 466 if (!isRegisterSize(Size)) 467 return false; 468 469 if (Ty->isVectorType()) { 470 // 64- and 128- bit vectors inside structures are not returned in 471 // registers. 472 if (Size == 64 || Size == 128) 473 return false; 474 475 return true; 476 } 477 478 // If this is a builtin, pointer, enum, complex type, member pointer, or 479 // member function pointer it is ok. 480 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 481 Ty->isAnyComplexType() || Ty->isEnumeralType() || 482 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 483 return true; 484 485 // Arrays are treated like records. 486 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 487 return shouldReturnTypeInRegister(AT->getElementType(), Context); 488 489 // Otherwise, it must be a record type. 490 const RecordType *RT = Ty->getAs<RecordType>(); 491 if (!RT) return false; 492 493 // FIXME: Traverse bases here too. 494 495 // Structure types are passed in register if all fields would be 496 // passed in a register. 497 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 498 e = RT->getDecl()->field_end(); i != e; ++i) { 499 const FieldDecl *FD = *i; 500 501 // Empty fields are ignored. 502 if (isEmptyField(Context, FD, true)) 503 continue; 504 505 // Check fields recursively. 506 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 507 return false; 508 } 509 510 return true; 511} 512 513ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy) const { 514 if (RetTy->isVoidType()) 515 return ABIArgInfo::getIgnore(); 516 517 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 518 // On Darwin, some vectors are returned in registers. 519 if (IsDarwinVectorABI) { 520 uint64_t Size = getContext().getTypeSize(RetTy); 521 522 // 128-bit vectors are a special case; they are returned in 523 // registers and we need to make sure to pick a type the LLVM 524 // backend will like. 525 if (Size == 128) 526 return ABIArgInfo::getDirect(llvm::VectorType::get( 527 llvm::Type::getInt64Ty(getVMContext()), 2)); 528 529 // Always return in register if it fits in a general purpose 530 // register, or if it is 64 bits and has a single element. 531 if ((Size == 8 || Size == 16 || Size == 32) || 532 (Size == 64 && VT->getNumElements() == 1)) 533 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 534 Size)); 535 536 return ABIArgInfo::getIndirect(0); 537 } 538 539 return ABIArgInfo::getDirect(); 540 } 541 542 if (isAggregateTypeForABI(RetTy)) { 543 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 544 // Structures with either a non-trivial destructor or a non-trivial 545 // copy constructor are always indirect. 546 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 547 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 548 549 // Structures with flexible arrays are always indirect. 550 if (RT->getDecl()->hasFlexibleArrayMember()) 551 return ABIArgInfo::getIndirect(0); 552 } 553 554 // If specified, structs and unions are always indirect. 555 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 556 return ABIArgInfo::getIndirect(0); 557 558 // Classify "single element" structs as their element type. 559 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) { 560 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 561 if (BT->isIntegerType()) { 562 // We need to use the size of the structure, padding 563 // bit-fields can adjust that to be larger than the single 564 // element type. 565 uint64_t Size = getContext().getTypeSize(RetTy); 566 return ABIArgInfo::getDirect( 567 llvm::IntegerType::get(getVMContext(), (unsigned)Size)); 568 } 569 570 if (BT->getKind() == BuiltinType::Float) { 571 assert(getContext().getTypeSize(RetTy) == 572 getContext().getTypeSize(SeltTy) && 573 "Unexpect single element structure size!"); 574 return ABIArgInfo::getDirect(llvm::Type::getFloatTy(getVMContext())); 575 } 576 577 if (BT->getKind() == BuiltinType::Double) { 578 assert(getContext().getTypeSize(RetTy) == 579 getContext().getTypeSize(SeltTy) && 580 "Unexpect single element structure size!"); 581 return ABIArgInfo::getDirect(llvm::Type::getDoubleTy(getVMContext())); 582 } 583 } else if (SeltTy->isPointerType()) { 584 // FIXME: It would be really nice if this could come out as the proper 585 // pointer type. 586 llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(getVMContext()); 587 return ABIArgInfo::getDirect(PtrTy); 588 } else if (SeltTy->isVectorType()) { 589 // 64- and 128-bit vectors are never returned in a 590 // register when inside a structure. 591 uint64_t Size = getContext().getTypeSize(RetTy); 592 if (Size == 64 || Size == 128) 593 return ABIArgInfo::getIndirect(0); 594 595 return classifyReturnType(QualType(SeltTy, 0)); 596 } 597 } 598 599 // Small structures which are register sized are generally returned 600 // in a register. 601 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext())) { 602 uint64_t Size = getContext().getTypeSize(RetTy); 603 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 604 } 605 606 return ABIArgInfo::getIndirect(0); 607 } 608 609 // Treat an enum type as its underlying type. 610 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 611 RetTy = EnumTy->getDecl()->getIntegerType(); 612 613 return (RetTy->isPromotableIntegerType() ? 614 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 615} 616 617static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) { 618 const RecordType *RT = Ty->getAs<RecordType>(); 619 if (!RT) 620 return 0; 621 const RecordDecl *RD = RT->getDecl(); 622 623 // If this is a C++ record, check the bases first. 624 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 625 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 626 e = CXXRD->bases_end(); i != e; ++i) 627 if (!isRecordWithSSEVectorType(Context, i->getType())) 628 return false; 629 630 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 631 i != e; ++i) { 632 QualType FT = i->getType(); 633 634 if (FT->getAs<VectorType>() && Context.getTypeSize(Ty) == 128) 635 return true; 636 637 if (isRecordWithSSEVectorType(Context, FT)) 638 return true; 639 } 640 641 return false; 642} 643 644unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty, 645 unsigned Align) const { 646 // Otherwise, if the alignment is less than or equal to the minimum ABI 647 // alignment, just use the default; the backend will handle this. 648 if (Align <= MinABIStackAlignInBytes) 649 return 0; // Use default alignment. 650 651 // On non-Darwin, the stack type alignment is always 4. 652 if (!IsDarwinVectorABI) { 653 // Set explicit alignment, since we may need to realign the top. 654 return MinABIStackAlignInBytes; 655 } 656 657 // Otherwise, if the type contains an SSE vector type, the alignment is 16. 658 if (isRecordWithSSEVectorType(getContext(), Ty)) 659 return 16; 660 661 return MinABIStackAlignInBytes; 662} 663 664ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const { 665 if (!ByVal) 666 return ABIArgInfo::getIndirect(0, false); 667 668 // Compute the byval alignment. 669 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 670 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign); 671 if (StackAlign == 0) 672 return ABIArgInfo::getIndirect(4); 673 674 // If the stack alignment is less than the type alignment, realign the 675 // argument. 676 if (StackAlign < TypeAlign) 677 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, 678 /*Realign=*/true); 679 680 return ABIArgInfo::getIndirect(StackAlign); 681} 682 683ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const { 684 // FIXME: Set alignment on indirect arguments. 685 if (isAggregateTypeForABI(Ty)) { 686 // Structures with flexible arrays are always indirect. 687 if (const RecordType *RT = Ty->getAs<RecordType>()) { 688 // Structures with either a non-trivial destructor or a non-trivial 689 // copy constructor are always indirect. 690 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 691 return getIndirectResult(Ty, /*ByVal=*/false); 692 693 if (RT->getDecl()->hasFlexibleArrayMember()) 694 return getIndirectResult(Ty); 695 } 696 697 // Ignore empty structs. 698 if (Ty->isStructureType() && getContext().getTypeSize(Ty) == 0) 699 return ABIArgInfo::getIgnore(); 700 701 // Expand small (<= 128-bit) record types when we know that the stack layout 702 // of those arguments will match the struct. This is important because the 703 // LLVM backend isn't smart enough to remove byval, which inhibits many 704 // optimizations. 705 if (getContext().getTypeSize(Ty) <= 4*32 && 706 canExpandIndirectArgument(Ty, getContext())) 707 return ABIArgInfo::getExpand(); 708 709 return getIndirectResult(Ty); 710 } 711 712 if (const VectorType *VT = Ty->getAs<VectorType>()) { 713 // On Darwin, some vectors are passed in memory, we handle this by passing 714 // it as an i8/i16/i32/i64. 715 if (IsDarwinVectorABI) { 716 uint64_t Size = getContext().getTypeSize(Ty); 717 if ((Size == 8 || Size == 16 || Size == 32) || 718 (Size == 64 && VT->getNumElements() == 1)) 719 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 720 Size)); 721 } 722 723 llvm::Type *IRType = CGT.ConvertType(Ty); 724 if (UseX86_MMXType(IRType)) { 725 if (IsMMXDisabled) 726 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 727 64)); 728 ABIArgInfo AAI = ABIArgInfo::getDirect(IRType); 729 AAI.setCoerceToType(llvm::Type::getX86_MMXTy(getVMContext())); 730 return AAI; 731 } 732 733 return ABIArgInfo::getDirect(); 734 } 735 736 737 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 738 Ty = EnumTy->getDecl()->getIntegerType(); 739 740 return (Ty->isPromotableIntegerType() ? 741 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 742} 743 744llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 745 CodeGenFunction &CGF) const { 746 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 747 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 748 749 CGBuilderTy &Builder = CGF.Builder; 750 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 751 "ap"); 752 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 753 llvm::Type *PTy = 754 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 755 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 756 757 uint64_t Offset = 758 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 759 llvm::Value *NextAddr = 760 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 761 "ap.next"); 762 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 763 764 return AddrTyped; 765} 766 767void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 768 llvm::GlobalValue *GV, 769 CodeGen::CodeGenModule &CGM) const { 770 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 771 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 772 // Get the LLVM function. 773 llvm::Function *Fn = cast<llvm::Function>(GV); 774 775 // Now add the 'alignstack' attribute with a value of 16. 776 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 777 } 778 } 779} 780 781bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 782 CodeGen::CodeGenFunction &CGF, 783 llvm::Value *Address) const { 784 CodeGen::CGBuilderTy &Builder = CGF.Builder; 785 llvm::LLVMContext &Context = CGF.getLLVMContext(); 786 787 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 788 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 789 790 // 0-7 are the eight integer registers; the order is different 791 // on Darwin (for EH), but the range is the same. 792 // 8 is %eip. 793 AssignToArrayRange(Builder, Address, Four8, 0, 8); 794 795 if (CGF.CGM.isTargetDarwin()) { 796 // 12-16 are st(0..4). Not sure why we stop at 4. 797 // These have size 16, which is sizeof(long double) on 798 // platforms with 8-byte alignment for that type. 799 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 800 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 801 802 } else { 803 // 9 is %eflags, which doesn't get a size on Darwin for some 804 // reason. 805 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 806 807 // 11-16 are st(0..5). Not sure why we stop at 5. 808 // These have size 12, which is sizeof(long double) on 809 // platforms with 4-byte alignment for that type. 810 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 811 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 812 } 813 814 return false; 815} 816 817//===----------------------------------------------------------------------===// 818// X86-64 ABI Implementation 819//===----------------------------------------------------------------------===// 820 821 822namespace { 823/// X86_64ABIInfo - The X86_64 ABI information. 824class X86_64ABIInfo : public ABIInfo { 825 enum Class { 826 Integer = 0, 827 SSE, 828 SSEUp, 829 X87, 830 X87Up, 831 ComplexX87, 832 NoClass, 833 Memory 834 }; 835 836 /// merge - Implement the X86_64 ABI merging algorithm. 837 /// 838 /// Merge an accumulating classification \arg Accum with a field 839 /// classification \arg Field. 840 /// 841 /// \param Accum - The accumulating classification. This should 842 /// always be either NoClass or the result of a previous merge 843 /// call. In addition, this should never be Memory (the caller 844 /// should just return Memory for the aggregate). 845 static Class merge(Class Accum, Class Field); 846 847 /// postMerge - Implement the X86_64 ABI post merging algorithm. 848 /// 849 /// Post merger cleanup, reduces a malformed Hi and Lo pair to 850 /// final MEMORY or SSE classes when necessary. 851 /// 852 /// \param AggregateSize - The size of the current aggregate in 853 /// the classification process. 854 /// 855 /// \param Lo - The classification for the parts of the type 856 /// residing in the low word of the containing object. 857 /// 858 /// \param Hi - The classification for the parts of the type 859 /// residing in the higher words of the containing object. 860 /// 861 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const; 862 863 /// classify - Determine the x86_64 register classes in which the 864 /// given type T should be passed. 865 /// 866 /// \param Lo - The classification for the parts of the type 867 /// residing in the low word of the containing object. 868 /// 869 /// \param Hi - The classification for the parts of the type 870 /// residing in the high word of the containing object. 871 /// 872 /// \param OffsetBase - The bit offset of this type in the 873 /// containing object. Some parameters are classified different 874 /// depending on whether they straddle an eightbyte boundary. 875 /// 876 /// If a word is unused its result will be NoClass; if a type should 877 /// be passed in Memory then at least the classification of \arg Lo 878 /// will be Memory. 879 /// 880 /// The \arg Lo class will be NoClass iff the argument is ignored. 881 /// 882 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 883 /// also be ComplexX87. 884 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 885 886 llvm::Type *GetByteVectorType(QualType Ty) const; 887 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType, 888 unsigned IROffset, QualType SourceTy, 889 unsigned SourceOffset) const; 890 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType, 891 unsigned IROffset, QualType SourceTy, 892 unsigned SourceOffset) const; 893 894 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 895 /// such that the argument will be returned in memory. 896 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 897 898 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 899 /// such that the argument will be passed in memory. 900 ABIArgInfo getIndirectResult(QualType Ty) const; 901 902 ABIArgInfo classifyReturnType(QualType RetTy) const; 903 904 ABIArgInfo classifyArgumentType(QualType Ty, 905 unsigned &neededInt, 906 unsigned &neededSSE) const; 907 908 /// The 0.98 ABI revision clarified a lot of ambiguities, 909 /// unfortunately in ways that were not always consistent with 910 /// certain previous compilers. In particular, platforms which 911 /// required strict binary compatibility with older versions of GCC 912 /// may need to exempt themselves. 913 bool honorsRevision0_98() const { 914 return !getContext().getTargetInfo().getTriple().isOSDarwin(); 915 } 916 917public: 918 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 919 920 virtual void computeInfo(CGFunctionInfo &FI) const; 921 922 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 923 CodeGenFunction &CGF) const; 924}; 925 926/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 927class WinX86_64ABIInfo : public ABIInfo { 928 929 ABIArgInfo classify(QualType Ty) const; 930 931public: 932 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 933 934 virtual void computeInfo(CGFunctionInfo &FI) const; 935 936 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 937 CodeGenFunction &CGF) const; 938}; 939 940class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 941public: 942 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 943 : TargetCodeGenInfo(new X86_64ABIInfo(CGT)) {} 944 945 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 946 return 7; 947 } 948 949 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 950 llvm::Value *Address) const { 951 CodeGen::CGBuilderTy &Builder = CGF.Builder; 952 llvm::LLVMContext &Context = CGF.getLLVMContext(); 953 954 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 955 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 956 957 // 0-15 are the 16 integer registers. 958 // 16 is %rip. 959 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 960 961 return false; 962 } 963 964 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 965 StringRef Constraint, 966 llvm::Type* Ty) const { 967 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 968 } 969 970 bool isNoProtoCallVariadic(CallingConv CC) const { 971 // The default CC on x86-64 sets %al to the number of SSA 972 // registers used, and GCC sets this when calling an unprototyped 973 // function, so we override the default behavior. 974 if (CC == CC_Default || CC == CC_C) return true; 975 976 return TargetCodeGenInfo::isNoProtoCallVariadic(CC); 977 } 978 979}; 980 981class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 982public: 983 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 984 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {} 985 986 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 987 return 7; 988 } 989 990 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 991 llvm::Value *Address) const { 992 CodeGen::CGBuilderTy &Builder = CGF.Builder; 993 llvm::LLVMContext &Context = CGF.getLLVMContext(); 994 995 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 996 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 997 998 // 0-15 are the 16 integer registers. 999 // 16 is %rip. 1000 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 1001 1002 return false; 1003 } 1004}; 1005 1006} 1007 1008void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo, 1009 Class &Hi) const { 1010 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1011 // 1012 // (a) If one of the classes is Memory, the whole argument is passed in 1013 // memory. 1014 // 1015 // (b) If X87UP is not preceded by X87, the whole argument is passed in 1016 // memory. 1017 // 1018 // (c) If the size of the aggregate exceeds two eightbytes and the first 1019 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole 1020 // argument is passed in memory. NOTE: This is necessary to keep the 1021 // ABI working for processors that don't support the __m256 type. 1022 // 1023 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE. 1024 // 1025 // Some of these are enforced by the merging logic. Others can arise 1026 // only with unions; for example: 1027 // union { _Complex double; unsigned; } 1028 // 1029 // Note that clauses (b) and (c) were added in 0.98. 1030 // 1031 if (Hi == Memory) 1032 Lo = Memory; 1033 if (Hi == X87Up && Lo != X87 && honorsRevision0_98()) 1034 Lo = Memory; 1035 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp)) 1036 Lo = Memory; 1037 if (Hi == SSEUp && Lo != SSE) 1038 Hi = SSE; 1039} 1040 1041X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 1042 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 1043 // classified recursively so that always two fields are 1044 // considered. The resulting class is calculated according to 1045 // the classes of the fields in the eightbyte: 1046 // 1047 // (a) If both classes are equal, this is the resulting class. 1048 // 1049 // (b) If one of the classes is NO_CLASS, the resulting class is 1050 // the other class. 1051 // 1052 // (c) If one of the classes is MEMORY, the result is the MEMORY 1053 // class. 1054 // 1055 // (d) If one of the classes is INTEGER, the result is the 1056 // INTEGER. 1057 // 1058 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 1059 // MEMORY is used as class. 1060 // 1061 // (f) Otherwise class SSE is used. 1062 1063 // Accum should never be memory (we should have returned) or 1064 // ComplexX87 (because this cannot be passed in a structure). 1065 assert((Accum != Memory && Accum != ComplexX87) && 1066 "Invalid accumulated classification during merge."); 1067 if (Accum == Field || Field == NoClass) 1068 return Accum; 1069 if (Field == Memory) 1070 return Memory; 1071 if (Accum == NoClass) 1072 return Field; 1073 if (Accum == Integer || Field == Integer) 1074 return Integer; 1075 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 1076 Accum == X87 || Accum == X87Up) 1077 return Memory; 1078 return SSE; 1079} 1080 1081void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 1082 Class &Lo, Class &Hi) const { 1083 // FIXME: This code can be simplified by introducing a simple value class for 1084 // Class pairs with appropriate constructor methods for the various 1085 // situations. 1086 1087 // FIXME: Some of the split computations are wrong; unaligned vectors 1088 // shouldn't be passed in registers for example, so there is no chance they 1089 // can straddle an eightbyte. Verify & simplify. 1090 1091 Lo = Hi = NoClass; 1092 1093 Class &Current = OffsetBase < 64 ? Lo : Hi; 1094 Current = Memory; 1095 1096 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 1097 BuiltinType::Kind k = BT->getKind(); 1098 1099 if (k == BuiltinType::Void) { 1100 Current = NoClass; 1101 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 1102 Lo = Integer; 1103 Hi = Integer; 1104 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 1105 Current = Integer; 1106 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 1107 Current = SSE; 1108 } else if (k == BuiltinType::LongDouble) { 1109 Lo = X87; 1110 Hi = X87Up; 1111 } 1112 // FIXME: _Decimal32 and _Decimal64 are SSE. 1113 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 1114 return; 1115 } 1116 1117 if (const EnumType *ET = Ty->getAs<EnumType>()) { 1118 // Classify the underlying integer type. 1119 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 1120 return; 1121 } 1122 1123 if (Ty->hasPointerRepresentation()) { 1124 Current = Integer; 1125 return; 1126 } 1127 1128 if (Ty->isMemberPointerType()) { 1129 if (Ty->isMemberFunctionPointerType()) 1130 Lo = Hi = Integer; 1131 else 1132 Current = Integer; 1133 return; 1134 } 1135 1136 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1137 uint64_t Size = getContext().getTypeSize(VT); 1138 if (Size == 32) { 1139 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1140 // float> as integer. 1141 Current = Integer; 1142 1143 // If this type crosses an eightbyte boundary, it should be 1144 // split. 1145 uint64_t EB_Real = (OffsetBase) / 64; 1146 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 1147 if (EB_Real != EB_Imag) 1148 Hi = Lo; 1149 } else if (Size == 64) { 1150 // gcc passes <1 x double> in memory. :( 1151 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 1152 return; 1153 1154 // gcc passes <1 x long long> as INTEGER. 1155 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 1156 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 1157 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 1158 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 1159 Current = Integer; 1160 else 1161 Current = SSE; 1162 1163 // If this type crosses an eightbyte boundary, it should be 1164 // split. 1165 if (OffsetBase && OffsetBase != 64) 1166 Hi = Lo; 1167 } else if (Size == 128 || Size == 256) { 1168 // Arguments of 256-bits are split into four eightbyte chunks. The 1169 // least significant one belongs to class SSE and all the others to class 1170 // SSEUP. The original Lo and Hi design considers that types can't be 1171 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense. 1172 // This design isn't correct for 256-bits, but since there're no cases 1173 // where the upper parts would need to be inspected, avoid adding 1174 // complexity and just consider Hi to match the 64-256 part. 1175 Lo = SSE; 1176 Hi = SSEUp; 1177 } 1178 return; 1179 } 1180 1181 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 1182 QualType ET = getContext().getCanonicalType(CT->getElementType()); 1183 1184 uint64_t Size = getContext().getTypeSize(Ty); 1185 if (ET->isIntegralOrEnumerationType()) { 1186 if (Size <= 64) 1187 Current = Integer; 1188 else if (Size <= 128) 1189 Lo = Hi = Integer; 1190 } else if (ET == getContext().FloatTy) 1191 Current = SSE; 1192 else if (ET == getContext().DoubleTy) 1193 Lo = Hi = SSE; 1194 else if (ET == getContext().LongDoubleTy) 1195 Current = ComplexX87; 1196 1197 // If this complex type crosses an eightbyte boundary then it 1198 // should be split. 1199 uint64_t EB_Real = (OffsetBase) / 64; 1200 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 1201 if (Hi == NoClass && EB_Real != EB_Imag) 1202 Hi = Lo; 1203 1204 return; 1205 } 1206 1207 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 1208 // Arrays are treated like structures. 1209 1210 uint64_t Size = getContext().getTypeSize(Ty); 1211 1212 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1213 // than four eightbytes, ..., it has class MEMORY. 1214 if (Size > 256) 1215 return; 1216 1217 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1218 // fields, it has class MEMORY. 1219 // 1220 // Only need to check alignment of array base. 1221 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1222 return; 1223 1224 // Otherwise implement simplified merge. We could be smarter about 1225 // this, but it isn't worth it and would be harder to verify. 1226 Current = NoClass; 1227 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1228 uint64_t ArraySize = AT->getSize().getZExtValue(); 1229 1230 // The only case a 256-bit wide vector could be used is when the array 1231 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1232 // to work for sizes wider than 128, early check and fallback to memory. 1233 if (Size > 128 && EltSize != 256) 1234 return; 1235 1236 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1237 Class FieldLo, FieldHi; 1238 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 1239 Lo = merge(Lo, FieldLo); 1240 Hi = merge(Hi, FieldHi); 1241 if (Lo == Memory || Hi == Memory) 1242 break; 1243 } 1244 1245 postMerge(Size, Lo, Hi); 1246 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 1247 return; 1248 } 1249 1250 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1251 uint64_t Size = getContext().getTypeSize(Ty); 1252 1253 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1254 // than four eightbytes, ..., it has class MEMORY. 1255 if (Size > 256) 1256 return; 1257 1258 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1259 // copy constructor or a non-trivial destructor, it is passed by invisible 1260 // reference. 1261 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 1262 return; 1263 1264 const RecordDecl *RD = RT->getDecl(); 1265 1266 // Assume variable sized types are passed in memory. 1267 if (RD->hasFlexibleArrayMember()) 1268 return; 1269 1270 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1271 1272 // Reset Lo class, this will be recomputed. 1273 Current = NoClass; 1274 1275 // If this is a C++ record, classify the bases first. 1276 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1277 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1278 e = CXXRD->bases_end(); i != e; ++i) { 1279 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1280 "Unexpected base class!"); 1281 const CXXRecordDecl *Base = 1282 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1283 1284 // Classify this field. 1285 // 1286 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1287 // single eightbyte, each is classified separately. Each eightbyte gets 1288 // initialized to class NO_CLASS. 1289 Class FieldLo, FieldHi; 1290 uint64_t Offset = OffsetBase + Layout.getBaseClassOffsetInBits(Base); 1291 classify(i->getType(), Offset, FieldLo, FieldHi); 1292 Lo = merge(Lo, FieldLo); 1293 Hi = merge(Hi, FieldHi); 1294 if (Lo == Memory || Hi == Memory) 1295 break; 1296 } 1297 } 1298 1299 // Classify the fields one at a time, merging the results. 1300 unsigned idx = 0; 1301 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1302 i != e; ++i, ++idx) { 1303 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1304 bool BitField = i->isBitField(); 1305 1306 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than 1307 // four eightbytes, or it contains unaligned fields, it has class MEMORY. 1308 // 1309 // The only case a 256-bit wide vector could be used is when the struct 1310 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1311 // to work for sizes wider than 128, early check and fallback to memory. 1312 // 1313 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) { 1314 Lo = Memory; 1315 return; 1316 } 1317 // Note, skip this test for bit-fields, see below. 1318 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1319 Lo = Memory; 1320 return; 1321 } 1322 1323 // Classify this field. 1324 // 1325 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1326 // exceeds a single eightbyte, each is classified 1327 // separately. Each eightbyte gets initialized to class 1328 // NO_CLASS. 1329 Class FieldLo, FieldHi; 1330 1331 // Bit-fields require special handling, they do not force the 1332 // structure to be passed in memory even if unaligned, and 1333 // therefore they can straddle an eightbyte. 1334 if (BitField) { 1335 // Ignore padding bit-fields. 1336 if (i->isUnnamedBitfield()) 1337 continue; 1338 1339 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1340 uint64_t Size = 1341 i->getBitWidth()->EvaluateAsInt(getContext()).getZExtValue(); 1342 1343 uint64_t EB_Lo = Offset / 64; 1344 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1345 FieldLo = FieldHi = NoClass; 1346 if (EB_Lo) { 1347 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1348 FieldLo = NoClass; 1349 FieldHi = Integer; 1350 } else { 1351 FieldLo = Integer; 1352 FieldHi = EB_Hi ? Integer : NoClass; 1353 } 1354 } else 1355 classify(i->getType(), Offset, FieldLo, FieldHi); 1356 Lo = merge(Lo, FieldLo); 1357 Hi = merge(Hi, FieldHi); 1358 if (Lo == Memory || Hi == Memory) 1359 break; 1360 } 1361 1362 postMerge(Size, Lo, Hi); 1363 } 1364} 1365 1366ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1367 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1368 // place naturally. 1369 if (!isAggregateTypeForABI(Ty)) { 1370 // Treat an enum type as its underlying type. 1371 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1372 Ty = EnumTy->getDecl()->getIntegerType(); 1373 1374 return (Ty->isPromotableIntegerType() ? 1375 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1376 } 1377 1378 return ABIArgInfo::getIndirect(0); 1379} 1380 1381ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const { 1382 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1383 // place naturally. 1384 if (!isAggregateTypeForABI(Ty)) { 1385 // Treat an enum type as its underlying type. 1386 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1387 Ty = EnumTy->getDecl()->getIntegerType(); 1388 1389 return (Ty->isPromotableIntegerType() ? 1390 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1391 } 1392 1393 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1394 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1395 1396 // Compute the byval alignment. We specify the alignment of the byval in all 1397 // cases so that the mid-level optimizer knows the alignment of the byval. 1398 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U); 1399 return ABIArgInfo::getIndirect(Align); 1400} 1401 1402/// GetByteVectorType - The ABI specifies that a value should be passed in an 1403/// full vector XMM/YMM register. Pick an LLVM IR type that will be passed as a 1404/// vector register. 1405llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const { 1406 llvm::Type *IRType = CGT.ConvertType(Ty); 1407 1408 // Wrapper structs that just contain vectors are passed just like vectors, 1409 // strip them off if present. 1410 llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1411 while (STy && STy->getNumElements() == 1) { 1412 IRType = STy->getElementType(0); 1413 STy = dyn_cast<llvm::StructType>(IRType); 1414 } 1415 1416 // If the preferred type is a 16-byte vector, prefer to pass it. 1417 if (llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1418 llvm::Type *EltTy = VT->getElementType(); 1419 unsigned BitWidth = VT->getBitWidth(); 1420 if ((BitWidth == 128 || BitWidth == 256) && 1421 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1422 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1423 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1424 EltTy->isIntegerTy(128))) 1425 return VT; 1426 } 1427 1428 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1429} 1430 1431/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1432/// is known to either be off the end of the specified type or being in 1433/// alignment padding. The user type specified is known to be at most 128 bits 1434/// in size, and have passed through X86_64ABIInfo::classify with a successful 1435/// classification that put one of the two halves in the INTEGER class. 1436/// 1437/// It is conservatively correct to return false. 1438static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1439 unsigned EndBit, ASTContext &Context) { 1440 // If the bytes being queried are off the end of the type, there is no user 1441 // data hiding here. This handles analysis of builtins, vectors and other 1442 // types that don't contain interesting padding. 1443 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1444 if (TySize <= StartBit) 1445 return true; 1446 1447 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1448 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1449 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1450 1451 // Check each element to see if the element overlaps with the queried range. 1452 for (unsigned i = 0; i != NumElts; ++i) { 1453 // If the element is after the span we care about, then we're done.. 1454 unsigned EltOffset = i*EltSize; 1455 if (EltOffset >= EndBit) break; 1456 1457 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1458 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1459 EndBit-EltOffset, Context)) 1460 return false; 1461 } 1462 // If it overlaps no elements, then it is safe to process as padding. 1463 return true; 1464 } 1465 1466 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1467 const RecordDecl *RD = RT->getDecl(); 1468 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1469 1470 // If this is a C++ record, check the bases first. 1471 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1472 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1473 e = CXXRD->bases_end(); i != e; ++i) { 1474 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1475 "Unexpected base class!"); 1476 const CXXRecordDecl *Base = 1477 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1478 1479 // If the base is after the span we care about, ignore it. 1480 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffsetInBits(Base); 1481 if (BaseOffset >= EndBit) continue; 1482 1483 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1484 if (!BitsContainNoUserData(i->getType(), BaseStart, 1485 EndBit-BaseOffset, Context)) 1486 return false; 1487 } 1488 } 1489 1490 // Verify that no field has data that overlaps the region of interest. Yes 1491 // this could be sped up a lot by being smarter about queried fields, 1492 // however we're only looking at structs up to 16 bytes, so we don't care 1493 // much. 1494 unsigned idx = 0; 1495 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1496 i != e; ++i, ++idx) { 1497 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1498 1499 // If we found a field after the region we care about, then we're done. 1500 if (FieldOffset >= EndBit) break; 1501 1502 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1503 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1504 Context)) 1505 return false; 1506 } 1507 1508 // If nothing in this record overlapped the area of interest, then we're 1509 // clean. 1510 return true; 1511 } 1512 1513 return false; 1514} 1515 1516/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1517/// float member at the specified offset. For example, {int,{float}} has a 1518/// float at offset 4. It is conservatively correct for this routine to return 1519/// false. 1520static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset, 1521 const llvm::TargetData &TD) { 1522 // Base case if we find a float. 1523 if (IROffset == 0 && IRType->isFloatTy()) 1524 return true; 1525 1526 // If this is a struct, recurse into the field at the specified offset. 1527 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1528 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1529 unsigned Elt = SL->getElementContainingOffset(IROffset); 1530 IROffset -= SL->getElementOffset(Elt); 1531 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1532 } 1533 1534 // If this is an array, recurse into the field at the specified offset. 1535 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1536 llvm::Type *EltTy = ATy->getElementType(); 1537 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1538 IROffset -= IROffset/EltSize*EltSize; 1539 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1540 } 1541 1542 return false; 1543} 1544 1545 1546/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1547/// low 8 bytes of an XMM register, corresponding to the SSE class. 1548llvm::Type *X86_64ABIInfo:: 1549GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1550 QualType SourceTy, unsigned SourceOffset) const { 1551 // The only three choices we have are either double, <2 x float>, or float. We 1552 // pass as float if the last 4 bytes is just padding. This happens for 1553 // structs that contain 3 floats. 1554 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1555 SourceOffset*8+64, getContext())) 1556 return llvm::Type::getFloatTy(getVMContext()); 1557 1558 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1559 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1560 // case. 1561 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) && 1562 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData())) 1563 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1564 1565 return llvm::Type::getDoubleTy(getVMContext()); 1566} 1567 1568 1569/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1570/// an 8-byte GPR. This means that we either have a scalar or we are talking 1571/// about the high or low part of an up-to-16-byte struct. This routine picks 1572/// the best LLVM IR type to represent this, which may be i64 or may be anything 1573/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1574/// etc). 1575/// 1576/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1577/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1578/// the 8-byte value references. PrefType may be null. 1579/// 1580/// SourceTy is the source level type for the entire argument. SourceOffset is 1581/// an offset into this that we're processing (which is always either 0 or 8). 1582/// 1583llvm::Type *X86_64ABIInfo:: 1584GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1585 QualType SourceTy, unsigned SourceOffset) const { 1586 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1587 // returning an 8-byte unit starting with it. See if we can safely use it. 1588 if (IROffset == 0) { 1589 // Pointers and int64's always fill the 8-byte unit. 1590 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64)) 1591 return IRType; 1592 1593 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1594 // goodness in the source type is just tail padding. This is allowed to 1595 // kick in for struct {double,int} on the int, but not on 1596 // struct{double,int,int} because we wouldn't return the second int. We 1597 // have to do this analysis on the source type because we can't depend on 1598 // unions being lowered a specific way etc. 1599 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1600 IRType->isIntegerTy(32)) { 1601 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth(); 1602 1603 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1604 SourceOffset*8+64, getContext())) 1605 return IRType; 1606 } 1607 } 1608 1609 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1610 // If this is a struct, recurse into the field at the specified offset. 1611 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy); 1612 if (IROffset < SL->getSizeInBytes()) { 1613 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1614 IROffset -= SL->getElementOffset(FieldIdx); 1615 1616 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1617 SourceTy, SourceOffset); 1618 } 1619 } 1620 1621 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1622 llvm::Type *EltTy = ATy->getElementType(); 1623 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy); 1624 unsigned EltOffset = IROffset/EltSize*EltSize; 1625 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1626 SourceOffset); 1627 } 1628 1629 // Okay, we don't have any better idea of what to pass, so we pass this in an 1630 // integer register that isn't too big to fit the rest of the struct. 1631 unsigned TySizeInBytes = 1632 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 1633 1634 assert(TySizeInBytes != SourceOffset && "Empty field?"); 1635 1636 // It is always safe to classify this as an integer type up to i64 that 1637 // isn't larger than the structure. 1638 return llvm::IntegerType::get(getVMContext(), 1639 std::min(TySizeInBytes-SourceOffset, 8U)*8); 1640} 1641 1642 1643/// GetX86_64ByValArgumentPair - Given a high and low type that can ideally 1644/// be used as elements of a two register pair to pass or return, return a 1645/// first class aggregate to represent them. For example, if the low part of 1646/// a by-value argument should be passed as i32* and the high part as float, 1647/// return {i32*, float}. 1648static llvm::Type * 1649GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi, 1650 const llvm::TargetData &TD) { 1651 // In order to correctly satisfy the ABI, we need to the high part to start 1652 // at offset 8. If the high and low parts we inferred are both 4-byte types 1653 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have 1654 // the second element at offset 8. Check for this: 1655 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo); 1656 unsigned HiAlign = TD.getABITypeAlignment(Hi); 1657 unsigned HiStart = llvm::TargetData::RoundUpAlignment(LoSize, HiAlign); 1658 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!"); 1659 1660 // To handle this, we have to increase the size of the low part so that the 1661 // second element will start at an 8 byte offset. We can't increase the size 1662 // of the second element because it might make us access off the end of the 1663 // struct. 1664 if (HiStart != 8) { 1665 // There are only two sorts of types the ABI generation code can produce for 1666 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32. 1667 // Promote these to a larger type. 1668 if (Lo->isFloatTy()) 1669 Lo = llvm::Type::getDoubleTy(Lo->getContext()); 1670 else { 1671 assert(Lo->isIntegerTy() && "Invalid/unknown lo type"); 1672 Lo = llvm::Type::getInt64Ty(Lo->getContext()); 1673 } 1674 } 1675 1676 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, NULL); 1677 1678 1679 // Verify that the second element is at an 8-byte offset. 1680 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 && 1681 "Invalid x86-64 argument pair!"); 1682 return Result; 1683} 1684 1685ABIArgInfo X86_64ABIInfo:: 1686classifyReturnType(QualType RetTy) const { 1687 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1688 // classification algorithm. 1689 X86_64ABIInfo::Class Lo, Hi; 1690 classify(RetTy, 0, Lo, Hi); 1691 1692 // Check some invariants. 1693 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1694 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1695 1696 llvm::Type *ResType = 0; 1697 switch (Lo) { 1698 case NoClass: 1699 if (Hi == NoClass) 1700 return ABIArgInfo::getIgnore(); 1701 // If the low part is just padding, it takes no register, leave ResType 1702 // null. 1703 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1704 "Unknown missing lo part"); 1705 break; 1706 1707 case SSEUp: 1708 case X87Up: 1709 llvm_unreachable("Invalid classification for lo word."); 1710 1711 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1712 // hidden argument. 1713 case Memory: 1714 return getIndirectReturnResult(RetTy); 1715 1716 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1717 // available register of the sequence %rax, %rdx is used. 1718 case Integer: 1719 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 1720 1721 // If we have a sign or zero extended integer, make sure to return Extend 1722 // so that the parameter gets the right LLVM IR attributes. 1723 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1724 // Treat an enum type as its underlying type. 1725 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1726 RetTy = EnumTy->getDecl()->getIntegerType(); 1727 1728 if (RetTy->isIntegralOrEnumerationType() && 1729 RetTy->isPromotableIntegerType()) 1730 return ABIArgInfo::getExtend(); 1731 } 1732 break; 1733 1734 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1735 // available SSE register of the sequence %xmm0, %xmm1 is used. 1736 case SSE: 1737 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 1738 break; 1739 1740 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1741 // returned on the X87 stack in %st0 as 80-bit x87 number. 1742 case X87: 1743 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 1744 break; 1745 1746 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1747 // part of the value is returned in %st0 and the imaginary part in 1748 // %st1. 1749 case ComplexX87: 1750 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1751 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()), 1752 llvm::Type::getX86_FP80Ty(getVMContext()), 1753 NULL); 1754 break; 1755 } 1756 1757 llvm::Type *HighPart = 0; 1758 switch (Hi) { 1759 // Memory was handled previously and X87 should 1760 // never occur as a hi class. 1761 case Memory: 1762 case X87: 1763 llvm_unreachable("Invalid classification for hi word."); 1764 1765 case ComplexX87: // Previously handled. 1766 case NoClass: 1767 break; 1768 1769 case Integer: 1770 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1771 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1772 return ABIArgInfo::getDirect(HighPart, 8); 1773 break; 1774 case SSE: 1775 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1776 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1777 return ABIArgInfo::getDirect(HighPart, 8); 1778 break; 1779 1780 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1781 // is passed in the next available eightbyte chunk if the last used 1782 // vector register. 1783 // 1784 // SSEUP should always be preceded by SSE, just widen. 1785 case SSEUp: 1786 assert(Lo == SSE && "Unexpected SSEUp classification."); 1787 ResType = GetByteVectorType(RetTy); 1788 break; 1789 1790 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1791 // returned together with the previous X87 value in %st0. 1792 case X87Up: 1793 // If X87Up is preceded by X87, we don't need to do 1794 // anything. However, in some cases with unions it may not be 1795 // preceded by X87. In such situations we follow gcc and pass the 1796 // extra bits in an SSE reg. 1797 if (Lo != X87) { 1798 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1799 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1800 return ABIArgInfo::getDirect(HighPart, 8); 1801 } 1802 break; 1803 } 1804 1805 // If a high part was specified, merge it together with the low part. It is 1806 // known to pass in the high eightbyte of the result. We do this by forming a 1807 // first class struct aggregate with the high and low part: {low, high} 1808 if (HighPart) 1809 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1810 1811 return ABIArgInfo::getDirect(ResType); 1812} 1813 1814ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt, 1815 unsigned &neededSSE) const { 1816 X86_64ABIInfo::Class Lo, Hi; 1817 classify(Ty, 0, Lo, Hi); 1818 1819 // Check some invariants. 1820 // FIXME: Enforce these by construction. 1821 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1822 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1823 1824 neededInt = 0; 1825 neededSSE = 0; 1826 llvm::Type *ResType = 0; 1827 switch (Lo) { 1828 case NoClass: 1829 if (Hi == NoClass) 1830 return ABIArgInfo::getIgnore(); 1831 // If the low part is just padding, it takes no register, leave ResType 1832 // null. 1833 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1834 "Unknown missing lo part"); 1835 break; 1836 1837 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1838 // on the stack. 1839 case Memory: 1840 1841 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1842 // COMPLEX_X87, it is passed in memory. 1843 case X87: 1844 case ComplexX87: 1845 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1846 ++neededInt; 1847 return getIndirectResult(Ty); 1848 1849 case SSEUp: 1850 case X87Up: 1851 llvm_unreachable("Invalid classification for lo word."); 1852 1853 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1854 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1855 // and %r9 is used. 1856 case Integer: 1857 ++neededInt; 1858 1859 // Pick an 8-byte type based on the preferred type. 1860 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0); 1861 1862 // If we have a sign or zero extended integer, make sure to return Extend 1863 // so that the parameter gets the right LLVM IR attributes. 1864 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1865 // Treat an enum type as its underlying type. 1866 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1867 Ty = EnumTy->getDecl()->getIntegerType(); 1868 1869 if (Ty->isIntegralOrEnumerationType() && 1870 Ty->isPromotableIntegerType()) 1871 return ABIArgInfo::getExtend(); 1872 } 1873 1874 break; 1875 1876 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1877 // available SSE register is used, the registers are taken in the 1878 // order from %xmm0 to %xmm7. 1879 case SSE: { 1880 llvm::Type *IRType = CGT.ConvertType(Ty); 1881 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0); 1882 ++neededSSE; 1883 break; 1884 } 1885 } 1886 1887 llvm::Type *HighPart = 0; 1888 switch (Hi) { 1889 // Memory was handled previously, ComplexX87 and X87 should 1890 // never occur as hi classes, and X87Up must be preceded by X87, 1891 // which is passed in memory. 1892 case Memory: 1893 case X87: 1894 case ComplexX87: 1895 llvm_unreachable("Invalid classification for hi word."); 1896 1897 case NoClass: break; 1898 1899 case Integer: 1900 ++neededInt; 1901 // Pick an 8-byte type based on the preferred type. 1902 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 1903 1904 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1905 return ABIArgInfo::getDirect(HighPart, 8); 1906 break; 1907 1908 // X87Up generally doesn't occur here (long double is passed in 1909 // memory), except in situations involving unions. 1910 case X87Up: 1911 case SSE: 1912 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 1913 1914 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1915 return ABIArgInfo::getDirect(HighPart, 8); 1916 1917 ++neededSSE; 1918 break; 1919 1920 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1921 // eightbyte is passed in the upper half of the last used SSE 1922 // register. This only happens when 128-bit vectors are passed. 1923 case SSEUp: 1924 assert(Lo == SSE && "Unexpected SSEUp classification"); 1925 ResType = GetByteVectorType(Ty); 1926 break; 1927 } 1928 1929 // If a high part was specified, merge it together with the low part. It is 1930 // known to pass in the high eightbyte of the result. We do this by forming a 1931 // first class struct aggregate with the high and low part: {low, high} 1932 if (HighPart) 1933 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1934 1935 return ABIArgInfo::getDirect(ResType); 1936} 1937 1938void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 1939 1940 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1941 1942 // Keep track of the number of assigned registers. 1943 unsigned freeIntRegs = 6, freeSSERegs = 8; 1944 1945 // If the return value is indirect, then the hidden argument is consuming one 1946 // integer register. 1947 if (FI.getReturnInfo().isIndirect()) 1948 --freeIntRegs; 1949 1950 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1951 // get assigned (in left-to-right order) for passing as follows... 1952 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1953 it != ie; ++it) { 1954 unsigned neededInt, neededSSE; 1955 it->info = classifyArgumentType(it->type, neededInt, neededSSE); 1956 1957 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1958 // eightbyte of an argument, the whole argument is passed on the 1959 // stack. If registers have already been assigned for some 1960 // eightbytes of such an argument, the assignments get reverted. 1961 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1962 freeIntRegs -= neededInt; 1963 freeSSERegs -= neededSSE; 1964 } else { 1965 it->info = getIndirectResult(it->type); 1966 } 1967 } 1968} 1969 1970static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1971 QualType Ty, 1972 CodeGenFunction &CGF) { 1973 llvm::Value *overflow_arg_area_p = 1974 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1975 llvm::Value *overflow_arg_area = 1976 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1977 1978 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1979 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1980 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1981 if (Align > 8) { 1982 // Note that we follow the ABI & gcc here, even though the type 1983 // could in theory have an alignment greater than 16. This case 1984 // shouldn't ever matter in practice. 1985 1986 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1987 llvm::Value *Offset = 1988 llvm::ConstantInt::get(CGF.Int32Ty, 15); 1989 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1990 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1991 CGF.Int64Ty); 1992 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~15LL); 1993 overflow_arg_area = 1994 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1995 overflow_arg_area->getType(), 1996 "overflow_arg_area.align"); 1997 } 1998 1999 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 2000 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2001 llvm::Value *Res = 2002 CGF.Builder.CreateBitCast(overflow_arg_area, 2003 llvm::PointerType::getUnqual(LTy)); 2004 2005 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 2006 // l->overflow_arg_area + sizeof(type). 2007 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 2008 // an 8 byte boundary. 2009 2010 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 2011 llvm::Value *Offset = 2012 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 2013 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 2014 "overflow_arg_area.next"); 2015 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 2016 2017 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 2018 return Res; 2019} 2020 2021llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2022 CodeGenFunction &CGF) const { 2023 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 2024 2025 // Assume that va_list type is correct; should be pointer to LLVM type: 2026 // struct { 2027 // i32 gp_offset; 2028 // i32 fp_offset; 2029 // i8* overflow_arg_area; 2030 // i8* reg_save_area; 2031 // }; 2032 unsigned neededInt, neededSSE; 2033 2034 Ty = CGF.getContext().getCanonicalType(Ty); 2035 ABIArgInfo AI = classifyArgumentType(Ty, neededInt, neededSSE); 2036 2037 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 2038 // in the registers. If not go to step 7. 2039 if (!neededInt && !neededSSE) 2040 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2041 2042 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 2043 // general purpose registers needed to pass type and num_fp to hold 2044 // the number of floating point registers needed. 2045 2046 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 2047 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 2048 // l->fp_offset > 304 - num_fp * 16 go to step 7. 2049 // 2050 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 2051 // register save space). 2052 2053 llvm::Value *InRegs = 0; 2054 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 2055 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 2056 if (neededInt) { 2057 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 2058 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 2059 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 2060 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 2061 } 2062 2063 if (neededSSE) { 2064 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 2065 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 2066 llvm::Value *FitsInFP = 2067 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 2068 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 2069 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 2070 } 2071 2072 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 2073 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 2074 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 2075 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 2076 2077 // Emit code to load the value if it was passed in registers. 2078 2079 CGF.EmitBlock(InRegBlock); 2080 2081 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 2082 // an offset of l->gp_offset and/or l->fp_offset. This may require 2083 // copying to a temporary location in case the parameter is passed 2084 // in different register classes or requires an alignment greater 2085 // than 8 for general purpose registers and 16 for XMM registers. 2086 // 2087 // FIXME: This really results in shameful code when we end up needing to 2088 // collect arguments from different places; often what should result in a 2089 // simple assembling of a structure from scattered addresses has many more 2090 // loads than necessary. Can we clean this up? 2091 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2092 llvm::Value *RegAddr = 2093 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 2094 "reg_save_area"); 2095 if (neededInt && neededSSE) { 2096 // FIXME: Cleanup. 2097 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 2098 llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 2099 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 2100 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 2101 llvm::Type *TyLo = ST->getElementType(0); 2102 llvm::Type *TyHi = ST->getElementType(1); 2103 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 2104 "Unexpected ABI info for mixed regs"); 2105 llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 2106 llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 2107 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2108 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2109 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 2110 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 2111 llvm::Value *V = 2112 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 2113 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2114 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 2115 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2116 2117 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2118 llvm::PointerType::getUnqual(LTy)); 2119 } else if (neededInt) { 2120 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2121 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2122 llvm::PointerType::getUnqual(LTy)); 2123 } else if (neededSSE == 1) { 2124 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2125 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2126 llvm::PointerType::getUnqual(LTy)); 2127 } else { 2128 assert(neededSSE == 2 && "Invalid number of needed registers!"); 2129 // SSE registers are spaced 16 bytes apart in the register save 2130 // area, we need to collect the two eightbytes together. 2131 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2132 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 2133 llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 2134 llvm::Type *DblPtrTy = 2135 llvm::PointerType::getUnqual(DoubleTy); 2136 llvm::StructType *ST = llvm::StructType::get(DoubleTy, 2137 DoubleTy, NULL); 2138 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 2139 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 2140 DblPtrTy)); 2141 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2142 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 2143 DblPtrTy)); 2144 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2145 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2146 llvm::PointerType::getUnqual(LTy)); 2147 } 2148 2149 // AMD64-ABI 3.5.7p5: Step 5. Set: 2150 // l->gp_offset = l->gp_offset + num_gp * 8 2151 // l->fp_offset = l->fp_offset + num_fp * 16. 2152 if (neededInt) { 2153 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 2154 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 2155 gp_offset_p); 2156 } 2157 if (neededSSE) { 2158 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 2159 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 2160 fp_offset_p); 2161 } 2162 CGF.EmitBranch(ContBlock); 2163 2164 // Emit code to load the value if it was passed in memory. 2165 2166 CGF.EmitBlock(InMemBlock); 2167 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2168 2169 // Return the appropriate result. 2170 2171 CGF.EmitBlock(ContBlock); 2172 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2, 2173 "vaarg.addr"); 2174 ResAddr->addIncoming(RegAddr, InRegBlock); 2175 ResAddr->addIncoming(MemAddr, InMemBlock); 2176 return ResAddr; 2177} 2178 2179ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty) const { 2180 2181 if (Ty->isVoidType()) 2182 return ABIArgInfo::getIgnore(); 2183 2184 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2185 Ty = EnumTy->getDecl()->getIntegerType(); 2186 2187 uint64_t Size = getContext().getTypeSize(Ty); 2188 2189 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2190 if (hasNonTrivialDestructorOrCopyConstructor(RT) || 2191 RT->getDecl()->hasFlexibleArrayMember()) 2192 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2193 2194 // FIXME: mingw-w64-gcc emits 128-bit struct as i128 2195 if (Size == 128 && 2196 getContext().getTargetInfo().getTriple().getOS() == llvm::Triple::MinGW32) 2197 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2198 Size)); 2199 2200 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is 2201 // not 1, 2, 4, or 8 bytes, must be passed by reference." 2202 if (Size <= 64 && 2203 (Size & (Size - 1)) == 0) 2204 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2205 Size)); 2206 2207 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2208 } 2209 2210 if (Ty->isPromotableIntegerType()) 2211 return ABIArgInfo::getExtend(); 2212 2213 return ABIArgInfo::getDirect(); 2214} 2215 2216void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2217 2218 QualType RetTy = FI.getReturnType(); 2219 FI.getReturnInfo() = classify(RetTy); 2220 2221 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2222 it != ie; ++it) 2223 it->info = classify(it->type); 2224} 2225 2226llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2227 CodeGenFunction &CGF) const { 2228 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2229 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2230 2231 CGBuilderTy &Builder = CGF.Builder; 2232 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2233 "ap"); 2234 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2235 llvm::Type *PTy = 2236 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2237 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2238 2239 uint64_t Offset = 2240 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 2241 llvm::Value *NextAddr = 2242 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2243 "ap.next"); 2244 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2245 2246 return AddrTyped; 2247} 2248 2249// PowerPC-32 2250 2251namespace { 2252class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2253public: 2254 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2255 2256 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2257 // This is recovered from gcc output. 2258 return 1; // r1 is the dedicated stack pointer 2259 } 2260 2261 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2262 llvm::Value *Address) const; 2263}; 2264 2265} 2266 2267bool 2268PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2269 llvm::Value *Address) const { 2270 // This is calculated from the LLVM and GCC tables and verified 2271 // against gcc output. AFAIK all ABIs use the same encoding. 2272 2273 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2274 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2275 2276 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2277 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2278 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2279 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2280 2281 // 0-31: r0-31, the 4-byte general-purpose registers 2282 AssignToArrayRange(Builder, Address, Four8, 0, 31); 2283 2284 // 32-63: fp0-31, the 8-byte floating-point registers 2285 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2286 2287 // 64-76 are various 4-byte special-purpose registers: 2288 // 64: mq 2289 // 65: lr 2290 // 66: ctr 2291 // 67: ap 2292 // 68-75 cr0-7 2293 // 76: xer 2294 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2295 2296 // 77-108: v0-31, the 16-byte vector registers 2297 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2298 2299 // 109: vrsave 2300 // 110: vscr 2301 // 111: spe_acc 2302 // 112: spefscr 2303 // 113: sfp 2304 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2305 2306 return false; 2307} 2308 2309 2310//===----------------------------------------------------------------------===// 2311// ARM ABI Implementation 2312//===----------------------------------------------------------------------===// 2313 2314namespace { 2315 2316class ARMABIInfo : public ABIInfo { 2317public: 2318 enum ABIKind { 2319 APCS = 0, 2320 AAPCS = 1, 2321 AAPCS_VFP 2322 }; 2323 2324private: 2325 ABIKind Kind; 2326 2327public: 2328 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {} 2329 2330 bool isEABI() const { 2331 StringRef Env = getContext().getTargetInfo().getTriple().getEnvironmentName(); 2332 return (Env == "gnueabi" || Env == "eabi"); 2333 } 2334 2335private: 2336 ABIKind getABIKind() const { return Kind; } 2337 2338 ABIArgInfo classifyReturnType(QualType RetTy) const; 2339 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2340 2341 virtual void computeInfo(CGFunctionInfo &FI) const; 2342 2343 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2344 CodeGenFunction &CGF) const; 2345}; 2346 2347class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 2348public: 2349 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 2350 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 2351 2352 const ARMABIInfo &getABIInfo() const { 2353 return static_cast<const ARMABIInfo&>(TargetCodeGenInfo::getABIInfo()); 2354 } 2355 2356 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2357 return 13; 2358 } 2359 2360 StringRef getARCRetainAutoreleasedReturnValueMarker() const { 2361 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue"; 2362 } 2363 2364 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2365 llvm::Value *Address) const { 2366 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2367 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2368 2369 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2370 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2371 2372 // 0-15 are the 16 integer registers. 2373 AssignToArrayRange(Builder, Address, Four8, 0, 15); 2374 2375 return false; 2376 } 2377 2378 unsigned getSizeOfUnwindException() const { 2379 if (getABIInfo().isEABI()) return 88; 2380 return TargetCodeGenInfo::getSizeOfUnwindException(); 2381 } 2382}; 2383 2384} 2385 2386void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 2387 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2388 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2389 it != ie; ++it) 2390 it->info = classifyArgumentType(it->type); 2391 2392 // Always honor user-specified calling convention. 2393 if (FI.getCallingConvention() != llvm::CallingConv::C) 2394 return; 2395 2396 // Calling convention as default by an ABI. 2397 llvm::CallingConv::ID DefaultCC; 2398 if (isEABI()) 2399 DefaultCC = llvm::CallingConv::ARM_AAPCS; 2400 else 2401 DefaultCC = llvm::CallingConv::ARM_APCS; 2402 2403 // If user did not ask for specific calling convention explicitly (e.g. via 2404 // pcs attribute), set effective calling convention if it's different than ABI 2405 // default. 2406 switch (getABIKind()) { 2407 case APCS: 2408 if (DefaultCC != llvm::CallingConv::ARM_APCS) 2409 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 2410 break; 2411 case AAPCS: 2412 if (DefaultCC != llvm::CallingConv::ARM_AAPCS) 2413 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 2414 break; 2415 case AAPCS_VFP: 2416 if (DefaultCC != llvm::CallingConv::ARM_AAPCS_VFP) 2417 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 2418 break; 2419 } 2420} 2421 2422/// isHomogeneousAggregate - Return true if a type is an AAPCS-VFP homogeneous 2423/// aggregate. If HAMembers is non-null, the number of base elements 2424/// contained in the type is returned through it; this is used for the 2425/// recursive calls that check aggregate component types. 2426static bool isHomogeneousAggregate(QualType Ty, const Type *&Base, 2427 ASTContext &Context, 2428 uint64_t *HAMembers = 0) { 2429 uint64_t Members; 2430 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 2431 if (!isHomogeneousAggregate(AT->getElementType(), Base, Context, &Members)) 2432 return false; 2433 Members *= AT->getSize().getZExtValue(); 2434 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 2435 const RecordDecl *RD = RT->getDecl(); 2436 if (RD->isUnion() || RD->hasFlexibleArrayMember()) 2437 return false; 2438 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 2439 if (!CXXRD->isAggregate()) 2440 return false; 2441 } 2442 Members = 0; 2443 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2444 i != e; ++i) { 2445 const FieldDecl *FD = *i; 2446 uint64_t FldMembers; 2447 if (!isHomogeneousAggregate(FD->getType(), Base, Context, &FldMembers)) 2448 return false; 2449 Members += FldMembers; 2450 } 2451 } else { 2452 Members = 1; 2453 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 2454 Members = 2; 2455 Ty = CT->getElementType(); 2456 } 2457 2458 // Homogeneous aggregates for AAPCS-VFP must have base types of float, 2459 // double, or 64-bit or 128-bit vectors. 2460 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 2461 if (BT->getKind() != BuiltinType::Float && 2462 BT->getKind() != BuiltinType::Double) 2463 return false; 2464 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 2465 unsigned VecSize = Context.getTypeSize(VT); 2466 if (VecSize != 64 && VecSize != 128) 2467 return false; 2468 } else { 2469 return false; 2470 } 2471 2472 // The base type must be the same for all members. Vector types of the 2473 // same total size are treated as being equivalent here. 2474 const Type *TyPtr = Ty.getTypePtr(); 2475 if (!Base) 2476 Base = TyPtr; 2477 if (Base != TyPtr && 2478 (!Base->isVectorType() || !TyPtr->isVectorType() || 2479 Context.getTypeSize(Base) != Context.getTypeSize(TyPtr))) 2480 return false; 2481 } 2482 2483 // Homogeneous Aggregates can have at most 4 members of the base type. 2484 if (HAMembers) 2485 *HAMembers = Members; 2486 return (Members <= 4); 2487} 2488 2489ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const { 2490 if (!isAggregateTypeForABI(Ty)) { 2491 // Treat an enum type as its underlying type. 2492 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2493 Ty = EnumTy->getDecl()->getIntegerType(); 2494 2495 return (Ty->isPromotableIntegerType() ? 2496 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2497 } 2498 2499 // Ignore empty records. 2500 if (isEmptyRecord(getContext(), Ty, true)) 2501 return ABIArgInfo::getIgnore(); 2502 2503 // Structures with either a non-trivial destructor or a non-trivial 2504 // copy constructor are always indirect. 2505 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2506 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2507 2508 if (getABIKind() == ARMABIInfo::AAPCS_VFP) { 2509 // Homogeneous Aggregates need to be expanded. 2510 const Type *Base = 0; 2511 if (isHomogeneousAggregate(Ty, Base, getContext())) 2512 return ABIArgInfo::getExpand(); 2513 } 2514 2515 // Otherwise, pass by coercing to a structure of the appropriate size. 2516 // 2517 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 2518 // backend doesn't support byval. 2519 // FIXME: This doesn't handle alignment > 64 bits. 2520 llvm::Type* ElemTy; 2521 unsigned SizeRegs; 2522 if (getContext().getTypeAlign(Ty) > 32) { 2523 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 2524 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 2525 } else { 2526 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 2527 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 2528 } 2529 2530 llvm::Type *STy = 2531 llvm::StructType::get(llvm::ArrayType::get(ElemTy, SizeRegs), NULL); 2532 return ABIArgInfo::getDirect(STy); 2533} 2534 2535static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 2536 llvm::LLVMContext &VMContext) { 2537 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 2538 // is called integer-like if its size is less than or equal to one word, and 2539 // the offset of each of its addressable sub-fields is zero. 2540 2541 uint64_t Size = Context.getTypeSize(Ty); 2542 2543 // Check that the type fits in a word. 2544 if (Size > 32) 2545 return false; 2546 2547 // FIXME: Handle vector types! 2548 if (Ty->isVectorType()) 2549 return false; 2550 2551 // Float types are never treated as "integer like". 2552 if (Ty->isRealFloatingType()) 2553 return false; 2554 2555 // If this is a builtin or pointer type then it is ok. 2556 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 2557 return true; 2558 2559 // Small complex integer types are "integer like". 2560 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 2561 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 2562 2563 // Single element and zero sized arrays should be allowed, by the definition 2564 // above, but they are not. 2565 2566 // Otherwise, it must be a record type. 2567 const RecordType *RT = Ty->getAs<RecordType>(); 2568 if (!RT) return false; 2569 2570 // Ignore records with flexible arrays. 2571 const RecordDecl *RD = RT->getDecl(); 2572 if (RD->hasFlexibleArrayMember()) 2573 return false; 2574 2575 // Check that all sub-fields are at offset 0, and are themselves "integer 2576 // like". 2577 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 2578 2579 bool HadField = false; 2580 unsigned idx = 0; 2581 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2582 i != e; ++i, ++idx) { 2583 const FieldDecl *FD = *i; 2584 2585 // Bit-fields are not addressable, we only need to verify they are "integer 2586 // like". We still have to disallow a subsequent non-bitfield, for example: 2587 // struct { int : 0; int x } 2588 // is non-integer like according to gcc. 2589 if (FD->isBitField()) { 2590 if (!RD->isUnion()) 2591 HadField = true; 2592 2593 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2594 return false; 2595 2596 continue; 2597 } 2598 2599 // Check if this field is at offset 0. 2600 if (Layout.getFieldOffset(idx) != 0) 2601 return false; 2602 2603 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2604 return false; 2605 2606 // Only allow at most one field in a structure. This doesn't match the 2607 // wording above, but follows gcc in situations with a field following an 2608 // empty structure. 2609 if (!RD->isUnion()) { 2610 if (HadField) 2611 return false; 2612 2613 HadField = true; 2614 } 2615 } 2616 2617 return true; 2618} 2619 2620ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 2621 if (RetTy->isVoidType()) 2622 return ABIArgInfo::getIgnore(); 2623 2624 // Large vector types should be returned via memory. 2625 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) 2626 return ABIArgInfo::getIndirect(0); 2627 2628 if (!isAggregateTypeForABI(RetTy)) { 2629 // Treat an enum type as its underlying type. 2630 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2631 RetTy = EnumTy->getDecl()->getIntegerType(); 2632 2633 return (RetTy->isPromotableIntegerType() ? 2634 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2635 } 2636 2637 // Structures with either a non-trivial destructor or a non-trivial 2638 // copy constructor are always indirect. 2639 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 2640 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2641 2642 // Are we following APCS? 2643 if (getABIKind() == APCS) { 2644 if (isEmptyRecord(getContext(), RetTy, false)) 2645 return ABIArgInfo::getIgnore(); 2646 2647 // Complex types are all returned as packed integers. 2648 // 2649 // FIXME: Consider using 2 x vector types if the back end handles them 2650 // correctly. 2651 if (RetTy->isAnyComplexType()) 2652 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2653 getContext().getTypeSize(RetTy))); 2654 2655 // Integer like structures are returned in r0. 2656 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 2657 // Return in the smallest viable integer type. 2658 uint64_t Size = getContext().getTypeSize(RetTy); 2659 if (Size <= 8) 2660 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2661 if (Size <= 16) 2662 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2663 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2664 } 2665 2666 // Otherwise return in memory. 2667 return ABIArgInfo::getIndirect(0); 2668 } 2669 2670 // Otherwise this is an AAPCS variant. 2671 2672 if (isEmptyRecord(getContext(), RetTy, true)) 2673 return ABIArgInfo::getIgnore(); 2674 2675 // Aggregates <= 4 bytes are returned in r0; other aggregates 2676 // are returned indirectly. 2677 uint64_t Size = getContext().getTypeSize(RetTy); 2678 if (Size <= 32) { 2679 // Return in the smallest viable integer type. 2680 if (Size <= 8) 2681 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2682 if (Size <= 16) 2683 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2684 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2685 } 2686 2687 return ABIArgInfo::getIndirect(0); 2688} 2689 2690llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2691 CodeGenFunction &CGF) const { 2692 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2693 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2694 2695 CGBuilderTy &Builder = CGF.Builder; 2696 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2697 "ap"); 2698 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2699 // Handle address alignment for type alignment > 32 bits 2700 uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8; 2701 if (TyAlign > 4) { 2702 assert((TyAlign & (TyAlign - 1)) == 0 && 2703 "Alignment is not power of 2!"); 2704 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 2705 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1)); 2706 AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1))); 2707 Addr = Builder.CreateIntToPtr(AddrAsInt, BP); 2708 } 2709 llvm::Type *PTy = 2710 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2711 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2712 2713 uint64_t Offset = 2714 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 2715 llvm::Value *NextAddr = 2716 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2717 "ap.next"); 2718 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2719 2720 return AddrTyped; 2721} 2722 2723//===----------------------------------------------------------------------===// 2724// PTX ABI Implementation 2725//===----------------------------------------------------------------------===// 2726 2727namespace { 2728 2729class PTXABIInfo : public ABIInfo { 2730public: 2731 PTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2732 2733 ABIArgInfo classifyReturnType(QualType RetTy) const; 2734 ABIArgInfo classifyArgumentType(QualType Ty) const; 2735 2736 virtual void computeInfo(CGFunctionInfo &FI) const; 2737 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2738 CodeGenFunction &CFG) const; 2739}; 2740 2741class PTXTargetCodeGenInfo : public TargetCodeGenInfo { 2742public: 2743 PTXTargetCodeGenInfo(CodeGenTypes &CGT) 2744 : TargetCodeGenInfo(new PTXABIInfo(CGT)) {} 2745}; 2746 2747ABIArgInfo PTXABIInfo::classifyReturnType(QualType RetTy) const { 2748 if (RetTy->isVoidType()) 2749 return ABIArgInfo::getIgnore(); 2750 if (isAggregateTypeForABI(RetTy)) 2751 return ABIArgInfo::getIndirect(0); 2752 return ABIArgInfo::getDirect(); 2753} 2754 2755ABIArgInfo PTXABIInfo::classifyArgumentType(QualType Ty) const { 2756 if (isAggregateTypeForABI(Ty)) 2757 return ABIArgInfo::getIndirect(0); 2758 2759 return ABIArgInfo::getDirect(); 2760} 2761 2762void PTXABIInfo::computeInfo(CGFunctionInfo &FI) const { 2763 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2764 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2765 it != ie; ++it) 2766 it->info = classifyArgumentType(it->type); 2767 2768 // Always honor user-specified calling convention. 2769 if (FI.getCallingConvention() != llvm::CallingConv::C) 2770 return; 2771 2772 // Calling convention as default by an ABI. 2773 llvm::CallingConv::ID DefaultCC; 2774 StringRef Env = getContext().getTargetInfo().getTriple().getEnvironmentName(); 2775 if (Env == "device") 2776 DefaultCC = llvm::CallingConv::PTX_Device; 2777 else 2778 DefaultCC = llvm::CallingConv::PTX_Kernel; 2779 2780 FI.setEffectiveCallingConvention(DefaultCC); 2781} 2782 2783llvm::Value *PTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2784 CodeGenFunction &CFG) const { 2785 llvm_unreachable("PTX does not support varargs"); 2786 return 0; 2787} 2788 2789} 2790 2791//===----------------------------------------------------------------------===// 2792// SystemZ ABI Implementation 2793//===----------------------------------------------------------------------===// 2794 2795namespace { 2796 2797class SystemZABIInfo : public ABIInfo { 2798public: 2799 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2800 2801 bool isPromotableIntegerType(QualType Ty) const; 2802 2803 ABIArgInfo classifyReturnType(QualType RetTy) const; 2804 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2805 2806 virtual void computeInfo(CGFunctionInfo &FI) const { 2807 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2808 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2809 it != ie; ++it) 2810 it->info = classifyArgumentType(it->type); 2811 } 2812 2813 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2814 CodeGenFunction &CGF) const; 2815}; 2816 2817class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 2818public: 2819 SystemZTargetCodeGenInfo(CodeGenTypes &CGT) 2820 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {} 2821}; 2822 2823} 2824 2825bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 2826 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 2827 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2828 switch (BT->getKind()) { 2829 case BuiltinType::Bool: 2830 case BuiltinType::Char_S: 2831 case BuiltinType::Char_U: 2832 case BuiltinType::SChar: 2833 case BuiltinType::UChar: 2834 case BuiltinType::Short: 2835 case BuiltinType::UShort: 2836 case BuiltinType::Int: 2837 case BuiltinType::UInt: 2838 return true; 2839 default: 2840 return false; 2841 } 2842 return false; 2843} 2844 2845llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2846 CodeGenFunction &CGF) const { 2847 // FIXME: Implement 2848 return 0; 2849} 2850 2851 2852ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const { 2853 if (RetTy->isVoidType()) 2854 return ABIArgInfo::getIgnore(); 2855 if (isAggregateTypeForABI(RetTy)) 2856 return ABIArgInfo::getIndirect(0); 2857 2858 return (isPromotableIntegerType(RetTy) ? 2859 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2860} 2861 2862ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const { 2863 if (isAggregateTypeForABI(Ty)) 2864 return ABIArgInfo::getIndirect(0); 2865 2866 return (isPromotableIntegerType(Ty) ? 2867 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2868} 2869 2870//===----------------------------------------------------------------------===// 2871// MBlaze ABI Implementation 2872//===----------------------------------------------------------------------===// 2873 2874namespace { 2875 2876class MBlazeABIInfo : public ABIInfo { 2877public: 2878 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2879 2880 bool isPromotableIntegerType(QualType Ty) const; 2881 2882 ABIArgInfo classifyReturnType(QualType RetTy) const; 2883 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2884 2885 virtual void computeInfo(CGFunctionInfo &FI) const { 2886 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2887 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2888 it != ie; ++it) 2889 it->info = classifyArgumentType(it->type); 2890 } 2891 2892 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2893 CodeGenFunction &CGF) const; 2894}; 2895 2896class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo { 2897public: 2898 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT) 2899 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {} 2900 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2901 CodeGen::CodeGenModule &M) const; 2902}; 2903 2904} 2905 2906bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const { 2907 // MBlaze ABI requires all 8 and 16 bit quantities to be extended. 2908 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2909 switch (BT->getKind()) { 2910 case BuiltinType::Bool: 2911 case BuiltinType::Char_S: 2912 case BuiltinType::Char_U: 2913 case BuiltinType::SChar: 2914 case BuiltinType::UChar: 2915 case BuiltinType::Short: 2916 case BuiltinType::UShort: 2917 return true; 2918 default: 2919 return false; 2920 } 2921 return false; 2922} 2923 2924llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2925 CodeGenFunction &CGF) const { 2926 // FIXME: Implement 2927 return 0; 2928} 2929 2930 2931ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const { 2932 if (RetTy->isVoidType()) 2933 return ABIArgInfo::getIgnore(); 2934 if (isAggregateTypeForABI(RetTy)) 2935 return ABIArgInfo::getIndirect(0); 2936 2937 return (isPromotableIntegerType(RetTy) ? 2938 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2939} 2940 2941ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const { 2942 if (isAggregateTypeForABI(Ty)) 2943 return ABIArgInfo::getIndirect(0); 2944 2945 return (isPromotableIntegerType(Ty) ? 2946 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2947} 2948 2949void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2950 llvm::GlobalValue *GV, 2951 CodeGen::CodeGenModule &M) 2952 const { 2953 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 2954 if (!FD) return; 2955 2956 llvm::CallingConv::ID CC = llvm::CallingConv::C; 2957 if (FD->hasAttr<MBlazeInterruptHandlerAttr>()) 2958 CC = llvm::CallingConv::MBLAZE_INTR; 2959 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>()) 2960 CC = llvm::CallingConv::MBLAZE_SVOL; 2961 2962 if (CC != llvm::CallingConv::C) { 2963 // Handle 'interrupt_handler' attribute: 2964 llvm::Function *F = cast<llvm::Function>(GV); 2965 2966 // Step 1: Set ISR calling convention. 2967 F->setCallingConv(CC); 2968 2969 // Step 2: Add attributes goodness. 2970 F->addFnAttr(llvm::Attribute::NoInline); 2971 } 2972 2973 // Step 3: Emit _interrupt_handler alias. 2974 if (CC == llvm::CallingConv::MBLAZE_INTR) 2975 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2976 "_interrupt_handler", GV, &M.getModule()); 2977} 2978 2979 2980//===----------------------------------------------------------------------===// 2981// MSP430 ABI Implementation 2982//===----------------------------------------------------------------------===// 2983 2984namespace { 2985 2986class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 2987public: 2988 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 2989 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2990 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2991 CodeGen::CodeGenModule &M) const; 2992}; 2993 2994} 2995 2996void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2997 llvm::GlobalValue *GV, 2998 CodeGen::CodeGenModule &M) const { 2999 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 3000 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 3001 // Handle 'interrupt' attribute: 3002 llvm::Function *F = cast<llvm::Function>(GV); 3003 3004 // Step 1: Set ISR calling convention. 3005 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 3006 3007 // Step 2: Add attributes goodness. 3008 F->addFnAttr(llvm::Attribute::NoInline); 3009 3010 // Step 3: Emit ISR vector alias. 3011 unsigned Num = attr->getNumber() + 0xffe0; 3012 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 3013 "vector_" + Twine::utohexstr(Num), 3014 GV, &M.getModule()); 3015 } 3016 } 3017} 3018 3019//===----------------------------------------------------------------------===// 3020// MIPS ABI Implementation. This works for both little-endian and 3021// big-endian variants. 3022//===----------------------------------------------------------------------===// 3023 3024namespace { 3025class MipsABIInfo : public ABIInfo { 3026 static const unsigned MinABIStackAlignInBytes = 4; 3027public: 3028 MipsABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 3029 3030 ABIArgInfo classifyReturnType(QualType RetTy) const; 3031 ABIArgInfo classifyArgumentType(QualType RetTy) const; 3032 virtual void computeInfo(CGFunctionInfo &FI) const; 3033 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3034 CodeGenFunction &CGF) const; 3035}; 3036 3037const unsigned MipsABIInfo::MinABIStackAlignInBytes; 3038 3039class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 3040 unsigned SizeOfUnwindException; 3041public: 3042 MIPSTargetCodeGenInfo(CodeGenTypes &CGT, unsigned SZ) 3043 : TargetCodeGenInfo(new MipsABIInfo(CGT)), SizeOfUnwindException(SZ) {} 3044 3045 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 3046 return 29; 3047 } 3048 3049 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3050 llvm::Value *Address) const; 3051 3052 unsigned getSizeOfUnwindException() const { 3053 return SizeOfUnwindException; 3054 } 3055}; 3056} 3057 3058ABIArgInfo MipsABIInfo::classifyArgumentType(QualType Ty) const { 3059 if (isAggregateTypeForABI(Ty)) { 3060 // Ignore empty aggregates. 3061 if (getContext().getTypeSize(Ty) == 0) 3062 return ABIArgInfo::getIgnore(); 3063 3064 // Records with non trivial destructors/constructors should not be passed 3065 // by value. 3066 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 3067 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3068 3069 return ABIArgInfo::getIndirect(0); 3070 } 3071 3072 // Treat an enum type as its underlying type. 3073 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3074 Ty = EnumTy->getDecl()->getIntegerType(); 3075 3076 return (Ty->isPromotableIntegerType() ? 3077 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3078} 3079 3080ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const { 3081 if (RetTy->isVoidType()) 3082 return ABIArgInfo::getIgnore(); 3083 3084 if (isAggregateTypeForABI(RetTy)) { 3085 if (RetTy->isAnyComplexType()) 3086 return ABIArgInfo::getDirect(); 3087 3088 return ABIArgInfo::getIndirect(0); 3089 } 3090 3091 // Treat an enum type as its underlying type. 3092 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 3093 RetTy = EnumTy->getDecl()->getIntegerType(); 3094 3095 return (RetTy->isPromotableIntegerType() ? 3096 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3097} 3098 3099void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const { 3100 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3101 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3102 it != ie; ++it) 3103 it->info = classifyArgumentType(it->type); 3104} 3105 3106llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3107 CodeGenFunction &CGF) const { 3108 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 3109 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 3110 3111 CGBuilderTy &Builder = CGF.Builder; 3112 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 3113 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3114 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 3115 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3116 llvm::Value *AddrTyped; 3117 3118 if (TypeAlign > MinABIStackAlignInBytes) { 3119 llvm::Value *AddrAsInt32 = CGF.Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 3120 llvm::Value *Inc = llvm::ConstantInt::get(CGF.Int32Ty, TypeAlign - 1); 3121 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -TypeAlign); 3122 llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt32, Inc); 3123 llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask); 3124 AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy); 3125 } 3126 else 3127 AddrTyped = Builder.CreateBitCast(Addr, PTy); 3128 3129 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP); 3130 TypeAlign = std::max(TypeAlign, MinABIStackAlignInBytes); 3131 uint64_t Offset = 3132 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, TypeAlign); 3133 llvm::Value *NextAddr = 3134 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 3135 "ap.next"); 3136 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3137 3138 return AddrTyped; 3139} 3140 3141bool 3142MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3143 llvm::Value *Address) const { 3144 // This information comes from gcc's implementation, which seems to 3145 // as canonical as it gets. 3146 3147 CodeGen::CGBuilderTy &Builder = CGF.Builder; 3148 llvm::LLVMContext &Context = CGF.getLLVMContext(); 3149 3150 // Everything on MIPS is 4 bytes. Double-precision FP registers 3151 // are aliased to pairs of single-precision FP registers. 3152 llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 3153 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 3154 3155 // 0-31 are the general purpose registers, $0 - $31. 3156 // 32-63 are the floating-point registers, $f0 - $f31. 3157 // 64 and 65 are the multiply/divide registers, $hi and $lo. 3158 // 66 is the (notional, I think) register for signal-handler return. 3159 AssignToArrayRange(Builder, Address, Four8, 0, 65); 3160 3161 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 3162 // They are one bit wide and ignored here. 3163 3164 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 3165 // (coprocessor 1 is the FP unit) 3166 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 3167 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 3168 // 176-181 are the DSP accumulator registers. 3169 AssignToArrayRange(Builder, Address, Four8, 80, 181); 3170 3171 return false; 3172} 3173 3174 3175const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 3176 if (TheTargetCodeGenInfo) 3177 return *TheTargetCodeGenInfo; 3178 3179 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 3180 // free it. 3181 3182 const llvm::Triple &Triple = getContext().getTargetInfo().getTriple(); 3183 switch (Triple.getArch()) { 3184 default: 3185 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 3186 3187 case llvm::Triple::mips: 3188 case llvm::Triple::mipsel: 3189 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, 24)); 3190 3191 case llvm::Triple::mips64: 3192 case llvm::Triple::mips64el: 3193 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, 32)); 3194 3195 case llvm::Triple::arm: 3196 case llvm::Triple::thumb: 3197 { 3198 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS; 3199 3200 if (strcmp(getContext().getTargetInfo().getABI(), "apcs-gnu") == 0) 3201 Kind = ARMABIInfo::APCS; 3202 else if (CodeGenOpts.FloatABI == "hard") 3203 Kind = ARMABIInfo::AAPCS_VFP; 3204 3205 return *(TheTargetCodeGenInfo = new ARMTargetCodeGenInfo(Types, Kind)); 3206 } 3207 3208 case llvm::Triple::ppc: 3209 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 3210 3211 case llvm::Triple::ptx32: 3212 case llvm::Triple::ptx64: 3213 return *(TheTargetCodeGenInfo = new PTXTargetCodeGenInfo(Types)); 3214 3215 case llvm::Triple::systemz: 3216 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types)); 3217 3218 case llvm::Triple::mblaze: 3219 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types)); 3220 3221 case llvm::Triple::msp430: 3222 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 3223 3224 case llvm::Triple::x86: { 3225 bool DisableMMX = strcmp(getContext().getTargetInfo().getABI(), "no-mmx") == 0; 3226 3227 if (Triple.isOSDarwin()) 3228 return *(TheTargetCodeGenInfo = 3229 new X86_32TargetCodeGenInfo(Types, true, true, DisableMMX)); 3230 3231 switch (Triple.getOS()) { 3232 case llvm::Triple::Cygwin: 3233 case llvm::Triple::MinGW32: 3234 case llvm::Triple::AuroraUX: 3235 case llvm::Triple::DragonFly: 3236 case llvm::Triple::FreeBSD: 3237 case llvm::Triple::OpenBSD: 3238 case llvm::Triple::NetBSD: 3239 return *(TheTargetCodeGenInfo = 3240 new X86_32TargetCodeGenInfo(Types, false, true, DisableMMX)); 3241 3242 default: 3243 return *(TheTargetCodeGenInfo = 3244 new X86_32TargetCodeGenInfo(Types, false, false, DisableMMX)); 3245 } 3246 } 3247 3248 case llvm::Triple::x86_64: 3249 switch (Triple.getOS()) { 3250 case llvm::Triple::Win32: 3251 case llvm::Triple::MinGW32: 3252 case llvm::Triple::Cygwin: 3253 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 3254 default: 3255 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types)); 3256 } 3257 } 3258} 3259