TargetRegisterInfo.h revision 2da53370241fdd1b5c291483311b34e609f06c73
16f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman//=== Target/TargetRegisterInfo.h - Target Register Information -*- C++ -*-===// 234695381d626485a560594f162701088079589dfMisha Brukman// 36fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// The LLVM Compiler Infrastructure 46fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 57ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// This file is distributed under the University of Illinois Open Source 67ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// License. See LICENSE.TXT for details. 734695381d626485a560594f162701088079589dfMisha Brukman// 86fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell//===----------------------------------------------------------------------===// 93d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// 103d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// This file describes an abstract interface used to get information about a 113d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// target machines register file. This information is used for a variety of 123d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// purposed, especially register allocation. 133d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// 143d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner//===----------------------------------------------------------------------===// 153d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 166f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman#ifndef LLVM_TARGET_TARGETREGISTERINFO_H 176f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman#define LLVM_TARGET_TARGETREGISTERINFO_H 183d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 19024126ee23e6e4430a77025b61d0e713180f03d3Alkis Evlogimenos#include "llvm/CodeGen/MachineBasicBlock.h" 20a385bf7b6dc9b71024aa4c7bb7026bab3c7ebe91Chris Lattner#include "llvm/CodeGen/ValueTypes.h" 21ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson#include "llvm/ADT/DenseSet.h" 224d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos#include <cassert> 234d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos#include <functional> 243d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 25d0fde30ce850b78371fd1386338350591f9ff494Brian Gaekenamespace llvm { 26d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 27171eed533408a23de0b141af17475fd6b4da72e0Evan Chengclass BitVector; 28198ab640bbb0b8e1cdda518b7f8b348764e4402cChris Lattnerclass MachineFunction; 294188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskeyclass MachineMove; 30171eed533408a23de0b141af17475fd6b4da72e0Evan Chengclass RegScavenger; 31b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Chengtemplate<class T> class SmallVectorImpl; 32282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 330f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner/// TargetRegisterDesc - This record contains all of the information known about 340f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner/// a particular register. The AliasSet field (if not null) contains a pointer 350f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner/// to a Zero terminated array of registers that this register aliases. This is 3600032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner/// needed for architectures like X86 which have AL alias AX alias EAX. 3700032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner/// Registers that this does not apply to simply should set this to null. 38a92d62c15fa2bf84453489716323b0159912c55dEvan Cheng/// The SubRegs field is a zero terminated array of registers that are 39a92d62c15fa2bf84453489716323b0159912c55dEvan Cheng/// sub-registers of the specific register, e.g. AL, AH are sub-registers of AX. 402036835346ddf983d66b49505bd52db1d3f8b49dEvan Cheng/// The SuperRegs field is a zero terminated array of registers that are 412036835346ddf983d66b49505bd52db1d3f8b49dEvan Cheng/// super-registers of the specific register, e.g. RAX, EAX, are super-registers 422036835346ddf983d66b49505bd52db1d3f8b49dEvan Cheng/// of AX. 433d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner/// 440f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattnerstruct TargetRegisterDesc { 45e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling const char *Name; // Printable name for the reg (for debugging) 46303603f75876c1cb407002f0a3a110fe4c202b31Chris Lattner const unsigned *AliasSet; // Register Alias Set, described above 47a92d62c15fa2bf84453489716323b0159912c55dEvan Cheng const unsigned *SubRegs; // Sub-register set, described above 4850aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng const unsigned *SuperRegs; // Super-register set, described above 493d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner}; 503d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 51282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukmanclass TargetRegisterClass { 52282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukmanpublic: 530f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner typedef const unsigned* iterator; 540f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner typedef const unsigned* const_iterator; 55282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 56e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson typedef const EVT* vt_iterator; 573b0c0148ed9ec752b240dbea767ad4a9f0a682caEvan Cheng typedef const TargetRegisterClass* const * sc_iterator; 580f24e33b73542bd7b280550aec6cff32d808e724Chris Lattnerprivate: 5960f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey unsigned ID; 6041c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner const char *Name; 6116d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner const vt_iterator VTs; 62696736be8b80fe3946f73605b46359345afdf57aEvan Cheng const sc_iterator SubClasses; 63c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng const sc_iterator SuperClasses; 64f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman const sc_iterator SubRegClasses; 65f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman const sc_iterator SuperRegClasses; 66f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner const unsigned RegSize, Alignment; // Size & Alignment of register in bytes 67a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng const int CopyCost; 680f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner const iterator RegsBegin, RegsEnd; 69ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson DenseSet<unsigned> RegSet; 700f24e33b73542bd7b280550aec6cff32d808e724Chris Lattnerpublic: 7160f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey TargetRegisterClass(unsigned id, 7241c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner const char *name, 73e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson const EVT *vts, 743b0c0148ed9ec752b240dbea767ad4a9f0a682caEvan Cheng const TargetRegisterClass * const *subcs, 753b0c0148ed9ec752b240dbea767ad4a9f0a682caEvan Cheng const TargetRegisterClass * const *supcs, 76f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman const TargetRegisterClass * const *subregcs, 77f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman const TargetRegisterClass * const *superregcs, 78a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng unsigned RS, unsigned Al, int CC, 79a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng iterator RB, iterator RE) 8041c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner : ID(id), Name(name), VTs(vts), SubClasses(subcs), SuperClasses(supcs), 81f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman SubRegClasses(subregcs), SuperRegClasses(superregcs), 82ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson RegSize(RS), Alignment(Al), CopyCost(CC), RegsBegin(RB), RegsEnd(RE) { 83ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson for (iterator I = RegsBegin, E = RegsEnd; I != E; ++I) 84ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson RegSet.insert(*I); 85ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson } 860f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner virtual ~TargetRegisterClass() {} // Allow subclasses 8795923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 886c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// getID() - Return the register class ID number. 896c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// 9060f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey unsigned getID() const { return ID; } 9141c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner 9241c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner /// getName() - Return the register class name for debugging. 9341c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner /// 9441c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner const char *getName() const { return Name; } 9541c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner 966c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// begin/end - Return all of the registers in this class. 976c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// 980f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner iterator begin() const { return RegsBegin; } 990f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner iterator end() const { return RegsEnd; } 100282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 1016c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// getNumRegs - Return the number of registers in this class. 1026c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// 10334cd4a484e532cc463fd5a4bf59b88d13c5467c1Evan Cheng unsigned getNumRegs() const { return (unsigned)(RegsEnd-RegsBegin); } 104f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 1056c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// getRegister - Return the specified register in the class. 1066c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// 1070f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner unsigned getRegister(unsigned i) const { 1080f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner assert(i < getNumRegs() && "Register number out of range!"); 1090f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner return RegsBegin[i]; 1100f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner } 111282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 112f02b37da6f956dc9120a0da6ffa643b2753beb41Chris Lattner /// contains - Return true if the specified register is included in this 113e08b320f15b95eb3279fddba6ccb615eafbc4225Dan Gohman /// register class. This does not include virtual registers. 114f02b37da6f956dc9120a0da6ffa643b2753beb41Chris Lattner bool contains(unsigned Reg) const { 115ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson return RegSet.count(Reg); 116f02b37da6f956dc9120a0da6ffa643b2753beb41Chris Lattner } 117f02b37da6f956dc9120a0da6ffa643b2753beb41Chris Lattner 1186510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman /// hasType - return true if this TargetRegisterClass has the ValueType vt. 1196510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman /// 120e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson bool hasType(EVT vt) const { 121825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson for(int i = 0; VTs[i].getSimpleVT().SimpleTy != MVT::Other; ++i) 1226510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman if (VTs[i] == vt) 1236510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman return true; 1246510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman return false; 1256510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman } 12695923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 127696736be8b80fe3946f73605b46359345afdf57aEvan Cheng /// vt_begin / vt_end - Loop over all of the value types that can be 128696736be8b80fe3946f73605b46359345afdf57aEvan Cheng /// represented by values in this register class. 12916d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner vt_iterator vt_begin() const { 13016d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner return VTs; 13116d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner } 13216d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner 13316d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner vt_iterator vt_end() const { 13416d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner vt_iterator I = VTs; 135825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson while (I->getSimpleVT().SimpleTy != MVT::Other) ++I; 13616d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner return I; 13716d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner } 138696736be8b80fe3946f73605b46359345afdf57aEvan Cheng 139f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// subregclasses_begin / subregclasses_end - Loop over all of 140f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// the subreg register classes of this register class. 141f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator subregclasses_begin() const { 142f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return SubRegClasses; 143f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 144f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 145f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator subregclasses_end() const { 146f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator I = SubRegClasses; 147f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman while (*I != NULL) ++I; 148f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return I; 149f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 150f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 151fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen /// getSubRegisterRegClass - Return the register class of subregisters with 152fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen /// index SubIdx, or NULL if no such class exists. 153fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen const TargetRegisterClass* getSubRegisterRegClass(unsigned SubIdx) const { 154fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen assert(SubIdx>0 && "Invalid subregister index"); 155fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen return SubRegClasses[SubIdx-1]; 156fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen } 157fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen 158f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// superregclasses_begin / superregclasses_end - Loop over all of 159f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// the superreg register classes of this register class. 160f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator superregclasses_begin() const { 161f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return SuperRegClasses; 162f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 163f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 164f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator superregclasses_end() const { 165f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator I = SuperRegClasses; 166f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman while (*I != NULL) ++I; 167f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return I; 168f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 169f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 170f451cb870efcf9e0302d25ed05f4cac6bb494e42Dan Gohman /// hasSubClass - return true if the specified TargetRegisterClass 171f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// is a proper subset of this TargetRegisterClass. 1721367fd09cb021bae61e7dd2ee208f76574c8e789Christopher Lamb bool hasSubClass(const TargetRegisterClass *cs) const { 17395923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach for (int i = 0; SubClasses[i] != NULL; ++i) 174696736be8b80fe3946f73605b46359345afdf57aEvan Cheng if (SubClasses[i] == cs) 175696736be8b80fe3946f73605b46359345afdf57aEvan Cheng return true; 176696736be8b80fe3946f73605b46359345afdf57aEvan Cheng return false; 177696736be8b80fe3946f73605b46359345afdf57aEvan Cheng } 178696736be8b80fe3946f73605b46359345afdf57aEvan Cheng 179f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// subclasses_begin / subclasses_end - Loop over all of the classes 180f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// that are proper subsets of this register class. 181696736be8b80fe3946f73605b46359345afdf57aEvan Cheng sc_iterator subclasses_begin() const { 182696736be8b80fe3946f73605b46359345afdf57aEvan Cheng return SubClasses; 183696736be8b80fe3946f73605b46359345afdf57aEvan Cheng } 18495923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 185696736be8b80fe3946f73605b46359345afdf57aEvan Cheng sc_iterator subclasses_end() const { 186696736be8b80fe3946f73605b46359345afdf57aEvan Cheng sc_iterator I = SubClasses; 187696736be8b80fe3946f73605b46359345afdf57aEvan Cheng while (*I != NULL) ++I; 188696736be8b80fe3946f73605b46359345afdf57aEvan Cheng return I; 189696736be8b80fe3946f73605b46359345afdf57aEvan Cheng } 19095923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 1911367fd09cb021bae61e7dd2ee208f76574c8e789Christopher Lamb /// hasSuperClass - return true if the specified TargetRegisterClass is a 192f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// proper superset of this TargetRegisterClass. 1931367fd09cb021bae61e7dd2ee208f76574c8e789Christopher Lamb bool hasSuperClass(const TargetRegisterClass *cs) const { 19495923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach for (int i = 0; SuperClasses[i] != NULL; ++i) 195c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng if (SuperClasses[i] == cs) 196c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng return true; 197c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng return false; 198c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng } 199c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng 200f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// superclasses_begin / superclasses_end - Loop over all of the classes 201f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// that are proper supersets of this register class. 202c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng sc_iterator superclasses_begin() const { 203c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng return SuperClasses; 204c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng } 20595923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 206c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng sc_iterator superclasses_end() const { 207c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng sc_iterator I = SuperClasses; 208c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng while (*I != NULL) ++I; 209c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng return I; 210c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng } 2118c08d8c77c45d4721e7d3ef746cca9e39b28e379Evan Cheng 212f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// isASubClass - return true if this TargetRegisterClass is a subset 213f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// class of at least one other TargetRegisterClass. 2148c08d8c77c45d4721e7d3ef746cca9e39b28e379Evan Cheng bool isASubClass() const { 2158c08d8c77c45d4721e7d3ef746cca9e39b28e379Evan Cheng return SuperClasses[0] != 0; 2168c08d8c77c45d4721e7d3ef746cca9e39b28e379Evan Cheng } 21795923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 218f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// allocation_order_begin/end - These methods define a range of registers 219f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// which specify the registers in this class that are valid to register 220f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// allocate, and the preferred order to allocate them in. For example, 221f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// callee saved registers should be at the end of the list, because it is 222f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// cheaper to allocate caller saved registers. 223f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 224f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// These methods take a MachineFunction argument, which can be used to tune 225f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// the allocatable registers based on the characteristics of the function. 226f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// One simple example is that the frame pointer register can be used if 227f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// frame-pointer-elimination is performed. 228f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 229f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// By default, these methods return all registers in the class. 230f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 2315ea64fd9eb0027ad20a66ea29211eef79d8842a0Chris Lattner virtual iterator allocation_order_begin(const MachineFunction &MF) const { 232f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner return begin(); 233f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner } 2345ea64fd9eb0027ad20a66ea29211eef79d8842a0Chris Lattner virtual iterator allocation_order_end(const MachineFunction &MF) const { 235f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner return end(); 236f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner } 23734695381d626485a560594f162701088079589dfMisha Brukman 238f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// getSize - Return the size of the register in bytes, which is also the size 239f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// of a stack slot allocated to hold a spilled copy of this register. 240f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner unsigned getSize() const { return RegSize; } 241f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 242f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// getAlignment - Return the minimum required alignment for a register of 243f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// this class. 244f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner unsigned getAlignment() const { return Alignment; } 245a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng 246a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng /// getCopyCost - Return the cost of copying a value between two registers in 247b3a021cdb3d26ddb2985e326ba0cb96761b86f69Evan Cheng /// this class. A negative number means the register class is very expensive 248b3a021cdb3d26ddb2985e326ba0cb96761b86f69Evan Cheng /// to copy e.g. status flag register classes. 249a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng int getCopyCost() const { return CopyCost; } 250282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman}; 251282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 252282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 2536f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// TargetRegisterInfo base class - We assume that the target defines a static 2546f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// array of TargetRegisterDesc objects that represent all of the machine 2556f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// registers that the target has. As such, we simply have to track a pointer 2566f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// to this array so that we can turn register number into a register 2576f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// descriptor. 2583d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner/// 2596f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohmanclass TargetRegisterInfo { 260f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Andersonprotected: 261605041e5a81fbb18769b0613dcd14e0cff32b5eeOwen Anderson const unsigned* SubregHash; 262605041e5a81fbb18769b0613dcd14e0cff32b5eeOwen Anderson const unsigned SubregHashSize; 2633ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson const unsigned* AliasesHash; 2643ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson const unsigned AliasesHashSize; 2658797caac84c3012416e933c9c05ad34d75bf4029Chris Lattnerpublic: 2668797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner typedef const TargetRegisterClass * const * regclass_iterator; 2678797caac84c3012416e933c9c05ad34d75bf4029Chris Lattnerprivate: 2680f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner const TargetRegisterDesc *Desc; // Pointer to the descriptor array 2691fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen const char *const *SubRegIndexNames; // Names of subreg indexes. 2708797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner unsigned NumRegs; // Number of entries in the array 2718797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 2728797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner regclass_iterator RegClassBegin, RegClassEnd; // List of regclasses 2738797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 274f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner int CallFrameSetupOpcode, CallFrameDestroyOpcode; 275b9c2fd964ee7dd7823ac71db8443055e4d0f1c15David Greene 2763d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattnerprotected: 2776f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR, 2786f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman regclass_iterator RegClassBegin, 2796f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman regclass_iterator RegClassEnd, 2801fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen const char *const *subregindexnames, 2816f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman int CallFrameSetupOpcode = -1, 282605041e5a81fbb18769b0613dcd14e0cff32b5eeOwen Anderson int CallFrameDestroyOpcode = -1, 283605041e5a81fbb18769b0613dcd14e0cff32b5eeOwen Anderson const unsigned* subregs = 0, 2847d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson const unsigned subregsize = 0, 2854d4eab219a96203f58452b39b4e94e234dfe4007Bill Wendling const unsigned* aliases = 0, 2864d4eab219a96203f58452b39b4e94e234dfe4007Bill Wendling const unsigned aliasessize = 0); 2876f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman virtual ~TargetRegisterInfo(); 2883d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattnerpublic: 2893d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 290ef6a6a69ff1e1b709d0acb315b9f6c926c67a778Misha Brukman enum { // Define some target independent constants 2911eaf0ac1dc470fb846c16c966d1ffff8213b33efChris Lattner /// NoRegister - This physical register is not a real target register. It 2921eaf0ac1dc470fb846c16c966d1ffff8213b33efChris Lattner /// is useful as a sentinal. 2933d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner NoRegister = 0, 2943d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 2953d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// FirstVirtualRegister - This is the first register number that is 2963d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// considered to be a 'virtual' register, which is part of the SSA 2973d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// namespace. This must be the same for all targets, which means that each 298fb28579c568fcafaa4fb2a573b510deb6a6074e9Dan Gohman /// target is limited to this fixed number of registers. 299e8b0915b21026cd2314c1802bd2ccd4c91f4a83dEvan Cheng FirstVirtualRegister = 1024 3003d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner }; 3013d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 302bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner /// isPhysicalRegister - Return true if the specified register number is in 303bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner /// the physical register namespace. 304bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner static bool isPhysicalRegister(unsigned Reg) { 30571e353ed3530a5da48c3dd3257c410f6c4ce2e3eAlkis Evlogimenos assert(Reg && "this is not a register!"); 306bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner return Reg < FirstVirtualRegister; 307bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner } 308bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner 309bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner /// isVirtualRegister - Return true if the specified register number is in 310bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner /// the virtual register namespace. 311bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner static bool isVirtualRegister(unsigned Reg) { 31271e353ed3530a5da48c3dd3257c410f6c4ce2e3eAlkis Evlogimenos assert(Reg && "this is not a register!"); 313bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner return Reg >= FirstVirtualRegister; 314bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner } 315bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner 316ff110265753c19daf0468ee1facf357460497b7eEvan Cheng /// getPhysicalRegisterRegClass - Returns the Register Class of a physical 317e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson /// register of the given type. If type is EVT::Other, then just return any 318676dd7c80b6f91178452535ac45ca58feb23cc42Evan Cheng /// register class the register belongs to. 31930eae3c02244e18747f9f0dca6946d86d0ccb7f5Jim Grosbach virtual const TargetRegisterClass * 320825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson getPhysicalRegisterRegClass(unsigned Reg, EVT VT = MVT::Other) const; 321ff110265753c19daf0468ee1facf357460497b7eEvan Cheng 322bb4bdf4fe4c931e45d0a37e24ec79accd815c1d8Alkis Evlogimenos /// getAllocatableSet - Returns a bitset indexed by register number 323eff03db46d5d1df315cf2aa020ccd7f50ab3848eEvan Cheng /// indicating if a register is allocatable or not. If a register class is 324eff03db46d5d1df315cf2aa020ccd7f50ab3848eEvan Cheng /// specified, returns the subset for the class. 325769b7f89534caed11d7595b5c84aa47d3de30ad9Dan Gohman BitVector getAllocatableSet(const MachineFunction &MF, 326eff03db46d5d1df315cf2aa020ccd7f50ab3848eEvan Cheng const TargetRegisterClass *RC = NULL) const; 327bb4bdf4fe4c931e45d0a37e24ec79accd815c1d8Alkis Evlogimenos 3280f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner const TargetRegisterDesc &operator[](unsigned RegNo) const { 3293d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner assert(RegNo < NumRegs && 3303d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner "Attempting to access record for invalid register number!"); 3313d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner return Desc[RegNo]; 3323d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner } 3333d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 3343d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// Provide a get method, equivalent to [], but more useful if we have a 3353d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// pointer to this object. 3363d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// 3370f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner const TargetRegisterDesc &get(unsigned RegNo) const { 3380f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner return operator[](RegNo); 3390f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner } 3403d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 34100032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner /// getAliasSet - Return the set of registers aliased by the specified 34200032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner /// register, or a null list of there are none. The list returned is zero 34300032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner /// terminated. 34400032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner /// 34500032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner const unsigned *getAliasSet(unsigned RegNo) const { 34600032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner return get(RegNo).AliasSet; 34700032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner } 348282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 3498102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// getSubRegisters - Return the list of registers that are sub-registers of 35050aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng /// the specified register, or a null list of there are none. The list 3518102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// returned is zero terminated and sorted according to super-sub register 3528102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// relations. e.g. X86::RAX's sub-register list is EAX, AX, AL, AH. 353e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng /// 354e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng const unsigned *getSubRegisters(unsigned RegNo) const { 355e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng return get(RegNo).SubRegs; 356e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng } 357e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng 3588102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// getSuperRegisters - Return the list of registers that are super-registers 35950aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng /// of the specified register, or a null list of there are none. The list 3608102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// returned is zero terminated and sorted according to super-sub register 3618102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// relations. e.g. X86::AL's super-register list is RAX, EAX, AX. 36250aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng /// 36350aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng const unsigned *getSuperRegisters(unsigned RegNo) const { 36450aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng return get(RegNo).SuperRegs; 36550aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng } 36650aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng 367e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling /// getName - Return the human-readable symbolic target-specific name for the 368e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling /// specified physical register. 369e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling const char *getName(unsigned RegNo) const { 370e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling return get(RegNo).Name; 371181eb737b28628adc4376b973610a02039385026Bill Wendling } 372181eb737b28628adc4376b973610a02039385026Bill Wendling 3731c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// getNumRegs - Return the number of registers this target has (useful for 3741c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// sizing arrays holding per register information) 37593aa52a8a96c036454be9318bb1c78c9bfb5f390Alkis Evlogimenos unsigned getNumRegs() const { 37693aa52a8a96c036454be9318bb1c78c9bfb5f390Alkis Evlogimenos return NumRegs; 37793aa52a8a96c036454be9318bb1c78c9bfb5f390Alkis Evlogimenos } 37893aa52a8a96c036454be9318bb1c78c9bfb5f390Alkis Evlogimenos 3791fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen /// getSubRegIndexName - Return the human-readable symbolic target-specific 3801fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen /// name for the specified SubRegIndex. 3811fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen const char *getSubRegIndexName(unsigned SubIdx) const { 3821fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen assert(SubIdx && "This is not a subregister index"); 3831fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen return SubRegIndexNames[SubIdx-1]; 3841fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen } 3851fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen 3863f2f3f5341374c85955cfaffa71886724999762dLang Hames /// regsOverlap - Returns true if the two registers are equal or alias each 3873f2f3f5341374c85955cfaffa71886724999762dLang Hames /// other. The registers may be virtual register. 3883f2f3f5341374c85955cfaffa71886724999762dLang Hames bool regsOverlap(unsigned regA, unsigned regB) const { 3893f2f3f5341374c85955cfaffa71886724999762dLang Hames if (regA == regB) 3903f2f3f5341374c85955cfaffa71886724999762dLang Hames return true; 3913f2f3f5341374c85955cfaffa71886724999762dLang Hames 3923f2f3f5341374c85955cfaffa71886724999762dLang Hames if (isVirtualRegister(regA) || isVirtualRegister(regB)) 3933f2f3f5341374c85955cfaffa71886724999762dLang Hames return false; 3943f2f3f5341374c85955cfaffa71886724999762dLang Hames 3953f2f3f5341374c85955cfaffa71886724999762dLang Hames // regA and regB are distinct physical registers. Do they alias? 3963ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson size_t index = (regA + regB * 37) & (AliasesHashSize-1); 3973ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson unsigned ProbeAmt = 0; 3983ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson while (AliasesHash[index*2] != 0 && 3994d4eab219a96203f58452b39b4e94e234dfe4007Bill Wendling AliasesHash[index*2+1] != 0) { 4003ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson if (AliasesHash[index*2] == regA && AliasesHash[index*2+1] == regB) 4014d4eab219a96203f58452b39b4e94e234dfe4007Bill Wendling return true; 4023ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson 4033ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson index = (index + ProbeAmt) & (AliasesHashSize-1); 4043ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson ProbeAmt += 2; 4053ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson } 4063ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson 40704319bb2bda50d2ae7cc284cb1c4e742b44a466bAlkis Evlogimenos return false; 40804319bb2bda50d2ae7cc284cb1c4e742b44a466bAlkis Evlogimenos } 40904319bb2bda50d2ae7cc284cb1c4e742b44a466bAlkis Evlogimenos 410b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng /// isSubRegister - Returns true if regB is a sub-register of regA. 411b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng /// 412b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng bool isSubRegister(unsigned regA, unsigned regB) const { 413f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson // SubregHash is a simple quadratically probed hash table. 41457ce0319b7eb4418aac910d9a094e57d983a64d2Owen Anderson size_t index = (regA + regB * 37) & (SubregHashSize-1); 415f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson unsigned ProbeAmt = 2; 416f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson while (SubregHash[index*2] != 0 && 417f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson SubregHash[index*2+1] != 0) { 418f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson if (SubregHash[index*2] == regA && SubregHash[index*2+1] == regB) 419f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson return true; 42095923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 42157ce0319b7eb4418aac910d9a094e57d983a64d2Owen Anderson index = (index + ProbeAmt) & (SubregHashSize-1); 422f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson ProbeAmt += 2; 423f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson } 42495923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 425f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson return false; 426b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng } 427b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng 428b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng /// isSuperRegister - Returns true if regB is a super-register of regA. 429b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng /// 430b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng bool isSuperRegister(unsigned regA, unsigned regB) const { 43176f0ad7bf5c05d6056b3bf335d0c3fb7e72de5d6Jakob Stoklund Olesen return isSubRegister(regB, regA); 432b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng } 433b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng 4340098b3e2b69e527ddcf2ebad7a3081898fa3b4f0Evan Cheng /// getCalleeSavedRegs - Return a null-terminated list of all of the 4350098b3e2b69e527ddcf2ebad7a3081898fa3b4f0Evan Cheng /// callee saved registers on this target. The register should be in the 43602569d7355b03155b32c1c0d0e46f6aa957f4802Evan Cheng /// order of desired callee-save stack frame offset. The first register is 43702569d7355b03155b32c1c0d0e46f6aa957f4802Evan Cheng /// closed to the incoming stack pointer if stack grows down, and vice versa. 4382365f51ed03afe6993bae962fdc2e5a956a64cd5Anton Korobeynikov virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF = 0) 4392365f51ed03afe6993bae962fdc2e5a956a64cd5Anton Korobeynikov const = 0; 4408797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 4410098b3e2b69e527ddcf2ebad7a3081898fa3b4f0Evan Cheng /// getCalleeSavedRegClasses - Return a null-terminated list of the preferred 4420098b3e2b69e527ddcf2ebad7a3081898fa3b4f0Evan Cheng /// register classes to spill each callee saved register with. The order and 4432f9dbe8ee6ebe8ec2d72d66dcbd6018918eab018Chris Lattner /// length of this list match the getCalleeSaveRegs() list. 4442365f51ed03afe6993bae962fdc2e5a956a64cd5Anton Korobeynikov virtual const TargetRegisterClass* const *getCalleeSavedRegClasses( 4452365f51ed03afe6993bae962fdc2e5a956a64cd5Anton Korobeynikov const MachineFunction *MF) const =0; 4468797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 447b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng /// getReservedRegs - Returns a bitset indexed by physical register number 4481c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// indicating if a register is a special register that has particular uses 4491c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// and should be considered unavailable at all times, e.g. SP, RA. This is 4501c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// used by register scavenger to determine what registers are free. 451b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0; 452b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng 4537bf1c272ab27297a7bbab329de3f17ddb26e02a3Nate Begeman /// getSubReg - Returns the physical register number of sub-register "Index" 454dd595c5998214c6ee07ed46f5db551b2abbfbbb3Evan Cheng /// for physical register RegNo. Return zero if the sub-register does not 455dd595c5998214c6ee07ed46f5db551b2abbfbbb3Evan Cheng /// exist. 4567bf1c272ab27297a7bbab329de3f17ddb26e02a3Nate Begeman virtual unsigned getSubReg(unsigned RegNo, unsigned Index) const = 0; 4577bf1c272ab27297a7bbab329de3f17ddb26e02a3Nate Begeman 458fae3e923452b85e72b2c03dd6eacc063f59d81b1Evan Cheng /// getSubRegIndex - For a given register pair, return the sub-register index 45900621efb40edb7fe16bf2af6d4699c9d024a28e7David Goodwin /// if the are second register is a sub-register of the first. Return zero 460fae3e923452b85e72b2c03dd6eacc063f59d81b1Evan Cheng /// otherwise. 461fae3e923452b85e72b2c03dd6eacc063f59d81b1Evan Cheng virtual unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const = 0; 462fae3e923452b85e72b2c03dd6eacc063f59d81b1Evan Cheng 4638a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng /// getMatchingSuperReg - Return a super-register of the specified register 4648a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng /// Reg so its sub-register of index SubIdx is Reg. 46595923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, 4668a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng const TargetRegisterClass *RC) const { 4678a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng for (const unsigned *SRs = getSuperRegisters(Reg); unsigned SR = *SRs;++SRs) 4688a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng if (Reg == getSubReg(SR, SubIdx) && RC->contains(SR)) 4698a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng return SR; 4708a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng return 0; 4718a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng } 4728a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng 473b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Cheng /// canCombinedSubRegIndex - Given a register class and a list of sub-register 474b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Cheng /// indices, return true if it's possible to combine the sub-register indices 475b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Cheng /// into one that corresponds to a larger sub-register. Return the new sub- 476b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Cheng /// register index by reference. Note the new index by be zero if the given 477b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Cheng /// sub-registers combined to form the whole register. 478b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Cheng virtual bool canCombinedSubRegIndex(const TargetRegisterClass *RC, 479b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Cheng SmallVectorImpl<unsigned> &SubIndices, 480b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Cheng unsigned &NewSubIdx) const { 481b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Cheng return 0; 482b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Cheng } 483b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Cheng 4845248468473f0488a652b545ad95f7abda302b7b5Evan Cheng /// getMatchingSuperRegClass - Return a subclass of the specified register 4855248468473f0488a652b545ad95f7abda302b7b5Evan Cheng /// class A so that each register in it has a sub-register of the 4865248468473f0488a652b545ad95f7abda302b7b5Evan Cheng /// specified sub-register index which is in the specified register class B. 4875248468473f0488a652b545ad95f7abda302b7b5Evan Cheng virtual const TargetRegisterClass * 4885248468473f0488a652b545ad95f7abda302b7b5Evan Cheng getMatchingSuperRegClass(const TargetRegisterClass *A, 4895248468473f0488a652b545ad95f7abda302b7b5Evan Cheng const TargetRegisterClass *B, unsigned Idx) const { 4905248468473f0488a652b545ad95f7abda302b7b5Evan Cheng return 0; 4915248468473f0488a652b545ad95f7abda302b7b5Evan Cheng } 4925248468473f0488a652b545ad95f7abda302b7b5Evan Cheng 4932da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// composeSubRegIndices - Return the subregister index you get from composing 4942da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// two subregister indices. 4952da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// 4962da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// If R:a:b is the same register as R:c, then composeSubRegIndices(a, b) 4972da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// returns c. Note that composeSubRegIndices does not tell you about illegal 4982da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// compositions. If R does not have a subreg a, or R:a does not have a subreg 4992da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// b, composeSubRegIndices doesn't tell you. 5002da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// 5012da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// The ARM register Q0 has two D subregs dsub_0:D0 and dsub_1:D1. It also has 5022da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// ssub_0:S0 - ssub_3:S3 subregs. 5032da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// If you compose subreg indices dsub_1, ssub_0 you get ssub_2. 5042da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// 5052da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen virtual unsigned composeSubRegIndices(unsigned a, unsigned b) const { 5062da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen // This default implementation is correct for most targets. 5072da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen return b; 5082da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen } 5092da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen 5108797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner //===--------------------------------------------------------------------===// 5118797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner // Register Class Information 5128797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner // 5138797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 5148797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner /// Register class iterators 51592988ecdb6ca641ba39d1d1f8cbc57a89b63bbadChris Lattner /// 5168797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner regclass_iterator regclass_begin() const { return RegClassBegin; } 5178797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner regclass_iterator regclass_end() const { return RegClassEnd; } 5188797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 5198797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner unsigned getNumRegClasses() const { 52034cd4a484e532cc463fd5a4bf59b88d13c5467c1Evan Cheng return (unsigned)(regclass_end()-regclass_begin()); 5218797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner } 52295923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 52360f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey /// getRegClass - Returns the register class associated with the enumeration 52460f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey /// value. See class TargetOperandInfo. 52560f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey const TargetRegisterClass *getRegClass(unsigned i) const { 52660f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey assert(i <= getNumRegClasses() && "Register Class ID out of range"); 52760f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey return i ? RegClassBegin[i - 1] : NULL; 52860f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey } 5298797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 530770bcc7b15adbc978800db70dbb1c3c22913b52cEvan Cheng /// getPointerRegClass - Returns a TargetRegisterClass used for pointer 5312cfd52c507bd5790457a171eb9bcb39019cc6860Chris Lattner /// values. If a target supports multiple different pointer register classes, 5322cfd52c507bd5790457a171eb9bcb39019cc6860Chris Lattner /// kind specifies which one is indicated. 5332cfd52c507bd5790457a171eb9bcb39019cc6860Chris Lattner virtual const TargetRegisterClass *getPointerRegClass(unsigned Kind=0) const { 534770bcc7b15adbc978800db70dbb1c3c22913b52cEvan Cheng assert(0 && "Target didn't implement getPointerRegClass!"); 535770bcc7b15adbc978800db70dbb1c3c22913b52cEvan Cheng return 0; // Must return a value in order to compile with VS 2005 536770bcc7b15adbc978800db70dbb1c3c22913b52cEvan Cheng } 5378797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 538ff110265753c19daf0468ee1facf357460497b7eEvan Cheng /// getCrossCopyRegClass - Returns a legal register class to copy a register 539ff110265753c19daf0468ee1facf357460497b7eEvan Cheng /// in the specified class to or from. Returns NULL if it is possible to copy 540ff110265753c19daf0468ee1facf357460497b7eEvan Cheng /// between a two registers of the specified class. 541ff110265753c19daf0468ee1facf357460497b7eEvan Cheng virtual const TargetRegisterClass * 542ff110265753c19daf0468ee1facf357460497b7eEvan Cheng getCrossCopyRegClass(const TargetRegisterClass *RC) const { 543ff110265753c19daf0468ee1facf357460497b7eEvan Cheng return NULL; 544ff110265753c19daf0468ee1facf357460497b7eEvan Cheng } 545ff110265753c19daf0468ee1facf357460497b7eEvan Cheng 546358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng /// getAllocationOrder - Returns the register allocation order for a specified 547358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng /// register class in the form of a pair of TargetRegisterClass iterators. 548358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng virtual std::pair<TargetRegisterClass::iterator,TargetRegisterClass::iterator> 549358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng getAllocationOrder(const TargetRegisterClass *RC, 550f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng unsigned HintType, unsigned HintReg, 551358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng const MachineFunction &MF) const { 552358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng return std::make_pair(RC->allocation_order_begin(MF), 553358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng RC->allocation_order_end(MF)); 554358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng } 555358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng 556358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng /// ResolveRegAllocHint - Resolves the specified register allocation hint 557358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng /// to a physical register. Returns the physical register if it is successful. 558f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng virtual unsigned ResolveRegAllocHint(unsigned Type, unsigned Reg, 559f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng const MachineFunction &MF) const { 560358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng if (Type == 0 && Reg && isPhysicalRegister(Reg)) 561358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng return Reg; 562358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng return 0; 563358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng } 564358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng 565f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// UpdateRegAllocHint - A callback to allow target a chance to update 566f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// register allocation hints when a register is "changed" (e.g. coalesced) 567f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// to another register. e.g. On ARM, some virtual registers should target 568f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// register pairs, if one of pair is coalesced to another register, the 569f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// allocation hint of the other half of the pair should be changed to point 570f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// to the new register. 571f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng virtual void UpdateRegAllocHint(unsigned Reg, unsigned NewReg, 572f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng MachineFunction &MF) const { 573f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng // Do nothing. 574f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng } 575f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng 5761c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// targetHandlesStackFrameRounding - Returns true if the target is 5771c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// responsible for rounding up the stack frame (probably at emitPrologue 5781c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// time). 57902a20291410a6814c657b69901a57103d4861a07Evan Cheng virtual bool targetHandlesStackFrameRounding() const { 58002a20291410a6814c657b69901a57103d4861a07Evan Cheng return false; 58102a20291410a6814c657b69901a57103d4861a07Evan Cheng } 58202a20291410a6814c657b69901a57103d4861a07Evan Cheng 5831c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// requiresRegisterScavenging - returns true if the target requires (and can 5841c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// make use of) the register scavenger. 58536230cdda48edf6c634f2dcf69f9d78ac5a17377Evan Cheng virtual bool requiresRegisterScavenging(const MachineFunction &MF) const { 58637f15a6d488d256d371f6c39ab83837bc9c0772dEvan Cheng return false; 58737f15a6d488d256d371f6c39ab83837bc9c0772dEvan Cheng } 58895923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 58965c58daa8b8985d2116216043103009815a55e77Jim Grosbach /// requiresFrameIndexScavenging - returns true if the target requires post 59065c58daa8b8985d2116216043103009815a55e77Jim Grosbach /// PEI scavenging of registers for materializing frame index constants. 59165c58daa8b8985d2116216043103009815a55e77Jim Grosbach virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const { 59265c58daa8b8985d2116216043103009815a55e77Jim Grosbach return false; 59365c58daa8b8985d2116216043103009815a55e77Jim Grosbach } 59465c58daa8b8985d2116216043103009815a55e77Jim Grosbach 5951c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// hasFP - Return true if the specified function should have a dedicated 5961c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// frame pointer register. For most targets this is true only if the function 5971c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// has variable sized allocas or if frame pointer elimination is disabled. 598dc77540d9506dc151d79b94bae88bd841880ef37Evan Cheng virtual bool hasFP(const MachineFunction &MF) const = 0; 599dc77540d9506dc151d79b94bae88bd841880ef37Evan Cheng 600910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// hasReservedCallFrame - Under normal circumstances, when a frame pointer is 601910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// not required, we reserve argument space for call sites in the function 602910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// immediately on entry to the current function. This eliminates the need for 603910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// add/sub sp brackets around call sites. Returns true if the call frame is 604910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// included as part of the stack frame. 60514f1dd120fc13200697560680999c0efe7ecd714Evan Cheng virtual bool hasReservedCallFrame(MachineFunction &MF) const { 60614f1dd120fc13200697560680999c0efe7ecd714Evan Cheng return !hasFP(MF); 60714f1dd120fc13200697560680999c0efe7ecd714Evan Cheng } 60814f1dd120fc13200697560680999c0efe7ecd714Evan Cheng 6094642ad3af1cf508ac320b9afd25b065f08b36574Jim Grosbach /// canSimplifyCallFramePseudos - When possible, it's best to simplify the 6104642ad3af1cf508ac320b9afd25b065f08b36574Jim Grosbach /// call frame pseudo ops before doing frame index elimination. This is 6114642ad3af1cf508ac320b9afd25b065f08b36574Jim Grosbach /// possible only when frame index references between the pseudos won't 6124642ad3af1cf508ac320b9afd25b065f08b36574Jim Grosbach /// need adjusted for the call frame adjustments. Normally, that's true 6134642ad3af1cf508ac320b9afd25b065f08b36574Jim Grosbach /// if the function has a reserved call frame or a frame pointer. Some 6144642ad3af1cf508ac320b9afd25b065f08b36574Jim Grosbach /// targets (Thumb2, for example) may have more complicated criteria, 6154642ad3af1cf508ac320b9afd25b065f08b36574Jim Grosbach /// however, and can override this behavior. 6164642ad3af1cf508ac320b9afd25b065f08b36574Jim Grosbach virtual bool canSimplifyCallFramePseudos(MachineFunction &MF) const { 6174642ad3af1cf508ac320b9afd25b065f08b36574Jim Grosbach return hasReservedCallFrame(MF) || hasFP(MF); 6184642ad3af1cf508ac320b9afd25b065f08b36574Jim Grosbach } 6194642ad3af1cf508ac320b9afd25b065f08b36574Jim Grosbach 620910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// hasReservedSpillSlot - Return true if target has reserved a spill slot in 621910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// the stack frame of the given function for the specified register. e.g. On 622910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// x86, if the frame register is required, the first fixed stack object is 623910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// reserved as its spill slot. This tells PEI not to create a new stack frame 624910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// object for the given register. It should be called only after 625910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// processFunctionBeforeCalleeSavedScan(). 626910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng virtual bool hasReservedSpillSlot(MachineFunction &MF, unsigned Reg, 627910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng int &FrameIdx) const { 628910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng return false; 629910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng } 630910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng 631910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// needsStackRealignment - true if storage within the function requires the 632910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// stack pointer to be aligned more than the normal calling convention calls 633910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// for. 634b5dae003252d8e650a32bfdf33cba5aed8e41e40Dale Johannesen virtual bool needsStackRealignment(const MachineFunction &MF) const { 635b5dae003252d8e650a32bfdf33cba5aed8e41e40Dale Johannesen return false; 636b5dae003252d8e650a32bfdf33cba5aed8e41e40Dale Johannesen } 637b5dae003252d8e650a32bfdf33cba5aed8e41e40Dale Johannesen 638f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// getCallFrameSetup/DestroyOpcode - These methods return the opcode of the 639f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// frame setup/destroy instructions if they exist (-1 otherwise). Some 640f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// targets use pseudo instructions in order to abstract away the difference 641f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// between operating with a frame pointer and operating without, through the 642f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// use of these two instructions. 643f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 644f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner int getCallFrameSetupOpcode() const { return CallFrameSetupOpcode; } 645f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner int getCallFrameDestroyOpcode() const { return CallFrameDestroyOpcode; } 646f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 647f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// eliminateCallFramePseudoInstr - This method is called during prolog/epilog 648f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// code insertion to eliminate call frame setup and destroy pseudo 649f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// instructions (but only if the Target is using them). It is responsible 650f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// for eliminating these instructions, replacing them with concrete 651f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// instructions. This method need only be implemented if using call frame 6528a1478b6d7aeaed8363316d2e0b90d9f53525c29Chris Lattner /// setup/destroy pseudo instructions. 653f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 65434695381d626485a560594f162701088079589dfMisha Brukman virtual void 6558604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner eliminateCallFramePseudoInstr(MachineFunction &MF, 6568604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner MachineBasicBlock &MBB, 6578604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner MachineBasicBlock::iterator MI) const { 658f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner assert(getCallFrameSetupOpcode()== -1 && getCallFrameDestroyOpcode()== -1 && 65900876a2808f1a8061f7e0852c7949fc5074ecb04Misha Brukman "eliminateCallFramePseudoInstr must be implemented if using" 66000876a2808f1a8061f7e0852c7949fc5074ecb04Misha Brukman " call frame setup/destroy pseudo instructions!"); 661f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner assert(0 && "Call Frame Pseudo Instructions do not exist on this target!"); 662f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner } 663f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 6640098b3e2b69e527ddcf2ebad7a3081898fa3b4f0Evan Cheng /// processFunctionBeforeCalleeSavedScan - This method is called immediately 66502569d7355b03155b32c1c0d0e46f6aa957f4802Evan Cheng /// before PrologEpilogInserter scans the physical registers used to determine 6660098b3e2b69e527ddcf2ebad7a3081898fa3b4f0Evan Cheng /// what callee saved registers should be spilled. This method is optional. 66728b3c45109153bc50d3d9e97dccb25ffd043fa50Evan Cheng virtual void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, 66828b3c45109153bc50d3d9e97dccb25ffd043fa50Evan Cheng RegScavenger *RS = NULL) const { 66928b3c45109153bc50d3d9e97dccb25ffd043fa50Evan Cheng 67002569d7355b03155b32c1c0d0e46f6aa957f4802Evan Cheng } 67102569d7355b03155b32c1c0d0e46f6aa957f4802Evan Cheng 672f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// processFunctionBeforeFrameFinalized - This method is called immediately 673f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// before the specified functions frame layout (MF.getFrameInfo()) is 674f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// finalized. Once the frame is finalized, MO_FrameIndex operands are 67502569d7355b03155b32c1c0d0e46f6aa957f4802Evan Cheng /// replaced with direct constants. This method is optional. 676f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 6778604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF) const { 678e668dab5b339df01920b8bff890a70455b7dd27aAlkis Evlogimenos } 679f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 680d482f55af135081aee7f7ab972bb8973f189c88fJim Grosbach /// saveScavengerRegister - Spill the register so it can be used by the 681d482f55af135081aee7f7ab972bb8973f189c88fJim Grosbach /// register scavenger. Return true if the register was spilled, false 682d482f55af135081aee7f7ab972bb8973f189c88fJim Grosbach /// otherwise. If this function does not spill the register, the scavenger 683540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach /// will instead spill it to the emergency spill slot. 684540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach /// 685540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach virtual bool saveScavengerRegister(MachineBasicBlock &MBB, 686540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach MachineBasicBlock::iterator I, 687d482f55af135081aee7f7ab972bb8973f189c88fJim Grosbach MachineBasicBlock::iterator &UseMI, 688540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach const TargetRegisterClass *RC, 6891f8f4d2db734d9881467a5706acac73660842d43Evan Cheng unsigned Reg) const { 6901f8f4d2db734d9881467a5706acac73660842d43Evan Cheng return false; 6911f8f4d2db734d9881467a5706acac73660842d43Evan Cheng } 692540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach 693f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// eliminateFrameIndex - This method must be overriden to eliminate abstract 694f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// frame indices from instructions which may use them. The instruction 695f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// referenced by the iterator contains an MO_FrameIndex operand which must be 696f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// eliminated by this method. This method may modify or replace the 697c49a10aca1e31351c2e11b25ba636a23b93c46c8Dale Johannesen /// specified instruction, as long as it keeps the iterator pointing at the 69818b111bffe643b5ad52ae10a1d5728b0c1ac92f0Evan Cheng /// finished product. SPAdj is the SP adjustment due to call frame setup 6991ad70c09c890c3abcc147503f2e23082f683790cMatthijs Kooijman /// instruction. 700b58f498f7502e7e1833decbbbb4df771367c7341Jim Grosbach /// 701b58f498f7502e7e1833decbbbb4df771367c7341Jim Grosbach /// When -enable-frame-index-scavenging is enabled, the virtual register 702b58f498f7502e7e1833decbbbb4df771367c7341Jim Grosbach /// allocated for this frame index is returned and its value is stored in 703b58f498f7502e7e1833decbbbb4df771367c7341Jim Grosbach /// *Value. 704dff4b4c5a7cc894d3b4b6c6e779ea8f47fa50630Jim Grosbach typedef std::pair<unsigned, int> FrameIndexValue; 705b58f498f7502e7e1833decbbbb4df771367c7341Jim Grosbach virtual unsigned eliminateFrameIndex(MachineBasicBlock::iterator MI, 706dff4b4c5a7cc894d3b4b6c6e779ea8f47fa50630Jim Grosbach int SPAdj, FrameIndexValue *Value = NULL, 707b58f498f7502e7e1833decbbbb4df771367c7341Jim Grosbach RegScavenger *RS=NULL) const = 0; 708f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 709f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// emitProlog/emitEpilog - These methods insert prolog and epilog code into 710854255361ed5a8f009d64c4869ed2a85cf0d8faeMatthijs Kooijman /// the function. 7118604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner virtual void emitPrologue(MachineFunction &MF) const = 0; 7128604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner virtual void emitEpilogue(MachineFunction &MF, 7138604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner MachineBasicBlock &MBB) const = 0; 71495923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 715a99791886d5d4af2b900cd8cc1c9ed1677b6f0f4Jim Laskey //===--------------------------------------------------------------------===// 716a99791886d5d4af2b900cd8cc1c9ed1677b6f0f4Jim Laskey /// Debug information queries. 71795923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 7184188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// getDwarfRegNum - Map a target register to an equivalent dwarf register 719b97aec663b1591e71c9ddee6dbb327d1b827eda5Dale Johannesen /// number. Returns -1 if there is no equivalent value. The second 720b97aec663b1591e71c9ddee6dbb327d1b827eda5Dale Johannesen /// parameter allows targets to use different numberings for EH info and 7212bbeccdee1937f6cef9f8762595246f447162a4fMatthijs Kooijman /// debugging info. 722b97aec663b1591e71c9ddee6dbb327d1b827eda5Dale Johannesen virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const = 0; 723a99791886d5d4af2b900cd8cc1c9ed1677b6f0f4Jim Laskey 724a99791886d5d4af2b900cd8cc1c9ed1677b6f0f4Jim Laskey /// getFrameRegister - This method should return the register used as a base 7254188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// for values allocated in the current stack frame. 726b9c2fd964ee7dd7823ac71db8443055e4d0f1c15David Greene virtual unsigned getFrameRegister(const MachineFunction &MF) const = 0; 72772bebb9205c1628601b052d25555aabe6e15e6f4Evan Cheng 72872bebb9205c1628601b052d25555aabe6e15e6f4Evan Cheng /// getFrameIndexOffset - Returns the displacement from the frame register to 72972bebb9205c1628601b052d25555aabe6e15e6f4Evan Cheng /// the stack frame of the specified index. 73030c6b75ac2eef548c18110a38c9798ea5314cabaChris Lattner virtual int getFrameIndexOffset(const MachineFunction &MF, int FI) const; 73195923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 732a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach /// getFrameIndexReference - This method should return the base register 733a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach /// and offset used to reference a frame index location. The offset is 734a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach /// returned directly, and the base register is returned via FrameReg. 73530c6b75ac2eef548c18110a38c9798ea5314cabaChris Lattner virtual int getFrameIndexReference(const MachineFunction &MF, int FI, 736a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach unsigned &FrameReg) const { 737a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach // By default, assume all frame indices are referenced via whatever 738a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach // getFrameRegister() says. The target can override this if it's doing 739a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach // something different. 740a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach FrameReg = getFrameRegister(MF); 741a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach return getFrameIndexOffset(MF, FI); 742a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach } 743a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach 7444188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// getRARegister - This method should return the register where the return 7454188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// address can be found. 7464188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey virtual unsigned getRARegister() const = 0; 74795923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 7484188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// getInitialFrameState - Returns a list of machine moves that are assumed 7494188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// on entry to all functions. Note that LabelID is ignored (assumed to be 7504188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// the beginning of the function.) 7515e73d5bd2e98afda12fa69a7ea83050c69be0d34Jim Laskey virtual void getInitialFrameState(std::vector<MachineMove> &Moves) const; 7523d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner}; 7533d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 754c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng 75594c002a190cd2e3a52b1510bc997e53d63af0b3bChris Lattner// This is useful when building IndexedMaps keyed on virtual registers 75659bf4fcc0680e75b408579064d1205a132361196Duncan Sandsstruct VirtReg2IndexFunctor : public std::unary_function<unsigned, unsigned> { 7574d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos unsigned operator()(unsigned Reg) const { 7586f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman return Reg - TargetRegisterInfo::FirstVirtualRegister; 7594d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos } 7604d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos}; 7614d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos 762c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng/// getCommonSubClass - find the largest common subclass of A and B. Return NULL 763c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng/// if there is no common subclass. 764c781a243a3d17e7e763515794168d8fa6043f565Evan Chengconst TargetRegisterClass *getCommonSubClass(const TargetRegisterClass *A, 765c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng const TargetRegisterClass *B); 766c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng 767d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke} // End llvm namespace 768d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 7693d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner#endif 770