TargetRegisterInfo.h revision 63f8659d6936077c5e8e34eecb55ff1de0db5686
16f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman//=== Target/TargetRegisterInfo.h - Target Register Information -*- C++ -*-===// 234695381d626485a560594f162701088079589dfMisha Brukman// 36fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// The LLVM Compiler Infrastructure 46fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 57ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// This file is distributed under the University of Illinois Open Source 67ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// License. See LICENSE.TXT for details. 734695381d626485a560594f162701088079589dfMisha Brukman// 86fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell//===----------------------------------------------------------------------===// 93d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// 103d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// This file describes an abstract interface used to get information about a 113d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// target machines register file. This information is used for a variety of 123d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// purposed, especially register allocation. 133d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// 143d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner//===----------------------------------------------------------------------===// 153d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 166f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman#ifndef LLVM_TARGET_TARGETREGISTERINFO_H 176f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman#define LLVM_TARGET_TARGETREGISTERINFO_H 183d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 19024126ee23e6e4430a77025b61d0e713180f03d3Alkis Evlogimenos#include "llvm/CodeGen/MachineBasicBlock.h" 20a385bf7b6dc9b71024aa4c7bb7026bab3c7ebe91Chris Lattner#include "llvm/CodeGen/ValueTypes.h" 21ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson#include "llvm/ADT/DenseSet.h" 224d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos#include <cassert> 234d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos#include <functional> 243d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 25d0fde30ce850b78371fd1386338350591f9ff494Brian Gaekenamespace llvm { 26d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 27171eed533408a23de0b141af17475fd6b4da72e0Evan Chengclass BitVector; 28198ab640bbb0b8e1cdda518b7f8b348764e4402cChris Lattnerclass MachineFunction; 294188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskeyclass MachineMove; 30171eed533408a23de0b141af17475fd6b4da72e0Evan Chengclass RegScavenger; 31b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Chengtemplate<class T> class SmallVectorImpl; 32414e5023f8f8b22486313e2867fdb39c7c4f564bJakob Stoklund Olesenclass raw_ostream; 33282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 340f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner/// TargetRegisterDesc - This record contains all of the information known about 35b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen/// a particular register. The Overlaps field contains a pointer to a zero 36b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen/// terminated array of registers that this register aliases, starting with 37b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen/// itself. This is needed for architectures like X86 which have AL alias AX 38b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen/// alias EAX. The SubRegs field is a zero terminated array of registers that 39b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen/// are sub-registers of the specific register, e.g. AL, AH are sub-registers of 40b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen/// AX. The SuperRegs field is a zero terminated array of registers that are 412036835346ddf983d66b49505bd52db1d3f8b49dEvan Cheng/// super-registers of the specific register, e.g. RAX, EAX, are super-registers 422036835346ddf983d66b49505bd52db1d3f8b49dEvan Cheng/// of AX. 433d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner/// 440f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattnerstruct TargetRegisterDesc { 45e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling const char *Name; // Printable name for the reg (for debugging) 46b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen const unsigned *Overlaps; // Overlapping registers, described above 47a92d62c15fa2bf84453489716323b0159912c55dEvan Cheng const unsigned *SubRegs; // Sub-register set, described above 4850aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng const unsigned *SuperRegs; // Super-register set, described above 493d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner}; 503d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 51282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukmanclass TargetRegisterClass { 52282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukmanpublic: 530f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner typedef const unsigned* iterator; 540f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner typedef const unsigned* const_iterator; 55282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 56e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson typedef const EVT* vt_iterator; 573b0c0148ed9ec752b240dbea767ad4a9f0a682caEvan Cheng typedef const TargetRegisterClass* const * sc_iterator; 580f24e33b73542bd7b280550aec6cff32d808e724Chris Lattnerprivate: 5960f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey unsigned ID; 6041c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner const char *Name; 6116d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner const vt_iterator VTs; 62696736be8b80fe3946f73605b46359345afdf57aEvan Cheng const sc_iterator SubClasses; 63c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng const sc_iterator SuperClasses; 64f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman const sc_iterator SubRegClasses; 65f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman const sc_iterator SuperRegClasses; 66f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner const unsigned RegSize, Alignment; // Size & Alignment of register in bytes 67a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng const int CopyCost; 680f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner const iterator RegsBegin, RegsEnd; 69ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson DenseSet<unsigned> RegSet; 700f24e33b73542bd7b280550aec6cff32d808e724Chris Lattnerpublic: 7160f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey TargetRegisterClass(unsigned id, 7241c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner const char *name, 73e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson const EVT *vts, 743b0c0148ed9ec752b240dbea767ad4a9f0a682caEvan Cheng const TargetRegisterClass * const *subcs, 753b0c0148ed9ec752b240dbea767ad4a9f0a682caEvan Cheng const TargetRegisterClass * const *supcs, 76f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman const TargetRegisterClass * const *subregcs, 77f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman const TargetRegisterClass * const *superregcs, 78a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng unsigned RS, unsigned Al, int CC, 79a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng iterator RB, iterator RE) 8041c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner : ID(id), Name(name), VTs(vts), SubClasses(subcs), SuperClasses(supcs), 81f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman SubRegClasses(subregcs), SuperRegClasses(superregcs), 82ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson RegSize(RS), Alignment(Al), CopyCost(CC), RegsBegin(RB), RegsEnd(RE) { 83ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson for (iterator I = RegsBegin, E = RegsEnd; I != E; ++I) 84ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson RegSet.insert(*I); 85ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson } 860f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner virtual ~TargetRegisterClass() {} // Allow subclasses 8795923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 886c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// getID() - Return the register class ID number. 896c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// 9060f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey unsigned getID() const { return ID; } 9141c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner 9241c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner /// getName() - Return the register class name for debugging. 9341c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner /// 9441c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner const char *getName() const { return Name; } 9541c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner 966c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// begin/end - Return all of the registers in this class. 976c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// 980f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner iterator begin() const { return RegsBegin; } 990f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner iterator end() const { return RegsEnd; } 100282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 1016c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// getNumRegs - Return the number of registers in this class. 1026c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// 10334cd4a484e532cc463fd5a4bf59b88d13c5467c1Evan Cheng unsigned getNumRegs() const { return (unsigned)(RegsEnd-RegsBegin); } 104f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 1056c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// getRegister - Return the specified register in the class. 1066c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// 1070f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner unsigned getRegister(unsigned i) const { 1080f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner assert(i < getNumRegs() && "Register number out of range!"); 1090f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner return RegsBegin[i]; 1100f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner } 111282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 112f02b37da6f956dc9120a0da6ffa643b2753beb41Chris Lattner /// contains - Return true if the specified register is included in this 113e08b320f15b95eb3279fddba6ccb615eafbc4225Dan Gohman /// register class. This does not include virtual registers. 114f02b37da6f956dc9120a0da6ffa643b2753beb41Chris Lattner bool contains(unsigned Reg) const { 115ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson return RegSet.count(Reg); 116f02b37da6f956dc9120a0da6ffa643b2753beb41Chris Lattner } 117f02b37da6f956dc9120a0da6ffa643b2753beb41Chris Lattner 118320bdcbfe2691021702085f718db1617b1d4df49Jakob Stoklund Olesen /// contains - Return true if both registers are in this class. 119320bdcbfe2691021702085f718db1617b1d4df49Jakob Stoklund Olesen bool contains(unsigned Reg1, unsigned Reg2) const { 120320bdcbfe2691021702085f718db1617b1d4df49Jakob Stoklund Olesen return contains(Reg1) && contains(Reg2); 121320bdcbfe2691021702085f718db1617b1d4df49Jakob Stoklund Olesen } 122320bdcbfe2691021702085f718db1617b1d4df49Jakob Stoklund Olesen 1236510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman /// hasType - return true if this TargetRegisterClass has the ValueType vt. 1246510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman /// 125e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson bool hasType(EVT vt) const { 126cdfad36b401be6fc709ea4051f9de58e1a30bcc9Duncan Sands for(int i = 0; VTs[i] != MVT::Other; ++i) 1276510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman if (VTs[i] == vt) 1286510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman return true; 1296510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman return false; 1306510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman } 13195923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 132696736be8b80fe3946f73605b46359345afdf57aEvan Cheng /// vt_begin / vt_end - Loop over all of the value types that can be 133696736be8b80fe3946f73605b46359345afdf57aEvan Cheng /// represented by values in this register class. 13416d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner vt_iterator vt_begin() const { 13516d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner return VTs; 13616d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner } 13716d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner 13816d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner vt_iterator vt_end() const { 13916d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner vt_iterator I = VTs; 140cdfad36b401be6fc709ea4051f9de58e1a30bcc9Duncan Sands while (*I != MVT::Other) ++I; 14116d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner return I; 14216d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner } 143696736be8b80fe3946f73605b46359345afdf57aEvan Cheng 144f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// subregclasses_begin / subregclasses_end - Loop over all of 145f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// the subreg register classes of this register class. 146f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator subregclasses_begin() const { 147f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return SubRegClasses; 148f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 149f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 150f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator subregclasses_end() const { 151f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator I = SubRegClasses; 152f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman while (*I != NULL) ++I; 153f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return I; 154f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 155f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 156fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen /// getSubRegisterRegClass - Return the register class of subregisters with 157fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen /// index SubIdx, or NULL if no such class exists. 158fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen const TargetRegisterClass* getSubRegisterRegClass(unsigned SubIdx) const { 159fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen assert(SubIdx>0 && "Invalid subregister index"); 160fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen return SubRegClasses[SubIdx-1]; 161fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen } 162fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen 163f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// superregclasses_begin / superregclasses_end - Loop over all of 164f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// the superreg register classes of this register class. 165f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator superregclasses_begin() const { 166f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return SuperRegClasses; 167f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 168f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 169f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator superregclasses_end() const { 170f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator I = SuperRegClasses; 171f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman while (*I != NULL) ++I; 172f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return I; 173f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 174f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 175f451cb870efcf9e0302d25ed05f4cac6bb494e42Dan Gohman /// hasSubClass - return true if the specified TargetRegisterClass 176f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// is a proper subset of this TargetRegisterClass. 1771367fd09cb021bae61e7dd2ee208f76574c8e789Christopher Lamb bool hasSubClass(const TargetRegisterClass *cs) const { 17895923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach for (int i = 0; SubClasses[i] != NULL; ++i) 179696736be8b80fe3946f73605b46359345afdf57aEvan Cheng if (SubClasses[i] == cs) 180696736be8b80fe3946f73605b46359345afdf57aEvan Cheng return true; 181696736be8b80fe3946f73605b46359345afdf57aEvan Cheng return false; 182696736be8b80fe3946f73605b46359345afdf57aEvan Cheng } 183696736be8b80fe3946f73605b46359345afdf57aEvan Cheng 184f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// subclasses_begin / subclasses_end - Loop over all of the classes 185f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// that are proper subsets of this register class. 186696736be8b80fe3946f73605b46359345afdf57aEvan Cheng sc_iterator subclasses_begin() const { 187696736be8b80fe3946f73605b46359345afdf57aEvan Cheng return SubClasses; 188696736be8b80fe3946f73605b46359345afdf57aEvan Cheng } 18995923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 190696736be8b80fe3946f73605b46359345afdf57aEvan Cheng sc_iterator subclasses_end() const { 191696736be8b80fe3946f73605b46359345afdf57aEvan Cheng sc_iterator I = SubClasses; 192696736be8b80fe3946f73605b46359345afdf57aEvan Cheng while (*I != NULL) ++I; 193696736be8b80fe3946f73605b46359345afdf57aEvan Cheng return I; 194696736be8b80fe3946f73605b46359345afdf57aEvan Cheng } 19595923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 1961367fd09cb021bae61e7dd2ee208f76574c8e789Christopher Lamb /// hasSuperClass - return true if the specified TargetRegisterClass is a 197f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// proper superset of this TargetRegisterClass. 1981367fd09cb021bae61e7dd2ee208f76574c8e789Christopher Lamb bool hasSuperClass(const TargetRegisterClass *cs) const { 19995923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach for (int i = 0; SuperClasses[i] != NULL; ++i) 200c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng if (SuperClasses[i] == cs) 201c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng return true; 202c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng return false; 203c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng } 204c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng 205f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// superclasses_begin / superclasses_end - Loop over all of the classes 206f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// that are proper supersets of this register class. 207c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng sc_iterator superclasses_begin() const { 208c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng return SuperClasses; 209c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng } 21095923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 211c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng sc_iterator superclasses_end() const { 212c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng sc_iterator I = SuperClasses; 213c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng while (*I != NULL) ++I; 214c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng return I; 215c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng } 2168c08d8c77c45d4721e7d3ef746cca9e39b28e379Evan Cheng 217f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// isASubClass - return true if this TargetRegisterClass is a subset 218f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// class of at least one other TargetRegisterClass. 2198c08d8c77c45d4721e7d3ef746cca9e39b28e379Evan Cheng bool isASubClass() const { 2208c08d8c77c45d4721e7d3ef746cca9e39b28e379Evan Cheng return SuperClasses[0] != 0; 2218c08d8c77c45d4721e7d3ef746cca9e39b28e379Evan Cheng } 22295923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 223f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// allocation_order_begin/end - These methods define a range of registers 224f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// which specify the registers in this class that are valid to register 225f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// allocate, and the preferred order to allocate them in. For example, 226f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// callee saved registers should be at the end of the list, because it is 227f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// cheaper to allocate caller saved registers. 228f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 229f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// These methods take a MachineFunction argument, which can be used to tune 230cc38399ea9aceb459a8d7e4bbc6deba9125ea869Jim Grosbach /// the allocatable registers based on the characteristics of the function, 231cc38399ea9aceb459a8d7e4bbc6deba9125ea869Jim Grosbach /// subtarget, or other criteria. 232cc38399ea9aceb459a8d7e4bbc6deba9125ea869Jim Grosbach /// 233cc38399ea9aceb459a8d7e4bbc6deba9125ea869Jim Grosbach /// Register allocators should account for the fact that an allocation 234cc38399ea9aceb459a8d7e4bbc6deba9125ea869Jim Grosbach /// order iterator may return a reserved register and always check 235cc38399ea9aceb459a8d7e4bbc6deba9125ea869Jim Grosbach /// if the register is allocatable (getAllocatableSet()) before using it. 236f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 237f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// By default, these methods return all registers in the class. 238f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 2395ea64fd9eb0027ad20a66ea29211eef79d8842a0Chris Lattner virtual iterator allocation_order_begin(const MachineFunction &MF) const { 240f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner return begin(); 241f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner } 2425ea64fd9eb0027ad20a66ea29211eef79d8842a0Chris Lattner virtual iterator allocation_order_end(const MachineFunction &MF) const { 243f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner return end(); 244f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner } 24534695381d626485a560594f162701088079589dfMisha Brukman 246f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// getSize - Return the size of the register in bytes, which is also the size 247f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// of a stack slot allocated to hold a spilled copy of this register. 248f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner unsigned getSize() const { return RegSize; } 249f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 250f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// getAlignment - Return the minimum required alignment for a register of 251f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// this class. 252f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner unsigned getAlignment() const { return Alignment; } 253a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng 254a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng /// getCopyCost - Return the cost of copying a value between two registers in 255b3a021cdb3d26ddb2985e326ba0cb96761b86f69Evan Cheng /// this class. A negative number means the register class is very expensive 256b3a021cdb3d26ddb2985e326ba0cb96761b86f69Evan Cheng /// to copy e.g. status flag register classes. 257a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng int getCopyCost() const { return CopyCost; } 258282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman}; 259282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 260282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 2616f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// TargetRegisterInfo base class - We assume that the target defines a static 2626f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// array of TargetRegisterDesc objects that represent all of the machine 2636f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// registers that the target has. As such, we simply have to track a pointer 2646f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// to this array so that we can turn register number into a register 2656f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// descriptor. 2663d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner/// 2676f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohmanclass TargetRegisterInfo { 268f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Andersonprotected: 269605041e5a81fbb18769b0613dcd14e0cff32b5eeOwen Anderson const unsigned* SubregHash; 270605041e5a81fbb18769b0613dcd14e0cff32b5eeOwen Anderson const unsigned SubregHashSize; 2713ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson const unsigned* AliasesHash; 2723ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson const unsigned AliasesHashSize; 2738797caac84c3012416e933c9c05ad34d75bf4029Chris Lattnerpublic: 2748797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner typedef const TargetRegisterClass * const * regclass_iterator; 2758797caac84c3012416e933c9c05ad34d75bf4029Chris Lattnerprivate: 2760f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner const TargetRegisterDesc *Desc; // Pointer to the descriptor array 2771fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen const char *const *SubRegIndexNames; // Names of subreg indexes. 2788797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner unsigned NumRegs; // Number of entries in the array 2798797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 2808797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner regclass_iterator RegClassBegin, RegClassEnd; // List of regclasses 2818797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 282f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner int CallFrameSetupOpcode, CallFrameDestroyOpcode; 283b9c2fd964ee7dd7823ac71db8443055e4d0f1c15David Greene 2843d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattnerprotected: 2856f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR, 2866f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman regclass_iterator RegClassBegin, 2876f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman regclass_iterator RegClassEnd, 2881fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen const char *const *subregindexnames, 2896f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman int CallFrameSetupOpcode = -1, 290605041e5a81fbb18769b0613dcd14e0cff32b5eeOwen Anderson int CallFrameDestroyOpcode = -1, 291605041e5a81fbb18769b0613dcd14e0cff32b5eeOwen Anderson const unsigned* subregs = 0, 2927d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson const unsigned subregsize = 0, 2934d4eab219a96203f58452b39b4e94e234dfe4007Bill Wendling const unsigned* aliases = 0, 2944d4eab219a96203f58452b39b4e94e234dfe4007Bill Wendling const unsigned aliasessize = 0); 2956f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman virtual ~TargetRegisterInfo(); 2963d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattnerpublic: 2973d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 298b79cb79a46fd4d870897f5e2fd0c50beb96dc30aJakob Stoklund Olesen // Register numbers can represent physical registers, virtual registers, and 299b79cb79a46fd4d870897f5e2fd0c50beb96dc30aJakob Stoklund Olesen // sometimes stack slots. The unsigned values are divided into these ranges: 300b79cb79a46fd4d870897f5e2fd0c50beb96dc30aJakob Stoklund Olesen // 301b79cb79a46fd4d870897f5e2fd0c50beb96dc30aJakob Stoklund Olesen // 0 Not a register, can be used as a sentinel. 302b79cb79a46fd4d870897f5e2fd0c50beb96dc30aJakob Stoklund Olesen // [1;2^30) Physical registers assigned by TableGen. 303b79cb79a46fd4d870897f5e2fd0c50beb96dc30aJakob Stoklund Olesen // [2^30;2^31) Stack slots. (Rarely used.) 304b79cb79a46fd4d870897f5e2fd0c50beb96dc30aJakob Stoklund Olesen // [2^31;2^32) Virtual registers assigned by MachineRegisterInfo. 305b79cb79a46fd4d870897f5e2fd0c50beb96dc30aJakob Stoklund Olesen // 306b79cb79a46fd4d870897f5e2fd0c50beb96dc30aJakob Stoklund Olesen // Further sentinels can be allocated from the small negative integers. 307b79cb79a46fd4d870897f5e2fd0c50beb96dc30aJakob Stoklund Olesen // DenseMapInfo<unsigned> uses -1u and -2u. 3083d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 309be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen /// isStackSlot - Sometimes it is useful the be able to store a non-negative 310be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen /// frame index in a variable that normally holds a register. isStackSlot() 311be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen /// returns true if Reg is in the range used for stack slots. 312be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen /// 313da1f1f495066f95957fd1c19ad44d4453e47aff4Jakob Stoklund Olesen /// Note that isVirtualRegister() and isPhysicalRegister() cannot handle stack 314da1f1f495066f95957fd1c19ad44d4453e47aff4Jakob Stoklund Olesen /// slots, so if a variable may contains a stack slot, always check 315da1f1f495066f95957fd1c19ad44d4453e47aff4Jakob Stoklund Olesen /// isStackSlot() first. 316be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen /// 317be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen static bool isStackSlot(unsigned Reg) { 318da1f1f495066f95957fd1c19ad44d4453e47aff4Jakob Stoklund Olesen return int(Reg) >= (1 << 30); 319be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen } 320be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen 321be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen /// stackSlot2Index - Compute the frame index from a register value 322be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen /// representing a stack slot. 323be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen static int stackSlot2Index(unsigned Reg) { 324be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen assert(isStackSlot(Reg) && "Not a stack slot"); 325da1f1f495066f95957fd1c19ad44d4453e47aff4Jakob Stoklund Olesen return int(Reg - (1u << 30)); 326be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen } 327be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen 328be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen /// index2StackSlot - Convert a non-negative frame index to a stack slot 329be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen /// register value. 330be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen static unsigned index2StackSlot(int FI) { 331be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen assert(FI >= 0 && "Cannot hold a negative frame index."); 332da1f1f495066f95957fd1c19ad44d4453e47aff4Jakob Stoklund Olesen return FI + (1u << 30); 333be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen } 334be97e906e03dd9b22e14f6749157c9d5f9701dd5Jakob Stoklund Olesen 335bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner /// isPhysicalRegister - Return true if the specified register number is in 336bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner /// the physical register namespace. 337bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner static bool isPhysicalRegister(unsigned Reg) { 338da1f1f495066f95957fd1c19ad44d4453e47aff4Jakob Stoklund Olesen assert(!isStackSlot(Reg) && "Not a register! Check isStackSlot() first."); 339da1f1f495066f95957fd1c19ad44d4453e47aff4Jakob Stoklund Olesen return int(Reg) > 0; 340bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner } 341bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner 342bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner /// isVirtualRegister - Return true if the specified register number is in 343bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner /// the virtual register namespace. 344bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner static bool isVirtualRegister(unsigned Reg) { 345da1f1f495066f95957fd1c19ad44d4453e47aff4Jakob Stoklund Olesen assert(!isStackSlot(Reg) && "Not a register! Check isStackSlot() first."); 346da1f1f495066f95957fd1c19ad44d4453e47aff4Jakob Stoklund Olesen return int(Reg) < 0; 347bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner } 348bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner 349c7d67f90d36375f1ff512a3857c887b7e4246adbJakob Stoklund Olesen /// virtReg2Index - Convert a virtual register number to a 0-based index. 350c7d67f90d36375f1ff512a3857c887b7e4246adbJakob Stoklund Olesen /// The first virtual register in a function will get the index 0. 351c7d67f90d36375f1ff512a3857c887b7e4246adbJakob Stoklund Olesen static unsigned virtReg2Index(unsigned Reg) { 352da1f1f495066f95957fd1c19ad44d4453e47aff4Jakob Stoklund Olesen assert(isVirtualRegister(Reg) && "Not a virtual register"); 353da1f1f495066f95957fd1c19ad44d4453e47aff4Jakob Stoklund Olesen return Reg - (1u << 31); 354c7d67f90d36375f1ff512a3857c887b7e4246adbJakob Stoklund Olesen } 355c7d67f90d36375f1ff512a3857c887b7e4246adbJakob Stoklund Olesen 356b421c566f512ed0ec87851866d335e9086c3f8beJakob Stoklund Olesen /// index2VirtReg - Convert a 0-based index to a virtual register number. 357b421c566f512ed0ec87851866d335e9086c3f8beJakob Stoklund Olesen /// This is the inverse operation of VirtReg2IndexFunctor below. 358b421c566f512ed0ec87851866d335e9086c3f8beJakob Stoklund Olesen static unsigned index2VirtReg(unsigned Index) { 359da1f1f495066f95957fd1c19ad44d4453e47aff4Jakob Stoklund Olesen return Index + (1u << 31); 360b421c566f512ed0ec87851866d335e9086c3f8beJakob Stoklund Olesen } 361b421c566f512ed0ec87851866d335e9086c3f8beJakob Stoklund Olesen 362ce48c1de828688b34cf5c2038fde23368a0a45f4Rafael Espindola /// getMinimalPhysRegClass - Returns the Register Class of a physical 363c2af869d629b338861e1c6f0b360a233c0c0f9c4Dan Gohman /// register of the given type, picking the most sub register class of 364c2af869d629b338861e1c6f0b360a233c0c0f9c4Dan Gohman /// the right type that contains this physreg. 365d31f972bd33de85071c716f69bf5c6d735f730f2Rafael Espindola const TargetRegisterClass * 366d31f972bd33de85071c716f69bf5c6d735f730f2Rafael Espindola getMinimalPhysRegClass(unsigned Reg, EVT VT = MVT::Other) const; 367ce48c1de828688b34cf5c2038fde23368a0a45f4Rafael Espindola 368bb4bdf4fe4c931e45d0a37e24ec79accd815c1d8Alkis Evlogimenos /// getAllocatableSet - Returns a bitset indexed by register number 369eff03db46d5d1df315cf2aa020ccd7f50ab3848eEvan Cheng /// indicating if a register is allocatable or not. If a register class is 370eff03db46d5d1df315cf2aa020ccd7f50ab3848eEvan Cheng /// specified, returns the subset for the class. 371769b7f89534caed11d7595b5c84aa47d3de30ad9Dan Gohman BitVector getAllocatableSet(const MachineFunction &MF, 372eff03db46d5d1df315cf2aa020ccd7f50ab3848eEvan Cheng const TargetRegisterClass *RC = NULL) const; 373bb4bdf4fe4c931e45d0a37e24ec79accd815c1d8Alkis Evlogimenos 3740f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner const TargetRegisterDesc &operator[](unsigned RegNo) const { 3753d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner assert(RegNo < NumRegs && 3763d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner "Attempting to access record for invalid register number!"); 3773d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner return Desc[RegNo]; 3783d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner } 3793d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 3803d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// Provide a get method, equivalent to [], but more useful if we have a 3813d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// pointer to this object. 3823d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// 3830f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner const TargetRegisterDesc &get(unsigned RegNo) const { 3840f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner return operator[](RegNo); 3850f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner } 3863d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 38700032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner /// getAliasSet - Return the set of registers aliased by the specified 38800032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner /// register, or a null list of there are none. The list returned is zero 38900032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner /// terminated. 39000032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner /// 39100032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner const unsigned *getAliasSet(unsigned RegNo) const { 392b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen // The Overlaps set always begins with Reg itself. 393b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen return get(RegNo).Overlaps + 1; 394b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen } 395b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen 396b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen /// getOverlaps - Return a list of registers that overlap Reg, including 397b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen /// itself. This is the same as the alias set except Reg is included in the 398b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen /// list. 399b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen /// These are exactly the registers in { x | regsOverlap(x, Reg) }. 400b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen /// 401b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen const unsigned *getOverlaps(unsigned RegNo) const { 402b83ff84193d44bb9aa75e1264ffaff55f468a303Jakob Stoklund Olesen return get(RegNo).Overlaps; 40300032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner } 404282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 4058102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// getSubRegisters - Return the list of registers that are sub-registers of 40650aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng /// the specified register, or a null list of there are none. The list 4078102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// returned is zero terminated and sorted according to super-sub register 4088102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// relations. e.g. X86::RAX's sub-register list is EAX, AX, AL, AH. 409e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng /// 410e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng const unsigned *getSubRegisters(unsigned RegNo) const { 411e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng return get(RegNo).SubRegs; 412e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng } 413e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng 4148102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// getSuperRegisters - Return the list of registers that are super-registers 41550aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng /// of the specified register, or a null list of there are none. The list 4168102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// returned is zero terminated and sorted according to super-sub register 4178102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// relations. e.g. X86::AL's super-register list is RAX, EAX, AX. 41850aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng /// 41950aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng const unsigned *getSuperRegisters(unsigned RegNo) const { 42050aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng return get(RegNo).SuperRegs; 42150aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng } 42250aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng 423e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling /// getName - Return the human-readable symbolic target-specific name for the 424e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling /// specified physical register. 425e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling const char *getName(unsigned RegNo) const { 426e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling return get(RegNo).Name; 427181eb737b28628adc4376b973610a02039385026Bill Wendling } 428181eb737b28628adc4376b973610a02039385026Bill Wendling 4291c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// getNumRegs - Return the number of registers this target has (useful for 4301c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// sizing arrays holding per register information) 43193aa52a8a96c036454be9318bb1c78c9bfb5f390Alkis Evlogimenos unsigned getNumRegs() const { 43293aa52a8a96c036454be9318bb1c78c9bfb5f390Alkis Evlogimenos return NumRegs; 43393aa52a8a96c036454be9318bb1c78c9bfb5f390Alkis Evlogimenos } 43493aa52a8a96c036454be9318bb1c78c9bfb5f390Alkis Evlogimenos 4351fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen /// getSubRegIndexName - Return the human-readable symbolic target-specific 4361fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen /// name for the specified SubRegIndex. 4371fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen const char *getSubRegIndexName(unsigned SubIdx) const { 4381fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen assert(SubIdx && "This is not a subregister index"); 4391fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen return SubRegIndexNames[SubIdx-1]; 4401fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen } 4411fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen 4423f2f3f5341374c85955cfaffa71886724999762dLang Hames /// regsOverlap - Returns true if the two registers are equal or alias each 4433f2f3f5341374c85955cfaffa71886724999762dLang Hames /// other. The registers may be virtual register. 4443f2f3f5341374c85955cfaffa71886724999762dLang Hames bool regsOverlap(unsigned regA, unsigned regB) const { 4453f2f3f5341374c85955cfaffa71886724999762dLang Hames if (regA == regB) 4463f2f3f5341374c85955cfaffa71886724999762dLang Hames return true; 4473f2f3f5341374c85955cfaffa71886724999762dLang Hames 4483f2f3f5341374c85955cfaffa71886724999762dLang Hames if (isVirtualRegister(regA) || isVirtualRegister(regB)) 4493f2f3f5341374c85955cfaffa71886724999762dLang Hames return false; 4503f2f3f5341374c85955cfaffa71886724999762dLang Hames 4513f2f3f5341374c85955cfaffa71886724999762dLang Hames // regA and regB are distinct physical registers. Do they alias? 4523ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson size_t index = (regA + regB * 37) & (AliasesHashSize-1); 4533ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson unsigned ProbeAmt = 0; 4543ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson while (AliasesHash[index*2] != 0 && 4554d4eab219a96203f58452b39b4e94e234dfe4007Bill Wendling AliasesHash[index*2+1] != 0) { 4563ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson if (AliasesHash[index*2] == regA && AliasesHash[index*2+1] == regB) 4574d4eab219a96203f58452b39b4e94e234dfe4007Bill Wendling return true; 4583ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson 4593ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson index = (index + ProbeAmt) & (AliasesHashSize-1); 4603ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson ProbeAmt += 2; 4613ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson } 4623ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson 46304319bb2bda50d2ae7cc284cb1c4e742b44a466bAlkis Evlogimenos return false; 46404319bb2bda50d2ae7cc284cb1c4e742b44a466bAlkis Evlogimenos } 46504319bb2bda50d2ae7cc284cb1c4e742b44a466bAlkis Evlogimenos 466b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng /// isSubRegister - Returns true if regB is a sub-register of regA. 467b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng /// 468b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng bool isSubRegister(unsigned regA, unsigned regB) const { 469f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson // SubregHash is a simple quadratically probed hash table. 47057ce0319b7eb4418aac910d9a094e57d983a64d2Owen Anderson size_t index = (regA + regB * 37) & (SubregHashSize-1); 471f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson unsigned ProbeAmt = 2; 472f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson while (SubregHash[index*2] != 0 && 473f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson SubregHash[index*2+1] != 0) { 474f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson if (SubregHash[index*2] == regA && SubregHash[index*2+1] == regB) 475f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson return true; 47695923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 47757ce0319b7eb4418aac910d9a094e57d983a64d2Owen Anderson index = (index + ProbeAmt) & (SubregHashSize-1); 478f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson ProbeAmt += 2; 479f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson } 48095923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 481f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson return false; 482b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng } 483b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng 484b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng /// isSuperRegister - Returns true if regB is a super-register of regA. 485b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng /// 486b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng bool isSuperRegister(unsigned regA, unsigned regB) const { 48776f0ad7bf5c05d6056b3bf335d0c3fb7e72de5d6Jakob Stoklund Olesen return isSubRegister(regB, regA); 488b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng } 489b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng 4900098b3e2b69e527ddcf2ebad7a3081898fa3b4f0Evan Cheng /// getCalleeSavedRegs - Return a null-terminated list of all of the 4910098b3e2b69e527ddcf2ebad7a3081898fa3b4f0Evan Cheng /// callee saved registers on this target. The register should be in the 49202569d7355b03155b32c1c0d0e46f6aa957f4802Evan Cheng /// order of desired callee-save stack frame offset. The first register is 49302569d7355b03155b32c1c0d0e46f6aa957f4802Evan Cheng /// closed to the incoming stack pointer if stack grows down, and vice versa. 4942365f51ed03afe6993bae962fdc2e5a956a64cd5Anton Korobeynikov virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF = 0) 4952365f51ed03afe6993bae962fdc2e5a956a64cd5Anton Korobeynikov const = 0; 4968797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 4978797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 498b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng /// getReservedRegs - Returns a bitset indexed by physical register number 4991c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// indicating if a register is a special register that has particular uses 5001c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// and should be considered unavailable at all times, e.g. SP, RA. This is 5011c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// used by register scavenger to determine what registers are free. 502b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0; 503b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng 5047bf1c272ab27297a7bbab329de3f17ddb26e02a3Nate Begeman /// getSubReg - Returns the physical register number of sub-register "Index" 505dd595c5998214c6ee07ed46f5db551b2abbfbbb3Evan Cheng /// for physical register RegNo. Return zero if the sub-register does not 506dd595c5998214c6ee07ed46f5db551b2abbfbbb3Evan Cheng /// exist. 5077bf1c272ab27297a7bbab329de3f17ddb26e02a3Nate Begeman virtual unsigned getSubReg(unsigned RegNo, unsigned Index) const = 0; 5087bf1c272ab27297a7bbab329de3f17ddb26e02a3Nate Begeman 509fae3e923452b85e72b2c03dd6eacc063f59d81b1Evan Cheng /// getSubRegIndex - For a given register pair, return the sub-register index 510754f680c1fcde09a3d36bb8562e1433fdb87018eBob Wilson /// if the second register is a sub-register of the first. Return zero 511fae3e923452b85e72b2c03dd6eacc063f59d81b1Evan Cheng /// otherwise. 512fae3e923452b85e72b2c03dd6eacc063f59d81b1Evan Cheng virtual unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const = 0; 513fae3e923452b85e72b2c03dd6eacc063f59d81b1Evan Cheng 5148a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng /// getMatchingSuperReg - Return a super-register of the specified register 5158a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng /// Reg so its sub-register of index SubIdx is Reg. 51695923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, 5178a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng const TargetRegisterClass *RC) const { 5188a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng for (const unsigned *SRs = getSuperRegisters(Reg); unsigned SR = *SRs;++SRs) 5198a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng if (Reg == getSubReg(SR, SubIdx) && RC->contains(SR)) 5208a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng return SR; 5218a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng return 0; 5228a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng } 5238a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng 52491a74da036d3a9442953ae1de3e797a50da4ccf0Bob Wilson /// canCombineSubRegIndices - Given a register class and a list of 52591a74da036d3a9442953ae1de3e797a50da4ccf0Bob Wilson /// subregister indices, return true if it's possible to combine the 52691a74da036d3a9442953ae1de3e797a50da4ccf0Bob Wilson /// subregister indices into one that corresponds to a larger 52791a74da036d3a9442953ae1de3e797a50da4ccf0Bob Wilson /// subregister. Return the new subregister index by reference. Note the 52891a74da036d3a9442953ae1de3e797a50da4ccf0Bob Wilson /// new index may be zero if the given subregisters can be combined to 52991a74da036d3a9442953ae1de3e797a50da4ccf0Bob Wilson /// form the whole register. 53091a74da036d3a9442953ae1de3e797a50da4ccf0Bob Wilson virtual bool canCombineSubRegIndices(const TargetRegisterClass *RC, 53191a74da036d3a9442953ae1de3e797a50da4ccf0Bob Wilson SmallVectorImpl<unsigned> &SubIndices, 53291a74da036d3a9442953ae1de3e797a50da4ccf0Bob Wilson unsigned &NewSubIdx) const { 533b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Cheng return 0; 534b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Cheng } 535b990a2f249196ad3e0cc451d40a45fc2f9278eafEvan Cheng 5365248468473f0488a652b545ad95f7abda302b7b5Evan Cheng /// getMatchingSuperRegClass - Return a subclass of the specified register 5375248468473f0488a652b545ad95f7abda302b7b5Evan Cheng /// class A so that each register in it has a sub-register of the 5385248468473f0488a652b545ad95f7abda302b7b5Evan Cheng /// specified sub-register index which is in the specified register class B. 5395248468473f0488a652b545ad95f7abda302b7b5Evan Cheng virtual const TargetRegisterClass * 5405248468473f0488a652b545ad95f7abda302b7b5Evan Cheng getMatchingSuperRegClass(const TargetRegisterClass *A, 5415248468473f0488a652b545ad95f7abda302b7b5Evan Cheng const TargetRegisterClass *B, unsigned Idx) const { 5425248468473f0488a652b545ad95f7abda302b7b5Evan Cheng return 0; 5435248468473f0488a652b545ad95f7abda302b7b5Evan Cheng } 5445248468473f0488a652b545ad95f7abda302b7b5Evan Cheng 5452da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// composeSubRegIndices - Return the subregister index you get from composing 5462da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// two subregister indices. 5472da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// 5482da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// If R:a:b is the same register as R:c, then composeSubRegIndices(a, b) 5492da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// returns c. Note that composeSubRegIndices does not tell you about illegal 5502da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// compositions. If R does not have a subreg a, or R:a does not have a subreg 5512da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// b, composeSubRegIndices doesn't tell you. 5522da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// 5532da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// The ARM register Q0 has two D subregs dsub_0:D0 and dsub_1:D1. It also has 5542da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// ssub_0:S0 - ssub_3:S3 subregs. 5552da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// If you compose subreg indices dsub_1, ssub_0 you get ssub_2. 5562da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen /// 5572da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen virtual unsigned composeSubRegIndices(unsigned a, unsigned b) const { 5582da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen // This default implementation is correct for most targets. 5592da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen return b; 5602da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen } 5612da53370241fdd1b5c291483311b34e609f06c73Jakob Stoklund Olesen 5628797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner //===--------------------------------------------------------------------===// 5638797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner // Register Class Information 5648797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner // 5658797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 5668797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner /// Register class iterators 56792988ecdb6ca641ba39d1d1f8cbc57a89b63bbadChris Lattner /// 5688797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner regclass_iterator regclass_begin() const { return RegClassBegin; } 5698797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner regclass_iterator regclass_end() const { return RegClassEnd; } 5708797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 5718797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner unsigned getNumRegClasses() const { 57234cd4a484e532cc463fd5a4bf59b88d13c5467c1Evan Cheng return (unsigned)(regclass_end()-regclass_begin()); 5738797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner } 57495923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 57560f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey /// getRegClass - Returns the register class associated with the enumeration 57660f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey /// value. See class TargetOperandInfo. 57760f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey const TargetRegisterClass *getRegClass(unsigned i) const { 578a606d955de3b0f777131d74162eb6f11b5f95d75Dan Gohman assert(i < getNumRegClasses() && "Register Class ID out of range"); 579a606d955de3b0f777131d74162eb6f11b5f95d75Dan Gohman return RegClassBegin[i]; 58060f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey } 5818797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 582770bcc7b15adbc978800db70dbb1c3c22913b52cEvan Cheng /// getPointerRegClass - Returns a TargetRegisterClass used for pointer 5832cfd52c507bd5790457a171eb9bcb39019cc6860Chris Lattner /// values. If a target supports multiple different pointer register classes, 5842cfd52c507bd5790457a171eb9bcb39019cc6860Chris Lattner /// kind specifies which one is indicated. 5852cfd52c507bd5790457a171eb9bcb39019cc6860Chris Lattner virtual const TargetRegisterClass *getPointerRegClass(unsigned Kind=0) const { 586770bcc7b15adbc978800db70dbb1c3c22913b52cEvan Cheng assert(0 && "Target didn't implement getPointerRegClass!"); 587770bcc7b15adbc978800db70dbb1c3c22913b52cEvan Cheng return 0; // Must return a value in order to compile with VS 2005 588770bcc7b15adbc978800db70dbb1c3c22913b52cEvan Cheng } 5898797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 590ff110265753c19daf0468ee1facf357460497b7eEvan Cheng /// getCrossCopyRegClass - Returns a legal register class to copy a register 591ff110265753c19daf0468ee1facf357460497b7eEvan Cheng /// in the specified class to or from. Returns NULL if it is possible to copy 592ff110265753c19daf0468ee1facf357460497b7eEvan Cheng /// between a two registers of the specified class. 593ff110265753c19daf0468ee1facf357460497b7eEvan Cheng virtual const TargetRegisterClass * 594ff110265753c19daf0468ee1facf357460497b7eEvan Cheng getCrossCopyRegClass(const TargetRegisterClass *RC) const { 595ff110265753c19daf0468ee1facf357460497b7eEvan Cheng return NULL; 596ff110265753c19daf0468ee1facf357460497b7eEvan Cheng } 597ff110265753c19daf0468ee1facf357460497b7eEvan Cheng 598358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng /// getAllocationOrder - Returns the register allocation order for a specified 599358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng /// register class in the form of a pair of TargetRegisterClass iterators. 600358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng virtual std::pair<TargetRegisterClass::iterator,TargetRegisterClass::iterator> 601358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng getAllocationOrder(const TargetRegisterClass *RC, 602f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng unsigned HintType, unsigned HintReg, 603358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng const MachineFunction &MF) const { 604358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng return std::make_pair(RC->allocation_order_begin(MF), 605358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng RC->allocation_order_end(MF)); 606358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng } 607358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng 608358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng /// ResolveRegAllocHint - Resolves the specified register allocation hint 609358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng /// to a physical register. Returns the physical register if it is successful. 610f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng virtual unsigned ResolveRegAllocHint(unsigned Type, unsigned Reg, 611f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng const MachineFunction &MF) const { 612358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng if (Type == 0 && Reg && isPhysicalRegister(Reg)) 613358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng return Reg; 614358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng return 0; 615358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng } 616358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng 617f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// UpdateRegAllocHint - A callback to allow target a chance to update 618f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// register allocation hints when a register is "changed" (e.g. coalesced) 619f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// to another register. e.g. On ARM, some virtual registers should target 620f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// register pairs, if one of pair is coalesced to another register, the 621f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// allocation hint of the other half of the pair should be changed to point 622f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// to the new register. 623f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng virtual void UpdateRegAllocHint(unsigned Reg, unsigned NewReg, 624f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng MachineFunction &MF) const { 625f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng // Do nothing. 626f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng } 627f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng 6281c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// requiresRegisterScavenging - returns true if the target requires (and can 6291c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// make use of) the register scavenger. 63036230cdda48edf6c634f2dcf69f9d78ac5a17377Evan Cheng virtual bool requiresRegisterScavenging(const MachineFunction &MF) const { 63137f15a6d488d256d371f6c39ab83837bc9c0772dEvan Cheng return false; 63237f15a6d488d256d371f6c39ab83837bc9c0772dEvan Cheng } 63395923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 63465c58daa8b8985d2116216043103009815a55e77Jim Grosbach /// requiresFrameIndexScavenging - returns true if the target requires post 63565c58daa8b8985d2116216043103009815a55e77Jim Grosbach /// PEI scavenging of registers for materializing frame index constants. 63665c58daa8b8985d2116216043103009815a55e77Jim Grosbach virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const { 63765c58daa8b8985d2116216043103009815a55e77Jim Grosbach return false; 63865c58daa8b8985d2116216043103009815a55e77Jim Grosbach } 63965c58daa8b8985d2116216043103009815a55e77Jim Grosbach 640a273442891ae20fd8192526132e3819ea9e5eda9Jim Grosbach /// requiresVirtualBaseRegisters - Returns true if the target wants the 641a273442891ae20fd8192526132e3819ea9e5eda9Jim Grosbach /// LocalStackAllocation pass to be run and virtual base registers 642a273442891ae20fd8192526132e3819ea9e5eda9Jim Grosbach /// used for more efficient stack access. 643a273442891ae20fd8192526132e3819ea9e5eda9Jim Grosbach virtual bool requiresVirtualBaseRegisters(const MachineFunction &MF) const { 644a273442891ae20fd8192526132e3819ea9e5eda9Jim Grosbach return false; 645a273442891ae20fd8192526132e3819ea9e5eda9Jim Grosbach } 646a273442891ae20fd8192526132e3819ea9e5eda9Jim Grosbach 647910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// hasReservedSpillSlot - Return true if target has reserved a spill slot in 648910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// the stack frame of the given function for the specified register. e.g. On 649910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// x86, if the frame register is required, the first fixed stack object is 650910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// reserved as its spill slot. This tells PEI not to create a new stack frame 651910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// object for the given register. It should be called only after 652910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// processFunctionBeforeCalleeSavedScan(). 65372852a8cfb605056d87b644d2e36b1346051413dEric Christopher virtual bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg, 654910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng int &FrameIdx) const { 655910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng return false; 656910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng } 657910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng 658910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// needsStackRealignment - true if storage within the function requires the 659910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// stack pointer to be aligned more than the normal calling convention calls 660910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// for. 661b5dae003252d8e650a32bfdf33cba5aed8e41e40Dale Johannesen virtual bool needsStackRealignment(const MachineFunction &MF) const { 662b5dae003252d8e650a32bfdf33cba5aed8e41e40Dale Johannesen return false; 663b5dae003252d8e650a32bfdf33cba5aed8e41e40Dale Johannesen } 664b5dae003252d8e650a32bfdf33cba5aed8e41e40Dale Johannesen 665e2f556933e1a19cddf6d4f370e2770c0f763b025Jim Grosbach /// getFrameIndexInstrOffset - Get the offset from the referenced frame 66663f8659d6936077c5e8e34eecb55ff1de0db5686Bob Wilson /// index in the instruction, if there is one. 6671ab3f16f06698596716593a30545799688acccd7Jim Grosbach virtual int64_t getFrameIndexInstrOffset(const MachineInstr *MI, 6681ab3f16f06698596716593a30545799688acccd7Jim Grosbach int Idx) const { 669e2f556933e1a19cddf6d4f370e2770c0f763b025Jim Grosbach return 0; 670e2f556933e1a19cddf6d4f370e2770c0f763b025Jim Grosbach } 671e2f556933e1a19cddf6d4f370e2770c0f763b025Jim Grosbach 6728708ead5a46f4ec8f2d5f832be23381924d72b8dJim Grosbach /// needsFrameBaseReg - Returns true if the instruction's frame index 6738708ead5a46f4ec8f2d5f832be23381924d72b8dJim Grosbach /// reference would be better served by a base register other than FP 6748708ead5a46f4ec8f2d5f832be23381924d72b8dJim Grosbach /// or SP. Used by LocalStackFrameAllocation to determine which frame index 6758708ead5a46f4ec8f2d5f832be23381924d72b8dJim Grosbach /// references it should create new base registers for. 6763197380143cdc18837722129ac888528b9fbfc2bJim Grosbach virtual bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const { 6778708ead5a46f4ec8f2d5f832be23381924d72b8dJim Grosbach return false; 6788708ead5a46f4ec8f2d5f832be23381924d72b8dJim Grosbach } 6798708ead5a46f4ec8f2d5f832be23381924d72b8dJim Grosbach 680dc140c6e7b8350ca51aa1d408c10e25a27826e2cJim Grosbach /// materializeFrameBaseRegister - Insert defining instruction(s) for 681dc140c6e7b8350ca51aa1d408c10e25a27826e2cJim Grosbach /// BaseReg to be a pointer to FrameIdx before insertion point I. 682976ef86689ed065361a748f81c44ca3510af2202Bill Wendling virtual void materializeFrameBaseRegister(MachineBasicBlock *MBB, 683e2f556933e1a19cddf6d4f370e2770c0f763b025Jim Grosbach unsigned BaseReg, int FrameIdx, 684e2f556933e1a19cddf6d4f370e2770c0f763b025Jim Grosbach int64_t Offset) const { 685dc140c6e7b8350ca51aa1d408c10e25a27826e2cJim Grosbach assert(0 && "materializeFrameBaseRegister does not exist on this target"); 686dc140c6e7b8350ca51aa1d408c10e25a27826e2cJim Grosbach } 687dc140c6e7b8350ca51aa1d408c10e25a27826e2cJim Grosbach 688dc140c6e7b8350ca51aa1d408c10e25a27826e2cJim Grosbach /// resolveFrameIndex - Resolve a frame index operand of an instruction 689dc140c6e7b8350ca51aa1d408c10e25a27826e2cJim Grosbach /// to reference the indicated base register plus offset instead. 690dc140c6e7b8350ca51aa1d408c10e25a27826e2cJim Grosbach virtual void resolveFrameIndex(MachineBasicBlock::iterator I, 691dc140c6e7b8350ca51aa1d408c10e25a27826e2cJim Grosbach unsigned BaseReg, int64_t Offset) const { 692dc140c6e7b8350ca51aa1d408c10e25a27826e2cJim Grosbach assert(0 && "resolveFrameIndex does not exist on this target"); 693dc140c6e7b8350ca51aa1d408c10e25a27826e2cJim Grosbach } 694dc140c6e7b8350ca51aa1d408c10e25a27826e2cJim Grosbach 695e2f556933e1a19cddf6d4f370e2770c0f763b025Jim Grosbach /// isFrameOffsetLegal - Determine whether a given offset immediate is 696e2f556933e1a19cddf6d4f370e2770c0f763b025Jim Grosbach /// encodable to resolve a frame index. 697e2f556933e1a19cddf6d4f370e2770c0f763b025Jim Grosbach virtual bool isFrameOffsetLegal(const MachineInstr *MI, 698e2f556933e1a19cddf6d4f370e2770c0f763b025Jim Grosbach int64_t Offset) const { 699e2f556933e1a19cddf6d4f370e2770c0f763b025Jim Grosbach assert(0 && "isFrameOffsetLegal does not exist on this target"); 70074d803a58c7935c067397bb19afc05ec464d8159Jim Grosbach return false; // Must return a value in order to compile with VS 2005 70174d803a58c7935c067397bb19afc05ec464d8159Jim Grosbach } 702dc140c6e7b8350ca51aa1d408c10e25a27826e2cJim Grosbach 703f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// getCallFrameSetup/DestroyOpcode - These methods return the opcode of the 704f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// frame setup/destroy instructions if they exist (-1 otherwise). Some 705f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// targets use pseudo instructions in order to abstract away the difference 706f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// between operating with a frame pointer and operating without, through the 707f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// use of these two instructions. 708f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 709f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner int getCallFrameSetupOpcode() const { return CallFrameSetupOpcode; } 710f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner int getCallFrameDestroyOpcode() const { return CallFrameDestroyOpcode; } 711f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 712f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// eliminateCallFramePseudoInstr - This method is called during prolog/epilog 713f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// code insertion to eliminate call frame setup and destroy pseudo 714f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// instructions (but only if the Target is using them). It is responsible 715f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// for eliminating these instructions, replacing them with concrete 716f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// instructions. This method need only be implemented if using call frame 7178a1478b6d7aeaed8363316d2e0b90d9f53525c29Chris Lattner /// setup/destroy pseudo instructions. 718f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 71934695381d626485a560594f162701088079589dfMisha Brukman virtual void 7208604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner eliminateCallFramePseudoInstr(MachineFunction &MF, 7218604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner MachineBasicBlock &MBB, 7228604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner MachineBasicBlock::iterator MI) const { 723f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner assert(getCallFrameSetupOpcode()== -1 && getCallFrameDestroyOpcode()== -1 && 72400876a2808f1a8061f7e0852c7949fc5074ecb04Misha Brukman "eliminateCallFramePseudoInstr must be implemented if using" 72500876a2808f1a8061f7e0852c7949fc5074ecb04Misha Brukman " call frame setup/destroy pseudo instructions!"); 726f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner assert(0 && "Call Frame Pseudo Instructions do not exist on this target!"); 727f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner } 728f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 729f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 730d482f55af135081aee7f7ab972bb8973f189c88fJim Grosbach /// saveScavengerRegister - Spill the register so it can be used by the 731d482f55af135081aee7f7ab972bb8973f189c88fJim Grosbach /// register scavenger. Return true if the register was spilled, false 732d482f55af135081aee7f7ab972bb8973f189c88fJim Grosbach /// otherwise. If this function does not spill the register, the scavenger 733540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach /// will instead spill it to the emergency spill slot. 734540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach /// 735540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach virtual bool saveScavengerRegister(MachineBasicBlock &MBB, 736540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach MachineBasicBlock::iterator I, 737d482f55af135081aee7f7ab972bb8973f189c88fJim Grosbach MachineBasicBlock::iterator &UseMI, 738540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach const TargetRegisterClass *RC, 7391f8f4d2db734d9881467a5706acac73660842d43Evan Cheng unsigned Reg) const { 7401f8f4d2db734d9881467a5706acac73660842d43Evan Cheng return false; 7411f8f4d2db734d9881467a5706acac73660842d43Evan Cheng } 742540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach 743f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// eliminateFrameIndex - This method must be overriden to eliminate abstract 744f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// frame indices from instructions which may use them. The instruction 745f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// referenced by the iterator contains an MO_FrameIndex operand which must be 746f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// eliminated by this method. This method may modify or replace the 747c49a10aca1e31351c2e11b25ba636a23b93c46c8Dale Johannesen /// specified instruction, as long as it keeps the iterator pointing at the 74818b111bffe643b5ad52ae10a1d5728b0c1ac92f0Evan Cheng /// finished product. SPAdj is the SP adjustment due to call frame setup 7491ad70c09c890c3abcc147503f2e23082f683790cMatthijs Kooijman /// instruction. 750fcb4a8ead3cd8d9540d5eaa448af5d14a0ee341aJim Grosbach virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI, 751fcb4a8ead3cd8d9540d5eaa448af5d14a0ee341aJim Grosbach int SPAdj, RegScavenger *RS=NULL) const = 0; 752f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 753a99791886d5d4af2b900cd8cc1c9ed1677b6f0f4Jim Laskey //===--------------------------------------------------------------------===// 754a99791886d5d4af2b900cd8cc1c9ed1677b6f0f4Jim Laskey /// Debug information queries. 75595923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 7564188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// getDwarfRegNum - Map a target register to an equivalent dwarf register 757b97aec663b1591e71c9ddee6dbb327d1b827eda5Dale Johannesen /// number. Returns -1 if there is no equivalent value. The second 758b97aec663b1591e71c9ddee6dbb327d1b827eda5Dale Johannesen /// parameter allows targets to use different numberings for EH info and 7592bbeccdee1937f6cef9f8762595246f447162a4fMatthijs Kooijman /// debugging info. 760b97aec663b1591e71c9ddee6dbb327d1b827eda5Dale Johannesen virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const = 0; 761a99791886d5d4af2b900cd8cc1c9ed1677b6f0f4Jim Laskey 762a99791886d5d4af2b900cd8cc1c9ed1677b6f0f4Jim Laskey /// getFrameRegister - This method should return the register used as a base 7634188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// for values allocated in the current stack frame. 764b9c2fd964ee7dd7823ac71db8443055e4d0f1c15David Greene virtual unsigned getFrameRegister(const MachineFunction &MF) const = 0; 76572bebb9205c1628601b052d25555aabe6e15e6f4Evan Cheng 7664188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// getRARegister - This method should return the register where the return 7674188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// address can be found. 7684188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey virtual unsigned getRARegister() const = 0; 7693d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner}; 7703d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 771c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng 77294c002a190cd2e3a52b1510bc997e53d63af0b3bChris Lattner// This is useful when building IndexedMaps keyed on virtual registers 77359bf4fcc0680e75b408579064d1205a132361196Duncan Sandsstruct VirtReg2IndexFunctor : public std::unary_function<unsigned, unsigned> { 7744d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos unsigned operator()(unsigned Reg) const { 775c7d67f90d36375f1ff512a3857c887b7e4246adbJakob Stoklund Olesen return TargetRegisterInfo::virtReg2Index(Reg); 7764d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos } 7774d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos}; 7784d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos 779c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng/// getCommonSubClass - find the largest common subclass of A and B. Return NULL 780c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng/// if there is no common subclass. 781c781a243a3d17e7e763515794168d8fa6043f565Evan Chengconst TargetRegisterClass *getCommonSubClass(const TargetRegisterClass *A, 782c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng const TargetRegisterClass *B); 783c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng 7844314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen/// PrintReg - Helper class for printing registers on a raw_ostream. 7854314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen/// Prints virtual and physical registers with or without a TRI instance. 7864314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen/// 7874314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen/// The format is: 78843a566519b85ddffa482695d6a5a3dc4a02e267fJakob Stoklund Olesen/// %noreg - NoRegister 78943a566519b85ddffa482695d6a5a3dc4a02e267fJakob Stoklund Olesen/// %vreg5 - a virtual register. 79043a566519b85ddffa482695d6a5a3dc4a02e267fJakob Stoklund Olesen/// %vreg5:sub_8bit - a virtual register with sub-register index (with TRI). 79143a566519b85ddffa482695d6a5a3dc4a02e267fJakob Stoklund Olesen/// %EAX - a physical register 79243a566519b85ddffa482695d6a5a3dc4a02e267fJakob Stoklund Olesen/// %physreg17 - a physical register when no TRI instance given. 7934314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen/// 7944314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen/// Usage: OS << PrintReg(Reg, TRI) << '\n'; 7954314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen/// 7964314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesenclass PrintReg { 7974314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen const TargetRegisterInfo *TRI; 7984314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen unsigned Reg; 7994314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen unsigned SubIdx; 8004314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesenpublic: 8014314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen PrintReg(unsigned reg, const TargetRegisterInfo *tri = 0, unsigned subidx = 0) 8024314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen : TRI(tri), Reg(reg), SubIdx(subidx) {} 8034314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen void print(raw_ostream&) const; 8044314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen}; 8054314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen 8064314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesenstatic inline raw_ostream &operator<<(raw_ostream &OS, const PrintReg &PR) { 8074314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen PR.print(OS); 8084314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen return OS; 8094314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen} 8104314268128be6d54c9a7f0709680e5a5b40f3ab3Jakob Stoklund Olesen 811d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke} // End llvm namespace 812d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 8133d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner#endif 814