TargetRegisterInfo.h revision f451cb870efcf9e0302d25ed05f4cac6bb494e42
16f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman//=== Target/TargetRegisterInfo.h - Target Register Information -*- C++ -*-===// 234695381d626485a560594f162701088079589dfMisha Brukman// 36fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// The LLVM Compiler Infrastructure 46fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 57ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// This file is distributed under the University of Illinois Open Source 67ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// License. See LICENSE.TXT for details. 734695381d626485a560594f162701088079589dfMisha Brukman// 86fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell//===----------------------------------------------------------------------===// 93d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// 103d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// This file describes an abstract interface used to get information about a 113d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// target machines register file. This information is used for a variety of 123d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// purposed, especially register allocation. 133d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner// 143d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner//===----------------------------------------------------------------------===// 153d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 166f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman#ifndef LLVM_TARGET_TARGETREGISTERINFO_H 176f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman#define LLVM_TARGET_TARGETREGISTERINFO_H 183d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 19024126ee23e6e4430a77025b61d0e713180f03d3Alkis Evlogimenos#include "llvm/CodeGen/MachineBasicBlock.h" 20a385bf7b6dc9b71024aa4c7bb7026bab3c7ebe91Chris Lattner#include "llvm/CodeGen/ValueTypes.h" 21ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson#include "llvm/ADT/DenseSet.h" 224d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos#include <cassert> 234d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos#include <functional> 243d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 25d0fde30ce850b78371fd1386338350591f9ff494Brian Gaekenamespace llvm { 26d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 27171eed533408a23de0b141af17475fd6b4da72e0Evan Chengclass BitVector; 28198ab640bbb0b8e1cdda518b7f8b348764e4402cChris Lattnerclass MachineFunction; 294188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskeyclass MachineMove; 30171eed533408a23de0b141af17475fd6b4da72e0Evan Chengclass RegScavenger; 31282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 320f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner/// TargetRegisterDesc - This record contains all of the information known about 330f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner/// a particular register. The AliasSet field (if not null) contains a pointer 340f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner/// to a Zero terminated array of registers that this register aliases. This is 3500032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner/// needed for architectures like X86 which have AL alias AX alias EAX. 3600032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner/// Registers that this does not apply to simply should set this to null. 37a92d62c15fa2bf84453489716323b0159912c55dEvan Cheng/// The SubRegs field is a zero terminated array of registers that are 38a92d62c15fa2bf84453489716323b0159912c55dEvan Cheng/// sub-registers of the specific register, e.g. AL, AH are sub-registers of AX. 392036835346ddf983d66b49505bd52db1d3f8b49dEvan Cheng/// The SuperRegs field is a zero terminated array of registers that are 402036835346ddf983d66b49505bd52db1d3f8b49dEvan Cheng/// super-registers of the specific register, e.g. RAX, EAX, are super-registers 412036835346ddf983d66b49505bd52db1d3f8b49dEvan Cheng/// of AX. 423d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner/// 430f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattnerstruct TargetRegisterDesc { 44e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling const char *Name; // Printable name for the reg (for debugging) 45303603f75876c1cb407002f0a3a110fe4c202b31Chris Lattner const unsigned *AliasSet; // Register Alias Set, described above 46a92d62c15fa2bf84453489716323b0159912c55dEvan Cheng const unsigned *SubRegs; // Sub-register set, described above 4750aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng const unsigned *SuperRegs; // Super-register set, described above 483d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner}; 493d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 50282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukmanclass TargetRegisterClass { 51282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukmanpublic: 520f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner typedef const unsigned* iterator; 530f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner typedef const unsigned* const_iterator; 54282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 55e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson typedef const EVT* vt_iterator; 563b0c0148ed9ec752b240dbea767ad4a9f0a682caEvan Cheng typedef const TargetRegisterClass* const * sc_iterator; 570f24e33b73542bd7b280550aec6cff32d808e724Chris Lattnerprivate: 5860f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey unsigned ID; 5941c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner const char *Name; 6016d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner const vt_iterator VTs; 61696736be8b80fe3946f73605b46359345afdf57aEvan Cheng const sc_iterator SubClasses; 62c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng const sc_iterator SuperClasses; 63f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman const sc_iterator SubRegClasses; 64f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman const sc_iterator SuperRegClasses; 65f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner const unsigned RegSize, Alignment; // Size & Alignment of register in bytes 66a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng const int CopyCost; 670f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner const iterator RegsBegin, RegsEnd; 68ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson DenseSet<unsigned> RegSet; 690f24e33b73542bd7b280550aec6cff32d808e724Chris Lattnerpublic: 7060f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey TargetRegisterClass(unsigned id, 7141c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner const char *name, 72e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson const EVT *vts, 733b0c0148ed9ec752b240dbea767ad4a9f0a682caEvan Cheng const TargetRegisterClass * const *subcs, 743b0c0148ed9ec752b240dbea767ad4a9f0a682caEvan Cheng const TargetRegisterClass * const *supcs, 75f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman const TargetRegisterClass * const *subregcs, 76f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman const TargetRegisterClass * const *superregcs, 77a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng unsigned RS, unsigned Al, int CC, 78a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng iterator RB, iterator RE) 7941c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner : ID(id), Name(name), VTs(vts), SubClasses(subcs), SuperClasses(supcs), 80f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman SubRegClasses(subregcs), SuperRegClasses(superregcs), 81ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson RegSize(RS), Alignment(Al), CopyCost(CC), RegsBegin(RB), RegsEnd(RE) { 82ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson for (iterator I = RegsBegin, E = RegsEnd; I != E; ++I) 83ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson RegSet.insert(*I); 84ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson } 850f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner virtual ~TargetRegisterClass() {} // Allow subclasses 8695923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 876c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// getID() - Return the register class ID number. 886c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// 8960f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey unsigned getID() const { return ID; } 9041c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner 9141c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner /// getName() - Return the register class name for debugging. 9241c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner /// 9341c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner const char *getName() const { return Name; } 9441c90738e9e7e2111fbc31944b5ce2676830f267Chris Lattner 956c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// begin/end - Return all of the registers in this class. 966c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// 970f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner iterator begin() const { return RegsBegin; } 980f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner iterator end() const { return RegsEnd; } 99282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 1006c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// getNumRegs - Return the number of registers in this class. 1016c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// 10234cd4a484e532cc463fd5a4bf59b88d13c5467c1Evan Cheng unsigned getNumRegs() const { return (unsigned)(RegsEnd-RegsBegin); } 103f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 1046c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// getRegister - Return the specified register in the class. 1056c8d90d65fa721d406c7a09a0045fa49254a9244Chris Lattner /// 1060f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner unsigned getRegister(unsigned i) const { 1070f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner assert(i < getNumRegs() && "Register number out of range!"); 1080f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner return RegsBegin[i]; 1090f24e33b73542bd7b280550aec6cff32d808e724Chris Lattner } 110282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 111f02b37da6f956dc9120a0da6ffa643b2753beb41Chris Lattner /// contains - Return true if the specified register is included in this 112f02b37da6f956dc9120a0da6ffa643b2753beb41Chris Lattner /// register class. 113f02b37da6f956dc9120a0da6ffa643b2753beb41Chris Lattner bool contains(unsigned Reg) const { 114ddeed50d76e2ad52d3ccb3664d21dfe1463179c6Owen Anderson return RegSet.count(Reg); 115f02b37da6f956dc9120a0da6ffa643b2753beb41Chris Lattner } 116f02b37da6f956dc9120a0da6ffa643b2753beb41Chris Lattner 1176510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman /// hasType - return true if this TargetRegisterClass has the ValueType vt. 1186510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman /// 119e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson bool hasType(EVT vt) const { 120825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson for(int i = 0; VTs[i].getSimpleVT().SimpleTy != MVT::Other; ++i) 1216510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman if (VTs[i] == vt) 1226510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman return true; 1236510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman return false; 1246510b22cec7de4f0acc9965ec24c3668a6a8a87eNate Begeman } 12595923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 126696736be8b80fe3946f73605b46359345afdf57aEvan Cheng /// vt_begin / vt_end - Loop over all of the value types that can be 127696736be8b80fe3946f73605b46359345afdf57aEvan Cheng /// represented by values in this register class. 12816d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner vt_iterator vt_begin() const { 12916d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner return VTs; 13016d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner } 13116d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner 13216d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner vt_iterator vt_end() const { 13316d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner vt_iterator I = VTs; 134825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson while (I->getSimpleVT().SimpleTy != MVT::Other) ++I; 13516d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner return I; 13616d597a20d405d8cb13f89f15b8c1fed20428808Chris Lattner } 137696736be8b80fe3946f73605b46359345afdf57aEvan Cheng 138f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// subregclasses_begin / subregclasses_end - Loop over all of 139f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// the subreg register classes of this register class. 140f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator subregclasses_begin() const { 141f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return SubRegClasses; 142f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 143f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 144f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator subregclasses_end() const { 145f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator I = SubRegClasses; 146f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman while (*I != NULL) ++I; 147f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return I; 148f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 149f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 150fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen /// getSubRegisterRegClass - Return the register class of subregisters with 151fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen /// index SubIdx, or NULL if no such class exists. 152fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen const TargetRegisterClass* getSubRegisterRegClass(unsigned SubIdx) const { 153fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen assert(SubIdx>0 && "Invalid subregister index"); 154fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen for (unsigned s = 0; s != SubIdx-1; ++s) 155fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen if (!SubRegClasses[s]) 156fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen return NULL; 157fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen return SubRegClasses[SubIdx-1]; 158fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen } 159fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen 160f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// superregclasses_begin / superregclasses_end - Loop over all of 161f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// the superreg register classes of this register class. 162f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator superregclasses_begin() const { 163f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return SuperRegClasses; 164f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 165f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 166f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator superregclasses_end() const { 167f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman sc_iterator I = SuperRegClasses; 168f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman while (*I != NULL) ++I; 169f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return I; 170f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 171f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 172f451cb870efcf9e0302d25ed05f4cac6bb494e42Dan Gohman /// hasSubClass - return true if the specified TargetRegisterClass 173f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// is a proper subset of this TargetRegisterClass. 1741367fd09cb021bae61e7dd2ee208f76574c8e789Christopher Lamb bool hasSubClass(const TargetRegisterClass *cs) const { 17595923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach for (int i = 0; SubClasses[i] != NULL; ++i) 176696736be8b80fe3946f73605b46359345afdf57aEvan Cheng if (SubClasses[i] == cs) 177696736be8b80fe3946f73605b46359345afdf57aEvan Cheng return true; 178696736be8b80fe3946f73605b46359345afdf57aEvan Cheng return false; 179696736be8b80fe3946f73605b46359345afdf57aEvan Cheng } 180696736be8b80fe3946f73605b46359345afdf57aEvan Cheng 181f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// subclasses_begin / subclasses_end - Loop over all of the classes 182f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// that are proper subsets of this register class. 183696736be8b80fe3946f73605b46359345afdf57aEvan Cheng sc_iterator subclasses_begin() const { 184696736be8b80fe3946f73605b46359345afdf57aEvan Cheng return SubClasses; 185696736be8b80fe3946f73605b46359345afdf57aEvan Cheng } 18695923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 187696736be8b80fe3946f73605b46359345afdf57aEvan Cheng sc_iterator subclasses_end() const { 188696736be8b80fe3946f73605b46359345afdf57aEvan Cheng sc_iterator I = SubClasses; 189696736be8b80fe3946f73605b46359345afdf57aEvan Cheng while (*I != NULL) ++I; 190696736be8b80fe3946f73605b46359345afdf57aEvan Cheng return I; 191696736be8b80fe3946f73605b46359345afdf57aEvan Cheng } 19295923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 1931367fd09cb021bae61e7dd2ee208f76574c8e789Christopher Lamb /// hasSuperClass - return true if the specified TargetRegisterClass is a 194f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// proper superset of this TargetRegisterClass. 1951367fd09cb021bae61e7dd2ee208f76574c8e789Christopher Lamb bool hasSuperClass(const TargetRegisterClass *cs) const { 19695923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach for (int i = 0; SuperClasses[i] != NULL; ++i) 197c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng if (SuperClasses[i] == cs) 198c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng return true; 199c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng return false; 200c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng } 201c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng 202f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// superclasses_begin / superclasses_end - Loop over all of the classes 203f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// that are proper supersets of this register class. 204c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng sc_iterator superclasses_begin() const { 205c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng return SuperClasses; 206c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng } 20795923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 208c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng sc_iterator superclasses_end() const { 209c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng sc_iterator I = SuperClasses; 210c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng while (*I != NULL) ++I; 211c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng return I; 212c3580cace271b0f7d35a25eb285a1cc0d644c30cEvan Cheng } 2138c08d8c77c45d4721e7d3ef746cca9e39b28e379Evan Cheng 214f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// isASubClass - return true if this TargetRegisterClass is a subset 215f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman /// class of at least one other TargetRegisterClass. 2168c08d8c77c45d4721e7d3ef746cca9e39b28e379Evan Cheng bool isASubClass() const { 2178c08d8c77c45d4721e7d3ef746cca9e39b28e379Evan Cheng return SuperClasses[0] != 0; 2188c08d8c77c45d4721e7d3ef746cca9e39b28e379Evan Cheng } 21995923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 220f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// allocation_order_begin/end - These methods define a range of registers 221f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// which specify the registers in this class that are valid to register 222f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// allocate, and the preferred order to allocate them in. For example, 223f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// callee saved registers should be at the end of the list, because it is 224f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// cheaper to allocate caller saved registers. 225f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 226f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// These methods take a MachineFunction argument, which can be used to tune 227f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// the allocatable registers based on the characteristics of the function. 228f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// One simple example is that the frame pointer register can be used if 229f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// frame-pointer-elimination is performed. 230f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 231f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// By default, these methods return all registers in the class. 232f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 2335ea64fd9eb0027ad20a66ea29211eef79d8842a0Chris Lattner virtual iterator allocation_order_begin(const MachineFunction &MF) const { 234f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner return begin(); 235f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner } 2365ea64fd9eb0027ad20a66ea29211eef79d8842a0Chris Lattner virtual iterator allocation_order_end(const MachineFunction &MF) const { 237f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner return end(); 238f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner } 23934695381d626485a560594f162701088079589dfMisha Brukman 240f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// getSize - Return the size of the register in bytes, which is also the size 241f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// of a stack slot allocated to hold a spilled copy of this register. 242f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner unsigned getSize() const { return RegSize; } 243f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 244f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// getAlignment - Return the minimum required alignment for a register of 245f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// this class. 246f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner unsigned getAlignment() const { return Alignment; } 247a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng 248a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng /// getCopyCost - Return the cost of copying a value between two registers in 249b3a021cdb3d26ddb2985e326ba0cb96761b86f69Evan Cheng /// this class. A negative number means the register class is very expensive 250b3a021cdb3d26ddb2985e326ba0cb96761b86f69Evan Cheng /// to copy e.g. status flag register classes. 251a3ca3149f2b59c512c50aab330b5a0d8efddeffaEvan Cheng int getCopyCost() const { return CopyCost; } 252282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman}; 253282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 254282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 2556f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// TargetRegisterInfo base class - We assume that the target defines a static 2566f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// array of TargetRegisterDesc objects that represent all of the machine 2576f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// registers that the target has. As such, we simply have to track a pointer 2586f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// to this array so that we can turn register number into a register 2596f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman/// descriptor. 2603d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner/// 2616f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohmanclass TargetRegisterInfo { 262f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Andersonprotected: 263605041e5a81fbb18769b0613dcd14e0cff32b5eeOwen Anderson const unsigned* SubregHash; 264605041e5a81fbb18769b0613dcd14e0cff32b5eeOwen Anderson const unsigned SubregHashSize; 2657d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson const unsigned* SuperregHash; 2667d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson const unsigned SuperregHashSize; 2673ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson const unsigned* AliasesHash; 2683ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson const unsigned AliasesHashSize; 2698797caac84c3012416e933c9c05ad34d75bf4029Chris Lattnerpublic: 2708797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner typedef const TargetRegisterClass * const * regclass_iterator; 2718797caac84c3012416e933c9c05ad34d75bf4029Chris Lattnerprivate: 2720f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner const TargetRegisterDesc *Desc; // Pointer to the descriptor array 2738797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner unsigned NumRegs; // Number of entries in the array 2748797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 2758797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner regclass_iterator RegClassBegin, RegClassEnd; // List of regclasses 2768797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 277f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner int CallFrameSetupOpcode, CallFrameDestroyOpcode; 278b9c2fd964ee7dd7823ac71db8443055e4d0f1c15David Greene 2793d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattnerprotected: 2806f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR, 2816f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman regclass_iterator RegClassBegin, 2826f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman regclass_iterator RegClassEnd, 2836f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman int CallFrameSetupOpcode = -1, 284605041e5a81fbb18769b0613dcd14e0cff32b5eeOwen Anderson int CallFrameDestroyOpcode = -1, 285605041e5a81fbb18769b0613dcd14e0cff32b5eeOwen Anderson const unsigned* subregs = 0, 2867d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson const unsigned subregsize = 0, 2874d4eab219a96203f58452b39b4e94e234dfe4007Bill Wendling const unsigned* superregs = 0, 2884d4eab219a96203f58452b39b4e94e234dfe4007Bill Wendling const unsigned superregsize = 0, 2894d4eab219a96203f58452b39b4e94e234dfe4007Bill Wendling const unsigned* aliases = 0, 2904d4eab219a96203f58452b39b4e94e234dfe4007Bill Wendling const unsigned aliasessize = 0); 2916f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman virtual ~TargetRegisterInfo(); 2923d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattnerpublic: 2933d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 294ef6a6a69ff1e1b709d0acb315b9f6c926c67a778Misha Brukman enum { // Define some target independent constants 2951eaf0ac1dc470fb846c16c966d1ffff8213b33efChris Lattner /// NoRegister - This physical register is not a real target register. It 2961eaf0ac1dc470fb846c16c966d1ffff8213b33efChris Lattner /// is useful as a sentinal. 2973d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner NoRegister = 0, 2983d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 2993d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// FirstVirtualRegister - This is the first register number that is 3003d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// considered to be a 'virtual' register, which is part of the SSA 3013d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// namespace. This must be the same for all targets, which means that each 302fb28579c568fcafaa4fb2a573b510deb6a6074e9Dan Gohman /// target is limited to this fixed number of registers. 303e8b0915b21026cd2314c1802bd2ccd4c91f4a83dEvan Cheng FirstVirtualRegister = 1024 3043d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner }; 3053d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 306bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner /// isPhysicalRegister - Return true if the specified register number is in 307bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner /// the physical register namespace. 308bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner static bool isPhysicalRegister(unsigned Reg) { 30971e353ed3530a5da48c3dd3257c410f6c4ce2e3eAlkis Evlogimenos assert(Reg && "this is not a register!"); 310bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner return Reg < FirstVirtualRegister; 311bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner } 312bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner 313bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner /// isVirtualRegister - Return true if the specified register number is in 314bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner /// the virtual register namespace. 315bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner static bool isVirtualRegister(unsigned Reg) { 31671e353ed3530a5da48c3dd3257c410f6c4ce2e3eAlkis Evlogimenos assert(Reg && "this is not a register!"); 317bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner return Reg >= FirstVirtualRegister; 318bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner } 319bd490d919bd36d2ab956031b524a55dd8519eb64Chris Lattner 320ff110265753c19daf0468ee1facf357460497b7eEvan Cheng /// getPhysicalRegisterRegClass - Returns the Register Class of a physical 321e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson /// register of the given type. If type is EVT::Other, then just return any 322676dd7c80b6f91178452535ac45ca58feb23cc42Evan Cheng /// register class the register belongs to. 32330eae3c02244e18747f9f0dca6946d86d0ccb7f5Jim Grosbach virtual const TargetRegisterClass * 324825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson getPhysicalRegisterRegClass(unsigned Reg, EVT VT = MVT::Other) const; 325ff110265753c19daf0468ee1facf357460497b7eEvan Cheng 326bb4bdf4fe4c931e45d0a37e24ec79accd815c1d8Alkis Evlogimenos /// getAllocatableSet - Returns a bitset indexed by register number 327eff03db46d5d1df315cf2aa020ccd7f50ab3848eEvan Cheng /// indicating if a register is allocatable or not. If a register class is 328eff03db46d5d1df315cf2aa020ccd7f50ab3848eEvan Cheng /// specified, returns the subset for the class. 329769b7f89534caed11d7595b5c84aa47d3de30ad9Dan Gohman BitVector getAllocatableSet(const MachineFunction &MF, 330eff03db46d5d1df315cf2aa020ccd7f50ab3848eEvan Cheng const TargetRegisterClass *RC = NULL) const; 331bb4bdf4fe4c931e45d0a37e24ec79accd815c1d8Alkis Evlogimenos 3320f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner const TargetRegisterDesc &operator[](unsigned RegNo) const { 3333d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner assert(RegNo < NumRegs && 3343d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner "Attempting to access record for invalid register number!"); 3353d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner return Desc[RegNo]; 3363d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner } 3373d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 3383d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// Provide a get method, equivalent to [], but more useful if we have a 3393d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// pointer to this object. 3403d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner /// 3410f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner const TargetRegisterDesc &get(unsigned RegNo) const { 3420f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner return operator[](RegNo); 3430f21fd5204a2627c613340269e2e39e2c8cca659Chris Lattner } 3443d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 34500032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner /// getAliasSet - Return the set of registers aliased by the specified 34600032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner /// register, or a null list of there are none. The list returned is zero 34700032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner /// terminated. 34800032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner /// 34900032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner const unsigned *getAliasSet(unsigned RegNo) const { 35000032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner return get(RegNo).AliasSet; 35100032bf6cc236b1fb534f74b1ac288f611a86804Chris Lattner } 352282ec57c4cdd4574103922487b6f1563b5034fb4Misha Brukman 3538102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// getSubRegisters - Return the list of registers that are sub-registers of 35450aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng /// the specified register, or a null list of there are none. The list 3558102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// returned is zero terminated and sorted according to super-sub register 3568102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// relations. e.g. X86::RAX's sub-register list is EAX, AX, AL, AH. 357e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng /// 358e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng const unsigned *getSubRegisters(unsigned RegNo) const { 359e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng return get(RegNo).SubRegs; 360e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng } 361e3e31c22bf7ebed9e8e00ede4f4aa87ce2225528Evan Cheng 3628102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// getSuperRegisters - Return the list of registers that are super-registers 36350aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng /// of the specified register, or a null list of there are none. The list 3648102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// returned is zero terminated and sorted according to super-sub register 3658102703d708e5d399926c6ba71ffa49bbd31fc8aEvan Cheng /// relations. e.g. X86::AL's super-register list is RAX, EAX, AX. 36650aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng /// 36750aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng const unsigned *getSuperRegisters(unsigned RegNo) const { 36850aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng return get(RegNo).SuperRegs; 36950aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng } 37050aadb96932a0f81ed69f73da6e7c8f8a453ee75Evan Cheng 371e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling /// getName - Return the human-readable symbolic target-specific name for the 372e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling /// specified physical register. 373e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling const char *getName(unsigned RegNo) const { 374e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling return get(RegNo).Name; 375181eb737b28628adc4376b973610a02039385026Bill Wendling } 376181eb737b28628adc4376b973610a02039385026Bill Wendling 3771c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// getNumRegs - Return the number of registers this target has (useful for 3781c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// sizing arrays holding per register information) 37993aa52a8a96c036454be9318bb1c78c9bfb5f390Alkis Evlogimenos unsigned getNumRegs() const { 38093aa52a8a96c036454be9318bb1c78c9bfb5f390Alkis Evlogimenos return NumRegs; 38193aa52a8a96c036454be9318bb1c78c9bfb5f390Alkis Evlogimenos } 38293aa52a8a96c036454be9318bb1c78c9bfb5f390Alkis Evlogimenos 3833f2f3f5341374c85955cfaffa71886724999762dLang Hames /// regsOverlap - Returns true if the two registers are equal or alias each 3843f2f3f5341374c85955cfaffa71886724999762dLang Hames /// other. The registers may be virtual register. 3853f2f3f5341374c85955cfaffa71886724999762dLang Hames bool regsOverlap(unsigned regA, unsigned regB) const { 3863f2f3f5341374c85955cfaffa71886724999762dLang Hames if (regA == regB) 3873f2f3f5341374c85955cfaffa71886724999762dLang Hames return true; 3883f2f3f5341374c85955cfaffa71886724999762dLang Hames 3893f2f3f5341374c85955cfaffa71886724999762dLang Hames if (isVirtualRegister(regA) || isVirtualRegister(regB)) 3903f2f3f5341374c85955cfaffa71886724999762dLang Hames return false; 3913f2f3f5341374c85955cfaffa71886724999762dLang Hames 3923f2f3f5341374c85955cfaffa71886724999762dLang Hames // regA and regB are distinct physical registers. Do they alias? 3933ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson size_t index = (regA + regB * 37) & (AliasesHashSize-1); 3943ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson unsigned ProbeAmt = 0; 3953ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson while (AliasesHash[index*2] != 0 && 3964d4eab219a96203f58452b39b4e94e234dfe4007Bill Wendling AliasesHash[index*2+1] != 0) { 3973ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson if (AliasesHash[index*2] == regA && AliasesHash[index*2+1] == regB) 3984d4eab219a96203f58452b39b4e94e234dfe4007Bill Wendling return true; 3993ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson 4003ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson index = (index + ProbeAmt) & (AliasesHashSize-1); 4013ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson ProbeAmt += 2; 4023ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson } 4033ca15c989ca0e09085648771db368d8c94ee1f19Owen Anderson 40404319bb2bda50d2ae7cc284cb1c4e742b44a466bAlkis Evlogimenos return false; 40504319bb2bda50d2ae7cc284cb1c4e742b44a466bAlkis Evlogimenos } 40604319bb2bda50d2ae7cc284cb1c4e742b44a466bAlkis Evlogimenos 407b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng /// isSubRegister - Returns true if regB is a sub-register of regA. 408b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng /// 409b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng bool isSubRegister(unsigned regA, unsigned regB) const { 410f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson // SubregHash is a simple quadratically probed hash table. 41157ce0319b7eb4418aac910d9a094e57d983a64d2Owen Anderson size_t index = (regA + regB * 37) & (SubregHashSize-1); 412f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson unsigned ProbeAmt = 2; 413f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson while (SubregHash[index*2] != 0 && 414f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson SubregHash[index*2+1] != 0) { 415f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson if (SubregHash[index*2] == regA && SubregHash[index*2+1] == regB) 416f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson return true; 41795923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 41857ce0319b7eb4418aac910d9a094e57d983a64d2Owen Anderson index = (index + ProbeAmt) & (SubregHashSize-1); 419f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson ProbeAmt += 2; 420f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson } 42195923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 422f4f9c4f1cf4d497c63e40e6c7ef545c8c716a5ceOwen Anderson return false; 423b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng } 424b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng 425b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng /// isSuperRegister - Returns true if regB is a super-register of regA. 426b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng /// 427b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng bool isSuperRegister(unsigned regA, unsigned regB) const { 4287d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson // SuperregHash is a simple quadratically probed hash table. 4297d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson size_t index = (regA + regB * 37) & (SuperregHashSize-1); 4307d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson unsigned ProbeAmt = 2; 4317d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson while (SuperregHash[index*2] != 0 && 4327d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson SuperregHash[index*2+1] != 0) { 4337d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson if (SuperregHash[index*2] == regA && SuperregHash[index*2+1] == regB) 4347d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson return true; 43595923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 4367d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson index = (index + ProbeAmt) & (SuperregHashSize-1); 4377d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson ProbeAmt += 2; 4387d770be047059d624f37c6fb1e5b1d0f2b4961b3Owen Anderson } 43995923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 440b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng return false; 441b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng } 442b2f2e64c0790db11aea7eb52e2d056527204ee9aEvan Cheng 4430098b3e2b69e527ddcf2ebad7a3081898fa3b4f0Evan Cheng /// getCalleeSavedRegs - Return a null-terminated list of all of the 4440098b3e2b69e527ddcf2ebad7a3081898fa3b4f0Evan Cheng /// callee saved registers on this target. The register should be in the 44502569d7355b03155b32c1c0d0e46f6aa957f4802Evan Cheng /// order of desired callee-save stack frame offset. The first register is 44602569d7355b03155b32c1c0d0e46f6aa957f4802Evan Cheng /// closed to the incoming stack pointer if stack grows down, and vice versa. 4472365f51ed03afe6993bae962fdc2e5a956a64cd5Anton Korobeynikov virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF = 0) 4482365f51ed03afe6993bae962fdc2e5a956a64cd5Anton Korobeynikov const = 0; 4498797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 4500098b3e2b69e527ddcf2ebad7a3081898fa3b4f0Evan Cheng /// getCalleeSavedRegClasses - Return a null-terminated list of the preferred 4510098b3e2b69e527ddcf2ebad7a3081898fa3b4f0Evan Cheng /// register classes to spill each callee saved register with. The order and 4522f9dbe8ee6ebe8ec2d72d66dcbd6018918eab018Chris Lattner /// length of this list match the getCalleeSaveRegs() list. 4532365f51ed03afe6993bae962fdc2e5a956a64cd5Anton Korobeynikov virtual const TargetRegisterClass* const *getCalleeSavedRegClasses( 4542365f51ed03afe6993bae962fdc2e5a956a64cd5Anton Korobeynikov const MachineFunction *MF) const =0; 4558797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 456b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng /// getReservedRegs - Returns a bitset indexed by physical register number 4571c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// indicating if a register is a special register that has particular uses 4581c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// and should be considered unavailable at all times, e.g. SP, RA. This is 4591c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// used by register scavenger to determine what registers are free. 460b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0; 461b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng 4627bf1c272ab27297a7bbab329de3f17ddb26e02a3Nate Begeman /// getSubReg - Returns the physical register number of sub-register "Index" 463dd595c5998214c6ee07ed46f5db551b2abbfbbb3Evan Cheng /// for physical register RegNo. Return zero if the sub-register does not 464dd595c5998214c6ee07ed46f5db551b2abbfbbb3Evan Cheng /// exist. 4657bf1c272ab27297a7bbab329de3f17ddb26e02a3Nate Begeman virtual unsigned getSubReg(unsigned RegNo, unsigned Index) const = 0; 4667bf1c272ab27297a7bbab329de3f17ddb26e02a3Nate Begeman 467fae3e923452b85e72b2c03dd6eacc063f59d81b1Evan Cheng /// getSubRegIndex - For a given register pair, return the sub-register index 46800621efb40edb7fe16bf2af6d4699c9d024a28e7David Goodwin /// if the are second register is a sub-register of the first. Return zero 469fae3e923452b85e72b2c03dd6eacc063f59d81b1Evan Cheng /// otherwise. 470fae3e923452b85e72b2c03dd6eacc063f59d81b1Evan Cheng virtual unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const = 0; 471fae3e923452b85e72b2c03dd6eacc063f59d81b1Evan Cheng 4728a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng /// getMatchingSuperReg - Return a super-register of the specified register 4738a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng /// Reg so its sub-register of index SubIdx is Reg. 47495923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, 4758a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng const TargetRegisterClass *RC) const { 4768a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng for (const unsigned *SRs = getSuperRegisters(Reg); unsigned SR = *SRs;++SRs) 4778a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng if (Reg == getSubReg(SR, SubIdx) && RC->contains(SR)) 4788a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng return SR; 4798a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng return 0; 4808a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng } 4818a8a0dfc3b200e193db14ea1e6f1a18bf4187866Evan Cheng 4825248468473f0488a652b545ad95f7abda302b7b5Evan Cheng /// getMatchingSuperRegClass - Return a subclass of the specified register 4835248468473f0488a652b545ad95f7abda302b7b5Evan Cheng /// class A so that each register in it has a sub-register of the 4845248468473f0488a652b545ad95f7abda302b7b5Evan Cheng /// specified sub-register index which is in the specified register class B. 4855248468473f0488a652b545ad95f7abda302b7b5Evan Cheng virtual const TargetRegisterClass * 4865248468473f0488a652b545ad95f7abda302b7b5Evan Cheng getMatchingSuperRegClass(const TargetRegisterClass *A, 4875248468473f0488a652b545ad95f7abda302b7b5Evan Cheng const TargetRegisterClass *B, unsigned Idx) const { 4885248468473f0488a652b545ad95f7abda302b7b5Evan Cheng return 0; 4895248468473f0488a652b545ad95f7abda302b7b5Evan Cheng } 4905248468473f0488a652b545ad95f7abda302b7b5Evan Cheng 4918797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner //===--------------------------------------------------------------------===// 4928797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner // Register Class Information 4938797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner // 4948797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 4958797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner /// Register class iterators 49692988ecdb6ca641ba39d1d1f8cbc57a89b63bbadChris Lattner /// 4978797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner regclass_iterator regclass_begin() const { return RegClassBegin; } 4988797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner regclass_iterator regclass_end() const { return RegClassEnd; } 4998797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 5008797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner unsigned getNumRegClasses() const { 50134cd4a484e532cc463fd5a4bf59b88d13c5467c1Evan Cheng return (unsigned)(regclass_end()-regclass_begin()); 5028797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner } 50395923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 50460f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey /// getRegClass - Returns the register class associated with the enumeration 50560f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey /// value. See class TargetOperandInfo. 50660f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey const TargetRegisterClass *getRegClass(unsigned i) const { 50760f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey assert(i <= getNumRegClasses() && "Register Class ID out of range"); 50860f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey return i ? RegClassBegin[i - 1] : NULL; 50960f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey } 5108797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 511770bcc7b15adbc978800db70dbb1c3c22913b52cEvan Cheng /// getPointerRegClass - Returns a TargetRegisterClass used for pointer 5122cfd52c507bd5790457a171eb9bcb39019cc6860Chris Lattner /// values. If a target supports multiple different pointer register classes, 5132cfd52c507bd5790457a171eb9bcb39019cc6860Chris Lattner /// kind specifies which one is indicated. 5142cfd52c507bd5790457a171eb9bcb39019cc6860Chris Lattner virtual const TargetRegisterClass *getPointerRegClass(unsigned Kind=0) const { 515770bcc7b15adbc978800db70dbb1c3c22913b52cEvan Cheng assert(0 && "Target didn't implement getPointerRegClass!"); 516770bcc7b15adbc978800db70dbb1c3c22913b52cEvan Cheng return 0; // Must return a value in order to compile with VS 2005 517770bcc7b15adbc978800db70dbb1c3c22913b52cEvan Cheng } 5188797caac84c3012416e933c9c05ad34d75bf4029Chris Lattner 519ff110265753c19daf0468ee1facf357460497b7eEvan Cheng /// getCrossCopyRegClass - Returns a legal register class to copy a register 520ff110265753c19daf0468ee1facf357460497b7eEvan Cheng /// in the specified class to or from. Returns NULL if it is possible to copy 521ff110265753c19daf0468ee1facf357460497b7eEvan Cheng /// between a two registers of the specified class. 522ff110265753c19daf0468ee1facf357460497b7eEvan Cheng virtual const TargetRegisterClass * 523ff110265753c19daf0468ee1facf357460497b7eEvan Cheng getCrossCopyRegClass(const TargetRegisterClass *RC) const { 524ff110265753c19daf0468ee1facf357460497b7eEvan Cheng return NULL; 525ff110265753c19daf0468ee1facf357460497b7eEvan Cheng } 526ff110265753c19daf0468ee1facf357460497b7eEvan Cheng 527358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng /// getAllocationOrder - Returns the register allocation order for a specified 528358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng /// register class in the form of a pair of TargetRegisterClass iterators. 529358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng virtual std::pair<TargetRegisterClass::iterator,TargetRegisterClass::iterator> 530358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng getAllocationOrder(const TargetRegisterClass *RC, 531f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng unsigned HintType, unsigned HintReg, 532358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng const MachineFunction &MF) const { 533358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng return std::make_pair(RC->allocation_order_begin(MF), 534358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng RC->allocation_order_end(MF)); 535358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng } 536358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng 537358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng /// ResolveRegAllocHint - Resolves the specified register allocation hint 538358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng /// to a physical register. Returns the physical register if it is successful. 539f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng virtual unsigned ResolveRegAllocHint(unsigned Type, unsigned Reg, 540f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng const MachineFunction &MF) const { 541358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng if (Type == 0 && Reg && isPhysicalRegister(Reg)) 542358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng return Reg; 543358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng return 0; 544358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng } 545358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng 546f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// UpdateRegAllocHint - A callback to allow target a chance to update 547f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// register allocation hints when a register is "changed" (e.g. coalesced) 548f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// to another register. e.g. On ARM, some virtual registers should target 549f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// register pairs, if one of pair is coalesced to another register, the 550f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// allocation hint of the other half of the pair should be changed to point 551f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng /// to the new register. 552f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng virtual void UpdateRegAllocHint(unsigned Reg, unsigned NewReg, 553f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng MachineFunction &MF) const { 554f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng // Do nothing. 555f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng } 556f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4Evan Cheng 5571c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// targetHandlesStackFrameRounding - Returns true if the target is 5581c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// responsible for rounding up the stack frame (probably at emitPrologue 5591c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// time). 56002a20291410a6814c657b69901a57103d4861a07Evan Cheng virtual bool targetHandlesStackFrameRounding() const { 56102a20291410a6814c657b69901a57103d4861a07Evan Cheng return false; 56202a20291410a6814c657b69901a57103d4861a07Evan Cheng } 56302a20291410a6814c657b69901a57103d4861a07Evan Cheng 5641c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// requiresRegisterScavenging - returns true if the target requires (and can 5651c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// make use of) the register scavenger. 56636230cdda48edf6c634f2dcf69f9d78ac5a17377Evan Cheng virtual bool requiresRegisterScavenging(const MachineFunction &MF) const { 56737f15a6d488d256d371f6c39ab83837bc9c0772dEvan Cheng return false; 56837f15a6d488d256d371f6c39ab83837bc9c0772dEvan Cheng } 56995923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 57065c58daa8b8985d2116216043103009815a55e77Jim Grosbach /// requiresFrameIndexScavenging - returns true if the target requires post 57165c58daa8b8985d2116216043103009815a55e77Jim Grosbach /// PEI scavenging of registers for materializing frame index constants. 57265c58daa8b8985d2116216043103009815a55e77Jim Grosbach virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const { 57365c58daa8b8985d2116216043103009815a55e77Jim Grosbach return false; 57465c58daa8b8985d2116216043103009815a55e77Jim Grosbach } 57565c58daa8b8985d2116216043103009815a55e77Jim Grosbach 5761c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// hasFP - Return true if the specified function should have a dedicated 5771c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// frame pointer register. For most targets this is true only if the function 5781c08eba3fb44d59176ca1e3bfefce42e7f47d5ecBill Wendling /// has variable sized allocas or if frame pointer elimination is disabled. 579dc77540d9506dc151d79b94bae88bd841880ef37Evan Cheng virtual bool hasFP(const MachineFunction &MF) const = 0; 580dc77540d9506dc151d79b94bae88bd841880ef37Evan Cheng 581910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// hasReservedCallFrame - Under normal circumstances, when a frame pointer is 582910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// not required, we reserve argument space for call sites in the function 583910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// immediately on entry to the current function. This eliminates the need for 584910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// add/sub sp brackets around call sites. Returns true if the call frame is 585910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// included as part of the stack frame. 58614f1dd120fc13200697560680999c0efe7ecd714Evan Cheng virtual bool hasReservedCallFrame(MachineFunction &MF) const { 58714f1dd120fc13200697560680999c0efe7ecd714Evan Cheng return !hasFP(MF); 58814f1dd120fc13200697560680999c0efe7ecd714Evan Cheng } 58914f1dd120fc13200697560680999c0efe7ecd714Evan Cheng 590910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// hasReservedSpillSlot - Return true if target has reserved a spill slot in 591910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// the stack frame of the given function for the specified register. e.g. On 592910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// x86, if the frame register is required, the first fixed stack object is 593910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// reserved as its spill slot. This tells PEI not to create a new stack frame 594910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// object for the given register. It should be called only after 595910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// processFunctionBeforeCalleeSavedScan(). 596910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng virtual bool hasReservedSpillSlot(MachineFunction &MF, unsigned Reg, 597910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng int &FrameIdx) const { 598910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng return false; 599910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng } 600910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng 601910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// needsStackRealignment - true if storage within the function requires the 602910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// stack pointer to be aligned more than the normal calling convention calls 603910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng /// for. 604b5dae003252d8e650a32bfdf33cba5aed8e41e40Dale Johannesen virtual bool needsStackRealignment(const MachineFunction &MF) const { 605b5dae003252d8e650a32bfdf33cba5aed8e41e40Dale Johannesen return false; 606b5dae003252d8e650a32bfdf33cba5aed8e41e40Dale Johannesen } 607b5dae003252d8e650a32bfdf33cba5aed8e41e40Dale Johannesen 608f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// getCallFrameSetup/DestroyOpcode - These methods return the opcode of the 609f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// frame setup/destroy instructions if they exist (-1 otherwise). Some 610f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// targets use pseudo instructions in order to abstract away the difference 611f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// between operating with a frame pointer and operating without, through the 612f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// use of these two instructions. 613f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 614f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner int getCallFrameSetupOpcode() const { return CallFrameSetupOpcode; } 615f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner int getCallFrameDestroyOpcode() const { return CallFrameDestroyOpcode; } 616f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 617f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// eliminateCallFramePseudoInstr - This method is called during prolog/epilog 618f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// code insertion to eliminate call frame setup and destroy pseudo 619f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// instructions (but only if the Target is using them). It is responsible 620f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// for eliminating these instructions, replacing them with concrete 621f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// instructions. This method need only be implemented if using call frame 6228a1478b6d7aeaed8363316d2e0b90d9f53525c29Chris Lattner /// setup/destroy pseudo instructions. 623f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 62434695381d626485a560594f162701088079589dfMisha Brukman virtual void 6258604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner eliminateCallFramePseudoInstr(MachineFunction &MF, 6268604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner MachineBasicBlock &MBB, 6278604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner MachineBasicBlock::iterator MI) const { 628f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner assert(getCallFrameSetupOpcode()== -1 && getCallFrameDestroyOpcode()== -1 && 62900876a2808f1a8061f7e0852c7949fc5074ecb04Misha Brukman "eliminateCallFramePseudoInstr must be implemented if using" 63000876a2808f1a8061f7e0852c7949fc5074ecb04Misha Brukman " call frame setup/destroy pseudo instructions!"); 631f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner assert(0 && "Call Frame Pseudo Instructions do not exist on this target!"); 632f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner } 633f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 6340098b3e2b69e527ddcf2ebad7a3081898fa3b4f0Evan Cheng /// processFunctionBeforeCalleeSavedScan - This method is called immediately 63502569d7355b03155b32c1c0d0e46f6aa957f4802Evan Cheng /// before PrologEpilogInserter scans the physical registers used to determine 6360098b3e2b69e527ddcf2ebad7a3081898fa3b4f0Evan Cheng /// what callee saved registers should be spilled. This method is optional. 63728b3c45109153bc50d3d9e97dccb25ffd043fa50Evan Cheng virtual void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, 63828b3c45109153bc50d3d9e97dccb25ffd043fa50Evan Cheng RegScavenger *RS = NULL) const { 63928b3c45109153bc50d3d9e97dccb25ffd043fa50Evan Cheng 64002569d7355b03155b32c1c0d0e46f6aa957f4802Evan Cheng } 64102569d7355b03155b32c1c0d0e46f6aa957f4802Evan Cheng 642f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// processFunctionBeforeFrameFinalized - This method is called immediately 643f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// before the specified functions frame layout (MF.getFrameInfo()) is 644f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// finalized. Once the frame is finalized, MO_FrameIndex operands are 64502569d7355b03155b32c1c0d0e46f6aa957f4802Evan Cheng /// replaced with direct constants. This method is optional. 646f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// 6478604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF) const { 648e668dab5b339df01920b8bff890a70455b7dd27aAlkis Evlogimenos } 649f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 650d482f55af135081aee7f7ab972bb8973f189c88fJim Grosbach /// saveScavengerRegister - Spill the register so it can be used by the 651d482f55af135081aee7f7ab972bb8973f189c88fJim Grosbach /// register scavenger. Return true if the register was spilled, false 652d482f55af135081aee7f7ab972bb8973f189c88fJim Grosbach /// otherwise. If this function does not spill the register, the scavenger 653540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach /// will instead spill it to the emergency spill slot. 654540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach /// 655540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach virtual bool saveScavengerRegister(MachineBasicBlock &MBB, 656540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach MachineBasicBlock::iterator I, 657d482f55af135081aee7f7ab972bb8973f189c88fJim Grosbach MachineBasicBlock::iterator &UseMI, 658540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach const TargetRegisterClass *RC, 6591f8f4d2db734d9881467a5706acac73660842d43Evan Cheng unsigned Reg) const { 6601f8f4d2db734d9881467a5706acac73660842d43Evan Cheng return false; 6611f8f4d2db734d9881467a5706acac73660842d43Evan Cheng } 662540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach 663f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// eliminateFrameIndex - This method must be overriden to eliminate abstract 664f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// frame indices from instructions which may use them. The instruction 665f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// referenced by the iterator contains an MO_FrameIndex operand which must be 666f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// eliminated by this method. This method may modify or replace the 667c49a10aca1e31351c2e11b25ba636a23b93c46c8Dale Johannesen /// specified instruction, as long as it keeps the iterator pointing at the 66818b111bffe643b5ad52ae10a1d5728b0c1ac92f0Evan Cheng /// finished product. SPAdj is the SP adjustment due to call frame setup 6691ad70c09c890c3abcc147503f2e23082f683790cMatthijs Kooijman /// instruction. 670b58f498f7502e7e1833decbbbb4df771367c7341Jim Grosbach /// 671b58f498f7502e7e1833decbbbb4df771367c7341Jim Grosbach /// When -enable-frame-index-scavenging is enabled, the virtual register 672b58f498f7502e7e1833decbbbb4df771367c7341Jim Grosbach /// allocated for this frame index is returned and its value is stored in 673b58f498f7502e7e1833decbbbb4df771367c7341Jim Grosbach /// *Value. 674b58f498f7502e7e1833decbbbb4df771367c7341Jim Grosbach virtual unsigned eliminateFrameIndex(MachineBasicBlock::iterator MI, 675b58f498f7502e7e1833decbbbb4df771367c7341Jim Grosbach int SPAdj, int *Value = NULL, 676b58f498f7502e7e1833decbbbb4df771367c7341Jim Grosbach RegScavenger *RS=NULL) const = 0; 677f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner 678f9b332b59d1c008268551572557dca6ab6028a4dChris Lattner /// emitProlog/emitEpilog - These methods insert prolog and epilog code into 679854255361ed5a8f009d64c4869ed2a85cf0d8faeMatthijs Kooijman /// the function. 6808604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner virtual void emitPrologue(MachineFunction &MF) const = 0; 6818604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner virtual void emitEpilogue(MachineFunction &MF, 6828604e7572132e8728a1e20d53965bc4ab6986818Chris Lattner MachineBasicBlock &MBB) const = 0; 68395923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 684a99791886d5d4af2b900cd8cc1c9ed1677b6f0f4Jim Laskey //===--------------------------------------------------------------------===// 685a99791886d5d4af2b900cd8cc1c9ed1677b6f0f4Jim Laskey /// Debug information queries. 68695923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 6874188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// getDwarfRegNum - Map a target register to an equivalent dwarf register 688b97aec663b1591e71c9ddee6dbb327d1b827eda5Dale Johannesen /// number. Returns -1 if there is no equivalent value. The second 689b97aec663b1591e71c9ddee6dbb327d1b827eda5Dale Johannesen /// parameter allows targets to use different numberings for EH info and 6902bbeccdee1937f6cef9f8762595246f447162a4fMatthijs Kooijman /// debugging info. 691b97aec663b1591e71c9ddee6dbb327d1b827eda5Dale Johannesen virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const = 0; 692a99791886d5d4af2b900cd8cc1c9ed1677b6f0f4Jim Laskey 693a99791886d5d4af2b900cd8cc1c9ed1677b6f0f4Jim Laskey /// getFrameRegister - This method should return the register used as a base 6944188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// for values allocated in the current stack frame. 695b9c2fd964ee7dd7823ac71db8443055e4d0f1c15David Greene virtual unsigned getFrameRegister(const MachineFunction &MF) const = 0; 69672bebb9205c1628601b052d25555aabe6e15e6f4Evan Cheng 69772bebb9205c1628601b052d25555aabe6e15e6f4Evan Cheng /// getFrameIndexOffset - Returns the displacement from the frame register to 69872bebb9205c1628601b052d25555aabe6e15e6f4Evan Cheng /// the stack frame of the specified index. 69930c6b75ac2eef548c18110a38c9798ea5314cabaChris Lattner virtual int getFrameIndexOffset(const MachineFunction &MF, int FI) const; 70095923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 701a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach /// getFrameIndexReference - This method should return the base register 702a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach /// and offset used to reference a frame index location. The offset is 703a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach /// returned directly, and the base register is returned via FrameReg. 70430c6b75ac2eef548c18110a38c9798ea5314cabaChris Lattner virtual int getFrameIndexReference(const MachineFunction &MF, int FI, 705a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach unsigned &FrameReg) const { 706a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach // By default, assume all frame indices are referenced via whatever 707a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach // getFrameRegister() says. The target can override this if it's doing 708a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach // something different. 709a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach FrameReg = getFrameRegister(MF); 710a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach return getFrameIndexOffset(MF, FI); 711a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach } 712a2f20b20a8dc7f053599840557405554a0848aecJim Grosbach 7134188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// getRARegister - This method should return the register where the return 7144188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// address can be found. 7154188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey virtual unsigned getRARegister() const = 0; 71695923d70d90e0b9901d63ec3e35bf94be260e4f0Jim Grosbach 7174188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// getInitialFrameState - Returns a list of machine moves that are assumed 7184188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// on entry to all functions. Note that LabelID is ignored (assumed to be 7194188699f80c233a20b6ddc61570a8a8c1804cb85Jim Laskey /// the beginning of the function.) 7205e73d5bd2e98afda12fa69a7ea83050c69be0d34Jim Laskey virtual void getInitialFrameState(std::vector<MachineMove> &Moves) const; 7213d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner}; 7223d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner 723c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng 72494c002a190cd2e3a52b1510bc997e53d63af0b3bChris Lattner// This is useful when building IndexedMaps keyed on virtual registers 72559bf4fcc0680e75b408579064d1205a132361196Duncan Sandsstruct VirtReg2IndexFunctor : public std::unary_function<unsigned, unsigned> { 7264d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos unsigned operator()(unsigned Reg) const { 7276f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman return Reg - TargetRegisterInfo::FirstVirtualRegister; 7284d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos } 7294d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos}; 7304d0d864be3d9a698c4edfe36961a22126f041298Alkis Evlogimenos 731c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng/// getCommonSubClass - find the largest common subclass of A and B. Return NULL 732c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng/// if there is no common subclass. 733c781a243a3d17e7e763515794168d8fa6043f565Evan Chengconst TargetRegisterClass *getCommonSubClass(const TargetRegisterClass *A, 734c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng const TargetRegisterClass *B); 735c781a243a3d17e7e763515794168d8fa6043f565Evan Cheng 736d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke} // End llvm namespace 737d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 7383d7771a387d9476cfb25451ab95b72ce7b3e2532Chris Lattner#endif 739