PPCISelLowering.h revision 6eaeff29b8a6990107735f7e5f5e49da38f56223
1c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott//===-- PPCISelLowering.h - PPC32 DAG Lowering Interface --------*- C++ -*-===// 2c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott// 3c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott// The LLVM Compiler Infrastructure 4c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott// 5c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott// This file was developed by Chris Lattner and is distributed under 6c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott// the University of Illinois Open Source License. See LICENSE.TXT for details. 7c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott// 8c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott//===----------------------------------------------------------------------===// 9c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott// 10c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott// This file defines the interfaces that PPC uses to lower LLVM code into a 11c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott// selection DAG. 12c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott// 13c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott//===----------------------------------------------------------------------===// 14c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 15c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott#ifndef LLVM_TARGET_POWERPC_PPC32ISELLOWERING_H 16c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott#define LLVM_TARGET_POWERPC_PPC32ISELLOWERING_H 17c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 18c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott#include "llvm/Target/TargetLowering.h" 19c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott#include "llvm/CodeGen/SelectionDAG.h" 20c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott#include "PPC.h" 21c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott#include "PPCSubtarget.h" 22c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 23c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scottnamespace llvm { 24c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott namespace PPCISD { 25c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott enum NodeType { 26c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott // Start the numbering where the builtin ops and target ops leave off. 27c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott FIRST_NUMBER = ISD::BUILTIN_OP_END+PPC::INSTRUCTION_LIST_END, 28c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 29c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// FSEL - Traditional three-operand fsel node. 30c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// 31c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott FSEL, 32c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 33c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// FCFID - The FCFID instruction, taking an f64 operand and producing 34c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// and f64 value containing the FP representation of the integer that 35c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// was temporarily in the f64 operand. 36c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott FCFID, 37c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 38c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// FCTI[D,W]Z - The FCTIDZ and FCTIWZ instructions, taking an f32 or f64 39c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// operand, producing an f64 value containing the integer representation 40c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// of that FP value. 41c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott FCTIDZ, FCTIWZ, 42c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 43c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// STFIWX - The STFIWX instruction. The first operand is an input token 44c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// chain, then an f64 value to store, then an address to store it to, 45c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// then a SRCVALUE for the address. 46c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott STFIWX, 47c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 48c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott // VMADDFP, VNMSUBFP - The VMADDFP and VNMSUBFP instructions, taking 49c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott // three v4f32 operands and producing a v4f32 result. 50c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott VMADDFP, VNMSUBFP, 51c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 52c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// VPERM - The PPC VPERM Instruction. 53c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// 54c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott VPERM, 55c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 56c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// Hi/Lo - These represent the high and low 16-bit parts of a global 57c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// address respectively. These nodes have two operands, the first of 58c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// which must be a TargetGlobalAddress, and the second of which must be a 59c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// Constant. Selected naively, these turn into 'lis G+C' and 'li G+C', 60c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// though these are usually folded into other nodes. 61c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott Hi, Lo, 62c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 63c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// OPRC, CHAIN = DYNALLOC(CHAIN, NEGSIZE, FRAME_INDEX) 64c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// This instruction is lowered in PPCRegisterInfo::eliminateFrameIndex to 65c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// compute an allocation on the stack. 66c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott DYNALLOC, 67c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 68c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// GlobalBaseReg - On Darwin, this node represents the result of the mflr 69c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// at function entry, used for PIC code. 70c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott GlobalBaseReg, 71c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 72c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// These nodes represent the 32-bit PPC shifts that operate on 6-bit 73c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// shift amounts. These nodes are generated by the multi-precision shift 74c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// code. 75c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott SRL, SRA, SHL, 76c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 77c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// EXTSW_32 - This is the EXTSW instruction for use with "32-bit" 78c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// registers. 79c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott EXTSW_32, 80c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 81c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// STD_32 - This is the STD instruction for use with "32-bit" registers. 82c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott STD_32, 83c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 84c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// CALL - A direct function call. 85c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott CALL_Macho, CALL_ELF, 86c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 87c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// CHAIN,FLAG = MTCTR(VAL, CHAIN[, INFLAG]) - Directly corresponds to a 88c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// MTCTR instruction. 89c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott MTCTR, 90c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 91c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// CHAIN,FLAG = BCTRL(CHAIN, INFLAG) - Directly corresponds to a 92c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// BCTRL instruction. 93c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott BCTRL_Macho, BCTRL_ELF, 94c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 95c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// Return with a flag operand, matched by 'blr' 96c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott RET_FLAG, 97c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 98c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// R32 = MFCR(CRREG, INFLAG) - Represents the MFCR/MFOCRF instructions. 99c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// This copies the bits corresponding to the specified CRREG into the 100c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// resultant GPR. Bits corresponding to other CR regs are undefined. 101c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott MFCR, 102c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 103c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// RESVEC = VCMP(LHS, RHS, OPC) - Represents one of the altivec VCMP* 104c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// instructions. For lack of better number, we use the opcode number 105c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// encoding for the OPC field to identify the compare. For example, 838 106c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// is VCMPGTSH. 107c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott VCMP, 108c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 109c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// RESVEC, OUTFLAG = VCMPo(LHS, RHS, OPC) - Represents one of the 110c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// altivec VCMP*o instructions. For lack of better number, we use the 111c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// opcode number encoding for the OPC field to identify the compare. For 112c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// example, 838 is VCMPGTSH. 113c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott VCMPo, 114c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 115c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// CHAIN = COND_BRANCH CHAIN, CRRC, OPC, DESTBB [, INFLAG] - This 116c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// corresponds to the COND_BRANCH pseudo instruction. CRRC is the 117c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// condition register to branch on, OPC is the branch opcode to use (e.g. 118c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// PPC::BLE), DESTBB is the destination block to branch to, and INFLAG is 119c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// an optional input flag argument. 120c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott COND_BRANCH, 121c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 122c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// CHAIN = STBRX CHAIN, GPRC, Ptr, SRCVALUE, Type - This is a 123c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// byte-swapping store instruction. It byte-swaps the low "Type" bits of 124c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// the GPRC input, then stores it through Ptr. Type can be either i16 or 125c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// i32. 126c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott STBRX, 127c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 128c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// GPRC, CHAIN = LBRX CHAIN, Ptr, SRCVALUE, Type - This is a 129c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// byte-swapping load instruction. It loads "Type" bits, byte swaps it, 130c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// then puts it in the bottom bits of the GPRC. TYPE can be either i16 131c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// or i32. 132c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott LBRX, 133c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 134c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott // The following 5 instructions are used only as part of the 135c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott // long double-to-int conversion sequence. 136c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 137c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// OUTFLAG = MFFS F8RC - This moves the FPSCR (not modelled) into the 138c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// register. 139c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott MFFS, 140c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 141c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// OUTFLAG = MTFSB0 INFLAG - This clears a bit in the FPSCR. 142c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott MTFSB0, 143c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 144c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// OUTFLAG = MTFSB1 INFLAG - This sets a bit in the FPSCR. 145c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott MTFSB1, 146c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 147c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// F8RC, OUTFLAG = FADDRTZ F8RC, F8RC, INFLAG - This is an FADD done with 148c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// rounding towards zero. It has flags added so it won't move past the 149c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// FPSCR-setting instructions. 150c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott FADDRTZ, 151c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 152c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// MTFSF = F8RC, INFLAG - This moves the register into the FPSCR. 153c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott MTFSF 154c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott }; 155c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott } 156c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 157c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// Define some predicates that are used for node matching. 158c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott namespace PPC { 159c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// isVPKUHUMShuffleMask - Return true if this is the shuffle mask for a 160c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// VPKUHUM instruction. 161c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott bool isVPKUHUMShuffleMask(SDNode *N, bool isUnary); 162c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 163c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// isVPKUWUMShuffleMask - Return true if this is the shuffle mask for a 164c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// VPKUWUM instruction. 165c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott bool isVPKUWUMShuffleMask(SDNode *N, bool isUnary); 166c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 167c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// isVMRGLShuffleMask - Return true if this is a shuffle mask suitable for 168c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// a VRGL* instruction with the specified unit size (1,2 or 4 bytes). 169c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott bool isVMRGLShuffleMask(SDNode *N, unsigned UnitSize, bool isUnary); 170c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 171c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// isVMRGHShuffleMask - Return true if this is a shuffle mask suitable for 172c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// a VRGH* instruction with the specified unit size (1,2 or 4 bytes). 173c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott bool isVMRGHShuffleMask(SDNode *N, unsigned UnitSize, bool isUnary); 174c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 175c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// isVSLDOIShuffleMask - If this is a vsldoi shuffle mask, return the shift 176c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// amount, otherwise return -1. 177c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott int isVSLDOIShuffleMask(SDNode *N, bool isUnary); 178c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 179c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// isSplatShuffleMask - Return true if the specified VECTOR_SHUFFLE operand 180c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// specifies a splat of a single element that is suitable for input to 181c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// VSPLTB/VSPLTH/VSPLTW. 182c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott bool isSplatShuffleMask(SDNode *N, unsigned EltSize); 183c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 184c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// isAllNegativeZeroVector - Returns true if all elements of build_vector 185c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// are -0.0. 186c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott bool isAllNegativeZeroVector(SDNode *N); 187c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 188c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// getVSPLTImmediate - Return the appropriate VSPLT* immediate to splat the 189c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// specified isSplatShuffleMask VECTOR_SHUFFLE mask. 190c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott unsigned getVSPLTImmediate(SDNode *N, unsigned EltSize); 191c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 192c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// get_VSPLTI_elt - If this is a build_vector of constants which can be 193c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// formed by using a vspltis[bhw] instruction of the specified element 194c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// size, return the constant being splatted. The ByteSize field indicates 195c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// the number of bytes of each element [124] -> [bhw]. 196c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott SDOperand get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG); 197c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott } 198c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 199c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott class PPCTargetLowering : public TargetLowering { 200c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott int VarArgsFrameIndex; // FrameIndex for start of varargs area. 201c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott int VarArgsStackOffset; // StackOffset for start of stack 202c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott // arguments. 203c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott unsigned VarArgsNumGPR; // Index of the first unused integer 204c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott // register for parameter passing. 205c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott unsigned VarArgsNumFPR; // Index of the first unused double 206c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott // register for parameter passing. 207c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott int ReturnAddrIndex; // FrameIndex for return slot. 208c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott const PPCSubtarget &PPCSubTarget; 209c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott public: 210c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott explicit PPCTargetLowering(PPCTargetMachine &TM); 211c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 212c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// getTargetNodeName() - This method returns the name of a target specific 213c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// DAG node. 214c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott virtual const char *getTargetNodeName(unsigned Opcode) const; 215c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 216c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// getPreIndexedAddressParts - returns true by value, base pointer and 217c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// offset pointer and addressing mode by reference if the node's address 218c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// can be legally represented as pre-indexed load / store address. 219c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott virtual bool getPreIndexedAddressParts(SDNode *N, SDOperand &Base, 220c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott SDOperand &Offset, 221c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott ISD::MemIndexedMode &AM, 222c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott SelectionDAG &DAG); 223c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 224c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// SelectAddressRegReg - Given the specified addressed, check to see if it 225c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// can be represented as an indexed [r+r] operation. Returns false if it 226c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// can be more efficiently represented with [r+imm]. 227c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott bool SelectAddressRegReg(SDOperand N, SDOperand &Base, SDOperand &Index, 228c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott SelectionDAG &DAG); 229c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 230c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// SelectAddressRegImm - Returns true if the address N can be represented 231c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// by a base register plus a signed 16-bit displacement [r+imm], and if it 232c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// is not better represented as reg+reg. 233c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott bool SelectAddressRegImm(SDOperand N, SDOperand &Disp, SDOperand &Base, 234c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott SelectionDAG &DAG); 235c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 236c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// SelectAddressRegRegOnly - Given the specified addressed, force it to be 237c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// represented as an indexed [r+r] operation. 238c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott bool SelectAddressRegRegOnly(SDOperand N, SDOperand &Base, SDOperand &Index, 239c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott SelectionDAG &DAG); 240c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 241c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// SelectAddressRegImmShift - Returns true if the address N can be 242c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// represented by a base register plus a signed 14-bit displacement 243c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// [r+imm*4]. Suitable for use by STD and friends. 244c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott bool SelectAddressRegImmShift(SDOperand N, SDOperand &Disp, SDOperand &Base, 245c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott SelectionDAG &DAG); 246c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 247c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 248c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// LowerOperation - Provide custom lowering hooks for some operations. 249c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott /// 250c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); 251c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 252c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott virtual SDOperand PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; 253c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 254c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott virtual void computeMaskedBitsForTargetNode(const SDOperand Op, 255c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott uint64_t Mask, 256c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott uint64_t &KnownZero, 257c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott uint64_t &KnownOne, 258c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott const SelectionDAG &DAG, 259c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott unsigned Depth = 0) const; 260c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 261c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI, 262c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott MachineBasicBlock *MBB); 263c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott 264c7f5f8508d98d5952d42ed7648c2a8f30a4da156Patrick Scott ConstraintType getConstraintType(const std::string &Constraint) const; 265c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch std::pair<unsigned, const TargetRegisterClass*> 266c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch getRegForInlineAsmConstraint(const std::string &Constraint, 267c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch MVT::ValueType VT) const; 268c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch 269c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops 270c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch /// vector. If it is invalid, don't add anything to Ops. 271c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch virtual void LowerAsmOperandForConstraint(SDOperand Op, 272c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch char ConstraintLetter, 273c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch std::vector<SDOperand> &Ops, 274c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch SelectionDAG &DAG); 275c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch 276c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch /// isLegalAddressingMode - Return true if the addressing mode represented 277c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch /// by AM is legal for this target, for a load/store of the specified type. 278c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty)const; 279c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch 280c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch /// isLegalAddressImmediate - Return true if the integer value can be used 281c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch /// as the offset of the target addressing mode for load / store of the 282c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch /// given type. 283c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch virtual bool isLegalAddressImmediate(int64_t V, const Type *Ty) const; 284c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch 285c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch /// isLegalAddressImmediate - Return true if the GlobalValue can be used as 286c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch /// the offset of the target addressing mode. 287c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch virtual bool isLegalAddressImmediate(GlobalValue *GV) const; 288c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch 289c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch SDOperand LowerFRAMEADDR(SDOperand Op, SelectionDAG &DAG); 290c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch }; 291c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch} 292c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch 293c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch#endif // LLVM_TARGET_POWERPC_PPC32ISELLOWERING_H 294c407dc5cd9bdc5668497f21b26b09d988ab439deBen Murdoch