PPCISelLowering.h revision 8608f2eff2dab5345243c40d0bca9138f2dce6f1
121e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman//===-- PPCISelLowering.h - PPC32 DAG Lowering Interface --------*- C++ -*-===// 27c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner// 37c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner// The LLVM Compiler Infrastructure 47c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 77c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner// 87c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner//===----------------------------------------------------------------------===// 97c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner// 107c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner// This file defines the interfaces that PPC uses to lower LLVM code into a 117c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner// selection DAG. 127c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner// 137c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner//===----------------------------------------------------------------------===// 147c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner 157c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner#ifndef LLVM_TARGET_POWERPC_PPC32ISELLOWERING_H 167c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner#define LLVM_TARGET_POWERPC_PPC32ISELLOWERING_H 177c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner 187c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner#include "llvm/Target/TargetLowering.h" 190bbea954331b8f08afa5b094dfb0841829c70eaaChris Lattner#include "llvm/CodeGen/SelectionDAG.h" 202668959b8879097db368aec7d76c455260abc75bChris Lattner#include "PPC.h" 21331d1bc5dfe1be9090e29f9af9579888a63a9a79Chris Lattner#include "PPCSubtarget.h" 227c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner 237c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattnernamespace llvm { 240bbea954331b8f08afa5b094dfb0841829c70eaaChris Lattner namespace PPCISD { 250bbea954331b8f08afa5b094dfb0841829c70eaaChris Lattner enum NodeType { 263c983c3dc19bb83807f978c04737b4572be90a93Nate Begeman // Start the numbering where the builtin ops and target ops leave off. 270bbea954331b8f08afa5b094dfb0841829c70eaaChris Lattner FIRST_NUMBER = ISD::BUILTIN_OP_END+PPC::INSTRUCTION_LIST_END, 280bbea954331b8f08afa5b094dfb0841829c70eaaChris Lattner 290bbea954331b8f08afa5b094dfb0841829c70eaaChris Lattner /// FSEL - Traditional three-operand fsel node. 300bbea954331b8f08afa5b094dfb0841829c70eaaChris Lattner /// 310bbea954331b8f08afa5b094dfb0841829c70eaaChris Lattner FSEL, 32f76053269ecc6c7bd3d0b1e90ebdd0cef1bb2bdcChris Lattner 33c09eeec0ebc378644bafd04916e5efafa7d98152Nate Begeman /// FCFID - The FCFID instruction, taking an f64 operand and producing 34c09eeec0ebc378644bafd04916e5efafa7d98152Nate Begeman /// and f64 value containing the FP representation of the integer that 35c09eeec0ebc378644bafd04916e5efafa7d98152Nate Begeman /// was temporarily in the f64 operand. 36c09eeec0ebc378644bafd04916e5efafa7d98152Nate Begeman FCFID, 37c09eeec0ebc378644bafd04916e5efafa7d98152Nate Begeman 38c09eeec0ebc378644bafd04916e5efafa7d98152Nate Begeman /// FCTI[D,W]Z - The FCTIDZ and FCTIWZ instructions, taking an f32 or f64 39c09eeec0ebc378644bafd04916e5efafa7d98152Nate Begeman /// operand, producing an f64 value containing the integer representation 40c09eeec0ebc378644bafd04916e5efafa7d98152Nate Begeman /// of that FP value. 41c09eeec0ebc378644bafd04916e5efafa7d98152Nate Begeman FCTIDZ, FCTIWZ, 42860e8862c1fbd3b261da4a64a8c0096f9f373681Chris Lattner 435126984b1da4bda0e93961da07e883699f1f2d57Chris Lattner /// STFIWX - The STFIWX instruction. The first operand is an input token 445126984b1da4bda0e93961da07e883699f1f2d57Chris Lattner /// chain, then an f64 value to store, then an address to store it to, 455126984b1da4bda0e93961da07e883699f1f2d57Chris Lattner /// then a SRCVALUE for the address. 465126984b1da4bda0e93961da07e883699f1f2d57Chris Lattner STFIWX, 475126984b1da4bda0e93961da07e883699f1f2d57Chris Lattner 48993aeb2ed93f99faf1438f1b67cd922989306828Nate Begeman // VMADDFP, VNMSUBFP - The VMADDFP and VNMSUBFP instructions, taking 49993aeb2ed93f99faf1438f1b67cd922989306828Nate Begeman // three v4f32 operands and producing a v4f32 result. 50993aeb2ed93f99faf1438f1b67cd922989306828Nate Begeman VMADDFP, VNMSUBFP, 51993aeb2ed93f99faf1438f1b67cd922989306828Nate Begeman 52f1d0b2bedaa065972a5ba17259055c1176cd1497Chris Lattner /// VPERM - The PPC VPERM Instruction. 53f1d0b2bedaa065972a5ba17259055c1176cd1497Chris Lattner /// 54f1d0b2bedaa065972a5ba17259055c1176cd1497Chris Lattner VPERM, 55f1d0b2bedaa065972a5ba17259055c1176cd1497Chris Lattner 56860e8862c1fbd3b261da4a64a8c0096f9f373681Chris Lattner /// Hi/Lo - These represent the high and low 16-bit parts of a global 57860e8862c1fbd3b261da4a64a8c0096f9f373681Chris Lattner /// address respectively. These nodes have two operands, the first of 58860e8862c1fbd3b261da4a64a8c0096f9f373681Chris Lattner /// which must be a TargetGlobalAddress, and the second of which must be a 59860e8862c1fbd3b261da4a64a8c0096f9f373681Chris Lattner /// Constant. Selected naively, these turn into 'lis G+C' and 'li G+C', 60860e8862c1fbd3b261da4a64a8c0096f9f373681Chris Lattner /// though these are usually folded into other nodes. 61860e8862c1fbd3b261da4a64a8c0096f9f373681Chris Lattner Hi, Lo, 62860e8862c1fbd3b261da4a64a8c0096f9f373681Chris Lattner 632f616bff7ef1e2e08d6d23c2a8b42ec2bfebb173Jim Laskey /// OPRC, CHAIN = DYNALLOC(CHAIN, NEGSIZE, FRAME_INDEX) 642f616bff7ef1e2e08d6d23c2a8b42ec2bfebb173Jim Laskey /// This instruction is lowered in PPCRegisterInfo::eliminateFrameIndex to 652f616bff7ef1e2e08d6d23c2a8b42ec2bfebb173Jim Laskey /// compute an allocation on the stack. 662f616bff7ef1e2e08d6d23c2a8b42ec2bfebb173Jim Laskey DYNALLOC, 672f616bff7ef1e2e08d6d23c2a8b42ec2bfebb173Jim Laskey 68860e8862c1fbd3b261da4a64a8c0096f9f373681Chris Lattner /// GlobalBaseReg - On Darwin, this node represents the result of the mflr 69860e8862c1fbd3b261da4a64a8c0096f9f373681Chris Lattner /// at function entry, used for PIC code. 70860e8862c1fbd3b261da4a64a8c0096f9f373681Chris Lattner GlobalBaseReg, 714172b10ca1adfc1026428e5f522aaab98bd939adChris Lattner 724172b10ca1adfc1026428e5f522aaab98bd939adChris Lattner /// These nodes represent the 32-bit PPC shifts that operate on 6-bit 734172b10ca1adfc1026428e5f522aaab98bd939adChris Lattner /// shift amounts. These nodes are generated by the multi-precision shift 744172b10ca1adfc1026428e5f522aaab98bd939adChris Lattner /// code. 754172b10ca1adfc1026428e5f522aaab98bd939adChris Lattner SRL, SRA, SHL, 76ecfe55e65b6a72fddd543c42f2e2df4c96c647baChris Lattner 77ecfe55e65b6a72fddd543c42f2e2df4c96c647baChris Lattner /// EXTSW_32 - This is the EXTSW instruction for use with "32-bit" 78ecfe55e65b6a72fddd543c42f2e2df4c96c647baChris Lattner /// registers. 79ecfe55e65b6a72fddd543c42f2e2df4c96c647baChris Lattner EXTSW_32, 809e4dd9dfc97f3930f58ca6e47bebbd8eb5cdd8a1Nate Begeman 81ecfe55e65b6a72fddd543c42f2e2df4c96c647baChris Lattner /// STD_32 - This is the STD instruction for use with "32-bit" registers. 82ecfe55e65b6a72fddd543c42f2e2df4c96c647baChris Lattner STD_32, 83ecfe55e65b6a72fddd543c42f2e2df4c96c647baChris Lattner 84c703a8fbf8653ac8302ae368391a4954c307ca2cChris Lattner /// CALL - A direct function call. 8563f8fb1993bf2b4286c5a6763e2eee414a751699Nicolas Geoffray CALL_Macho, CALL_ELF, 86281b55ebeccd3f0d723888c1bb9ec6e476f708f1Chris Lattner 87c703a8fbf8653ac8302ae368391a4954c307ca2cChris Lattner /// CHAIN,FLAG = MTCTR(VAL, CHAIN[, INFLAG]) - Directly corresponds to a 88c703a8fbf8653ac8302ae368391a4954c307ca2cChris Lattner /// MTCTR instruction. 89c703a8fbf8653ac8302ae368391a4954c307ca2cChris Lattner MTCTR, 90c703a8fbf8653ac8302ae368391a4954c307ca2cChris Lattner 91c703a8fbf8653ac8302ae368391a4954c307ca2cChris Lattner /// CHAIN,FLAG = BCTRL(CHAIN, INFLAG) - Directly corresponds to a 92c703a8fbf8653ac8302ae368391a4954c307ca2cChris Lattner /// BCTRL instruction. 939f0bc659c8d2f1e401a9690e4900b0fd2a70bdfeChris Lattner BCTRL_Macho, BCTRL_ELF, 94c703a8fbf8653ac8302ae368391a4954c307ca2cChris Lattner 959e4dd9dfc97f3930f58ca6e47bebbd8eb5cdd8a1Nate Begeman /// Return with a flag operand, matched by 'blr' 969e4dd9dfc97f3930f58ca6e47bebbd8eb5cdd8a1Nate Begeman RET_FLAG, 976d92caddc4aa5fc946b294259e00cc35536e61e8Chris Lattner 986d92caddc4aa5fc946b294259e00cc35536e61e8Chris Lattner /// R32 = MFCR(CRREG, INFLAG) - Represents the MFCR/MFOCRF instructions. 996d92caddc4aa5fc946b294259e00cc35536e61e8Chris Lattner /// This copies the bits corresponding to the specified CRREG into the 1006d92caddc4aa5fc946b294259e00cc35536e61e8Chris Lattner /// resultant GPR. Bits corresponding to other CR regs are undefined. 1016d92caddc4aa5fc946b294259e00cc35536e61e8Chris Lattner MFCR, 102a17b1557ad705c56c41624e6841e19093ed31f21Chris Lattner 103a17b1557ad705c56c41624e6841e19093ed31f21Chris Lattner /// RESVEC = VCMP(LHS, RHS, OPC) - Represents one of the altivec VCMP* 104a17b1557ad705c56c41624e6841e19093ed31f21Chris Lattner /// instructions. For lack of better number, we use the opcode number 105a17b1557ad705c56c41624e6841e19093ed31f21Chris Lattner /// encoding for the OPC field to identify the compare. For example, 838 106a17b1557ad705c56c41624e6841e19093ed31f21Chris Lattner /// is VCMPGTSH. 107a17b1557ad705c56c41624e6841e19093ed31f21Chris Lattner VCMP, 1086d92caddc4aa5fc946b294259e00cc35536e61e8Chris Lattner 1096d92caddc4aa5fc946b294259e00cc35536e61e8Chris Lattner /// RESVEC, OUTFLAG = VCMPo(LHS, RHS, OPC) - Represents one of the 1106d92caddc4aa5fc946b294259e00cc35536e61e8Chris Lattner /// altivec VCMP*o instructions. For lack of better number, we use the 1116d92caddc4aa5fc946b294259e00cc35536e61e8Chris Lattner /// opcode number encoding for the OPC field to identify the compare. For 1126d92caddc4aa5fc946b294259e00cc35536e61e8Chris Lattner /// example, 838 is VCMPGTSH. 11390564f26d17701e11effa2f4e0fb9a18d8a91274Chris Lattner VCMPo, 11490564f26d17701e11effa2f4e0fb9a18d8a91274Chris Lattner 11590564f26d17701e11effa2f4e0fb9a18d8a91274Chris Lattner /// CHAIN = COND_BRANCH CHAIN, CRRC, OPC, DESTBB [, INFLAG] - This 11690564f26d17701e11effa2f4e0fb9a18d8a91274Chris Lattner /// corresponds to the COND_BRANCH pseudo instruction. CRRC is the 11790564f26d17701e11effa2f4e0fb9a18d8a91274Chris Lattner /// condition register to branch on, OPC is the branch opcode to use (e.g. 11890564f26d17701e11effa2f4e0fb9a18d8a91274Chris Lattner /// PPC::BLE), DESTBB is the destination block to branch to, and INFLAG is 11990564f26d17701e11effa2f4e0fb9a18d8a91274Chris Lattner /// an optional input flag argument. 120d9989384592a3bd9dd374470a723ca8303071a2dChris Lattner COND_BRANCH, 121d9989384592a3bd9dd374470a723ca8303071a2dChris Lattner 122d9989384592a3bd9dd374470a723ca8303071a2dChris Lattner /// CHAIN = STBRX CHAIN, GPRC, Ptr, SRCVALUE, Type - This is a 123d9989384592a3bd9dd374470a723ca8303071a2dChris Lattner /// byte-swapping store instruction. It byte-swaps the low "Type" bits of 124d9989384592a3bd9dd374470a723ca8303071a2dChris Lattner /// the GPRC input, then stores it through Ptr. Type can be either i16 or 125d9989384592a3bd9dd374470a723ca8303071a2dChris Lattner /// i32. 126d9989384592a3bd9dd374470a723ca8303071a2dChris Lattner STBRX, 127d9989384592a3bd9dd374470a723ca8303071a2dChris Lattner 128d9989384592a3bd9dd374470a723ca8303071a2dChris Lattner /// GPRC, CHAIN = LBRX CHAIN, Ptr, SRCVALUE, Type - This is a 129d9989384592a3bd9dd374470a723ca8303071a2dChris Lattner /// byte-swapping load instruction. It loads "Type" bits, byte swaps it, 130d9989384592a3bd9dd374470a723ca8303071a2dChris Lattner /// then puts it in the bottom bits of the GPRC. TYPE can be either i16 131d9989384592a3bd9dd374470a723ca8303071a2dChris Lattner /// or i32. 1326eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen LBRX, 1336eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen 1346eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen // The following 5 instructions are used only as part of the 1356eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen // long double-to-int conversion sequence. 1366eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen 1376eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen /// OUTFLAG = MFFS F8RC - This moves the FPSCR (not modelled) into the 1386eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen /// register. 1396eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen MFFS, 1406eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen 1416eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen /// OUTFLAG = MTFSB0 INFLAG - This clears a bit in the FPSCR. 1426eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen MTFSB0, 1436eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen 1446eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen /// OUTFLAG = MTFSB1 INFLAG - This sets a bit in the FPSCR. 1456eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen MTFSB1, 1466eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen 1476eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen /// F8RC, OUTFLAG = FADDRTZ F8RC, F8RC, INFLAG - This is an FADD done with 1486eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen /// rounding towards zero. It has flags added so it won't move past the 1496eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen /// FPSCR-setting instructions. 1506eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen FADDRTZ, 1516eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen 1526eaeff29b8a6990107735f7e5f5e49da38f56223Dale Johannesen /// MTFSF = F8RC, INFLAG - This moves the register into the FPSCR. 15354fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng MTFSF, 15454fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng 1558608f2eff2dab5345243c40d0bca9138f2dce6f1Evan Cheng /// LARX = This corresponds to PPC l{w|d}arx instrcution: load and 15654fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng /// reserve indexed. This is used to implement atomic operations. 1578608f2eff2dab5345243c40d0bca9138f2dce6f1Evan Cheng LARX, 15854fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng 1598608f2eff2dab5345243c40d0bca9138f2dce6f1Evan Cheng /// STCX = This corresponds to PPC stcx. instrcution: store conditional 1608608f2eff2dab5345243c40d0bca9138f2dce6f1Evan Cheng /// indexed. This is used to implement atomic operations. 1618608f2eff2dab5345243c40d0bca9138f2dce6f1Evan Cheng STCX, 16254fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng 16354fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng /// CMP_UNRESERVE = Test for equality and "unreserve" if not true. This 16454fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng /// is used to implement atomic operations. 16554fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng CMP_UNRESERVE 166281b55ebeccd3f0d723888c1bb9ec6e476f708f1Chris Lattner }; 1673c0f9cc90cdcb70caf0dc517b9f9206d731aeb70Chris Lattner } 1683c0f9cc90cdcb70caf0dc517b9f9206d731aeb70Chris Lattner 1693c0f9cc90cdcb70caf0dc517b9f9206d731aeb70Chris Lattner /// Define some predicates that are used for node matching. 1703c0f9cc90cdcb70caf0dc517b9f9206d731aeb70Chris Lattner namespace PPC { 171ddb739e5ea6ccf6fa4f4e2a23e3da550868efaa1Chris Lattner /// isVPKUHUMShuffleMask - Return true if this is the shuffle mask for a 172ddb739e5ea6ccf6fa4f4e2a23e3da550868efaa1Chris Lattner /// VPKUHUM instruction. 173f24380e78ecc8a2db1b2116867d878b1e7c6f6edChris Lattner bool isVPKUHUMShuffleMask(SDNode *N, bool isUnary); 174ddb739e5ea6ccf6fa4f4e2a23e3da550868efaa1Chris Lattner 175ddb739e5ea6ccf6fa4f4e2a23e3da550868efaa1Chris Lattner /// isVPKUWUMShuffleMask - Return true if this is the shuffle mask for a 176ddb739e5ea6ccf6fa4f4e2a23e3da550868efaa1Chris Lattner /// VPKUWUM instruction. 177f24380e78ecc8a2db1b2116867d878b1e7c6f6edChris Lattner bool isVPKUWUMShuffleMask(SDNode *N, bool isUnary); 178116cc48e30b9c307bf3eec29c890b4ba25cd18dbChris Lattner 179116cc48e30b9c307bf3eec29c890b4ba25cd18dbChris Lattner /// isVMRGLShuffleMask - Return true if this is a shuffle mask suitable for 180116cc48e30b9c307bf3eec29c890b4ba25cd18dbChris Lattner /// a VRGL* instruction with the specified unit size (1,2 or 4 bytes). 181caad163496a3ad207a75009f4ad16bae1b1527aeChris Lattner bool isVMRGLShuffleMask(SDNode *N, unsigned UnitSize, bool isUnary); 182116cc48e30b9c307bf3eec29c890b4ba25cd18dbChris Lattner 183116cc48e30b9c307bf3eec29c890b4ba25cd18dbChris Lattner /// isVMRGHShuffleMask - Return true if this is a shuffle mask suitable for 184116cc48e30b9c307bf3eec29c890b4ba25cd18dbChris Lattner /// a VRGH* instruction with the specified unit size (1,2 or 4 bytes). 185caad163496a3ad207a75009f4ad16bae1b1527aeChris Lattner bool isVMRGHShuffleMask(SDNode *N, unsigned UnitSize, bool isUnary); 186ddb739e5ea6ccf6fa4f4e2a23e3da550868efaa1Chris Lattner 187d0608e191ff9c00af68985f246410c219d1bec57Chris Lattner /// isVSLDOIShuffleMask - If this is a vsldoi shuffle mask, return the shift 188d0608e191ff9c00af68985f246410c219d1bec57Chris Lattner /// amount, otherwise return -1. 189f24380e78ecc8a2db1b2116867d878b1e7c6f6edChris Lattner int isVSLDOIShuffleMask(SDNode *N, bool isUnary); 190d0608e191ff9c00af68985f246410c219d1bec57Chris Lattner 1913c0f9cc90cdcb70caf0dc517b9f9206d731aeb70Chris Lattner /// isSplatShuffleMask - Return true if the specified VECTOR_SHUFFLE operand 1923c0f9cc90cdcb70caf0dc517b9f9206d731aeb70Chris Lattner /// specifies a splat of a single element that is suitable for input to 1933c0f9cc90cdcb70caf0dc517b9f9206d731aeb70Chris Lattner /// VSPLTB/VSPLTH/VSPLTW. 1947ff7e674580adad7a5bccdbd74cf9c9f05e46d0fChris Lattner bool isSplatShuffleMask(SDNode *N, unsigned EltSize); 1953c0f9cc90cdcb70caf0dc517b9f9206d731aeb70Chris Lattner 19666ffe6be0c7b50100a00cb0cc87a5d4983818572Evan Cheng /// isAllNegativeZeroVector - Returns true if all elements of build_vector 19766ffe6be0c7b50100a00cb0cc87a5d4983818572Evan Cheng /// are -0.0. 19866ffe6be0c7b50100a00cb0cc87a5d4983818572Evan Cheng bool isAllNegativeZeroVector(SDNode *N); 19966ffe6be0c7b50100a00cb0cc87a5d4983818572Evan Cheng 2003c0f9cc90cdcb70caf0dc517b9f9206d731aeb70Chris Lattner /// getVSPLTImmediate - Return the appropriate VSPLT* immediate to splat the 2013c0f9cc90cdcb70caf0dc517b9f9206d731aeb70Chris Lattner /// specified isSplatShuffleMask VECTOR_SHUFFLE mask. 2027ff7e674580adad7a5bccdbd74cf9c9f05e46d0fChris Lattner unsigned getVSPLTImmediate(SDNode *N, unsigned EltSize); 20364b3a08bc696b2ef8733d72ce81e49be175cbbffChris Lattner 204e87192a854ff0f2f1904dd9ea282eb36059bb5afChris Lattner /// get_VSPLTI_elt - If this is a build_vector of constants which can be 205140a58f9dfda30dbb80edd3da1b5632c178f7efcChris Lattner /// formed by using a vspltis[bhw] instruction of the specified element 206140a58f9dfda30dbb80edd3da1b5632c178f7efcChris Lattner /// size, return the constant being splatted. The ByteSize field indicates 207140a58f9dfda30dbb80edd3da1b5632c178f7efcChris Lattner /// the number of bytes of each element [124] -> [bhw]. 208e87192a854ff0f2f1904dd9ea282eb36059bb5afChris Lattner SDOperand get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG); 2093c0f9cc90cdcb70caf0dc517b9f9206d731aeb70Chris Lattner } 2100bbea954331b8f08afa5b094dfb0841829c70eaaChris Lattner 21121e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman class PPCTargetLowering : public TargetLowering { 2127c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner int VarArgsFrameIndex; // FrameIndex for start of varargs area. 2130111999a88077f237c49d03c5e7891ec874b33a9Nicolas Geoffray int VarArgsStackOffset; // StackOffset for start of stack 2140111999a88077f237c49d03c5e7891ec874b33a9Nicolas Geoffray // arguments. 2150111999a88077f237c49d03c5e7891ec874b33a9Nicolas Geoffray unsigned VarArgsNumGPR; // Index of the first unused integer 2160111999a88077f237c49d03c5e7891ec874b33a9Nicolas Geoffray // register for parameter passing. 2170111999a88077f237c49d03c5e7891ec874b33a9Nicolas Geoffray unsigned VarArgsNumFPR; // Index of the first unused double 2180111999a88077f237c49d03c5e7891ec874b33a9Nicolas Geoffray // register for parameter passing. 2197c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner int ReturnAddrIndex; // FrameIndex for return slot. 220331d1bc5dfe1be9090e29f9af9579888a63a9a79Chris Lattner const PPCSubtarget &PPCSubTarget; 2217c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner public: 22261e729e2e9517ab2d8887bab86fb377900fa1081Dan Gohman explicit PPCTargetLowering(PPCTargetMachine &TM); 2237c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner 224da6d20f0c15205923cb2c3ef4bf9b5d77de88881Chris Lattner /// getTargetNodeName() - This method returns the name of a target specific 225da6d20f0c15205923cb2c3ef4bf9b5d77de88881Chris Lattner /// DAG node. 226da6d20f0c15205923cb2c3ef4bf9b5d77de88881Chris Lattner virtual const char *getTargetNodeName(unsigned Opcode) const; 227fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner 2285b8f82e35b51bf007de07a7ca9347d804084ddf8Scott Michel /// getSetCCResultType - Return the ISD::SETCC ValueType 2295b8f82e35b51bf007de07a7ca9347d804084ddf8Scott Michel virtual MVT::ValueType getSetCCResultType(const SDOperand &) const; 2305b8f82e35b51bf007de07a7ca9347d804084ddf8Scott Michel 231fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner /// getPreIndexedAddressParts - returns true by value, base pointer and 232fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner /// offset pointer and addressing mode by reference if the node's address 233fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner /// can be legally represented as pre-indexed load / store address. 234fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner virtual bool getPreIndexedAddressParts(SDNode *N, SDOperand &Base, 235fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner SDOperand &Offset, 236144d8f09e139f691cafadbc17873943ba4c465f3Evan Cheng ISD::MemIndexedMode &AM, 237fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner SelectionDAG &DAG); 238fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner 239fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner /// SelectAddressRegReg - Given the specified addressed, check to see if it 240fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner /// can be represented as an indexed [r+r] operation. Returns false if it 241fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner /// can be more efficiently represented with [r+imm]. 242fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner bool SelectAddressRegReg(SDOperand N, SDOperand &Base, SDOperand &Index, 243fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner SelectionDAG &DAG); 244fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner 245fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner /// SelectAddressRegImm - Returns true if the address N can be represented 246fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner /// by a base register plus a signed 16-bit displacement [r+imm], and if it 247fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner /// is not better represented as reg+reg. 248fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner bool SelectAddressRegImm(SDOperand N, SDOperand &Disp, SDOperand &Base, 249fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner SelectionDAG &DAG); 250fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner 251fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner /// SelectAddressRegRegOnly - Given the specified addressed, force it to be 252fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner /// represented as an indexed [r+r] operation. 253fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner bool SelectAddressRegRegOnly(SDOperand N, SDOperand &Base, SDOperand &Index, 254fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner SelectionDAG &DAG); 255fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner 256fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner /// SelectAddressRegImmShift - Returns true if the address N can be 257fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner /// represented by a base register plus a signed 14-bit displacement 258fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner /// [r+imm*4]. Suitable for use by STD and friends. 259fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner bool SelectAddressRegImmShift(SDOperand N, SDOperand &Disp, SDOperand &Base, 260fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner SelectionDAG &DAG); 261fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner 262da6d20f0c15205923cb2c3ef4bf9b5d77de88881Chris Lattner 263e4bc9ea0a560d8a0ba42f5a2da617e1f1f834710Chris Lattner /// LowerOperation - Provide custom lowering hooks for some operations. 264e4bc9ea0a560d8a0ba42f5a2da617e1f1f834710Chris Lattner /// 265e4bc9ea0a560d8a0ba42f5a2da617e1f1f834710Chris Lattner virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); 2661f873003266fbdec7c2c48a965c60f4e2e35a158Chris Lattner 2671f873003266fbdec7c2c48a965c60f4e2e35a158Chris Lattner virtual SDNode *ExpandOperationResult(SDNode *N, SelectionDAG &DAG); 268e4bc9ea0a560d8a0ba42f5a2da617e1f1f834710Chris Lattner 2698c13d0a5734a2f9d2b1c3870732cafffb20e3a55Chris Lattner virtual SDOperand PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; 270fc5b1ab94959879a91c34aee8859e652a50270d0Chris Lattner 271bbe77de450ef36b4f83cc3b57705a9758adbd925Chris Lattner virtual void computeMaskedBitsForTargetNode(const SDOperand Op, 272977a76fbb6ea1b87dfd7fbbe2ae2afb63e982ff3Dan Gohman const APInt &Mask, 273fd29e0eb060ea8b4d490860329234d2ae5f5952eDan Gohman APInt &KnownZero, 274fd29e0eb060ea8b4d490860329234d2ae5f5952eDan Gohman APInt &KnownOne, 275ea859be53ca13a1547c4675549946b74dc3c6f41Dan Gohman const SelectionDAG &DAG, 276bbe77de450ef36b4f83cc3b57705a9758adbd925Chris Lattner unsigned Depth = 0) const; 2774a95945fa5aa431110f50092f4a45d24772a553bNate Begeman 278ff9b373e8f5006c629af81e2619778b4c4f5249eEvan Cheng virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI, 279ff9b373e8f5006c629af81e2619778b4c4f5249eEvan Cheng MachineBasicBlock *MBB); 280ddc787dfdc75fb2d78eb3e5793ca0f417ad74fd3Chris Lattner 2814234f57fa02b1f04a9f52a7b3c2aa22d32ac521cChris Lattner ConstraintType getConstraintType(const std::string &Constraint) const; 282331d1bc5dfe1be9090e29f9af9579888a63a9a79Chris Lattner std::pair<unsigned, const TargetRegisterClass*> 283331d1bc5dfe1be9090e29f9af9579888a63a9a79Chris Lattner getRegForInlineAsmConstraint(const std::string &Constraint, 284331d1bc5dfe1be9090e29f9af9579888a63a9a79Chris Lattner MVT::ValueType VT) const; 285c4c6257c1a154279bf10e9498d46d6c1793dbaa7Evan Cheng 28628d08fdb9f6572cafd5aae95c7caffa3cd136d8eDale Johannesen /// getByValTypeAlignment - Return the desired alignment for ByVal aggregate 28728d08fdb9f6572cafd5aae95c7caffa3cd136d8eDale Johannesen /// function arguments in the caller parameter area. This is the actual 28828d08fdb9f6572cafd5aae95c7caffa3cd136d8eDale Johannesen /// alignment, not its logarithm. 28928d08fdb9f6572cafd5aae95c7caffa3cd136d8eDale Johannesen unsigned getByValTypeAlignment(const Type *Ty) const; 29028d08fdb9f6572cafd5aae95c7caffa3cd136d8eDale Johannesen 29148884cd80b52be1528618f2e9b3425ac24e7b5caChris Lattner /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops 29248884cd80b52be1528618f2e9b3425ac24e7b5caChris Lattner /// vector. If it is invalid, don't add anything to Ops. 29348884cd80b52be1528618f2e9b3425ac24e7b5caChris Lattner virtual void LowerAsmOperandForConstraint(SDOperand Op, 29448884cd80b52be1528618f2e9b3425ac24e7b5caChris Lattner char ConstraintLetter, 29548884cd80b52be1528618f2e9b3425ac24e7b5caChris Lattner std::vector<SDOperand> &Ops, 29648884cd80b52be1528618f2e9b3425ac24e7b5caChris Lattner SelectionDAG &DAG); 29748884cd80b52be1528618f2e9b3425ac24e7b5caChris Lattner 298c9addb74883fef318140272768422656a694341fChris Lattner /// isLegalAddressingMode - Return true if the addressing mode represented 299c9addb74883fef318140272768422656a694341fChris Lattner /// by AM is legal for this target, for a load/store of the specified type. 300c9addb74883fef318140272768422656a694341fChris Lattner virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty)const; 301c9addb74883fef318140272768422656a694341fChris Lattner 302c4c6257c1a154279bf10e9498d46d6c1793dbaa7Evan Cheng /// isLegalAddressImmediate - Return true if the integer value can be used 303861939152debbaa15a55a196a4321837c7bc379dEvan Cheng /// as the offset of the target addressing mode for load / store of the 304861939152debbaa15a55a196a4321837c7bc379dEvan Cheng /// given type. 305861939152debbaa15a55a196a4321837c7bc379dEvan Cheng virtual bool isLegalAddressImmediate(int64_t V, const Type *Ty) const; 306861939152debbaa15a55a196a4321837c7bc379dEvan Cheng 307861939152debbaa15a55a196a4321837c7bc379dEvan Cheng /// isLegalAddressImmediate - Return true if the GlobalValue can be used as 308861939152debbaa15a55a196a4321837c7bc379dEvan Cheng /// the offset of the target addressing mode. 309861939152debbaa15a55a196a4321837c7bc379dEvan Cheng virtual bool isLegalAddressImmediate(GlobalValue *GV) const; 31043c6e7cd9b0d9a3b0006650ddfac256848f10d51Nicolas Geoffray 31154fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng private: 31254fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng /// PPCAtomicLabelIndex - Keep track the number of PPC atomic labels. 31354fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng /// 31454fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng unsigned PPCAtomicLabelIndex; 31554fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng 3163fc027df4fca0355717515abb4d6e3753e6dee2aChris Lattner SDOperand LowerRETURNADDR(SDOperand Op, SelectionDAG &DAG); 31743c6e7cd9b0d9a3b0006650ddfac256848f10d51Nicolas Geoffray SDOperand LowerFRAMEADDR(SDOperand Op, SelectionDAG &DAG); 3185b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG); 3195b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG); 3205b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerGlobalTLSAddress(SDOperand Op, SelectionDAG &DAG); 3215b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerJumpTable(SDOperand Op, SelectionDAG &DAG); 3225b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerSETCC(SDOperand Op, SelectionDAG &DAG); 3235b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerVASTART(SDOperand Op, SelectionDAG &DAG, 3245b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen int VarArgsFrameIndex, int VarArgsStackOffset, 3255b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen unsigned VarArgsNumGPR, unsigned VarArgsNumFPR, 3265b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen const PPCSubtarget &Subtarget); 3275b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerVAARG(SDOperand Op, SelectionDAG &DAG, int VarArgsFrameIndex, 3285b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen int VarArgsStackOffset, unsigned VarArgsNumGPR, 3295b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen unsigned VarArgsNumFPR, const PPCSubtarget &Subtarget); 3305b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG, 3315b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen int &VarArgsFrameIndex, 3325b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen int &VarArgsStackOffset, 3335b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen unsigned &VarArgsNumGPR, 3345b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen unsigned &VarArgsNumFPR, 3355b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen const PPCSubtarget &Subtarget); 3365b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG, 3377925ed05d0245aca0b0b2ea8d8a0b35b77c5ebd4Dan Gohman const PPCSubtarget &Subtarget, TargetMachine &TM); 3385b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG, TargetMachine &TM); 3395b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerSTACKRESTORE(SDOperand Op, SelectionDAG &DAG, 3405b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen const PPCSubtarget &Subtarget); 3415b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerDYNAMIC_STACKALLOC(SDOperand Op, SelectionDAG &DAG, 3425b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen const PPCSubtarget &Subtarget); 3435b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerSELECT_CC(SDOperand Op, SelectionDAG &DAG); 34454fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng SDOperand LowerAtomicLAS(SDOperand Op, SelectionDAG &DAG); 34554fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng SDOperand LowerAtomicLCS(SDOperand Op, SelectionDAG &DAG); 34654fc97dcdc0ab747f49bd09c5a877bfd2a00e364Evan Cheng SDOperand LowerAtomicSWAP(SDOperand Op, SelectionDAG &DAG); 3475b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerFP_TO_SINT(SDOperand Op, SelectionDAG &DAG); 3485b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG); 3495b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerFP_ROUND_INREG(SDOperand Op, SelectionDAG &DAG); 3505b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerFLT_ROUNDS_(SDOperand Op, SelectionDAG &DAG); 3515b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerSHL_PARTS(SDOperand Op, SelectionDAG &DAG); 3525b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerSRL_PARTS(SDOperand Op, SelectionDAG &DAG); 3535b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerSRA_PARTS(SDOperand Op, SelectionDAG &DAG); 3545b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG); 3555b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerVECTOR_SHUFFLE(SDOperand Op, SelectionDAG &DAG); 3565b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerINTRINSIC_WO_CHAIN(SDOperand Op, SelectionDAG &DAG); 3575b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerSCALAR_TO_VECTOR(SDOperand Op, SelectionDAG &DAG); 3585b3b695c2f1e11b6f5e0c89e1644211a92edab49Dale Johannesen SDOperand LowerMUL(SDOperand Op, SelectionDAG &DAG); 3597c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner }; 3607c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner} 3617c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner 3627c5a3d390a463fb50a6eee7ae3174817925e6d28Chris Lattner#endif // LLVM_TARGET_POWERPC_PPC32ISELLOWERING_H 363