PPCInstrInfo.cpp revision 09fdc7baae1b6905fe18df48e2278e74d4e39ccd
131d157ae1ac2cd9c787dc3c1d28e64c682803844Jia Liu//===-- PPCInstrInfo.cpp - PowerPC Instruction Information ----------------===// 2b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 3f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// The LLVM Compiler Infrastructure 4f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 8f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 9f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 10f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file contains the PowerPC implementation of the TargetInstrInfo class. 11f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 12f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 13f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 1416e71f2f70811c69c56052dd146324fe20e31db5Chris Lattner#include "PPCInstrInfo.h" 1559ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "PPC.h" 16f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson#include "PPCInstrBuilder.h" 177194aaf738a1b89441635340403f1c5b06ae18efBill Wendling#include "PPCMachineFunctionInfo.h" 18b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner#include "PPCTargetMachine.h" 192da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick#include "PPCHazardRecognizers.h" 2094b9550a32d189704a8eae55505edf62662c0534Evan Cheng#include "MCTargetDesc/PPCPredicates.h" 217a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen#include "llvm/CodeGen/MachineFrameInfo.h" 22f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/CodeGen/MachineInstrBuilder.h" 237a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen#include "llvm/CodeGen/MachineMemOperand.h" 24243296690ec78fc918762bd73896b09e26537f47Jakob Stoklund Olesen#include "llvm/CodeGen/MachineRegisterInfo.h" 254d989ac93ce608057fb6b13a4068264ab037ecd5Hal Finkel#include "llvm/CodeGen/PseudoSourceValue.h" 2659ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "llvm/MC/MCAsmInfo.h" 27880d0f6018b6928bdcad291be60c801238619955Bill Wendling#include "llvm/Support/CommandLine.h" 28dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin#include "llvm/Support/ErrorHandling.h" 293e74d6fdd248e20a280f1dff3da9a6c689c2c4c3Evan Cheng#include "llvm/Support/TargetRegistry.h" 30dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin#include "llvm/Support/raw_ostream.h" 3159ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "llvm/ADT/STLExtras.h" 32f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 334db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng#define GET_INSTRINFO_CTOR 3422fee2dff4c43b551aefa44a96ca74fcade6bfacEvan Cheng#include "PPCGenInstrInfo.inc" 3522fee2dff4c43b551aefa44a96ca74fcade6bfacEvan Cheng 3682bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohmannamespace llvm { 373fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkelextern cl::opt<bool> DisablePPC32RS; 383fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkelextern cl::opt<bool> DisablePPC64RS; 3982bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohman} 4082bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohman 4182bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohmanusing namespace llvm; 42880d0f6018b6928bdcad291be60c801238619955Bill Wendling 4309fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkelstatic cl:: 4409fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkelopt<bool> EnableCTRLoopAnal("enable-ppc-ctrloop-analysis", cl::Hidden, 4509fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel cl::desc("Enable analysis for CTR loops (experimental)")); 4609fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel 47b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris LattnerPPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm) 484db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng : PPCGenInstrInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP), 49d5b03f252c0db6b49a242abab63d7c5a260fceaeEvan Cheng TM(tm), RI(*TM.getSubtargetImpl(), *this) {} 50b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner 512da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick/// CreateTargetHazardRecognizer - Return the hazard recognizer to use for 522da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick/// this target when scheduling the DAG. 532da8bc8a5f7705ac131184cd247f48500da0d74eAndrew TrickScheduleHazardRecognizer *PPCInstrInfo::CreateTargetHazardRecognizer( 542da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick const TargetMachine *TM, 552da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick const ScheduleDAG *DAG) const { 56c6d08f10bf797cc78068ef30bd0e8812a5bdc9a2Hal Finkel unsigned Directive = TM->getSubtarget<PPCSubtarget>().getDarwinDirective(); 574d989ac93ce608057fb6b13a4068264ab037ecd5Hal Finkel if (Directive == PPC::DIR_440 || Directive == PPC::DIR_A2) { 58768c65f677af3f05c2e94982043f90a1bfaceda5Hal Finkel const InstrItineraryData *II = TM->getInstrItineraryData(); 595b00ceaeeabff8c25abb09926343c3fcb06053d8Hal Finkel return new PPCScoreboardHazardRecognizer(II, DAG); 60c6d08f10bf797cc78068ef30bd0e8812a5bdc9a2Hal Finkel } 6164c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel 6264c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel return TargetInstrInfoImpl::CreateTargetHazardRecognizer(TM, DAG); 632da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick} 642da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick 6564c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel/// CreateTargetPostRAHazardRecognizer - Return the postRA hazard recognizer 6664c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel/// to use for this target when scheduling the DAG. 6764c34e253563a8ba6b41fbce2bb020632cf65961Hal FinkelScheduleHazardRecognizer *PPCInstrInfo::CreateTargetPostRAHazardRecognizer( 6864c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel const InstrItineraryData *II, 6964c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel const ScheduleDAG *DAG) const { 7064c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel unsigned Directive = TM.getSubtarget<PPCSubtarget>().getDarwinDirective(); 7164c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel 7264c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel // Most subtargets use a PPC970 recognizer. 734d989ac93ce608057fb6b13a4068264ab037ecd5Hal Finkel if (Directive != PPC::DIR_440 && Directive != PPC::DIR_A2) { 7464c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel const TargetInstrInfo *TII = TM.getInstrInfo(); 7564c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel assert(TII && "No InstrInfo?"); 7664c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel 7764c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel return new PPCHazardRecognizer970(*TII); 7864c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel } 7964c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel 804d989ac93ce608057fb6b13a4068264ab037ecd5Hal Finkel return new PPCScoreboardHazardRecognizer(II, DAG); 8164c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel} 826e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trickunsigned PPCInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, 839c09c9ec9dab61450800b42cbf746164aa076b88Chris Lattner int &FrameIndex) const { 84408396014742a05cad1c91949d2226169e3f9d80Chris Lattner switch (MI->getOpcode()) { 85408396014742a05cad1c91949d2226169e3f9d80Chris Lattner default: break; 86408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LD: 87408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LWZ: 88408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFS: 89408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFD: 90d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 91d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(2).isFI()) { 928aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(2).getIndex(); 93408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return MI->getOperand(0).getReg(); 94408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 95408396014742a05cad1c91949d2226169e3f9d80Chris Lattner break; 96408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 97408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return 0; 986524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 99408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 1006e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trickunsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr *MI, 1016524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner int &FrameIndex) const { 1026524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner switch (MI->getOpcode()) { 1036524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner default: break; 1043b478b31e297208ef2c9f74750a8a603eb3726fbNate Begeman case PPC::STD: 1056524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STW: 1066524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFS: 1076524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFD: 108d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 109d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(2).isFI()) { 1108aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(2).getIndex(); 1116524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return MI->getOperand(0).getReg(); 1126524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 1136524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner break; 1146524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 1156524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return 0; 1166524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 117408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 118043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// commuteInstruction - We can commute rlwimi instructions, but only if the 119043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// rotate amt is zero. We also have to munge the immediates a bit. 12058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengMachineInstr * 12158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengPPCInstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const { 1228e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MI->getParent()->getParent(); 1238e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 124043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Normal instructions can be commuted the obvious way. 125043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner if (MI->getOpcode() != PPC::RLWIMI) 12658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng return TargetInstrInfoImpl::commuteInstruction(MI, NewMI); 1276e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 128043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Cannot commute if it has a non-zero rotate count. 1299a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner if (MI->getOperand(3).getImm() != 0) 130043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return 0; 1316e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 132043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // If we have a zero rotate count, we have: 133043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask(MB,ME) 134043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op1 & ~M) | (Op2 & M) 135043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Change this to: 136043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask((ME+1)&31, (MB-1)&31) 137043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op2 & ~M) | (Op1 & M) 138043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 139043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap op1/op2 140a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng unsigned Reg0 = MI->getOperand(0).getReg(); 141043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg1 = MI->getOperand(1).getReg(); 142043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg2 = MI->getOperand(2).getReg(); 1436ce7dc2a97260eea5fba414332796464912b9359Evan Cheng bool Reg1IsKill = MI->getOperand(1).isKill(); 1446ce7dc2a97260eea5fba414332796464912b9359Evan Cheng bool Reg2IsKill = MI->getOperand(2).isKill(); 14558dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool ChangeReg0 = false; 146a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // If machine instrs are no longer in two-address forms, update 147a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // destination register as well. 148a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng if (Reg0 == Reg1) { 149a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // Must be two address instruction! 150e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng assert(MI->getDesc().getOperandConstraint(0, MCOI::TIED_TO) && 151a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng "Expecting a two-address instruction!"); 152a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng Reg2IsKill = false; 15358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng ChangeReg0 = true; 15458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng } 15558dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 15658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Masks. 15758dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned MB = MI->getOperand(4).getImm(); 15858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned ME = MI->getOperand(5).getImm(); 15958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 16058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (NewMI) { 16158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Create a new instruction. 16258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg(); 16358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool Reg0IsDead = MI->getOperand(0).isDead(); 164d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling return BuildMI(MF, MI->getDebugLoc(), MI->getDesc()) 165587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) 166587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg2, getKillRegState(Reg2IsKill)) 167587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg1, getKillRegState(Reg1IsKill)) 16858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addImm((ME+1) & 31) 16958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addImm((MB-1) & 31); 170a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng } 17158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 17258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (ChangeReg0) 17358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng MI->getOperand(0).setReg(Reg2); 174e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(2).setReg(Reg1); 175e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(1).setReg(Reg2); 176f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner MI->getOperand(2).setIsKill(Reg1IsKill); 177f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner MI->getOperand(1).setIsKill(Reg2IsKill); 1786e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 179043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap the mask around. 1809a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(4).setImm((ME+1) & 31); 1819a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(5).setImm((MB-1) & 31); 182043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return MI; 183043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner} 184bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner 1856e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trickvoid PPCInstrInfo::insertNoop(MachineBasicBlock &MBB, 186bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner MachineBasicBlock::iterator MI) const { 187c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc DL; 188d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, MI, DL, get(PPC::NOP)); 189bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner} 190c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 191c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 192c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner// Branch analysis. 19399f823f94374917174f96a7689955b8463db6816Hal Finkel// Note: If the condition register is set to CTR or CTR8 then this is a 19499f823f94374917174f96a7689955b8463db6816Hal Finkel// BDNZ (imm == 1) or BDZ (imm == 0) branch. 195c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, 196c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock *&FBB, 197dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng SmallVectorImpl<MachineOperand> &Cond, 198dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng bool AllowModify) const { 19999f823f94374917174f96a7689955b8463db6816Hal Finkel bool isPPC64 = TM.getSubtargetImpl()->isPPC64(); 20099f823f94374917174f96a7689955b8463db6816Hal Finkel 201c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If the block has no terminators, it just falls into the block after it. 202c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 20393d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (I == MBB.begin()) 20493d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen return false; 20593d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen --I; 20693d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen while (I->isDebugValue()) { 20793d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (I == MBB.begin()) 20893d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen return false; 20993d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen --I; 21093d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen } 21193d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (!isUnpredicatedTerminator(I)) 212c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 213c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 214c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the last instruction in the block. 215c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *LastInst = I; 2166e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 217c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there is only one terminator instruction, process it. 218bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) { 219c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (LastInst->getOpcode() == PPC::B) { 22082ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!LastInst->getOperand(0).isMBB()) 22182ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 2228aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = LastInst->getOperand(0).getMBB(); 223c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 224289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner } else if (LastInst->getOpcode() == PPC::BCC) { 22582ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!LastInst->getOperand(2).isMBB()) 22682ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 227c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Block ends with fall-through condbranch. 2288aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = LastInst->getOperand(2).getMBB(); 229c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(0)); 230c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(1)); 2317c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner return false; 23299f823f94374917174f96a7689955b8463db6816Hal Finkel } else if (LastInst->getOpcode() == PPC::BDNZ8 || 23399f823f94374917174f96a7689955b8463db6816Hal Finkel LastInst->getOpcode() == PPC::BDNZ) { 23499f823f94374917174f96a7689955b8463db6816Hal Finkel if (!LastInst->getOperand(0).isMBB()) 23599f823f94374917174f96a7689955b8463db6816Hal Finkel return true; 23609fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel if (!EnableCTRLoopAnal) 23709fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel return true; 23899f823f94374917174f96a7689955b8463db6816Hal Finkel TBB = LastInst->getOperand(0).getMBB(); 23999f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateImm(1)); 24099f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, 24199f823f94374917174f96a7689955b8463db6816Hal Finkel true)); 24299f823f94374917174f96a7689955b8463db6816Hal Finkel return false; 24399f823f94374917174f96a7689955b8463db6816Hal Finkel } else if (LastInst->getOpcode() == PPC::BDZ8 || 24499f823f94374917174f96a7689955b8463db6816Hal Finkel LastInst->getOpcode() == PPC::BDZ) { 24599f823f94374917174f96a7689955b8463db6816Hal Finkel if (!LastInst->getOperand(0).isMBB()) 24699f823f94374917174f96a7689955b8463db6816Hal Finkel return true; 24709fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel if (!EnableCTRLoopAnal) 24809fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel return true; 24999f823f94374917174f96a7689955b8463db6816Hal Finkel TBB = LastInst->getOperand(0).getMBB(); 25099f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateImm(0)); 25199f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, 25299f823f94374917174f96a7689955b8463db6816Hal Finkel true)); 25399f823f94374917174f96a7689955b8463db6816Hal Finkel return false; 254c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 25599f823f94374917174f96a7689955b8463db6816Hal Finkel 256c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, don't know what this is. 257c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 258c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 2596e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 260c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the instruction before it if it's a terminator. 261c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *SecondLastInst = I; 262c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 263c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there are three terminators, we don't know what sort of block this is. 264c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (SecondLastInst && I != MBB.begin() && 265bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng isUnpredicatedTerminator(--I)) 266c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 2676e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 268289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner // If the block ends with PPC::B and PPC:BCC, handle it. 2696e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick if (SecondLastInst->getOpcode() == PPC::BCC && 270c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner LastInst->getOpcode() == PPC::B) { 27182ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!SecondLastInst->getOperand(2).isMBB() || 27282ae933e55839713ea039e7c6353483b14dc5724Evan Cheng !LastInst->getOperand(0).isMBB()) 27382ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 2748aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = SecondLastInst->getOperand(2).getMBB(); 275c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(0)); 276c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(1)); 2778aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FBB = LastInst->getOperand(0).getMBB(); 278c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 27999f823f94374917174f96a7689955b8463db6816Hal Finkel } else if ((SecondLastInst->getOpcode() == PPC::BDNZ8 || 28099f823f94374917174f96a7689955b8463db6816Hal Finkel SecondLastInst->getOpcode() == PPC::BDNZ) && 28199f823f94374917174f96a7689955b8463db6816Hal Finkel LastInst->getOpcode() == PPC::B) { 28299f823f94374917174f96a7689955b8463db6816Hal Finkel if (!SecondLastInst->getOperand(0).isMBB() || 28399f823f94374917174f96a7689955b8463db6816Hal Finkel !LastInst->getOperand(0).isMBB()) 28499f823f94374917174f96a7689955b8463db6816Hal Finkel return true; 28509fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel if (!EnableCTRLoopAnal) 28609fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel return true; 28799f823f94374917174f96a7689955b8463db6816Hal Finkel TBB = SecondLastInst->getOperand(0).getMBB(); 28899f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateImm(1)); 28999f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, 29099f823f94374917174f96a7689955b8463db6816Hal Finkel true)); 29199f823f94374917174f96a7689955b8463db6816Hal Finkel FBB = LastInst->getOperand(0).getMBB(); 29299f823f94374917174f96a7689955b8463db6816Hal Finkel return false; 29399f823f94374917174f96a7689955b8463db6816Hal Finkel } else if ((SecondLastInst->getOpcode() == PPC::BDZ8 || 29499f823f94374917174f96a7689955b8463db6816Hal Finkel SecondLastInst->getOpcode() == PPC::BDZ) && 29599f823f94374917174f96a7689955b8463db6816Hal Finkel LastInst->getOpcode() == PPC::B) { 29699f823f94374917174f96a7689955b8463db6816Hal Finkel if (!SecondLastInst->getOperand(0).isMBB() || 29799f823f94374917174f96a7689955b8463db6816Hal Finkel !LastInst->getOperand(0).isMBB()) 29899f823f94374917174f96a7689955b8463db6816Hal Finkel return true; 29909fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel if (!EnableCTRLoopAnal) 30009fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel return true; 30199f823f94374917174f96a7689955b8463db6816Hal Finkel TBB = SecondLastInst->getOperand(0).getMBB(); 30299f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateImm(0)); 30399f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, 30499f823f94374917174f96a7689955b8463db6816Hal Finkel true)); 30599f823f94374917174f96a7689955b8463db6816Hal Finkel FBB = LastInst->getOperand(0).getMBB(); 30699f823f94374917174f96a7689955b8463db6816Hal Finkel return false; 307c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 3086e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 30913e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen // If the block ends with two PPC:Bs, handle it. The second one is not 31013e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen // executed, so remove it. 3116e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick if (SecondLastInst->getOpcode() == PPC::B && 31213e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen LastInst->getOpcode() == PPC::B) { 31382ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!SecondLastInst->getOperand(0).isMBB()) 31482ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 3158aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = SecondLastInst->getOperand(0).getMBB(); 31613e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen I = LastInst; 317dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng if (AllowModify) 318dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng I->eraseFromParent(); 31913e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen return false; 32013e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen } 32113e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen 322c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, can't handle this. 323c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 324c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 325c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 326b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Chengunsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { 327c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 328b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng if (I == MBB.begin()) return 0; 329c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 33093d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen while (I->isDebugValue()) { 33193d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (I == MBB.begin()) 33293d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen return 0; 33393d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen --I; 33493d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen } 33599f823f94374917174f96a7689955b8463db6816Hal Finkel if (I->getOpcode() != PPC::B && I->getOpcode() != PPC::BCC && 33699f823f94374917174f96a7689955b8463db6816Hal Finkel I->getOpcode() != PPC::BDNZ8 && I->getOpcode() != PPC::BDNZ && 33799f823f94374917174f96a7689955b8463db6816Hal Finkel I->getOpcode() != PPC::BDZ8 && I->getOpcode() != PPC::BDZ) 338b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 0; 3396e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 340c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 341c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 3426e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 343c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I = MBB.end(); 344c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 345b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng if (I == MBB.begin()) return 1; 346c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 34799f823f94374917174f96a7689955b8463db6816Hal Finkel if (I->getOpcode() != PPC::BCC && 34899f823f94374917174f96a7689955b8463db6816Hal Finkel I->getOpcode() != PPC::BDNZ8 && I->getOpcode() != PPC::BDNZ && 34999f823f94374917174f96a7689955b8463db6816Hal Finkel I->getOpcode() != PPC::BDZ8 && I->getOpcode() != PPC::BDZ) 350b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 1; 3516e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 352c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 353c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 354b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 2; 355c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 356c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 357b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Chengunsigned 358b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan ChengPPCInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 359b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng MachineBasicBlock *FBB, 3603bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings const SmallVectorImpl<MachineOperand> &Cond, 3613bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings DebugLoc DL) const { 3622dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner // Shouldn't be a fall through. 3632dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner assert(TBB && "InsertBranch must not be told to insert a fallthrough"); 3646e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick assert((Cond.size() == 2 || Cond.size() == 0) && 36554108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner "PPC branch conditions have two components!"); 3666e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 36799f823f94374917174f96a7689955b8463db6816Hal Finkel bool isPPC64 = TM.getSubtargetImpl()->isPPC64(); 36899f823f94374917174f96a7689955b8463db6816Hal Finkel 36954108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner // One-way branch. 3702dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner if (FBB == 0) { 37154108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner if (Cond.empty()) // Unconditional branch 3723bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings BuildMI(&MBB, DL, get(PPC::B)).addMBB(TBB); 37399f823f94374917174f96a7689955b8463db6816Hal Finkel else if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8) 37499f823f94374917174f96a7689955b8463db6816Hal Finkel BuildMI(&MBB, DL, get(Cond[0].getImm() ? 37599f823f94374917174f96a7689955b8463db6816Hal Finkel (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : 37699f823f94374917174f96a7689955b8463db6816Hal Finkel (isPPC64 ? PPC::BDZ8 : PPC::BDZ))).addMBB(TBB); 37754108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner else // Conditional branch 3783bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings BuildMI(&MBB, DL, get(PPC::BCC)) 37918258c640466274c26e89016e361ec411ff78520Chris Lattner .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 380b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 1; 3812dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner } 3826e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 383879d09cf130f3760a08865913c04d9ff328fad5fChris Lattner // Two-way Conditional Branch. 38499f823f94374917174f96a7689955b8463db6816Hal Finkel if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8) 38599f823f94374917174f96a7689955b8463db6816Hal Finkel BuildMI(&MBB, DL, get(Cond[0].getImm() ? 38699f823f94374917174f96a7689955b8463db6816Hal Finkel (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : 38799f823f94374917174f96a7689955b8463db6816Hal Finkel (isPPC64 ? PPC::BDZ8 : PPC::BDZ))).addMBB(TBB); 38899f823f94374917174f96a7689955b8463db6816Hal Finkel else 38999f823f94374917174f96a7689955b8463db6816Hal Finkel BuildMI(&MBB, DL, get(PPC::BCC)) 39099f823f94374917174f96a7689955b8463db6816Hal Finkel .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 3913bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings BuildMI(&MBB, DL, get(PPC::B)).addMBB(FBB); 392b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 2; 393c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 394c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 39527689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesenvoid PPCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, 39627689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen MachineBasicBlock::iterator I, DebugLoc DL, 39727689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen unsigned DestReg, unsigned SrcReg, 39827689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen bool KillSrc) const { 39927689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen unsigned Opc; 40027689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen if (PPC::GPRCRegClass.contains(DestReg, SrcReg)) 40127689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::OR; 40227689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::G8RCRegClass.contains(DestReg, SrcReg)) 40327689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::OR8; 40427689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::F4RCRegClass.contains(DestReg, SrcReg)) 40527689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::FMR; 40627689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::CRRCRegClass.contains(DestReg, SrcReg)) 40727689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::MCRF; 40827689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::VRRCRegClass.contains(DestReg, SrcReg)) 40927689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::VOR; 41027689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::CRBITRCRegClass.contains(DestReg, SrcReg)) 41127689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::CROR; 41227689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else 41327689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen llvm_unreachable("Impossible reg-to-reg copy"); 414d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 415e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc &MCID = get(Opc); 416e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng if (MCID.getNumOperands() == 3) 417e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng BuildMI(MBB, I, DL, MCID, DestReg) 41827689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen .addReg(SrcReg).addReg(SrcReg, getKillRegState(KillSrc)); 41927689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else 420e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng BuildMI(MBB, I, DL, MCID, DestReg).addReg(SrcReg, getKillRegState(KillSrc)); 421d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson} 422d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 4233fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkel// This function returns true if a CR spill is necessary and false otherwise. 4244a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingbool 4258e5f2c6f65841542e2a7092553fe42a00048e4c7Dan GohmanPPCInstrInfo::StoreRegToStackSlot(MachineFunction &MF, 4268e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman unsigned SrcReg, bool isKill, 4274a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling int FrameIdx, 4284a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling const TargetRegisterClass *RC, 4294a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling SmallVectorImpl<MachineInstr*> &NewMIs) const{ 430c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc DL; 431c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper if (PPC::GPRCRegClass.hasSubClassEq(RC)) { 432f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (SrcReg != PPC::LR) { 43321b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) 434587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 435587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 4364a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling FrameIdx)); 437f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 438f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: this spills LR immediately to memory in one step. To do this, 439f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // we use R11, which we know cannot be used in the prolog/epilog. This is 440f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // a hack. 44121b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFLR), PPC::R11)); 44221b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) 443587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R11, 444587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 4454a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling FrameIdx)); 446f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 447c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::G8RCRegClass.hasSubClassEq(RC)) { 448f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (SrcReg != PPC::LR8) { 44921b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STD)) 450587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 451587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 452587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 453f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 454f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: this spills LR immediately to memory in one step. To do this, 4557ad6b7d35978e1bb89de90aa732cf2f57377d69dHal Finkel // we use X11, which we know cannot be used in the prolog/epilog. This is 456f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // a hack. 45721b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFLR8), PPC::X11)); 45821b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STD)) 459587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::X11, 460587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 461587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 462f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 463c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::F8RCRegClass.hasSubClassEq(RC)) { 46421b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFD)) 465587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 466587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 467587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 468c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::F4RCRegClass.hasSubClassEq(RC)) { 46921b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFS)) 470587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 471587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 472587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 473c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::CRRCRegClass.hasSubClassEq(RC)) { 4743fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkel if ((!DisablePPC32RS && !TM.getSubtargetImpl()->isPPC64()) || 4753fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkel (!DisablePPC64RS && TM.getSubtargetImpl()->isPPC64())) { 47621b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::SPILL_CR)) 477587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 478587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 47971a2cb25ebc818383dd0f80475bc166f834e8d99Chris Lattner FrameIdx)); 4807194aaf738a1b89441635340403f1c5b06ae18efBill Wendling return true; 4817194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } else { 482c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // FIXME: We need a scatch reg here. The trouble with using R0 is that 483c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // it's possible for the stack frame to be so big the save location is 484c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // out of range of immediate offsets, necessitating another register. 485c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // We hack this on Darwin by reserving R2. It's probably broken on Linux 486c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // at the moment. 487c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen 488234bb38d6c421ea22229087a9835afe99e531276Hal Finkel bool is64Bit = TM.getSubtargetImpl()->isPPC64(); 489c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // We need to store the CR in the low 4-bits of the saved value. First, 490c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // issue a MFCR to save all of the CRBits. 4916e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick unsigned ScratchReg = TM.getSubtargetImpl()->isDarwinABI() ? 492234bb38d6c421ea22229087a9835afe99e531276Hal Finkel (is64Bit ? PPC::X2 : PPC::R2) : 493234bb38d6c421ea22229087a9835afe99e531276Hal Finkel (is64Bit ? PPC::X0 : PPC::R0); 494234bb38d6c421ea22229087a9835afe99e531276Hal Finkel NewMIs.push_back(BuildMI(MF, DL, get(is64Bit ? PPC::MFCR8pseud : 495234bb38d6c421ea22229087a9835afe99e531276Hal Finkel PPC::MFCRpseud), ScratchReg) 4965f07d5224ddc32f405d7e19de8e58e91ab2816bcDale Johannesen .addReg(SrcReg, getKillRegState(isKill))); 4976e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 4987194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // If the saved register wasn't CR0, shift the bits left so that they are 4997194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // in CR0's slot. 5007194aaf738a1b89441635340403f1c5b06ae18efBill Wendling if (SrcReg != PPC::CR0) { 501966aeb5788c242cfaca35c56c0ddc0ff778d4376Evan Cheng unsigned ShiftBits = getPPCRegisterNumbering(SrcReg)*4; 502c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // rlwinm scratch, scratch, ShiftBits, 0, 31. 503234bb38d6c421ea22229087a9835afe99e531276Hal Finkel NewMIs.push_back(BuildMI(MF, DL, get(is64Bit ? PPC::RLWINM8 : 504234bb38d6c421ea22229087a9835afe99e531276Hal Finkel PPC::RLWINM), ScratchReg) 505c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addReg(ScratchReg).addImm(ShiftBits) 506c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addImm(0).addImm(31)); 5077194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 5086e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 509234bb38d6c421ea22229087a9835afe99e531276Hal Finkel NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(is64Bit ? 510234bb38d6c421ea22229087a9835afe99e531276Hal Finkel PPC::STW8 : PPC::STW)) 511c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addReg(ScratchReg, 512587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 5137194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FrameIdx)); 5147194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 515c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::CRBITRCRegClass.hasSubClassEq(RC)) { 5160404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // FIXME: We use CRi here because there is no mtcrf on a bit. Since the 5170404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // backend currently only uses CR1EQ as an individual bit, this should 5180404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // not cause any bug. If we need other uses of CR bits, the following 5190404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // code may be invalid. 5209348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray unsigned Reg = 0; 5216a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller if (SrcReg == PPC::CR0LT || SrcReg == PPC::CR0GT || 5226a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR0EQ || SrcReg == PPC::CR0UN) 5239348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR0; 5246a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR1LT || SrcReg == PPC::CR1GT || 5256a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR1EQ || SrcReg == PPC::CR1UN) 5269348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR1; 5276a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR2LT || SrcReg == PPC::CR2GT || 5286a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR2EQ || SrcReg == PPC::CR2UN) 5299348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR2; 5306a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR3LT || SrcReg == PPC::CR3GT || 5316a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR3EQ || SrcReg == PPC::CR3UN) 5329348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR3; 5336a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR4LT || SrcReg == PPC::CR4GT || 5346a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR4EQ || SrcReg == PPC::CR4UN) 5359348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR4; 5366a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR5LT || SrcReg == PPC::CR5GT || 5376a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR5EQ || SrcReg == PPC::CR5UN) 5389348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR5; 5396a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR6LT || SrcReg == PPC::CR6GT || 5406a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR6EQ || SrcReg == PPC::CR6UN) 5419348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR6; 5426a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR7LT || SrcReg == PPC::CR7GT || 5436a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR7EQ || SrcReg == PPC::CR7UN) 5449348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR7; 5459348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 5466e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick return StoreRegToStackSlot(MF, Reg, isKill, FrameIdx, 547c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper &PPC::CRRCRegClass, NewMIs); 5489348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 549c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::VRRCRegClass.hasSubClassEq(RC)) { 550f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // We don't have indexed addressing for vector loads. Emit: 551f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // R0 = ADDI FI# 552f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // STVX VAL, 0, R0 5536e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick // 554f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 55521b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::ADDI), PPC::R0), 556f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx, 0, 0)); 55721b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::STVX)) 558587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, getKillRegState(isKill)) 559587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R0) 560587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R0)); 561f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 562c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("Unknown regclass!"); 563f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 5647194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 5657194aaf738a1b89441635340403f1c5b06ae18efBill Wendling return false; 566f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 567f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 568f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid 569f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonPPCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, 5707194aaf738a1b89441635340403f1c5b06ae18efBill Wendling MachineBasicBlock::iterator MI, 5717194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned SrcReg, bool isKill, int FrameIdx, 572746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterClass *RC, 573746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterInfo *TRI) const { 5748e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MBB.getParent(); 575f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVector<MachineInstr*, 4> NewMIs; 5767194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 5778e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman if (StoreRegToStackSlot(MF, SrcReg, isKill, FrameIdx, RC, NewMIs)) { 5788e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); 5797194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FuncInfo->setSpillsCR(); 5807194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 5817194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 582f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) 583f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MBB.insert(MI, NewMIs[i]); 5847a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen 5857a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen const MachineFrameInfo &MFI = *MF.getFrameInfo(); 5867a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MachineMemOperand *MMO = 587978e0dfe46e481bfb1281e683aa308329e879e95Jay Foad MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIdx), 58859db5496f4fc2ef6111569e542f8b65480ef14c1Chris Lattner MachineMemOperand::MOStore, 5897a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectSize(FrameIdx), 5907a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectAlignment(FrameIdx)); 5917a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen NewMIs.back()->addMemOperand(MF, MMO); 592f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 593f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 594d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkelbool 595d1c321a89ab999b9bb602b0f398ecd4c2022262cBill WendlingPPCInstrInfo::LoadRegFromStackSlot(MachineFunction &MF, DebugLoc DL, 5968e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman unsigned DestReg, int FrameIdx, 5974a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling const TargetRegisterClass *RC, 5984a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling SmallVectorImpl<MachineInstr*> &NewMIs)const{ 599c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper if (PPC::GPRCRegClass.hasSubClassEq(RC)) { 600f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::LR) { 601d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), 602d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling DestReg), FrameIdx)); 603f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 604d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), 605d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling PPC::R11), FrameIdx)); 606d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::MTLR)).addReg(PPC::R11)); 607f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 608c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::G8RCRegClass.hasSubClassEq(RC)) { 609f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::LR8) { 610d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LD), DestReg), 611f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 612f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 613d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LD), 6147ad6b7d35978e1bb89de90aa732cf2f57377d69dHal Finkel PPC::X11), FrameIdx)); 6157ad6b7d35978e1bb89de90aa732cf2f57377d69dHal Finkel NewMIs.push_back(BuildMI(MF, DL, get(PPC::MTLR8)).addReg(PPC::X11)); 616f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 617c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::F8RCRegClass.hasSubClassEq(RC)) { 618d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LFD), DestReg), 619f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 620c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::F4RCRegClass.hasSubClassEq(RC)) { 621d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LFS), DestReg), 622f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 623c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::CRRCRegClass.hasSubClassEq(RC)) { 624d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel if ((!DisablePPC32RS && !TM.getSubtargetImpl()->isPPC64()) || 625d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel (!DisablePPC64RS && TM.getSubtargetImpl()->isPPC64())) { 626d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel NewMIs.push_back(addFrameReference(BuildMI(MF, DL, 627d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel get(PPC::RESTORE_CR), DestReg) 628d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel , FrameIdx)); 629d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel return true; 630d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel } else { 631d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // FIXME: We need a scatch reg here. The trouble with using R0 is that 632d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // it's possible for the stack frame to be so big the save location is 633d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // out of range of immediate offsets, necessitating another register. 634d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // We hack this on Darwin by reserving R2. It's probably broken on Linux 635d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // at the moment. 636d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel unsigned ScratchReg = TM.getSubtargetImpl()->isDarwinABI() ? 637d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel PPC::R2 : PPC::R0; 638d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), 639d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel ScratchReg), FrameIdx)); 640d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel 641d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // If the reloaded register isn't CR0, shift the bits right so that they are 642d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // in the right CR's slot. 643d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel if (DestReg != PPC::CR0) { 644d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel unsigned ShiftBits = getPPCRegisterNumbering(DestReg)*4; 645d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // rlwinm r11, r11, 32-ShiftBits, 0, 31. 646d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel NewMIs.push_back(BuildMI(MF, DL, get(PPC::RLWINM), ScratchReg) 647d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel .addReg(ScratchReg).addImm(32-ShiftBits).addImm(0) 648d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel .addImm(31)); 649d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel } 650d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel 651234bb38d6c421ea22229087a9835afe99e531276Hal Finkel NewMIs.push_back(BuildMI(MF, DL, get(TM.getSubtargetImpl()->isPPC64() ? 652234bb38d6c421ea22229087a9835afe99e531276Hal Finkel PPC::MTCRF8 : PPC::MTCRF), DestReg) 653d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel .addReg(ScratchReg)); 654f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 655c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::CRBITRCRegClass.hasSubClassEq(RC)) { 6566e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 6579348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray unsigned Reg = 0; 6586a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller if (DestReg == PPC::CR0LT || DestReg == PPC::CR0GT || 6596a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR0EQ || DestReg == PPC::CR0UN) 6609348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR0; 6616a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR1LT || DestReg == PPC::CR1GT || 6626a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR1EQ || DestReg == PPC::CR1UN) 6639348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR1; 6646a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR2LT || DestReg == PPC::CR2GT || 6656a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR2EQ || DestReg == PPC::CR2UN) 6669348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR2; 6676a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR3LT || DestReg == PPC::CR3GT || 6686a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR3EQ || DestReg == PPC::CR3UN) 6699348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR3; 6706a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR4LT || DestReg == PPC::CR4GT || 6716a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR4EQ || DestReg == PPC::CR4UN) 6729348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR4; 6736a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR5LT || DestReg == PPC::CR5GT || 6746a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR5EQ || DestReg == PPC::CR5UN) 6759348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR5; 6766a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR6LT || DestReg == PPC::CR6GT || 6776a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR6EQ || DestReg == PPC::CR6UN) 6789348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR6; 6796a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR7LT || DestReg == PPC::CR7GT || 6806a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR7EQ || DestReg == PPC::CR7UN) 6819348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR7; 6829348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 6836e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick return LoadRegFromStackSlot(MF, DL, Reg, FrameIdx, 684c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper &PPC::CRRCRegClass, NewMIs); 6859348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 686c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::VRRCRegClass.hasSubClassEq(RC)) { 687f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // We don't have indexed addressing for vector loads. Emit: 688f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // R0 = ADDI FI# 689f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // Dest = LVX 0, R0 6906e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick // 691f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 692d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::ADDI), PPC::R0), 693f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx, 0, 0)); 694d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::LVX),DestReg).addReg(PPC::R0) 695f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson .addReg(PPC::R0)); 696f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 697c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("Unknown regclass!"); 698f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 699d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel 700d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel return false; 701f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 702f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 703f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid 704f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonPPCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, 7057194aaf738a1b89441635340403f1c5b06ae18efBill Wendling MachineBasicBlock::iterator MI, 7067194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned DestReg, int FrameIdx, 707746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterClass *RC, 708746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterInfo *TRI) const { 7098e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MBB.getParent(); 710f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVector<MachineInstr*, 4> NewMIs; 711c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc DL; 712d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling if (MI != MBB.end()) DL = MI->getDebugLoc(); 713d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel if (LoadRegFromStackSlot(MF, DL, DestReg, FrameIdx, RC, NewMIs)) { 714d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); 715d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel FuncInfo->setSpillsCR(); 716d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel } 717f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) 718f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MBB.insert(MI, NewMIs[i]); 7197a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen 7207a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen const MachineFrameInfo &MFI = *MF.getFrameInfo(); 7217a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MachineMemOperand *MMO = 722978e0dfe46e481bfb1281e683aa308329e879e95Jay Foad MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIdx), 72359db5496f4fc2ef6111569e542f8b65480ef14c1Chris Lattner MachineMemOperand::MOLoad, 7247a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectSize(FrameIdx), 7257a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectAlignment(FrameIdx)); 7267a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen NewMIs.back()->addMemOperand(MF, MMO); 727f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 728f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 7290965217e74fe07f1451350a80114ab566ced5de0Evan ChengMachineInstr* 7300965217e74fe07f1451350a80114ab566ced5de0Evan ChengPPCInstrInfo::emitFrameIndexDebugValue(MachineFunction &MF, 7318601a3d4decff0a380e059b037dabf71075497d3Evan Cheng int FrameIx, uint64_t Offset, 7320965217e74fe07f1451350a80114ab566ced5de0Evan Cheng const MDNode *MDPtr, 7330965217e74fe07f1451350a80114ab566ced5de0Evan Cheng DebugLoc DL) const { 7340965217e74fe07f1451350a80114ab566ced5de0Evan Cheng MachineInstrBuilder MIB = BuildMI(MF, DL, get(PPC::DBG_VALUE)); 7350965217e74fe07f1451350a80114ab566ced5de0Evan Cheng addFrameReference(MIB, FrameIx, 0, false).addImm(Offset).addMetadata(MDPtr); 7360965217e74fe07f1451350a80114ab566ced5de0Evan Cheng return &*MIB; 7370965217e74fe07f1451350a80114ab566ced5de0Evan Cheng} 7380965217e74fe07f1451350a80114ab566ced5de0Evan Cheng 739c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo:: 74044eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen AndersonReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { 7417c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner assert(Cond.size() == 2 && "Invalid PPC branch opcode!"); 74299f823f94374917174f96a7689955b8463db6816Hal Finkel if (Cond[1].getReg() == PPC::CTR8 || Cond[1].getReg() == PPC::CTR) 74399f823f94374917174f96a7689955b8463db6816Hal Finkel Cond[0].setImm(Cond[0].getImm() == 0 ? 1 : 0); 74499f823f94374917174f96a7689955b8463db6816Hal Finkel else 74599f823f94374917174f96a7689955b8463db6816Hal Finkel // Leave the CR# the same, but invert the condition. 74699f823f94374917174f96a7689955b8463db6816Hal Finkel Cond[0].setImm(PPC::InvertPredicate((PPC::Predicate)Cond[0].getImm())); 7477c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner return false; 748c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 74952e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray 75052e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// GetInstSize - Return the number of bytes of code the specified 75152e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// instruction may be. This returns the maximum number of bytes. 75252e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// 75352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffrayunsigned PPCInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { 75452e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray switch (MI->getOpcode()) { 75552e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray case PPC::INLINEASM: { // Inline Asm: Variable size. 75652e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray const MachineFunction *MF = MI->getParent()->getParent(); 75752e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray const char *AsmStr = MI->getOperand(0).getSymbolName(); 758af76e592c7f9deff0e55c13dbb4a34f07f1c7f64Chris Lattner return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo()); 75952e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 7607431beaba2a01c3fe299c861b2ec85cbf1dc81c4Bill Wendling case PPC::PROLOG_LABEL: 7614406604047423576e36657c7ede266ca42e79642Dan Gohman case PPC::EH_LABEL: 7624406604047423576e36657c7ede266ca42e79642Dan Gohman case PPC::GC_LABEL: 763375be7730a6f3dee7a6dc319ee6c355a11ac99adDale Johannesen case PPC::DBG_VALUE: 76452e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 0; 7655b00ceaeeabff8c25abb09926343c3fcb06053d8Hal Finkel case PPC::BL8_NOP_ELF: 7665b00ceaeeabff8c25abb09926343c3fcb06053d8Hal Finkel case PPC::BLA8_NOP_ELF: 7675b00ceaeeabff8c25abb09926343c3fcb06053d8Hal Finkel return 8; 76852e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray default: 76952e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 4; // PowerPC instructions are all 4 bytes 77052e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 77152e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray} 772