PPCInstrInfo.cpp revision d21e930eac3d99dd77ee33ea5826700b4bc97ae8
121e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman//===- PPCInstrInfo.cpp - PowerPC32 Instruction Information -----*- C++ -*-===// 2b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 3f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// The LLVM Compiler Infrastructure 4f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 8f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 9f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 10f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file contains the PowerPC implementation of the TargetInstrInfo class. 11f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 12f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 13f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 1416e71f2f70811c69c56052dd146324fe20e31db5Chris Lattner#include "PPCInstrInfo.h" 1559ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "PPC.h" 16f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson#include "PPCInstrBuilder.h" 177194aaf738a1b89441635340403f1c5b06ae18efBill Wendling#include "PPCMachineFunctionInfo.h" 18b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner#include "PPCTargetMachine.h" 192da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick#include "PPCHazardRecognizers.h" 2094b9550a32d189704a8eae55505edf62662c0534Evan Cheng#include "MCTargetDesc/PPCPredicates.h" 217a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen#include "llvm/CodeGen/MachineFrameInfo.h" 22f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/CodeGen/MachineInstrBuilder.h" 237a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen#include "llvm/CodeGen/MachineMemOperand.h" 24243296690ec78fc918762bd73896b09e26537f47Jakob Stoklund Olesen#include "llvm/CodeGen/MachineRegisterInfo.h" 2559ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "llvm/MC/MCAsmInfo.h" 26880d0f6018b6928bdcad291be60c801238619955Bill Wendling#include "llvm/Support/CommandLine.h" 27dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin#include "llvm/Support/ErrorHandling.h" 283e74d6fdd248e20a280f1dff3da9a6c689c2c4c3Evan Cheng#include "llvm/Support/TargetRegistry.h" 29dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin#include "llvm/Support/raw_ostream.h" 3059ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "llvm/ADT/STLExtras.h" 31f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 324db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng#define GET_INSTRINFO_CTOR 3322fee2dff4c43b551aefa44a96ca74fcade6bfacEvan Cheng#include "PPCGenInstrInfo.inc" 3422fee2dff4c43b551aefa44a96ca74fcade6bfacEvan Cheng 3582bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohmannamespace llvm { 363fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkelextern cl::opt<bool> DisablePPC32RS; 373fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkelextern cl::opt<bool> DisablePPC64RS; 3882bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohman} 3982bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohman 4082bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohmanusing namespace llvm; 41880d0f6018b6928bdcad291be60c801238619955Bill Wendling 42b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris LattnerPPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm) 434db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng : PPCGenInstrInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP), 44d5b03f252c0db6b49a242abab63d7c5a260fceaeEvan Cheng TM(tm), RI(*TM.getSubtargetImpl(), *this) {} 45b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner 462da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick/// CreateTargetHazardRecognizer - Return the hazard recognizer to use for 472da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick/// this target when scheduling the DAG. 482da8bc8a5f7705ac131184cd247f48500da0d74eAndrew TrickScheduleHazardRecognizer *PPCInstrInfo::CreateTargetHazardRecognizer( 492da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick const TargetMachine *TM, 502da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick const ScheduleDAG *DAG) const { 51c6d08f10bf797cc78068ef30bd0e8812a5bdc9a2Hal Finkel unsigned Directive = TM->getSubtarget<PPCSubtarget>().getDarwinDirective(); 52c6d08f10bf797cc78068ef30bd0e8812a5bdc9a2Hal Finkel if (Directive == PPC::DIR_440) { 53768c65f677af3f05c2e94982043f90a1bfaceda5Hal Finkel const InstrItineraryData *II = TM->getInstrItineraryData(); 54768c65f677af3f05c2e94982043f90a1bfaceda5Hal Finkel return new PPCHazardRecognizer440(II, DAG); 55c6d08f10bf797cc78068ef30bd0e8812a5bdc9a2Hal Finkel } 5664c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel 5764c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel return TargetInstrInfoImpl::CreateTargetHazardRecognizer(TM, DAG); 582da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick} 592da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick 6064c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel/// CreateTargetPostRAHazardRecognizer - Return the postRA hazard recognizer 6164c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel/// to use for this target when scheduling the DAG. 6264c34e253563a8ba6b41fbce2bb020632cf65961Hal FinkelScheduleHazardRecognizer *PPCInstrInfo::CreateTargetPostRAHazardRecognizer( 6364c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel const InstrItineraryData *II, 6464c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel const ScheduleDAG *DAG) const { 6564c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel unsigned Directive = TM.getSubtarget<PPCSubtarget>().getDarwinDirective(); 6664c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel 6764c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel // Most subtargets use a PPC970 recognizer. 6864c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel if (Directive != PPC::DIR_440) { 6964c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel const TargetInstrInfo *TII = TM.getInstrInfo(); 7064c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel assert(TII && "No InstrInfo?"); 7164c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel 7264c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel return new PPCHazardRecognizer970(*TII); 7364c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel } 7464c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel 7564c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel return TargetInstrInfoImpl::CreateTargetPostRAHazardRecognizer(II, DAG); 7664c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel} 776e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trickunsigned PPCInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, 789c09c9ec9dab61450800b42cbf746164aa076b88Chris Lattner int &FrameIndex) const { 79408396014742a05cad1c91949d2226169e3f9d80Chris Lattner switch (MI->getOpcode()) { 80408396014742a05cad1c91949d2226169e3f9d80Chris Lattner default: break; 81408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LD: 82408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LWZ: 83408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFS: 84408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFD: 85d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 86d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(2).isFI()) { 878aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(2).getIndex(); 88408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return MI->getOperand(0).getReg(); 89408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 90408396014742a05cad1c91949d2226169e3f9d80Chris Lattner break; 91408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 92408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return 0; 936524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 94408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 956e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trickunsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr *MI, 966524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner int &FrameIndex) const { 976524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner switch (MI->getOpcode()) { 986524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner default: break; 993b478b31e297208ef2c9f74750a8a603eb3726fbNate Begeman case PPC::STD: 1006524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STW: 1016524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFS: 1026524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFD: 103d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 104d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(2).isFI()) { 1058aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(2).getIndex(); 1066524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return MI->getOperand(0).getReg(); 1076524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 1086524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner break; 1096524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 1106524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return 0; 1116524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 112408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 113043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// commuteInstruction - We can commute rlwimi instructions, but only if the 114043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// rotate amt is zero. We also have to munge the immediates a bit. 11558dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengMachineInstr * 11658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengPPCInstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const { 1178e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MI->getParent()->getParent(); 1188e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 119043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Normal instructions can be commuted the obvious way. 120043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner if (MI->getOpcode() != PPC::RLWIMI) 12158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng return TargetInstrInfoImpl::commuteInstruction(MI, NewMI); 1226e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 123043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Cannot commute if it has a non-zero rotate count. 1249a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner if (MI->getOperand(3).getImm() != 0) 125043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return 0; 1266e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 127043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // If we have a zero rotate count, we have: 128043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask(MB,ME) 129043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op1 & ~M) | (Op2 & M) 130043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Change this to: 131043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask((ME+1)&31, (MB-1)&31) 132043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op2 & ~M) | (Op1 & M) 133043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 134043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap op1/op2 135a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng unsigned Reg0 = MI->getOperand(0).getReg(); 136043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg1 = MI->getOperand(1).getReg(); 137043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg2 = MI->getOperand(2).getReg(); 1386ce7dc2a97260eea5fba414332796464912b9359Evan Cheng bool Reg1IsKill = MI->getOperand(1).isKill(); 1396ce7dc2a97260eea5fba414332796464912b9359Evan Cheng bool Reg2IsKill = MI->getOperand(2).isKill(); 14058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool ChangeReg0 = false; 141a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // If machine instrs are no longer in two-address forms, update 142a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // destination register as well. 143a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng if (Reg0 == Reg1) { 144a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // Must be two address instruction! 145e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng assert(MI->getDesc().getOperandConstraint(0, MCOI::TIED_TO) && 146a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng "Expecting a two-address instruction!"); 147a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng Reg2IsKill = false; 14858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng ChangeReg0 = true; 14958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng } 15058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 15158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Masks. 15258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned MB = MI->getOperand(4).getImm(); 15358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned ME = MI->getOperand(5).getImm(); 15458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 15558dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (NewMI) { 15658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Create a new instruction. 15758dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg(); 15858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool Reg0IsDead = MI->getOperand(0).isDead(); 159d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling return BuildMI(MF, MI->getDebugLoc(), MI->getDesc()) 160587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) 161587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg2, getKillRegState(Reg2IsKill)) 162587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg1, getKillRegState(Reg1IsKill)) 16358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addImm((ME+1) & 31) 16458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addImm((MB-1) & 31); 165a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng } 16658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 16758dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (ChangeReg0) 16858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng MI->getOperand(0).setReg(Reg2); 169e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(2).setReg(Reg1); 170e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(1).setReg(Reg2); 171f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner MI->getOperand(2).setIsKill(Reg1IsKill); 172f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner MI->getOperand(1).setIsKill(Reg2IsKill); 1736e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 174043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap the mask around. 1759a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(4).setImm((ME+1) & 31); 1769a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(5).setImm((MB-1) & 31); 177043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return MI; 178043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner} 179bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner 1806e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trickvoid PPCInstrInfo::insertNoop(MachineBasicBlock &MBB, 181bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner MachineBasicBlock::iterator MI) const { 182c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc DL; 183d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, MI, DL, get(PPC::NOP)); 184bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner} 185c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 186c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 187c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner// Branch analysis. 188c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, 189c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock *&FBB, 190dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng SmallVectorImpl<MachineOperand> &Cond, 191dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng bool AllowModify) const { 192c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If the block has no terminators, it just falls into the block after it. 193c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 19493d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (I == MBB.begin()) 19593d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen return false; 19693d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen --I; 19793d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen while (I->isDebugValue()) { 19893d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (I == MBB.begin()) 19993d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen return false; 20093d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen --I; 20193d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen } 20293d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (!isUnpredicatedTerminator(I)) 203c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 204c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 205c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the last instruction in the block. 206c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *LastInst = I; 2076e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 208c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there is only one terminator instruction, process it. 209bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) { 210c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (LastInst->getOpcode() == PPC::B) { 21182ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!LastInst->getOperand(0).isMBB()) 21282ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 2138aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = LastInst->getOperand(0).getMBB(); 214c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 215289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner } else if (LastInst->getOpcode() == PPC::BCC) { 21682ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!LastInst->getOperand(2).isMBB()) 21782ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 218c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Block ends with fall-through condbranch. 2198aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = LastInst->getOperand(2).getMBB(); 220c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(0)); 221c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(1)); 2227c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner return false; 223c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 224c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, don't know what this is. 225c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 226c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 2276e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 228c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the instruction before it if it's a terminator. 229c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *SecondLastInst = I; 230c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 231c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there are three terminators, we don't know what sort of block this is. 232c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (SecondLastInst && I != MBB.begin() && 233bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng isUnpredicatedTerminator(--I)) 234c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 2356e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 236289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner // If the block ends with PPC::B and PPC:BCC, handle it. 2376e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick if (SecondLastInst->getOpcode() == PPC::BCC && 238c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner LastInst->getOpcode() == PPC::B) { 23982ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!SecondLastInst->getOperand(2).isMBB() || 24082ae933e55839713ea039e7c6353483b14dc5724Evan Cheng !LastInst->getOperand(0).isMBB()) 24182ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 2428aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = SecondLastInst->getOperand(2).getMBB(); 243c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(0)); 244c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(1)); 2458aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FBB = LastInst->getOperand(0).getMBB(); 246c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 247c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 2486e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 24913e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen // If the block ends with two PPC:Bs, handle it. The second one is not 25013e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen // executed, so remove it. 2516e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick if (SecondLastInst->getOpcode() == PPC::B && 25213e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen LastInst->getOpcode() == PPC::B) { 25382ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!SecondLastInst->getOperand(0).isMBB()) 25482ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 2558aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = SecondLastInst->getOperand(0).getMBB(); 25613e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen I = LastInst; 257dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng if (AllowModify) 258dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng I->eraseFromParent(); 25913e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen return false; 26013e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen } 26113e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen 262c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, can't handle this. 263c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 264c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 265c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 266b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Chengunsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { 267c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 268b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng if (I == MBB.begin()) return 0; 269c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 27093d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen while (I->isDebugValue()) { 27193d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (I == MBB.begin()) 27293d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen return 0; 27393d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen --I; 27493d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen } 275289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner if (I->getOpcode() != PPC::B && I->getOpcode() != PPC::BCC) 276b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 0; 2776e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 278c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 279c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 2806e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 281c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I = MBB.end(); 282c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 283b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng if (I == MBB.begin()) return 1; 284c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 285289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner if (I->getOpcode() != PPC::BCC) 286b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 1; 2876e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 288c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 289c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 290b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 2; 291c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 292c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 293b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Chengunsigned 294b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan ChengPPCInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 295b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng MachineBasicBlock *FBB, 2963bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings const SmallVectorImpl<MachineOperand> &Cond, 2973bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings DebugLoc DL) const { 2982dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner // Shouldn't be a fall through. 2992dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner assert(TBB && "InsertBranch must not be told to insert a fallthrough"); 3006e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick assert((Cond.size() == 2 || Cond.size() == 0) && 30154108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner "PPC branch conditions have two components!"); 3026e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 30354108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner // One-way branch. 3042dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner if (FBB == 0) { 30554108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner if (Cond.empty()) // Unconditional branch 3063bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings BuildMI(&MBB, DL, get(PPC::B)).addMBB(TBB); 30754108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner else // Conditional branch 3083bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings BuildMI(&MBB, DL, get(PPC::BCC)) 30918258c640466274c26e89016e361ec411ff78520Chris Lattner .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 310b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 1; 3112dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner } 3126e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 313879d09cf130f3760a08865913c04d9ff328fad5fChris Lattner // Two-way Conditional Branch. 3143bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings BuildMI(&MBB, DL, get(PPC::BCC)) 31518258c640466274c26e89016e361ec411ff78520Chris Lattner .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 3163bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings BuildMI(&MBB, DL, get(PPC::B)).addMBB(FBB); 317b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 2; 318c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 319c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 32027689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesenvoid PPCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, 32127689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen MachineBasicBlock::iterator I, DebugLoc DL, 32227689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen unsigned DestReg, unsigned SrcReg, 32327689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen bool KillSrc) const { 32427689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen unsigned Opc; 32527689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen if (PPC::GPRCRegClass.contains(DestReg, SrcReg)) 32627689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::OR; 32727689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::G8RCRegClass.contains(DestReg, SrcReg)) 32827689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::OR8; 32927689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::F4RCRegClass.contains(DestReg, SrcReg)) 33027689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::FMR; 33127689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::CRRCRegClass.contains(DestReg, SrcReg)) 33227689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::MCRF; 33327689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::VRRCRegClass.contains(DestReg, SrcReg)) 33427689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::VOR; 33527689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::CRBITRCRegClass.contains(DestReg, SrcReg)) 33627689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::CROR; 33727689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else 33827689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen llvm_unreachable("Impossible reg-to-reg copy"); 339d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 340e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc &MCID = get(Opc); 341e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng if (MCID.getNumOperands() == 3) 342e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng BuildMI(MBB, I, DL, MCID, DestReg) 34327689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen .addReg(SrcReg).addReg(SrcReg, getKillRegState(KillSrc)); 34427689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else 345e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng BuildMI(MBB, I, DL, MCID, DestReg).addReg(SrcReg, getKillRegState(KillSrc)); 346d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson} 347d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 3483fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkel// This function returns true if a CR spill is necessary and false otherwise. 3494a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingbool 3508e5f2c6f65841542e2a7092553fe42a00048e4c7Dan GohmanPPCInstrInfo::StoreRegToStackSlot(MachineFunction &MF, 3518e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman unsigned SrcReg, bool isKill, 3524a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling int FrameIdx, 3534a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling const TargetRegisterClass *RC, 3544a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling SmallVectorImpl<MachineInstr*> &NewMIs) const{ 355c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc DL; 35601faf432d9d81212b492f326594d43a951fe64f0Jakob Stoklund Olesen if (PPC::GPRCRegisterClass->hasSubClassEq(RC)) { 357f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (SrcReg != PPC::LR) { 35821b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) 359587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 360587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 3614a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling FrameIdx)); 362f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 363f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: this spills LR immediately to memory in one step. To do this, 364f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // we use R11, which we know cannot be used in the prolog/epilog. This is 365f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // a hack. 36621b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFLR), PPC::R11)); 36721b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) 368587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R11, 369587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 3704a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling FrameIdx)); 371f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 37201faf432d9d81212b492f326594d43a951fe64f0Jakob Stoklund Olesen } else if (PPC::G8RCRegisterClass->hasSubClassEq(RC)) { 373f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (SrcReg != PPC::LR8) { 37421b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STD)) 375587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 376587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 377587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 378f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 379f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: this spills LR immediately to memory in one step. To do this, 380f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // we use R11, which we know cannot be used in the prolog/epilog. This is 381f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // a hack. 38221b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFLR8), PPC::X11)); 38321b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STD)) 384587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::X11, 385587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 386587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 387f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 38801faf432d9d81212b492f326594d43a951fe64f0Jakob Stoklund Olesen } else if (PPC::F8RCRegisterClass->hasSubClassEq(RC)) { 38921b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFD)) 390587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 391587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 392587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 39301faf432d9d81212b492f326594d43a951fe64f0Jakob Stoklund Olesen } else if (PPC::F4RCRegisterClass->hasSubClassEq(RC)) { 39421b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFS)) 395587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 396587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 397587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 39801faf432d9d81212b492f326594d43a951fe64f0Jakob Stoklund Olesen } else if (PPC::CRRCRegisterClass->hasSubClassEq(RC)) { 3993fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkel if ((!DisablePPC32RS && !TM.getSubtargetImpl()->isPPC64()) || 4003fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkel (!DisablePPC64RS && TM.getSubtargetImpl()->isPPC64())) { 40121b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::SPILL_CR)) 402587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 403587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 40471a2cb25ebc818383dd0f80475bc166f834e8d99Chris Lattner FrameIdx)); 4057194aaf738a1b89441635340403f1c5b06ae18efBill Wendling return true; 4067194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } else { 407c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // FIXME: We need a scatch reg here. The trouble with using R0 is that 408c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // it's possible for the stack frame to be so big the save location is 409c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // out of range of immediate offsets, necessitating another register. 410c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // We hack this on Darwin by reserving R2. It's probably broken on Linux 411c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // at the moment. 412c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen 413c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // We need to store the CR in the low 4-bits of the saved value. First, 414c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // issue a MFCR to save all of the CRBits. 4156e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick unsigned ScratchReg = TM.getSubtargetImpl()->isDarwinABI() ? 416c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen PPC::R2 : PPC::R0; 4175f07d5224ddc32f405d7e19de8e58e91ab2816bcDale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFCRpseud), ScratchReg) 4185f07d5224ddc32f405d7e19de8e58e91ab2816bcDale Johannesen .addReg(SrcReg, getKillRegState(isKill))); 4196e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 4207194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // If the saved register wasn't CR0, shift the bits left so that they are 4217194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // in CR0's slot. 4227194aaf738a1b89441635340403f1c5b06ae18efBill Wendling if (SrcReg != PPC::CR0) { 423966aeb5788c242cfaca35c56c0ddc0ff778d4376Evan Cheng unsigned ShiftBits = getPPCRegisterNumbering(SrcReg)*4; 424c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // rlwinm scratch, scratch, ShiftBits, 0, 31. 425c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::RLWINM), ScratchReg) 426c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addReg(ScratchReg).addImm(ShiftBits) 427c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addImm(0).addImm(31)); 4287194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 4296e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 43021b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) 431c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addReg(ScratchReg, 432587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 4337194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FrameIdx)); 4347194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 43501faf432d9d81212b492f326594d43a951fe64f0Jakob Stoklund Olesen } else if (PPC::CRBITRCRegisterClass->hasSubClassEq(RC)) { 4360404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // FIXME: We use CRi here because there is no mtcrf on a bit. Since the 4370404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // backend currently only uses CR1EQ as an individual bit, this should 4380404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // not cause any bug. If we need other uses of CR bits, the following 4390404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // code may be invalid. 4409348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray unsigned Reg = 0; 4416a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller if (SrcReg == PPC::CR0LT || SrcReg == PPC::CR0GT || 4426a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR0EQ || SrcReg == PPC::CR0UN) 4439348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR0; 4446a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR1LT || SrcReg == PPC::CR1GT || 4456a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR1EQ || SrcReg == PPC::CR1UN) 4469348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR1; 4476a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR2LT || SrcReg == PPC::CR2GT || 4486a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR2EQ || SrcReg == PPC::CR2UN) 4499348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR2; 4506a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR3LT || SrcReg == PPC::CR3GT || 4516a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR3EQ || SrcReg == PPC::CR3UN) 4529348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR3; 4536a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR4LT || SrcReg == PPC::CR4GT || 4546a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR4EQ || SrcReg == PPC::CR4UN) 4559348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR4; 4566a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR5LT || SrcReg == PPC::CR5GT || 4576a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR5EQ || SrcReg == PPC::CR5UN) 4589348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR5; 4596a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR6LT || SrcReg == PPC::CR6GT || 4606a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR6EQ || SrcReg == PPC::CR6UN) 4619348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR6; 4626a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR7LT || SrcReg == PPC::CR7GT || 4636a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR7EQ || SrcReg == PPC::CR7UN) 4649348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR7; 4659348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 4666e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick return StoreRegToStackSlot(MF, Reg, isKill, FrameIdx, 4679348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray PPC::CRRCRegisterClass, NewMIs); 4689348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 46901faf432d9d81212b492f326594d43a951fe64f0Jakob Stoklund Olesen } else if (PPC::VRRCRegisterClass->hasSubClassEq(RC)) { 470f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // We don't have indexed addressing for vector loads. Emit: 471f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // R0 = ADDI FI# 472f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // STVX VAL, 0, R0 4736e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick // 474f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 47521b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::ADDI), PPC::R0), 476f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx, 0, 0)); 47721b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::STVX)) 478587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, getKillRegState(isKill)) 479587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R0) 480587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R0)); 481f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 482c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("Unknown regclass!"); 483f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 4847194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 4857194aaf738a1b89441635340403f1c5b06ae18efBill Wendling return false; 486f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 487f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 488f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid 489f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonPPCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, 4907194aaf738a1b89441635340403f1c5b06ae18efBill Wendling MachineBasicBlock::iterator MI, 4917194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned SrcReg, bool isKill, int FrameIdx, 492746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterClass *RC, 493746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterInfo *TRI) const { 4948e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MBB.getParent(); 495f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVector<MachineInstr*, 4> NewMIs; 4967194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 4978e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman if (StoreRegToStackSlot(MF, SrcReg, isKill, FrameIdx, RC, NewMIs)) { 4988e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); 4997194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FuncInfo->setSpillsCR(); 5007194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 5017194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 502f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) 503f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MBB.insert(MI, NewMIs[i]); 5047a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen 5057a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen const MachineFrameInfo &MFI = *MF.getFrameInfo(); 5067a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MachineMemOperand *MMO = 507978e0dfe46e481bfb1281e683aa308329e879e95Jay Foad MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIdx), 50859db5496f4fc2ef6111569e542f8b65480ef14c1Chris Lattner MachineMemOperand::MOStore, 5097a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectSize(FrameIdx), 5107a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectAlignment(FrameIdx)); 5117a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen NewMIs.back()->addMemOperand(MF, MMO); 512f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 513f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 514d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkelbool 515d1c321a89ab999b9bb602b0f398ecd4c2022262cBill WendlingPPCInstrInfo::LoadRegFromStackSlot(MachineFunction &MF, DebugLoc DL, 5168e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman unsigned DestReg, int FrameIdx, 5174a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling const TargetRegisterClass *RC, 5184a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling SmallVectorImpl<MachineInstr*> &NewMIs)const{ 51901faf432d9d81212b492f326594d43a951fe64f0Jakob Stoklund Olesen if (PPC::GPRCRegisterClass->hasSubClassEq(RC)) { 520f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::LR) { 521d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), 522d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling DestReg), FrameIdx)); 523f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 524d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), 525d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling PPC::R11), FrameIdx)); 526d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::MTLR)).addReg(PPC::R11)); 527f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 52801faf432d9d81212b492f326594d43a951fe64f0Jakob Stoklund Olesen } else if (PPC::G8RCRegisterClass->hasSubClassEq(RC)) { 529f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::LR8) { 530d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LD), DestReg), 531f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 532f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 533d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LD), 534d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling PPC::R11), FrameIdx)); 535d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::MTLR8)).addReg(PPC::R11)); 536f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 53701faf432d9d81212b492f326594d43a951fe64f0Jakob Stoklund Olesen } else if (PPC::F8RCRegisterClass->hasSubClassEq(RC)) { 538d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LFD), DestReg), 539f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 54001faf432d9d81212b492f326594d43a951fe64f0Jakob Stoklund Olesen } else if (PPC::F4RCRegisterClass->hasSubClassEq(RC)) { 541d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LFS), DestReg), 542f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 54301faf432d9d81212b492f326594d43a951fe64f0Jakob Stoklund Olesen } else if (PPC::CRRCRegisterClass->hasSubClassEq(RC)) { 544d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel if ((!DisablePPC32RS && !TM.getSubtargetImpl()->isPPC64()) || 545d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel (!DisablePPC64RS && TM.getSubtargetImpl()->isPPC64())) { 546d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel NewMIs.push_back(addFrameReference(BuildMI(MF, DL, 547d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel get(PPC::RESTORE_CR), DestReg) 548d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel , FrameIdx)); 549d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel return true; 550d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel } else { 551d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // FIXME: We need a scatch reg here. The trouble with using R0 is that 552d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // it's possible for the stack frame to be so big the save location is 553d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // out of range of immediate offsets, necessitating another register. 554d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // We hack this on Darwin by reserving R2. It's probably broken on Linux 555d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // at the moment. 556d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel unsigned ScratchReg = TM.getSubtargetImpl()->isDarwinABI() ? 557d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel PPC::R2 : PPC::R0; 558d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), 559d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel ScratchReg), FrameIdx)); 560d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel 561d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // If the reloaded register isn't CR0, shift the bits right so that they are 562d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // in the right CR's slot. 563d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel if (DestReg != PPC::CR0) { 564d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel unsigned ShiftBits = getPPCRegisterNumbering(DestReg)*4; 565d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // rlwinm r11, r11, 32-ShiftBits, 0, 31. 566d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel NewMIs.push_back(BuildMI(MF, DL, get(PPC::RLWINM), ScratchReg) 567d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel .addReg(ScratchReg).addImm(32-ShiftBits).addImm(0) 568d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel .addImm(31)); 569d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel } 570d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel 571d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel NewMIs.push_back(BuildMI(MF, DL, get(PPC::MTCRF), DestReg) 572d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel .addReg(ScratchReg)); 573f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 57401faf432d9d81212b492f326594d43a951fe64f0Jakob Stoklund Olesen } else if (PPC::CRBITRCRegisterClass->hasSubClassEq(RC)) { 5756e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 5769348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray unsigned Reg = 0; 5776a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller if (DestReg == PPC::CR0LT || DestReg == PPC::CR0GT || 5786a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR0EQ || DestReg == PPC::CR0UN) 5799348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR0; 5806a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR1LT || DestReg == PPC::CR1GT || 5816a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR1EQ || DestReg == PPC::CR1UN) 5829348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR1; 5836a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR2LT || DestReg == PPC::CR2GT || 5846a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR2EQ || DestReg == PPC::CR2UN) 5859348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR2; 5866a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR3LT || DestReg == PPC::CR3GT || 5876a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR3EQ || DestReg == PPC::CR3UN) 5889348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR3; 5896a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR4LT || DestReg == PPC::CR4GT || 5906a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR4EQ || DestReg == PPC::CR4UN) 5919348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR4; 5926a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR5LT || DestReg == PPC::CR5GT || 5936a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR5EQ || DestReg == PPC::CR5UN) 5949348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR5; 5956a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR6LT || DestReg == PPC::CR6GT || 5966a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR6EQ || DestReg == PPC::CR6UN) 5979348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR6; 5986a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR7LT || DestReg == PPC::CR7GT || 5996a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR7EQ || DestReg == PPC::CR7UN) 6009348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR7; 6019348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 6026e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick return LoadRegFromStackSlot(MF, DL, Reg, FrameIdx, 6039348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray PPC::CRRCRegisterClass, NewMIs); 6049348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 60501faf432d9d81212b492f326594d43a951fe64f0Jakob Stoklund Olesen } else if (PPC::VRRCRegisterClass->hasSubClassEq(RC)) { 606f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // We don't have indexed addressing for vector loads. Emit: 607f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // R0 = ADDI FI# 608f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // Dest = LVX 0, R0 6096e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick // 610f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 611d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::ADDI), PPC::R0), 612f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx, 0, 0)); 613d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::LVX),DestReg).addReg(PPC::R0) 614f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson .addReg(PPC::R0)); 615f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 616c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("Unknown regclass!"); 617f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 618d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel 619d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel return false; 620f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 621f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 622f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid 623f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonPPCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, 6247194aaf738a1b89441635340403f1c5b06ae18efBill Wendling MachineBasicBlock::iterator MI, 6257194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned DestReg, int FrameIdx, 626746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterClass *RC, 627746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterInfo *TRI) const { 6288e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MBB.getParent(); 629f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVector<MachineInstr*, 4> NewMIs; 630c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc DL; 631d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling if (MI != MBB.end()) DL = MI->getDebugLoc(); 632d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel if (LoadRegFromStackSlot(MF, DL, DestReg, FrameIdx, RC, NewMIs)) { 633d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); 634d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel FuncInfo->setSpillsCR(); 635d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel } 636f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) 637f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MBB.insert(MI, NewMIs[i]); 6387a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen 6397a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen const MachineFrameInfo &MFI = *MF.getFrameInfo(); 6407a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MachineMemOperand *MMO = 641978e0dfe46e481bfb1281e683aa308329e879e95Jay Foad MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIdx), 64259db5496f4fc2ef6111569e542f8b65480ef14c1Chris Lattner MachineMemOperand::MOLoad, 6437a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectSize(FrameIdx), 6447a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectAlignment(FrameIdx)); 6457a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen NewMIs.back()->addMemOperand(MF, MMO); 646f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 647f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 6480965217e74fe07f1451350a80114ab566ced5de0Evan ChengMachineInstr* 6490965217e74fe07f1451350a80114ab566ced5de0Evan ChengPPCInstrInfo::emitFrameIndexDebugValue(MachineFunction &MF, 6508601a3d4decff0a380e059b037dabf71075497d3Evan Cheng int FrameIx, uint64_t Offset, 6510965217e74fe07f1451350a80114ab566ced5de0Evan Cheng const MDNode *MDPtr, 6520965217e74fe07f1451350a80114ab566ced5de0Evan Cheng DebugLoc DL) const { 6530965217e74fe07f1451350a80114ab566ced5de0Evan Cheng MachineInstrBuilder MIB = BuildMI(MF, DL, get(PPC::DBG_VALUE)); 6540965217e74fe07f1451350a80114ab566ced5de0Evan Cheng addFrameReference(MIB, FrameIx, 0, false).addImm(Offset).addMetadata(MDPtr); 6550965217e74fe07f1451350a80114ab566ced5de0Evan Cheng return &*MIB; 6560965217e74fe07f1451350a80114ab566ced5de0Evan Cheng} 6570965217e74fe07f1451350a80114ab566ced5de0Evan Cheng 658c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo:: 65944eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen AndersonReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { 6607c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner assert(Cond.size() == 2 && "Invalid PPC branch opcode!"); 6617c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner // Leave the CR# the same, but invert the condition. 66218258c640466274c26e89016e361ec411ff78520Chris Lattner Cond[0].setImm(PPC::InvertPredicate((PPC::Predicate)Cond[0].getImm())); 6637c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner return false; 664c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 66552e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray 66652e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// GetInstSize - Return the number of bytes of code the specified 66752e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// instruction may be. This returns the maximum number of bytes. 66852e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// 66952e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffrayunsigned PPCInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { 67052e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray switch (MI->getOpcode()) { 67152e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray case PPC::INLINEASM: { // Inline Asm: Variable size. 67252e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray const MachineFunction *MF = MI->getParent()->getParent(); 67352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray const char *AsmStr = MI->getOperand(0).getSymbolName(); 674af76e592c7f9deff0e55c13dbb4a34f07f1c7f64Chris Lattner return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo()); 67552e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 6767431beaba2a01c3fe299c861b2ec85cbf1dc81c4Bill Wendling case PPC::PROLOG_LABEL: 6774406604047423576e36657c7ede266ca42e79642Dan Gohman case PPC::EH_LABEL: 6784406604047423576e36657c7ede266ca42e79642Dan Gohman case PPC::GC_LABEL: 679375be7730a6f3dee7a6dc319ee6c355a11ac99adDale Johannesen case PPC::DBG_VALUE: 68052e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 0; 68152e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray default: 68252e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 4; // PowerPC instructions are all 4 bytes 68352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 68452e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray} 685