PPCInstrInfo.cpp revision dc54d317e7a381ef8e4aca80d54ad1466bb85dda
121e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman//===- PPCInstrInfo.cpp - PowerPC32 Instruction Information -----*- C++ -*-===// 2b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 3f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// The LLVM Compiler Infrastructure 4f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 8f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 9f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 10f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file contains the PowerPC implementation of the TargetInstrInfo class. 11f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 12f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 13f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 1416e71f2f70811c69c56052dd146324fe20e31db5Chris Lattner#include "PPCInstrInfo.h" 15f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson#include "PPCInstrBuilder.h" 167194aaf738a1b89441635340403f1c5b06ae18efBill Wendling#include "PPCMachineFunctionInfo.h" 17df4ed6350b2a51f71c0980e86c9078f4046ea706Chris Lattner#include "PPCPredicates.h" 184c7b43b43fdf943c7298718e15ab5d6dfe345be7Chris Lattner#include "PPCGenInstrInfo.inc" 19b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner#include "PPCTargetMachine.h" 20718cb665ca6ce2bc4d8e8479f46a45db91b49f86Owen Anderson#include "llvm/ADT/STLExtras.h" 21f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/CodeGen/MachineInstrBuilder.h" 22880d0f6018b6928bdcad291be60c801238619955Bill Wendling#include "llvm/Support/CommandLine.h" 2352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray#include "llvm/Target/TargetAsmInfo.h" 24f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanusing namespace llvm; 25f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 264a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingextern cl::opt<bool> EnablePPC32RS; // FIXME (64-bit): See PPCRegisterInfo.cpp. 274a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingextern cl::opt<bool> EnablePPC64RS; // FIXME (64-bit): See PPCRegisterInfo.cpp. 28880d0f6018b6928bdcad291be60c801238619955Bill Wendling 29b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris LattnerPPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm) 30641055225092833197efe8e5bce01d50bcf1daaeChris Lattner : TargetInstrInfoImpl(PPCInsts, array_lengthof(PPCInsts)), TM(tm), 317ce45783531cfa81bfd7be561ea7e4738e8c6ca8Evan Cheng RI(*TM.getSubtargetImpl(), *this) {} 32b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner 3321e463b2bf864671a87ebe386cb100ef9349a540Nate Begemanbool PPCInstrInfo::isMoveInstr(const MachineInstr& MI, 3421e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman unsigned& sourceReg, 3504ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1Evan Cheng unsigned& destReg, 3604ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1Evan Cheng unsigned& sourceSubIdx, 3704ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1Evan Cheng unsigned& destSubIdx) const { 3804ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1Evan Cheng sourceSubIdx = destSubIdx = 0; // No sub-registers. 3904ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1Evan Cheng 40cc8cd0cbf12c12916d4b38ef0de5be5501c8270eChris Lattner unsigned oc = MI.getOpcode(); 41b410dc99774d52b4491750dab10b91cca1d661d8Chris Lattner if (oc == PPC::OR || oc == PPC::OR8 || oc == PPC::VOR || 4214c09b81ead8fe8b754fca2d0a8237cb810b37d6Chris Lattner oc == PPC::OR4To8 || oc == PPC::OR8To4) { // or r1, r2, r2 431e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 3 && 44d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(0).isReg() && 45d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(1).isReg() && 46d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(2).isReg() && 47f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC OR instruction!"); 48f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) { 49f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 50f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 51f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 52f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 53f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } else if (oc == PPC::ADDI) { // addi r1, r2, 0 541e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 3 && 55d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(0).isReg() && 56d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(2).isImm() && 57f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC ADDI instruction!"); 58d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI.getOperand(1).isReg() && MI.getOperand(2).getImm() == 0) { 59f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 60f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 61f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 62f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 63cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman } else if (oc == PPC::ORI) { // ori r1, r2, 0 641e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 3 && 65d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(0).isReg() && 66d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(1).isReg() && 67d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(2).isImm() && 68cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman "invalid PPC ORI instruction!"); 699a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner if (MI.getOperand(2).getImm() == 0) { 70cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman sourceReg = MI.getOperand(1).getReg(); 71cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman destReg = MI.getOperand(0).getReg(); 72cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman return true; 73cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman } 74eb5d47d99db0d9e4fc11f136fbacbd507c71a4c2Chris Lattner } else if (oc == PPC::FMRS || oc == PPC::FMRD || 75eb5d47d99db0d9e4fc11f136fbacbd507c71a4c2Chris Lattner oc == PPC::FMRSD) { // fmr r1, r2 761e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 2 && 77d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(0).isReg() && 78d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(1).isReg() && 79f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC FMR instruction"); 80f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 81f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 82f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 837af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman } else if (oc == PPC::MCRF) { // mcrf cr1, cr2 841e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 2 && 85d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(0).isReg() && 86d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(1).isReg() && 877af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman "invalid PPC MCRF instruction"); 887af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman sourceReg = MI.getOperand(1).getReg(); 897af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman destReg = MI.getOperand(0).getReg(); 907af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman return true; 91f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 92f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return false; 93f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 94043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 95cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2Dan Gohmanunsigned PPCInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, 969c09c9ec9dab61450800b42cbf746164aa076b88Chris Lattner int &FrameIndex) const { 97408396014742a05cad1c91949d2226169e3f9d80Chris Lattner switch (MI->getOpcode()) { 98408396014742a05cad1c91949d2226169e3f9d80Chris Lattner default: break; 99408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LD: 100408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LWZ: 101408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFS: 102408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFD: 103d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 104d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(2).isFI()) { 1058aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(2).getIndex(); 106408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return MI->getOperand(0).getReg(); 107408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 108408396014742a05cad1c91949d2226169e3f9d80Chris Lattner break; 109408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 110408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return 0; 1116524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 112408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 113cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2Dan Gohmanunsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr *MI, 1146524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner int &FrameIndex) const { 1156524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner switch (MI->getOpcode()) { 1166524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner default: break; 1173b478b31e297208ef2c9f74750a8a603eb3726fbNate Begeman case PPC::STD: 1186524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STW: 1196524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFS: 1206524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFD: 121d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 122d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(2).isFI()) { 1238aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(2).getIndex(); 1246524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return MI->getOperand(0).getReg(); 1256524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 1266524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner break; 1276524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 1286524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return 0; 1296524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 130408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 131043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// commuteInstruction - We can commute rlwimi instructions, but only if the 132043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// rotate amt is zero. We also have to munge the immediates a bit. 13358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengMachineInstr * 13458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengPPCInstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const { 1358e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MI->getParent()->getParent(); 1368e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 137043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Normal instructions can be commuted the obvious way. 138043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner if (MI->getOpcode() != PPC::RLWIMI) 13958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng return TargetInstrInfoImpl::commuteInstruction(MI, NewMI); 140043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 141043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Cannot commute if it has a non-zero rotate count. 1429a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner if (MI->getOperand(3).getImm() != 0) 143043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return 0; 144043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 145043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // If we have a zero rotate count, we have: 146043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask(MB,ME) 147043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op1 & ~M) | (Op2 & M) 148043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Change this to: 149043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask((ME+1)&31, (MB-1)&31) 150043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op2 & ~M) | (Op1 & M) 151043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 152043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap op1/op2 153a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng unsigned Reg0 = MI->getOperand(0).getReg(); 154043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg1 = MI->getOperand(1).getReg(); 155043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg2 = MI->getOperand(2).getReg(); 1566ce7dc2a97260eea5fba414332796464912b9359Evan Cheng bool Reg1IsKill = MI->getOperand(1).isKill(); 1576ce7dc2a97260eea5fba414332796464912b9359Evan Cheng bool Reg2IsKill = MI->getOperand(2).isKill(); 15858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool ChangeReg0 = false; 159a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // If machine instrs are no longer in two-address forms, update 160a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // destination register as well. 161a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng if (Reg0 == Reg1) { 162a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // Must be two address instruction! 163a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng assert(MI->getDesc().getOperandConstraint(0, TOI::TIED_TO) && 164a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng "Expecting a two-address instruction!"); 165a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng Reg2IsKill = false; 16658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng ChangeReg0 = true; 16758dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng } 16858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 16958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Masks. 17058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned MB = MI->getOperand(4).getImm(); 17158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned ME = MI->getOperand(5).getImm(); 17258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 17358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (NewMI) { 17458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Create a new instruction. 17558dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg(); 17658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool Reg0IsDead = MI->getOperand(0).isDead(); 1778e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman return BuildMI(MF, MI->getDesc()) 1788e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman .addReg(Reg0, true, false, false, Reg0IsDead) 17958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addReg(Reg2, false, false, Reg2IsKill) 18058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addReg(Reg1, false, false, Reg1IsKill) 18158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addImm((ME+1) & 31) 18258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addImm((MB-1) & 31); 183a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng } 18458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 18558dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (ChangeReg0) 18658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng MI->getOperand(0).setReg(Reg2); 187e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(2).setReg(Reg1); 188e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(1).setReg(Reg2); 189f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner MI->getOperand(2).setIsKill(Reg1IsKill); 190f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner MI->getOperand(1).setIsKill(Reg2IsKill); 191043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 192043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap the mask around. 1939a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(4).setImm((ME+1) & 31); 1949a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(5).setImm((MB-1) & 31); 195043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return MI; 196043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner} 197bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner 198bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattnervoid PPCInstrInfo::insertNoop(MachineBasicBlock &MBB, 199bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner MachineBasicBlock::iterator MI) const { 200c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng BuildMI(MBB, MI, get(PPC::NOP)); 201bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner} 202c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 203c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 204c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner// Branch analysis. 205c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, 206c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock *&FBB, 207dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng SmallVectorImpl<MachineOperand> &Cond, 208dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng bool AllowModify) const { 209c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If the block has no terminators, it just falls into the block after it. 210c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 211bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) 212c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 213c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 214c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the last instruction in the block. 215c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *LastInst = I; 216c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 217c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there is only one terminator instruction, process it. 218bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) { 219c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (LastInst->getOpcode() == PPC::B) { 2208aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = LastInst->getOperand(0).getMBB(); 221c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 222289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner } else if (LastInst->getOpcode() == PPC::BCC) { 223c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Block ends with fall-through condbranch. 2248aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = LastInst->getOperand(2).getMBB(); 225c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(0)); 226c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(1)); 2277c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner return false; 228c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 229c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, don't know what this is. 230c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 231c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 232c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 233c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the instruction before it if it's a terminator. 234c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *SecondLastInst = I; 235c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 236c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there are three terminators, we don't know what sort of block this is. 237c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (SecondLastInst && I != MBB.begin() && 238bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng isUnpredicatedTerminator(--I)) 239c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 240c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 241289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner // If the block ends with PPC::B and PPC:BCC, handle it. 242289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner if (SecondLastInst->getOpcode() == PPC::BCC && 243c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner LastInst->getOpcode() == PPC::B) { 2448aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = SecondLastInst->getOperand(2).getMBB(); 245c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(0)); 246c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(1)); 2478aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FBB = LastInst->getOperand(0).getMBB(); 248c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 249c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 250c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 25113e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen // If the block ends with two PPC:Bs, handle it. The second one is not 25213e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen // executed, so remove it. 25313e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen if (SecondLastInst->getOpcode() == PPC::B && 25413e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen LastInst->getOpcode() == PPC::B) { 2558aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = SecondLastInst->getOperand(0).getMBB(); 25613e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen I = LastInst; 257dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng if (AllowModify) 258dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng I->eraseFromParent(); 25913e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen return false; 26013e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen } 26113e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen 262c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, can't handle this. 263c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 264c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 265c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 266b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Chengunsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { 267c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 268b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng if (I == MBB.begin()) return 0; 269c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 270289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner if (I->getOpcode() != PPC::B && I->getOpcode() != PPC::BCC) 271b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 0; 272c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 273c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 274c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 275c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 276c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I = MBB.end(); 277c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 278b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng if (I == MBB.begin()) return 1; 279c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 280289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner if (I->getOpcode() != PPC::BCC) 281b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 1; 282c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 283c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 284c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 285b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 2; 286c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 287c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 288b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Chengunsigned 289b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan ChengPPCInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 290b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng MachineBasicBlock *FBB, 29144eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen Anderson const SmallVectorImpl<MachineOperand> &Cond) const { 2922dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner // Shouldn't be a fall through. 2932dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner assert(TBB && "InsertBranch must not be told to insert a fallthrough"); 29454108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner assert((Cond.size() == 2 || Cond.size() == 0) && 29554108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner "PPC branch conditions have two components!"); 2962dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner 29754108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner // One-way branch. 2982dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner if (FBB == 0) { 29954108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner if (Cond.empty()) // Unconditional branch 300c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng BuildMI(&MBB, get(PPC::B)).addMBB(TBB); 30154108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner else // Conditional branch 302c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng BuildMI(&MBB, get(PPC::BCC)) 30318258c640466274c26e89016e361ec411ff78520Chris Lattner .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 304b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 1; 3052dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner } 306c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 307879d09cf130f3760a08865913c04d9ff328fad5fChris Lattner // Two-way Conditional Branch. 308c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng BuildMI(&MBB, get(PPC::BCC)) 30918258c640466274c26e89016e361ec411ff78520Chris Lattner .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 310c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng BuildMI(&MBB, get(PPC::B)).addMBB(FBB); 311b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 2; 312c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 313c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 314940f83e772ca2007d62faffc83094bd7e8da6401Owen Andersonbool PPCInstrInfo::copyRegToReg(MachineBasicBlock &MBB, 315d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson MachineBasicBlock::iterator MI, 316d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson unsigned DestReg, unsigned SrcReg, 317d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson const TargetRegisterClass *DestRC, 318d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson const TargetRegisterClass *SrcRC) const { 319d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson if (DestRC != SrcRC) { 320940f83e772ca2007d62faffc83094bd7e8da6401Owen Anderson // Not yet supported! 321940f83e772ca2007d62faffc83094bd7e8da6401Owen Anderson return false; 322d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } 323d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 324d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson if (DestRC == PPC::GPRCRegisterClass) { 325d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson BuildMI(MBB, MI, get(PPC::OR), DestReg).addReg(SrcReg).addReg(SrcReg); 326d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::G8RCRegisterClass) { 327d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson BuildMI(MBB, MI, get(PPC::OR8), DestReg).addReg(SrcReg).addReg(SrcReg); 328d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::F4RCRegisterClass) { 329d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson BuildMI(MBB, MI, get(PPC::FMRS), DestReg).addReg(SrcReg); 330d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::F8RCRegisterClass) { 331d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson BuildMI(MBB, MI, get(PPC::FMRD), DestReg).addReg(SrcReg); 332d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::CRRCRegisterClass) { 333d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson BuildMI(MBB, MI, get(PPC::MCRF), DestReg).addReg(SrcReg); 334d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::VRRCRegisterClass) { 335d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson BuildMI(MBB, MI, get(PPC::VOR), DestReg).addReg(SrcReg).addReg(SrcReg); 3360404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray } else if (DestRC == PPC::CRBITRCRegisterClass) { 3370404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray BuildMI(MBB, MI, get(PPC::CROR), DestReg).addReg(SrcReg).addReg(SrcReg); 338d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else { 339940f83e772ca2007d62faffc83094bd7e8da6401Owen Anderson // Attempt to copy register that is not GPR or FPR 340940f83e772ca2007d62faffc83094bd7e8da6401Owen Anderson return false; 341d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } 342940f83e772ca2007d62faffc83094bd7e8da6401Owen Anderson 343940f83e772ca2007d62faffc83094bd7e8da6401Owen Anderson return true; 344d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson} 345d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 3464a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingbool 3478e5f2c6f65841542e2a7092553fe42a00048e4c7Dan GohmanPPCInstrInfo::StoreRegToStackSlot(MachineFunction &MF, 3488e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman unsigned SrcReg, bool isKill, 3494a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling int FrameIdx, 3504a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling const TargetRegisterClass *RC, 3514a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling SmallVectorImpl<MachineInstr*> &NewMIs) const{ 352f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (RC == PPC::GPRCRegisterClass) { 353f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (SrcReg != PPC::LR) { 3548e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::STW)) 3554a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling .addReg(SrcReg, false, false, isKill), 3564a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling FrameIdx)); 357f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 358f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: this spills LR immediately to memory in one step. To do this, 359f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // we use R11, which we know cannot be used in the prolog/epilog. This is 360f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // a hack. 3618e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(BuildMI(MF, get(PPC::MFLR), PPC::R11)); 3628e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::STW)) 3634a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling .addReg(PPC::R11, false, false, isKill), 3644a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling FrameIdx)); 365f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 366f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::G8RCRegisterClass) { 367f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (SrcReg != PPC::LR8) { 3688e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::STD)) 369cb341de0e238f80dabf3da7b4f2aad58de6914bdChris Lattner .addReg(SrcReg, false, false, isKill), FrameIdx)); 370f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 371f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: this spills LR immediately to memory in one step. To do this, 372f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // we use R11, which we know cannot be used in the prolog/epilog. This is 373f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // a hack. 3748e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(BuildMI(MF, get(PPC::MFLR8), PPC::X11)); 3758e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::STD)) 376cb341de0e238f80dabf3da7b4f2aad58de6914bdChris Lattner .addReg(PPC::X11, false, false, isKill), FrameIdx)); 377f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 378f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F8RCRegisterClass) { 3798e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::STFD)) 380cb341de0e238f80dabf3da7b4f2aad58de6914bdChris Lattner .addReg(SrcReg, false, false, isKill), FrameIdx)); 381f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F4RCRegisterClass) { 3828e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::STFS)) 383cb341de0e238f80dabf3da7b4f2aad58de6914bdChris Lattner .addReg(SrcReg, false, false, isKill), FrameIdx)); 384f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::CRRCRegisterClass) { 3854a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling if ((EnablePPC32RS && !TM.getSubtargetImpl()->isPPC64()) || 3864a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling (EnablePPC64RS && TM.getSubtargetImpl()->isPPC64())) { 3874a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling // FIXME (64-bit): Enable 3888e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::SPILL_CR)) 3897194aaf738a1b89441635340403f1c5b06ae18efBill Wendling .addReg(SrcReg, false, false, isKill), 39071a2cb25ebc818383dd0f80475bc166f834e8d99Chris Lattner FrameIdx)); 3917194aaf738a1b89441635340403f1c5b06ae18efBill Wendling return true; 3927194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } else { 3937194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // FIXME: We use R0 here, because it isn't available for RA. We need to 3947194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // store the CR in the low 4-bits of the saved value. First, issue a MFCR 3957194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // to save all of the CRBits. 3968e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(BuildMI(MF, get(PPC::MFCR), PPC::R0)); 397f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 3987194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // If the saved register wasn't CR0, shift the bits left so that they are 3997194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // in CR0's slot. 4007194aaf738a1b89441635340403f1c5b06ae18efBill Wendling if (SrcReg != PPC::CR0) { 4017194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(SrcReg)*4; 4027194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // rlwinm r0, r0, ShiftBits, 0, 31. 4038e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(BuildMI(MF, get(PPC::RLWINM), PPC::R0) 404cb341de0e238f80dabf3da7b4f2aad58de6914bdChris Lattner .addReg(PPC::R0).addImm(ShiftBits).addImm(0).addImm(31)); 4057194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 406f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 4078e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::STW)) 4087194aaf738a1b89441635340403f1c5b06ae18efBill Wendling .addReg(PPC::R0, false, false, isKill), 4097194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FrameIdx)); 4107194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 4110404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray } else if (RC == PPC::CRBITRCRegisterClass) { 4120404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // FIXME: We use CRi here because there is no mtcrf on a bit. Since the 4130404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // backend currently only uses CR1EQ as an individual bit, this should 4140404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // not cause any bug. If we need other uses of CR bits, the following 4150404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // code may be invalid. 4169348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray unsigned Reg = 0; 4170404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray if (SrcReg >= PPC::CR0LT || SrcReg <= PPC::CR0UN) 4189348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR0; 4190404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray else if (SrcReg >= PPC::CR1LT || SrcReg <= PPC::CR1UN) 4209348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR1; 4219348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (SrcReg >= PPC::CR2LT || SrcReg <= PPC::CR2UN) 4229348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR2; 4239348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (SrcReg >= PPC::CR3LT || SrcReg <= PPC::CR3UN) 4249348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR3; 4259348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (SrcReg >= PPC::CR4LT || SrcReg <= PPC::CR4UN) 4269348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR4; 4279348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (SrcReg >= PPC::CR5LT || SrcReg <= PPC::CR5UN) 4289348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR5; 4299348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (SrcReg >= PPC::CR6LT || SrcReg <= PPC::CR6UN) 4309348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR6; 4319348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (SrcReg >= PPC::CR7LT || SrcReg <= PPC::CR7UN) 4329348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR7; 4339348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 4348e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman return StoreRegToStackSlot(MF, Reg, isKill, FrameIdx, 4359348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray PPC::CRRCRegisterClass, NewMIs); 4369348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 437f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::VRRCRegisterClass) { 438f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // We don't have indexed addressing for vector loads. Emit: 439f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // R0 = ADDI FI# 440f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // STVX VAL, 0, R0 441f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // 442f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 4438e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::ADDI), PPC::R0), 444f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx, 0, 0)); 4458e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(BuildMI(MF, get(PPC::STVX)) 446cb341de0e238f80dabf3da7b4f2aad58de6914bdChris Lattner .addReg(SrcReg, false, false, isKill).addReg(PPC::R0).addReg(PPC::R0)); 447f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 448f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(0 && "Unknown regclass!"); 449f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson abort(); 450f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 4517194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 4527194aaf738a1b89441635340403f1c5b06ae18efBill Wendling return false; 453f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 454f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 455f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid 456f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonPPCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, 4577194aaf738a1b89441635340403f1c5b06ae18efBill Wendling MachineBasicBlock::iterator MI, 4587194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned SrcReg, bool isKill, int FrameIdx, 4597194aaf738a1b89441635340403f1c5b06ae18efBill Wendling const TargetRegisterClass *RC) const { 4608e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MBB.getParent(); 461f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVector<MachineInstr*, 4> NewMIs; 4627194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 4638e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman if (StoreRegToStackSlot(MF, SrcReg, isKill, FrameIdx, RC, NewMIs)) { 4648e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); 4657194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FuncInfo->setSpillsCR(); 4667194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 4677194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 468f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) 469f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MBB.insert(MI, NewMIs[i]); 470f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 471f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 472f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid PPCInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, 4737194aaf738a1b89441635340403f1c5b06ae18efBill Wendling bool isKill, 4747194aaf738a1b89441635340403f1c5b06ae18efBill Wendling SmallVectorImpl<MachineOperand> &Addr, 4757194aaf738a1b89441635340403f1c5b06ae18efBill Wendling const TargetRegisterClass *RC, 4767194aaf738a1b89441635340403f1c5b06ae18efBill Wendling SmallVectorImpl<MachineInstr*> &NewMIs) const{ 477d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (Addr[0].isFI()) { 4788e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman if (StoreRegToStackSlot(MF, SrcReg, isKill, 4798e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman Addr[0].getIndex(), RC, NewMIs)) { 4807194aaf738a1b89441635340403f1c5b06ae18efBill Wendling PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); 4817194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FuncInfo->setSpillsCR(); 4827194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 4837194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 484f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson return; 485f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 486f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 487f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned Opc = 0; 488f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (RC == PPC::GPRCRegisterClass) { 489f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STW; 490f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::G8RCRegisterClass) { 491f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STD; 492f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F8RCRegisterClass) { 493f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STFD; 494f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F4RCRegisterClass) { 495f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STFS; 496f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::VRRCRegisterClass) { 497f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STVX; 498f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 499f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(0 && "Unknown regclass!"); 500f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson abort(); 501f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 5028e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineInstrBuilder MIB = BuildMI(MF, get(Opc)) 503f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson .addReg(SrcReg, false, false, isKill); 504f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = Addr.size(); i != e; ++i) { 505f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MachineOperand &MO = Addr[i]; 506d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MO.isReg()) 507f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MIB.addReg(MO.getReg()); 508d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman else if (MO.isImm()) 509f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MIB.addImm(MO.getImm()); 510f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson else 511f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MIB.addFrameIndex(MO.getIndex()); 512f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 513f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson NewMIs.push_back(MIB); 514f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson return; 515f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 516f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 5174a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingvoid 5188e5f2c6f65841542e2a7092553fe42a00048e4c7Dan GohmanPPCInstrInfo::LoadRegFromStackSlot(MachineFunction &MF, 5198e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman unsigned DestReg, int FrameIdx, 5204a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling const TargetRegisterClass *RC, 5214a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling SmallVectorImpl<MachineInstr*> &NewMIs)const{ 522f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (RC == PPC::GPRCRegisterClass) { 523f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::LR) { 5248e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::LWZ), DestReg), 525f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 526f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 5278e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::LWZ), PPC::R11), 528f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 5298e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(BuildMI(MF, get(PPC::MTLR)).addReg(PPC::R11)); 530f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 531f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::G8RCRegisterClass) { 532f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::LR8) { 5338e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::LD), DestReg), 534f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 535f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 5368e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::LD), PPC::R11), 537f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 5388e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(BuildMI(MF, get(PPC::MTLR8)).addReg(PPC::R11)); 539f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 540f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F8RCRegisterClass) { 5418e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::LFD), DestReg), 542f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 543f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F4RCRegisterClass) { 5448e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::LFS), DestReg), 545f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 546f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::CRRCRegisterClass) { 547f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 5488e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::LWZ), PPC::R0), 549f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 550f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 551f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // If the reloaded register isn't CR0, shift the bits right so that they are 552f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // in the right CR's slot. 553f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::CR0) { 554f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(DestReg)*4; 555f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // rlwinm r11, r11, 32-ShiftBits, 0, 31. 5568e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(BuildMI(MF, get(PPC::RLWINM), PPC::R0) 557f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson .addReg(PPC::R0).addImm(32-ShiftBits).addImm(0).addImm(31)); 558f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 559f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 5608e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(BuildMI(MF, get(PPC::MTCRF), DestReg).addReg(PPC::R0)); 5610404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray } else if (RC == PPC::CRBITRCRegisterClass) { 5629348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 5639348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray unsigned Reg = 0; 5640404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray if (DestReg >= PPC::CR0LT || DestReg <= PPC::CR0UN) 5659348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR0; 5660404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray else if (DestReg >= PPC::CR1LT || DestReg <= PPC::CR1UN) 5679348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR1; 5689348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (DestReg >= PPC::CR2LT || DestReg <= PPC::CR2UN) 5699348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR2; 5709348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (DestReg >= PPC::CR3LT || DestReg <= PPC::CR3UN) 5719348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR3; 5729348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (DestReg >= PPC::CR4LT || DestReg <= PPC::CR4UN) 5739348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR4; 5749348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (DestReg >= PPC::CR5LT || DestReg <= PPC::CR5UN) 5759348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR5; 5769348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (DestReg >= PPC::CR6LT || DestReg <= PPC::CR6UN) 5779348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR6; 5789348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (DestReg >= PPC::CR7LT || DestReg <= PPC::CR7UN) 5799348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR7; 5809348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 5818e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman return LoadRegFromStackSlot(MF, Reg, FrameIdx, 5829348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray PPC::CRRCRegisterClass, NewMIs); 5839348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 584f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::VRRCRegisterClass) { 585f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // We don't have indexed addressing for vector loads. Emit: 586f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // R0 = ADDI FI# 587f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // Dest = LVX 0, R0 588f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // 589f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 5908e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::ADDI), PPC::R0), 591f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx, 0, 0)); 5928e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMIs.push_back(BuildMI(MF, get(PPC::LVX),DestReg).addReg(PPC::R0) 593f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson .addReg(PPC::R0)); 594f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 595f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(0 && "Unknown regclass!"); 596f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson abort(); 597f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 598f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 599f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 600f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid 601f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonPPCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, 6027194aaf738a1b89441635340403f1c5b06ae18efBill Wendling MachineBasicBlock::iterator MI, 6037194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned DestReg, int FrameIdx, 6047194aaf738a1b89441635340403f1c5b06ae18efBill Wendling const TargetRegisterClass *RC) const { 6058e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MBB.getParent(); 606f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVector<MachineInstr*, 4> NewMIs; 6078e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman LoadRegFromStackSlot(MF, DestReg, FrameIdx, RC, NewMIs); 608f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) 609f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MBB.insert(MI, NewMIs[i]); 610f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 611f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 612f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid PPCInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, 6137194aaf738a1b89441635340403f1c5b06ae18efBill Wendling SmallVectorImpl<MachineOperand> &Addr, 6147194aaf738a1b89441635340403f1c5b06ae18efBill Wendling const TargetRegisterClass *RC, 6157194aaf738a1b89441635340403f1c5b06ae18efBill Wendling SmallVectorImpl<MachineInstr*> &NewMIs)const{ 616d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (Addr[0].isFI()) { 6178e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman LoadRegFromStackSlot(MF, DestReg, Addr[0].getIndex(), RC, NewMIs); 618f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson return; 619f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 620f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 621f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned Opc = 0; 622f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (RC == PPC::GPRCRegisterClass) { 623f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(DestReg != PPC::LR && "Can't handle this yet!"); 624f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LWZ; 625f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::G8RCRegisterClass) { 626f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(DestReg != PPC::LR8 && "Can't handle this yet!"); 627f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LD; 628f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F8RCRegisterClass) { 629f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LFD; 630f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F4RCRegisterClass) { 631f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LFS; 632f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::VRRCRegisterClass) { 633f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LVX; 634f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 635f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(0 && "Unknown regclass!"); 636f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson abort(); 637f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 6388e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineInstrBuilder MIB = BuildMI(MF, get(Opc), DestReg); 639f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = Addr.size(); i != e; ++i) { 640f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MachineOperand &MO = Addr[i]; 641d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MO.isReg()) 642f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MIB.addReg(MO.getReg()); 643d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman else if (MO.isImm()) 644f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MIB.addImm(MO.getImm()); 645f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson else 646f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MIB.addFrameIndex(MO.getIndex()); 647f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 648f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson NewMIs.push_back(MIB); 649f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson return; 650f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 651f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 65243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson/// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into 65343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson/// copy instructions, turning them into load/store instructions. 654c54baa2d43730f1804acfb4f4e738fba72f966bdDan GohmanMachineInstr *PPCInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, 655c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman MachineInstr *MI, 656c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman const SmallVectorImpl<unsigned> &Ops, 657c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman int FrameIndex) const { 65843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (Ops.size() != 1) return NULL; 65943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 66043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson // Make sure this is a reg-reg copy. Note that we can't handle MCRF, because 66143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson // it takes more than one instruction to store it. 66243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned Opc = MI->getOpcode(); 66343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OpNum = Ops[0]; 66443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 66543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MachineInstr *NewMI = NULL; 66643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if ((Opc == PPC::OR && 66743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) { 66843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (OpNum == 0) { // move -> store 66943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned InReg = MI->getOperand(1).getReg(); 6709f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isKill = MI->getOperand(1).isKill(); 6718e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMI = addFrameReference(BuildMI(MF, get(PPC::STW)) 6729f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng .addReg(InReg, false, false, isKill), 67343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 67443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else { // move -> load 67543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OutReg = MI->getOperand(0).getReg(); 6769f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isDead = MI->getOperand(0).isDead(); 6778e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMI = addFrameReference(BuildMI(MF, get(PPC::LWZ)) 6789f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng .addReg(OutReg, true, false, false, isDead), 67943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 68043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 68143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else if ((Opc == PPC::OR8 && 68243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) { 68343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (OpNum == 0) { // move -> store 68443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned InReg = MI->getOperand(1).getReg(); 6859f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isKill = MI->getOperand(1).isKill(); 6868e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMI = addFrameReference(BuildMI(MF, get(PPC::STD)) 6879f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng .addReg(InReg, false, false, isKill), 68843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 68943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else { // move -> load 69043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OutReg = MI->getOperand(0).getReg(); 6919f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isDead = MI->getOperand(0).isDead(); 6928e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMI = addFrameReference(BuildMI(MF, get(PPC::LD)) 6939f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng .addReg(OutReg, true, false, false, isDead), 6949f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng FrameIndex); 69543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 69643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else if (Opc == PPC::FMRD) { 69743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (OpNum == 0) { // move -> store 69843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned InReg = MI->getOperand(1).getReg(); 6999f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isKill = MI->getOperand(1).isKill(); 7008e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMI = addFrameReference(BuildMI(MF, get(PPC::STFD)) 7019f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng .addReg(InReg, false, false, isKill), 70243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 70343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else { // move -> load 70443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OutReg = MI->getOperand(0).getReg(); 7059f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isDead = MI->getOperand(0).isDead(); 7068e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMI = addFrameReference(BuildMI(MF, get(PPC::LFD)) 7079f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng .addReg(OutReg, true, false, false, isDead), 7089f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng FrameIndex); 70943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 71043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else if (Opc == PPC::FMRS) { 71143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (OpNum == 0) { // move -> store 71243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned InReg = MI->getOperand(1).getReg(); 7139f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isKill = MI->getOperand(1).isKill(); 7148e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMI = addFrameReference(BuildMI(MF, get(PPC::STFS)) 7159f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng .addReg(InReg, false, false, isKill), 71643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 71743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else { // move -> load 71843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OutReg = MI->getOperand(0).getReg(); 7199f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isDead = MI->getOperand(0).isDead(); 7208e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman NewMI = addFrameReference(BuildMI(MF, get(PPC::LFS)) 7219f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng .addReg(OutReg, true, false, false, isDead), 7229f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng FrameIndex); 72343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 72443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 72543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 72643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return NewMI; 72743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson} 72843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 7298e8b8a223c2b0e69f44c0639f846260c8011668fDan Gohmanbool PPCInstrInfo::canFoldMemoryOperand(const MachineInstr *MI, 7308e8b8a223c2b0e69f44c0639f846260c8011668fDan Gohman const SmallVectorImpl<unsigned> &Ops) const { 73143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (Ops.size() != 1) return false; 73243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 73343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson // Make sure this is a reg-reg copy. Note that we can't handle MCRF, because 73443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson // it takes more than one instruction to store it. 73543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned Opc = MI->getOpcode(); 73643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 73743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if ((Opc == PPC::OR && 73843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) 73943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return true; 74043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson else if ((Opc == PPC::OR8 && 74143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) 74243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return true; 74343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson else if (Opc == PPC::FMRD || Opc == PPC::FMRS) 74443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return true; 74543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 74643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return false; 74743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson} 74843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 749f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 7508e8b8a223c2b0e69f44c0639f846260c8011668fDan Gohmanbool PPCInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const { 751ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner if (MBB.empty()) return false; 752ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner 753ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner switch (MBB.back().getOpcode()) { 754126f17a17625876adb63f06d043fc1b1e4f0361cEvan Cheng case PPC::BLR: // Return. 755ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner case PPC::B: // Uncond branch. 756ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner case PPC::BCTR: // Indirect branch. 757ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner return true; 758ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner default: return false; 759ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner } 760ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner} 761ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner 762c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo:: 76344eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen AndersonReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { 7647c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner assert(Cond.size() == 2 && "Invalid PPC branch opcode!"); 7657c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner // Leave the CR# the same, but invert the condition. 76618258c640466274c26e89016e361ec411ff78520Chris Lattner Cond[0].setImm(PPC::InvertPredicate((PPC::Predicate)Cond[0].getImm())); 7677c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner return false; 768c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 76952e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray 77052e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// GetInstSize - Return the number of bytes of code the specified 77152e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// instruction may be. This returns the maximum number of bytes. 77252e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// 77352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffrayunsigned PPCInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { 77452e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray switch (MI->getOpcode()) { 77552e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray case PPC::INLINEASM: { // Inline Asm: Variable size. 77652e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray const MachineFunction *MF = MI->getParent()->getParent(); 77752e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray const char *AsmStr = MI->getOperand(0).getSymbolName(); 77852e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return MF->getTarget().getTargetAsmInfo()->getInlineAsmLength(AsmStr); 77952e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 7804406604047423576e36657c7ede266ca42e79642Dan Gohman case PPC::DBG_LABEL: 7814406604047423576e36657c7ede266ca42e79642Dan Gohman case PPC::EH_LABEL: 7824406604047423576e36657c7ede266ca42e79642Dan Gohman case PPC::GC_LABEL: 78352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 0; 78452e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray default: 78552e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 4; // PowerPC instructions are all 4 bytes 78652e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 78752e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray} 788