Lines Matching refs:rBase

642 LIR* ArmMir2Lir::LoadBaseIndexed(int rBase, int r_index, int r_dest,
644 bool all_low_regs = ARM_LOWREG(rBase) && ARM_LOWREG(r_index) && ARM_LOWREG(r_dest);
672 NewLIR4(kThumb2AddRRR, reg_ptr, rBase, r_index,
675 OpRegRegReg(kOpAdd, reg_ptr, rBase, r_index);
699 load = NewLIR3(opcode, r_dest, rBase, r_index);
701 load = NewLIR4(opcode, r_dest, rBase, r_index, scale);
706 LIR* ArmMir2Lir::StoreBaseIndexed(int rBase, int r_index, int r_src,
708 bool all_low_regs = ARM_LOWREG(rBase) && ARM_LOWREG(r_index) && ARM_LOWREG(r_src);
736 NewLIR4(kThumb2AddRRR, reg_ptr, rBase, r_index,
739 OpRegRegReg(kOpAdd, reg_ptr, rBase, r_index);
759 store = NewLIR3(opcode, r_src, rBase, r_index);
761 store = NewLIR4(opcode, r_src, rBase, r_index, scale);
771 LIR* ArmMir2Lir::LoadBaseDispBody(int rBase, int displacement, int r_dest,
777 bool all_low_regs = (ARM_LOWREG(rBase) && ARM_LOWREG(r_dest));
798 load = NewLIR4(kThumb2LdrdI8, r_dest, r_dest_hi, rBase, displacement >> 2);
800 load = LoadBaseDispBody(rBase, displacement, r_dest,
802 LoadBaseDispBody(rBase, displacement + 4, r_dest_hi,
817 if (ARM_LOWREG(r_dest) && (rBase == r15pc) &&
822 } else if (ARM_LOWREG(r_dest) && (rBase == r13sp) &&
875 load = NewLIR3(opcode, r_dest, rBase, encoded_disp);
879 load = LoadBaseIndexed(rBase, reg_offset, r_dest, 0, size);
885 if (rBase == rARM_SP) {
891 LIR* ArmMir2Lir::LoadBaseDisp(int rBase, int displacement, int r_dest,
893 return LoadBaseDispBody(rBase, displacement, r_dest, -1, size, s_reg);
896 LIR* ArmMir2Lir::LoadBaseDispWide(int rBase, int displacement, int r_dest_lo,
898 return LoadBaseDispBody(rBase, displacement, r_dest_lo, r_dest_hi, kLong, s_reg);
902 LIR* ArmMir2Lir::StoreBaseDispBody(int rBase, int displacement,
908 bool all_low_regs = (ARM_LOWREG(rBase) && ARM_LOWREG(r_src));
918 store = NewLIR4(kThumb2StrdI8, r_src, r_src_hi, rBase, displacement >> 2);
920 store = StoreBaseDispBody(rBase, displacement, r_src, -1, kWord);
921 StoreBaseDispBody(rBase, displacement + 4, r_src_hi, -1, kWord);
947 if (ARM_LOWREG(r_src) && (rBase == r13sp) &&
989 store = NewLIR3(opcode, r_src, rBase, encoded_disp);
993 store = StoreBaseIndexed(rBase, r_scratch, r_src, 0, size);
999 if (rBase == rARM_SP) {
1005 LIR* ArmMir2Lir::StoreBaseDisp(int rBase, int displacement, int r_src,
1007 return StoreBaseDispBody(rBase, displacement, r_src, -1, size);
1010 LIR* ArmMir2Lir::StoreBaseDispWide(int rBase, int displacement,
1012 return StoreBaseDispBody(rBase, displacement, r_src_lo, r_src_hi, kLong);
1040 LIR* ArmMir2Lir::OpMem(OpKind op, int rBase, int disp) {
1045 LIR* ArmMir2Lir::StoreBaseIndexedDisp(int rBase, int r_index, int scale,
1052 LIR* ArmMir2Lir::OpRegMem(OpKind op, int r_dest, int rBase, int offset) {
1057 LIR* ArmMir2Lir::LoadBaseIndexedDisp(int rBase, int r_index, int scale,